1 2006-08-25 Sterling Augustine <sterling@tensilica.com>
2 Bob Wilson <bob.wilson@acm.org>
4 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
5 the state of the absolute_literals directive. Remove align frag at
6 the start of the literal pool position.
8 2006-08-25 Bob Wilson <bob.wilson@acm.org>
10 * doc/c-xtensa.texi: Add @group commands in examples.
12 2006-08-24 Bob Wilson <bob.wilson@acm.org>
14 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
15 (INIT_LITERAL_SECTION_NAME): Delete.
16 (lit_state struct): Remove segment names, init_lit_seg, and
17 fini_lit_seg. Add lit_prefix and current_text_seg.
18 (init_literal_head_h, init_literal_head): Delete.
19 (fini_literal_head_h, fini_literal_head): Delete.
20 (xtensa_begin_directive): Move argument parsing to
21 xtensa_literal_prefix function.
22 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
23 (xtensa_literal_prefix): Parse the directive argument here and
24 record it in the lit_prefix field. Remove code to derive literal
27 (get_is_linkonce_section): Use linkonce_len. Check for any
28 ".gnu.linkonce.*" section, not just text sections.
29 (md_begin): Remove initialization of deleted lit_state fields.
30 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
31 to init_literal_head and fini_literal_head.
32 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
33 when traversing literal_head list.
34 (match_section_group): New.
35 (cache_literal_section): Rewrite to determine the literal section
36 name on the fly, create the section and return it.
37 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
38 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
39 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
40 Use xtensa_get_property_section from bfd.
41 (retrieve_xtensa_section): Delete.
42 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
43 description to refer to plural literal sections and add xref to
44 the Literal Directive section.
45 (Literal Directive): Describe new rules for deriving literal section
46 names. Add footnote for special case of .init/.fini with
47 --text-section-literals.
48 (Literal Prefix Directive): Replace old naming rules with xref to the
49 Literal Directive section.
51 2006-08-21 Joseph Myers <joseph@codesourcery.com>
53 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
54 merging with previous long opcode.
56 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
58 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
59 * Makefile.in: Regenerate.
60 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
63 2006-08-16 Julian Brown <julian@codesourcery.com>
65 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
66 to use ARM instructions on non-ARM-supporting cores.
67 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
68 mode automatically based on cpu variant.
69 (md_begin): Call above function.
71 2006-08-16 Julian Brown <julian@codesourcery.com>
73 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
74 recognized in non-unified syntax mode.
76 2006-08-15 Thiemo Seufer <ths@mips.com>
77 Nigel Stephens <nigel@mips.com>
78 David Ung <davidu@mips.com>
80 * configure.tgt: Handle mips*-sde-elf*.
82 2006-08-12 Thiemo Seufer <ths@networkno.de>
84 * config/tc-mips.c (mips16_ip): Fix argument register handling
85 for restore instruction.
87 2006-08-08 Bob Wilson <bob.wilson@acm.org>
89 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
91 (out_fixed_inc_line_addr): New.
92 (process_entries): Use out_fixed_inc_line_addr when
93 DWARF2_USE_FIXED_ADVANCE_PC is set.
94 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
96 2006-08-08 DJ Delorie <dj@redhat.com>
98 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
99 vs full symbols so that we never have more than one pointer value
100 for any given symbol in our symbol table.
102 2006-08-08 Sterling Augustine <sterling@tensilica.com>
104 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
105 and emit DW_AT_ranges when code in compilation unit is not
107 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
109 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
110 (out_debug_ranges): New function to emit .debug_ranges section
111 when code is not contiguous.
113 2006-08-08 Nick Clifton <nickc@redhat.com>
115 * config/tc-arm.c (WARN_DEPRECATED): Enable.
117 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
119 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
121 (pe_directive_secrel) [TE_PE]: New function.
122 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
123 loc, loc_mark_labels.
124 [TE_PE]: Handle secrel32.
125 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
127 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
128 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
129 (md_section_align): Only round section sizes here for AOUT
131 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
132 (tc_pe_dwarf2_emit_offset): New function.
133 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
134 (cons_fix_new_arm): Handle O_secrel.
135 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
136 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
137 of OBJ_ELF only block.
138 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
139 tc_pe_dwarf2_emit_offset.
141 2006-08-04 Richard Sandiford <richard@codesourcery.com>
143 * config/tc-sh.c (apply_full_field_fix): New function.
144 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
145 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
146 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
147 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
149 2006-08-03 Nick Clifton <nickc@redhat.com>
152 * config.in: Regenerate.
154 2006-08-03 Joseph Myers <joseph@codesourcery.com>
156 * config/tc-arm.c (parse_operands): Handle invalid register name
159 2006-08-03 Joseph Myers <joseph@codesourcery.com>
161 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
162 (parse_operands): Handle it.
163 (insns): Use it for tmcr and tmrc.
165 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
168 * config/tc-i386.c (md_parse_option): Treat any target starting
169 with elf64_x86_64 as a viable target for the -64 switch.
170 (i386_target_format): For 64-bit ELF flavoured output use
172 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
174 2006-08-02 Nick Clifton <nickc@redhat.com>
177 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
179 * configure.in: Run BFD_BINARY_FOPEN.
180 * configure: Regenerate.
181 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
184 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
186 * config/tc-i386.c (md_assemble): Don't update
189 2006-08-01 Thiemo Seufer <ths@mips.com>
191 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
193 2006-08-01 Thiemo Seufer <ths@mips.com>
195 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
196 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
197 BFD_RELOC_32 and BFD_RELOC_16.
198 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
199 md_convert_frag, md_obj_end): Fix comment formatting.
201 2006-07-31 Thiemo Seufer <ths@mips.com>
203 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
204 handling for BFD_RELOC_MIPS16_JMP.
206 2006-07-24 Andreas Schwab <schwab@suse.de>
209 * read.c (read_a_source_file): Ignore unknown text after line
210 comment character. Fix misleading comment.
212 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
214 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
215 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
216 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
217 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
218 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
219 doc/c-z80.texi, doc/internals.texi: Fix some typos.
221 2006-07-21 Nick Clifton <nickc@redhat.com>
223 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
226 2006-07-20 Thiemo Seufer <ths@mips.com>
227 Nigel Stephens <nigel@mips.com>
229 * config/tc-mips.c (md_parse_option): Don't infer optimisation
230 options from debug options.
232 2006-07-20 Thiemo Seufer <ths@mips.com>
234 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
235 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
237 2006-07-19 Paul Brook <paul@codesourcery.com>
239 * config/tc-arm.c (insns): Fix rbit Arm opcode.
241 2006-07-18 Paul Brook <paul@codesourcery.com>
243 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
244 (md_convert_frag): Use correct reloc for add_pc. Use
245 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
246 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
247 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
249 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
251 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
252 when file and line unknown.
254 2006-07-17 Thiemo Seufer <ths@mips.com>
256 * read.c (s_struct): Use IS_ELF.
257 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
258 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
259 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
260 s_mips_mask): Likewise.
262 2006-07-16 Thiemo Seufer <ths@mips.com>
263 David Ung <davidu@mips.com>
265 * read.c (s_struct): Handle ELF section changing.
266 * config/tc-mips.c (s_align): Leave enabling auto-align to the
268 (s_change_sec): Try section changing only if we output ELF.
270 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
272 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
274 (smallest_imm_type): Remove Cpu086.
275 (i386_target_format): Likewise.
277 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
280 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
281 Michael Meissner <michael.meissner@amd.com>
283 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
284 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
285 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
287 (i386_align_code): Ditto.
288 (md_assemble_code): Add support for insertq/extrq instructions,
289 swapping as needed for intel syntax.
290 (swap_imm_operands): New function to swap immediate operands.
291 (swap_operands): Deal with 4 operand instructions.
292 (build_modrm_byte): Add support for insertq instruction.
294 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
296 * config/tc-i386.h (Size64): Fix a typo in comment.
298 2006-07-12 Nick Clifton <nickc@redhat.com>
300 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
301 fixup_segment() to repeat a range check on a value that has
302 already been checked here.
304 2006-07-07 James E Wilson <wilson@specifix.com>
306 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
308 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
309 Nick Clifton <nickc@redhat.com>
312 * doc/as.texi: Fix spelling typo: branchs => branches.
313 * doc/c-m68hc11.texi: Likewise.
314 * config/tc-m68hc11.c: Likewise.
315 Support old spelling of command line switch for backwards
318 2006-07-04 Thiemo Seufer <ths@mips.com>
319 David Ung <davidu@mips.com>
321 * config/tc-mips.c (s_is_linkonce): New function.
322 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
323 weak, external, and linkonce symbols.
324 (pic_need_relax): Use s_is_linkonce.
326 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
328 * doc/as.texinfo (Org): Remove space.
329 (P2align): Add "@var{abs-expr},".
331 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
333 * config/tc-i386.c (cpu_arch_tune_set): New.
334 (cpu_arch_isa): Likewise.
335 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
336 nops with short or long nop sequences based on -march=/.arch
338 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
339 set cpu_arch_tune and cpu_arch_tune_flags.
340 (md_parse_option): For -march=, set cpu_arch_isa and set
341 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
342 0. Set cpu_arch_tune_set to 1 for -mtune=.
343 (i386_target_format): Don't set cpu_arch_tune.
345 2006-06-23 Nigel Stephens <nigel@mips.com>
347 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
348 generated .sbss.* and .gnu.linkonce.sb.*.
350 2006-06-23 Thiemo Seufer <ths@mips.com>
351 David Ung <davidu@mips.com>
353 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
355 * config/tc-mips.c (label_list): Define per-segment label_list.
356 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
357 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
358 mips_from_file_after_relocs, mips_define_label): Use per-segment
361 2006-06-22 Thiemo Seufer <ths@mips.com>
363 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
364 (append_insn): Use it.
365 (md_apply_fix): Whitespace formatting.
366 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
367 mips16_extended_frag): Remove register specifier.
368 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
371 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
373 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
374 a directive saving VFP registers for ARMv6 or later.
375 (s_arm_unwind_save): Add parameter arch_v6 and call
376 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
378 (md_pseudo_table): Add entry for new "vsave" directive.
379 * doc/c-arm.texi: Correct error in example for "save"
380 directive (fstmdf -> fstmdx). Also document "vsave" directive.
382 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
383 Anatoly Sokolov <aesok@post.ru>
385 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
386 and atmega644p devices. Rename atmega164/atmega324 devices to
387 atmega164p/atmega324p.
388 * doc/c-avr.texi: Document new mcu and arch options.
390 2006-06-17 Nick Clifton <nickc@redhat.com>
392 * config/tc-arm.c (enum parse_operand_result): Move outside of
393 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
395 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
397 * config/tc-i386.h (processor_type): New.
398 (arch_entry): Add type.
400 * config/tc-i386.c (cpu_arch_tune): New.
401 (cpu_arch_tune_flags): Likewise.
402 (cpu_arch_isa_flags): Likewise.
404 (set_cpu_arch): Also update cpu_arch_isa_flags.
405 (md_assemble): Update cpu_arch_isa_flags.
407 (OPTION_MTUNE): Likewise.
408 (md_longopts): Add -march= and -mtune=.
409 (md_parse_option): Support -march= and -mtune=.
410 (md_show_usage): Add -march=CPU/-mtune=CPU.
411 (i386_target_format): Also update cpu_arch_isa_flags,
412 cpu_arch_tune and cpu_arch_tune_flags.
414 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
416 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
418 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
420 * config/tc-arm.c (enum parse_operand_result): New.
421 (struct group_reloc_table_entry): New.
422 (enum group_reloc_type): New.
423 (group_reloc_table): New array.
424 (find_group_reloc_table_entry): New function.
425 (parse_shifter_operand_group_reloc): New function.
426 (parse_address_main): New function, incorporating code
427 from the old parse_address function. To be used via...
428 (parse_address): wrapper for parse_address_main; and
429 (parse_address_group_reloc): new function, likewise.
430 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
431 OP_ADDRGLDRS, OP_ADDRGLDC.
432 (parse_operands): Support for these new operand codes.
433 New macro po_misc_or_fail_no_backtrack.
434 (encode_arm_cp_address): Preserve group relocations.
435 (insns): Modify to use the above operand codes where group
436 relocations are permitted.
437 (md_apply_fix): Handle the group relocations
438 ALU_PC_G0_NC through LDC_SB_G2.
439 (tc_gen_reloc): Likewise.
440 (arm_force_relocation): Leave group relocations for the linker.
441 (arm_fix_adjustable): Likewise.
443 2006-06-15 Julian Brown <julian@codesourcery.com>
445 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
446 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
449 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
451 * config/tc-i386.c (process_suffix): Don't add rex64 for
454 2006-06-09 Thiemo Seufer <ths@mips.com>
456 * config/tc-mips.c (mips_ip): Maintain argument count.
458 2006-06-09 Alan Modra <amodra@bigpond.net.au>
460 * config/tc-iq2000.c: Include sb.h.
462 2006-06-08 Nigel Stephens <nigel@mips.com>
464 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
465 aliases for better compatibility with SGI tools.
467 2006-06-08 Alan Modra <amodra@bigpond.net.au>
469 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
470 * Makefile.am (GASLIBS): Expand @BFDLIB@.
472 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
473 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
474 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
476 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
477 * Makefile.in: Regenerate.
478 * doc/Makefile.in: Regenerate.
479 * configure: Regenerate.
481 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
483 * po/Make-in (pdf, ps): New dummy targets.
485 2006-06-07 Julian Brown <julian@codesourcery.com>
487 * config/tc-arm.c (stdarg.h): include.
488 (arm_it): Add uncond_value field. Add isvec and issingle to operand
490 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
491 REG_TYPE_NSDQ (single, double or quad vector reg).
492 (reg_expected_msgs): Update.
493 (BAD_FPU): Add macro for unsupported FPU instruction error.
494 (parse_neon_type): Support 'd' as an alias for .f64.
495 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
497 (parse_vfp_reg_list): Don't update first arg on error.
498 (parse_neon_mov): Support extra syntax for VFP moves.
499 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
500 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
501 (parse_operands): Support isvec, issingle operands fields, new parse
503 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
505 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
506 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
507 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
508 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
510 (neon_shape): Redefine in terms of above.
511 (neon_shape_class): New enumeration, table of shape classes.
512 (neon_shape_el): New enumeration. One element of a shape.
513 (neon_shape_el_size): Register widths of above, where appropriate.
514 (neon_shape_info): New struct. Info for shape table.
515 (neon_shape_tab): New array.
516 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
517 (neon_check_shape): Rewrite as...
518 (neon_select_shape): New function to classify instruction shapes,
519 driven by new table neon_shape_tab array.
520 (neon_quad): New function. Return 1 if shape should set Q flag in
521 instructions (or equivalent), 0 otherwise.
522 (type_chk_of_el_type): Support F64.
523 (el_type_of_type_chk): Likewise.
524 (neon_check_type): Add support for VFP type checking (VFP data
525 elements fill their containing registers).
526 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
527 in thumb mode for VFP instructions.
528 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
529 and encode the current instruction as if it were that opcode.
530 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
531 arguments, call function in PFN.
532 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
533 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
534 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
535 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
536 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
537 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
538 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
539 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
540 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
541 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
542 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
543 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
544 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
545 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
546 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
548 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
549 between VFP and Neon turns out to belong to Neon. Perform
550 architecture check and fill in condition field if appropriate.
551 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
552 (do_neon_cvt): Add support for VFP variants of instructions.
553 (neon_cvt_flavour): Extend to cover VFP conversions.
554 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
556 (do_neon_ldr_str): Handle single-precision VFP load/store.
557 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
558 NS_NULL not NS_IGNORE.
559 (opcode_tag): Add OT_csuffixF for operands which either take a
560 conditional suffix, or have 0xF in the condition field.
561 (md_assemble): Add support for OT_csuffixF.
562 (NCE): Replace macro with...
563 (NCE_tag, NCE, NCEF): New macros.
564 (nCE): Replace macro with...
565 (nCE_tag, nCE, nCEF): New macros.
566 (insns): Add support for VFP insns or VFP versions of insns msr,
567 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
568 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
569 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
570 VFP/Neon insns together.
572 2006-06-07 Alan Modra <amodra@bigpond.net.au>
573 Ladislav Michl <ladis@linux-mips.org>
575 * app.c: Don't include headers already included by as.h.
577 * atof-generic.c: Likewise.
579 * dwarf2dbg.c: Likewise.
581 * input-file.c: Likewise.
582 * input-scrub.c: Likewise.
584 * output-file.c: Likewise.
587 * config/bfin-lex.l: Likewise.
588 * config/obj-coff.h: Likewise.
589 * config/obj-elf.h: Likewise.
590 * config/obj-som.h: Likewise.
591 * config/tc-arc.c: Likewise.
592 * config/tc-arm.c: Likewise.
593 * config/tc-avr.c: Likewise.
594 * config/tc-bfin.c: Likewise.
595 * config/tc-cris.c: Likewise.
596 * config/tc-d10v.c: Likewise.
597 * config/tc-d30v.c: Likewise.
598 * config/tc-dlx.h: Likewise.
599 * config/tc-fr30.c: Likewise.
600 * config/tc-frv.c: Likewise.
601 * config/tc-h8300.c: Likewise.
602 * config/tc-hppa.c: Likewise.
603 * config/tc-i370.c: Likewise.
604 * config/tc-i860.c: Likewise.
605 * config/tc-i960.c: Likewise.
606 * config/tc-ip2k.c: Likewise.
607 * config/tc-iq2000.c: Likewise.
608 * config/tc-m32c.c: Likewise.
609 * config/tc-m32r.c: Likewise.
610 * config/tc-maxq.c: Likewise.
611 * config/tc-mcore.c: Likewise.
612 * config/tc-mips.c: Likewise.
613 * config/tc-mmix.c: Likewise.
614 * config/tc-mn10200.c: Likewise.
615 * config/tc-mn10300.c: Likewise.
616 * config/tc-msp430.c: Likewise.
617 * config/tc-mt.c: Likewise.
618 * config/tc-ns32k.c: Likewise.
619 * config/tc-openrisc.c: Likewise.
620 * config/tc-ppc.c: Likewise.
621 * config/tc-s390.c: Likewise.
622 * config/tc-sh.c: Likewise.
623 * config/tc-sh64.c: Likewise.
624 * config/tc-sparc.c: Likewise.
625 * config/tc-tic30.c: Likewise.
626 * config/tc-tic4x.c: Likewise.
627 * config/tc-tic54x.c: Likewise.
628 * config/tc-v850.c: Likewise.
629 * config/tc-vax.c: Likewise.
630 * config/tc-xc16x.c: Likewise.
631 * config/tc-xstormy16.c: Likewise.
632 * config/tc-xtensa.c: Likewise.
633 * config/tc-z80.c: Likewise.
634 * config/tc-z8k.c: Likewise.
635 * macro.h: Don't include sb.h or ansidecl.h.
636 * sb.h: Don't include stdio.h or ansidecl.h.
637 * cond.c: Include sb.h.
638 * itbl-lex.l: Include as.h instead of other system headers.
639 * itbl-parse.y: Likewise.
640 * itbl-ops.c: Similarly.
641 * itbl-ops.h: Don't include as.h or ansidecl.h.
642 * config/bfin-defs.h: Don't include bfd.h or as.h.
643 * config/bfin-parse.y: Include as.h instead of other system headers.
645 2006-06-06 Ben Elliston <bje@au.ibm.com>
646 Anton Blanchard <anton@samba.org>
648 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
649 (md_show_usage): Document it.
650 (ppc_setup_opcodes): Test power6 opcode flag bits.
651 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
653 2006-06-06 Thiemo Seufer <ths@mips.com>
654 Chao-ying Fu <fu@mips.com>
656 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
657 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
658 (macro_build): Update comment.
659 (mips_ip): Allow DSP64 instructions for MIPS64R2.
660 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
662 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
663 MIPS_CPU_ASE_MDMX flags for sb1.
665 2006-06-05 Thiemo Seufer <ths@mips.com>
667 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
669 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
670 (mips_ip): Make overflowed/underflowed constant arguments in DSP
671 and MT instructions a fatal error. Use INSERT_OPERAND where
672 appropriate. Improve warnings for break and wait code overflows.
673 Use symbolic constant of OP_MASK_COPZ.
674 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
676 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
678 * po/Make-in (top_builddir): Define.
680 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
682 * doc/Makefile.am (TEXI2DVI): Define.
683 * doc/Makefile.in: Regenerate.
684 * doc/c-arc.texi: Fix typo.
686 2006-06-01 Alan Modra <amodra@bigpond.net.au>
688 * config/obj-ieee.c: Delete.
689 * config/obj-ieee.h: Delete.
690 * Makefile.am (OBJ_FORMATS): Remove ieee.
691 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
692 (obj-ieee.o): Remove rule.
693 * Makefile.in: Regenerate.
694 * configure.in (atof): Remove tahoe.
695 (OBJ_MAYBE_IEEE): Don't define.
696 * configure: Regenerate.
697 * config.in: Regenerate.
698 * doc/Makefile.in: Regenerate.
699 * po/POTFILES.in: Regenerate.
701 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
703 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
704 and LIBINTL_DEP everywhere.
706 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
707 * acinclude.m4: Include new gettext macros.
708 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
709 Remove local code for po/Makefile.
710 * Makefile.in, configure, doc/Makefile.in: Regenerated.
712 2006-05-30 Nick Clifton <nickc@redhat.com>
714 * po/es.po: Updated Spanish translation.
716 2006-05-06 Denis Chertykov <denisc@overta.ru>
718 * doc/c-avr.texi: New file.
719 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
720 * doc/all.texi: Set AVR
721 * doc/as.texinfo: Include c-avr.texi
723 2006-05-28 Jie Zhang <jie.zhang@analog.com>
725 * config/bfin-parse.y (check_macfunc): Loose the condition of
726 calling check_multiply_halfregs ().
728 2006-05-25 Jie Zhang <jie.zhang@analog.com>
730 * config/bfin-parse.y (asm_1): Better check and deal with
731 vector and scalar Multiply 16-Bit Operands instructions.
733 2006-05-24 Nick Clifton <nickc@redhat.com>
735 * config/tc-hppa.c: Convert to ISO C90 format.
736 * config/tc-hppa.h: Likewise.
738 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
739 Randolph Chung <randolph@tausq.org>
741 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
742 is_tls_ieoff, is_tls_leoff): Define.
743 (fix_new_hppa): Handle TLS.
744 (cons_fix_new_hppa): Likewise.
746 (md_apply_fix): Handle TLS relocs.
747 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
749 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
751 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
753 2006-05-23 Thiemo Seufer <ths@mips.com>
754 David Ung <davidu@mips.com>
755 Nigel Stephens <nigel@mips.com>
758 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
759 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
760 ISA_HAS_MXHC1): New macros.
761 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
762 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
763 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
764 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
765 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
766 (mips_after_parse_args): Change default handling of float register
767 size to account for 32bit code with 64bit FP. Better sanity checking
768 of ISA/ASE/ABI option combinations.
769 (s_mipsset): Support switching of GPR and FPR sizes via
770 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
772 (mips_elf_final_processing): We should record the use of 64bit FP
773 registers in 32bit code but we don't, because ELF header flags are
775 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
776 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
777 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
778 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
779 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
780 missing -march options. Document .set arch=CPU. Move .set smartmips
781 to ASE page. Use @code for .set FOO examples.
783 2006-05-23 Jie Zhang <jie.zhang@analog.com>
785 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
788 2006-05-23 Jie Zhang <jie.zhang@analog.com>
790 * config/bfin-defs.h (bfin_equals): Remove declaration.
791 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
792 * config/tc-bfin.c (bfin_name_is_register): Remove.
793 (bfin_equals): Remove.
794 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
795 (bfin_name_is_register): Remove declaration.
797 2006-05-19 Thiemo Seufer <ths@mips.com>
798 Nigel Stephens <nigel@mips.com>
800 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
801 (mips_oddfpreg_ok): New function.
804 2006-05-19 Thiemo Seufer <ths@mips.com>
805 David Ung <davidu@mips.com>
807 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
808 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
809 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
810 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
811 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
812 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
813 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
814 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
815 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
816 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
817 reg_names_o32, reg_names_n32n64): Define register classes.
818 (reg_lookup): New function, use register classes.
819 (md_begin): Reserve register names in the symbol table. Simplify
821 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
823 (mips16_ip): Use reg_lookup.
824 (tc_get_register): Likewise.
825 (tc_mips_regname_to_dw2regnum): New function.
827 2006-05-19 Thiemo Seufer <ths@mips.com>
829 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
830 Un-constify string argument.
831 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
833 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
835 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
837 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
839 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
841 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
844 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
846 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
847 cfloat/m68881 to correct architecture before using it.
849 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
851 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
854 2006-05-15 Paul Brook <paul@codesourcery.com>
856 * config/tc-arm.c (arm_adjust_symtab): Use
857 bfd_is_arm_special_symbol_name.
859 2006-05-15 Bob Wilson <bob.wilson@acm.org>
861 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
862 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
863 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
864 Handle errors from calls to xtensa_opcode_is_* functions.
866 2006-05-14 Thiemo Seufer <ths@mips.com>
868 * config/tc-mips.c (macro_build): Test for currently active
870 (mips16_ip): Reject invalid opcodes.
872 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
874 * doc/as.texinfo: Rename "Index" to "AS Index",
875 and "ABORT" to "ABORT (COFF)".
877 2006-05-11 Paul Brook <paul@codesourcery.com>
879 * config/tc-arm.c (parse_half): New function.
880 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
881 (parse_operands): Ditto.
882 (do_mov16): Reject invalid relocations.
883 (do_t_mov16): Ditto. Use Thumb reloc numbers.
884 (insns): Replace Iffff with HALF.
885 (md_apply_fix): Add MOVW and MOVT relocs.
886 (tc_gen_reloc): Ditto.
887 * doc/c-arm.texi: Document relocation operators
889 2006-05-11 Paul Brook <paul@codesourcery.com>
891 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
893 2006-05-11 Thiemo Seufer <ths@mips.com>
895 * config/tc-mips.c (append_insn): Don't check the range of j or
898 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
900 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
901 relocs against external symbols for WinCE targets.
902 (md_apply_fix): Likewise.
904 2006-05-09 David Ung <davidu@mips.com>
906 * config/tc-mips.c (append_insn): Only warn about an out-of-range
909 2006-05-09 Nick Clifton <nickc@redhat.com>
911 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
912 against symbols which are not going to be placed into the symbol
915 2006-05-09 Ben Elliston <bje@au.ibm.com>
917 * expr.c (operand): Remove `if (0 && ..)' statement and
918 subsequently unused target_op label. Collapse `if (1 || ..)'
920 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
921 separately above the switch.
923 2006-05-08 Nick Clifton <nickc@redhat.com>
926 * config/tc-msp430.c (line_separator_character): Define as |.
928 2006-05-08 Thiemo Seufer <ths@mips.com>
929 Nigel Stephens <nigel@mips.com>
930 David Ung <davidu@mips.com>
932 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
933 (mips_opts): Likewise.
934 (file_ase_smartmips): New variable.
935 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
936 (macro_build): Handle SmartMIPS instructions.
938 (md_longopts): Add argument handling for smartmips.
939 (md_parse_options, mips_after_parse_args): Likewise.
940 (s_mipsset): Add .set smartmips support.
941 (md_show_usage): Document -msmartmips/-mno-smartmips.
942 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
944 * doc/c-mips.texi: Likewise.
946 2006-05-08 Alan Modra <amodra@bigpond.net.au>
948 * write.c (relax_segment): Add pass count arg. Don't error on
949 negative org/space on first two passes.
950 (relax_seg_info): New struct.
951 (relax_seg, write_object_file): Adjust.
952 * write.h (relax_segment): Update prototype.
954 2006-05-05 Julian Brown <julian@codesourcery.com>
956 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
958 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
959 architecture version checks.
960 (insns): Allow overlapping instructions to be used in VFP mode.
962 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
965 * config/obj-elf.c (obj_elf_change_section): Allow user
966 specified SHF_ALPHA_GPREL.
968 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
970 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
971 for PMEM related expressions.
973 2006-05-05 Nick Clifton <nickc@redhat.com>
976 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
977 insertion of a directory separator character into a string at a
978 given offset. Uses heuristics to decide when to use a backslash
979 character rather than a forward-slash character.
980 (dwarf2_directive_loc): Use the macro.
981 (out_debug_info): Likewise.
983 2006-05-05 Thiemo Seufer <ths@mips.com>
984 David Ung <davidu@mips.com>
986 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
988 (macro): Add new case M_CACHE_AB.
990 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
992 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
993 (opcode_lookup): Issue a warning for opcode with
994 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
995 identical to OT_cinfix3.
996 (TxC3w, TC3w, tC3w): New.
997 (insns): Use tC3w and TC3w for comparison instructions with
1000 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1002 * subsegs.h (struct frchain): Delete frch_seg.
1003 (frchain_root): Delete.
1004 (seg_info): Define as macro.
1005 * subsegs.c (frchain_root): Delete.
1006 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1007 (subsegs_begin, subseg_change): Adjust for above.
1008 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1009 rather than to one big list.
1010 (subseg_get): Don't special case abs, und sections.
1011 (subseg_new, subseg_force_new): Don't set frchainP here.
1013 (subsegs_print_statistics): Adjust frag chain control list traversal.
1014 * debug.c (dmp_frags): Likewise.
1015 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1016 at frchain_root. Make use of known frchain ordering.
1017 (last_frag_for_seg): Likewise.
1018 (get_frag_fix): Likewise. Add seg param.
1019 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1020 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1021 (SUB_SEGMENT_ALIGN): Likewise.
1022 (subsegs_finish): Adjust frchain list traversal.
1023 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1024 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1025 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1026 (xtensa_fix_b_j_loop_end_frags): Likewise.
1027 (xtensa_fix_close_loop_end_frags): Likewise.
1028 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1029 (retrieve_segment_info): Delete frch_seg initialisation.
1031 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1033 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1034 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1035 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1036 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1038 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1040 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1042 (md_apply_fix3): Multiply offset by 4 here for
1043 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1045 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1046 Jan Beulich <jbeulich@novell.com>
1048 * config/tc-i386.c (output_invalid_buf): Change size for
1050 * config/tc-tic30.c (output_invalid_buf): Likewise.
1052 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1054 * config/tc-tic30.c (output_invalid): Likewise.
1056 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1058 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1059 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1060 (asconfig.texi): Don't set top_srcdir.
1061 * doc/as.texinfo: Don't use top_srcdir.
1062 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1064 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1066 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1067 * config/tc-tic30.c (output_invalid_buf): Likewise.
1069 * config/tc-i386.c (output_invalid): Use snprintf instead of
1071 * config/tc-ia64.c (declare_register_set): Likewise.
1072 (emit_one_bundle): Likewise.
1073 (check_dependencies): Likewise.
1074 * config/tc-tic30.c (output_invalid): Likewise.
1076 2006-05-02 Paul Brook <paul@codesourcery.com>
1078 * config/tc-arm.c (arm_optimize_expr): New function.
1079 * config/tc-arm.h (md_optimize_expr): Define
1080 (arm_optimize_expr): Add prototype.
1081 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1083 2006-05-02 Ben Elliston <bje@au.ibm.com>
1085 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1088 * sb.h (sb_list_vector): Move to sb.c.
1089 * sb.c (free_list): Use type of sb_list_vector directly.
1090 (sb_build): Fix off-by-one error in assertion about `size'.
1092 2006-05-01 Ben Elliston <bje@au.ibm.com>
1094 * listing.c (listing_listing): Remove useless loop.
1095 * macro.c (macro_expand): Remove is_positional local variable.
1096 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1097 and simplify surrounding expressions, where possible.
1098 (assign_symbol): Likewise.
1099 (s_weakref): Likewise.
1100 * symbols.c (colon): Likewise.
1102 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1104 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1106 2006-04-30 Thiemo Seufer <ths@mips.com>
1107 David Ung <davidu@mips.com>
1109 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1110 (mips_immed): New table that records various handling of udi
1111 instruction patterns.
1112 (mips_ip): Adds udi handling.
1114 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1116 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1117 of list rather than beginning.
1119 2006-04-26 Julian Brown <julian@codesourcery.com>
1121 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1122 (is_quarter_float): Rename from above. Simplify slightly.
1123 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1125 (parse_neon_mov): Parse floating-point constants.
1126 (neon_qfloat_bits): Fix encoding.
1127 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1128 preference to integer encoding when using the F32 type.
1130 2006-04-26 Julian Brown <julian@codesourcery.com>
1132 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1133 zero-initialising structures containing it will lead to invalid types).
1134 (arm_it): Add vectype to each operand.
1135 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1137 (neon_typed_alias): New structure. Extra information for typed
1139 (reg_entry): Add neon type info field.
1140 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1141 Break out alternative syntax for coprocessor registers, etc. into...
1142 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1143 out from arm_reg_parse.
1144 (parse_neon_type): Move. Return SUCCESS/FAIL.
1145 (first_error): New function. Call to ensure first error which occurs is
1147 (parse_neon_operand_type): Parse exactly one type.
1148 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1149 (parse_typed_reg_or_scalar): New function. Handle core of both
1150 arm_typed_reg_parse and parse_scalar.
1151 (arm_typed_reg_parse): Parse a register with an optional type.
1152 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1154 (parse_scalar): Parse a Neon scalar with optional type.
1155 (parse_reg_list): Use first_error.
1156 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1157 (neon_alias_types_same): New function. Return true if two (alias) types
1159 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1161 (insert_reg_alias): Return new reg_entry not void.
1162 (insert_neon_reg_alias): New function. Insert type/index information as
1163 well as register for alias.
1164 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1165 make typed register aliases accordingly.
1166 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1168 (s_unreq): Delete type information if present.
1169 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1170 (s_arm_unwind_save_mmxwcg): Likewise.
1171 (s_arm_unwind_movsp): Likewise.
1172 (s_arm_unwind_setfp): Likewise.
1173 (parse_shift): Likewise.
1174 (parse_shifter_operand): Likewise.
1175 (parse_address): Likewise.
1176 (parse_tb): Likewise.
1177 (tc_arm_regname_to_dw2regnum): Likewise.
1178 (md_pseudo_table): Add dn, qn.
1179 (parse_neon_mov): Handle typed operands.
1180 (parse_operands): Likewise.
1181 (neon_type_mask): Add N_SIZ.
1182 (N_ALLMODS): New macro.
1183 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1184 (el_type_of_type_chk): Add some safeguards.
1185 (modify_types_allowed): Fix logic bug.
1186 (neon_check_type): Handle operands with types.
1187 (neon_three_same): Remove redundant optional arg handling.
1188 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1189 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1190 (do_neon_step): Adjust accordingly.
1191 (neon_cmode_for_logic_imm): Use first_error.
1192 (do_neon_bitfield): Call neon_check_type.
1193 (neon_dyadic): Rename to...
1194 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1195 to allow modification of type of the destination.
1196 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1197 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1198 (do_neon_compare): Make destination be an untyped bitfield.
1199 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1200 (neon_mul_mac): Return early in case of errors.
1201 (neon_move_immediate): Use first_error.
1202 (neon_mac_reg_scalar_long): Fix type to include scalar.
1203 (do_neon_dup): Likewise.
1204 (do_neon_mov): Likewise (in several places).
1205 (do_neon_tbl_tbx): Fix type.
1206 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1207 (do_neon_ld_dup): Exit early in case of errors and/or use
1209 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1210 Handle .dn/.qn directives.
1211 (REGDEF): Add zero for reg_entry neon field.
1213 2006-04-26 Julian Brown <julian@codesourcery.com>
1215 * config/tc-arm.c (limits.h): Include.
1216 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1217 (fpu_vfp_v3_or_neon_ext): Declare constants.
1218 (neon_el_type): New enumeration of types for Neon vector elements.
1219 (neon_type_el): New struct. Define type and size of a vector element.
1220 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1222 (neon_type): Define struct. The type of an instruction.
1223 (arm_it): Add 'vectype' for the current instruction.
1224 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1225 (vfp_sp_reg_pos): Rename to...
1226 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1228 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1229 (Neon D or Q register).
1230 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1232 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1233 (my_get_expression): Allow above constant as argument to accept
1234 64-bit constants with optional prefix.
1235 (arm_reg_parse): Add extra argument to return the specific type of
1236 register in when either a D or Q register (REG_TYPE_NDQ) is
1237 requested. Can be NULL.
1238 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1239 (parse_reg_list): Update for new arm_reg_parse args.
1240 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1241 (parse_neon_el_struct_list): New function. Parse element/structure
1242 register lists for VLD<n>/VST<n> instructions.
1243 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1244 (s_arm_unwind_save_mmxwr): Likewise.
1245 (s_arm_unwind_save_mmxwcg): Likewise.
1246 (s_arm_unwind_movsp): Likewise.
1247 (s_arm_unwind_setfp): Likewise.
1248 (parse_big_immediate): New function. Parse an immediate, which may be
1249 64 bits wide. Put results in inst.operands[i].
1250 (parse_shift): Update for new arm_reg_parse args.
1251 (parse_address): Likewise. Add parsing of alignment specifiers.
1252 (parse_neon_mov): Parse the operands of a VMOV instruction.
1253 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1254 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1255 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1256 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1257 (parse_operands): Handle new codes above.
1258 (encode_arm_vfp_sp_reg): Rename to...
1259 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1260 selected VFP version only supports D0-D15.
1261 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1262 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1263 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1264 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1265 encode_arm_vfp_reg name, and allow 32 D regs.
1266 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1267 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1269 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1270 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1271 constant-load and conversion insns introduced with VFPv3.
1272 (neon_tab_entry): New struct.
1273 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1274 those which are the targets of pseudo-instructions.
1275 (neon_opc): Enumerate opcodes, use as indices into...
1276 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1277 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1278 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1279 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1281 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1283 (neon_type_mask): New. Compact type representation for type checking.
1284 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1285 permitted type combinations.
1286 (N_IGNORE_TYPE): New macro.
1287 (neon_check_shape): New function. Check an instruction shape for
1288 multiple alternatives. Return the specific shape for the current
1290 (neon_modify_type_size): New function. Modify a vector type and size,
1291 depending on the bit mask in argument 1.
1292 (neon_type_promote): New function. Convert a given "key" type (of an
1293 operand) into the correct type for a different operand, based on a bit
1295 (type_chk_of_el_type): New function. Convert a type and size into the
1296 compact representation used for type checking.
1297 (el_type_of_type_ckh): New function. Reverse of above (only when a
1298 single bit is set in the bit mask).
1299 (modify_types_allowed): New function. Alter a mask of allowed types
1300 based on a bit mask of modifications.
1301 (neon_check_type): New function. Check the type of the current
1302 instruction against the variable argument list. The "key" type of the
1303 instruction is returned.
1304 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1305 a Neon data-processing instruction depending on whether we're in ARM
1306 mode or Thumb-2 mode.
1307 (neon_logbits): New function.
1308 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1309 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1310 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1311 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1312 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1313 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1314 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1315 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1316 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1317 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1318 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1319 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1320 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1321 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1322 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1323 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1324 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1325 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1326 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1327 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1328 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1329 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1330 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1331 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1332 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1334 (parse_neon_type): New function. Parse Neon type specifier.
1335 (opcode_lookup): Allow parsing of Neon type specifiers.
1336 (REGNUM2, REGSETH, REGSET2): New macros.
1337 (reg_names): Add new VFPv3 and Neon registers.
1338 (NUF, nUF, NCE, nCE): New macros for opcode table.
1339 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1340 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1341 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1342 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1343 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1344 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1345 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1346 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1347 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1348 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1349 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1350 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1351 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1352 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1354 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1355 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1356 (arm_option_cpu_value): Add vfp3 and neon.
1357 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1360 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1362 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1363 syntax instead of hardcoded opcodes with ".w18" suffixes.
1364 (wide_branch_opcode): New.
1365 (build_transition): Use it to check for wide branch opcodes with
1366 either ".w18" or ".w15" suffixes.
1368 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1370 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1371 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1372 frag's is_literal flag.
1374 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1376 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1378 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1380 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1381 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1382 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1383 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1384 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1386 2005-04-20 Paul Brook <paul@codesourcery.com>
1388 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1390 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1392 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1394 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1395 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1396 Make some cpus unsupported on ELF. Run "make dep-am".
1397 * Makefile.in: Regenerate.
1399 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1401 * configure.in (--enable-targets): Indent help message.
1402 * configure: Regenerate.
1404 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1407 * config/tc-i386.c (i386_immediate): Check illegal immediate
1410 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1412 * config/tc-i386.c: Formatting.
1413 (output_disp, output_imm): ISO C90 params.
1415 * frags.c (frag_offset_fixed_p): Constify args.
1416 * frags.h (frag_offset_fixed_p): Ditto.
1418 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1419 (COFF_MAGIC): Delete.
1421 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1423 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1425 * po/POTFILES.in: Regenerated.
1427 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1429 * doc/as.texinfo: Mention that some .type syntaxes are not
1430 supported on all architectures.
1432 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1434 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1435 instructions when such transformations have been disabled.
1437 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1439 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1440 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1441 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1442 decoding the loop instructions. Remove current_offset variable.
1443 (xtensa_fix_short_loop_frags): Likewise.
1444 (min_bytes_to_other_loop_end): Remove current_offset argument.
1446 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1448 * config/tc-z80.c (z80_optimize_expr): Removed.
1449 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1451 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1453 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1454 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1455 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1456 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1457 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1458 at90can64, at90usb646, at90usb647, at90usb1286 and
1460 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1462 2006-04-07 Paul Brook <paul@codesourcery.com>
1464 * config/tc-arm.c (parse_operands): Set default error message.
1466 2006-04-07 Paul Brook <paul@codesourcery.com>
1468 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1470 2006-04-07 Paul Brook <paul@codesourcery.com>
1472 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1474 2006-04-07 Paul Brook <paul@codesourcery.com>
1476 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1477 (move_or_literal_pool): Handle Thumb-2 instructions.
1478 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1480 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1483 * config/tc-i386.c (match_template): Move 64-bit operand tests
1486 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1488 * po/Make-in: Add install-html target.
1489 * Makefile.am: Add install-html and install-html-recursive targets.
1490 * Makefile.in: Regenerate.
1491 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1492 * configure: Regenerate.
1493 * doc/Makefile.am: Add install-html and install-html-am targets.
1494 * doc/Makefile.in: Regenerate.
1496 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1498 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1501 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1502 Daniel Jacobowitz <dan@codesourcery.com>
1504 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1505 (GOTT_BASE, GOTT_INDEX): New.
1506 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1507 GOTT_INDEX when generating VxWorks PIC.
1508 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1509 use the generic *-*-vxworks* stanza instead.
1511 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1514 * frags.c (frag_offset_fixed_p): New function.
1515 * frags.h (frag_offset_fixed_p): Declare.
1516 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1517 (resolve_expression): Likewise.
1519 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1521 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1522 of the same length but different numbers of slots.
1524 2006-03-30 Andreas Schwab <schwab@suse.de>
1526 * configure.in: Fix help string for --enable-targets option.
1527 * configure: Regenerate.
1529 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1531 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1532 (m68k_ip): ... here. Use for all chips. Protect against buffer
1533 overrun and avoid excessive copying.
1535 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1536 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1537 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1538 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1539 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1540 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1541 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1542 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1543 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1544 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1545 (struct m68k_cpu): Change chip field to control_regs.
1546 (current_chip): Remove.
1547 (control_regs): New.
1548 (m68k_archs, m68k_extensions): Adjust.
1549 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1550 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1551 (find_cf_chip): Reimplement for new organization of cpu table.
1552 (select_control_regs): Remove.
1554 (struct save_opts): Save control regs, not chip.
1555 (s_save, s_restore): Adjust.
1556 (m68k_lookup_cpu): Give deprecated warning when necessary.
1557 (m68k_init_arch): Adjust.
1558 (md_show_usage): Adjust for new cpu table organization.
1560 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1562 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1563 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1564 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1566 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1567 (any_gotrel): New rule.
1568 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1569 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1571 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1572 (bfin_pic_ptr): New function.
1573 (md_pseudo_table): Add it for ".picptr".
1574 (OPTION_FDPIC): New macro.
1575 (md_longopts): Add -mfdpic.
1576 (md_parse_option): Handle it.
1577 (md_begin): Set BFD flags.
1578 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1579 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1581 * Makefile.am (bfin-parse.o): Update dependencies.
1582 (DEPTC_bfin_elf): Likewise.
1583 * Makefile.in: Regenerate.
1585 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1587 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1588 mcfemac instead of mcfmac.
1590 2006-03-23 Michael Matz <matz@suse.de>
1592 * config/tc-i386.c (type_names): Correct placement of 'static'.
1593 (reloc): Map some more relocs to their 64 bit counterpart when
1595 (output_insn): Work around breakage if DEBUG386 is defined.
1596 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1597 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1598 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1599 different from i386.
1600 (output_imm): Ditto.
1601 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1603 (md_convert_frag): Jumps can now be larger than 2GB away, error
1605 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1606 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1608 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1609 Daniel Jacobowitz <dan@codesourcery.com>
1610 Phil Edwards <phil@codesourcery.com>
1611 Zack Weinberg <zack@codesourcery.com>
1612 Mark Mitchell <mark@codesourcery.com>
1613 Nathan Sidwell <nathan@codesourcery.com>
1615 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1616 (md_begin): Complain about -G being used for PIC. Don't change
1617 the text, data and bss alignments on VxWorks.
1618 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1619 generating VxWorks PIC.
1620 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1621 (macro): Likewise, but do not treat la $25 specially for
1622 VxWorks PIC, and do not handle jal.
1623 (OPTION_MVXWORKS_PIC): New macro.
1624 (md_longopts): Add -mvxworks-pic.
1625 (md_parse_option): Don't complain about using PIC and -G together here.
1626 Handle OPTION_MVXWORKS_PIC.
1627 (md_estimate_size_before_relax): Always use the first relaxation
1628 sequence on VxWorks.
1629 * config/tc-mips.h (VXWORKS_PIC): New.
1631 2006-03-21 Paul Brook <paul@codesourcery.com>
1633 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1635 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1637 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1638 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1639 (get_loop_align_size): New.
1640 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1641 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1642 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1643 (get_noop_aligned_address): Use get_loop_align_size.
1644 (get_aligned_diff): Likewise.
1646 2006-03-21 Paul Brook <paul@codesourcery.com>
1648 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1650 2006-03-20 Paul Brook <paul@codesourcery.com>
1652 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1653 (do_t_branch): Encode branches inside IT blocks as unconditional.
1654 (do_t_cps): New function.
1655 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1656 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1657 (opcode_lookup): Allow conditional suffixes on all instructions in
1659 (md_assemble): Advance condexec state before checking for errors.
1660 (insns): Use do_t_cps.
1662 2006-03-20 Paul Brook <paul@codesourcery.com>
1664 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1665 outputting the insn.
1667 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1669 * config/tc-vax.c: Update copyright year.
1670 * config/tc-vax.h: Likewise.
1672 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1674 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1676 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1678 2006-03-17 Paul Brook <paul@codesourcery.com>
1680 * config/tc-arm.c (insns): Add ldm and stm.
1682 2006-03-17 Ben Elliston <bje@au.ibm.com>
1685 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1687 2006-03-16 Paul Brook <paul@codesourcery.com>
1689 * config/tc-arm.c (insns): Add "svc".
1691 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1693 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1694 flag and avoid double underscore prefixes.
1696 2006-03-10 Paul Brook <paul@codesourcery.com>
1698 * config/tc-arm.c (md_begin): Handle EABIv5.
1699 (arm_eabis): Add EF_ARM_EABI_VER5.
1700 * doc/c-arm.texi: Document -meabi=5.
1702 2006-03-10 Ben Elliston <bje@au.ibm.com>
1704 * app.c (do_scrub_chars): Simplify string handling.
1706 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1707 Daniel Jacobowitz <dan@codesourcery.com>
1708 Zack Weinberg <zack@codesourcery.com>
1709 Nathan Sidwell <nathan@codesourcery.com>
1710 Paul Brook <paul@codesourcery.com>
1711 Ricardo Anguiano <anguiano@codesourcery.com>
1712 Phil Edwards <phil@codesourcery.com>
1714 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1715 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1717 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1718 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1719 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1721 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1723 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1724 even when using the text-section-literals option.
1726 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1728 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1730 (m68k_ip): <case 'J'> Check we have some control regs.
1731 (md_parse_option): Allow raw arch switch.
1732 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1733 whether 68881 or cfloat was meant by -mfloat.
1734 (md_show_usage): Adjust extension display.
1735 (m68k_elf_final_processing): Adjust.
1737 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1739 * config/tc-avr.c (avr_mod_hash_value): New function.
1740 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1741 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1742 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1743 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1745 (tc_gen_reloc): Handle substractions of symbols, if possible do
1746 fixups, abort otherwise.
1747 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1748 tc_fix_adjustable): Define.
1750 2006-03-02 James E Wilson <wilson@specifix.com>
1752 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1753 change the template, then clear md.slot[curr].end_of_insn_group.
1755 2006-02-28 Jan Beulich <jbeulich@novell.com>
1757 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1759 2006-02-28 Jan Beulich <jbeulich@novell.com>
1762 * macro.c (getstring): Don't treat parentheses special anymore.
1763 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1764 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1767 2006-02-28 Mat <mat@csail.mit.edu>
1769 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1771 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1773 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1775 (CFI_signal_frame): Define.
1776 (cfi_pseudo_table): Add .cfi_signal_frame.
1777 (dot_cfi): Handle CFI_signal_frame.
1778 (output_cie): Handle cie->signal_frame.
1779 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1780 different. Copy signal_frame from FDE to newly created CIE.
1781 * doc/as.texinfo: Document .cfi_signal_frame.
1783 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1785 * doc/Makefile.am: Add html target.
1786 * doc/Makefile.in: Regenerate.
1787 * po/Make-in: Add html target.
1789 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1791 * config/tc-i386.c (output_insn): Support Intel Merom New
1794 * config/tc-i386.h (CpuMNI): New.
1795 (CpuUnknownFlags): Add CpuMNI.
1797 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1799 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1800 (hpriv_reg_table): New table for hyperprivileged registers.
1801 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1804 2006-02-24 DJ Delorie <dj@redhat.com>
1806 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1807 (tc_gen_reloc): Don't define.
1808 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1809 (OPTION_LINKRELAX): New.
1810 (md_longopts): Add it.
1812 (md_parse_options): Set it.
1813 (md_assemble): Emit relaxation relocs as needed.
1814 (md_convert_frag): Emit relaxation relocs as needed.
1815 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1816 (m32c_apply_fix): New.
1817 (tc_gen_reloc): New.
1818 (m32c_force_relocation): Force out jump relocs when relaxing.
1819 (m32c_fix_adjustable): Return false if relaxing.
1821 2006-02-24 Paul Brook <paul@codesourcery.com>
1823 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1824 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1825 (struct asm_barrier_opt): Define.
1826 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1827 (parse_psr): Accept V7M psr names.
1828 (parse_barrier): New function.
1829 (enum operand_parse_code): Add OP_oBARRIER.
1830 (parse_operands): Implement OP_oBARRIER.
1831 (do_barrier): New function.
1832 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1833 (do_t_cpsi): Add V7M restrictions.
1834 (do_t_mrs, do_t_msr): Validate V7M variants.
1835 (md_assemble): Check for NULL variants.
1836 (v7m_psrs, barrier_opt_names): New tables.
1837 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1838 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1839 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1840 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1841 (struct cpu_arch_ver_table): Define.
1842 (cpu_arch_ver): New.
1843 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1844 Tag_CPU_arch_profile.
1845 * doc/c-arm.texi: Document new cpu and arch options.
1847 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1849 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1851 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1853 * config/tc-ia64.c: Update copyright years.
1855 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1857 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1860 2005-02-22 Paul Brook <paul@codesourcery.com>
1862 * config/tc-arm.c (do_pld): Remove incorrect write to
1864 (encode_thumb32_addr_mode): Use correct operand.
1866 2006-02-21 Paul Brook <paul@codesourcery.com>
1868 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1870 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1871 Anil Paranjape <anilp1@kpitcummins.com>
1872 Shilin Shakti <shilins@kpitcummins.com>
1874 * Makefile.am: Add xc16x related entry.
1875 * Makefile.in: Regenerate.
1876 * configure.in: Added xc16x related entry.
1877 * configure: Regenerate.
1878 * config/tc-xc16x.h: New file
1879 * config/tc-xc16x.c: New file
1880 * doc/c-xc16x.texi: New file for xc16x
1881 * doc/all.texi: Entry for xc16x
1882 * doc/Makefile.texi: Added c-xc16x.texi
1883 * NEWS: Announce the support for the new target.
1885 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1887 * configure.tgt: set emulation for mips-*-netbsd*
1889 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1891 * config.in: Rebuilt.
1893 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1895 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1896 from 1, not 0, in error messages.
1897 (md_assemble): Simplify special-case check for ENTRY instructions.
1898 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1899 operand in error message.
1901 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1903 * configure.tgt (arm-*-linux-gnueabi*): Change to
1906 2006-02-10 Nick Clifton <nickc@redhat.com>
1908 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1909 32-bit value is propagated into the upper bits of a 64-bit long.
1911 * config/tc-arc.c (init_opcode_tables): Fix cast.
1912 (arc_extoper, md_operand): Likewise.
1914 2006-02-09 David Heine <dlheine@tensilica.com>
1916 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1917 each relaxation step.
1919 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1921 * configure.in (CHECK_DECLS): Add vsnprintf.
1922 * configure: Regenerate.
1923 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1924 include/declare here, but...
1925 * as.h: Move code detecting VARARGS idiom to the top.
1926 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1927 (vsnprintf): Declare if not already declared.
1929 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1931 * as.c (close_output_file): New.
1932 (main): Register close_output_file with xatexit before
1933 dump_statistics. Don't call output_file_close.
1935 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1937 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1938 mcf5329_control_regs): New.
1939 (not_current_architecture, selected_arch, selected_cpu): New.
1940 (m68k_archs, m68k_extensions): New.
1941 (archs): Renamed to ...
1942 (m68k_cpus): ... here. Adjust.
1944 (md_pseudo_table): Add arch and cpu directives.
1945 (find_cf_chip, m68k_ip): Adjust table scanning.
1946 (no_68851, no_68881): Remove.
1947 (md_assemble): Lazily initialize.
1948 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1949 (md_init_after_args): Move functionality to m68k_init_arch.
1950 (mri_chip): Adjust table scanning.
1951 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1952 options with saner parsing.
1953 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1954 m68k_init_arch): New.
1955 (s_m68k_cpu, s_m68k_arch): New.
1956 (md_show_usage): Adjust.
1957 (m68k_elf_final_processing): Set CF EF flags.
1958 * config/tc-m68k.h (m68k_init_after_args): Remove.
1959 (tc_init_after_args): Remove.
1960 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1961 (M68k-Directives): Document .arch and .cpu directives.
1963 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1965 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1966 synonyms for equ and defl.
1967 (z80_cons_fix_new): New function.
1968 (emit_byte): Disallow relative jumps to absolute locations.
1969 (emit_data): Only handle defb, prototype changed, because defb is
1970 now handled as pseudo-op rather than an instruction.
1971 (instab): Entries for defb,defw,db,dw moved from here...
1972 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1973 Add entries for def24,def32,d24,d32.
1974 (md_assemble): Improved error handling.
1975 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1976 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1977 (z80_cons_fix_new): Declare.
1978 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1979 (def24,d24,def32,d32): New pseudo-ops.
1981 2006-02-02 Paul Brook <paul@codesourcery.com>
1983 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1985 2005-02-02 Paul Brook <paul@codesourcery.com>
1987 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1988 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1989 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1990 T2_OPCODE_RSB): Define.
1991 (thumb32_negate_data_op): New function.
1992 (md_apply_fix): Use it.
1994 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1996 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1998 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1999 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2001 (relaxation_requirements): Add pfinish_frag argument and use it to
2002 replace setting tinsn->record_fix fields.
2003 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2004 and vinsn_to_insnbuf. Remove references to record_fix and
2005 slot_sub_symbols fields.
2006 (xtensa_mark_narrow_branches): Delete unused code.
2007 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2009 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2011 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2012 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2013 of the record_fix field. Simplify error messages for unexpected
2015 (set_expr_symbol_offset_diff): Delete.
2017 2006-01-31 Paul Brook <paul@codesourcery.com>
2019 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2021 2006-01-31 Paul Brook <paul@codesourcery.com>
2022 Richard Earnshaw <rearnsha@arm.com>
2024 * config/tc-arm.c: Use arm_feature_set.
2025 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2026 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2027 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2030 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2031 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2032 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2033 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2035 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2036 (arm_opts): Move old cpu/arch options from here...
2037 (arm_legacy_opts): ... to here.
2038 (md_parse_option): Search arm_legacy_opts.
2039 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2040 (arm_float_abis, arm_eabis): Make const.
2042 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2044 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2046 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2048 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2049 in load immediate intruction.
2051 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2053 * config/bfin-parse.y (value_match): Use correct conversion
2054 specifications in template string for __FILE__ and __LINE__.
2058 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2060 Introduce TLS descriptors for i386 and x86_64.
2061 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2062 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2063 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2064 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2065 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2067 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2068 (lex_got): Handle @tlsdesc and @tlscall.
2069 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2071 2006-01-11 Nick Clifton <nickc@redhat.com>
2073 Fixes for building on 64-bit hosts:
2074 * config/tc-avr.c (mod_index): New union to allow conversion
2075 between pointers and integers.
2076 (md_begin, avr_ldi_expression): Use it.
2077 * config/tc-i370.c (md_assemble): Add cast for argument to print
2079 * config/tc-tic54x.c (subsym_substitute): Likewise.
2080 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2081 opindex field of fr_cgen structure into a pointer so that it can
2082 be stored in a frag.
2083 * config/tc-mn10300.c (md_assemble): Likewise.
2084 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2086 * config/tc-v850.c: Replace uses of (int) casts with correct
2089 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2092 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2094 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2097 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2098 a local-label reference.
2100 For older changes see ChangeLog-2005
2106 version-control: never