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* config/tc-ppc.c (md_section_align): Don't round up address for ELF.
[thirdparty/binutils-gdb.git] / gas / ChangeLog
1 2006-09-22 Alan Modra <amodra@bigpond.net.au>
2
3 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
4 (ppc_handle_align): New function.
5 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
6 (SUB_SEGMENT_ALIGN): Define as zero.
7
8 2006-09-20 Bob Wilson <bob.wilson@acm.org>
9
10 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
11 (Overview): Skip cross reference in man page.
12
13 2006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
14
15 * configure.in: Add new target x86_64-pc-mingw64.
16 * configure: Regenerate.
17 * configure.tgt: Add new target x86_64-pc-mingw64.
18 * config/obj-coff.h: Add handling for TE_PEP target specific code and definitions.
19 * config/tc-i386.c: Add new targets.
20 (md_parse_option): Add targets to OPTION_64.
21 (x86_64_target_format): Add new method for setup proper default target cpu mode.
22 * config/te-pep.h: Add new target definition header.
23 (TE_PEP): New macro: Identifies new target architecture.
24 (COFF_WITH_pex64): Set proper includes in bfd.
25 * NEWS: Mention new target.
26
27 2006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
28
29 * config/bfin-parse.y (binary): Change sub of const to add of negated
30 const.
31
32 2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
33
34 * config/tc-score.c: New file.
35 * config/tc-score.h: Newf file.
36 * configure.tgt: Add Score target.
37 * Makefile.am: Add Score files.
38 * Makefile.in: Regenerate.
39 * NEWS: Mention new target support.
40
41 2006-09-16 Paul Brook <paul@codesourcery.com>
42
43 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
44 * doc/c-arm.texi (movsp): Document offset argument.
45
46 2006-09-16 Paul Brook <paul@codesourcery.com>
47
48 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
49 unsigned int to avoid 64-bit host problems.
50
51 2006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
52
53 * config/bfin-parse.y (binary): Do some more constant folding for
54 additions.
55
56 2006-09-13 Jan Beulich <jbeulich@novell.com>
57
58 * input-file.c (input_file_give_next_buffer): Demote as_bad to
59 as_warn.
60
61 2006-09-13 Alan Modra <amodra@bigpond.net.au>
62
63 PR gas/3165
64 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
65 in parens.
66
67 2006-09-13 Alan Modra <amodra@bigpond.net.au>
68
69 * input-file.c (input_file_open): Replace as_perror with as_bad
70 so that gas exits with error on file errors. Correct error
71 message.
72 (input_file_get, input_file_give_next_buffer): Likewise.
73 * input-file.h: Update comment.
74
75 2006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
76
77 PR gas/3172
78 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
79 registers as a sub-class of wC registers.
80
81 2006-09-11 Alan Modra <amodra@bigpond.net.au>
82
83 PR gas/3165
84 * config/tc-mips.h (enum dwarf2_format): Forward declare.
85 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
86 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
87 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
88
89 2006-09-08 Nick Clifton <nickc@redhat.com>
90
91 PR gas/3129
92 * doc/as.texinfo (Macro): Improve documentation about separating
93 macro arguments from following text.
94
95 2006-09-08 Paul Brook <paul@codesourcery.com>
96
97 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
98
99 2006-09-07 Paul Brook <paul@codesourcery.com>
100
101 * config/tc-arm.c (parse_operands): Mark operand as present.
102
103 2006-09-04 Paul Brook <paul@codesourcery.com>
104
105 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
106 (do_neon_dyadic_if_i_d): Avoid setting U bit.
107 (do_neon_mac_maybe_scalar): Ditto.
108 (do_neon_dyadic_narrow): Force operand type to NT_integer.
109 (insns): Remove out of date comments.
110
111 2006-08-29 Nick Clifton <nickc@redhat.com>
112
113 * read.c (s_align): Initialize the 'stopc' variable to prevent
114 compiler complaints about it being used without being
115 initialized.
116 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
117 s_float_space, s_struct, cons_worker, equals): Likewise.
118
119 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
120
121 * ecoff.c (ecoff_directive_val): Fix message typo.
122 * config/tc-ns32k.c (convert_iif): Likewise.
123 * config/tc-sh64.c (shmedia_check_limits): Likewise.
124
125 2006-08-25 Sterling Augustine <sterling@tensilica.com>
126 Bob Wilson <bob.wilson@acm.org>
127
128 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
129 the state of the absolute_literals directive. Remove align frag at
130 the start of the literal pool position.
131
132 2006-08-25 Bob Wilson <bob.wilson@acm.org>
133
134 * doc/c-xtensa.texi: Add @group commands in examples.
135
136 2006-08-24 Bob Wilson <bob.wilson@acm.org>
137
138 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
139 (INIT_LITERAL_SECTION_NAME): Delete.
140 (lit_state struct): Remove segment names, init_lit_seg, and
141 fini_lit_seg. Add lit_prefix and current_text_seg.
142 (init_literal_head_h, init_literal_head): Delete.
143 (fini_literal_head_h, fini_literal_head): Delete.
144 (xtensa_begin_directive): Move argument parsing to
145 xtensa_literal_prefix function.
146 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
147 (xtensa_literal_prefix): Parse the directive argument here and
148 record it in the lit_prefix field. Remove code to derive literal
149 section names.
150 (linkonce_len): New.
151 (get_is_linkonce_section): Use linkonce_len. Check for any
152 ".gnu.linkonce.*" section, not just text sections.
153 (md_begin): Remove initialization of deleted lit_state fields.
154 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
155 to init_literal_head and fini_literal_head.
156 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
157 when traversing literal_head list.
158 (match_section_group): New.
159 (cache_literal_section): Rewrite to determine the literal section
160 name on the fly, create the section and return it.
161 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
162 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
163 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
164 Use xtensa_get_property_section from bfd.
165 (retrieve_xtensa_section): Delete.
166 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
167 description to refer to plural literal sections and add xref to
168 the Literal Directive section.
169 (Literal Directive): Describe new rules for deriving literal section
170 names. Add footnote for special case of .init/.fini with
171 --text-section-literals.
172 (Literal Prefix Directive): Replace old naming rules with xref to the
173 Literal Directive section.
174
175 2006-08-21 Joseph Myers <joseph@codesourcery.com>
176
177 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
178 merging with previous long opcode.
179
180 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
181
182 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
183 * Makefile.in: Regenerate.
184 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
185 renamed. Adjust.
186
187 2006-08-16 Julian Brown <julian@codesourcery.com>
188
189 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
190 to use ARM instructions on non-ARM-supporting cores.
191 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
192 mode automatically based on cpu variant.
193 (md_begin): Call above function.
194
195 2006-08-16 Julian Brown <julian@codesourcery.com>
196
197 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
198 recognized in non-unified syntax mode.
199
200 2006-08-15 Thiemo Seufer <ths@mips.com>
201 Nigel Stephens <nigel@mips.com>
202 David Ung <davidu@mips.com>
203
204 * configure.tgt: Handle mips*-sde-elf*.
205
206 2006-08-12 Thiemo Seufer <ths@networkno.de>
207
208 * config/tc-mips.c (mips16_ip): Fix argument register handling
209 for restore instruction.
210
211 2006-08-08 Bob Wilson <bob.wilson@acm.org>
212
213 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
214 (out_sleb128): New.
215 (out_fixed_inc_line_addr): New.
216 (process_entries): Use out_fixed_inc_line_addr when
217 DWARF2_USE_FIXED_ADVANCE_PC is set.
218 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
219
220 2006-08-08 DJ Delorie <dj@redhat.com>
221
222 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
223 vs full symbols so that we never have more than one pointer value
224 for any given symbol in our symbol table.
225
226 2006-08-08 Sterling Augustine <sterling@tensilica.com>
227
228 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
229 and emit DW_AT_ranges when code in compilation unit is not
230 contiguous.
231 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
232 is not contiguous.
233 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
234 (out_debug_ranges): New function to emit .debug_ranges section
235 when code is not contiguous.
236
237 2006-08-08 Nick Clifton <nickc@redhat.com>
238
239 * config/tc-arm.c (WARN_DEPRECATED): Enable.
240
241 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
242
243 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
244 only block.
245 (pe_directive_secrel) [TE_PE]: New function.
246 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
247 loc, loc_mark_labels.
248 [TE_PE]: Handle secrel32.
249 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
250 call.
251 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
252 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
253 (md_section_align): Only round section sizes here for AOUT
254 targets.
255 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
256 (tc_pe_dwarf2_emit_offset): New function.
257 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
258 (cons_fix_new_arm): Handle O_secrel.
259 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
260 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
261 of OBJ_ELF only block.
262 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
263 tc_pe_dwarf2_emit_offset.
264
265 2006-08-04 Richard Sandiford <richard@codesourcery.com>
266
267 * config/tc-sh.c (apply_full_field_fix): New function.
268 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
269 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
270 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
271 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
272
273 2006-08-03 Nick Clifton <nickc@redhat.com>
274
275 PR gas/2991
276 * config.in: Regenerate.
277
278 2006-08-03 Joseph Myers <joseph@codesourcery.com>
279
280 * config/tc-arm.c (parse_operands): Handle invalid register name
281 for OP_RIWR_RIWC.
282
283 2006-08-03 Joseph Myers <joseph@codesourcery.com>
284
285 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
286 (parse_operands): Handle it.
287 (insns): Use it for tmcr and tmrc.
288
289 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
290
291 PR binutils/2983
292 * config/tc-i386.c (md_parse_option): Treat any target starting
293 with elf64_x86_64 as a viable target for the -64 switch.
294 (i386_target_format): For 64-bit ELF flavoured output use
295 ELF_TARGET_FORMAT64.
296 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
297
298 2006-08-02 Nick Clifton <nickc@redhat.com>
299
300 PR gas/2991
301 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
302 bfd/aclocal.m4.
303 * configure.in: Run BFD_BINARY_FOPEN.
304 * configure: Regenerate.
305 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
306 file to include.
307
308 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
309
310 * config/tc-i386.c (md_assemble): Don't update
311 cpu_arch_isa_flags.
312
313 2006-08-01 Thiemo Seufer <ths@mips.com>
314
315 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
316
317 2006-08-01 Thiemo Seufer <ths@mips.com>
318
319 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
320 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
321 BFD_RELOC_32 and BFD_RELOC_16.
322 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
323 md_convert_frag, md_obj_end): Fix comment formatting.
324
325 2006-07-31 Thiemo Seufer <ths@mips.com>
326
327 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
328 handling for BFD_RELOC_MIPS16_JMP.
329
330 2006-07-24 Andreas Schwab <schwab@suse.de>
331
332 PR/2756
333 * read.c (read_a_source_file): Ignore unknown text after line
334 comment character. Fix misleading comment.
335
336 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
337
338 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
339 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
340 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
341 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
342 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
343 doc/c-z80.texi, doc/internals.texi: Fix some typos.
344
345 2006-07-21 Nick Clifton <nickc@redhat.com>
346
347 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
348 linker testsuite.
349
350 2006-07-20 Thiemo Seufer <ths@mips.com>
351 Nigel Stephens <nigel@mips.com>
352
353 * config/tc-mips.c (md_parse_option): Don't infer optimisation
354 options from debug options.
355
356 2006-07-20 Thiemo Seufer <ths@mips.com>
357
358 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
359 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
360
361 2006-07-19 Paul Brook <paul@codesourcery.com>
362
363 * config/tc-arm.c (insns): Fix rbit Arm opcode.
364
365 2006-07-18 Paul Brook <paul@codesourcery.com>
366
367 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
368 (md_convert_frag): Use correct reloc for add_pc. Use
369 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
370 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
371 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
372
373 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
374
375 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
376 when file and line unknown.
377
378 2006-07-17 Thiemo Seufer <ths@mips.com>
379
380 * read.c (s_struct): Use IS_ELF.
381 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
382 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
383 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
384 s_mips_mask): Likewise.
385
386 2006-07-16 Thiemo Seufer <ths@mips.com>
387 David Ung <davidu@mips.com>
388
389 * read.c (s_struct): Handle ELF section changing.
390 * config/tc-mips.c (s_align): Leave enabling auto-align to the
391 generic code.
392 (s_change_sec): Try section changing only if we output ELF.
393
394 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
395
396 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
397 CpuAmdFam10.
398 (smallest_imm_type): Remove Cpu086.
399 (i386_target_format): Likewise.
400
401 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
402 Update CpuXXX.
403
404 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
405 Michael Meissner <michael.meissner@amd.com>
406
407 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
408 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
409 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
410 architecture.
411 (i386_align_code): Ditto.
412 (md_assemble_code): Add support for insertq/extrq instructions,
413 swapping as needed for intel syntax.
414 (swap_imm_operands): New function to swap immediate operands.
415 (swap_operands): Deal with 4 operand instructions.
416 (build_modrm_byte): Add support for insertq instruction.
417
418 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
419
420 * config/tc-i386.h (Size64): Fix a typo in comment.
421
422 2006-07-12 Nick Clifton <nickc@redhat.com>
423
424 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
425 fixup_segment() to repeat a range check on a value that has
426 already been checked here.
427
428 2006-07-07 James E Wilson <wilson@specifix.com>
429
430 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
431
432 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
433 Nick Clifton <nickc@redhat.com>
434
435 PR binutils/2877
436 * doc/as.texi: Fix spelling typo: branchs => branches.
437 * doc/c-m68hc11.texi: Likewise.
438 * config/tc-m68hc11.c: Likewise.
439 Support old spelling of command line switch for backwards
440 compatibility.
441
442 2006-07-04 Thiemo Seufer <ths@mips.com>
443 David Ung <davidu@mips.com>
444
445 * config/tc-mips.c (s_is_linkonce): New function.
446 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
447 weak, external, and linkonce symbols.
448 (pic_need_relax): Use s_is_linkonce.
449
450 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
451
452 * doc/as.texinfo (Org): Remove space.
453 (P2align): Add "@var{abs-expr},".
454
455 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
456
457 * config/tc-i386.c (cpu_arch_tune_set): New.
458 (cpu_arch_isa): Likewise.
459 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
460 nops with short or long nop sequences based on -march=/.arch
461 and -mtune=.
462 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
463 set cpu_arch_tune and cpu_arch_tune_flags.
464 (md_parse_option): For -march=, set cpu_arch_isa and set
465 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
466 0. Set cpu_arch_tune_set to 1 for -mtune=.
467 (i386_target_format): Don't set cpu_arch_tune.
468
469 2006-06-23 Nigel Stephens <nigel@mips.com>
470
471 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
472 generated .sbss.* and .gnu.linkonce.sb.*.
473
474 2006-06-23 Thiemo Seufer <ths@mips.com>
475 David Ung <davidu@mips.com>
476
477 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
478 label_list.
479 * config/tc-mips.c (label_list): Define per-segment label_list.
480 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
481 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
482 mips_from_file_after_relocs, mips_define_label): Use per-segment
483 label_list.
484
485 2006-06-22 Thiemo Seufer <ths@mips.com>
486
487 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
488 (append_insn): Use it.
489 (md_apply_fix): Whitespace formatting.
490 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
491 mips16_extended_frag): Remove register specifier.
492 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
493 constants.
494
495 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
496
497 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
498 a directive saving VFP registers for ARMv6 or later.
499 (s_arm_unwind_save): Add parameter arch_v6 and call
500 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
501 appropriate.
502 (md_pseudo_table): Add entry for new "vsave" directive.
503 * doc/c-arm.texi: Correct error in example for "save"
504 directive (fstmdf -> fstmdx). Also document "vsave" directive.
505
506 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
507 Anatoly Sokolov <aesok@post.ru>
508
509 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
510 and atmega644p devices. Rename atmega164/atmega324 devices to
511 atmega164p/atmega324p.
512 * doc/c-avr.texi: Document new mcu and arch options.
513
514 2006-06-17 Nick Clifton <nickc@redhat.com>
515
516 * config/tc-arm.c (enum parse_operand_result): Move outside of
517 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
518
519 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
520
521 * config/tc-i386.h (processor_type): New.
522 (arch_entry): Add type.
523
524 * config/tc-i386.c (cpu_arch_tune): New.
525 (cpu_arch_tune_flags): Likewise.
526 (cpu_arch_isa_flags): Likewise.
527 (cpu_arch): Updated.
528 (set_cpu_arch): Also update cpu_arch_isa_flags.
529 (md_assemble): Update cpu_arch_isa_flags.
530 (OPTION_MARCH): New.
531 (OPTION_MTUNE): Likewise.
532 (md_longopts): Add -march= and -mtune=.
533 (md_parse_option): Support -march= and -mtune=.
534 (md_show_usage): Add -march=CPU/-mtune=CPU.
535 (i386_target_format): Also update cpu_arch_isa_flags,
536 cpu_arch_tune and cpu_arch_tune_flags.
537
538 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
539
540 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
541
542 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
543
544 * config/tc-arm.c (enum parse_operand_result): New.
545 (struct group_reloc_table_entry): New.
546 (enum group_reloc_type): New.
547 (group_reloc_table): New array.
548 (find_group_reloc_table_entry): New function.
549 (parse_shifter_operand_group_reloc): New function.
550 (parse_address_main): New function, incorporating code
551 from the old parse_address function. To be used via...
552 (parse_address): wrapper for parse_address_main; and
553 (parse_address_group_reloc): new function, likewise.
554 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
555 OP_ADDRGLDRS, OP_ADDRGLDC.
556 (parse_operands): Support for these new operand codes.
557 New macro po_misc_or_fail_no_backtrack.
558 (encode_arm_cp_address): Preserve group relocations.
559 (insns): Modify to use the above operand codes where group
560 relocations are permitted.
561 (md_apply_fix): Handle the group relocations
562 ALU_PC_G0_NC through LDC_SB_G2.
563 (tc_gen_reloc): Likewise.
564 (arm_force_relocation): Leave group relocations for the linker.
565 (arm_fix_adjustable): Likewise.
566
567 2006-06-15 Julian Brown <julian@codesourcery.com>
568
569 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
570 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
571 relocs properly.
572
573 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
574
575 * config/tc-i386.c (process_suffix): Don't add rex64 for
576 "xchg %rax,%rax".
577
578 2006-06-09 Thiemo Seufer <ths@mips.com>
579
580 * config/tc-mips.c (mips_ip): Maintain argument count.
581
582 2006-06-09 Alan Modra <amodra@bigpond.net.au>
583
584 * config/tc-iq2000.c: Include sb.h.
585
586 2006-06-08 Nigel Stephens <nigel@mips.com>
587
588 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
589 aliases for better compatibility with SGI tools.
590
591 2006-06-08 Alan Modra <amodra@bigpond.net.au>
592
593 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
594 * Makefile.am (GASLIBS): Expand @BFDLIB@.
595 (BFDVER_H): Delete.
596 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
597 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
598 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
599 Run "make dep-am".
600 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
601 * Makefile.in: Regenerate.
602 * doc/Makefile.in: Regenerate.
603 * configure: Regenerate.
604
605 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
606
607 * po/Make-in (pdf, ps): New dummy targets.
608
609 2006-06-07 Julian Brown <julian@codesourcery.com>
610
611 * config/tc-arm.c (stdarg.h): include.
612 (arm_it): Add uncond_value field. Add isvec and issingle to operand
613 array.
614 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
615 REG_TYPE_NSDQ (single, double or quad vector reg).
616 (reg_expected_msgs): Update.
617 (BAD_FPU): Add macro for unsupported FPU instruction error.
618 (parse_neon_type): Support 'd' as an alias for .f64.
619 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
620 sets of registers.
621 (parse_vfp_reg_list): Don't update first arg on error.
622 (parse_neon_mov): Support extra syntax for VFP moves.
623 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
624 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
625 (parse_operands): Support isvec, issingle operands fields, new parse
626 codes above.
627 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
628 msr variants.
629 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
630 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
631 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
632 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
633 shapes.
634 (neon_shape): Redefine in terms of above.
635 (neon_shape_class): New enumeration, table of shape classes.
636 (neon_shape_el): New enumeration. One element of a shape.
637 (neon_shape_el_size): Register widths of above, where appropriate.
638 (neon_shape_info): New struct. Info for shape table.
639 (neon_shape_tab): New array.
640 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
641 (neon_check_shape): Rewrite as...
642 (neon_select_shape): New function to classify instruction shapes,
643 driven by new table neon_shape_tab array.
644 (neon_quad): New function. Return 1 if shape should set Q flag in
645 instructions (or equivalent), 0 otherwise.
646 (type_chk_of_el_type): Support F64.
647 (el_type_of_type_chk): Likewise.
648 (neon_check_type): Add support for VFP type checking (VFP data
649 elements fill their containing registers).
650 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
651 in thumb mode for VFP instructions.
652 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
653 and encode the current instruction as if it were that opcode.
654 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
655 arguments, call function in PFN.
656 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
657 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
658 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
659 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
660 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
661 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
662 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
663 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
664 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
665 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
666 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
667 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
668 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
669 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
670 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
671 neon_quad.
672 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
673 between VFP and Neon turns out to belong to Neon. Perform
674 architecture check and fill in condition field if appropriate.
675 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
676 (do_neon_cvt): Add support for VFP variants of instructions.
677 (neon_cvt_flavour): Extend to cover VFP conversions.
678 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
679 vmov variants.
680 (do_neon_ldr_str): Handle single-precision VFP load/store.
681 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
682 NS_NULL not NS_IGNORE.
683 (opcode_tag): Add OT_csuffixF for operands which either take a
684 conditional suffix, or have 0xF in the condition field.
685 (md_assemble): Add support for OT_csuffixF.
686 (NCE): Replace macro with...
687 (NCE_tag, NCE, NCEF): New macros.
688 (nCE): Replace macro with...
689 (nCE_tag, nCE, nCEF): New macros.
690 (insns): Add support for VFP insns or VFP versions of insns msr,
691 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
692 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
693 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
694 VFP/Neon insns together.
695
696 2006-06-07 Alan Modra <amodra@bigpond.net.au>
697 Ladislav Michl <ladis@linux-mips.org>
698
699 * app.c: Don't include headers already included by as.h.
700 * as.c: Likewise.
701 * atof-generic.c: Likewise.
702 * cgen.c: Likewise.
703 * dwarf2dbg.c: Likewise.
704 * expr.c: Likewise.
705 * input-file.c: Likewise.
706 * input-scrub.c: Likewise.
707 * macro.c: Likewise.
708 * output-file.c: Likewise.
709 * read.c: Likewise.
710 * sb.c: Likewise.
711 * config/bfin-lex.l: Likewise.
712 * config/obj-coff.h: Likewise.
713 * config/obj-elf.h: Likewise.
714 * config/obj-som.h: Likewise.
715 * config/tc-arc.c: Likewise.
716 * config/tc-arm.c: Likewise.
717 * config/tc-avr.c: Likewise.
718 * config/tc-bfin.c: Likewise.
719 * config/tc-cris.c: Likewise.
720 * config/tc-d10v.c: Likewise.
721 * config/tc-d30v.c: Likewise.
722 * config/tc-dlx.h: Likewise.
723 * config/tc-fr30.c: Likewise.
724 * config/tc-frv.c: Likewise.
725 * config/tc-h8300.c: Likewise.
726 * config/tc-hppa.c: Likewise.
727 * config/tc-i370.c: Likewise.
728 * config/tc-i860.c: Likewise.
729 * config/tc-i960.c: Likewise.
730 * config/tc-ip2k.c: Likewise.
731 * config/tc-iq2000.c: Likewise.
732 * config/tc-m32c.c: Likewise.
733 * config/tc-m32r.c: Likewise.
734 * config/tc-maxq.c: Likewise.
735 * config/tc-mcore.c: Likewise.
736 * config/tc-mips.c: Likewise.
737 * config/tc-mmix.c: Likewise.
738 * config/tc-mn10200.c: Likewise.
739 * config/tc-mn10300.c: Likewise.
740 * config/tc-msp430.c: Likewise.
741 * config/tc-mt.c: Likewise.
742 * config/tc-ns32k.c: Likewise.
743 * config/tc-openrisc.c: Likewise.
744 * config/tc-ppc.c: Likewise.
745 * config/tc-s390.c: Likewise.
746 * config/tc-sh.c: Likewise.
747 * config/tc-sh64.c: Likewise.
748 * config/tc-sparc.c: Likewise.
749 * config/tc-tic30.c: Likewise.
750 * config/tc-tic4x.c: Likewise.
751 * config/tc-tic54x.c: Likewise.
752 * config/tc-v850.c: Likewise.
753 * config/tc-vax.c: Likewise.
754 * config/tc-xc16x.c: Likewise.
755 * config/tc-xstormy16.c: Likewise.
756 * config/tc-xtensa.c: Likewise.
757 * config/tc-z80.c: Likewise.
758 * config/tc-z8k.c: Likewise.
759 * macro.h: Don't include sb.h or ansidecl.h.
760 * sb.h: Don't include stdio.h or ansidecl.h.
761 * cond.c: Include sb.h.
762 * itbl-lex.l: Include as.h instead of other system headers.
763 * itbl-parse.y: Likewise.
764 * itbl-ops.c: Similarly.
765 * itbl-ops.h: Don't include as.h or ansidecl.h.
766 * config/bfin-defs.h: Don't include bfd.h or as.h.
767 * config/bfin-parse.y: Include as.h instead of other system headers.
768
769 2006-06-06 Ben Elliston <bje@au.ibm.com>
770 Anton Blanchard <anton@samba.org>
771
772 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
773 (md_show_usage): Document it.
774 (ppc_setup_opcodes): Test power6 opcode flag bits.
775 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
776
777 2006-06-06 Thiemo Seufer <ths@mips.com>
778 Chao-ying Fu <fu@mips.com>
779
780 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
781 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
782 (macro_build): Update comment.
783 (mips_ip): Allow DSP64 instructions for MIPS64R2.
784 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
785 CPU_HAS_MDMX.
786 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
787 MIPS_CPU_ASE_MDMX flags for sb1.
788
789 2006-06-05 Thiemo Seufer <ths@mips.com>
790
791 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
792 appropriate.
793 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
794 (mips_ip): Make overflowed/underflowed constant arguments in DSP
795 and MT instructions a fatal error. Use INSERT_OPERAND where
796 appropriate. Improve warnings for break and wait code overflows.
797 Use symbolic constant of OP_MASK_COPZ.
798 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
799
800 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
801
802 * po/Make-in (top_builddir): Define.
803
804 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
805
806 * doc/Makefile.am (TEXI2DVI): Define.
807 * doc/Makefile.in: Regenerate.
808 * doc/c-arc.texi: Fix typo.
809
810 2006-06-01 Alan Modra <amodra@bigpond.net.au>
811
812 * config/obj-ieee.c: Delete.
813 * config/obj-ieee.h: Delete.
814 * Makefile.am (OBJ_FORMATS): Remove ieee.
815 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
816 (obj-ieee.o): Remove rule.
817 * Makefile.in: Regenerate.
818 * configure.in (atof): Remove tahoe.
819 (OBJ_MAYBE_IEEE): Don't define.
820 * configure: Regenerate.
821 * config.in: Regenerate.
822 * doc/Makefile.in: Regenerate.
823 * po/POTFILES.in: Regenerate.
824
825 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
826
827 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
828 and LIBINTL_DEP everywhere.
829 (INTLLIBS): Remove.
830 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
831 * acinclude.m4: Include new gettext macros.
832 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
833 Remove local code for po/Makefile.
834 * Makefile.in, configure, doc/Makefile.in: Regenerated.
835
836 2006-05-30 Nick Clifton <nickc@redhat.com>
837
838 * po/es.po: Updated Spanish translation.
839
840 2006-05-06 Denis Chertykov <denisc@overta.ru>
841
842 * doc/c-avr.texi: New file.
843 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
844 * doc/all.texi: Set AVR
845 * doc/as.texinfo: Include c-avr.texi
846
847 2006-05-28 Jie Zhang <jie.zhang@analog.com>
848
849 * config/bfin-parse.y (check_macfunc): Loose the condition of
850 calling check_multiply_halfregs ().
851
852 2006-05-25 Jie Zhang <jie.zhang@analog.com>
853
854 * config/bfin-parse.y (asm_1): Better check and deal with
855 vector and scalar Multiply 16-Bit Operands instructions.
856
857 2006-05-24 Nick Clifton <nickc@redhat.com>
858
859 * config/tc-hppa.c: Convert to ISO C90 format.
860 * config/tc-hppa.h: Likewise.
861
862 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
863 Randolph Chung <randolph@tausq.org>
864
865 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
866 is_tls_ieoff, is_tls_leoff): Define.
867 (fix_new_hppa): Handle TLS.
868 (cons_fix_new_hppa): Likewise.
869 (pa_ip): Likewise.
870 (md_apply_fix): Handle TLS relocs.
871 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
872
873 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
874
875 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
876
877 2006-05-23 Thiemo Seufer <ths@mips.com>
878 David Ung <davidu@mips.com>
879 Nigel Stephens <nigel@mips.com>
880
881 [ gas/ChangeLog ]
882 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
883 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
884 ISA_HAS_MXHC1): New macros.
885 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
886 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
887 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
888 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
889 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
890 (mips_after_parse_args): Change default handling of float register
891 size to account for 32bit code with 64bit FP. Better sanity checking
892 of ISA/ASE/ABI option combinations.
893 (s_mipsset): Support switching of GPR and FPR sizes via
894 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
895 options.
896 (mips_elf_final_processing): We should record the use of 64bit FP
897 registers in 32bit code but we don't, because ELF header flags are
898 a scarce ressource.
899 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
900 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
901 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
902 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
903 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
904 missing -march options. Document .set arch=CPU. Move .set smartmips
905 to ASE page. Use @code for .set FOO examples.
906
907 2006-05-23 Jie Zhang <jie.zhang@analog.com>
908
909 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
910 if needed.
911
912 2006-05-23 Jie Zhang <jie.zhang@analog.com>
913
914 * config/bfin-defs.h (bfin_equals): Remove declaration.
915 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
916 * config/tc-bfin.c (bfin_name_is_register): Remove.
917 (bfin_equals): Remove.
918 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
919 (bfin_name_is_register): Remove declaration.
920
921 2006-05-19 Thiemo Seufer <ths@mips.com>
922 Nigel Stephens <nigel@mips.com>
923
924 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
925 (mips_oddfpreg_ok): New function.
926 (mips_ip): Use it.
927
928 2006-05-19 Thiemo Seufer <ths@mips.com>
929 David Ung <davidu@mips.com>
930
931 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
932 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
933 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
934 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
935 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
936 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
937 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
938 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
939 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
940 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
941 reg_names_o32, reg_names_n32n64): Define register classes.
942 (reg_lookup): New function, use register classes.
943 (md_begin): Reserve register names in the symbol table. Simplify
944 OBJ_ELF defines.
945 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
946 Use reg_lookup.
947 (mips16_ip): Use reg_lookup.
948 (tc_get_register): Likewise.
949 (tc_mips_regname_to_dw2regnum): New function.
950
951 2006-05-19 Thiemo Seufer <ths@mips.com>
952
953 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
954 Un-constify string argument.
955 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
956 Likewise.
957 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
958 Likewise.
959 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
960 Likewise.
961 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
962 Likewise.
963 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
964 Likewise.
965 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
966 Likewise.
967
968 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
969
970 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
971 cfloat/m68881 to correct architecture before using it.
972
973 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
974
975 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
976 constant values.
977
978 2006-05-15 Paul Brook <paul@codesourcery.com>
979
980 * config/tc-arm.c (arm_adjust_symtab): Use
981 bfd_is_arm_special_symbol_name.
982
983 2006-05-15 Bob Wilson <bob.wilson@acm.org>
984
985 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
986 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
987 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
988 Handle errors from calls to xtensa_opcode_is_* functions.
989
990 2006-05-14 Thiemo Seufer <ths@mips.com>
991
992 * config/tc-mips.c (macro_build): Test for currently active
993 mips16 option.
994 (mips16_ip): Reject invalid opcodes.
995
996 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
997
998 * doc/as.texinfo: Rename "Index" to "AS Index",
999 and "ABORT" to "ABORT (COFF)".
1000
1001 2006-05-11 Paul Brook <paul@codesourcery.com>
1002
1003 * config/tc-arm.c (parse_half): New function.
1004 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1005 (parse_operands): Ditto.
1006 (do_mov16): Reject invalid relocations.
1007 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1008 (insns): Replace Iffff with HALF.
1009 (md_apply_fix): Add MOVW and MOVT relocs.
1010 (tc_gen_reloc): Ditto.
1011 * doc/c-arm.texi: Document relocation operators
1012
1013 2006-05-11 Paul Brook <paul@codesourcery.com>
1014
1015 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1016
1017 2006-05-11 Thiemo Seufer <ths@mips.com>
1018
1019 * config/tc-mips.c (append_insn): Don't check the range of j or
1020 jal addresses.
1021
1022 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1023
1024 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
1025 relocs against external symbols for WinCE targets.
1026 (md_apply_fix): Likewise.
1027
1028 2006-05-09 David Ung <davidu@mips.com>
1029
1030 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1031 j or jal address.
1032
1033 2006-05-09 Nick Clifton <nickc@redhat.com>
1034
1035 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1036 against symbols which are not going to be placed into the symbol
1037 table.
1038
1039 2006-05-09 Ben Elliston <bje@au.ibm.com>
1040
1041 * expr.c (operand): Remove `if (0 && ..)' statement and
1042 subsequently unused target_op label. Collapse `if (1 || ..)'
1043 statement.
1044 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1045 separately above the switch.
1046
1047 2006-05-08 Nick Clifton <nickc@redhat.com>
1048
1049 PR gas/2623
1050 * config/tc-msp430.c (line_separator_character): Define as |.
1051
1052 2006-05-08 Thiemo Seufer <ths@mips.com>
1053 Nigel Stephens <nigel@mips.com>
1054 David Ung <davidu@mips.com>
1055
1056 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1057 (mips_opts): Likewise.
1058 (file_ase_smartmips): New variable.
1059 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1060 (macro_build): Handle SmartMIPS instructions.
1061 (mips_ip): Likewise.
1062 (md_longopts): Add argument handling for smartmips.
1063 (md_parse_options, mips_after_parse_args): Likewise.
1064 (s_mipsset): Add .set smartmips support.
1065 (md_show_usage): Document -msmartmips/-mno-smartmips.
1066 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1067 .set smartmips.
1068 * doc/c-mips.texi: Likewise.
1069
1070 2006-05-08 Alan Modra <amodra@bigpond.net.au>
1071
1072 * write.c (relax_segment): Add pass count arg. Don't error on
1073 negative org/space on first two passes.
1074 (relax_seg_info): New struct.
1075 (relax_seg, write_object_file): Adjust.
1076 * write.h (relax_segment): Update prototype.
1077
1078 2006-05-05 Julian Brown <julian@codesourcery.com>
1079
1080 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1081 checking.
1082 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1083 architecture version checks.
1084 (insns): Allow overlapping instructions to be used in VFP mode.
1085
1086 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1087
1088 PR gas/2598
1089 * config/obj-elf.c (obj_elf_change_section): Allow user
1090 specified SHF_ALPHA_GPREL.
1091
1092 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1093
1094 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1095 for PMEM related expressions.
1096
1097 2006-05-05 Nick Clifton <nickc@redhat.com>
1098
1099 PR gas/2582
1100 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1101 insertion of a directory separator character into a string at a
1102 given offset. Uses heuristics to decide when to use a backslash
1103 character rather than a forward-slash character.
1104 (dwarf2_directive_loc): Use the macro.
1105 (out_debug_info): Likewise.
1106
1107 2006-05-05 Thiemo Seufer <ths@mips.com>
1108 David Ung <davidu@mips.com>
1109
1110 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1111 instruction.
1112 (macro): Add new case M_CACHE_AB.
1113
1114 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1115
1116 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1117 (opcode_lookup): Issue a warning for opcode with
1118 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1119 identical to OT_cinfix3.
1120 (TxC3w, TC3w, tC3w): New.
1121 (insns): Use tC3w and TC3w for comparison instructions with
1122 's' suffix.
1123
1124 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1125
1126 * subsegs.h (struct frchain): Delete frch_seg.
1127 (frchain_root): Delete.
1128 (seg_info): Define as macro.
1129 * subsegs.c (frchain_root): Delete.
1130 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1131 (subsegs_begin, subseg_change): Adjust for above.
1132 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1133 rather than to one big list.
1134 (subseg_get): Don't special case abs, und sections.
1135 (subseg_new, subseg_force_new): Don't set frchainP here.
1136 (seg_info): Delete.
1137 (subsegs_print_statistics): Adjust frag chain control list traversal.
1138 * debug.c (dmp_frags): Likewise.
1139 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1140 at frchain_root. Make use of known frchain ordering.
1141 (last_frag_for_seg): Likewise.
1142 (get_frag_fix): Likewise. Add seg param.
1143 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1144 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1145 (SUB_SEGMENT_ALIGN): Likewise.
1146 (subsegs_finish): Adjust frchain list traversal.
1147 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1148 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1149 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1150 (xtensa_fix_b_j_loop_end_frags): Likewise.
1151 (xtensa_fix_close_loop_end_frags): Likewise.
1152 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1153 (retrieve_segment_info): Delete frch_seg initialisation.
1154
1155 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1156
1157 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1158 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1159 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1160 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1161
1162 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1163
1164 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1165 here.
1166 (md_apply_fix3): Multiply offset by 4 here for
1167 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1168
1169 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1170 Jan Beulich <jbeulich@novell.com>
1171
1172 * config/tc-i386.c (output_invalid_buf): Change size for
1173 unsigned char.
1174 * config/tc-tic30.c (output_invalid_buf): Likewise.
1175
1176 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1177 unsigned char.
1178 * config/tc-tic30.c (output_invalid): Likewise.
1179
1180 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1181
1182 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1183 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1184 (asconfig.texi): Don't set top_srcdir.
1185 * doc/as.texinfo: Don't use top_srcdir.
1186 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1187
1188 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1189
1190 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1191 * config/tc-tic30.c (output_invalid_buf): Likewise.
1192
1193 * config/tc-i386.c (output_invalid): Use snprintf instead of
1194 sprintf.
1195 * config/tc-ia64.c (declare_register_set): Likewise.
1196 (emit_one_bundle): Likewise.
1197 (check_dependencies): Likewise.
1198 * config/tc-tic30.c (output_invalid): Likewise.
1199
1200 2006-05-02 Paul Brook <paul@codesourcery.com>
1201
1202 * config/tc-arm.c (arm_optimize_expr): New function.
1203 * config/tc-arm.h (md_optimize_expr): Define
1204 (arm_optimize_expr): Add prototype.
1205 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1206
1207 2006-05-02 Ben Elliston <bje@au.ibm.com>
1208
1209 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1210 field unsigned.
1211
1212 * sb.h (sb_list_vector): Move to sb.c.
1213 * sb.c (free_list): Use type of sb_list_vector directly.
1214 (sb_build): Fix off-by-one error in assertion about `size'.
1215
1216 2006-05-01 Ben Elliston <bje@au.ibm.com>
1217
1218 * listing.c (listing_listing): Remove useless loop.
1219 * macro.c (macro_expand): Remove is_positional local variable.
1220 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1221 and simplify surrounding expressions, where possible.
1222 (assign_symbol): Likewise.
1223 (s_weakref): Likewise.
1224 * symbols.c (colon): Likewise.
1225
1226 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1227
1228 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1229
1230 2006-04-30 Thiemo Seufer <ths@mips.com>
1231 David Ung <davidu@mips.com>
1232
1233 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1234 (mips_immed): New table that records various handling of udi
1235 instruction patterns.
1236 (mips_ip): Adds udi handling.
1237
1238 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1239
1240 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1241 of list rather than beginning.
1242
1243 2006-04-26 Julian Brown <julian@codesourcery.com>
1244
1245 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1246 (is_quarter_float): Rename from above. Simplify slightly.
1247 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1248 number.
1249 (parse_neon_mov): Parse floating-point constants.
1250 (neon_qfloat_bits): Fix encoding.
1251 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1252 preference to integer encoding when using the F32 type.
1253
1254 2006-04-26 Julian Brown <julian@codesourcery.com>
1255
1256 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1257 zero-initialising structures containing it will lead to invalid types).
1258 (arm_it): Add vectype to each operand.
1259 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1260 defined field.
1261 (neon_typed_alias): New structure. Extra information for typed
1262 register aliases.
1263 (reg_entry): Add neon type info field.
1264 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1265 Break out alternative syntax for coprocessor registers, etc. into...
1266 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1267 out from arm_reg_parse.
1268 (parse_neon_type): Move. Return SUCCESS/FAIL.
1269 (first_error): New function. Call to ensure first error which occurs is
1270 reported.
1271 (parse_neon_operand_type): Parse exactly one type.
1272 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1273 (parse_typed_reg_or_scalar): New function. Handle core of both
1274 arm_typed_reg_parse and parse_scalar.
1275 (arm_typed_reg_parse): Parse a register with an optional type.
1276 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1277 result.
1278 (parse_scalar): Parse a Neon scalar with optional type.
1279 (parse_reg_list): Use first_error.
1280 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1281 (neon_alias_types_same): New function. Return true if two (alias) types
1282 are the same.
1283 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1284 of elements.
1285 (insert_reg_alias): Return new reg_entry not void.
1286 (insert_neon_reg_alias): New function. Insert type/index information as
1287 well as register for alias.
1288 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1289 make typed register aliases accordingly.
1290 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1291 of line.
1292 (s_unreq): Delete type information if present.
1293 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1294 (s_arm_unwind_save_mmxwcg): Likewise.
1295 (s_arm_unwind_movsp): Likewise.
1296 (s_arm_unwind_setfp): Likewise.
1297 (parse_shift): Likewise.
1298 (parse_shifter_operand): Likewise.
1299 (parse_address): Likewise.
1300 (parse_tb): Likewise.
1301 (tc_arm_regname_to_dw2regnum): Likewise.
1302 (md_pseudo_table): Add dn, qn.
1303 (parse_neon_mov): Handle typed operands.
1304 (parse_operands): Likewise.
1305 (neon_type_mask): Add N_SIZ.
1306 (N_ALLMODS): New macro.
1307 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1308 (el_type_of_type_chk): Add some safeguards.
1309 (modify_types_allowed): Fix logic bug.
1310 (neon_check_type): Handle operands with types.
1311 (neon_three_same): Remove redundant optional arg handling.
1312 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1313 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1314 (do_neon_step): Adjust accordingly.
1315 (neon_cmode_for_logic_imm): Use first_error.
1316 (do_neon_bitfield): Call neon_check_type.
1317 (neon_dyadic): Rename to...
1318 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1319 to allow modification of type of the destination.
1320 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1321 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1322 (do_neon_compare): Make destination be an untyped bitfield.
1323 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1324 (neon_mul_mac): Return early in case of errors.
1325 (neon_move_immediate): Use first_error.
1326 (neon_mac_reg_scalar_long): Fix type to include scalar.
1327 (do_neon_dup): Likewise.
1328 (do_neon_mov): Likewise (in several places).
1329 (do_neon_tbl_tbx): Fix type.
1330 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1331 (do_neon_ld_dup): Exit early in case of errors and/or use
1332 first_error.
1333 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1334 Handle .dn/.qn directives.
1335 (REGDEF): Add zero for reg_entry neon field.
1336
1337 2006-04-26 Julian Brown <julian@codesourcery.com>
1338
1339 * config/tc-arm.c (limits.h): Include.
1340 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1341 (fpu_vfp_v3_or_neon_ext): Declare constants.
1342 (neon_el_type): New enumeration of types for Neon vector elements.
1343 (neon_type_el): New struct. Define type and size of a vector element.
1344 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1345 instruction.
1346 (neon_type): Define struct. The type of an instruction.
1347 (arm_it): Add 'vectype' for the current instruction.
1348 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1349 (vfp_sp_reg_pos): Rename to...
1350 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1351 tags.
1352 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1353 (Neon D or Q register).
1354 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1355 register.
1356 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1357 (my_get_expression): Allow above constant as argument to accept
1358 64-bit constants with optional prefix.
1359 (arm_reg_parse): Add extra argument to return the specific type of
1360 register in when either a D or Q register (REG_TYPE_NDQ) is
1361 requested. Can be NULL.
1362 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1363 (parse_reg_list): Update for new arm_reg_parse args.
1364 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1365 (parse_neon_el_struct_list): New function. Parse element/structure
1366 register lists for VLD<n>/VST<n> instructions.
1367 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1368 (s_arm_unwind_save_mmxwr): Likewise.
1369 (s_arm_unwind_save_mmxwcg): Likewise.
1370 (s_arm_unwind_movsp): Likewise.
1371 (s_arm_unwind_setfp): Likewise.
1372 (parse_big_immediate): New function. Parse an immediate, which may be
1373 64 bits wide. Put results in inst.operands[i].
1374 (parse_shift): Update for new arm_reg_parse args.
1375 (parse_address): Likewise. Add parsing of alignment specifiers.
1376 (parse_neon_mov): Parse the operands of a VMOV instruction.
1377 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1378 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1379 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1380 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1381 (parse_operands): Handle new codes above.
1382 (encode_arm_vfp_sp_reg): Rename to...
1383 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1384 selected VFP version only supports D0-D15.
1385 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1386 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1387 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1388 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1389 encode_arm_vfp_reg name, and allow 32 D regs.
1390 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1391 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1392 regs.
1393 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1394 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1395 constant-load and conversion insns introduced with VFPv3.
1396 (neon_tab_entry): New struct.
1397 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1398 those which are the targets of pseudo-instructions.
1399 (neon_opc): Enumerate opcodes, use as indices into...
1400 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1401 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1402 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1403 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1404 neon_enc_tab.
1405 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1406 Neon instructions.
1407 (neon_type_mask): New. Compact type representation for type checking.
1408 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1409 permitted type combinations.
1410 (N_IGNORE_TYPE): New macro.
1411 (neon_check_shape): New function. Check an instruction shape for
1412 multiple alternatives. Return the specific shape for the current
1413 instruction.
1414 (neon_modify_type_size): New function. Modify a vector type and size,
1415 depending on the bit mask in argument 1.
1416 (neon_type_promote): New function. Convert a given "key" type (of an
1417 operand) into the correct type for a different operand, based on a bit
1418 mask.
1419 (type_chk_of_el_type): New function. Convert a type and size into the
1420 compact representation used for type checking.
1421 (el_type_of_type_ckh): New function. Reverse of above (only when a
1422 single bit is set in the bit mask).
1423 (modify_types_allowed): New function. Alter a mask of allowed types
1424 based on a bit mask of modifications.
1425 (neon_check_type): New function. Check the type of the current
1426 instruction against the variable argument list. The "key" type of the
1427 instruction is returned.
1428 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1429 a Neon data-processing instruction depending on whether we're in ARM
1430 mode or Thumb-2 mode.
1431 (neon_logbits): New function.
1432 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1433 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1434 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1435 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1436 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1437 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1438 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1439 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1440 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1441 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1442 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1443 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1444 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1445 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1446 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1447 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1448 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1449 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1450 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1451 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1452 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1453 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1454 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1455 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1456 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1457 helpers.
1458 (parse_neon_type): New function. Parse Neon type specifier.
1459 (opcode_lookup): Allow parsing of Neon type specifiers.
1460 (REGNUM2, REGSETH, REGSET2): New macros.
1461 (reg_names): Add new VFPv3 and Neon registers.
1462 (NUF, nUF, NCE, nCE): New macros for opcode table.
1463 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1464 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1465 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1466 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1467 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1468 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1469 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1470 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1471 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1472 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1473 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1474 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1475 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1476 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1477 fto[us][lh][sd].
1478 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1479 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1480 (arm_option_cpu_value): Add vfp3 and neon.
1481 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1482 VFPv1 attribute.
1483
1484 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1485
1486 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1487 syntax instead of hardcoded opcodes with ".w18" suffixes.
1488 (wide_branch_opcode): New.
1489 (build_transition): Use it to check for wide branch opcodes with
1490 either ".w18" or ".w15" suffixes.
1491
1492 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1493
1494 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1495 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1496 frag's is_literal flag.
1497
1498 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1499
1500 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1501
1502 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1503
1504 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1505 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1506 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1507 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1508 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1509
1510 2005-04-20 Paul Brook <paul@codesourcery.com>
1511
1512 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1513 all targets.
1514 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1515
1516 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1517
1518 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1519 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1520 Make some cpus unsupported on ELF. Run "make dep-am".
1521 * Makefile.in: Regenerate.
1522
1523 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1524
1525 * configure.in (--enable-targets): Indent help message.
1526 * configure: Regenerate.
1527
1528 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1529
1530 PR gas/2533
1531 * config/tc-i386.c (i386_immediate): Check illegal immediate
1532 register operand.
1533
1534 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1535
1536 * config/tc-i386.c: Formatting.
1537 (output_disp, output_imm): ISO C90 params.
1538
1539 * frags.c (frag_offset_fixed_p): Constify args.
1540 * frags.h (frag_offset_fixed_p): Ditto.
1541
1542 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1543 (COFF_MAGIC): Delete.
1544
1545 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1546
1547 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1548
1549 * po/POTFILES.in: Regenerated.
1550
1551 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1552
1553 * doc/as.texinfo: Mention that some .type syntaxes are not
1554 supported on all architectures.
1555
1556 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1557
1558 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1559 instructions when such transformations have been disabled.
1560
1561 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1562
1563 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1564 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1565 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1566 decoding the loop instructions. Remove current_offset variable.
1567 (xtensa_fix_short_loop_frags): Likewise.
1568 (min_bytes_to_other_loop_end): Remove current_offset argument.
1569
1570 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1571
1572 * config/tc-z80.c (z80_optimize_expr): Removed.
1573 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1574
1575 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1576
1577 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1578 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1579 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1580 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1581 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1582 at90can64, at90usb646, at90usb647, at90usb1286 and
1583 at90usb1287.
1584 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1585
1586 2006-04-07 Paul Brook <paul@codesourcery.com>
1587
1588 * config/tc-arm.c (parse_operands): Set default error message.
1589
1590 2006-04-07 Paul Brook <paul@codesourcery.com>
1591
1592 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1593
1594 2006-04-07 Paul Brook <paul@codesourcery.com>
1595
1596 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1597
1598 2006-04-07 Paul Brook <paul@codesourcery.com>
1599
1600 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1601 (move_or_literal_pool): Handle Thumb-2 instructions.
1602 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1603
1604 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1605
1606 PR 2512.
1607 * config/tc-i386.c (match_template): Move 64-bit operand tests
1608 inside loop.
1609
1610 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1611
1612 * po/Make-in: Add install-html target.
1613 * Makefile.am: Add install-html and install-html-recursive targets.
1614 * Makefile.in: Regenerate.
1615 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1616 * configure: Regenerate.
1617 * doc/Makefile.am: Add install-html and install-html-am targets.
1618 * doc/Makefile.in: Regenerate.
1619
1620 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1621
1622 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1623 second scan.
1624
1625 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1626 Daniel Jacobowitz <dan@codesourcery.com>
1627
1628 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1629 (GOTT_BASE, GOTT_INDEX): New.
1630 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1631 GOTT_INDEX when generating VxWorks PIC.
1632 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1633 use the generic *-*-vxworks* stanza instead.
1634
1635 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1636
1637 PR 997
1638 * frags.c (frag_offset_fixed_p): New function.
1639 * frags.h (frag_offset_fixed_p): Declare.
1640 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1641 (resolve_expression): Likewise.
1642
1643 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1644
1645 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1646 of the same length but different numbers of slots.
1647
1648 2006-03-30 Andreas Schwab <schwab@suse.de>
1649
1650 * configure.in: Fix help string for --enable-targets option.
1651 * configure: Regenerate.
1652
1653 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1654
1655 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1656 (m68k_ip): ... here. Use for all chips. Protect against buffer
1657 overrun and avoid excessive copying.
1658
1659 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1660 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1661 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1662 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1663 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1664 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1665 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1666 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1667 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1668 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1669 (struct m68k_cpu): Change chip field to control_regs.
1670 (current_chip): Remove.
1671 (control_regs): New.
1672 (m68k_archs, m68k_extensions): Adjust.
1673 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1674 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1675 (find_cf_chip): Reimplement for new organization of cpu table.
1676 (select_control_regs): Remove.
1677 (mri_chip): Adjust.
1678 (struct save_opts): Save control regs, not chip.
1679 (s_save, s_restore): Adjust.
1680 (m68k_lookup_cpu): Give deprecated warning when necessary.
1681 (m68k_init_arch): Adjust.
1682 (md_show_usage): Adjust for new cpu table organization.
1683
1684 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1685
1686 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1687 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1688 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1689 "elf/bfin.h".
1690 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1691 (any_gotrel): New rule.
1692 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1693 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1694 "elf/bfin.h".
1695 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1696 (bfin_pic_ptr): New function.
1697 (md_pseudo_table): Add it for ".picptr".
1698 (OPTION_FDPIC): New macro.
1699 (md_longopts): Add -mfdpic.
1700 (md_parse_option): Handle it.
1701 (md_begin): Set BFD flags.
1702 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1703 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1704 us for GOT relocs.
1705 * Makefile.am (bfin-parse.o): Update dependencies.
1706 (DEPTC_bfin_elf): Likewise.
1707 * Makefile.in: Regenerate.
1708
1709 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1710
1711 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1712 mcfemac instead of mcfmac.
1713
1714 2006-03-23 Michael Matz <matz@suse.de>
1715
1716 * config/tc-i386.c (type_names): Correct placement of 'static'.
1717 (reloc): Map some more relocs to their 64 bit counterpart when
1718 size is 8.
1719 (output_insn): Work around breakage if DEBUG386 is defined.
1720 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1721 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1722 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1723 different from i386.
1724 (output_imm): Ditto.
1725 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1726 Imm64.
1727 (md_convert_frag): Jumps can now be larger than 2GB away, error
1728 out in that case.
1729 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1730 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1731
1732 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1733 Daniel Jacobowitz <dan@codesourcery.com>
1734 Phil Edwards <phil@codesourcery.com>
1735 Zack Weinberg <zack@codesourcery.com>
1736 Mark Mitchell <mark@codesourcery.com>
1737 Nathan Sidwell <nathan@codesourcery.com>
1738
1739 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1740 (md_begin): Complain about -G being used for PIC. Don't change
1741 the text, data and bss alignments on VxWorks.
1742 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1743 generating VxWorks PIC.
1744 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1745 (macro): Likewise, but do not treat la $25 specially for
1746 VxWorks PIC, and do not handle jal.
1747 (OPTION_MVXWORKS_PIC): New macro.
1748 (md_longopts): Add -mvxworks-pic.
1749 (md_parse_option): Don't complain about using PIC and -G together here.
1750 Handle OPTION_MVXWORKS_PIC.
1751 (md_estimate_size_before_relax): Always use the first relaxation
1752 sequence on VxWorks.
1753 * config/tc-mips.h (VXWORKS_PIC): New.
1754
1755 2006-03-21 Paul Brook <paul@codesourcery.com>
1756
1757 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1758
1759 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1760
1761 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1762 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1763 (get_loop_align_size): New.
1764 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1765 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1766 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1767 (get_noop_aligned_address): Use get_loop_align_size.
1768 (get_aligned_diff): Likewise.
1769
1770 2006-03-21 Paul Brook <paul@codesourcery.com>
1771
1772 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1773
1774 2006-03-20 Paul Brook <paul@codesourcery.com>
1775
1776 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1777 (do_t_branch): Encode branches inside IT blocks as unconditional.
1778 (do_t_cps): New function.
1779 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1780 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1781 (opcode_lookup): Allow conditional suffixes on all instructions in
1782 Thumb mode.
1783 (md_assemble): Advance condexec state before checking for errors.
1784 (insns): Use do_t_cps.
1785
1786 2006-03-20 Paul Brook <paul@codesourcery.com>
1787
1788 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1789 outputting the insn.
1790
1791 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1792
1793 * config/tc-vax.c: Update copyright year.
1794 * config/tc-vax.h: Likewise.
1795
1796 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1797
1798 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1799 make it static.
1800 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1801
1802 2006-03-17 Paul Brook <paul@codesourcery.com>
1803
1804 * config/tc-arm.c (insns): Add ldm and stm.
1805
1806 2006-03-17 Ben Elliston <bje@au.ibm.com>
1807
1808 PR gas/2446
1809 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1810
1811 2006-03-16 Paul Brook <paul@codesourcery.com>
1812
1813 * config/tc-arm.c (insns): Add "svc".
1814
1815 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1816
1817 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1818 flag and avoid double underscore prefixes.
1819
1820 2006-03-10 Paul Brook <paul@codesourcery.com>
1821
1822 * config/tc-arm.c (md_begin): Handle EABIv5.
1823 (arm_eabis): Add EF_ARM_EABI_VER5.
1824 * doc/c-arm.texi: Document -meabi=5.
1825
1826 2006-03-10 Ben Elliston <bje@au.ibm.com>
1827
1828 * app.c (do_scrub_chars): Simplify string handling.
1829
1830 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1831 Daniel Jacobowitz <dan@codesourcery.com>
1832 Zack Weinberg <zack@codesourcery.com>
1833 Nathan Sidwell <nathan@codesourcery.com>
1834 Paul Brook <paul@codesourcery.com>
1835 Ricardo Anguiano <anguiano@codesourcery.com>
1836 Phil Edwards <phil@codesourcery.com>
1837
1838 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1839 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1840 R_ARM_ABS12 reloc.
1841 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1842 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1843 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1844
1845 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1846
1847 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1848 even when using the text-section-literals option.
1849
1850 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1851
1852 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1853 and cf.
1854 (m68k_ip): <case 'J'> Check we have some control regs.
1855 (md_parse_option): Allow raw arch switch.
1856 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1857 whether 68881 or cfloat was meant by -mfloat.
1858 (md_show_usage): Adjust extension display.
1859 (m68k_elf_final_processing): Adjust.
1860
1861 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1862
1863 * config/tc-avr.c (avr_mod_hash_value): New function.
1864 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1865 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1866 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1867 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1868 of (int).
1869 (tc_gen_reloc): Handle substractions of symbols, if possible do
1870 fixups, abort otherwise.
1871 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1872 tc_fix_adjustable): Define.
1873
1874 2006-03-02 James E Wilson <wilson@specifix.com>
1875
1876 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1877 change the template, then clear md.slot[curr].end_of_insn_group.
1878
1879 2006-02-28 Jan Beulich <jbeulich@novell.com>
1880
1881 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1882
1883 2006-02-28 Jan Beulich <jbeulich@novell.com>
1884
1885 PR/1070
1886 * macro.c (getstring): Don't treat parentheses special anymore.
1887 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1888 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1889 characters.
1890
1891 2006-02-28 Mat <mat@csail.mit.edu>
1892
1893 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1894
1895 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1896
1897 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1898 field.
1899 (CFI_signal_frame): Define.
1900 (cfi_pseudo_table): Add .cfi_signal_frame.
1901 (dot_cfi): Handle CFI_signal_frame.
1902 (output_cie): Handle cie->signal_frame.
1903 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1904 different. Copy signal_frame from FDE to newly created CIE.
1905 * doc/as.texinfo: Document .cfi_signal_frame.
1906
1907 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1908
1909 * doc/Makefile.am: Add html target.
1910 * doc/Makefile.in: Regenerate.
1911 * po/Make-in: Add html target.
1912
1913 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1914
1915 * config/tc-i386.c (output_insn): Support Intel Merom New
1916 Instructions.
1917
1918 * config/tc-i386.h (CpuMNI): New.
1919 (CpuUnknownFlags): Add CpuMNI.
1920
1921 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1922
1923 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1924 (hpriv_reg_table): New table for hyperprivileged registers.
1925 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1926 register encoding.
1927
1928 2006-02-24 DJ Delorie <dj@redhat.com>
1929
1930 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1931 (tc_gen_reloc): Don't define.
1932 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1933 (OPTION_LINKRELAX): New.
1934 (md_longopts): Add it.
1935 (m32c_relax): New.
1936 (md_parse_options): Set it.
1937 (md_assemble): Emit relaxation relocs as needed.
1938 (md_convert_frag): Emit relaxation relocs as needed.
1939 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1940 (m32c_apply_fix): New.
1941 (tc_gen_reloc): New.
1942 (m32c_force_relocation): Force out jump relocs when relaxing.
1943 (m32c_fix_adjustable): Return false if relaxing.
1944
1945 2006-02-24 Paul Brook <paul@codesourcery.com>
1946
1947 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1948 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1949 (struct asm_barrier_opt): Define.
1950 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1951 (parse_psr): Accept V7M psr names.
1952 (parse_barrier): New function.
1953 (enum operand_parse_code): Add OP_oBARRIER.
1954 (parse_operands): Implement OP_oBARRIER.
1955 (do_barrier): New function.
1956 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1957 (do_t_cpsi): Add V7M restrictions.
1958 (do_t_mrs, do_t_msr): Validate V7M variants.
1959 (md_assemble): Check for NULL variants.
1960 (v7m_psrs, barrier_opt_names): New tables.
1961 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1962 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1963 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1964 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1965 (struct cpu_arch_ver_table): Define.
1966 (cpu_arch_ver): New.
1967 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1968 Tag_CPU_arch_profile.
1969 * doc/c-arm.texi: Document new cpu and arch options.
1970
1971 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1972
1973 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1974
1975 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1976
1977 * config/tc-ia64.c: Update copyright years.
1978
1979 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1980
1981 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1982 SDM 2.2.
1983
1984 2005-02-22 Paul Brook <paul@codesourcery.com>
1985
1986 * config/tc-arm.c (do_pld): Remove incorrect write to
1987 inst.instruction.
1988 (encode_thumb32_addr_mode): Use correct operand.
1989
1990 2006-02-21 Paul Brook <paul@codesourcery.com>
1991
1992 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1993
1994 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1995 Anil Paranjape <anilp1@kpitcummins.com>
1996 Shilin Shakti <shilins@kpitcummins.com>
1997
1998 * Makefile.am: Add xc16x related entry.
1999 * Makefile.in: Regenerate.
2000 * configure.in: Added xc16x related entry.
2001 * configure: Regenerate.
2002 * config/tc-xc16x.h: New file
2003 * config/tc-xc16x.c: New file
2004 * doc/c-xc16x.texi: New file for xc16x
2005 * doc/all.texi: Entry for xc16x
2006 * doc/Makefile.texi: Added c-xc16x.texi
2007 * NEWS: Announce the support for the new target.
2008
2009 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2010
2011 * configure.tgt: set emulation for mips-*-netbsd*
2012
2013 2006-02-14 Jakub Jelinek <jakub@redhat.com>
2014
2015 * config.in: Rebuilt.
2016
2017 2006-02-13 Bob Wilson <bob.wilson@acm.org>
2018
2019 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2020 from 1, not 0, in error messages.
2021 (md_assemble): Simplify special-case check for ENTRY instructions.
2022 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2023 operand in error message.
2024
2025 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2026
2027 * configure.tgt (arm-*-linux-gnueabi*): Change to
2028 arm-*-linux-*eabi*.
2029
2030 2006-02-10 Nick Clifton <nickc@redhat.com>
2031
2032 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2033 32-bit value is propagated into the upper bits of a 64-bit long.
2034
2035 * config/tc-arc.c (init_opcode_tables): Fix cast.
2036 (arc_extoper, md_operand): Likewise.
2037
2038 2006-02-09 David Heine <dlheine@tensilica.com>
2039
2040 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2041 each relaxation step.
2042
2043 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
2044
2045 * configure.in (CHECK_DECLS): Add vsnprintf.
2046 * configure: Regenerate.
2047 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2048 include/declare here, but...
2049 * as.h: Move code detecting VARARGS idiom to the top.
2050 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2051 (vsnprintf): Declare if not already declared.
2052
2053 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2054
2055 * as.c (close_output_file): New.
2056 (main): Register close_output_file with xatexit before
2057 dump_statistics. Don't call output_file_close.
2058
2059 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2060
2061 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2062 mcf5329_control_regs): New.
2063 (not_current_architecture, selected_arch, selected_cpu): New.
2064 (m68k_archs, m68k_extensions): New.
2065 (archs): Renamed to ...
2066 (m68k_cpus): ... here. Adjust.
2067 (n_arches): Remove.
2068 (md_pseudo_table): Add arch and cpu directives.
2069 (find_cf_chip, m68k_ip): Adjust table scanning.
2070 (no_68851, no_68881): Remove.
2071 (md_assemble): Lazily initialize.
2072 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2073 (md_init_after_args): Move functionality to m68k_init_arch.
2074 (mri_chip): Adjust table scanning.
2075 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2076 options with saner parsing.
2077 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2078 m68k_init_arch): New.
2079 (s_m68k_cpu, s_m68k_arch): New.
2080 (md_show_usage): Adjust.
2081 (m68k_elf_final_processing): Set CF EF flags.
2082 * config/tc-m68k.h (m68k_init_after_args): Remove.
2083 (tc_init_after_args): Remove.
2084 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2085 (M68k-Directives): Document .arch and .cpu directives.
2086
2087 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2088
2089 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2090 synonyms for equ and defl.
2091 (z80_cons_fix_new): New function.
2092 (emit_byte): Disallow relative jumps to absolute locations.
2093 (emit_data): Only handle defb, prototype changed, because defb is
2094 now handled as pseudo-op rather than an instruction.
2095 (instab): Entries for defb,defw,db,dw moved from here...
2096 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2097 Add entries for def24,def32,d24,d32.
2098 (md_assemble): Improved error handling.
2099 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2100 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2101 (z80_cons_fix_new): Declare.
2102 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2103 (def24,d24,def32,d32): New pseudo-ops.
2104
2105 2006-02-02 Paul Brook <paul@codesourcery.com>
2106
2107 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2108
2109 2005-02-02 Paul Brook <paul@codesourcery.com>
2110
2111 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2112 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2113 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2114 T2_OPCODE_RSB): Define.
2115 (thumb32_negate_data_op): New function.
2116 (md_apply_fix): Use it.
2117
2118 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2119
2120 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2121 fields.
2122 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2123 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2124 subtracted symbols.
2125 (relaxation_requirements): Add pfinish_frag argument and use it to
2126 replace setting tinsn->record_fix fields.
2127 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2128 and vinsn_to_insnbuf. Remove references to record_fix and
2129 slot_sub_symbols fields.
2130 (xtensa_mark_narrow_branches): Delete unused code.
2131 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2132 a symbol.
2133 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2134 record_fix fields.
2135 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2136 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2137 of the record_fix field. Simplify error messages for unexpected
2138 symbolic operands.
2139 (set_expr_symbol_offset_diff): Delete.
2140
2141 2006-01-31 Paul Brook <paul@codesourcery.com>
2142
2143 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2144
2145 2006-01-31 Paul Brook <paul@codesourcery.com>
2146 Richard Earnshaw <rearnsha@arm.com>
2147
2148 * config/tc-arm.c: Use arm_feature_set.
2149 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2150 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2151 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2152 New variables.
2153 (insns): Use them.
2154 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2155 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2156 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2157 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2158 feature flags.
2159 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2160 (arm_opts): Move old cpu/arch options from here...
2161 (arm_legacy_opts): ... to here.
2162 (md_parse_option): Search arm_legacy_opts.
2163 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2164 (arm_float_abis, arm_eabis): Make const.
2165
2166 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2167
2168 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2169
2170 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2171
2172 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2173 in load immediate intruction.
2174
2175 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2176
2177 * config/bfin-parse.y (value_match): Use correct conversion
2178 specifications in template string for __FILE__ and __LINE__.
2179 (binary): Ditto.
2180 (unary): Ditto.
2181
2182 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2183
2184 Introduce TLS descriptors for i386 and x86_64.
2185 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2186 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2187 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2188 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2189 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2190 displacement bits.
2191 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2192 (lex_got): Handle @tlsdesc and @tlscall.
2193 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2194
2195 2006-01-11 Nick Clifton <nickc@redhat.com>
2196
2197 Fixes for building on 64-bit hosts:
2198 * config/tc-avr.c (mod_index): New union to allow conversion
2199 between pointers and integers.
2200 (md_begin, avr_ldi_expression): Use it.
2201 * config/tc-i370.c (md_assemble): Add cast for argument to print
2202 statement.
2203 * config/tc-tic54x.c (subsym_substitute): Likewise.
2204 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2205 opindex field of fr_cgen structure into a pointer so that it can
2206 be stored in a frag.
2207 * config/tc-mn10300.c (md_assemble): Likewise.
2208 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2209 types.
2210 * config/tc-v850.c: Replace uses of (int) casts with correct
2211 types.
2212
2213 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2214
2215 PR gas/2117
2216 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2217
2218 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2219
2220 PR gas/2101
2221 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2222 a local-label reference.
2223
2224 For older changes see ChangeLog-2005
2225 \f
2226 Local Variables:
2227 mode: change-log
2228 left-margin: 8
2229 fill-column: 74
2230 version-control: never
2231 End: