1 2006-09-11 Alan Modra <amodra@bigpond.net.au>
4 * config/tc-mips.h (enum dwarf2_format): Forward declare.
5 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
6 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
7 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
9 2006-09-08 Nick Clifton <nickc@redhat.com>
12 * doc/as.texinfo (Macro): Improve documentation about separating
13 macro arguments from following text.
15 2006-09-08 Paul Brook <paul@codesourcery.com>
17 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
19 2006-09-07 Paul Brook <paul@codesourcery.com>
21 * config/tc-arm.c (parse_operands): Mark operand as present.
23 2006-09-04 Paul Brook <paul@codesourcery.com>
25 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
26 (do_neon_dyadic_if_i_d): Avoid setting U bit.
27 (do_neon_mac_maybe_scalar): Ditto.
28 (do_neon_dyadic_narrow): Force operand type to NT_integer.
29 (insns): Remove out of date comments.
31 2006-08-29 Nick Clifton <nickc@redhat.com>
33 * read.c (s_align): Initialize the 'stopc' variable to prevent
34 compiler complaints about it being used without being
36 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
37 s_float_space, s_struct, cons_worker, equals): Likewise.
39 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
41 * ecoff.c (ecoff_directive_val): Fix message typo.
42 * config/tc-ns32k.c (convert_iif): Likewise.
43 * config/tc-sh64.c (shmedia_check_limits): Likewise.
45 2006-08-25 Sterling Augustine <sterling@tensilica.com>
46 Bob Wilson <bob.wilson@acm.org>
48 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
49 the state of the absolute_literals directive. Remove align frag at
50 the start of the literal pool position.
52 2006-08-25 Bob Wilson <bob.wilson@acm.org>
54 * doc/c-xtensa.texi: Add @group commands in examples.
56 2006-08-24 Bob Wilson <bob.wilson@acm.org>
58 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
59 (INIT_LITERAL_SECTION_NAME): Delete.
60 (lit_state struct): Remove segment names, init_lit_seg, and
61 fini_lit_seg. Add lit_prefix and current_text_seg.
62 (init_literal_head_h, init_literal_head): Delete.
63 (fini_literal_head_h, fini_literal_head): Delete.
64 (xtensa_begin_directive): Move argument parsing to
65 xtensa_literal_prefix function.
66 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
67 (xtensa_literal_prefix): Parse the directive argument here and
68 record it in the lit_prefix field. Remove code to derive literal
71 (get_is_linkonce_section): Use linkonce_len. Check for any
72 ".gnu.linkonce.*" section, not just text sections.
73 (md_begin): Remove initialization of deleted lit_state fields.
74 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
75 to init_literal_head and fini_literal_head.
76 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
77 when traversing literal_head list.
78 (match_section_group): New.
79 (cache_literal_section): Rewrite to determine the literal section
80 name on the fly, create the section and return it.
81 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
82 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
83 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
84 Use xtensa_get_property_section from bfd.
85 (retrieve_xtensa_section): Delete.
86 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
87 description to refer to plural literal sections and add xref to
88 the Literal Directive section.
89 (Literal Directive): Describe new rules for deriving literal section
90 names. Add footnote for special case of .init/.fini with
91 --text-section-literals.
92 (Literal Prefix Directive): Replace old naming rules with xref to the
93 Literal Directive section.
95 2006-08-21 Joseph Myers <joseph@codesourcery.com>
97 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
98 merging with previous long opcode.
100 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
102 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
103 * Makefile.in: Regenerate.
104 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
107 2006-08-16 Julian Brown <julian@codesourcery.com>
109 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
110 to use ARM instructions on non-ARM-supporting cores.
111 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
112 mode automatically based on cpu variant.
113 (md_begin): Call above function.
115 2006-08-16 Julian Brown <julian@codesourcery.com>
117 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
118 recognized in non-unified syntax mode.
120 2006-08-15 Thiemo Seufer <ths@mips.com>
121 Nigel Stephens <nigel@mips.com>
122 David Ung <davidu@mips.com>
124 * configure.tgt: Handle mips*-sde-elf*.
126 2006-08-12 Thiemo Seufer <ths@networkno.de>
128 * config/tc-mips.c (mips16_ip): Fix argument register handling
129 for restore instruction.
131 2006-08-08 Bob Wilson <bob.wilson@acm.org>
133 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
135 (out_fixed_inc_line_addr): New.
136 (process_entries): Use out_fixed_inc_line_addr when
137 DWARF2_USE_FIXED_ADVANCE_PC is set.
138 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
140 2006-08-08 DJ Delorie <dj@redhat.com>
142 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
143 vs full symbols so that we never have more than one pointer value
144 for any given symbol in our symbol table.
146 2006-08-08 Sterling Augustine <sterling@tensilica.com>
148 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
149 and emit DW_AT_ranges when code in compilation unit is not
151 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
153 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
154 (out_debug_ranges): New function to emit .debug_ranges section
155 when code is not contiguous.
157 2006-08-08 Nick Clifton <nickc@redhat.com>
159 * config/tc-arm.c (WARN_DEPRECATED): Enable.
161 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
163 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
165 (pe_directive_secrel) [TE_PE]: New function.
166 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
167 loc, loc_mark_labels.
168 [TE_PE]: Handle secrel32.
169 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
171 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
172 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
173 (md_section_align): Only round section sizes here for AOUT
175 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
176 (tc_pe_dwarf2_emit_offset): New function.
177 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
178 (cons_fix_new_arm): Handle O_secrel.
179 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
180 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
181 of OBJ_ELF only block.
182 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
183 tc_pe_dwarf2_emit_offset.
185 2006-08-04 Richard Sandiford <richard@codesourcery.com>
187 * config/tc-sh.c (apply_full_field_fix): New function.
188 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
189 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
190 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
191 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
193 2006-08-03 Nick Clifton <nickc@redhat.com>
196 * config.in: Regenerate.
198 2006-08-03 Joseph Myers <joseph@codesourcery.com>
200 * config/tc-arm.c (parse_operands): Handle invalid register name
203 2006-08-03 Joseph Myers <joseph@codesourcery.com>
205 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
206 (parse_operands): Handle it.
207 (insns): Use it for tmcr and tmrc.
209 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
212 * config/tc-i386.c (md_parse_option): Treat any target starting
213 with elf64_x86_64 as a viable target for the -64 switch.
214 (i386_target_format): For 64-bit ELF flavoured output use
216 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
218 2006-08-02 Nick Clifton <nickc@redhat.com>
221 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
223 * configure.in: Run BFD_BINARY_FOPEN.
224 * configure: Regenerate.
225 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
228 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
230 * config/tc-i386.c (md_assemble): Don't update
233 2006-08-01 Thiemo Seufer <ths@mips.com>
235 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
237 2006-08-01 Thiemo Seufer <ths@mips.com>
239 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
240 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
241 BFD_RELOC_32 and BFD_RELOC_16.
242 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
243 md_convert_frag, md_obj_end): Fix comment formatting.
245 2006-07-31 Thiemo Seufer <ths@mips.com>
247 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
248 handling for BFD_RELOC_MIPS16_JMP.
250 2006-07-24 Andreas Schwab <schwab@suse.de>
253 * read.c (read_a_source_file): Ignore unknown text after line
254 comment character. Fix misleading comment.
256 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
258 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
259 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
260 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
261 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
262 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
263 doc/c-z80.texi, doc/internals.texi: Fix some typos.
265 2006-07-21 Nick Clifton <nickc@redhat.com>
267 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
270 2006-07-20 Thiemo Seufer <ths@mips.com>
271 Nigel Stephens <nigel@mips.com>
273 * config/tc-mips.c (md_parse_option): Don't infer optimisation
274 options from debug options.
276 2006-07-20 Thiemo Seufer <ths@mips.com>
278 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
279 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
281 2006-07-19 Paul Brook <paul@codesourcery.com>
283 * config/tc-arm.c (insns): Fix rbit Arm opcode.
285 2006-07-18 Paul Brook <paul@codesourcery.com>
287 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
288 (md_convert_frag): Use correct reloc for add_pc. Use
289 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
290 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
291 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
293 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
295 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
296 when file and line unknown.
298 2006-07-17 Thiemo Seufer <ths@mips.com>
300 * read.c (s_struct): Use IS_ELF.
301 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
302 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
303 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
304 s_mips_mask): Likewise.
306 2006-07-16 Thiemo Seufer <ths@mips.com>
307 David Ung <davidu@mips.com>
309 * read.c (s_struct): Handle ELF section changing.
310 * config/tc-mips.c (s_align): Leave enabling auto-align to the
312 (s_change_sec): Try section changing only if we output ELF.
314 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
316 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
318 (smallest_imm_type): Remove Cpu086.
319 (i386_target_format): Likewise.
321 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
324 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
325 Michael Meissner <michael.meissner@amd.com>
327 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
328 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
329 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
331 (i386_align_code): Ditto.
332 (md_assemble_code): Add support for insertq/extrq instructions,
333 swapping as needed for intel syntax.
334 (swap_imm_operands): New function to swap immediate operands.
335 (swap_operands): Deal with 4 operand instructions.
336 (build_modrm_byte): Add support for insertq instruction.
338 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
340 * config/tc-i386.h (Size64): Fix a typo in comment.
342 2006-07-12 Nick Clifton <nickc@redhat.com>
344 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
345 fixup_segment() to repeat a range check on a value that has
346 already been checked here.
348 2006-07-07 James E Wilson <wilson@specifix.com>
350 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
352 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
353 Nick Clifton <nickc@redhat.com>
356 * doc/as.texi: Fix spelling typo: branchs => branches.
357 * doc/c-m68hc11.texi: Likewise.
358 * config/tc-m68hc11.c: Likewise.
359 Support old spelling of command line switch for backwards
362 2006-07-04 Thiemo Seufer <ths@mips.com>
363 David Ung <davidu@mips.com>
365 * config/tc-mips.c (s_is_linkonce): New function.
366 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
367 weak, external, and linkonce symbols.
368 (pic_need_relax): Use s_is_linkonce.
370 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
372 * doc/as.texinfo (Org): Remove space.
373 (P2align): Add "@var{abs-expr},".
375 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
377 * config/tc-i386.c (cpu_arch_tune_set): New.
378 (cpu_arch_isa): Likewise.
379 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
380 nops with short or long nop sequences based on -march=/.arch
382 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
383 set cpu_arch_tune and cpu_arch_tune_flags.
384 (md_parse_option): For -march=, set cpu_arch_isa and set
385 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
386 0. Set cpu_arch_tune_set to 1 for -mtune=.
387 (i386_target_format): Don't set cpu_arch_tune.
389 2006-06-23 Nigel Stephens <nigel@mips.com>
391 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
392 generated .sbss.* and .gnu.linkonce.sb.*.
394 2006-06-23 Thiemo Seufer <ths@mips.com>
395 David Ung <davidu@mips.com>
397 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
399 * config/tc-mips.c (label_list): Define per-segment label_list.
400 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
401 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
402 mips_from_file_after_relocs, mips_define_label): Use per-segment
405 2006-06-22 Thiemo Seufer <ths@mips.com>
407 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
408 (append_insn): Use it.
409 (md_apply_fix): Whitespace formatting.
410 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
411 mips16_extended_frag): Remove register specifier.
412 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
415 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
417 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
418 a directive saving VFP registers for ARMv6 or later.
419 (s_arm_unwind_save): Add parameter arch_v6 and call
420 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
422 (md_pseudo_table): Add entry for new "vsave" directive.
423 * doc/c-arm.texi: Correct error in example for "save"
424 directive (fstmdf -> fstmdx). Also document "vsave" directive.
426 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
427 Anatoly Sokolov <aesok@post.ru>
429 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
430 and atmega644p devices. Rename atmega164/atmega324 devices to
431 atmega164p/atmega324p.
432 * doc/c-avr.texi: Document new mcu and arch options.
434 2006-06-17 Nick Clifton <nickc@redhat.com>
436 * config/tc-arm.c (enum parse_operand_result): Move outside of
437 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
439 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
441 * config/tc-i386.h (processor_type): New.
442 (arch_entry): Add type.
444 * config/tc-i386.c (cpu_arch_tune): New.
445 (cpu_arch_tune_flags): Likewise.
446 (cpu_arch_isa_flags): Likewise.
448 (set_cpu_arch): Also update cpu_arch_isa_flags.
449 (md_assemble): Update cpu_arch_isa_flags.
451 (OPTION_MTUNE): Likewise.
452 (md_longopts): Add -march= and -mtune=.
453 (md_parse_option): Support -march= and -mtune=.
454 (md_show_usage): Add -march=CPU/-mtune=CPU.
455 (i386_target_format): Also update cpu_arch_isa_flags,
456 cpu_arch_tune and cpu_arch_tune_flags.
458 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
460 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
462 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
464 * config/tc-arm.c (enum parse_operand_result): New.
465 (struct group_reloc_table_entry): New.
466 (enum group_reloc_type): New.
467 (group_reloc_table): New array.
468 (find_group_reloc_table_entry): New function.
469 (parse_shifter_operand_group_reloc): New function.
470 (parse_address_main): New function, incorporating code
471 from the old parse_address function. To be used via...
472 (parse_address): wrapper for parse_address_main; and
473 (parse_address_group_reloc): new function, likewise.
474 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
475 OP_ADDRGLDRS, OP_ADDRGLDC.
476 (parse_operands): Support for these new operand codes.
477 New macro po_misc_or_fail_no_backtrack.
478 (encode_arm_cp_address): Preserve group relocations.
479 (insns): Modify to use the above operand codes where group
480 relocations are permitted.
481 (md_apply_fix): Handle the group relocations
482 ALU_PC_G0_NC through LDC_SB_G2.
483 (tc_gen_reloc): Likewise.
484 (arm_force_relocation): Leave group relocations for the linker.
485 (arm_fix_adjustable): Likewise.
487 2006-06-15 Julian Brown <julian@codesourcery.com>
489 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
490 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
493 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
495 * config/tc-i386.c (process_suffix): Don't add rex64 for
498 2006-06-09 Thiemo Seufer <ths@mips.com>
500 * config/tc-mips.c (mips_ip): Maintain argument count.
502 2006-06-09 Alan Modra <amodra@bigpond.net.au>
504 * config/tc-iq2000.c: Include sb.h.
506 2006-06-08 Nigel Stephens <nigel@mips.com>
508 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
509 aliases for better compatibility with SGI tools.
511 2006-06-08 Alan Modra <amodra@bigpond.net.au>
513 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
514 * Makefile.am (GASLIBS): Expand @BFDLIB@.
516 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
517 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
518 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
520 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
521 * Makefile.in: Regenerate.
522 * doc/Makefile.in: Regenerate.
523 * configure: Regenerate.
525 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
527 * po/Make-in (pdf, ps): New dummy targets.
529 2006-06-07 Julian Brown <julian@codesourcery.com>
531 * config/tc-arm.c (stdarg.h): include.
532 (arm_it): Add uncond_value field. Add isvec and issingle to operand
534 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
535 REG_TYPE_NSDQ (single, double or quad vector reg).
536 (reg_expected_msgs): Update.
537 (BAD_FPU): Add macro for unsupported FPU instruction error.
538 (parse_neon_type): Support 'd' as an alias for .f64.
539 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
541 (parse_vfp_reg_list): Don't update first arg on error.
542 (parse_neon_mov): Support extra syntax for VFP moves.
543 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
544 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
545 (parse_operands): Support isvec, issingle operands fields, new parse
547 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
549 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
550 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
551 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
552 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
554 (neon_shape): Redefine in terms of above.
555 (neon_shape_class): New enumeration, table of shape classes.
556 (neon_shape_el): New enumeration. One element of a shape.
557 (neon_shape_el_size): Register widths of above, where appropriate.
558 (neon_shape_info): New struct. Info for shape table.
559 (neon_shape_tab): New array.
560 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
561 (neon_check_shape): Rewrite as...
562 (neon_select_shape): New function to classify instruction shapes,
563 driven by new table neon_shape_tab array.
564 (neon_quad): New function. Return 1 if shape should set Q flag in
565 instructions (or equivalent), 0 otherwise.
566 (type_chk_of_el_type): Support F64.
567 (el_type_of_type_chk): Likewise.
568 (neon_check_type): Add support for VFP type checking (VFP data
569 elements fill their containing registers).
570 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
571 in thumb mode for VFP instructions.
572 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
573 and encode the current instruction as if it were that opcode.
574 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
575 arguments, call function in PFN.
576 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
577 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
578 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
579 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
580 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
581 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
582 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
583 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
584 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
585 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
586 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
587 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
588 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
589 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
590 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
592 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
593 between VFP and Neon turns out to belong to Neon. Perform
594 architecture check and fill in condition field if appropriate.
595 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
596 (do_neon_cvt): Add support for VFP variants of instructions.
597 (neon_cvt_flavour): Extend to cover VFP conversions.
598 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
600 (do_neon_ldr_str): Handle single-precision VFP load/store.
601 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
602 NS_NULL not NS_IGNORE.
603 (opcode_tag): Add OT_csuffixF for operands which either take a
604 conditional suffix, or have 0xF in the condition field.
605 (md_assemble): Add support for OT_csuffixF.
606 (NCE): Replace macro with...
607 (NCE_tag, NCE, NCEF): New macros.
608 (nCE): Replace macro with...
609 (nCE_tag, nCE, nCEF): New macros.
610 (insns): Add support for VFP insns or VFP versions of insns msr,
611 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
612 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
613 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
614 VFP/Neon insns together.
616 2006-06-07 Alan Modra <amodra@bigpond.net.au>
617 Ladislav Michl <ladis@linux-mips.org>
619 * app.c: Don't include headers already included by as.h.
621 * atof-generic.c: Likewise.
623 * dwarf2dbg.c: Likewise.
625 * input-file.c: Likewise.
626 * input-scrub.c: Likewise.
628 * output-file.c: Likewise.
631 * config/bfin-lex.l: Likewise.
632 * config/obj-coff.h: Likewise.
633 * config/obj-elf.h: Likewise.
634 * config/obj-som.h: Likewise.
635 * config/tc-arc.c: Likewise.
636 * config/tc-arm.c: Likewise.
637 * config/tc-avr.c: Likewise.
638 * config/tc-bfin.c: Likewise.
639 * config/tc-cris.c: Likewise.
640 * config/tc-d10v.c: Likewise.
641 * config/tc-d30v.c: Likewise.
642 * config/tc-dlx.h: Likewise.
643 * config/tc-fr30.c: Likewise.
644 * config/tc-frv.c: Likewise.
645 * config/tc-h8300.c: Likewise.
646 * config/tc-hppa.c: Likewise.
647 * config/tc-i370.c: Likewise.
648 * config/tc-i860.c: Likewise.
649 * config/tc-i960.c: Likewise.
650 * config/tc-ip2k.c: Likewise.
651 * config/tc-iq2000.c: Likewise.
652 * config/tc-m32c.c: Likewise.
653 * config/tc-m32r.c: Likewise.
654 * config/tc-maxq.c: Likewise.
655 * config/tc-mcore.c: Likewise.
656 * config/tc-mips.c: Likewise.
657 * config/tc-mmix.c: Likewise.
658 * config/tc-mn10200.c: Likewise.
659 * config/tc-mn10300.c: Likewise.
660 * config/tc-msp430.c: Likewise.
661 * config/tc-mt.c: Likewise.
662 * config/tc-ns32k.c: Likewise.
663 * config/tc-openrisc.c: Likewise.
664 * config/tc-ppc.c: Likewise.
665 * config/tc-s390.c: Likewise.
666 * config/tc-sh.c: Likewise.
667 * config/tc-sh64.c: Likewise.
668 * config/tc-sparc.c: Likewise.
669 * config/tc-tic30.c: Likewise.
670 * config/tc-tic4x.c: Likewise.
671 * config/tc-tic54x.c: Likewise.
672 * config/tc-v850.c: Likewise.
673 * config/tc-vax.c: Likewise.
674 * config/tc-xc16x.c: Likewise.
675 * config/tc-xstormy16.c: Likewise.
676 * config/tc-xtensa.c: Likewise.
677 * config/tc-z80.c: Likewise.
678 * config/tc-z8k.c: Likewise.
679 * macro.h: Don't include sb.h or ansidecl.h.
680 * sb.h: Don't include stdio.h or ansidecl.h.
681 * cond.c: Include sb.h.
682 * itbl-lex.l: Include as.h instead of other system headers.
683 * itbl-parse.y: Likewise.
684 * itbl-ops.c: Similarly.
685 * itbl-ops.h: Don't include as.h or ansidecl.h.
686 * config/bfin-defs.h: Don't include bfd.h or as.h.
687 * config/bfin-parse.y: Include as.h instead of other system headers.
689 2006-06-06 Ben Elliston <bje@au.ibm.com>
690 Anton Blanchard <anton@samba.org>
692 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
693 (md_show_usage): Document it.
694 (ppc_setup_opcodes): Test power6 opcode flag bits.
695 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
697 2006-06-06 Thiemo Seufer <ths@mips.com>
698 Chao-ying Fu <fu@mips.com>
700 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
701 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
702 (macro_build): Update comment.
703 (mips_ip): Allow DSP64 instructions for MIPS64R2.
704 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
706 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
707 MIPS_CPU_ASE_MDMX flags for sb1.
709 2006-06-05 Thiemo Seufer <ths@mips.com>
711 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
713 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
714 (mips_ip): Make overflowed/underflowed constant arguments in DSP
715 and MT instructions a fatal error. Use INSERT_OPERAND where
716 appropriate. Improve warnings for break and wait code overflows.
717 Use symbolic constant of OP_MASK_COPZ.
718 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
720 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
722 * po/Make-in (top_builddir): Define.
724 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
726 * doc/Makefile.am (TEXI2DVI): Define.
727 * doc/Makefile.in: Regenerate.
728 * doc/c-arc.texi: Fix typo.
730 2006-06-01 Alan Modra <amodra@bigpond.net.au>
732 * config/obj-ieee.c: Delete.
733 * config/obj-ieee.h: Delete.
734 * Makefile.am (OBJ_FORMATS): Remove ieee.
735 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
736 (obj-ieee.o): Remove rule.
737 * Makefile.in: Regenerate.
738 * configure.in (atof): Remove tahoe.
739 (OBJ_MAYBE_IEEE): Don't define.
740 * configure: Regenerate.
741 * config.in: Regenerate.
742 * doc/Makefile.in: Regenerate.
743 * po/POTFILES.in: Regenerate.
745 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
747 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
748 and LIBINTL_DEP everywhere.
750 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
751 * acinclude.m4: Include new gettext macros.
752 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
753 Remove local code for po/Makefile.
754 * Makefile.in, configure, doc/Makefile.in: Regenerated.
756 2006-05-30 Nick Clifton <nickc@redhat.com>
758 * po/es.po: Updated Spanish translation.
760 2006-05-06 Denis Chertykov <denisc@overta.ru>
762 * doc/c-avr.texi: New file.
763 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
764 * doc/all.texi: Set AVR
765 * doc/as.texinfo: Include c-avr.texi
767 2006-05-28 Jie Zhang <jie.zhang@analog.com>
769 * config/bfin-parse.y (check_macfunc): Loose the condition of
770 calling check_multiply_halfregs ().
772 2006-05-25 Jie Zhang <jie.zhang@analog.com>
774 * config/bfin-parse.y (asm_1): Better check and deal with
775 vector and scalar Multiply 16-Bit Operands instructions.
777 2006-05-24 Nick Clifton <nickc@redhat.com>
779 * config/tc-hppa.c: Convert to ISO C90 format.
780 * config/tc-hppa.h: Likewise.
782 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
783 Randolph Chung <randolph@tausq.org>
785 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
786 is_tls_ieoff, is_tls_leoff): Define.
787 (fix_new_hppa): Handle TLS.
788 (cons_fix_new_hppa): Likewise.
790 (md_apply_fix): Handle TLS relocs.
791 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
793 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
795 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
797 2006-05-23 Thiemo Seufer <ths@mips.com>
798 David Ung <davidu@mips.com>
799 Nigel Stephens <nigel@mips.com>
802 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
803 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
804 ISA_HAS_MXHC1): New macros.
805 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
806 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
807 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
808 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
809 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
810 (mips_after_parse_args): Change default handling of float register
811 size to account for 32bit code with 64bit FP. Better sanity checking
812 of ISA/ASE/ABI option combinations.
813 (s_mipsset): Support switching of GPR and FPR sizes via
814 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
816 (mips_elf_final_processing): We should record the use of 64bit FP
817 registers in 32bit code but we don't, because ELF header flags are
819 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
820 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
821 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
822 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
823 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
824 missing -march options. Document .set arch=CPU. Move .set smartmips
825 to ASE page. Use @code for .set FOO examples.
827 2006-05-23 Jie Zhang <jie.zhang@analog.com>
829 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
832 2006-05-23 Jie Zhang <jie.zhang@analog.com>
834 * config/bfin-defs.h (bfin_equals): Remove declaration.
835 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
836 * config/tc-bfin.c (bfin_name_is_register): Remove.
837 (bfin_equals): Remove.
838 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
839 (bfin_name_is_register): Remove declaration.
841 2006-05-19 Thiemo Seufer <ths@mips.com>
842 Nigel Stephens <nigel@mips.com>
844 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
845 (mips_oddfpreg_ok): New function.
848 2006-05-19 Thiemo Seufer <ths@mips.com>
849 David Ung <davidu@mips.com>
851 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
852 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
853 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
854 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
855 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
856 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
857 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
858 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
859 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
860 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
861 reg_names_o32, reg_names_n32n64): Define register classes.
862 (reg_lookup): New function, use register classes.
863 (md_begin): Reserve register names in the symbol table. Simplify
865 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
867 (mips16_ip): Use reg_lookup.
868 (tc_get_register): Likewise.
869 (tc_mips_regname_to_dw2regnum): New function.
871 2006-05-19 Thiemo Seufer <ths@mips.com>
873 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
874 Un-constify string argument.
875 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
877 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
879 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
881 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
883 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
885 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
888 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
890 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
891 cfloat/m68881 to correct architecture before using it.
893 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
895 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
898 2006-05-15 Paul Brook <paul@codesourcery.com>
900 * config/tc-arm.c (arm_adjust_symtab): Use
901 bfd_is_arm_special_symbol_name.
903 2006-05-15 Bob Wilson <bob.wilson@acm.org>
905 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
906 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
907 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
908 Handle errors from calls to xtensa_opcode_is_* functions.
910 2006-05-14 Thiemo Seufer <ths@mips.com>
912 * config/tc-mips.c (macro_build): Test for currently active
914 (mips16_ip): Reject invalid opcodes.
916 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
918 * doc/as.texinfo: Rename "Index" to "AS Index",
919 and "ABORT" to "ABORT (COFF)".
921 2006-05-11 Paul Brook <paul@codesourcery.com>
923 * config/tc-arm.c (parse_half): New function.
924 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
925 (parse_operands): Ditto.
926 (do_mov16): Reject invalid relocations.
927 (do_t_mov16): Ditto. Use Thumb reloc numbers.
928 (insns): Replace Iffff with HALF.
929 (md_apply_fix): Add MOVW and MOVT relocs.
930 (tc_gen_reloc): Ditto.
931 * doc/c-arm.texi: Document relocation operators
933 2006-05-11 Paul Brook <paul@codesourcery.com>
935 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
937 2006-05-11 Thiemo Seufer <ths@mips.com>
939 * config/tc-mips.c (append_insn): Don't check the range of j or
942 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
944 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
945 relocs against external symbols for WinCE targets.
946 (md_apply_fix): Likewise.
948 2006-05-09 David Ung <davidu@mips.com>
950 * config/tc-mips.c (append_insn): Only warn about an out-of-range
953 2006-05-09 Nick Clifton <nickc@redhat.com>
955 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
956 against symbols which are not going to be placed into the symbol
959 2006-05-09 Ben Elliston <bje@au.ibm.com>
961 * expr.c (operand): Remove `if (0 && ..)' statement and
962 subsequently unused target_op label. Collapse `if (1 || ..)'
964 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
965 separately above the switch.
967 2006-05-08 Nick Clifton <nickc@redhat.com>
970 * config/tc-msp430.c (line_separator_character): Define as |.
972 2006-05-08 Thiemo Seufer <ths@mips.com>
973 Nigel Stephens <nigel@mips.com>
974 David Ung <davidu@mips.com>
976 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
977 (mips_opts): Likewise.
978 (file_ase_smartmips): New variable.
979 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
980 (macro_build): Handle SmartMIPS instructions.
982 (md_longopts): Add argument handling for smartmips.
983 (md_parse_options, mips_after_parse_args): Likewise.
984 (s_mipsset): Add .set smartmips support.
985 (md_show_usage): Document -msmartmips/-mno-smartmips.
986 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
988 * doc/c-mips.texi: Likewise.
990 2006-05-08 Alan Modra <amodra@bigpond.net.au>
992 * write.c (relax_segment): Add pass count arg. Don't error on
993 negative org/space on first two passes.
994 (relax_seg_info): New struct.
995 (relax_seg, write_object_file): Adjust.
996 * write.h (relax_segment): Update prototype.
998 2006-05-05 Julian Brown <julian@codesourcery.com>
1000 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1002 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1003 architecture version checks.
1004 (insns): Allow overlapping instructions to be used in VFP mode.
1006 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1009 * config/obj-elf.c (obj_elf_change_section): Allow user
1010 specified SHF_ALPHA_GPREL.
1012 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1014 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1015 for PMEM related expressions.
1017 2006-05-05 Nick Clifton <nickc@redhat.com>
1020 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1021 insertion of a directory separator character into a string at a
1022 given offset. Uses heuristics to decide when to use a backslash
1023 character rather than a forward-slash character.
1024 (dwarf2_directive_loc): Use the macro.
1025 (out_debug_info): Likewise.
1027 2006-05-05 Thiemo Seufer <ths@mips.com>
1028 David Ung <davidu@mips.com>
1030 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1032 (macro): Add new case M_CACHE_AB.
1034 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1036 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1037 (opcode_lookup): Issue a warning for opcode with
1038 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1039 identical to OT_cinfix3.
1040 (TxC3w, TC3w, tC3w): New.
1041 (insns): Use tC3w and TC3w for comparison instructions with
1044 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1046 * subsegs.h (struct frchain): Delete frch_seg.
1047 (frchain_root): Delete.
1048 (seg_info): Define as macro.
1049 * subsegs.c (frchain_root): Delete.
1050 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1051 (subsegs_begin, subseg_change): Adjust for above.
1052 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1053 rather than to one big list.
1054 (subseg_get): Don't special case abs, und sections.
1055 (subseg_new, subseg_force_new): Don't set frchainP here.
1057 (subsegs_print_statistics): Adjust frag chain control list traversal.
1058 * debug.c (dmp_frags): Likewise.
1059 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1060 at frchain_root. Make use of known frchain ordering.
1061 (last_frag_for_seg): Likewise.
1062 (get_frag_fix): Likewise. Add seg param.
1063 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1064 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1065 (SUB_SEGMENT_ALIGN): Likewise.
1066 (subsegs_finish): Adjust frchain list traversal.
1067 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1068 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1069 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1070 (xtensa_fix_b_j_loop_end_frags): Likewise.
1071 (xtensa_fix_close_loop_end_frags): Likewise.
1072 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1073 (retrieve_segment_info): Delete frch_seg initialisation.
1075 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1077 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1078 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1079 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1080 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1082 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1084 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1086 (md_apply_fix3): Multiply offset by 4 here for
1087 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1089 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1090 Jan Beulich <jbeulich@novell.com>
1092 * config/tc-i386.c (output_invalid_buf): Change size for
1094 * config/tc-tic30.c (output_invalid_buf): Likewise.
1096 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1098 * config/tc-tic30.c (output_invalid): Likewise.
1100 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1102 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1103 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1104 (asconfig.texi): Don't set top_srcdir.
1105 * doc/as.texinfo: Don't use top_srcdir.
1106 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1108 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1110 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1111 * config/tc-tic30.c (output_invalid_buf): Likewise.
1113 * config/tc-i386.c (output_invalid): Use snprintf instead of
1115 * config/tc-ia64.c (declare_register_set): Likewise.
1116 (emit_one_bundle): Likewise.
1117 (check_dependencies): Likewise.
1118 * config/tc-tic30.c (output_invalid): Likewise.
1120 2006-05-02 Paul Brook <paul@codesourcery.com>
1122 * config/tc-arm.c (arm_optimize_expr): New function.
1123 * config/tc-arm.h (md_optimize_expr): Define
1124 (arm_optimize_expr): Add prototype.
1125 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1127 2006-05-02 Ben Elliston <bje@au.ibm.com>
1129 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1132 * sb.h (sb_list_vector): Move to sb.c.
1133 * sb.c (free_list): Use type of sb_list_vector directly.
1134 (sb_build): Fix off-by-one error in assertion about `size'.
1136 2006-05-01 Ben Elliston <bje@au.ibm.com>
1138 * listing.c (listing_listing): Remove useless loop.
1139 * macro.c (macro_expand): Remove is_positional local variable.
1140 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1141 and simplify surrounding expressions, where possible.
1142 (assign_symbol): Likewise.
1143 (s_weakref): Likewise.
1144 * symbols.c (colon): Likewise.
1146 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1148 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1150 2006-04-30 Thiemo Seufer <ths@mips.com>
1151 David Ung <davidu@mips.com>
1153 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1154 (mips_immed): New table that records various handling of udi
1155 instruction patterns.
1156 (mips_ip): Adds udi handling.
1158 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1160 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1161 of list rather than beginning.
1163 2006-04-26 Julian Brown <julian@codesourcery.com>
1165 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1166 (is_quarter_float): Rename from above. Simplify slightly.
1167 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1169 (parse_neon_mov): Parse floating-point constants.
1170 (neon_qfloat_bits): Fix encoding.
1171 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1172 preference to integer encoding when using the F32 type.
1174 2006-04-26 Julian Brown <julian@codesourcery.com>
1176 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1177 zero-initialising structures containing it will lead to invalid types).
1178 (arm_it): Add vectype to each operand.
1179 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1181 (neon_typed_alias): New structure. Extra information for typed
1183 (reg_entry): Add neon type info field.
1184 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1185 Break out alternative syntax for coprocessor registers, etc. into...
1186 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1187 out from arm_reg_parse.
1188 (parse_neon_type): Move. Return SUCCESS/FAIL.
1189 (first_error): New function. Call to ensure first error which occurs is
1191 (parse_neon_operand_type): Parse exactly one type.
1192 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1193 (parse_typed_reg_or_scalar): New function. Handle core of both
1194 arm_typed_reg_parse and parse_scalar.
1195 (arm_typed_reg_parse): Parse a register with an optional type.
1196 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1198 (parse_scalar): Parse a Neon scalar with optional type.
1199 (parse_reg_list): Use first_error.
1200 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1201 (neon_alias_types_same): New function. Return true if two (alias) types
1203 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1205 (insert_reg_alias): Return new reg_entry not void.
1206 (insert_neon_reg_alias): New function. Insert type/index information as
1207 well as register for alias.
1208 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1209 make typed register aliases accordingly.
1210 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1212 (s_unreq): Delete type information if present.
1213 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1214 (s_arm_unwind_save_mmxwcg): Likewise.
1215 (s_arm_unwind_movsp): Likewise.
1216 (s_arm_unwind_setfp): Likewise.
1217 (parse_shift): Likewise.
1218 (parse_shifter_operand): Likewise.
1219 (parse_address): Likewise.
1220 (parse_tb): Likewise.
1221 (tc_arm_regname_to_dw2regnum): Likewise.
1222 (md_pseudo_table): Add dn, qn.
1223 (parse_neon_mov): Handle typed operands.
1224 (parse_operands): Likewise.
1225 (neon_type_mask): Add N_SIZ.
1226 (N_ALLMODS): New macro.
1227 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1228 (el_type_of_type_chk): Add some safeguards.
1229 (modify_types_allowed): Fix logic bug.
1230 (neon_check_type): Handle operands with types.
1231 (neon_three_same): Remove redundant optional arg handling.
1232 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1233 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1234 (do_neon_step): Adjust accordingly.
1235 (neon_cmode_for_logic_imm): Use first_error.
1236 (do_neon_bitfield): Call neon_check_type.
1237 (neon_dyadic): Rename to...
1238 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1239 to allow modification of type of the destination.
1240 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1241 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1242 (do_neon_compare): Make destination be an untyped bitfield.
1243 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1244 (neon_mul_mac): Return early in case of errors.
1245 (neon_move_immediate): Use first_error.
1246 (neon_mac_reg_scalar_long): Fix type to include scalar.
1247 (do_neon_dup): Likewise.
1248 (do_neon_mov): Likewise (in several places).
1249 (do_neon_tbl_tbx): Fix type.
1250 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1251 (do_neon_ld_dup): Exit early in case of errors and/or use
1253 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1254 Handle .dn/.qn directives.
1255 (REGDEF): Add zero for reg_entry neon field.
1257 2006-04-26 Julian Brown <julian@codesourcery.com>
1259 * config/tc-arm.c (limits.h): Include.
1260 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1261 (fpu_vfp_v3_or_neon_ext): Declare constants.
1262 (neon_el_type): New enumeration of types for Neon vector elements.
1263 (neon_type_el): New struct. Define type and size of a vector element.
1264 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1266 (neon_type): Define struct. The type of an instruction.
1267 (arm_it): Add 'vectype' for the current instruction.
1268 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1269 (vfp_sp_reg_pos): Rename to...
1270 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1272 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1273 (Neon D or Q register).
1274 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1276 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1277 (my_get_expression): Allow above constant as argument to accept
1278 64-bit constants with optional prefix.
1279 (arm_reg_parse): Add extra argument to return the specific type of
1280 register in when either a D or Q register (REG_TYPE_NDQ) is
1281 requested. Can be NULL.
1282 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1283 (parse_reg_list): Update for new arm_reg_parse args.
1284 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1285 (parse_neon_el_struct_list): New function. Parse element/structure
1286 register lists for VLD<n>/VST<n> instructions.
1287 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1288 (s_arm_unwind_save_mmxwr): Likewise.
1289 (s_arm_unwind_save_mmxwcg): Likewise.
1290 (s_arm_unwind_movsp): Likewise.
1291 (s_arm_unwind_setfp): Likewise.
1292 (parse_big_immediate): New function. Parse an immediate, which may be
1293 64 bits wide. Put results in inst.operands[i].
1294 (parse_shift): Update for new arm_reg_parse args.
1295 (parse_address): Likewise. Add parsing of alignment specifiers.
1296 (parse_neon_mov): Parse the operands of a VMOV instruction.
1297 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1298 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1299 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1300 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1301 (parse_operands): Handle new codes above.
1302 (encode_arm_vfp_sp_reg): Rename to...
1303 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1304 selected VFP version only supports D0-D15.
1305 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1306 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1307 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1308 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1309 encode_arm_vfp_reg name, and allow 32 D regs.
1310 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1311 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1313 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1314 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1315 constant-load and conversion insns introduced with VFPv3.
1316 (neon_tab_entry): New struct.
1317 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1318 those which are the targets of pseudo-instructions.
1319 (neon_opc): Enumerate opcodes, use as indices into...
1320 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1321 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1322 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1323 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1325 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1327 (neon_type_mask): New. Compact type representation for type checking.
1328 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1329 permitted type combinations.
1330 (N_IGNORE_TYPE): New macro.
1331 (neon_check_shape): New function. Check an instruction shape for
1332 multiple alternatives. Return the specific shape for the current
1334 (neon_modify_type_size): New function. Modify a vector type and size,
1335 depending on the bit mask in argument 1.
1336 (neon_type_promote): New function. Convert a given "key" type (of an
1337 operand) into the correct type for a different operand, based on a bit
1339 (type_chk_of_el_type): New function. Convert a type and size into the
1340 compact representation used for type checking.
1341 (el_type_of_type_ckh): New function. Reverse of above (only when a
1342 single bit is set in the bit mask).
1343 (modify_types_allowed): New function. Alter a mask of allowed types
1344 based on a bit mask of modifications.
1345 (neon_check_type): New function. Check the type of the current
1346 instruction against the variable argument list. The "key" type of the
1347 instruction is returned.
1348 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1349 a Neon data-processing instruction depending on whether we're in ARM
1350 mode or Thumb-2 mode.
1351 (neon_logbits): New function.
1352 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1353 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1354 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1355 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1356 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1357 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1358 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1359 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1360 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1361 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1362 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1363 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1364 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1365 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1366 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1367 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1368 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1369 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1370 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1371 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1372 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1373 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1374 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1375 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1376 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1378 (parse_neon_type): New function. Parse Neon type specifier.
1379 (opcode_lookup): Allow parsing of Neon type specifiers.
1380 (REGNUM2, REGSETH, REGSET2): New macros.
1381 (reg_names): Add new VFPv3 and Neon registers.
1382 (NUF, nUF, NCE, nCE): New macros for opcode table.
1383 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1384 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1385 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1386 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1387 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1388 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1389 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1390 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1391 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1392 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1393 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1394 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1395 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1396 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1398 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1399 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1400 (arm_option_cpu_value): Add vfp3 and neon.
1401 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1404 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1406 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1407 syntax instead of hardcoded opcodes with ".w18" suffixes.
1408 (wide_branch_opcode): New.
1409 (build_transition): Use it to check for wide branch opcodes with
1410 either ".w18" or ".w15" suffixes.
1412 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1414 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1415 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1416 frag's is_literal flag.
1418 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1420 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1422 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1424 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1425 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1426 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1427 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1428 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1430 2005-04-20 Paul Brook <paul@codesourcery.com>
1432 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1434 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1436 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1438 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1439 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1440 Make some cpus unsupported on ELF. Run "make dep-am".
1441 * Makefile.in: Regenerate.
1443 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1445 * configure.in (--enable-targets): Indent help message.
1446 * configure: Regenerate.
1448 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1451 * config/tc-i386.c (i386_immediate): Check illegal immediate
1454 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1456 * config/tc-i386.c: Formatting.
1457 (output_disp, output_imm): ISO C90 params.
1459 * frags.c (frag_offset_fixed_p): Constify args.
1460 * frags.h (frag_offset_fixed_p): Ditto.
1462 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1463 (COFF_MAGIC): Delete.
1465 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1467 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1469 * po/POTFILES.in: Regenerated.
1471 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1473 * doc/as.texinfo: Mention that some .type syntaxes are not
1474 supported on all architectures.
1476 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1478 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1479 instructions when such transformations have been disabled.
1481 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1483 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1484 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1485 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1486 decoding the loop instructions. Remove current_offset variable.
1487 (xtensa_fix_short_loop_frags): Likewise.
1488 (min_bytes_to_other_loop_end): Remove current_offset argument.
1490 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1492 * config/tc-z80.c (z80_optimize_expr): Removed.
1493 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1495 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1497 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1498 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1499 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1500 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1501 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1502 at90can64, at90usb646, at90usb647, at90usb1286 and
1504 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1506 2006-04-07 Paul Brook <paul@codesourcery.com>
1508 * config/tc-arm.c (parse_operands): Set default error message.
1510 2006-04-07 Paul Brook <paul@codesourcery.com>
1512 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1514 2006-04-07 Paul Brook <paul@codesourcery.com>
1516 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1518 2006-04-07 Paul Brook <paul@codesourcery.com>
1520 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1521 (move_or_literal_pool): Handle Thumb-2 instructions.
1522 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1524 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1527 * config/tc-i386.c (match_template): Move 64-bit operand tests
1530 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1532 * po/Make-in: Add install-html target.
1533 * Makefile.am: Add install-html and install-html-recursive targets.
1534 * Makefile.in: Regenerate.
1535 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1536 * configure: Regenerate.
1537 * doc/Makefile.am: Add install-html and install-html-am targets.
1538 * doc/Makefile.in: Regenerate.
1540 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1542 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1545 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1546 Daniel Jacobowitz <dan@codesourcery.com>
1548 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1549 (GOTT_BASE, GOTT_INDEX): New.
1550 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1551 GOTT_INDEX when generating VxWorks PIC.
1552 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1553 use the generic *-*-vxworks* stanza instead.
1555 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1558 * frags.c (frag_offset_fixed_p): New function.
1559 * frags.h (frag_offset_fixed_p): Declare.
1560 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1561 (resolve_expression): Likewise.
1563 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1565 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1566 of the same length but different numbers of slots.
1568 2006-03-30 Andreas Schwab <schwab@suse.de>
1570 * configure.in: Fix help string for --enable-targets option.
1571 * configure: Regenerate.
1573 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1575 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1576 (m68k_ip): ... here. Use for all chips. Protect against buffer
1577 overrun and avoid excessive copying.
1579 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1580 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1581 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1582 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1583 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1584 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1585 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1586 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1587 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1588 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1589 (struct m68k_cpu): Change chip field to control_regs.
1590 (current_chip): Remove.
1591 (control_regs): New.
1592 (m68k_archs, m68k_extensions): Adjust.
1593 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1594 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1595 (find_cf_chip): Reimplement for new organization of cpu table.
1596 (select_control_regs): Remove.
1598 (struct save_opts): Save control regs, not chip.
1599 (s_save, s_restore): Adjust.
1600 (m68k_lookup_cpu): Give deprecated warning when necessary.
1601 (m68k_init_arch): Adjust.
1602 (md_show_usage): Adjust for new cpu table organization.
1604 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1606 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1607 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1608 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1610 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1611 (any_gotrel): New rule.
1612 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1613 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1615 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1616 (bfin_pic_ptr): New function.
1617 (md_pseudo_table): Add it for ".picptr".
1618 (OPTION_FDPIC): New macro.
1619 (md_longopts): Add -mfdpic.
1620 (md_parse_option): Handle it.
1621 (md_begin): Set BFD flags.
1622 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1623 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1625 * Makefile.am (bfin-parse.o): Update dependencies.
1626 (DEPTC_bfin_elf): Likewise.
1627 * Makefile.in: Regenerate.
1629 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1631 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1632 mcfemac instead of mcfmac.
1634 2006-03-23 Michael Matz <matz@suse.de>
1636 * config/tc-i386.c (type_names): Correct placement of 'static'.
1637 (reloc): Map some more relocs to their 64 bit counterpart when
1639 (output_insn): Work around breakage if DEBUG386 is defined.
1640 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1641 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1642 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1643 different from i386.
1644 (output_imm): Ditto.
1645 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1647 (md_convert_frag): Jumps can now be larger than 2GB away, error
1649 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1650 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1652 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1653 Daniel Jacobowitz <dan@codesourcery.com>
1654 Phil Edwards <phil@codesourcery.com>
1655 Zack Weinberg <zack@codesourcery.com>
1656 Mark Mitchell <mark@codesourcery.com>
1657 Nathan Sidwell <nathan@codesourcery.com>
1659 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1660 (md_begin): Complain about -G being used for PIC. Don't change
1661 the text, data and bss alignments on VxWorks.
1662 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1663 generating VxWorks PIC.
1664 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1665 (macro): Likewise, but do not treat la $25 specially for
1666 VxWorks PIC, and do not handle jal.
1667 (OPTION_MVXWORKS_PIC): New macro.
1668 (md_longopts): Add -mvxworks-pic.
1669 (md_parse_option): Don't complain about using PIC and -G together here.
1670 Handle OPTION_MVXWORKS_PIC.
1671 (md_estimate_size_before_relax): Always use the first relaxation
1672 sequence on VxWorks.
1673 * config/tc-mips.h (VXWORKS_PIC): New.
1675 2006-03-21 Paul Brook <paul@codesourcery.com>
1677 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1679 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1681 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1682 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1683 (get_loop_align_size): New.
1684 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1685 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1686 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1687 (get_noop_aligned_address): Use get_loop_align_size.
1688 (get_aligned_diff): Likewise.
1690 2006-03-21 Paul Brook <paul@codesourcery.com>
1692 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1694 2006-03-20 Paul Brook <paul@codesourcery.com>
1696 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1697 (do_t_branch): Encode branches inside IT blocks as unconditional.
1698 (do_t_cps): New function.
1699 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1700 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1701 (opcode_lookup): Allow conditional suffixes on all instructions in
1703 (md_assemble): Advance condexec state before checking for errors.
1704 (insns): Use do_t_cps.
1706 2006-03-20 Paul Brook <paul@codesourcery.com>
1708 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1709 outputting the insn.
1711 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1713 * config/tc-vax.c: Update copyright year.
1714 * config/tc-vax.h: Likewise.
1716 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1718 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1720 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1722 2006-03-17 Paul Brook <paul@codesourcery.com>
1724 * config/tc-arm.c (insns): Add ldm and stm.
1726 2006-03-17 Ben Elliston <bje@au.ibm.com>
1729 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1731 2006-03-16 Paul Brook <paul@codesourcery.com>
1733 * config/tc-arm.c (insns): Add "svc".
1735 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1737 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1738 flag and avoid double underscore prefixes.
1740 2006-03-10 Paul Brook <paul@codesourcery.com>
1742 * config/tc-arm.c (md_begin): Handle EABIv5.
1743 (arm_eabis): Add EF_ARM_EABI_VER5.
1744 * doc/c-arm.texi: Document -meabi=5.
1746 2006-03-10 Ben Elliston <bje@au.ibm.com>
1748 * app.c (do_scrub_chars): Simplify string handling.
1750 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1751 Daniel Jacobowitz <dan@codesourcery.com>
1752 Zack Weinberg <zack@codesourcery.com>
1753 Nathan Sidwell <nathan@codesourcery.com>
1754 Paul Brook <paul@codesourcery.com>
1755 Ricardo Anguiano <anguiano@codesourcery.com>
1756 Phil Edwards <phil@codesourcery.com>
1758 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1759 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1761 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1762 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1763 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1765 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1767 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1768 even when using the text-section-literals option.
1770 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1772 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1774 (m68k_ip): <case 'J'> Check we have some control regs.
1775 (md_parse_option): Allow raw arch switch.
1776 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1777 whether 68881 or cfloat was meant by -mfloat.
1778 (md_show_usage): Adjust extension display.
1779 (m68k_elf_final_processing): Adjust.
1781 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1783 * config/tc-avr.c (avr_mod_hash_value): New function.
1784 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1785 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1786 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1787 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1789 (tc_gen_reloc): Handle substractions of symbols, if possible do
1790 fixups, abort otherwise.
1791 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1792 tc_fix_adjustable): Define.
1794 2006-03-02 James E Wilson <wilson@specifix.com>
1796 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1797 change the template, then clear md.slot[curr].end_of_insn_group.
1799 2006-02-28 Jan Beulich <jbeulich@novell.com>
1801 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1803 2006-02-28 Jan Beulich <jbeulich@novell.com>
1806 * macro.c (getstring): Don't treat parentheses special anymore.
1807 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1808 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1811 2006-02-28 Mat <mat@csail.mit.edu>
1813 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1815 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1817 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1819 (CFI_signal_frame): Define.
1820 (cfi_pseudo_table): Add .cfi_signal_frame.
1821 (dot_cfi): Handle CFI_signal_frame.
1822 (output_cie): Handle cie->signal_frame.
1823 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1824 different. Copy signal_frame from FDE to newly created CIE.
1825 * doc/as.texinfo: Document .cfi_signal_frame.
1827 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1829 * doc/Makefile.am: Add html target.
1830 * doc/Makefile.in: Regenerate.
1831 * po/Make-in: Add html target.
1833 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1835 * config/tc-i386.c (output_insn): Support Intel Merom New
1838 * config/tc-i386.h (CpuMNI): New.
1839 (CpuUnknownFlags): Add CpuMNI.
1841 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1843 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1844 (hpriv_reg_table): New table for hyperprivileged registers.
1845 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1848 2006-02-24 DJ Delorie <dj@redhat.com>
1850 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1851 (tc_gen_reloc): Don't define.
1852 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1853 (OPTION_LINKRELAX): New.
1854 (md_longopts): Add it.
1856 (md_parse_options): Set it.
1857 (md_assemble): Emit relaxation relocs as needed.
1858 (md_convert_frag): Emit relaxation relocs as needed.
1859 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1860 (m32c_apply_fix): New.
1861 (tc_gen_reloc): New.
1862 (m32c_force_relocation): Force out jump relocs when relaxing.
1863 (m32c_fix_adjustable): Return false if relaxing.
1865 2006-02-24 Paul Brook <paul@codesourcery.com>
1867 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1868 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1869 (struct asm_barrier_opt): Define.
1870 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1871 (parse_psr): Accept V7M psr names.
1872 (parse_barrier): New function.
1873 (enum operand_parse_code): Add OP_oBARRIER.
1874 (parse_operands): Implement OP_oBARRIER.
1875 (do_barrier): New function.
1876 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1877 (do_t_cpsi): Add V7M restrictions.
1878 (do_t_mrs, do_t_msr): Validate V7M variants.
1879 (md_assemble): Check for NULL variants.
1880 (v7m_psrs, barrier_opt_names): New tables.
1881 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1882 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1883 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1884 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1885 (struct cpu_arch_ver_table): Define.
1886 (cpu_arch_ver): New.
1887 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1888 Tag_CPU_arch_profile.
1889 * doc/c-arm.texi: Document new cpu and arch options.
1891 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1893 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1895 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1897 * config/tc-ia64.c: Update copyright years.
1899 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1901 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1904 2005-02-22 Paul Brook <paul@codesourcery.com>
1906 * config/tc-arm.c (do_pld): Remove incorrect write to
1908 (encode_thumb32_addr_mode): Use correct operand.
1910 2006-02-21 Paul Brook <paul@codesourcery.com>
1912 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1914 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1915 Anil Paranjape <anilp1@kpitcummins.com>
1916 Shilin Shakti <shilins@kpitcummins.com>
1918 * Makefile.am: Add xc16x related entry.
1919 * Makefile.in: Regenerate.
1920 * configure.in: Added xc16x related entry.
1921 * configure: Regenerate.
1922 * config/tc-xc16x.h: New file
1923 * config/tc-xc16x.c: New file
1924 * doc/c-xc16x.texi: New file for xc16x
1925 * doc/all.texi: Entry for xc16x
1926 * doc/Makefile.texi: Added c-xc16x.texi
1927 * NEWS: Announce the support for the new target.
1929 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1931 * configure.tgt: set emulation for mips-*-netbsd*
1933 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1935 * config.in: Rebuilt.
1937 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1939 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1940 from 1, not 0, in error messages.
1941 (md_assemble): Simplify special-case check for ENTRY instructions.
1942 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1943 operand in error message.
1945 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1947 * configure.tgt (arm-*-linux-gnueabi*): Change to
1950 2006-02-10 Nick Clifton <nickc@redhat.com>
1952 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1953 32-bit value is propagated into the upper bits of a 64-bit long.
1955 * config/tc-arc.c (init_opcode_tables): Fix cast.
1956 (arc_extoper, md_operand): Likewise.
1958 2006-02-09 David Heine <dlheine@tensilica.com>
1960 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1961 each relaxation step.
1963 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1965 * configure.in (CHECK_DECLS): Add vsnprintf.
1966 * configure: Regenerate.
1967 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1968 include/declare here, but...
1969 * as.h: Move code detecting VARARGS idiom to the top.
1970 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1971 (vsnprintf): Declare if not already declared.
1973 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1975 * as.c (close_output_file): New.
1976 (main): Register close_output_file with xatexit before
1977 dump_statistics. Don't call output_file_close.
1979 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1981 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1982 mcf5329_control_regs): New.
1983 (not_current_architecture, selected_arch, selected_cpu): New.
1984 (m68k_archs, m68k_extensions): New.
1985 (archs): Renamed to ...
1986 (m68k_cpus): ... here. Adjust.
1988 (md_pseudo_table): Add arch and cpu directives.
1989 (find_cf_chip, m68k_ip): Adjust table scanning.
1990 (no_68851, no_68881): Remove.
1991 (md_assemble): Lazily initialize.
1992 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1993 (md_init_after_args): Move functionality to m68k_init_arch.
1994 (mri_chip): Adjust table scanning.
1995 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1996 options with saner parsing.
1997 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1998 m68k_init_arch): New.
1999 (s_m68k_cpu, s_m68k_arch): New.
2000 (md_show_usage): Adjust.
2001 (m68k_elf_final_processing): Set CF EF flags.
2002 * config/tc-m68k.h (m68k_init_after_args): Remove.
2003 (tc_init_after_args): Remove.
2004 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2005 (M68k-Directives): Document .arch and .cpu directives.
2007 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2009 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2010 synonyms for equ and defl.
2011 (z80_cons_fix_new): New function.
2012 (emit_byte): Disallow relative jumps to absolute locations.
2013 (emit_data): Only handle defb, prototype changed, because defb is
2014 now handled as pseudo-op rather than an instruction.
2015 (instab): Entries for defb,defw,db,dw moved from here...
2016 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2017 Add entries for def24,def32,d24,d32.
2018 (md_assemble): Improved error handling.
2019 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2020 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2021 (z80_cons_fix_new): Declare.
2022 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2023 (def24,d24,def32,d32): New pseudo-ops.
2025 2006-02-02 Paul Brook <paul@codesourcery.com>
2027 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2029 2005-02-02 Paul Brook <paul@codesourcery.com>
2031 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2032 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2033 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2034 T2_OPCODE_RSB): Define.
2035 (thumb32_negate_data_op): New function.
2036 (md_apply_fix): Use it.
2038 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2040 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2042 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2043 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2045 (relaxation_requirements): Add pfinish_frag argument and use it to
2046 replace setting tinsn->record_fix fields.
2047 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2048 and vinsn_to_insnbuf. Remove references to record_fix and
2049 slot_sub_symbols fields.
2050 (xtensa_mark_narrow_branches): Delete unused code.
2051 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2053 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2055 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2056 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2057 of the record_fix field. Simplify error messages for unexpected
2059 (set_expr_symbol_offset_diff): Delete.
2061 2006-01-31 Paul Brook <paul@codesourcery.com>
2063 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2065 2006-01-31 Paul Brook <paul@codesourcery.com>
2066 Richard Earnshaw <rearnsha@arm.com>
2068 * config/tc-arm.c: Use arm_feature_set.
2069 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2070 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2071 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2074 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2075 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2076 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2077 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2079 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2080 (arm_opts): Move old cpu/arch options from here...
2081 (arm_legacy_opts): ... to here.
2082 (md_parse_option): Search arm_legacy_opts.
2083 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2084 (arm_float_abis, arm_eabis): Make const.
2086 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2088 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2090 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2092 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2093 in load immediate intruction.
2095 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2097 * config/bfin-parse.y (value_match): Use correct conversion
2098 specifications in template string for __FILE__ and __LINE__.
2102 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2104 Introduce TLS descriptors for i386 and x86_64.
2105 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2106 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2107 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2108 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2109 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2111 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2112 (lex_got): Handle @tlsdesc and @tlscall.
2113 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2115 2006-01-11 Nick Clifton <nickc@redhat.com>
2117 Fixes for building on 64-bit hosts:
2118 * config/tc-avr.c (mod_index): New union to allow conversion
2119 between pointers and integers.
2120 (md_begin, avr_ldi_expression): Use it.
2121 * config/tc-i370.c (md_assemble): Add cast for argument to print
2123 * config/tc-tic54x.c (subsym_substitute): Likewise.
2124 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2125 opindex field of fr_cgen structure into a pointer so that it can
2126 be stored in a frag.
2127 * config/tc-mn10300.c (md_assemble): Likewise.
2128 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2130 * config/tc-v850.c: Replace uses of (int) casts with correct
2133 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2136 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2138 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2141 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2142 a local-label reference.
2144 For older changes see ChangeLog-2005
2150 version-control: never
projects / thirdparty / binutils-gdb.git / blob