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[AArch64] Add GAS recognition for "xgene-1"
[thirdparty/binutils-gdb.git] / gas / ChangeLog
1 2013-01-07 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2
3 * config/tc-aarch64.c (aarch64_cpus): Add entry for "xgene-1"
4
5 2013-12-20 Tristan Gingold <gingold@adacore.com>
6
7 * doc/c-arm.texi (ARM Directives): Remove duplicate .pad entry.
8
9 2013-12-18 Yufeng Zhang <yufeng.zhang@arm.com>
10
11 * config/tc-aarch64.c (md_assemble): Defer the feature checking until
12 do_encode () succeeds.
13
14 2013-12-18 Nick Clifton <nickc@redhat.com>
15
16 * config/tc-rx.c (rx_include): Rename 'eof' to 'last_char' in
17 order to avoid conflict with same named variable in MinGW system
18 header file.
19
20 2013-12-13 Nick Clifton <nickc@redhat.com>
21
22 * config/tc-msp430.c (mcu_types): Add some more 430X mcu names.
23 (OPTION_INTR_NOPS): Define.
24 (gen_interrupt_nops): Default to FALSE.
25 (md_parse_opton): Add support for OPTION_INTR_NOPS.
26 (md_longopts): Add -mn.
27 (md_show_usage): Add -mn.
28 (msp430_operands): Generate NOPs for all MCUs not just 430Xv2.
29 * doc/c-msp430.c: Document -mn.
30
31 2013-12-13 Kuan-Lin Chen <kuanlinchentw@gmail.com>
32 Wei-Cheng Wang <cole945@gmail.com>
33 Hsiang-Kai Wang <hsiangkai@gmail.com>
34 Hui-Wen Ni <sabrinanitw@gmail.com>
35
36 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c.
37 (TARGET_CPU_HFILES): Add config/tc-nds32.h.
38 * Makefile.in: Regenerate.
39 * configure.in (nds32): Add nds32 target extension config support.
40 * configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*.
41 * configure: Regenerate.
42 * config/tc-nds32.c: New file for nds32.
43 * config/tc-nds32.h: New file for nds32.
44 * doc/Makefile.am (CPU_DOCS): Add c-nds32.texi.
45 * doc/Makefile.in: Regenerate.
46 * doc/as.texinfo: Add nds32 options.
47 * doc/all.texi: Set NDS32.
48 * doc/c-nds32.texi: New file dor nds32 document.
49 * NEWS: Announce Andes nds32 support.
50
51 2013-12-10 Roland McGrath <mcgrathr@google.com>
52
53 * Makefile.am (install-exec-bindir): Prefix libtool invocation
54 with $(INSTALL_PROGRAM_ENV).
55 (install-exec-tooldir): Likewise.
56 * Makefile.in: Regenerate.
57
58 2013-12-07 Mike Frysinger <vapier@gentoo.org>
59
60 * config/bfin-aux.h: Remove +x file mode.
61 * config/tc-epiphany.c: Likewise.
62 * config/tc-epiphany.h: Likewise.
63
64 2013-12-03 Tristan Gingold <gingold@adacore.com>
65
66 * config/tc-i386-intel.c (i386_intel_simplify): Avoid arithmetic
67 overflow on pointers.
68
69 2013-11-19 Yufeng Zhang <yufeng.zhang@arm.com>
70
71 Revert
72
73 2013-11-19 Nick Clifton <nickc@redhat.com>
74
75 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
76 for deprecated system registers when parsing pstate fields.
77
78 2013-11-19 Nick Clifton <nickc@redhat.com>
79
80 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
81 for deprecated system registers when parsing pstate fields.
82
83 2013-11-19 Catherine Moore <clm@codesourcery.com>
84
85 * config/tc-mips.c (mips_fix_pmc_rm7000): Declare.
86 (options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000.
87 (md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000.
88 (INSN_DMULT): Define.
89 (INSN_DMULTU): Define.
90 (insns_between): Detect PMC RM7000 errata.
91 (md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and
92 OPTION_NO_FIX_PMC_RM7000.
93 * doc/as.texinfo: Document new options.
94 * doc/c-mips.texi: Likewise.
95
96 2013-11-19 Alexey Makhalov <makhaloff@gmail.com>
97
98 PR gas/16109
99 * app.c (do_scrub_chars): Only insert a newline character if
100 end-of-file has been reached.
101
102 2013-11-18 H.J. Lu <hongjiu.lu@intel.com>
103
104 * config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix"
105 argument.
106
107 2013-11-18 Renlin Li <Renlin.Li@arm.com>
108
109 * config/tc-arm.c (arm_archs): New armv7ve architecture option.
110 (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
111 ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
112 (cpu_arch_ver): Likewise.
113 * doc/c-arm.texi: Document armv7ve.
114
115 2013-11-18 Zhenqiang Chen <zhenqiang.chen@linaro.org>
116
117 * config/tc-aarch64.c (parse_sys_reg): Support
118 S2_<op1>_<Cn>_<Cm>_<op2>.
119
120 2013-11-18 Yufeng Zhang <yufeng.zhang@arm.com>
121
122 Revert
123
124 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
125
126 * config/tc-aarch64.c (set_other_error): New function.
127 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
128 the variable to which it points with 'o'.
129 (parse_operands): Update; check for write to read-only system
130 registers or read from write-only ones.
131
132 2013-11-17 H.J. Lu <hongjiu.lu@intel.com>
133
134 * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
135 indicate if instruction has the BND prefix. Return
136 BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
137 bnd_prefix isn't zero.
138 (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
139 if needed.
140 (output_jump): Update reloc call.
141 (output_interseg_jump): Likewise.
142 (output_disp): Likewise.
143 (output_imm): Likewise.
144 (x86_cons_fix_new): Likewise.
145 (lex_got): Add an argument, bnd_prefix, to indicate if
146 instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
147 if needed.
148 (x86_cons): Update lex_got call.
149 (i386_immediate): Likewise.
150 (i386_displacement): Likewise.
151 (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
152 BFD_RELOC_X86_64_PLT32_BND.
153 (tc_gen_reloc): Likewise.
154 * config/tc-i386-intel.c (i386_operator): Update lex_got call.
155
156 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
157
158 * config/tc-aarch64.c (set_other_error): New function.
159 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
160 the variable to which it points with 'o'.
161 (parse_operands): Update; check for write to read-only system
162 registers or read from write-only ones.
163
164 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
165
166 * config/tc-i386.c (check_VecOperands): Reorder checks.
167
168 2013-11-11 Catherine Moore <clm@codesourcery.com>
169
170 * config/mips/tc-mips.c (convert_reg_type): Use
171 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
172 (reg_needs_delay): Likewise.
173 (insns_between): Likewise.
174
175 2013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
176
177 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
178
179 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
180
181 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
182 call aarch64_sys_reg_deprecated_p and warn about the deprecated
183 system registers.
184
185 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
186
187 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
188
189 2013-11-05 Will Newton <will.newton@linaro.org>
190
191 PR gas/16103
192 * config/tc-aarch64.c (parse_operands): Avoid trying to
193 parse a vector register as an immediate.
194
195 2013-11-04 Jan Beulich <jbeulich@suse.com>
196
197 * config/tc-i386.c (check_long_reg): Correct comment indentation.
198 (check_qword_reg): Correct comment and its indentation.
199 (check_word_reg): Extend comment and correct its indentation. Also
200 check for 64-bit register.
201
202 2013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
203
204 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
205 (ppc_elf_localentry): New function.
206 (ppc_force_relocation): Force relocs on all branches to localenty
207 symbols.
208 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
209
210 2013-10-30 Alan Modra <amodra@gmail.com>
211
212 * config/tc-ppc.c: Include elf/ppc64.h.
213 (ppc_abiversion): New variable.
214 (md_pseudo_table): Add .abiversion.
215 (ppc_elf_abiversion, ppc_elf_end): New functions.
216 * config/tc-ppc.h (md_end): Define.
217
218 2013-10-30 Alan Modra <amodra@gmail.com>
219
220 * config/tc-ppc.c (SEX16): Don't mask.
221 (REPORT_OVERFLOW_HI): Define as zero.
222 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
223 @tprel@high, and @tprel@higha modifiers.
224 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
225 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
226 Handle new relocs.
227 (md_apply_fix): Similarly.
228
229 2013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
230
231 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
232 (fpr_write_mask): Test MSA registers.
233 (can_swap_branch_p): Check fpr write followed by fpr read.
234
235 2013-10-18 Nick Clifton <nickc@redhat.com>
236
237 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
238
239 2013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
240 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
241
242 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
243 (md_longopts): Add mmsa and mno-msa.
244 (mips_ases): Add msa.
245 (RTYPE_MASK): Update.
246 (RTYPE_MSA): New define.
247 (OT_REG_ELEMENT): Replace with...
248 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
249 (mips_operand_token): Replace reg_element with index.
250 (mips_parse_argument_token): Treat vector indices as separate tokens.
251 Handle register indices.
252 (md_begin): Add MSA register names.
253 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
254 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
255 (match_mdmx_imm_reg_operand): Update accordingly.
256 (match_imm_index_operand): New function.
257 (match_reg_index_operand): New function.
258 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
259 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
260 (md_show_usage): Print -mmsa and -mno-msa.
261 * doc/as.texinfo: Document -mmsa and -mno-msa.
262 * doc/c-mips.texi: Document -mmsa and -mno-msa.
263 Document .set msa and .set nomsa.
264
265 2013-10-14 Nick Clifton <nickc@redhat.com>
266
267 * read.c (add_include_dir): Use xrealloc.
268 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
269 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
270
271 2013-10-13 Sandra Loosemore <sandra@codesourcery.com>
272
273 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
274 also test/refer to "sstatus". Reformat the warning message.
275
276 2013-10-10 Sean Keys <skeys@ipdatasys.com>
277
278 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
279
280 2013-10-10 Jan Beulich <jbeulich@suse.com>
281
282 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
283 swapping for bndmk, bndldx, and bndstx.
284
285 2013-10-09 Nick Clifton <nickc@redhat.com>
286
287 PR gas/16025
288 * config/tc-epiphany.c (md_convert_frag): Add missing break
289 statement.
290
291 PR gas/16026
292 * config/tc-mn10200.c (md_convert_frag): Add missing break
293 statement.
294
295 2013-10-08 Jan Beulich <jbeulich@suse.com>
296
297 * tc-i386.c (check_word_reg): Remove misplaced "else".
298 (check_long_reg): Restore symmetry with check_word_reg.
299
300 2013-10-08 Jan Beulich <jbeulich@suse.com>
301
302 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
303 LR/PC check.
304
305 2013-10-08 Nick Clifton <nickc@redhat.com>
306
307 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
308 for "<foo>a". Issue error messages for unrecognised or corrrupt
309 size extensions.
310
311 2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
312
313 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
314 possible.
315
316 2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
317
318 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
319 * doc/c-i386.texi: Add -march=bdver4 option.
320
321 2013-09-20 Alan Modra <amodra@gmail.com>
322
323 * configure: Regenerate.
324
325 2013-09-18 Tristan Gingold <gingold@adacore.com>
326
327 * NEWS: Add marker for 2.24.
328
329 2013-09-18 Nick Clifton <nickc@redhat.com>
330
331 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
332 (move_data): New variable.
333 (md_parse_option): Parse -md.
334 (msp430_section): New function. Catch references to the .bss or
335 .data sections and generate a special symbol for use by the libcrt
336 library.
337 (md_pseudo_table): Intercept .section directives.
338 (md_longopt): Add -md
339 (md_show_usage): Likewise.
340 (msp430_operands): Generate a warning message if a NOP is inserted
341 into the instruction stream.
342 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
343
344 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
345
346 * config/tc-mips.c (mips_elf_final_processing): Set
347 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
348
349 2013-09-16 Will Newton <will.newton@linaro.org>
350
351 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
352 disallowing element size 64 with interleave other than 1.
353
354 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
355
356 * config/tc-mips.c (match_insn): Set error when $31 is used for
357 bltzal* and bgezal*.
358
359 2013-09-04 Tristan Gingold <gingold@adacore.com>
360
361 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
362 symbols.
363
364 2013-09-04 Roland McGrath <mcgrathr@google.com>
365
366 PR gas/15914
367 * config/tc-arm.c (T16_32_TAB): Add _udf.
368 (do_t_udf): New function.
369 (insns): Add "udf".
370
371 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
372
373 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
374 assembler errors at correct position.
375
376 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
377
378 PR binutils/15834
379 * config/tc-ia64.c: Fix typos.
380 * config/tc-sparc.c: Likewise.
381 * config/tc-z80.c: Likewise.
382 * doc/c-i386.texi: Likewise.
383 * doc/c-m32r.texi: Likewise.
384
385 2013-08-23 Will Newton <will.newton@linaro.org>
386
387 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
388 for pre-indexed addressing modes.
389
390 2013-08-21 Alan Modra <amodra@gmail.com>
391
392 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
393 range check label number for use with fb_low_counter array.
394
395 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
396
397 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
398 (mips_parse_argument_token, validate_micromips_insn, md_begin)
399 (check_regno, match_float_constant, check_completed_insn, append_insn)
400 (match_insn, match_mips16_insn, match_insns, macro_start)
401 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
402 (mips16_ip, mips_set_option_string, md_parse_option)
403 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
404 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
405 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
406 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
407 Start error messages with a lower-case letter. Do not end error
408 messages with a period. Wrap long messages to 80 character-lines.
409 Use "cannot" instead of "can't" and "can not".
410
411 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
412
413 * config/tc-mips.c (imm_expr): Expand comment.
414 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
415 when populated.
416
417 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
418
419 * config/tc-mips.c (imm2_expr): Delete.
420 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
421
422 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
423
424 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
425 (macro): Remove M_DEXT and M_DINS handling.
426
427 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
428
429 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
430 lax_max with lax_match.
431 (match_int_operand): Update accordingly. Don't report an error
432 for !lax_match-only cases.
433 (match_insn): Replace more_alts with lax_match and use it to
434 initialize the mips_arg_info field. Add a complete_p parameter.
435 Handle implicit VU0 suffixes here.
436 (match_invalid_for_isa, match_insns, match_mips16_insns): New
437 functions.
438 (mips_ip, mips16_ip): Use them.
439
440 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
441
442 * config/tc-mips.c (match_expression): Report uses of registers here.
443 Add a "must be an immediate expression" error. Handle elided offsets
444 here rather than...
445 (match_int_operand): ...here.
446
447 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
448
449 * config/tc-mips.c (mips_arg_info): Remove soft_match.
450 (match_out_of_range, match_not_constant): New functions.
451 (match_const_int): Remove fallback parameter and check for soft_match.
452 Use match_not_constant.
453 (match_mapped_int_operand, match_addiusp_operand)
454 (match_perf_reg_operand, match_save_restore_list_operand)
455 (match_mdmx_imm_reg_operand): Update accordingly. Use
456 match_out_of_range and set_insn_error* instead of as_bad.
457 (match_int_operand): Likewise. Use match_not_constant in the
458 !allows_nonconst case.
459 (match_float_constant): Report invalid float constants.
460 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
461 match_float_constant to check for invalid constants. Fail the
462 match if match_const_int or match_float_constant return false.
463 (mips_ip): Update accordingly.
464 (mips16_ip): Likewise. Undo null termination of instruction name
465 once lookup is complete.
466
467 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
468
469 * config/tc-mips.c (mips_insn_error_format): New enum.
470 (mips_insn_error): New struct.
471 (insn_error): Change to a mips_insn_error.
472 (clear_insn_error, set_insn_error_format, set_insn_error)
473 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
474 functions.
475 (mips_parse_argument_token, md_assemble, match_insn)
476 (match_mips16_insn): Use them instead of manipulating insn_error
477 directly.
478 (mips_ip, mips16_ip): Likewise. Simplify control flow.
479
480 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
481
482 * config/tc-mips.c (normalize_constant_expr): Move further up file.
483 (normalize_address_expr): Likewise.
484 (match_insn, match_mips16_insn): New functions, split out from...
485 (mips_ip, mips16_ip): ...here.
486
487 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
488
489 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
490 OP_OPTIONAL_REG.
491 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
492 for optional operands.
493
494 2013-08-16 Alan Modra <amodra@gmail.com>
495
496 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
497 modifiers generally.
498
499 2013-08-16 Alan Modra <amodra@gmail.com>
500
501 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
502
503 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
504
505 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
506 argument as alignment.
507
508 2013-08-09 Nick Clifton <nickc@redhat.com>
509
510 * config/tc-rl78.c (elf_flags): New variable.
511 (enum options): Add OPTION_G10.
512 (md_longopts): Add mg10.
513 (md_parse_option): Parse -mg10.
514 (rl78_elf_final_processing): New function.
515 * config/tc-rl78.c (tc_final_processing): Define.
516 * doc/c-rl78.texi: Document -mg10 option.
517
518 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
519
520 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
521 suffixes to be elided too.
522 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
523 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
524 to be omitted too.
525
526 2013-08-05 John Tytgat <john@bass-software.com>
527
528 * po/POTFILES.in: Regenerate.
529
530 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
531 Konrad Eisele <konrad@gaisler.com>
532
533 * config/tc-sparc.c (sparc_arch_types): Add leon.
534 (sparc_arch): Move sparc4 around and add leon.
535 (sparc_target_format): Document -Aleon.
536 * doc/c-sparc.texi: Likewise.
537
538 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
539
540 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
541
542 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
543 Richard Sandiford <rdsandiford@googlemail.com>
544
545 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
546 (RWARN): Bump to 0x8000000.
547 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
548 (RTYPE_R5900_ACC): New register types.
549 (RTYPE_MASK): Include them.
550 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
551 macros.
552 (reg_names): Include them.
553 (mips_parse_register_1): New function, split out from...
554 (mips_parse_register): ...here. Add a channels_ptr parameter.
555 Look for VU0 channel suffixes when nonnull.
556 (reg_lookup): Update the call to mips_parse_register.
557 (mips_parse_vu0_channels): New function.
558 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
559 (mips_operand_token): Add a "channels" field to the union.
560 Extend the comment above "ch" to OT_DOUBLE_CHAR.
561 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
562 (mips_parse_argument_token): Handle channel suffixes here too.
563 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
564 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
565 Handle '#' formats.
566 (md_begin): Register $vfN and $vfI registers.
567 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
568 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
569 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
570 (match_vu0_suffix_operand): New function.
571 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
572 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
573 (mips_lookup_insn): New function.
574 (mips_ip): Use it. Allow "+K" operands to be elided at the end
575 of an instruction. Handle '#' sequences.
576
577 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
578
579 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
580 values and use it instead of sreg, treg, xreg, etc.
581
582 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
583
584 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
585 and mips_int_operand_max.
586 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
587 Delete.
588 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
589 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
590 instead of mips16_immed_operand.
591
592 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
593
594 * config/tc-mips.c (mips16_macro): Don't use move_register.
595 (mips16_ip): Allow macros to use 'p'.
596
597 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
598
599 * config/tc-mips.c (MAX_OPERANDS): New macro.
600 (mips_operand_array): New structure.
601 (mips_operands, mips16_operands, micromips_operands): New arrays.
602 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
603 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
604 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
605 (micromips_to_32_reg_q_map): Delete.
606 (insn_operands, insn_opno, insn_extract_operand): New functions.
607 (validate_mips_insn): Take a mips_operand_array as argument and
608 use it to build up a list of operands. Extend to handle INSN_MACRO
609 and MIPS16.
610 (validate_mips16_insn): New function.
611 (validate_micromips_insn): Take a mips_operand_array as argument.
612 Handle INSN_MACRO.
613 (md_begin): Initialize mips_operands, mips16_operands and
614 micromips_operands. Call validate_mips_insn and
615 validate_micromips_insn for macro instructions too.
616 Call validate_mips16_insn for MIPS16 instructions.
617 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
618 New functions.
619 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
620 them. Handle INSN_UDI.
621 (get_append_method): Use gpr_read_mask.
622
623 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
624
625 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
626 flags for MIPS16 and non-MIPS16 instructions.
627 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
628 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
629 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
630 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
631 and non-MIPS16 instructions. Fix formatting.
632
633 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
634
635 * config/tc-mips.c (reg_needs_delay): Move later in file.
636 Use gpr_write_mask.
637 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
638
639 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
640 Alexander Ivchenko <alexander.ivchenko@intel.com>
641 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
642 Sergey Lega <sergey.s.lega@intel.com>
643 Anna Tikhonova <anna.tikhonova@intel.com>
644 Ilya Tocar <ilya.tocar@intel.com>
645 Andrey Turetskiy <andrey.turetskiy@intel.com>
646 Ilya Verbin <ilya.verbin@intel.com>
647 Kirill Yukhin <kirill.yukhin@intel.com>
648 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
649
650 * config/tc-i386-intel.c (O_zmmword_ptr): New.
651 (i386_types): Add zmmword.
652 (i386_intel_simplify_register): Allow regzmm.
653 (i386_intel_simplify): Handle zmmwords.
654 (i386_intel_operand): Handle RC/SAE, vector operations and
655 zmmwords.
656 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
657 (struct RC_Operation): New.
658 (struct Mask_Operation): New.
659 (struct Broadcast_Operation): New.
660 (vex_prefix): Size of bytes increased to 4 to support EVEX
661 encoding.
662 (enum i386_error): Add new error codes: unsupported_broadcast,
663 broadcast_not_on_src_operand, broadcast_needed,
664 unsupported_masking, mask_not_on_destination, no_default_mask,
665 unsupported_rc_sae, rc_sae_operand_not_last_imm,
666 invalid_register_operand, try_vector_disp8.
667 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
668 rounding, broadcast, memshift.
669 (struct RC_name): New.
670 (RC_NamesTable): New.
671 (evexlig): New.
672 (evexwig): New.
673 (extra_symbol_chars): Add '{'.
674 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
675 (i386_operand_type): Add regzmm, regmask and vec_disp8.
676 (match_mem_size): Handle zmmwords.
677 (operand_type_match): Handle zmm-registers.
678 (mode_from_disp_size): Handle vec_disp8.
679 (fits_in_vec_disp8): New.
680 (md_begin): Handle {} properly.
681 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
682 (build_vex_prefix): Handle vrex.
683 (build_evex_prefix): New.
684 (process_immext): Adjust to properly handle EVEX.
685 (md_assemble): Add EVEX encoding support.
686 (swap_2_operands): Correctly handle operands with masking,
687 broadcasting or RC/SAE.
688 (check_VecOperands): Support EVEX features.
689 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
690 (match_template): Support regzmm and handle new error codes.
691 (process_suffix): Handle zmmwords and zmm-registers.
692 (check_byte_reg): Extend to zmm-registers.
693 (process_operands): Extend to zmm-registers.
694 (build_modrm_byte): Handle EVEX.
695 (output_insn): Adjust to properly handle EVEX case.
696 (disp_size): Handle vec_disp8.
697 (output_disp): Support compressed disp8*N evex feature.
698 (output_imm): Handle RC/SAE immediates properly.
699 (check_VecOperations): New.
700 (i386_immediate): Handle EVEX features.
701 (i386_index_check): Handle zmmwords and zmm-registers.
702 (RC_SAE_immediate): New.
703 (i386_att_operand): Handle EVEX features.
704 (parse_real_register): Add a check for ZMM/Mask registers.
705 (OPTION_MEVEXLIG): New.
706 (OPTION_MEVEXWIG): New.
707 (md_longopts): Add mevexlig and mevexwig.
708 (md_parse_option): Handle mevexlig and mevexwig options.
709 (md_show_usage): Add description for mevexlig and mevexwig.
710 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
711 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
712
713 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
714
715 * config/tc-i386.c (cpu_arch): Add .sha.
716 * doc/c-i386.texi: Document sha/.sha.
717
718 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
719 Kirill Yukhin <kirill.yukhin@intel.com>
720 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
721
722 * config/tc-i386.c (BND_PREFIX): New.
723 (struct _i386_insn): Add new field bnd_prefix.
724 (add_bnd_prefix): New.
725 (cpu_arch): Add MPX.
726 (i386_operand_type): Add regbnd.
727 (md_assemble): Handle BND prefixes.
728 (parse_insn): Likewise.
729 (output_branch): Likewise.
730 (output_jump): Likewise.
731 (build_modrm_byte): Handle regbnd.
732 (OPTION_MADD_BND_PREFIX): New.
733 (md_longopts): Add entry for 'madd-bnd-prefix'.
734 (md_parse_option): Handle madd-bnd-prefix option.
735 (md_show_usage): Add description for madd-bnd-prefix
736 option.
737 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
738
739 2013-07-24 Tristan Gingold <gingold@adacore.com>
740
741 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
742 xcoff targets.
743
744 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
745
746 * config/tc-s390.c (s390_machine): Don't force the .machine
747 argument to lower case.
748
749 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
750
751 * config/tc-arm.c (s_arm_arch_extension): Improve error message
752 for invalid extension.
753
754 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
755
756 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
757 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
758 (aarch64_abi): New variable.
759 (ilp32_p): Change to be a macro.
760 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
761 (struct aarch64_option_abi_value_table): New struct.
762 (aarch64_abis): New table.
763 (aarch64_parse_abi): New function.
764 (aarch64_long_opts): Add entry for -mabi=.
765 * doc/as.texinfo (Target AArch64 options): Document -mabi.
766 * doc/c-aarch64.texi: Likewise.
767
768 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
769
770 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
771 unsigned comparison.
772
773 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
774
775 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
776 RX610.
777 * config/rx-parse.y: (rx_check_float_support): Add function to
778 check floating point operation support for target RX100 and
779 RX200.
780 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
781 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
782 RX200, RX600, and RX610
783
784 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
785
786 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
787
788 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
789
790 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
791 * doc/c-avr.texi: Likewise.
792
793 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
794
795 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
796 error with older GCCs.
797 (mips16_macro_build): Dereference args.
798
799 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
800
801 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
802 New functions, split out from...
803 (reg_lookup): ...here. Remove itbl support.
804 (reglist_lookup): Delete.
805 (mips_operand_token_type): New enum.
806 (mips_operand_token): New structure.
807 (mips_operand_tokens): New variable.
808 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
809 (mips_parse_arguments): New functions.
810 (md_begin): Initialize mips_operand_tokens.
811 (mips_arg_info): Add a token field. Remove optional_reg field.
812 (match_char, match_expression): New functions.
813 (match_const_int): Use match_expression. Remove "s" argument
814 and return a boolean result. Remove O_register handling.
815 (match_regno, match_reg, match_reg_range): New functions.
816 (match_int_operand, match_mapped_int_operand, match_msb_operand)
817 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
818 (match_addiusp_operand, match_clo_clz_dest_operand)
819 (match_lwm_swm_list_operand, match_entry_exit_operand)
820 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
821 (match_tied_reg_operand): Remove "s" argument and return a boolean
822 result. Match tokens rather than text. Update calls to
823 match_const_int. Rely on match_regno to call check_regno.
824 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
825 "arg" argument. Return a boolean result.
826 (parse_float_constant): Replace with...
827 (match_float_constant): ...this new function.
828 (match_operand): Remove "s" argument and return a boolean result.
829 Update calls to subfunctions.
830 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
831 rather than string-parsing routines. Update handling of optional
832 registers for token scheme.
833
834 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
835
836 * config/tc-mips.c (parse_float_constant): Split out from...
837 (mips_ip): ...here.
838
839 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
840
841 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
842 Delete.
843
844 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
845
846 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
847 (match_entry_exit_operand): New function.
848 (match_save_restore_list_operand): Likewise.
849 (match_operand): Use them.
850 (check_absolute_expr): Delete.
851 (mips16_ip): Rewrite main parsing loop to use mips_operands.
852
853 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
854
855 * config/tc-mips.c: Enable functions commented out in previous patch.
856 (SKIP_SPACE_TABS): Move further up file.
857 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
858 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
859 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
860 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
861 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
862 (micromips_imm_b_map, micromips_imm_c_map): Delete.
863 (mips_lookup_reg_pair): Delete.
864 (macro): Use report_bad_range and report_bad_field.
865 (mips_immed, expr_const_in_range): Delete.
866 (mips_ip): Rewrite main parsing loop to use new functions.
867
868 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
869
870 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
871 Change return type to bfd_boolean.
872 (report_bad_range, report_bad_field): New functions.
873 (mips_arg_info): New structure.
874 (match_const_int, convert_reg_type, check_regno, match_int_operand)
875 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
876 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
877 (match_addiusp_operand, match_clo_clz_dest_operand)
878 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
879 (match_pc_operand, match_tied_reg_operand, match_operand)
880 (check_completed_insn): New functions, commented out for now.
881
882 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
883
884 * config/tc-mips.c (insn_insert_operand): New function.
885 (macro_build, mips16_macro_build): Put null character check
886 in the for loop and convert continues to breaks. Use operand
887 structures to handle constant operands.
888
889 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
890
891 * config/tc-mips.c (validate_mips_insn): Move further up file.
892 Add insn_bits and decode_operand arguments. Use the mips_operand
893 fields to work out which bits an operand occupies. Detect double
894 definitions.
895 (validate_micromips_insn): Move further up file. Call into
896 validate_mips_insn.
897
898 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
899
900 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
901
902 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
903
904 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
905 and "~".
906 (macro): Update accordingly.
907
908 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
909
910 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
911 (imm_reloc): Delete.
912 (md_assemble): Remove imm_reloc handling.
913 (mips_ip): Update commentary. Use offset_expr and offset_reloc
914 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
915 Use a temporary array rather than imm_reloc when parsing
916 constant expressions. Remove imm_reloc initialization.
917 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
918 for the relaxable field. Use a relax_char variable to track the
919 type of this field. Remove imm_reloc initialization.
920
921 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
922
923 * config/tc-mips.c (mips16_ip): Handle "I".
924
925 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
926
927 * config/tc-mips.c (mips_flag_nan2008): New variable.
928 (options): Add OPTION_NAN enum value.
929 (md_longopts): Handle it.
930 (md_parse_option): Likewise.
931 (s_nan): New function.
932 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
933 (md_show_usage): Add -mnan.
934
935 * doc/as.texinfo (Overview): Add -mnan.
936 * doc/c-mips.texi (MIPS Opts): Document -mnan.
937 (MIPS NaN Encodings): New node. Document .nan directive.
938 (MIPS-Dependent): List the new node.
939
940 2013-07-09 Tristan Gingold <gingold@adacore.com>
941
942 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
943
944 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
945
946 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
947 for 'A' and assume that the constant has been elided if the result
948 is an O_register.
949
950 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
951
952 * config/tc-mips.c (gprel16_reloc_p): New function.
953 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
954 BFD_RELOC_UNUSED.
955 (offset_high_part, small_offset_p): New functions.
956 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
957 register load and store macros, handle the 16-bit offset case first.
958 If a 16-bit offset is not suitable for the instruction we're
959 generating, load it into the temporary register using
960 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
961 M_L_DAB code once the address has been constructed. For double load
962 and store macros, again handle the 16-bit offset case first.
963 If the second register cannot be accessed from the same high
964 part as the first, load it into AT using ADDRESS_ADDI_INSN.
965 Fix the handling of LD in cases where the first register is the
966 same as the base. Also handle the case where the offset is
967 not 16 bits and the second register cannot be accessed from the
968 same high part as the first. For unaligned loads and stores,
969 fuse the offbits == 12 and old "ab" handling. Apply this handling
970 whenever the second offset needs a different high part from the first.
971 Construct the offset using ADDRESS_ADDI_INSN where possible,
972 for offbits == 16 as well as offbits == 12. Use offset_reloc
973 when constructing the individual loads and stores.
974 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
975 and offset_reloc before matching against a particular opcode.
976 Handle elided 'A' constants. Allow 'A' constants to use
977 relocation operators.
978
979 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
980
981 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
982 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
983 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
984
985 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
986
987 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
988 Require the msb to be <= 31 for "+s". Check that the size is <= 31
989 for both "+s" and "+S".
990
991 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
992
993 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
994 (mips_ip, mips16_ip): Handle "+i".
995
996 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
997
998 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
999 (micromips_to_32_reg_h_map): Rename to...
1000 (micromips_to_32_reg_h_map1): ...this.
1001 (micromips_to_32_reg_i_map): Rename to...
1002 (micromips_to_32_reg_h_map2): ...this.
1003 (mips_lookup_reg_pair): New function.
1004 (gpr_write_mask, macro): Adjust after above renaming.
1005 (validate_micromips_insn): Remove "mi" handling.
1006 (mips_ip): Likewise. Parse both registers in a pair for "mh".
1007
1008 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
1009
1010 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
1011 (mips_ip): Remove "+D" and "+T" handling.
1012
1013 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
1014
1015 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
1016 relocs.
1017
1018 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
1019
1020 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
1021
1022 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
1023
1024 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
1025 (aarch64_force_relocation): Likewise.
1026
1027 2013-07-02 Alan Modra <amodra@gmail.com>
1028
1029 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
1030
1031 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
1032
1033 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
1034 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
1035 Replace @sc{mips16} with literal `MIPS16'.
1036 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
1037
1038 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
1039
1040 * config/tc-aarch64.c (reloc_table): Replace
1041 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
1042 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
1043 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
1044 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
1045 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
1046 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
1047 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
1048 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
1049 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
1050 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
1051 (aarch64_force_relocation): Likewise.
1052
1053 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
1054
1055 * config/tc-aarch64.c (ilp32_p): New static variable.
1056 (elf64_aarch64_target_format): Return the target according to the
1057 value of 'ilp32_p'.
1058 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
1059 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
1060 (aarch64_dwarf2_addr_size): New function.
1061 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
1062 (DWARF2_ADDR_SIZE): New define.
1063
1064 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1065
1066 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
1067
1068 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1069
1070 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
1071
1072 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
1073
1074 * config/tc-mips.c (mips_set_options): Add insn32 member.
1075 (mips_opts): Initialize it.
1076 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
1077 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
1078 (md_longopts): Add "minsn32" and "mno-insn32" options.
1079 (is_size_valid): Handle insn32 mode.
1080 (md_assemble): Pass instruction string down to macro.
1081 (brk_fmt): Add second dimension and insn32 mode initializers.
1082 (mfhl_fmt): Likewise.
1083 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
1084 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
1085 (macro_build_jalr, move_register): Handle insn32 mode.
1086 (macro_build_branch_rs): Likewise.
1087 (macro): Handle insn32 mode.
1088 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
1089 (mips_ip): Handle insn32 mode.
1090 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
1091 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
1092 (mips_handle_align): Handle insn32 mode.
1093 (md_show_usage): Add -minsn32 and -mno-insn32.
1094
1095 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
1096 -mno-insn32 options.
1097 (-minsn32, -mno-insn32): New options.
1098 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
1099 options.
1100 (MIPS assembly options): New node. Document .set insn32 and
1101 .set noinsn32.
1102 (MIPS-Dependent): List the new node.
1103
1104 2013-06-25 Nick Clifton <nickc@redhat.com>
1105
1106 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
1107 the PC in indirect addressing on 430xv2 parts.
1108 (msp430_operands): Add version test to hardware bug encoding
1109 restrictions.
1110
1111 2013-06-24 Roland McGrath <mcgrathr@google.com>
1112
1113 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
1114 so it skips whitespace before it.
1115 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
1116
1117 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
1118 (arm_reg_parse_multi): Skip whitespace first.
1119 (parse_reg_list): Likewise.
1120 (parse_vfp_reg_list): Likewise.
1121 (s_arm_unwind_save_mmxwcg): Likewise.
1122
1123 2013-06-24 Nick Clifton <nickc@redhat.com>
1124
1125 PR gas/15623
1126 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
1127
1128 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1129
1130 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
1131
1132 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1133
1134 * config/tc-mips.c: Assert that offsetT and valueT are at least
1135 8 bytes in size.
1136 (GPR_SMIN, GPR_SMAX): New macros.
1137 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
1138
1139 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1140
1141 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
1142 conditions. Remove any code deselected by them.
1143 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
1144
1145 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1146
1147 * NEWS: Note removal of ECOFF support.
1148 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
1149 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
1150 (MULTI_CFILES): Remove config/e-mipsecoff.c.
1151 * Makefile.in: Regenerate.
1152 * configure.in: Remove MIPS ECOFF references.
1153 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1154 Delete cases.
1155 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1156 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1157 (mips-*-*): ...this single case.
1158 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1159 MIPS emulations to be e-mipself*.
1160 * configure: Regenerate.
1161 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1162 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1163 (mips-*-sysv*): Remove coff and ecoff cases.
1164 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1165 * ecoff.c: Remove reference to MIPS ECOFF.
1166 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1167 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1168 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1169 (mips_hi_fixup): Tweak comment.
1170 (append_insn): Require a howto.
1171 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1172
1173 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1174
1175 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1176 Use "CPU" instead of "cpu".
1177 * doc/c-mips.texi: Likewise.
1178 (MIPS Opts): Rename to MIPS Options.
1179 (MIPS option stack): Rename to MIPS Option Stack.
1180 (MIPS ASE instruction generation overrides): Rename to
1181 MIPS ASE Instruction Generation Overrides (for now).
1182 (MIPS floating-point): Rename to MIPS Floating-Point.
1183
1184 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1185
1186 * doc/c-mips.texi (MIPS Macros): New section.
1187 (MIPS Object): Replace with...
1188 (MIPS Small Data): ...this new section.
1189
1190 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1191
1192 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1193 Capitalize name. Use @kindex instead of @cindex for .set entries.
1194
1195 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1196
1197 * doc/c-mips.texi (MIPS Stabs): Remove section.
1198
1199 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1200
1201 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1202 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1203 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1204 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1205 (mips_ase): New structure.
1206 (mips_ases): New table.
1207 (FP64_ASES): New macro.
1208 (mips_ase_groups): New array.
1209 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1210 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1211 functions.
1212 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1213 (md_parse_option): Use mips_ases and mips_set_ase instead of
1214 separate case statements for each ASE option.
1215 (mips_after_parse_args): Use FP64_ASES. Use
1216 mips_check_isa_supports_ases to check the ASEs against
1217 other options.
1218 (s_mipsset): Use mips_ases and mips_set_ase instead of
1219 separate if statements for each ASE option. Use
1220 mips_check_isa_supports_ases, even when a non-ASE option
1221 is specified.
1222
1223 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1224
1225 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1226
1227 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1228
1229 * config/tc-mips.c (md_shortopts, options, md_longopts)
1230 (md_longopts_size): Move earlier in file.
1231
1232 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1233
1234 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1235 with a single "ase" bitmask.
1236 (mips_opts): Update accordingly.
1237 (file_ase, file_ase_explicit): New variables.
1238 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1239 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1240 (ISA_HAS_ROR): Adjust for mips_set_options change.
1241 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1242 (mips_ip): Adjust for mips_set_options change.
1243 (md_parse_option): Likewise. Update file_ase_explicit.
1244 (mips_after_parse_args): Adjust for mips_set_options change.
1245 Use bitmask operations to select the default ASEs. Set file_ase
1246 rather than individual per-ASE variables.
1247 (s_mipsset): Adjust for mips_set_options change.
1248 (mips_elf_final_processing): Test file_ase rather than
1249 file_ase_mdmx. Remove commented-out code.
1250
1251 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1252
1253 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1254 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1255 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1256 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1257 (mips_after_parse_args): Use the new "ase" field to choose
1258 the default ASEs.
1259 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1260 "ase" field.
1261
1262 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
1263
1264 * config/tc-arm.c (symbol_preemptible): New function.
1265 (relax_branch): Use it.
1266
1267 2013-06-17 Catherine Moore <clm@codesourcery.com>
1268 Maciej W. Rozycki <macro@codesourcery.com>
1269 Chao-Ying Fu <fu@mips.com>
1270
1271 * config/tc-mips.c (mips_set_options): Add ase_eva.
1272 (mips_set_options mips_opts): Add ase_eva.
1273 (file_ase_eva): Declare.
1274 (ISA_SUPPORTS_EVA_ASE): Define.
1275 (IS_SEXT_9BIT_NUM): Define.
1276 (MIPS_CPU_ASE_EVA): Define.
1277 (is_opcode_valid): Add support for ase_eva.
1278 (macro_build): Likewise.
1279 (macro): Likewise.
1280 (validate_mips_insn): Likewise.
1281 (validate_micromips_insn): Likewise.
1282 (mips_ip): Likewise.
1283 (options): Add OPTION_EVA and OPTION_NO_EVA.
1284 (md_longopts): Add -meva and -mno-eva.
1285 (md_parse_option): Process new options.
1286 (mips_after_parse_args): Check for valid EVA combinations.
1287 (s_mipsset): Likewise.
1288
1289 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1290
1291 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1292 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1293 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1294 (dwarf2_gen_line_info_1): Update call accordingly.
1295 (dwarf2_move_insn): New function.
1296 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1297
1298 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1299
1300 Revert:
1301
1302 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1303
1304 PR gas/13024
1305 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1306 (dwarf2_gen_line_info_1): Delete.
1307 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1308 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1309 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1310 (dwarf2_directive_loc): Push previous .locs instead of generating
1311 them immediately.
1312
1313 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1314
1315 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1316 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1317
1318 2013-06-13 Nick Clifton <nickc@redhat.com>
1319
1320 PR gas/15602
1321 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1322 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1323 function. Generates an error if the adjusted offset is out of a
1324 16-bit range.
1325
1326 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1327
1328 * config/tc-nios2.c (md_apply_fix): Mask constant
1329 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1330
1331 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1332
1333 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1334 MIPS-3D instructions either.
1335 (md_convert_frag): Update the COPx branch mask accordingly.
1336
1337 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1338 option.
1339 * doc/as.texinfo (Overview): Add --relax-branch and
1340 --no-relax-branch.
1341 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1342 --no-relax-branch.
1343
1344 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1345
1346 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1347 omitted.
1348
1349 2013-06-08 Catherine Moore <clm@codesourcery.com>
1350
1351 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1352 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1353 (append_insn): Change INSN_xxxx to ASE_xxxx.
1354
1355 2013-06-01 George Thomas <george.thomas@atmel.com>
1356
1357 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1358 AVR_ISA_XMEGAU
1359
1360 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1361
1362 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1363 for ELF.
1364
1365 2013-05-31 Paul Brook <paul@codesourcery.com>
1366
1367 * config/tc-mips.c (s_ehword): New.
1368
1369 2013-05-30 Paul Brook <paul@codesourcery.com>
1370
1371 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1372
1373 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1374
1375 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1376 convert relocs who have no relocatable field either. Rephrase
1377 the conditional so that the PC-relative check is only applied
1378 for REL targets.
1379
1380 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1381
1382 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1383 calculation.
1384
1385 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1386
1387 * config/tc-aarch64.c (reloc_table): Update to use
1388 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1389 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1390 (md_apply_fix): Likewise.
1391 (aarch64_force_relocation): Likewise.
1392
1393 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1394
1395 * config/tc-arm.c (it_fsm_post_encode): Improve
1396 warning messages about deprecated IT block formats.
1397
1398 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1399
1400 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1401 inside fx_done condition.
1402
1403 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1404
1405 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1406
1407 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1408
1409 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1410 and clean up warning when using PRINT_OPCODE_TABLE.
1411
1412 2013-05-20 Alan Modra <amodra@gmail.com>
1413
1414 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1415 and data fixups performing shift/high adjust/sign extension on
1416 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1417 when writing data fixups rather than recalculating size.
1418
1419 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1420
1421 * doc/c-msp430.texi: Fix typo.
1422
1423 2013-05-16 Tristan Gingold <gingold@adacore.com>
1424
1425 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1426 are also TOC symbols.
1427
1428 2013-05-16 Nick Clifton <nickc@redhat.com>
1429
1430 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1431 Add -mcpu command to specify core type.
1432 * doc/c-msp430.texi: Update documentation.
1433
1434 2013-05-09 Andrew Pinski <apinski@cavium.com>
1435
1436 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1437 (mips_opts): Update for the new field.
1438 (file_ase_virt): New variable.
1439 (ISA_SUPPORTS_VIRT_ASE): New macro.
1440 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1441 (MIPS_CPU_ASE_VIRT): New define.
1442 (is_opcode_valid): Handle ase_virt.
1443 (macro_build): Handle "+J".
1444 (validate_mips_insn): Likewise.
1445 (mips_ip): Likewise.
1446 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1447 (md_longopts): Add mvirt and mnovirt
1448 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1449 (mips_after_parse_args): Handle ase_virt field.
1450 (s_mipsset): Handle "virt" and "novirt".
1451 (mips_elf_final_processing): Add a comment about virt ASE might need
1452 a new flag.
1453 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1454 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1455 Document ".set virt" and ".set novirt".
1456
1457 2013-05-09 Alan Modra <amodra@gmail.com>
1458
1459 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1460 control of operand flag bits.
1461
1462 2013-05-07 Alan Modra <amodra@gmail.com>
1463
1464 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1465 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1466 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1467 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1468 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1469 Shift and sign-extend fieldval for use by some VLE reloc
1470 operand->insert functions.
1471
1472 2013-05-06 Paul Brook <paul@codesourcery.com>
1473 Catherine Moore <clm@codesourcery.com>
1474
1475 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1476 (limited_pcrel_reloc_p): Likewise.
1477 (md_apply_fix): Likewise.
1478 (tc_gen_reloc): Likewise.
1479
1480 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1481
1482 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1483 (mips_fix_adjustable): Adjust pc-relative check to use
1484 limited_pc_reloc_p.
1485
1486 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1487
1488 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1489 (s_mips_stab): Do not restrict to stabn only.
1490
1491 2013-05-02 Nick Clifton <nickc@redhat.com>
1492
1493 * config/tc-msp430.c: Add support for the MSP430X architecture.
1494 Add code to insert a NOP instruction after any instruction that
1495 might change the interrupt state.
1496 Add support for the LARGE memory model.
1497 Add code to initialise the .MSP430.attributes section.
1498 * config/tc-msp430.h: Add support for the MSP430X architecture.
1499 * doc/c-msp430.texi: Document the new -mL and -mN command line
1500 options.
1501 * NEWS: Mention support for the MSP430X architecture.
1502
1503 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1504
1505 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1506 alpha*-*-linux*ecoff*.
1507
1508 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1509
1510 * config/tc-mips.c (mips_ip): Add sizelo.
1511 For "+C", "+G", and "+H", set sizelo and compare against it.
1512
1513 2013-04-29 Nick Clifton <nickc@redhat.com>
1514
1515 * as.c (Options): Add -gdwarf-sections.
1516 (parse_args): Likewise.
1517 * as.h (flag_dwarf_sections): Declare.
1518 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1519 (process_entries): When -gdwarf-sections is enabled generate
1520 fragmentary .debug_line sections.
1521 (out_debug_line): Set the section for the .debug_line section end
1522 symbol.
1523 * doc/as.texinfo: Document -gdwarf-sections.
1524 * NEWS: Mention -gdwarf-sections.
1525
1526 2013-04-26 Christian Groessler <chris@groessler.org>
1527
1528 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1529 according to the target parameter. Don't call s_segm since s_segm
1530 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1531 initialized yet.
1532 (md_begin): Call s_segm according to target parameter from command
1533 line.
1534
1535 2013-04-25 Alan Modra <amodra@gmail.com>
1536
1537 * configure.in: Allow little-endian linux.
1538 * configure: Regenerate.
1539
1540 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1541
1542 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1543 "fstatus" control register to "eccinj".
1544
1545 2013-04-19 Kai Tietz <ktietz@redhat.com>
1546
1547 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1548
1549 2013-04-15 Julian Brown <julian@codesourcery.com>
1550
1551 * expr.c (add_to_result, subtract_from_result): Make global.
1552 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1553 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1554 subtract_from_result to handle extra bit of precision for .sleb128
1555 directive operands.
1556
1557 2013-04-10 Julian Brown <julian@codesourcery.com>
1558
1559 * read.c (convert_to_bignum): Add sign parameter. Use it
1560 instead of X_unsigned to determine sign of resulting bignum.
1561 (emit_expr): Pass extra argument to convert_to_bignum.
1562 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1563 X_extrabit to convert_to_bignum.
1564 (parse_bitfield_cons): Set X_extrabit.
1565 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1566 Initialise X_extrabit field as appropriate.
1567 (add_to_result): New.
1568 (subtract_from_result): New.
1569 (expr): Use above.
1570 * expr.h (expressionS): Add X_extrabit field.
1571
1572 2013-04-10 Jan Beulich <jbeulich@suse.com>
1573
1574 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1575 register being PC when is_t or writeback, and use distinct
1576 diagnostic for the latter case.
1577
1578 2013-04-10 Jan Beulich <jbeulich@suse.com>
1579
1580 * gas/config/tc-arm.c (parse_operands): Re-write
1581 po_barrier_or_imm().
1582 (do_barrier): Remove bogus constraint().
1583 (do_t_barrier): Remove.
1584
1585 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1586
1587 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1588 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1589 ATmega2564RFR2
1590 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1591
1592 2013-04-09 Jan Beulich <jbeulich@suse.com>
1593
1594 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1595 Use local variable Rt in more places.
1596 (do_vmsr): Accept all control registers.
1597
1598 2013-04-09 Jan Beulich <jbeulich@suse.com>
1599
1600 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1601 if there was none specified for moves between scalar and core
1602 register.
1603
1604 2013-04-09 Jan Beulich <jbeulich@suse.com>
1605
1606 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1607 NEON_ALL_LANES case.
1608
1609 2013-04-08 Jan Beulich <jbeulich@suse.com>
1610
1611 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1612 PC-relative VSTR.
1613
1614 2013-04-08 Jan Beulich <jbeulich@suse.com>
1615
1616 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1617 entry to sp_fiq.
1618
1619 2013-04-03 Alan Modra <amodra@gmail.com>
1620
1621 * doc/as.texinfo: Add support to generate man options for h8300.
1622 * doc/c-h8300.texi: Likewise.
1623
1624 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1625
1626 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1627 Cortex-A57.
1628
1629 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1630
1631 PR binutils/15068
1632 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1633
1634 2013-03-26 Nick Clifton <nickc@redhat.com>
1635
1636 PR gas/15295
1637 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1638 start of the file each time.
1639
1640 PR gas/15178
1641 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1642 FreeBSD targets.
1643
1644 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1645
1646 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1647 after fixup.
1648
1649 2013-03-21 Will Newton <will.newton@linaro.org>
1650
1651 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1652 pc-relative str instructions in Thumb mode.
1653
1654 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1655
1656 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1657 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1658 R_H8_DISP32A16.
1659 * config/tc-h8300.h: Remove duplicated defines.
1660
1661 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1662
1663 PR gas/15282
1664 * tc-avr.c (mcu_has_3_byte_pc): New function.
1665 (tc_cfi_frame_initial_instructions): Call it to find return
1666 address size.
1667
1668 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1669
1670 PR gas/15095
1671 * config/tc-tic6x.c (tic6x_try_encode): Handle
1672 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1673 encode register pair numbers when required.
1674
1675 2013-03-15 Will Newton <will.newton@linaro.org>
1676
1677 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1678 in vstr in Thumb mode for pre-ARMv7 cores.
1679
1680 2013-03-14 Andreas Schwab <schwab@suse.de>
1681
1682 * doc/c-arc.texi (ARC Directives): Revert last change and use
1683 @itemize instead of @table.
1684 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1685
1686 2013-03-14 Nick Clifton <nickc@redhat.com>
1687
1688 PR gas/15273
1689 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1690 NULL message, instead just check ARM_CPU_IS_ANY directly.
1691
1692 2013-03-14 Nick Clifton <nickc@redhat.com>
1693
1694 PR gas/15212
1695 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1696 for table format.
1697 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1698 to the @item directives.
1699 (ARM-Neon-Alignment): Move to correct place in the document.
1700 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1701 formatting.
1702 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1703 @smallexample.
1704
1705 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1706
1707 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1708 case. Add default BAD_CASE to switch.
1709
1710 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1711
1712 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1713 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1714
1715 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1716
1717 * config/tc-arm.c (crc_ext_armv8): New feature set.
1718 (UNPRED_REG): New macro.
1719 (do_crc32_1): New function.
1720 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1721 do_crc32ch, do_crc32cw): Likewise.
1722 (TUEc): New macro.
1723 (insns): Add entries for crc32 mnemonics.
1724 (arm_extensions): Add entry for crc.
1725
1726 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1727
1728 * write.h (struct fix): Add fx_dot_frag field.
1729 (dot_frag): Declare.
1730 * write.c (dot_frag): New variable.
1731 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1732 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1733 * expr.c (expr): Save value of frag_now in dot_frag when setting
1734 dot_value.
1735 * read.c (emit_expr): Likewise. Delete comments.
1736
1737 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1738
1739 * config/tc-i386.c (flag_code_names): Removed.
1740 (i386_index_check): Rewrote.
1741
1742 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1743
1744 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1745 add comment.
1746 (aarch64_double_precision_fmovable): New function.
1747 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1748 function; handle hexadecimal representation of IEEE754 encoding.
1749 (parse_operands): Update the call to parse_aarch64_imm_float.
1750
1751 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1752
1753 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1754 (check_hle): Updated.
1755 (md_assemble): Likewise.
1756 (parse_insn): Likewise.
1757
1758 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1759
1760 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1761 (md_assemble): Check if REP prefix is OK.
1762 (parse_insn): Remove expecting_string_instruction. Set
1763 i.rep_prefix.
1764
1765 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1766
1767 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1768
1769 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1770
1771 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1772 for system registers.
1773
1774 2013-02-27 DJ Delorie <dj@redhat.com>
1775
1776 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1777 (rl78_op): Handle %code().
1778 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1779 (tc_gen_reloc): Likwise; convert to a computed reloc.
1780 (md_apply_fix): Likewise.
1781
1782 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1783
1784 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1785
1786 2013-02-25 Terry Guo <terry.guo@arm.com>
1787
1788 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1789 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1790 list of accepted CPUs.
1791
1792 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1793
1794 PR gas/15159
1795 * config/tc-i386.c (cpu_arch): Add ".smap".
1796
1797 * doc/c-i386.texi: Document smap.
1798
1799 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1800
1801 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1802 mips_assembling_insn appropriately.
1803 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1804
1805 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1806
1807 * config/tc-mips.c (append_insn): Correct indentation, remove
1808 extraneous braces.
1809
1810 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1811
1812 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1813
1814 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1815
1816 * configure.tgt: Add nios2-*-rtems*.
1817
1818 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1819
1820 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1821 NULL.
1822
1823 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1824
1825 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1826 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1827
1828 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1829
1830 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1831 core.
1832
1833 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1834 Andrew Jenner <andrew@codesourcery.com>
1835
1836 Based on patches from Altera Corporation.
1837
1838 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1839 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1840 * Makefile.in: Regenerated.
1841 * configure.tgt: Add case for nios2*-linux*.
1842 * config/obj-elf.c: Conditionally include elf/nios2.h.
1843 * config/tc-nios2.c: New file.
1844 * config/tc-nios2.h: New file.
1845 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1846 * doc/Makefile.in: Regenerated.
1847 * doc/all.texi: Set NIOSII.
1848 * doc/as.texinfo (Overview): Add Nios II options.
1849 (Machine Dependencies): Include c-nios2.texi.
1850 * doc/c-nios2.texi: New file.
1851 * NEWS: Note Altera Nios II support.
1852
1853 2013-02-06 Alan Modra <amodra@gmail.com>
1854
1855 PR gas/14255
1856 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1857 Don't skip fixups with fx_subsy non-NULL.
1858 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1859 with fx_subsy non-NULL.
1860
1861 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1862
1863 * doc/c-metag.texi: Add "@c man" markers.
1864
1865 2013-02-04 Alan Modra <amodra@gmail.com>
1866
1867 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1868 related code.
1869 (TC_ADJUST_RELOC_COUNT): Delete.
1870 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1871
1872 2013-02-04 Alan Modra <amodra@gmail.com>
1873
1874 * po/POTFILES.in: Regenerate.
1875
1876 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1877
1878 * config/tc-metag.c: Make SWAP instruction less permissive with
1879 its operands.
1880
1881 2013-01-29 DJ Delorie <dj@redhat.com>
1882
1883 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1884 relocs in .word/.etc statements.
1885
1886 2013-01-29 Roland McGrath <mcgrathr@google.com>
1887
1888 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1889 immediate value for 8-bit offset" error so it shows line info.
1890
1891 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1892
1893 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1894 for 64-bit output.
1895
1896 2013-01-24 Nick Clifton <nickc@redhat.com>
1897
1898 * config/tc-v850.c: Add support for e3v5 architecture.
1899 * doc/c-v850.texi: Mention new support.
1900
1901 2013-01-23 Nick Clifton <nickc@redhat.com>
1902
1903 PR gas/15039
1904 * config/tc-avr.c: Include dwarf2dbg.h.
1905
1906 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1907
1908 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1909 (tc_i386_fix_adjustable): Likewise.
1910 (lex_got): Likewise.
1911 (tc_gen_reloc): Likewise.
1912
1913 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1914
1915 * config/tc-aarch64.c (output_operand_error_record): Change to output
1916 the out-of-range error message as value-expected message if there is
1917 only one single value in the expected range.
1918 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1919 LSL #0 as a programmer-friendly feature.
1920
1921 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1922
1923 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1924 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1925 BFD_RELOC_64_SIZE relocations.
1926 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1927 for it.
1928 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1929 relocations against local symbols.
1930
1931 2013-01-16 Alan Modra <amodra@gmail.com>
1932
1933 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1934 finding some sort of toc syntax error, and break to avoid
1935 compiler uninit warning.
1936
1937 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1938
1939 PR gas/15019
1940 * config/tc-i386.c (lex_got): Increment length by 1 if the
1941 relocation token is removed.
1942
1943 2013-01-15 Nick Clifton <nickc@redhat.com>
1944
1945 * config/tc-v850.c (md_assemble): Allow signed values for
1946 V850E_IMMEDIATE.
1947
1948 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1949
1950 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1951 git to cvs.
1952
1953 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1954
1955 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1956 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1957 * config/tc-ppc.c (md_show_usage): Likewise.
1958 (ppc_handle_align): Handle power8's group ending nop.
1959
1960 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1961
1962 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1963 that the assember exits after the opcodes have been printed.
1964
1965 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1966
1967 * app.c: Remove trailing white spaces.
1968 * as.c: Likewise.
1969 * as.h: Likewise.
1970 * cond.c: Likewise.
1971 * dw2gencfi.c: Likewise.
1972 * dwarf2dbg.h: Likewise.
1973 * ecoff.c: Likewise.
1974 * input-file.c: Likewise.
1975 * itbl-lex.h: Likewise.
1976 * output-file.c: Likewise.
1977 * read.c: Likewise.
1978 * sb.c: Likewise.
1979 * subsegs.c: Likewise.
1980 * symbols.c: Likewise.
1981 * write.c: Likewise.
1982 * config/tc-i386.c: Likewise.
1983 * doc/Makefile.am: Likewise.
1984 * doc/Makefile.in: Likewise.
1985 * doc/c-aarch64.texi: Likewise.
1986 * doc/c-alpha.texi: Likewise.
1987 * doc/c-arc.texi: Likewise.
1988 * doc/c-arm.texi: Likewise.
1989 * doc/c-avr.texi: Likewise.
1990 * doc/c-bfin.texi: Likewise.
1991 * doc/c-cr16.texi: Likewise.
1992 * doc/c-d10v.texi: Likewise.
1993 * doc/c-d30v.texi: Likewise.
1994 * doc/c-h8300.texi: Likewise.
1995 * doc/c-hppa.texi: Likewise.
1996 * doc/c-i370.texi: Likewise.
1997 * doc/c-i386.texi: Likewise.
1998 * doc/c-i860.texi: Likewise.
1999 * doc/c-m32c.texi: Likewise.
2000 * doc/c-m32r.texi: Likewise.
2001 * doc/c-m68hc11.texi: Likewise.
2002 * doc/c-m68k.texi: Likewise.
2003 * doc/c-microblaze.texi: Likewise.
2004 * doc/c-mips.texi: Likewise.
2005 * doc/c-msp430.texi: Likewise.
2006 * doc/c-mt.texi: Likewise.
2007 * doc/c-s390.texi: Likewise.
2008 * doc/c-score.texi: Likewise.
2009 * doc/c-sh.texi: Likewise.
2010 * doc/c-sh64.texi: Likewise.
2011 * doc/c-tic54x.texi: Likewise.
2012 * doc/c-tic6x.texi: Likewise.
2013 * doc/c-v850.texi: Likewise.
2014 * doc/c-xc16x.texi: Likewise.
2015 * doc/c-xgate.texi: Likewise.
2016 * doc/c-xtensa.texi: Likewise.
2017 * doc/c-z80.texi: Likewise.
2018 * doc/internals.texi: Likewise.
2019
2020 2013-01-10 Roland McGrath <mcgrathr@google.com>
2021
2022 * hash.c (hash_new_sized): Make it global.
2023 * hash.h: Declare it.
2024 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
2025 pass a small size.
2026
2027 2013-01-10 Will Newton <will.newton@imgtec.com>
2028
2029 * Makefile.am: Add Meta.
2030 * Makefile.in: Regenerate.
2031 * config/tc-metag.c: New file.
2032 * config/tc-metag.h: New file.
2033 * configure.tgt: Add Meta.
2034 * doc/Makefile.am: Add Meta.
2035 * doc/Makefile.in: Regenerate.
2036 * doc/all.texi: Add Meta.
2037 * doc/as.texiinfo: Document Meta options.
2038 * doc/c-metag.texi: New file.
2039
2040 2013-01-09 Steve Ellcey <sellcey@mips.com>
2041
2042 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
2043 calls.
2044 * config/tc-mips.c (internalError): Remove, replace with abort.
2045
2046 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
2047
2048 * config/tc-aarch64.c (parse_operands): Change to compare the result
2049 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
2050
2051 2013-01-07 Nick Clifton <nickc@redhat.com>
2052
2053 PR gas/14887
2054 * config/tc-arm.c (skip_past_char): Skip whitespace before the
2055 anticipated character.
2056 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
2057 here as it is no longer needed.
2058
2059 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
2060
2061 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
2062 * doc/c-score.texi (SCORE-Opts): Likewise.
2063 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
2064
2065 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
2066
2067 * config/tc-mips.c: Add support for MIPS r5900.
2068 Add M_LQ_AB and M_SQ_AB to support large values for instructions
2069 lq and sq.
2070 (can_swap_branch_p, get_append_method): Detect some conditional
2071 short loops to fix a bug on the r5900 by NOP in the branch delay
2072 slot.
2073 (M_MUL): Support 3 operands in multu on r5900.
2074 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
2075 (s_mipsset): Force 32 bit floating point on r5900.
2076 (mips_ip): Check parameter range of instructions mfps and mtps on
2077 r5900.
2078 * configure.in: Detect CPU type when target string contains r5900
2079 (e.g. mips64r5900el-linux-gnu).
2080
2081 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
2082
2083 * as.c (parse_args): Update copyright year to 2013.
2084
2085 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
2086
2087 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
2088 and "cortex57".
2089
2090 2013-01-02 Nick Clifton <nickc@redhat.com>
2091
2092 PR gas/14987
2093 * config/tc-arm.c (parse_address_main): Skip whitespace before a
2094 closing bracket.
2095
2096 For older changes see ChangeLog-2012
2097 \f
2098 Copyright (C) 2013 Free Software Foundation, Inc.
2099
2100 Copying and distribution of this file, with or without modification,
2101 are permitted in any medium without royalty provided the copyright
2102 notice and this notice are preserved.
2103
2104 Local Variables:
2105 mode: change-log
2106 left-margin: 8
2107 fill-column: 74
2108 version-control: never
2109 End: