1 2006-08-03 Nick Clifton <nickc@redhat.com>
4 * config.in: Regenerate.
6 2006-08-03 Joseph Myers <joseph@codesourcery.com>
8 * config/tc-arm.c (parse_operands): Handle invalid register name
11 2006-08-03 Joseph Myers <joseph@codesourcery.com>
13 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
14 (parse_operands): Handle it.
15 (insns): Use it for tmcr and tmrc.
17 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
20 * config/tc-i386.c (md_parse_option): Treat any target starting
21 with elf64_x86_64 as a viable target for the -64 switch.
22 (i386_target_format): For 64-bit ELF flavoured output use
24 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
26 2006-08-02 Nick Clifton <nickc@redhat.com>
29 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
31 * configure.in: Run BFD_BINARY_FOPEN.
32 * configure: Regenerate.
33 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
36 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
38 * config/tc-i386.c (md_assemble): Don't update
41 2006-08-01 Thiemo Seufer <ths@mips.com>
43 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
45 2006-08-01 Thiemo Seufer <ths@mips.com>
47 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
48 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
49 BFD_RELOC_32 and BFD_RELOC_16.
50 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
51 md_convert_frag, md_obj_end): Fix comment formatting.
53 2006-07-31 Thiemo Seufer <ths@mips.com>
55 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
56 handling for BFD_RELOC_MIPS16_JMP.
58 2006-07-24 Andreas Schwab <schwab@suse.de>
61 * read.c (read_a_source_file): Ignore unknown text after line
62 comment character. Fix misleading comment.
64 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
66 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
67 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
68 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
69 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
70 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
71 doc/c-z80.texi, doc/internals.texi: Fix some typos.
73 2006-07-21 Nick Clifton <nickc@redhat.com>
75 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
78 2006-07-20 Thiemo Seufer <ths@mips.com>
79 Nigel Stephens <nigel@mips.com>
81 * config/tc-mips.c (md_parse_option): Don't infer optimisation
82 options from debug options.
84 2006-07-20 Thiemo Seufer <ths@mips.com>
86 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
87 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
89 2006-07-19 Paul Brook <paul@codesourcery.com>
91 * config/tc-arm.c (insns): Fix rbit Arm opcode.
93 2006-07-18 Paul Brook <paul@codesourcery.com>
95 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
96 (md_convert_frag): Use correct reloc for add_pc. Use
97 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
98 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
99 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
101 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
103 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
104 when file and line unknown.
106 2006-07-17 Thiemo Seufer <ths@mips.com>
108 * read.c (s_struct): Use IS_ELF.
109 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
110 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
111 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
112 s_mips_mask): Likewise.
114 2006-07-16 Thiemo Seufer <ths@mips.com>
115 David Ung <davidu@mips.com>
117 * read.c (s_struct): Handle ELF section changing.
118 * config/tc-mips.c (s_align): Leave enabling auto-align to the
120 (s_change_sec): Try section changing only if we output ELF.
122 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
124 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
126 (smallest_imm_type): Remove Cpu086.
127 (i386_target_format): Likewise.
129 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
132 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
133 Michael Meissner <michael.meissner@amd.com>
135 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
136 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
137 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
139 (i386_align_code): Ditto.
140 (md_assemble_code): Add support for insertq/extrq instructions,
141 swapping as needed for intel syntax.
142 (swap_imm_operands): New function to swap immediate operands.
143 (swap_operands): Deal with 4 operand instructions.
144 (build_modrm_byte): Add support for insertq instruction.
146 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
148 * config/tc-i386.h (Size64): Fix a typo in comment.
150 2006-07-12 Nick Clifton <nickc@redhat.com>
152 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
153 fixup_segment() to repeat a range check on a value that has
154 already been checked here.
156 2006-07-07 James E Wilson <wilson@specifix.com>
158 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
160 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
161 Nick Clifton <nickc@redhat.com>
164 * doc/as.texi: Fix spelling typo: branchs => branches.
165 * doc/c-m68hc11.texi: Likewise.
166 * config/tc-m68hc11.c: Likewise.
167 Support old spelling of command line switch for backwards
170 2006-07-04 Thiemo Seufer <ths@mips.com>
171 David Ung <davidu@mips.com>
173 * config/tc-mips.c (s_is_linkonce): New function.
174 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
175 weak, external, and linkonce symbols.
176 (pic_need_relax): Use s_is_linkonce.
178 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
180 * doc/as.texinfo (Org): Remove space.
181 (P2align): Add "@var{abs-expr},".
183 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
185 * config/tc-i386.c (cpu_arch_tune_set): New.
186 (cpu_arch_isa): Likewise.
187 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
188 nops with short or long nop sequences based on -march=/.arch
190 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
191 set cpu_arch_tune and cpu_arch_tune_flags.
192 (md_parse_option): For -march=, set cpu_arch_isa and set
193 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
194 0. Set cpu_arch_tune_set to 1 for -mtune=.
195 (i386_target_format): Don't set cpu_arch_tune.
197 2006-06-23 Nigel Stephens <nigel@mips.com>
199 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
200 generated .sbss.* and .gnu.linkonce.sb.*.
202 2006-06-23 Thiemo Seufer <ths@mips.com>
203 David Ung <davidu@mips.com>
205 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
207 * config/tc-mips.c (label_list): Define per-segment label_list.
208 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
209 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
210 mips_from_file_after_relocs, mips_define_label): Use per-segment
213 2006-06-22 Thiemo Seufer <ths@mips.com>
215 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
216 (append_insn): Use it.
217 (md_apply_fix): Whitespace formatting.
218 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
219 mips16_extended_frag): Remove register specifier.
220 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
223 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
225 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
226 a directive saving VFP registers for ARMv6 or later.
227 (s_arm_unwind_save): Add parameter arch_v6 and call
228 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
230 (md_pseudo_table): Add entry for new "vsave" directive.
231 * doc/c-arm.texi: Correct error in example for "save"
232 directive (fstmdf -> fstmdx). Also document "vsave" directive.
234 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
235 Anatoly Sokolov <aesok@post.ru>
237 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
238 and atmega644p devices. Rename atmega164/atmega324 devices to
239 atmega164p/atmega324p.
240 * doc/c-avr.texi: Document new mcu and arch options.
242 2006-06-17 Nick Clifton <nickc@redhat.com>
244 * config/tc-arm.c (enum parse_operand_result): Move outside of
245 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
247 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
249 * config/tc-i386.h (processor_type): New.
250 (arch_entry): Add type.
252 * config/tc-i386.c (cpu_arch_tune): New.
253 (cpu_arch_tune_flags): Likewise.
254 (cpu_arch_isa_flags): Likewise.
256 (set_cpu_arch): Also update cpu_arch_isa_flags.
257 (md_assemble): Update cpu_arch_isa_flags.
259 (OPTION_MTUNE): Likewise.
260 (md_longopts): Add -march= and -mtune=.
261 (md_parse_option): Support -march= and -mtune=.
262 (md_show_usage): Add -march=CPU/-mtune=CPU.
263 (i386_target_format): Also update cpu_arch_isa_flags,
264 cpu_arch_tune and cpu_arch_tune_flags.
266 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
268 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
270 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
272 * config/tc-arm.c (enum parse_operand_result): New.
273 (struct group_reloc_table_entry): New.
274 (enum group_reloc_type): New.
275 (group_reloc_table): New array.
276 (find_group_reloc_table_entry): New function.
277 (parse_shifter_operand_group_reloc): New function.
278 (parse_address_main): New function, incorporating code
279 from the old parse_address function. To be used via...
280 (parse_address): wrapper for parse_address_main; and
281 (parse_address_group_reloc): new function, likewise.
282 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
283 OP_ADDRGLDRS, OP_ADDRGLDC.
284 (parse_operands): Support for these new operand codes.
285 New macro po_misc_or_fail_no_backtrack.
286 (encode_arm_cp_address): Preserve group relocations.
287 (insns): Modify to use the above operand codes where group
288 relocations are permitted.
289 (md_apply_fix): Handle the group relocations
290 ALU_PC_G0_NC through LDC_SB_G2.
291 (tc_gen_reloc): Likewise.
292 (arm_force_relocation): Leave group relocations for the linker.
293 (arm_fix_adjustable): Likewise.
295 2006-06-15 Julian Brown <julian@codesourcery.com>
297 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
298 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
301 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
303 * config/tc-i386.c (process_suffix): Don't add rex64 for
306 2006-06-09 Thiemo Seufer <ths@mips.com>
308 * config/tc-mips.c (mips_ip): Maintain argument count.
310 2006-06-09 Alan Modra <amodra@bigpond.net.au>
312 * config/tc-iq2000.c: Include sb.h.
314 2006-06-08 Nigel Stephens <nigel@mips.com>
316 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
317 aliases for better compatibility with SGI tools.
319 2006-06-08 Alan Modra <amodra@bigpond.net.au>
321 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
322 * Makefile.am (GASLIBS): Expand @BFDLIB@.
324 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
325 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
326 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
328 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
329 * Makefile.in: Regenerate.
330 * doc/Makefile.in: Regenerate.
331 * configure: Regenerate.
333 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
335 * po/Make-in (pdf, ps): New dummy targets.
337 2006-06-07 Julian Brown <julian@codesourcery.com>
339 * config/tc-arm.c (stdarg.h): include.
340 (arm_it): Add uncond_value field. Add isvec and issingle to operand
342 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
343 REG_TYPE_NSDQ (single, double or quad vector reg).
344 (reg_expected_msgs): Update.
345 (BAD_FPU): Add macro for unsupported FPU instruction error.
346 (parse_neon_type): Support 'd' as an alias for .f64.
347 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
349 (parse_vfp_reg_list): Don't update first arg on error.
350 (parse_neon_mov): Support extra syntax for VFP moves.
351 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
352 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
353 (parse_operands): Support isvec, issingle operands fields, new parse
355 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
357 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
358 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
359 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
360 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
362 (neon_shape): Redefine in terms of above.
363 (neon_shape_class): New enumeration, table of shape classes.
364 (neon_shape_el): New enumeration. One element of a shape.
365 (neon_shape_el_size): Register widths of above, where appropriate.
366 (neon_shape_info): New struct. Info for shape table.
367 (neon_shape_tab): New array.
368 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
369 (neon_check_shape): Rewrite as...
370 (neon_select_shape): New function to classify instruction shapes,
371 driven by new table neon_shape_tab array.
372 (neon_quad): New function. Return 1 if shape should set Q flag in
373 instructions (or equivalent), 0 otherwise.
374 (type_chk_of_el_type): Support F64.
375 (el_type_of_type_chk): Likewise.
376 (neon_check_type): Add support for VFP type checking (VFP data
377 elements fill their containing registers).
378 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
379 in thumb mode for VFP instructions.
380 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
381 and encode the current instruction as if it were that opcode.
382 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
383 arguments, call function in PFN.
384 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
385 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
386 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
387 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
388 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
389 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
390 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
391 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
392 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
393 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
394 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
395 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
396 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
397 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
398 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
400 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
401 between VFP and Neon turns out to belong to Neon. Perform
402 architecture check and fill in condition field if appropriate.
403 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
404 (do_neon_cvt): Add support for VFP variants of instructions.
405 (neon_cvt_flavour): Extend to cover VFP conversions.
406 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
408 (do_neon_ldr_str): Handle single-precision VFP load/store.
409 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
410 NS_NULL not NS_IGNORE.
411 (opcode_tag): Add OT_csuffixF for operands which either take a
412 conditional suffix, or have 0xF in the condition field.
413 (md_assemble): Add support for OT_csuffixF.
414 (NCE): Replace macro with...
415 (NCE_tag, NCE, NCEF): New macros.
416 (nCE): Replace macro with...
417 (nCE_tag, nCE, nCEF): New macros.
418 (insns): Add support for VFP insns or VFP versions of insns msr,
419 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
420 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
421 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
422 VFP/Neon insns together.
424 2006-06-07 Alan Modra <amodra@bigpond.net.au>
425 Ladislav Michl <ladis@linux-mips.org>
427 * app.c: Don't include headers already included by as.h.
429 * atof-generic.c: Likewise.
431 * dwarf2dbg.c: Likewise.
433 * input-file.c: Likewise.
434 * input-scrub.c: Likewise.
436 * output-file.c: Likewise.
439 * config/bfin-lex.l: Likewise.
440 * config/obj-coff.h: Likewise.
441 * config/obj-elf.h: Likewise.
442 * config/obj-som.h: Likewise.
443 * config/tc-arc.c: Likewise.
444 * config/tc-arm.c: Likewise.
445 * config/tc-avr.c: Likewise.
446 * config/tc-bfin.c: Likewise.
447 * config/tc-cris.c: Likewise.
448 * config/tc-d10v.c: Likewise.
449 * config/tc-d30v.c: Likewise.
450 * config/tc-dlx.h: Likewise.
451 * config/tc-fr30.c: Likewise.
452 * config/tc-frv.c: Likewise.
453 * config/tc-h8300.c: Likewise.
454 * config/tc-hppa.c: Likewise.
455 * config/tc-i370.c: Likewise.
456 * config/tc-i860.c: Likewise.
457 * config/tc-i960.c: Likewise.
458 * config/tc-ip2k.c: Likewise.
459 * config/tc-iq2000.c: Likewise.
460 * config/tc-m32c.c: Likewise.
461 * config/tc-m32r.c: Likewise.
462 * config/tc-maxq.c: Likewise.
463 * config/tc-mcore.c: Likewise.
464 * config/tc-mips.c: Likewise.
465 * config/tc-mmix.c: Likewise.
466 * config/tc-mn10200.c: Likewise.
467 * config/tc-mn10300.c: Likewise.
468 * config/tc-msp430.c: Likewise.
469 * config/tc-mt.c: Likewise.
470 * config/tc-ns32k.c: Likewise.
471 * config/tc-openrisc.c: Likewise.
472 * config/tc-ppc.c: Likewise.
473 * config/tc-s390.c: Likewise.
474 * config/tc-sh.c: Likewise.
475 * config/tc-sh64.c: Likewise.
476 * config/tc-sparc.c: Likewise.
477 * config/tc-tic30.c: Likewise.
478 * config/tc-tic4x.c: Likewise.
479 * config/tc-tic54x.c: Likewise.
480 * config/tc-v850.c: Likewise.
481 * config/tc-vax.c: Likewise.
482 * config/tc-xc16x.c: Likewise.
483 * config/tc-xstormy16.c: Likewise.
484 * config/tc-xtensa.c: Likewise.
485 * config/tc-z80.c: Likewise.
486 * config/tc-z8k.c: Likewise.
487 * macro.h: Don't include sb.h or ansidecl.h.
488 * sb.h: Don't include stdio.h or ansidecl.h.
489 * cond.c: Include sb.h.
490 * itbl-lex.l: Include as.h instead of other system headers.
491 * itbl-parse.y: Likewise.
492 * itbl-ops.c: Similarly.
493 * itbl-ops.h: Don't include as.h or ansidecl.h.
494 * config/bfin-defs.h: Don't include bfd.h or as.h.
495 * config/bfin-parse.y: Include as.h instead of other system headers.
497 2006-06-06 Ben Elliston <bje@au.ibm.com>
498 Anton Blanchard <anton@samba.org>
500 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
501 (md_show_usage): Document it.
502 (ppc_setup_opcodes): Test power6 opcode flag bits.
503 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
505 2006-06-06 Thiemo Seufer <ths@mips.com>
506 Chao-ying Fu <fu@mips.com>
508 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
509 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
510 (macro_build): Update comment.
511 (mips_ip): Allow DSP64 instructions for MIPS64R2.
512 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
514 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
515 MIPS_CPU_ASE_MDMX flags for sb1.
517 2006-06-05 Thiemo Seufer <ths@mips.com>
519 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
521 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
522 (mips_ip): Make overflowed/underflowed constant arguments in DSP
523 and MT instructions a fatal error. Use INSERT_OPERAND where
524 appropriate. Improve warnings for break and wait code overflows.
525 Use symbolic constant of OP_MASK_COPZ.
526 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
528 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
530 * po/Make-in (top_builddir): Define.
532 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
534 * doc/Makefile.am (TEXI2DVI): Define.
535 * doc/Makefile.in: Regenerate.
536 * doc/c-arc.texi: Fix typo.
538 2006-06-01 Alan Modra <amodra@bigpond.net.au>
540 * config/obj-ieee.c: Delete.
541 * config/obj-ieee.h: Delete.
542 * Makefile.am (OBJ_FORMATS): Remove ieee.
543 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
544 (obj-ieee.o): Remove rule.
545 * Makefile.in: Regenerate.
546 * configure.in (atof): Remove tahoe.
547 (OBJ_MAYBE_IEEE): Don't define.
548 * configure: Regenerate.
549 * config.in: Regenerate.
550 * doc/Makefile.in: Regenerate.
551 * po/POTFILES.in: Regenerate.
553 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
555 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
556 and LIBINTL_DEP everywhere.
558 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
559 * acinclude.m4: Include new gettext macros.
560 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
561 Remove local code for po/Makefile.
562 * Makefile.in, configure, doc/Makefile.in: Regenerated.
564 2006-05-30 Nick Clifton <nickc@redhat.com>
566 * po/es.po: Updated Spanish translation.
568 2006-05-06 Denis Chertykov <denisc@overta.ru>
570 * doc/c-avr.texi: New file.
571 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
572 * doc/all.texi: Set AVR
573 * doc/as.texinfo: Include c-avr.texi
575 2006-05-28 Jie Zhang <jie.zhang@analog.com>
577 * config/bfin-parse.y (check_macfunc): Loose the condition of
578 calling check_multiply_halfregs ().
580 2006-05-25 Jie Zhang <jie.zhang@analog.com>
582 * config/bfin-parse.y (asm_1): Better check and deal with
583 vector and scalar Multiply 16-Bit Operands instructions.
585 2006-05-24 Nick Clifton <nickc@redhat.com>
587 * config/tc-hppa.c: Convert to ISO C90 format.
588 * config/tc-hppa.h: Likewise.
590 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
591 Randolph Chung <randolph@tausq.org>
593 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
594 is_tls_ieoff, is_tls_leoff): Define.
595 (fix_new_hppa): Handle TLS.
596 (cons_fix_new_hppa): Likewise.
598 (md_apply_fix): Handle TLS relocs.
599 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
601 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
603 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
605 2006-05-23 Thiemo Seufer <ths@mips.com>
606 David Ung <davidu@mips.com>
607 Nigel Stephens <nigel@mips.com>
610 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
611 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
612 ISA_HAS_MXHC1): New macros.
613 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
614 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
615 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
616 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
617 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
618 (mips_after_parse_args): Change default handling of float register
619 size to account for 32bit code with 64bit FP. Better sanity checking
620 of ISA/ASE/ABI option combinations.
621 (s_mipsset): Support switching of GPR and FPR sizes via
622 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
624 (mips_elf_final_processing): We should record the use of 64bit FP
625 registers in 32bit code but we don't, because ELF header flags are
627 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
628 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
629 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
630 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
631 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
632 missing -march options. Document .set arch=CPU. Move .set smartmips
633 to ASE page. Use @code for .set FOO examples.
635 2006-05-23 Jie Zhang <jie.zhang@analog.com>
637 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
640 2006-05-23 Jie Zhang <jie.zhang@analog.com>
642 * config/bfin-defs.h (bfin_equals): Remove declaration.
643 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
644 * config/tc-bfin.c (bfin_name_is_register): Remove.
645 (bfin_equals): Remove.
646 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
647 (bfin_name_is_register): Remove declaration.
649 2006-05-19 Thiemo Seufer <ths@mips.com>
650 Nigel Stephens <nigel@mips.com>
652 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
653 (mips_oddfpreg_ok): New function.
656 2006-05-19 Thiemo Seufer <ths@mips.com>
657 David Ung <davidu@mips.com>
659 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
660 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
661 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
662 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
663 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
664 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
665 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
666 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
667 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
668 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
669 reg_names_o32, reg_names_n32n64): Define register classes.
670 (reg_lookup): New function, use register classes.
671 (md_begin): Reserve register names in the symbol table. Simplify
673 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
675 (mips16_ip): Use reg_lookup.
676 (tc_get_register): Likewise.
677 (tc_mips_regname_to_dw2regnum): New function.
679 2006-05-19 Thiemo Seufer <ths@mips.com>
681 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
682 Un-constify string argument.
683 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
685 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
687 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
689 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
691 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
693 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
696 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
698 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
699 cfloat/m68881 to correct architecture before using it.
701 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
703 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
706 2006-05-15 Paul Brook <paul@codesourcery.com>
708 * config/tc-arm.c (arm_adjust_symtab): Use
709 bfd_is_arm_special_symbol_name.
711 2006-05-15 Bob Wilson <bob.wilson@acm.org>
713 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
714 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
715 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
716 Handle errors from calls to xtensa_opcode_is_* functions.
718 2006-05-14 Thiemo Seufer <ths@mips.com>
720 * config/tc-mips.c (macro_build): Test for currently active
722 (mips16_ip): Reject invalid opcodes.
724 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
726 * doc/as.texinfo: Rename "Index" to "AS Index",
727 and "ABORT" to "ABORT (COFF)".
729 2006-05-11 Paul Brook <paul@codesourcery.com>
731 * config/tc-arm.c (parse_half): New function.
732 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
733 (parse_operands): Ditto.
734 (do_mov16): Reject invalid relocations.
735 (do_t_mov16): Ditto. Use Thumb reloc numbers.
736 (insns): Replace Iffff with HALF.
737 (md_apply_fix): Add MOVW and MOVT relocs.
738 (tc_gen_reloc): Ditto.
739 * doc/c-arm.texi: Document relocation operators
741 2006-05-11 Paul Brook <paul@codesourcery.com>
743 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
745 2006-05-11 Thiemo Seufer <ths@mips.com>
747 * config/tc-mips.c (append_insn): Don't check the range of j or
750 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
752 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
753 relocs against external symbols for WinCE targets.
754 (md_apply_fix): Likewise.
756 2006-05-09 David Ung <davidu@mips.com>
758 * config/tc-mips.c (append_insn): Only warn about an out-of-range
761 2006-05-09 Nick Clifton <nickc@redhat.com>
763 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
764 against symbols which are not going to be placed into the symbol
767 2006-05-09 Ben Elliston <bje@au.ibm.com>
769 * expr.c (operand): Remove `if (0 && ..)' statement and
770 subsequently unused target_op label. Collapse `if (1 || ..)'
772 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
773 separately above the switch.
775 2006-05-08 Nick Clifton <nickc@redhat.com>
778 * config/tc-msp430.c (line_separator_character): Define as |.
780 2006-05-08 Thiemo Seufer <ths@mips.com>
781 Nigel Stephens <nigel@mips.com>
782 David Ung <davidu@mips.com>
784 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
785 (mips_opts): Likewise.
786 (file_ase_smartmips): New variable.
787 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
788 (macro_build): Handle SmartMIPS instructions.
790 (md_longopts): Add argument handling for smartmips.
791 (md_parse_options, mips_after_parse_args): Likewise.
792 (s_mipsset): Add .set smartmips support.
793 (md_show_usage): Document -msmartmips/-mno-smartmips.
794 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
796 * doc/c-mips.texi: Likewise.
798 2006-05-08 Alan Modra <amodra@bigpond.net.au>
800 * write.c (relax_segment): Add pass count arg. Don't error on
801 negative org/space on first two passes.
802 (relax_seg_info): New struct.
803 (relax_seg, write_object_file): Adjust.
804 * write.h (relax_segment): Update prototype.
806 2006-05-05 Julian Brown <julian@codesourcery.com>
808 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
810 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
811 architecture version checks.
812 (insns): Allow overlapping instructions to be used in VFP mode.
814 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
817 * config/obj-elf.c (obj_elf_change_section): Allow user
818 specified SHF_ALPHA_GPREL.
820 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
822 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
823 for PMEM related expressions.
825 2006-05-05 Nick Clifton <nickc@redhat.com>
828 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
829 insertion of a directory separator character into a string at a
830 given offset. Uses heuristics to decide when to use a backslash
831 character rather than a forward-slash character.
832 (dwarf2_directive_loc): Use the macro.
833 (out_debug_info): Likewise.
835 2006-05-05 Thiemo Seufer <ths@mips.com>
836 David Ung <davidu@mips.com>
838 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
840 (macro): Add new case M_CACHE_AB.
842 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
844 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
845 (opcode_lookup): Issue a warning for opcode with
846 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
847 identical to OT_cinfix3.
848 (TxC3w, TC3w, tC3w): New.
849 (insns): Use tC3w and TC3w for comparison instructions with
852 2006-05-04 Alan Modra <amodra@bigpond.net.au>
854 * subsegs.h (struct frchain): Delete frch_seg.
855 (frchain_root): Delete.
856 (seg_info): Define as macro.
857 * subsegs.c (frchain_root): Delete.
858 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
859 (subsegs_begin, subseg_change): Adjust for above.
860 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
861 rather than to one big list.
862 (subseg_get): Don't special case abs, und sections.
863 (subseg_new, subseg_force_new): Don't set frchainP here.
865 (subsegs_print_statistics): Adjust frag chain control list traversal.
866 * debug.c (dmp_frags): Likewise.
867 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
868 at frchain_root. Make use of known frchain ordering.
869 (last_frag_for_seg): Likewise.
870 (get_frag_fix): Likewise. Add seg param.
871 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
872 * write.c (chain_frchains_together_1): Adjust for struct frchain.
873 (SUB_SEGMENT_ALIGN): Likewise.
874 (subsegs_finish): Adjust frchain list traversal.
875 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
876 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
877 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
878 (xtensa_fix_b_j_loop_end_frags): Likewise.
879 (xtensa_fix_close_loop_end_frags): Likewise.
880 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
881 (retrieve_segment_info): Delete frch_seg initialisation.
883 2006-05-03 Alan Modra <amodra@bigpond.net.au>
885 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
886 * config/obj-elf.h (obj_sec_set_private_data): Delete.
887 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
888 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
890 2006-05-02 Joseph Myers <joseph@codesourcery.com>
892 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
894 (md_apply_fix3): Multiply offset by 4 here for
895 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
897 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
898 Jan Beulich <jbeulich@novell.com>
900 * config/tc-i386.c (output_invalid_buf): Change size for
902 * config/tc-tic30.c (output_invalid_buf): Likewise.
904 * config/tc-i386.c (output_invalid): Cast none-ascii char to
906 * config/tc-tic30.c (output_invalid): Likewise.
908 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
910 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
911 (TEXI2POD): Use AM_MAKEINFOFLAGS.
912 (asconfig.texi): Don't set top_srcdir.
913 * doc/as.texinfo: Don't use top_srcdir.
914 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
916 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
918 * config/tc-i386.c (output_invalid_buf): Change size to 16.
919 * config/tc-tic30.c (output_invalid_buf): Likewise.
921 * config/tc-i386.c (output_invalid): Use snprintf instead of
923 * config/tc-ia64.c (declare_register_set): Likewise.
924 (emit_one_bundle): Likewise.
925 (check_dependencies): Likewise.
926 * config/tc-tic30.c (output_invalid): Likewise.
928 2006-05-02 Paul Brook <paul@codesourcery.com>
930 * config/tc-arm.c (arm_optimize_expr): New function.
931 * config/tc-arm.h (md_optimize_expr): Define
932 (arm_optimize_expr): Add prototype.
933 (TC_FORCE_RELOCATION_SUB_SAME): Define.
935 2006-05-02 Ben Elliston <bje@au.ibm.com>
937 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
940 * sb.h (sb_list_vector): Move to sb.c.
941 * sb.c (free_list): Use type of sb_list_vector directly.
942 (sb_build): Fix off-by-one error in assertion about `size'.
944 2006-05-01 Ben Elliston <bje@au.ibm.com>
946 * listing.c (listing_listing): Remove useless loop.
947 * macro.c (macro_expand): Remove is_positional local variable.
948 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
949 and simplify surrounding expressions, where possible.
950 (assign_symbol): Likewise.
951 (s_weakref): Likewise.
952 * symbols.c (colon): Likewise.
954 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
956 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
958 2006-04-30 Thiemo Seufer <ths@mips.com>
959 David Ung <davidu@mips.com>
961 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
962 (mips_immed): New table that records various handling of udi
963 instruction patterns.
964 (mips_ip): Adds udi handling.
966 2006-04-28 Alan Modra <amodra@bigpond.net.au>
968 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
969 of list rather than beginning.
971 2006-04-26 Julian Brown <julian@codesourcery.com>
973 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
974 (is_quarter_float): Rename from above. Simplify slightly.
975 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
977 (parse_neon_mov): Parse floating-point constants.
978 (neon_qfloat_bits): Fix encoding.
979 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
980 preference to integer encoding when using the F32 type.
982 2006-04-26 Julian Brown <julian@codesourcery.com>
984 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
985 zero-initialising structures containing it will lead to invalid types).
986 (arm_it): Add vectype to each operand.
987 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
989 (neon_typed_alias): New structure. Extra information for typed
991 (reg_entry): Add neon type info field.
992 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
993 Break out alternative syntax for coprocessor registers, etc. into...
994 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
995 out from arm_reg_parse.
996 (parse_neon_type): Move. Return SUCCESS/FAIL.
997 (first_error): New function. Call to ensure first error which occurs is
999 (parse_neon_operand_type): Parse exactly one type.
1000 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1001 (parse_typed_reg_or_scalar): New function. Handle core of both
1002 arm_typed_reg_parse and parse_scalar.
1003 (arm_typed_reg_parse): Parse a register with an optional type.
1004 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1006 (parse_scalar): Parse a Neon scalar with optional type.
1007 (parse_reg_list): Use first_error.
1008 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1009 (neon_alias_types_same): New function. Return true if two (alias) types
1011 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1013 (insert_reg_alias): Return new reg_entry not void.
1014 (insert_neon_reg_alias): New function. Insert type/index information as
1015 well as register for alias.
1016 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1017 make typed register aliases accordingly.
1018 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1020 (s_unreq): Delete type information if present.
1021 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1022 (s_arm_unwind_save_mmxwcg): Likewise.
1023 (s_arm_unwind_movsp): Likewise.
1024 (s_arm_unwind_setfp): Likewise.
1025 (parse_shift): Likewise.
1026 (parse_shifter_operand): Likewise.
1027 (parse_address): Likewise.
1028 (parse_tb): Likewise.
1029 (tc_arm_regname_to_dw2regnum): Likewise.
1030 (md_pseudo_table): Add dn, qn.
1031 (parse_neon_mov): Handle typed operands.
1032 (parse_operands): Likewise.
1033 (neon_type_mask): Add N_SIZ.
1034 (N_ALLMODS): New macro.
1035 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1036 (el_type_of_type_chk): Add some safeguards.
1037 (modify_types_allowed): Fix logic bug.
1038 (neon_check_type): Handle operands with types.
1039 (neon_three_same): Remove redundant optional arg handling.
1040 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1041 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1042 (do_neon_step): Adjust accordingly.
1043 (neon_cmode_for_logic_imm): Use first_error.
1044 (do_neon_bitfield): Call neon_check_type.
1045 (neon_dyadic): Rename to...
1046 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1047 to allow modification of type of the destination.
1048 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1049 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1050 (do_neon_compare): Make destination be an untyped bitfield.
1051 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1052 (neon_mul_mac): Return early in case of errors.
1053 (neon_move_immediate): Use first_error.
1054 (neon_mac_reg_scalar_long): Fix type to include scalar.
1055 (do_neon_dup): Likewise.
1056 (do_neon_mov): Likewise (in several places).
1057 (do_neon_tbl_tbx): Fix type.
1058 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1059 (do_neon_ld_dup): Exit early in case of errors and/or use
1061 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1062 Handle .dn/.qn directives.
1063 (REGDEF): Add zero for reg_entry neon field.
1065 2006-04-26 Julian Brown <julian@codesourcery.com>
1067 * config/tc-arm.c (limits.h): Include.
1068 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1069 (fpu_vfp_v3_or_neon_ext): Declare constants.
1070 (neon_el_type): New enumeration of types for Neon vector elements.
1071 (neon_type_el): New struct. Define type and size of a vector element.
1072 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1074 (neon_type): Define struct. The type of an instruction.
1075 (arm_it): Add 'vectype' for the current instruction.
1076 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1077 (vfp_sp_reg_pos): Rename to...
1078 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1080 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1081 (Neon D or Q register).
1082 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1084 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1085 (my_get_expression): Allow above constant as argument to accept
1086 64-bit constants with optional prefix.
1087 (arm_reg_parse): Add extra argument to return the specific type of
1088 register in when either a D or Q register (REG_TYPE_NDQ) is
1089 requested. Can be NULL.
1090 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1091 (parse_reg_list): Update for new arm_reg_parse args.
1092 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1093 (parse_neon_el_struct_list): New function. Parse element/structure
1094 register lists for VLD<n>/VST<n> instructions.
1095 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1096 (s_arm_unwind_save_mmxwr): Likewise.
1097 (s_arm_unwind_save_mmxwcg): Likewise.
1098 (s_arm_unwind_movsp): Likewise.
1099 (s_arm_unwind_setfp): Likewise.
1100 (parse_big_immediate): New function. Parse an immediate, which may be
1101 64 bits wide. Put results in inst.operands[i].
1102 (parse_shift): Update for new arm_reg_parse args.
1103 (parse_address): Likewise. Add parsing of alignment specifiers.
1104 (parse_neon_mov): Parse the operands of a VMOV instruction.
1105 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1106 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1107 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1108 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1109 (parse_operands): Handle new codes above.
1110 (encode_arm_vfp_sp_reg): Rename to...
1111 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1112 selected VFP version only supports D0-D15.
1113 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1114 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1115 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1116 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1117 encode_arm_vfp_reg name, and allow 32 D regs.
1118 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1119 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1121 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1122 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1123 constant-load and conversion insns introduced with VFPv3.
1124 (neon_tab_entry): New struct.
1125 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1126 those which are the targets of pseudo-instructions.
1127 (neon_opc): Enumerate opcodes, use as indices into...
1128 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1129 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1130 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1131 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1133 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1135 (neon_type_mask): New. Compact type representation for type checking.
1136 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1137 permitted type combinations.
1138 (N_IGNORE_TYPE): New macro.
1139 (neon_check_shape): New function. Check an instruction shape for
1140 multiple alternatives. Return the specific shape for the current
1142 (neon_modify_type_size): New function. Modify a vector type and size,
1143 depending on the bit mask in argument 1.
1144 (neon_type_promote): New function. Convert a given "key" type (of an
1145 operand) into the correct type for a different operand, based on a bit
1147 (type_chk_of_el_type): New function. Convert a type and size into the
1148 compact representation used for type checking.
1149 (el_type_of_type_ckh): New function. Reverse of above (only when a
1150 single bit is set in the bit mask).
1151 (modify_types_allowed): New function. Alter a mask of allowed types
1152 based on a bit mask of modifications.
1153 (neon_check_type): New function. Check the type of the current
1154 instruction against the variable argument list. The "key" type of the
1155 instruction is returned.
1156 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1157 a Neon data-processing instruction depending on whether we're in ARM
1158 mode or Thumb-2 mode.
1159 (neon_logbits): New function.
1160 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1161 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1162 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1163 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1164 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1165 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1166 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1167 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1168 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1169 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1170 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1171 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1172 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1173 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1174 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1175 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1176 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1177 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1178 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1179 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1180 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1181 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1182 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1183 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1184 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1186 (parse_neon_type): New function. Parse Neon type specifier.
1187 (opcode_lookup): Allow parsing of Neon type specifiers.
1188 (REGNUM2, REGSETH, REGSET2): New macros.
1189 (reg_names): Add new VFPv3 and Neon registers.
1190 (NUF, nUF, NCE, nCE): New macros for opcode table.
1191 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1192 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1193 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1194 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1195 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1196 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1197 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1198 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1199 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1200 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1201 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1202 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1203 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1204 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1206 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1207 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1208 (arm_option_cpu_value): Add vfp3 and neon.
1209 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1212 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1214 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1215 syntax instead of hardcoded opcodes with ".w18" suffixes.
1216 (wide_branch_opcode): New.
1217 (build_transition): Use it to check for wide branch opcodes with
1218 either ".w18" or ".w15" suffixes.
1220 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1222 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1223 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1224 frag's is_literal flag.
1226 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1228 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1230 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1232 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1233 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1234 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1235 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1236 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1238 2005-04-20 Paul Brook <paul@codesourcery.com>
1240 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1242 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1244 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1246 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1247 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1248 Make some cpus unsupported on ELF. Run "make dep-am".
1249 * Makefile.in: Regenerate.
1251 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1253 * configure.in (--enable-targets): Indent help message.
1254 * configure: Regenerate.
1256 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1259 * config/tc-i386.c (i386_immediate): Check illegal immediate
1262 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1264 * config/tc-i386.c: Formatting.
1265 (output_disp, output_imm): ISO C90 params.
1267 * frags.c (frag_offset_fixed_p): Constify args.
1268 * frags.h (frag_offset_fixed_p): Ditto.
1270 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1271 (COFF_MAGIC): Delete.
1273 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1275 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1277 * po/POTFILES.in: Regenerated.
1279 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1281 * doc/as.texinfo: Mention that some .type syntaxes are not
1282 supported on all architectures.
1284 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1286 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1287 instructions when such transformations have been disabled.
1289 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1291 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1292 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1293 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1294 decoding the loop instructions. Remove current_offset variable.
1295 (xtensa_fix_short_loop_frags): Likewise.
1296 (min_bytes_to_other_loop_end): Remove current_offset argument.
1298 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1300 * config/tc-z80.c (z80_optimize_expr): Removed.
1301 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1303 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1305 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1306 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1307 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1308 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1309 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1310 at90can64, at90usb646, at90usb647, at90usb1286 and
1312 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1314 2006-04-07 Paul Brook <paul@codesourcery.com>
1316 * config/tc-arm.c (parse_operands): Set default error message.
1318 2006-04-07 Paul Brook <paul@codesourcery.com>
1320 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1322 2006-04-07 Paul Brook <paul@codesourcery.com>
1324 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1326 2006-04-07 Paul Brook <paul@codesourcery.com>
1328 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1329 (move_or_literal_pool): Handle Thumb-2 instructions.
1330 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1332 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1335 * config/tc-i386.c (match_template): Move 64-bit operand tests
1338 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1340 * po/Make-in: Add install-html target.
1341 * Makefile.am: Add install-html and install-html-recursive targets.
1342 * Makefile.in: Regenerate.
1343 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1344 * configure: Regenerate.
1345 * doc/Makefile.am: Add install-html and install-html-am targets.
1346 * doc/Makefile.in: Regenerate.
1348 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1350 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1353 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1354 Daniel Jacobowitz <dan@codesourcery.com>
1356 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1357 (GOTT_BASE, GOTT_INDEX): New.
1358 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1359 GOTT_INDEX when generating VxWorks PIC.
1360 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1361 use the generic *-*-vxworks* stanza instead.
1363 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1366 * frags.c (frag_offset_fixed_p): New function.
1367 * frags.h (frag_offset_fixed_p): Declare.
1368 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1369 (resolve_expression): Likewise.
1371 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1373 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1374 of the same length but different numbers of slots.
1376 2006-03-30 Andreas Schwab <schwab@suse.de>
1378 * configure.in: Fix help string for --enable-targets option.
1379 * configure: Regenerate.
1381 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1383 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1384 (m68k_ip): ... here. Use for all chips. Protect against buffer
1385 overrun and avoid excessive copying.
1387 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1388 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1389 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1390 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1391 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1392 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1393 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1394 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1395 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1396 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1397 (struct m68k_cpu): Change chip field to control_regs.
1398 (current_chip): Remove.
1399 (control_regs): New.
1400 (m68k_archs, m68k_extensions): Adjust.
1401 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1402 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1403 (find_cf_chip): Reimplement for new organization of cpu table.
1404 (select_control_regs): Remove.
1406 (struct save_opts): Save control regs, not chip.
1407 (s_save, s_restore): Adjust.
1408 (m68k_lookup_cpu): Give deprecated warning when necessary.
1409 (m68k_init_arch): Adjust.
1410 (md_show_usage): Adjust for new cpu table organization.
1412 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1414 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1415 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1416 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1418 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1419 (any_gotrel): New rule.
1420 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1421 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1423 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1424 (bfin_pic_ptr): New function.
1425 (md_pseudo_table): Add it for ".picptr".
1426 (OPTION_FDPIC): New macro.
1427 (md_longopts): Add -mfdpic.
1428 (md_parse_option): Handle it.
1429 (md_begin): Set BFD flags.
1430 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1431 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1433 * Makefile.am (bfin-parse.o): Update dependencies.
1434 (DEPTC_bfin_elf): Likewise.
1435 * Makefile.in: Regenerate.
1437 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1439 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1440 mcfemac instead of mcfmac.
1442 2006-03-23 Michael Matz <matz@suse.de>
1444 * config/tc-i386.c (type_names): Correct placement of 'static'.
1445 (reloc): Map some more relocs to their 64 bit counterpart when
1447 (output_insn): Work around breakage if DEBUG386 is defined.
1448 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1449 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1450 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1451 different from i386.
1452 (output_imm): Ditto.
1453 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1455 (md_convert_frag): Jumps can now be larger than 2GB away, error
1457 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1458 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1460 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1461 Daniel Jacobowitz <dan@codesourcery.com>
1462 Phil Edwards <phil@codesourcery.com>
1463 Zack Weinberg <zack@codesourcery.com>
1464 Mark Mitchell <mark@codesourcery.com>
1465 Nathan Sidwell <nathan@codesourcery.com>
1467 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1468 (md_begin): Complain about -G being used for PIC. Don't change
1469 the text, data and bss alignments on VxWorks.
1470 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1471 generating VxWorks PIC.
1472 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1473 (macro): Likewise, but do not treat la $25 specially for
1474 VxWorks PIC, and do not handle jal.
1475 (OPTION_MVXWORKS_PIC): New macro.
1476 (md_longopts): Add -mvxworks-pic.
1477 (md_parse_option): Don't complain about using PIC and -G together here.
1478 Handle OPTION_MVXWORKS_PIC.
1479 (md_estimate_size_before_relax): Always use the first relaxation
1480 sequence on VxWorks.
1481 * config/tc-mips.h (VXWORKS_PIC): New.
1483 2006-03-21 Paul Brook <paul@codesourcery.com>
1485 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1487 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1489 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1490 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1491 (get_loop_align_size): New.
1492 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1493 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1494 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1495 (get_noop_aligned_address): Use get_loop_align_size.
1496 (get_aligned_diff): Likewise.
1498 2006-03-21 Paul Brook <paul@codesourcery.com>
1500 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1502 2006-03-20 Paul Brook <paul@codesourcery.com>
1504 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1505 (do_t_branch): Encode branches inside IT blocks as unconditional.
1506 (do_t_cps): New function.
1507 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1508 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1509 (opcode_lookup): Allow conditional suffixes on all instructions in
1511 (md_assemble): Advance condexec state before checking for errors.
1512 (insns): Use do_t_cps.
1514 2006-03-20 Paul Brook <paul@codesourcery.com>
1516 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1517 outputting the insn.
1519 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1521 * config/tc-vax.c: Update copyright year.
1522 * config/tc-vax.h: Likewise.
1524 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1526 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1528 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1530 2006-03-17 Paul Brook <paul@codesourcery.com>
1532 * config/tc-arm.c (insns): Add ldm and stm.
1534 2006-03-17 Ben Elliston <bje@au.ibm.com>
1537 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1539 2006-03-16 Paul Brook <paul@codesourcery.com>
1541 * config/tc-arm.c (insns): Add "svc".
1543 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1545 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1546 flag and avoid double underscore prefixes.
1548 2006-03-10 Paul Brook <paul@codesourcery.com>
1550 * config/tc-arm.c (md_begin): Handle EABIv5.
1551 (arm_eabis): Add EF_ARM_EABI_VER5.
1552 * doc/c-arm.texi: Document -meabi=5.
1554 2006-03-10 Ben Elliston <bje@au.ibm.com>
1556 * app.c (do_scrub_chars): Simplify string handling.
1558 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1559 Daniel Jacobowitz <dan@codesourcery.com>
1560 Zack Weinberg <zack@codesourcery.com>
1561 Nathan Sidwell <nathan@codesourcery.com>
1562 Paul Brook <paul@codesourcery.com>
1563 Ricardo Anguiano <anguiano@codesourcery.com>
1564 Phil Edwards <phil@codesourcery.com>
1566 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1567 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1569 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1570 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1571 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1573 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1575 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1576 even when using the text-section-literals option.
1578 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1580 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1582 (m68k_ip): <case 'J'> Check we have some control regs.
1583 (md_parse_option): Allow raw arch switch.
1584 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1585 whether 68881 or cfloat was meant by -mfloat.
1586 (md_show_usage): Adjust extension display.
1587 (m68k_elf_final_processing): Adjust.
1589 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1591 * config/tc-avr.c (avr_mod_hash_value): New function.
1592 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1593 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1594 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1595 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1597 (tc_gen_reloc): Handle substractions of symbols, if possible do
1598 fixups, abort otherwise.
1599 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1600 tc_fix_adjustable): Define.
1602 2006-03-02 James E Wilson <wilson@specifix.com>
1604 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1605 change the template, then clear md.slot[curr].end_of_insn_group.
1607 2006-02-28 Jan Beulich <jbeulich@novell.com>
1609 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1611 2006-02-28 Jan Beulich <jbeulich@novell.com>
1614 * macro.c (getstring): Don't treat parentheses special anymore.
1615 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1616 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1619 2006-02-28 Mat <mat@csail.mit.edu>
1621 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1623 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1625 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1627 (CFI_signal_frame): Define.
1628 (cfi_pseudo_table): Add .cfi_signal_frame.
1629 (dot_cfi): Handle CFI_signal_frame.
1630 (output_cie): Handle cie->signal_frame.
1631 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1632 different. Copy signal_frame from FDE to newly created CIE.
1633 * doc/as.texinfo: Document .cfi_signal_frame.
1635 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1637 * doc/Makefile.am: Add html target.
1638 * doc/Makefile.in: Regenerate.
1639 * po/Make-in: Add html target.
1641 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1643 * config/tc-i386.c (output_insn): Support Intel Merom New
1646 * config/tc-i386.h (CpuMNI): New.
1647 (CpuUnknownFlags): Add CpuMNI.
1649 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1651 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1652 (hpriv_reg_table): New table for hyperprivileged registers.
1653 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1656 2006-02-24 DJ Delorie <dj@redhat.com>
1658 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1659 (tc_gen_reloc): Don't define.
1660 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1661 (OPTION_LINKRELAX): New.
1662 (md_longopts): Add it.
1664 (md_parse_options): Set it.
1665 (md_assemble): Emit relaxation relocs as needed.
1666 (md_convert_frag): Emit relaxation relocs as needed.
1667 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1668 (m32c_apply_fix): New.
1669 (tc_gen_reloc): New.
1670 (m32c_force_relocation): Force out jump relocs when relaxing.
1671 (m32c_fix_adjustable): Return false if relaxing.
1673 2006-02-24 Paul Brook <paul@codesourcery.com>
1675 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1676 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1677 (struct asm_barrier_opt): Define.
1678 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1679 (parse_psr): Accept V7M psr names.
1680 (parse_barrier): New function.
1681 (enum operand_parse_code): Add OP_oBARRIER.
1682 (parse_operands): Implement OP_oBARRIER.
1683 (do_barrier): New function.
1684 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1685 (do_t_cpsi): Add V7M restrictions.
1686 (do_t_mrs, do_t_msr): Validate V7M variants.
1687 (md_assemble): Check for NULL variants.
1688 (v7m_psrs, barrier_opt_names): New tables.
1689 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1690 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1691 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1692 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1693 (struct cpu_arch_ver_table): Define.
1694 (cpu_arch_ver): New.
1695 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1696 Tag_CPU_arch_profile.
1697 * doc/c-arm.texi: Document new cpu and arch options.
1699 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1701 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1703 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1705 * config/tc-ia64.c: Update copyright years.
1707 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1709 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1712 2005-02-22 Paul Brook <paul@codesourcery.com>
1714 * config/tc-arm.c (do_pld): Remove incorrect write to
1716 (encode_thumb32_addr_mode): Use correct operand.
1718 2006-02-21 Paul Brook <paul@codesourcery.com>
1720 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1722 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1723 Anil Paranjape <anilp1@kpitcummins.com>
1724 Shilin Shakti <shilins@kpitcummins.com>
1726 * Makefile.am: Add xc16x related entry.
1727 * Makefile.in: Regenerate.
1728 * configure.in: Added xc16x related entry.
1729 * configure: Regenerate.
1730 * config/tc-xc16x.h: New file
1731 * config/tc-xc16x.c: New file
1732 * doc/c-xc16x.texi: New file for xc16x
1733 * doc/all.texi: Entry for xc16x
1734 * doc/Makefile.texi: Added c-xc16x.texi
1735 * NEWS: Announce the support for the new target.
1737 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1739 * configure.tgt: set emulation for mips-*-netbsd*
1741 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1743 * config.in: Rebuilt.
1745 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1747 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1748 from 1, not 0, in error messages.
1749 (md_assemble): Simplify special-case check for ENTRY instructions.
1750 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1751 operand in error message.
1753 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1755 * configure.tgt (arm-*-linux-gnueabi*): Change to
1758 2006-02-10 Nick Clifton <nickc@redhat.com>
1760 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1761 32-bit value is propagated into the upper bits of a 64-bit long.
1763 * config/tc-arc.c (init_opcode_tables): Fix cast.
1764 (arc_extoper, md_operand): Likewise.
1766 2006-02-09 David Heine <dlheine@tensilica.com>
1768 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1769 each relaxation step.
1771 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1773 * configure.in (CHECK_DECLS): Add vsnprintf.
1774 * configure: Regenerate.
1775 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1776 include/declare here, but...
1777 * as.h: Move code detecting VARARGS idiom to the top.
1778 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1779 (vsnprintf): Declare if not already declared.
1781 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1783 * as.c (close_output_file): New.
1784 (main): Register close_output_file with xatexit before
1785 dump_statistics. Don't call output_file_close.
1787 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1789 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1790 mcf5329_control_regs): New.
1791 (not_current_architecture, selected_arch, selected_cpu): New.
1792 (m68k_archs, m68k_extensions): New.
1793 (archs): Renamed to ...
1794 (m68k_cpus): ... here. Adjust.
1796 (md_pseudo_table): Add arch and cpu directives.
1797 (find_cf_chip, m68k_ip): Adjust table scanning.
1798 (no_68851, no_68881): Remove.
1799 (md_assemble): Lazily initialize.
1800 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1801 (md_init_after_args): Move functionality to m68k_init_arch.
1802 (mri_chip): Adjust table scanning.
1803 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1804 options with saner parsing.
1805 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1806 m68k_init_arch): New.
1807 (s_m68k_cpu, s_m68k_arch): New.
1808 (md_show_usage): Adjust.
1809 (m68k_elf_final_processing): Set CF EF flags.
1810 * config/tc-m68k.h (m68k_init_after_args): Remove.
1811 (tc_init_after_args): Remove.
1812 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1813 (M68k-Directives): Document .arch and .cpu directives.
1815 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1817 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1818 synonyms for equ and defl.
1819 (z80_cons_fix_new): New function.
1820 (emit_byte): Disallow relative jumps to absolute locations.
1821 (emit_data): Only handle defb, prototype changed, because defb is
1822 now handled as pseudo-op rather than an instruction.
1823 (instab): Entries for defb,defw,db,dw moved from here...
1824 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1825 Add entries for def24,def32,d24,d32.
1826 (md_assemble): Improved error handling.
1827 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1828 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1829 (z80_cons_fix_new): Declare.
1830 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1831 (def24,d24,def32,d32): New pseudo-ops.
1833 2006-02-02 Paul Brook <paul@codesourcery.com>
1835 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1837 2005-02-02 Paul Brook <paul@codesourcery.com>
1839 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1840 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1841 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1842 T2_OPCODE_RSB): Define.
1843 (thumb32_negate_data_op): New function.
1844 (md_apply_fix): Use it.
1846 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1848 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1850 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1851 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1853 (relaxation_requirements): Add pfinish_frag argument and use it to
1854 replace setting tinsn->record_fix fields.
1855 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1856 and vinsn_to_insnbuf. Remove references to record_fix and
1857 slot_sub_symbols fields.
1858 (xtensa_mark_narrow_branches): Delete unused code.
1859 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1861 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1863 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1864 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1865 of the record_fix field. Simplify error messages for unexpected
1867 (set_expr_symbol_offset_diff): Delete.
1869 2006-01-31 Paul Brook <paul@codesourcery.com>
1871 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1873 2006-01-31 Paul Brook <paul@codesourcery.com>
1874 Richard Earnshaw <rearnsha@arm.com>
1876 * config/tc-arm.c: Use arm_feature_set.
1877 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1878 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1879 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1882 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1883 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1884 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1885 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1887 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1888 (arm_opts): Move old cpu/arch options from here...
1889 (arm_legacy_opts): ... to here.
1890 (md_parse_option): Search arm_legacy_opts.
1891 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1892 (arm_float_abis, arm_eabis): Make const.
1894 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1896 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1898 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1900 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1901 in load immediate intruction.
1903 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1905 * config/bfin-parse.y (value_match): Use correct conversion
1906 specifications in template string for __FILE__ and __LINE__.
1910 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1912 Introduce TLS descriptors for i386 and x86_64.
1913 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1914 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1915 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1916 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1917 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1919 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1920 (lex_got): Handle @tlsdesc and @tlscall.
1921 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1923 2006-01-11 Nick Clifton <nickc@redhat.com>
1925 Fixes for building on 64-bit hosts:
1926 * config/tc-avr.c (mod_index): New union to allow conversion
1927 between pointers and integers.
1928 (md_begin, avr_ldi_expression): Use it.
1929 * config/tc-i370.c (md_assemble): Add cast for argument to print
1931 * config/tc-tic54x.c (subsym_substitute): Likewise.
1932 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1933 opindex field of fr_cgen structure into a pointer so that it can
1934 be stored in a frag.
1935 * config/tc-mn10300.c (md_assemble): Likewise.
1936 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1938 * config/tc-v850.c: Replace uses of (int) casts with correct
1941 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1944 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1946 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1949 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1950 a local-label reference.
1952 For older changes see ChangeLog-2005
1958 version-control: never