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PR gas/16025
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1 2013-10-09 Nick Clifton <nickc@redhat.com>
2
3 PR gas/16025
4 * config/tc-epiphany.c (md_convert_frag): Add missing break
5 statement.
6
7 PR gas/16026
8 * config/tc-mn10200.c (md_convert_frag): Add missing break
9 statement.
10
11 2013-10-08 Jan Beulich <jbeulich@suse.com>
12
13 * tc-i386.c (check_word_reg): Remove misplaced "else".
14 (check_long_reg): Restore symmetry with check_word_reg.
15
16 2013-10-08 Jan Beulich <jbeulich@suse.com>
17
18 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
19 LR/PC check.
20
21 2013-10-08 Nick Clifton <nickc@redhat.com>
22
23 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
24 for "<foo>a". Issue error messages for unrecognised or corrrupt
25 size extensions.
26
27 2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28
29 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
30 possible.
31
32 2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
33
34 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
35 * doc/c-i386.texi: Add -march=bdver4 option.
36
37 2013-09-20 Alan Modra <amodra@gmail.com>
38
39 * configure: Regenerate.
40
41 2013-09-18 Tristan Gingold <gingold@adacore.com>
42
43 * NEWS: Add marker for 2.24.
44
45 2013-09-18 Nick Clifton <nickc@redhat.com>
46
47 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
48 (move_data): New variable.
49 (md_parse_option): Parse -md.
50 (msp430_section): New function. Catch references to the .bss or
51 .data sections and generate a special symbol for use by the libcrt
52 library.
53 (md_pseudo_table): Intercept .section directives.
54 (md_longopt): Add -md
55 (md_show_usage): Likewise.
56 (msp430_operands): Generate a warning message if a NOP is inserted
57 into the instruction stream.
58 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
59
60 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
61
62 * config/tc-mips.c (mips_elf_final_processing): Set
63 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
64
65 2013-09-16 Will Newton <will.newton@linaro.org>
66
67 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
68 disallowing element size 64 with interleave other than 1.
69
70 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
71
72 * config/tc-mips.c (match_insn): Set error when $31 is used for
73 bltzal* and bgezal*.
74
75 2013-09-04 Tristan Gingold <gingold@adacore.com>
76
77 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
78 symbols.
79
80 2013-09-04 Roland McGrath <mcgrathr@google.com>
81
82 PR gas/15914
83 * config/tc-arm.c (T16_32_TAB): Add _udf.
84 (do_t_udf): New function.
85 (insns): Add "udf".
86
87 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
88
89 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
90 assembler errors at correct position.
91
92 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
93
94 PR binutils/15834
95 * config/tc-ia64.c: Fix typos.
96 * config/tc-sparc.c: Likewise.
97 * config/tc-z80.c: Likewise.
98 * doc/c-i386.texi: Likewise.
99 * doc/c-m32r.texi: Likewise.
100
101 2013-08-23 Will Newton <will.newton@linaro.org>
102
103 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
104 for pre-indexed addressing modes.
105
106 2013-08-21 Alan Modra <amodra@gmail.com>
107
108 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
109 range check label number for use with fb_low_counter array.
110
111 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
112
113 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
114 (mips_parse_argument_token, validate_micromips_insn, md_begin)
115 (check_regno, match_float_constant, check_completed_insn, append_insn)
116 (match_insn, match_mips16_insn, match_insns, macro_start)
117 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
118 (mips16_ip, mips_set_option_string, md_parse_option)
119 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
120 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
121 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
122 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
123 Start error messages with a lower-case letter. Do not end error
124 messages with a period. Wrap long messages to 80 character-lines.
125 Use "cannot" instead of "can't" and "can not".
126
127 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
128
129 * config/tc-mips.c (imm_expr): Expand comment.
130 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
131 when populated.
132
133 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
134
135 * config/tc-mips.c (imm2_expr): Delete.
136 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
137
138 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
139
140 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
141 (macro): Remove M_DEXT and M_DINS handling.
142
143 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
144
145 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
146 lax_max with lax_match.
147 (match_int_operand): Update accordingly. Don't report an error
148 for !lax_match-only cases.
149 (match_insn): Replace more_alts with lax_match and use it to
150 initialize the mips_arg_info field. Add a complete_p parameter.
151 Handle implicit VU0 suffixes here.
152 (match_invalid_for_isa, match_insns, match_mips16_insns): New
153 functions.
154 (mips_ip, mips16_ip): Use them.
155
156 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
157
158 * config/tc-mips.c (match_expression): Report uses of registers here.
159 Add a "must be an immediate expression" error. Handle elided offsets
160 here rather than...
161 (match_int_operand): ...here.
162
163 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
164
165 * config/tc-mips.c (mips_arg_info): Remove soft_match.
166 (match_out_of_range, match_not_constant): New functions.
167 (match_const_int): Remove fallback parameter and check for soft_match.
168 Use match_not_constant.
169 (match_mapped_int_operand, match_addiusp_operand)
170 (match_perf_reg_operand, match_save_restore_list_operand)
171 (match_mdmx_imm_reg_operand): Update accordingly. Use
172 match_out_of_range and set_insn_error* instead of as_bad.
173 (match_int_operand): Likewise. Use match_not_constant in the
174 !allows_nonconst case.
175 (match_float_constant): Report invalid float constants.
176 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
177 match_float_constant to check for invalid constants. Fail the
178 match if match_const_int or match_float_constant return false.
179 (mips_ip): Update accordingly.
180 (mips16_ip): Likewise. Undo null termination of instruction name
181 once lookup is complete.
182
183 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
184
185 * config/tc-mips.c (mips_insn_error_format): New enum.
186 (mips_insn_error): New struct.
187 (insn_error): Change to a mips_insn_error.
188 (clear_insn_error, set_insn_error_format, set_insn_error)
189 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
190 functions.
191 (mips_parse_argument_token, md_assemble, match_insn)
192 (match_mips16_insn): Use them instead of manipulating insn_error
193 directly.
194 (mips_ip, mips16_ip): Likewise. Simplify control flow.
195
196 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
197
198 * config/tc-mips.c (normalize_constant_expr): Move further up file.
199 (normalize_address_expr): Likewise.
200 (match_insn, match_mips16_insn): New functions, split out from...
201 (mips_ip, mips16_ip): ...here.
202
203 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
204
205 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
206 OP_OPTIONAL_REG.
207 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
208 for optional operands.
209
210 2013-08-16 Alan Modra <amodra@gmail.com>
211
212 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
213 modifiers generally.
214
215 2013-08-16 Alan Modra <amodra@gmail.com>
216
217 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
218
219 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
220
221 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
222 argument as alignment.
223
224 2013-08-09 Nick Clifton <nickc@redhat.com>
225
226 * config/tc-rl78.c (elf_flags): New variable.
227 (enum options): Add OPTION_G10.
228 (md_longopts): Add mg10.
229 (md_parse_option): Parse -mg10.
230 (rl78_elf_final_processing): New function.
231 * config/tc-rl78.c (tc_final_processing): Define.
232 * doc/c-rl78.texi: Document -mg10 option.
233
234 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
235
236 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
237 suffixes to be elided too.
238 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
239 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
240 to be omitted too.
241
242 2013-08-05 John Tytgat <john@bass-software.com>
243
244 * po/POTFILES.in: Regenerate.
245
246 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
247 Konrad Eisele <konrad@gaisler.com>
248
249 * config/tc-sparc.c (sparc_arch_types): Add leon.
250 (sparc_arch): Move sparc4 around and add leon.
251 (sparc_target_format): Document -Aleon.
252 * doc/c-sparc.texi: Likewise.
253
254 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
255
256 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
257
258 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
259 Richard Sandiford <rdsandiford@googlemail.com>
260
261 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
262 (RWARN): Bump to 0x8000000.
263 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
264 (RTYPE_R5900_ACC): New register types.
265 (RTYPE_MASK): Include them.
266 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
267 macros.
268 (reg_names): Include them.
269 (mips_parse_register_1): New function, split out from...
270 (mips_parse_register): ...here. Add a channels_ptr parameter.
271 Look for VU0 channel suffixes when nonnull.
272 (reg_lookup): Update the call to mips_parse_register.
273 (mips_parse_vu0_channels): New function.
274 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
275 (mips_operand_token): Add a "channels" field to the union.
276 Extend the comment above "ch" to OT_DOUBLE_CHAR.
277 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
278 (mips_parse_argument_token): Handle channel suffixes here too.
279 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
280 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
281 Handle '#' formats.
282 (md_begin): Register $vfN and $vfI registers.
283 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
284 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
285 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
286 (match_vu0_suffix_operand): New function.
287 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
288 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
289 (mips_lookup_insn): New function.
290 (mips_ip): Use it. Allow "+K" operands to be elided at the end
291 of an instruction. Handle '#' sequences.
292
293 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
294
295 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
296 values and use it instead of sreg, treg, xreg, etc.
297
298 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
299
300 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
301 and mips_int_operand_max.
302 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
303 Delete.
304 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
305 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
306 instead of mips16_immed_operand.
307
308 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
309
310 * config/tc-mips.c (mips16_macro): Don't use move_register.
311 (mips16_ip): Allow macros to use 'p'.
312
313 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
314
315 * config/tc-mips.c (MAX_OPERANDS): New macro.
316 (mips_operand_array): New structure.
317 (mips_operands, mips16_operands, micromips_operands): New arrays.
318 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
319 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
320 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
321 (micromips_to_32_reg_q_map): Delete.
322 (insn_operands, insn_opno, insn_extract_operand): New functions.
323 (validate_mips_insn): Take a mips_operand_array as argument and
324 use it to build up a list of operands. Extend to handle INSN_MACRO
325 and MIPS16.
326 (validate_mips16_insn): New function.
327 (validate_micromips_insn): Take a mips_operand_array as argument.
328 Handle INSN_MACRO.
329 (md_begin): Initialize mips_operands, mips16_operands and
330 micromips_operands. Call validate_mips_insn and
331 validate_micromips_insn for macro instructions too.
332 Call validate_mips16_insn for MIPS16 instructions.
333 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
334 New functions.
335 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
336 them. Handle INSN_UDI.
337 (get_append_method): Use gpr_read_mask.
338
339 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
340
341 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
342 flags for MIPS16 and non-MIPS16 instructions.
343 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
344 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
345 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
346 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
347 and non-MIPS16 instructions. Fix formatting.
348
349 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
350
351 * config/tc-mips.c (reg_needs_delay): Move later in file.
352 Use gpr_write_mask.
353 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
354
355 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
356 Alexander Ivchenko <alexander.ivchenko@intel.com>
357 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
358 Sergey Lega <sergey.s.lega@intel.com>
359 Anna Tikhonova <anna.tikhonova@intel.com>
360 Ilya Tocar <ilya.tocar@intel.com>
361 Andrey Turetskiy <andrey.turetskiy@intel.com>
362 Ilya Verbin <ilya.verbin@intel.com>
363 Kirill Yukhin <kirill.yukhin@intel.com>
364 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
365
366 * config/tc-i386-intel.c (O_zmmword_ptr): New.
367 (i386_types): Add zmmword.
368 (i386_intel_simplify_register): Allow regzmm.
369 (i386_intel_simplify): Handle zmmwords.
370 (i386_intel_operand): Handle RC/SAE, vector operations and
371 zmmwords.
372 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
373 (struct RC_Operation): New.
374 (struct Mask_Operation): New.
375 (struct Broadcast_Operation): New.
376 (vex_prefix): Size of bytes increased to 4 to support EVEX
377 encoding.
378 (enum i386_error): Add new error codes: unsupported_broadcast,
379 broadcast_not_on_src_operand, broadcast_needed,
380 unsupported_masking, mask_not_on_destination, no_default_mask,
381 unsupported_rc_sae, rc_sae_operand_not_last_imm,
382 invalid_register_operand, try_vector_disp8.
383 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
384 rounding, broadcast, memshift.
385 (struct RC_name): New.
386 (RC_NamesTable): New.
387 (evexlig): New.
388 (evexwig): New.
389 (extra_symbol_chars): Add '{'.
390 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
391 (i386_operand_type): Add regzmm, regmask and vec_disp8.
392 (match_mem_size): Handle zmmwords.
393 (operand_type_match): Handle zmm-registers.
394 (mode_from_disp_size): Handle vec_disp8.
395 (fits_in_vec_disp8): New.
396 (md_begin): Handle {} properly.
397 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
398 (build_vex_prefix): Handle vrex.
399 (build_evex_prefix): New.
400 (process_immext): Adjust to properly handle EVEX.
401 (md_assemble): Add EVEX encoding support.
402 (swap_2_operands): Correctly handle operands with masking,
403 broadcasting or RC/SAE.
404 (check_VecOperands): Support EVEX features.
405 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
406 (match_template): Support regzmm and handle new error codes.
407 (process_suffix): Handle zmmwords and zmm-registers.
408 (check_byte_reg): Extend to zmm-registers.
409 (process_operands): Extend to zmm-registers.
410 (build_modrm_byte): Handle EVEX.
411 (output_insn): Adjust to properly handle EVEX case.
412 (disp_size): Handle vec_disp8.
413 (output_disp): Support compressed disp8*N evex feature.
414 (output_imm): Handle RC/SAE immediates properly.
415 (check_VecOperations): New.
416 (i386_immediate): Handle EVEX features.
417 (i386_index_check): Handle zmmwords and zmm-registers.
418 (RC_SAE_immediate): New.
419 (i386_att_operand): Handle EVEX features.
420 (parse_real_register): Add a check for ZMM/Mask registers.
421 (OPTION_MEVEXLIG): New.
422 (OPTION_MEVEXWIG): New.
423 (md_longopts): Add mevexlig and mevexwig.
424 (md_parse_option): Handle mevexlig and mevexwig options.
425 (md_show_usage): Add description for mevexlig and mevexwig.
426 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
427 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
428
429 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
430
431 * config/tc-i386.c (cpu_arch): Add .sha.
432 * doc/c-i386.texi: Document sha/.sha.
433
434 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
435 Kirill Yukhin <kirill.yukhin@intel.com>
436 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
437
438 * config/tc-i386.c (BND_PREFIX): New.
439 (struct _i386_insn): Add new field bnd_prefix.
440 (add_bnd_prefix): New.
441 (cpu_arch): Add MPX.
442 (i386_operand_type): Add regbnd.
443 (md_assemble): Handle BND prefixes.
444 (parse_insn): Likewise.
445 (output_branch): Likewise.
446 (output_jump): Likewise.
447 (build_modrm_byte): Handle regbnd.
448 (OPTION_MADD_BND_PREFIX): New.
449 (md_longopts): Add entry for 'madd-bnd-prefix'.
450 (md_parse_option): Handle madd-bnd-prefix option.
451 (md_show_usage): Add description for madd-bnd-prefix
452 option.
453 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
454
455 2013-07-24 Tristan Gingold <gingold@adacore.com>
456
457 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
458 xcoff targets.
459
460 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
461
462 * config/tc-s390.c (s390_machine): Don't force the .machine
463 argument to lower case.
464
465 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
466
467 * config/tc-arm.c (s_arm_arch_extension): Improve error message
468 for invalid extension.
469
470 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
471
472 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
473 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
474 (aarch64_abi): New variable.
475 (ilp32_p): Change to be a macro.
476 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
477 (struct aarch64_option_abi_value_table): New struct.
478 (aarch64_abis): New table.
479 (aarch64_parse_abi): New function.
480 (aarch64_long_opts): Add entry for -mabi=.
481 * doc/as.texinfo (Target AArch64 options): Document -mabi.
482 * doc/c-aarch64.texi: Likewise.
483
484 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
485
486 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
487 unsigned comparison.
488
489 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
490
491 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
492 RX610.
493 * config/rx-parse.y: (rx_check_float_support): Add function to
494 check floating point operation support for target RX100 and
495 RX200.
496 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
497 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
498 RX200, RX600, and RX610
499
500 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
501
502 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
503
504 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
505
506 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
507 * doc/c-avr.texi: Likewise.
508
509 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
510
511 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
512 error with older GCCs.
513 (mips16_macro_build): Dereference args.
514
515 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
516
517 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
518 New functions, split out from...
519 (reg_lookup): ...here. Remove itbl support.
520 (reglist_lookup): Delete.
521 (mips_operand_token_type): New enum.
522 (mips_operand_token): New structure.
523 (mips_operand_tokens): New variable.
524 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
525 (mips_parse_arguments): New functions.
526 (md_begin): Initialize mips_operand_tokens.
527 (mips_arg_info): Add a token field. Remove optional_reg field.
528 (match_char, match_expression): New functions.
529 (match_const_int): Use match_expression. Remove "s" argument
530 and return a boolean result. Remove O_register handling.
531 (match_regno, match_reg, match_reg_range): New functions.
532 (match_int_operand, match_mapped_int_operand, match_msb_operand)
533 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
534 (match_addiusp_operand, match_clo_clz_dest_operand)
535 (match_lwm_swm_list_operand, match_entry_exit_operand)
536 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
537 (match_tied_reg_operand): Remove "s" argument and return a boolean
538 result. Match tokens rather than text. Update calls to
539 match_const_int. Rely on match_regno to call check_regno.
540 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
541 "arg" argument. Return a boolean result.
542 (parse_float_constant): Replace with...
543 (match_float_constant): ...this new function.
544 (match_operand): Remove "s" argument and return a boolean result.
545 Update calls to subfunctions.
546 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
547 rather than string-parsing routines. Update handling of optional
548 registers for token scheme.
549
550 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
551
552 * config/tc-mips.c (parse_float_constant): Split out from...
553 (mips_ip): ...here.
554
555 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
556
557 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
558 Delete.
559
560 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
561
562 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
563 (match_entry_exit_operand): New function.
564 (match_save_restore_list_operand): Likewise.
565 (match_operand): Use them.
566 (check_absolute_expr): Delete.
567 (mips16_ip): Rewrite main parsing loop to use mips_operands.
568
569 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
570
571 * config/tc-mips.c: Enable functions commented out in previous patch.
572 (SKIP_SPACE_TABS): Move further up file.
573 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
574 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
575 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
576 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
577 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
578 (micromips_imm_b_map, micromips_imm_c_map): Delete.
579 (mips_lookup_reg_pair): Delete.
580 (macro): Use report_bad_range and report_bad_field.
581 (mips_immed, expr_const_in_range): Delete.
582 (mips_ip): Rewrite main parsing loop to use new functions.
583
584 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
585
586 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
587 Change return type to bfd_boolean.
588 (report_bad_range, report_bad_field): New functions.
589 (mips_arg_info): New structure.
590 (match_const_int, convert_reg_type, check_regno, match_int_operand)
591 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
592 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
593 (match_addiusp_operand, match_clo_clz_dest_operand)
594 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
595 (match_pc_operand, match_tied_reg_operand, match_operand)
596 (check_completed_insn): New functions, commented out for now.
597
598 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
599
600 * config/tc-mips.c (insn_insert_operand): New function.
601 (macro_build, mips16_macro_build): Put null character check
602 in the for loop and convert continues to breaks. Use operand
603 structures to handle constant operands.
604
605 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
606
607 * config/tc-mips.c (validate_mips_insn): Move further up file.
608 Add insn_bits and decode_operand arguments. Use the mips_operand
609 fields to work out which bits an operand occupies. Detect double
610 definitions.
611 (validate_micromips_insn): Move further up file. Call into
612 validate_mips_insn.
613
614 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
615
616 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
617
618 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
619
620 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
621 and "~".
622 (macro): Update accordingly.
623
624 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
625
626 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
627 (imm_reloc): Delete.
628 (md_assemble): Remove imm_reloc handling.
629 (mips_ip): Update commentary. Use offset_expr and offset_reloc
630 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
631 Use a temporary array rather than imm_reloc when parsing
632 constant expressions. Remove imm_reloc initialization.
633 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
634 for the relaxable field. Use a relax_char variable to track the
635 type of this field. Remove imm_reloc initialization.
636
637 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
638
639 * config/tc-mips.c (mips16_ip): Handle "I".
640
641 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
642
643 * config/tc-mips.c (mips_flag_nan2008): New variable.
644 (options): Add OPTION_NAN enum value.
645 (md_longopts): Handle it.
646 (md_parse_option): Likewise.
647 (s_nan): New function.
648 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
649 (md_show_usage): Add -mnan.
650
651 * doc/as.texinfo (Overview): Add -mnan.
652 * doc/c-mips.texi (MIPS Opts): Document -mnan.
653 (MIPS NaN Encodings): New node. Document .nan directive.
654 (MIPS-Dependent): List the new node.
655
656 2013-07-09 Tristan Gingold <gingold@adacore.com>
657
658 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
659
660 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
661
662 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
663 for 'A' and assume that the constant has been elided if the result
664 is an O_register.
665
666 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
667
668 * config/tc-mips.c (gprel16_reloc_p): New function.
669 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
670 BFD_RELOC_UNUSED.
671 (offset_high_part, small_offset_p): New functions.
672 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
673 register load and store macros, handle the 16-bit offset case first.
674 If a 16-bit offset is not suitable for the instruction we're
675 generating, load it into the temporary register using
676 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
677 M_L_DAB code once the address has been constructed. For double load
678 and store macros, again handle the 16-bit offset case first.
679 If the second register cannot be accessed from the same high
680 part as the first, load it into AT using ADDRESS_ADDI_INSN.
681 Fix the handling of LD in cases where the first register is the
682 same as the base. Also handle the case where the offset is
683 not 16 bits and the second register cannot be accessed from the
684 same high part as the first. For unaligned loads and stores,
685 fuse the offbits == 12 and old "ab" handling. Apply this handling
686 whenever the second offset needs a different high part from the first.
687 Construct the offset using ADDRESS_ADDI_INSN where possible,
688 for offbits == 16 as well as offbits == 12. Use offset_reloc
689 when constructing the individual loads and stores.
690 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
691 and offset_reloc before matching against a particular opcode.
692 Handle elided 'A' constants. Allow 'A' constants to use
693 relocation operators.
694
695 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
696
697 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
698 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
699 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
700
701 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
702
703 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
704 Require the msb to be <= 31 for "+s". Check that the size is <= 31
705 for both "+s" and "+S".
706
707 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
708
709 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
710 (mips_ip, mips16_ip): Handle "+i".
711
712 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
713
714 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
715 (micromips_to_32_reg_h_map): Rename to...
716 (micromips_to_32_reg_h_map1): ...this.
717 (micromips_to_32_reg_i_map): Rename to...
718 (micromips_to_32_reg_h_map2): ...this.
719 (mips_lookup_reg_pair): New function.
720 (gpr_write_mask, macro): Adjust after above renaming.
721 (validate_micromips_insn): Remove "mi" handling.
722 (mips_ip): Likewise. Parse both registers in a pair for "mh".
723
724 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
725
726 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
727 (mips_ip): Remove "+D" and "+T" handling.
728
729 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
730
731 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
732 relocs.
733
734 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
735
736 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
737
738 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
739
740 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
741 (aarch64_force_relocation): Likewise.
742
743 2013-07-02 Alan Modra <amodra@gmail.com>
744
745 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
746
747 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
748
749 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
750 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
751 Replace @sc{mips16} with literal `MIPS16'.
752 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
753
754 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
755
756 * config/tc-aarch64.c (reloc_table): Replace
757 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
758 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
759 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
760 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
761 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
762 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
763 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
764 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
765 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
766 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
767 (aarch64_force_relocation): Likewise.
768
769 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
770
771 * config/tc-aarch64.c (ilp32_p): New static variable.
772 (elf64_aarch64_target_format): Return the target according to the
773 value of 'ilp32_p'.
774 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
775 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
776 (aarch64_dwarf2_addr_size): New function.
777 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
778 (DWARF2_ADDR_SIZE): New define.
779
780 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
781
782 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
783
784 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
785
786 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
787
788 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
789
790 * config/tc-mips.c (mips_set_options): Add insn32 member.
791 (mips_opts): Initialize it.
792 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
793 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
794 (md_longopts): Add "minsn32" and "mno-insn32" options.
795 (is_size_valid): Handle insn32 mode.
796 (md_assemble): Pass instruction string down to macro.
797 (brk_fmt): Add second dimension and insn32 mode initializers.
798 (mfhl_fmt): Likewise.
799 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
800 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
801 (macro_build_jalr, move_register): Handle insn32 mode.
802 (macro_build_branch_rs): Likewise.
803 (macro): Handle insn32 mode.
804 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
805 (mips_ip): Handle insn32 mode.
806 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
807 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
808 (mips_handle_align): Handle insn32 mode.
809 (md_show_usage): Add -minsn32 and -mno-insn32.
810
811 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
812 -mno-insn32 options.
813 (-minsn32, -mno-insn32): New options.
814 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
815 options.
816 (MIPS assembly options): New node. Document .set insn32 and
817 .set noinsn32.
818 (MIPS-Dependent): List the new node.
819
820 2013-06-25 Nick Clifton <nickc@redhat.com>
821
822 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
823 the PC in indirect addressing on 430xv2 parts.
824 (msp430_operands): Add version test to hardware bug encoding
825 restrictions.
826
827 2013-06-24 Roland McGrath <mcgrathr@google.com>
828
829 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
830 so it skips whitespace before it.
831 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
832
833 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
834 (arm_reg_parse_multi): Skip whitespace first.
835 (parse_reg_list): Likewise.
836 (parse_vfp_reg_list): Likewise.
837 (s_arm_unwind_save_mmxwcg): Likewise.
838
839 2013-06-24 Nick Clifton <nickc@redhat.com>
840
841 PR gas/15623
842 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
843
844 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
845
846 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
847
848 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
849
850 * config/tc-mips.c: Assert that offsetT and valueT are at least
851 8 bytes in size.
852 (GPR_SMIN, GPR_SMAX): New macros.
853 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
854
855 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
856
857 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
858 conditions. Remove any code deselected by them.
859 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
860
861 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
862
863 * NEWS: Note removal of ECOFF support.
864 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
865 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
866 (MULTI_CFILES): Remove config/e-mipsecoff.c.
867 * Makefile.in: Regenerate.
868 * configure.in: Remove MIPS ECOFF references.
869 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
870 Delete cases.
871 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
872 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
873 (mips-*-*): ...this single case.
874 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
875 MIPS emulations to be e-mipself*.
876 * configure: Regenerate.
877 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
878 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
879 (mips-*-sysv*): Remove coff and ecoff cases.
880 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
881 * ecoff.c: Remove reference to MIPS ECOFF.
882 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
883 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
884 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
885 (mips_hi_fixup): Tweak comment.
886 (append_insn): Require a howto.
887 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
888
889 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
890
891 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
892 Use "CPU" instead of "cpu".
893 * doc/c-mips.texi: Likewise.
894 (MIPS Opts): Rename to MIPS Options.
895 (MIPS option stack): Rename to MIPS Option Stack.
896 (MIPS ASE instruction generation overrides): Rename to
897 MIPS ASE Instruction Generation Overrides (for now).
898 (MIPS floating-point): Rename to MIPS Floating-Point.
899
900 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
901
902 * doc/c-mips.texi (MIPS Macros): New section.
903 (MIPS Object): Replace with...
904 (MIPS Small Data): ...this new section.
905
906 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
907
908 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
909 Capitalize name. Use @kindex instead of @cindex for .set entries.
910
911 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
912
913 * doc/c-mips.texi (MIPS Stabs): Remove section.
914
915 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
916
917 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
918 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
919 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
920 (ISA_SUPPORTS_VIRT64_ASE): Delete.
921 (mips_ase): New structure.
922 (mips_ases): New table.
923 (FP64_ASES): New macro.
924 (mips_ase_groups): New array.
925 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
926 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
927 functions.
928 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
929 (md_parse_option): Use mips_ases and mips_set_ase instead of
930 separate case statements for each ASE option.
931 (mips_after_parse_args): Use FP64_ASES. Use
932 mips_check_isa_supports_ases to check the ASEs against
933 other options.
934 (s_mipsset): Use mips_ases and mips_set_ase instead of
935 separate if statements for each ASE option. Use
936 mips_check_isa_supports_ases, even when a non-ASE option
937 is specified.
938
939 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
940
941 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
942
943 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
944
945 * config/tc-mips.c (md_shortopts, options, md_longopts)
946 (md_longopts_size): Move earlier in file.
947
948 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
949
950 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
951 with a single "ase" bitmask.
952 (mips_opts): Update accordingly.
953 (file_ase, file_ase_explicit): New variables.
954 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
955 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
956 (ISA_HAS_ROR): Adjust for mips_set_options change.
957 (is_opcode_valid): Take the base ase mask directly from mips_opts.
958 (mips_ip): Adjust for mips_set_options change.
959 (md_parse_option): Likewise. Update file_ase_explicit.
960 (mips_after_parse_args): Adjust for mips_set_options change.
961 Use bitmask operations to select the default ASEs. Set file_ase
962 rather than individual per-ASE variables.
963 (s_mipsset): Adjust for mips_set_options change.
964 (mips_elf_final_processing): Test file_ase rather than
965 file_ase_mdmx. Remove commented-out code.
966
967 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
968
969 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
970 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
971 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
972 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
973 (mips_after_parse_args): Use the new "ase" field to choose
974 the default ASEs.
975 (mips_cpu_info_table): Move ASEs from the "flags" field to the
976 "ase" field.
977
978 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
979
980 * config/tc-arm.c (symbol_preemptible): New function.
981 (relax_branch): Use it.
982
983 2013-06-17 Catherine Moore <clm@codesourcery.com>
984 Maciej W. Rozycki <macro@codesourcery.com>
985 Chao-Ying Fu <fu@mips.com>
986
987 * config/tc-mips.c (mips_set_options): Add ase_eva.
988 (mips_set_options mips_opts): Add ase_eva.
989 (file_ase_eva): Declare.
990 (ISA_SUPPORTS_EVA_ASE): Define.
991 (IS_SEXT_9BIT_NUM): Define.
992 (MIPS_CPU_ASE_EVA): Define.
993 (is_opcode_valid): Add support for ase_eva.
994 (macro_build): Likewise.
995 (macro): Likewise.
996 (validate_mips_insn): Likewise.
997 (validate_micromips_insn): Likewise.
998 (mips_ip): Likewise.
999 (options): Add OPTION_EVA and OPTION_NO_EVA.
1000 (md_longopts): Add -meva and -mno-eva.
1001 (md_parse_option): Process new options.
1002 (mips_after_parse_args): Check for valid EVA combinations.
1003 (s_mipsset): Likewise.
1004
1005 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1006
1007 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1008 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1009 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1010 (dwarf2_gen_line_info_1): Update call accordingly.
1011 (dwarf2_move_insn): New function.
1012 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1013
1014 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1015
1016 Revert:
1017
1018 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1019
1020 PR gas/13024
1021 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1022 (dwarf2_gen_line_info_1): Delete.
1023 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1024 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1025 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1026 (dwarf2_directive_loc): Push previous .locs instead of generating
1027 them immediately.
1028
1029 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1030
1031 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1032 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1033
1034 2013-06-13 Nick Clifton <nickc@redhat.com>
1035
1036 PR gas/15602
1037 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1038 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1039 function. Generates an error if the adjusted offset is out of a
1040 16-bit range.
1041
1042 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1043
1044 * config/tc-nios2.c (md_apply_fix): Mask constant
1045 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1046
1047 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1048
1049 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1050 MIPS-3D instructions either.
1051 (md_convert_frag): Update the COPx branch mask accordingly.
1052
1053 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1054 option.
1055 * doc/as.texinfo (Overview): Add --relax-branch and
1056 --no-relax-branch.
1057 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1058 --no-relax-branch.
1059
1060 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1061
1062 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1063 omitted.
1064
1065 2013-06-08 Catherine Moore <clm@codesourcery.com>
1066
1067 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1068 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1069 (append_insn): Change INSN_xxxx to ASE_xxxx.
1070
1071 2013-06-01 George Thomas <george.thomas@atmel.com>
1072
1073 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1074 AVR_ISA_XMEGAU
1075
1076 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1077
1078 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1079 for ELF.
1080
1081 2013-05-31 Paul Brook <paul@codesourcery.com>
1082
1083 * config/tc-mips.c (s_ehword): New.
1084
1085 2013-05-30 Paul Brook <paul@codesourcery.com>
1086
1087 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1088
1089 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1090
1091 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1092 convert relocs who have no relocatable field either. Rephrase
1093 the conditional so that the PC-relative check is only applied
1094 for REL targets.
1095
1096 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1097
1098 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1099 calculation.
1100
1101 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1102
1103 * config/tc-aarch64.c (reloc_table): Update to use
1104 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1105 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1106 (md_apply_fix): Likewise.
1107 (aarch64_force_relocation): Likewise.
1108
1109 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1110
1111 * config/tc-arm.c (it_fsm_post_encode): Improve
1112 warning messages about deprecated IT block formats.
1113
1114 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1115
1116 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1117 inside fx_done condition.
1118
1119 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1120
1121 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1122
1123 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1124
1125 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1126 and clean up warning when using PRINT_OPCODE_TABLE.
1127
1128 2013-05-20 Alan Modra <amodra@gmail.com>
1129
1130 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1131 and data fixups performing shift/high adjust/sign extension on
1132 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1133 when writing data fixups rather than recalculating size.
1134
1135 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1136
1137 * doc/c-msp430.texi: Fix typo.
1138
1139 2013-05-16 Tristan Gingold <gingold@adacore.com>
1140
1141 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1142 are also TOC symbols.
1143
1144 2013-05-16 Nick Clifton <nickc@redhat.com>
1145
1146 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1147 Add -mcpu command to specify core type.
1148 * doc/c-msp430.texi: Update documentation.
1149
1150 2013-05-09 Andrew Pinski <apinski@cavium.com>
1151
1152 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1153 (mips_opts): Update for the new field.
1154 (file_ase_virt): New variable.
1155 (ISA_SUPPORTS_VIRT_ASE): New macro.
1156 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1157 (MIPS_CPU_ASE_VIRT): New define.
1158 (is_opcode_valid): Handle ase_virt.
1159 (macro_build): Handle "+J".
1160 (validate_mips_insn): Likewise.
1161 (mips_ip): Likewise.
1162 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1163 (md_longopts): Add mvirt and mnovirt
1164 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1165 (mips_after_parse_args): Handle ase_virt field.
1166 (s_mipsset): Handle "virt" and "novirt".
1167 (mips_elf_final_processing): Add a comment about virt ASE might need
1168 a new flag.
1169 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1170 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1171 Document ".set virt" and ".set novirt".
1172
1173 2013-05-09 Alan Modra <amodra@gmail.com>
1174
1175 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1176 control of operand flag bits.
1177
1178 2013-05-07 Alan Modra <amodra@gmail.com>
1179
1180 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1181 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1182 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1183 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1184 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1185 Shift and sign-extend fieldval for use by some VLE reloc
1186 operand->insert functions.
1187
1188 2013-05-06 Paul Brook <paul@codesourcery.com>
1189 Catherine Moore <clm@codesourcery.com>
1190
1191 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1192 (limited_pcrel_reloc_p): Likewise.
1193 (md_apply_fix): Likewise.
1194 (tc_gen_reloc): Likewise.
1195
1196 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1197
1198 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1199 (mips_fix_adjustable): Adjust pc-relative check to use
1200 limited_pc_reloc_p.
1201
1202 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1203
1204 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1205 (s_mips_stab): Do not restrict to stabn only.
1206
1207 2013-05-02 Nick Clifton <nickc@redhat.com>
1208
1209 * config/tc-msp430.c: Add support for the MSP430X architecture.
1210 Add code to insert a NOP instruction after any instruction that
1211 might change the interrupt state.
1212 Add support for the LARGE memory model.
1213 Add code to initialise the .MSP430.attributes section.
1214 * config/tc-msp430.h: Add support for the MSP430X architecture.
1215 * doc/c-msp430.texi: Document the new -mL and -mN command line
1216 options.
1217 * NEWS: Mention support for the MSP430X architecture.
1218
1219 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1220
1221 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1222 alpha*-*-linux*ecoff*.
1223
1224 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1225
1226 * config/tc-mips.c (mips_ip): Add sizelo.
1227 For "+C", "+G", and "+H", set sizelo and compare against it.
1228
1229 2013-04-29 Nick Clifton <nickc@redhat.com>
1230
1231 * as.c (Options): Add -gdwarf-sections.
1232 (parse_args): Likewise.
1233 * as.h (flag_dwarf_sections): Declare.
1234 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1235 (process_entries): When -gdwarf-sections is enabled generate
1236 fragmentary .debug_line sections.
1237 (out_debug_line): Set the section for the .debug_line section end
1238 symbol.
1239 * doc/as.texinfo: Document -gdwarf-sections.
1240 * NEWS: Mention -gdwarf-sections.
1241
1242 2013-04-26 Christian Groessler <chris@groessler.org>
1243
1244 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1245 according to the target parameter. Don't call s_segm since s_segm
1246 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1247 initialized yet.
1248 (md_begin): Call s_segm according to target parameter from command
1249 line.
1250
1251 2013-04-25 Alan Modra <amodra@gmail.com>
1252
1253 * configure.in: Allow little-endian linux.
1254 * configure: Regenerate.
1255
1256 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1257
1258 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1259 "fstatus" control register to "eccinj".
1260
1261 2013-04-19 Kai Tietz <ktietz@redhat.com>
1262
1263 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1264
1265 2013-04-15 Julian Brown <julian@codesourcery.com>
1266
1267 * expr.c (add_to_result, subtract_from_result): Make global.
1268 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1269 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1270 subtract_from_result to handle extra bit of precision for .sleb128
1271 directive operands.
1272
1273 2013-04-10 Julian Brown <julian@codesourcery.com>
1274
1275 * read.c (convert_to_bignum): Add sign parameter. Use it
1276 instead of X_unsigned to determine sign of resulting bignum.
1277 (emit_expr): Pass extra argument to convert_to_bignum.
1278 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1279 X_extrabit to convert_to_bignum.
1280 (parse_bitfield_cons): Set X_extrabit.
1281 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1282 Initialise X_extrabit field as appropriate.
1283 (add_to_result): New.
1284 (subtract_from_result): New.
1285 (expr): Use above.
1286 * expr.h (expressionS): Add X_extrabit field.
1287
1288 2013-04-10 Jan Beulich <jbeulich@suse.com>
1289
1290 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1291 register being PC when is_t or writeback, and use distinct
1292 diagnostic for the latter case.
1293
1294 2013-04-10 Jan Beulich <jbeulich@suse.com>
1295
1296 * gas/config/tc-arm.c (parse_operands): Re-write
1297 po_barrier_or_imm().
1298 (do_barrier): Remove bogus constraint().
1299 (do_t_barrier): Remove.
1300
1301 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1302
1303 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1304 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1305 ATmega2564RFR2
1306 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1307
1308 2013-04-09 Jan Beulich <jbeulich@suse.com>
1309
1310 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1311 Use local variable Rt in more places.
1312 (do_vmsr): Accept all control registers.
1313
1314 2013-04-09 Jan Beulich <jbeulich@suse.com>
1315
1316 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1317 if there was none specified for moves between scalar and core
1318 register.
1319
1320 2013-04-09 Jan Beulich <jbeulich@suse.com>
1321
1322 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1323 NEON_ALL_LANES case.
1324
1325 2013-04-08 Jan Beulich <jbeulich@suse.com>
1326
1327 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1328 PC-relative VSTR.
1329
1330 2013-04-08 Jan Beulich <jbeulich@suse.com>
1331
1332 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1333 entry to sp_fiq.
1334
1335 2013-04-03 Alan Modra <amodra@gmail.com>
1336
1337 * doc/as.texinfo: Add support to generate man options for h8300.
1338 * doc/c-h8300.texi: Likewise.
1339
1340 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1341
1342 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1343 Cortex-A57.
1344
1345 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1346
1347 PR binutils/15068
1348 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1349
1350 2013-03-26 Nick Clifton <nickc@redhat.com>
1351
1352 PR gas/15295
1353 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1354 start of the file each time.
1355
1356 PR gas/15178
1357 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1358 FreeBSD targets.
1359
1360 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1361
1362 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1363 after fixup.
1364
1365 2013-03-21 Will Newton <will.newton@linaro.org>
1366
1367 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1368 pc-relative str instructions in Thumb mode.
1369
1370 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1371
1372 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1373 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1374 R_H8_DISP32A16.
1375 * config/tc-h8300.h: Remove duplicated defines.
1376
1377 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1378
1379 PR gas/15282
1380 * tc-avr.c (mcu_has_3_byte_pc): New function.
1381 (tc_cfi_frame_initial_instructions): Call it to find return
1382 address size.
1383
1384 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1385
1386 PR gas/15095
1387 * config/tc-tic6x.c (tic6x_try_encode): Handle
1388 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1389 encode register pair numbers when required.
1390
1391 2013-03-15 Will Newton <will.newton@linaro.org>
1392
1393 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1394 in vstr in Thumb mode for pre-ARMv7 cores.
1395
1396 2013-03-14 Andreas Schwab <schwab@suse.de>
1397
1398 * doc/c-arc.texi (ARC Directives): Revert last change and use
1399 @itemize instead of @table.
1400 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1401
1402 2013-03-14 Nick Clifton <nickc@redhat.com>
1403
1404 PR gas/15273
1405 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1406 NULL message, instead just check ARM_CPU_IS_ANY directly.
1407
1408 2013-03-14 Nick Clifton <nickc@redhat.com>
1409
1410 PR gas/15212
1411 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1412 for table format.
1413 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1414 to the @item directives.
1415 (ARM-Neon-Alignment): Move to correct place in the document.
1416 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1417 formatting.
1418 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1419 @smallexample.
1420
1421 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1422
1423 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1424 case. Add default BAD_CASE to switch.
1425
1426 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1427
1428 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1429 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1430
1431 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1432
1433 * config/tc-arm.c (crc_ext_armv8): New feature set.
1434 (UNPRED_REG): New macro.
1435 (do_crc32_1): New function.
1436 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1437 do_crc32ch, do_crc32cw): Likewise.
1438 (TUEc): New macro.
1439 (insns): Add entries for crc32 mnemonics.
1440 (arm_extensions): Add entry for crc.
1441
1442 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1443
1444 * write.h (struct fix): Add fx_dot_frag field.
1445 (dot_frag): Declare.
1446 * write.c (dot_frag): New variable.
1447 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1448 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1449 * expr.c (expr): Save value of frag_now in dot_frag when setting
1450 dot_value.
1451 * read.c (emit_expr): Likewise. Delete comments.
1452
1453 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1454
1455 * config/tc-i386.c (flag_code_names): Removed.
1456 (i386_index_check): Rewrote.
1457
1458 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1459
1460 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1461 add comment.
1462 (aarch64_double_precision_fmovable): New function.
1463 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1464 function; handle hexadecimal representation of IEEE754 encoding.
1465 (parse_operands): Update the call to parse_aarch64_imm_float.
1466
1467 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1468
1469 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1470 (check_hle): Updated.
1471 (md_assemble): Likewise.
1472 (parse_insn): Likewise.
1473
1474 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1475
1476 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1477 (md_assemble): Check if REP prefix is OK.
1478 (parse_insn): Remove expecting_string_instruction. Set
1479 i.rep_prefix.
1480
1481 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1482
1483 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1484
1485 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1486
1487 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1488 for system registers.
1489
1490 2013-02-27 DJ Delorie <dj@redhat.com>
1491
1492 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1493 (rl78_op): Handle %code().
1494 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1495 (tc_gen_reloc): Likwise; convert to a computed reloc.
1496 (md_apply_fix): Likewise.
1497
1498 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1499
1500 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1501
1502 2013-02-25 Terry Guo <terry.guo@arm.com>
1503
1504 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1505 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1506 list of accepted CPUs.
1507
1508 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1509
1510 PR gas/15159
1511 * config/tc-i386.c (cpu_arch): Add ".smap".
1512
1513 * doc/c-i386.texi: Document smap.
1514
1515 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1516
1517 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1518 mips_assembling_insn appropriately.
1519 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1520
1521 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1522
1523 * config/tc-mips.c (append_insn): Correct indentation, remove
1524 extraneous braces.
1525
1526 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1527
1528 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1529
1530 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1531
1532 * configure.tgt: Add nios2-*-rtems*.
1533
1534 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1535
1536 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1537 NULL.
1538
1539 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1540
1541 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1542 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1543
1544 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1545
1546 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1547 core.
1548
1549 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1550 Andrew Jenner <andrew@codesourcery.com>
1551
1552 Based on patches from Altera Corporation.
1553
1554 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1555 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1556 * Makefile.in: Regenerated.
1557 * configure.tgt: Add case for nios2*-linux*.
1558 * config/obj-elf.c: Conditionally include elf/nios2.h.
1559 * config/tc-nios2.c: New file.
1560 * config/tc-nios2.h: New file.
1561 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1562 * doc/Makefile.in: Regenerated.
1563 * doc/all.texi: Set NIOSII.
1564 * doc/as.texinfo (Overview): Add Nios II options.
1565 (Machine Dependencies): Include c-nios2.texi.
1566 * doc/c-nios2.texi: New file.
1567 * NEWS: Note Altera Nios II support.
1568
1569 2013-02-06 Alan Modra <amodra@gmail.com>
1570
1571 PR gas/14255
1572 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1573 Don't skip fixups with fx_subsy non-NULL.
1574 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1575 with fx_subsy non-NULL.
1576
1577 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1578
1579 * doc/c-metag.texi: Add "@c man" markers.
1580
1581 2013-02-04 Alan Modra <amodra@gmail.com>
1582
1583 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1584 related code.
1585 (TC_ADJUST_RELOC_COUNT): Delete.
1586 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1587
1588 2013-02-04 Alan Modra <amodra@gmail.com>
1589
1590 * po/POTFILES.in: Regenerate.
1591
1592 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1593
1594 * config/tc-metag.c: Make SWAP instruction less permissive with
1595 its operands.
1596
1597 2013-01-29 DJ Delorie <dj@redhat.com>
1598
1599 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1600 relocs in .word/.etc statements.
1601
1602 2013-01-29 Roland McGrath <mcgrathr@google.com>
1603
1604 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1605 immediate value for 8-bit offset" error so it shows line info.
1606
1607 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1608
1609 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1610 for 64-bit output.
1611
1612 2013-01-24 Nick Clifton <nickc@redhat.com>
1613
1614 * config/tc-v850.c: Add support for e3v5 architecture.
1615 * doc/c-v850.texi: Mention new support.
1616
1617 2013-01-23 Nick Clifton <nickc@redhat.com>
1618
1619 PR gas/15039
1620 * config/tc-avr.c: Include dwarf2dbg.h.
1621
1622 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1623
1624 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1625 (tc_i386_fix_adjustable): Likewise.
1626 (lex_got): Likewise.
1627 (tc_gen_reloc): Likewise.
1628
1629 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1630
1631 * config/tc-aarch64.c (output_operand_error_record): Change to output
1632 the out-of-range error message as value-expected message if there is
1633 only one single value in the expected range.
1634 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1635 LSL #0 as a programmer-friendly feature.
1636
1637 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1638
1639 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1640 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1641 BFD_RELOC_64_SIZE relocations.
1642 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1643 for it.
1644 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1645 relocations against local symbols.
1646
1647 2013-01-16 Alan Modra <amodra@gmail.com>
1648
1649 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1650 finding some sort of toc syntax error, and break to avoid
1651 compiler uninit warning.
1652
1653 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1654
1655 PR gas/15019
1656 * config/tc-i386.c (lex_got): Increment length by 1 if the
1657 relocation token is removed.
1658
1659 2013-01-15 Nick Clifton <nickc@redhat.com>
1660
1661 * config/tc-v850.c (md_assemble): Allow signed values for
1662 V850E_IMMEDIATE.
1663
1664 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1665
1666 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1667 git to cvs.
1668
1669 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1670
1671 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1672 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1673 * config/tc-ppc.c (md_show_usage): Likewise.
1674 (ppc_handle_align): Handle power8's group ending nop.
1675
1676 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1677
1678 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1679 that the assember exits after the opcodes have been printed.
1680
1681 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1682
1683 * app.c: Remove trailing white spaces.
1684 * as.c: Likewise.
1685 * as.h: Likewise.
1686 * cond.c: Likewise.
1687 * dw2gencfi.c: Likewise.
1688 * dwarf2dbg.h: Likewise.
1689 * ecoff.c: Likewise.
1690 * input-file.c: Likewise.
1691 * itbl-lex.h: Likewise.
1692 * output-file.c: Likewise.
1693 * read.c: Likewise.
1694 * sb.c: Likewise.
1695 * subsegs.c: Likewise.
1696 * symbols.c: Likewise.
1697 * write.c: Likewise.
1698 * config/tc-i386.c: Likewise.
1699 * doc/Makefile.am: Likewise.
1700 * doc/Makefile.in: Likewise.
1701 * doc/c-aarch64.texi: Likewise.
1702 * doc/c-alpha.texi: Likewise.
1703 * doc/c-arc.texi: Likewise.
1704 * doc/c-arm.texi: Likewise.
1705 * doc/c-avr.texi: Likewise.
1706 * doc/c-bfin.texi: Likewise.
1707 * doc/c-cr16.texi: Likewise.
1708 * doc/c-d10v.texi: Likewise.
1709 * doc/c-d30v.texi: Likewise.
1710 * doc/c-h8300.texi: Likewise.
1711 * doc/c-hppa.texi: Likewise.
1712 * doc/c-i370.texi: Likewise.
1713 * doc/c-i386.texi: Likewise.
1714 * doc/c-i860.texi: Likewise.
1715 * doc/c-m32c.texi: Likewise.
1716 * doc/c-m32r.texi: Likewise.
1717 * doc/c-m68hc11.texi: Likewise.
1718 * doc/c-m68k.texi: Likewise.
1719 * doc/c-microblaze.texi: Likewise.
1720 * doc/c-mips.texi: Likewise.
1721 * doc/c-msp430.texi: Likewise.
1722 * doc/c-mt.texi: Likewise.
1723 * doc/c-s390.texi: Likewise.
1724 * doc/c-score.texi: Likewise.
1725 * doc/c-sh.texi: Likewise.
1726 * doc/c-sh64.texi: Likewise.
1727 * doc/c-tic54x.texi: Likewise.
1728 * doc/c-tic6x.texi: Likewise.
1729 * doc/c-v850.texi: Likewise.
1730 * doc/c-xc16x.texi: Likewise.
1731 * doc/c-xgate.texi: Likewise.
1732 * doc/c-xtensa.texi: Likewise.
1733 * doc/c-z80.texi: Likewise.
1734 * doc/internals.texi: Likewise.
1735
1736 2013-01-10 Roland McGrath <mcgrathr@google.com>
1737
1738 * hash.c (hash_new_sized): Make it global.
1739 * hash.h: Declare it.
1740 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1741 pass a small size.
1742
1743 2013-01-10 Will Newton <will.newton@imgtec.com>
1744
1745 * Makefile.am: Add Meta.
1746 * Makefile.in: Regenerate.
1747 * config/tc-metag.c: New file.
1748 * config/tc-metag.h: New file.
1749 * configure.tgt: Add Meta.
1750 * doc/Makefile.am: Add Meta.
1751 * doc/Makefile.in: Regenerate.
1752 * doc/all.texi: Add Meta.
1753 * doc/as.texiinfo: Document Meta options.
1754 * doc/c-metag.texi: New file.
1755
1756 2013-01-09 Steve Ellcey <sellcey@mips.com>
1757
1758 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1759 calls.
1760 * config/tc-mips.c (internalError): Remove, replace with abort.
1761
1762 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1763
1764 * config/tc-aarch64.c (parse_operands): Change to compare the result
1765 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1766
1767 2013-01-07 Nick Clifton <nickc@redhat.com>
1768
1769 PR gas/14887
1770 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1771 anticipated character.
1772 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1773 here as it is no longer needed.
1774
1775 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1776
1777 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1778 * doc/c-score.texi (SCORE-Opts): Likewise.
1779 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1780
1781 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1782
1783 * config/tc-mips.c: Add support for MIPS r5900.
1784 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1785 lq and sq.
1786 (can_swap_branch_p, get_append_method): Detect some conditional
1787 short loops to fix a bug on the r5900 by NOP in the branch delay
1788 slot.
1789 (M_MUL): Support 3 operands in multu on r5900.
1790 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1791 (s_mipsset): Force 32 bit floating point on r5900.
1792 (mips_ip): Check parameter range of instructions mfps and mtps on
1793 r5900.
1794 * configure.in: Detect CPU type when target string contains r5900
1795 (e.g. mips64r5900el-linux-gnu).
1796
1797 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1798
1799 * as.c (parse_args): Update copyright year to 2013.
1800
1801 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1802
1803 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1804 and "cortex57".
1805
1806 2013-01-02 Nick Clifton <nickc@redhat.com>
1807
1808 PR gas/14987
1809 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1810 closing bracket.
1811
1812 For older changes see ChangeLog-2012
1813 \f
1814 Copyright (C) 2013 Free Software Foundation, Inc.
1815
1816 Copying and distribution of this file, with or without modification,
1817 are permitted in any medium without royalty provided the copyright
1818 notice and this notice are preserved.
1819
1820 Local Variables:
1821 mode: change-log
1822 left-margin: 8
1823 fill-column: 74
1824 version-control: never
1825 End: