1 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
3 * config/tc-i386.c (md_assemble): Don't update
6 2006-08-01 Thiemo Seufer <ths@mips.com>
8 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
10 2006-08-01 Thiemo Seufer <ths@mips.com>
12 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
13 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
14 BFD_RELOC_32 and BFD_RELOC_16.
15 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
16 md_convert_frag, md_obj_end): Fix comment formatting.
18 2006-07-31 Thiemo Seufer <ths@mips.com>
20 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
21 handling for BFD_RELOC_MIPS16_JMP.
23 2006-07-24 Andreas Schwab <schwab@suse.de>
26 * read.c (read_a_source_file): Ignore unknown text after line
27 comment character. Fix misleading comment.
29 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
31 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
32 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
33 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
34 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
35 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
36 doc/c-z80.texi, doc/internals.texi: Fix some typos.
38 2006-07-21 Nick Clifton <nickc@redhat.com>
40 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
43 2006-07-20 Thiemo Seufer <ths@mips.com>
44 Nigel Stephens <nigel@mips.com>
46 * config/tc-mips.c (md_parse_option): Don't infer optimisation
47 options from debug options.
49 2006-07-20 Thiemo Seufer <ths@mips.com>
51 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
52 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
54 2006-07-19 Paul Brook <paul@codesourcery.com>
56 * config/tc-arm.c (insns): Fix rbit Arm opcode.
58 2006-07-18 Paul Brook <paul@codesourcery.com>
60 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
61 (md_convert_frag): Use correct reloc for add_pc. Use
62 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
63 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
64 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
66 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
68 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
69 when file and line unknown.
71 2006-07-17 Thiemo Seufer <ths@mips.com>
73 * read.c (s_struct): Use IS_ELF.
74 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
75 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
76 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
77 s_mips_mask): Likewise.
79 2006-07-16 Thiemo Seufer <ths@mips.com>
80 David Ung <davidu@mips.com>
82 * read.c (s_struct): Handle ELF section changing.
83 * config/tc-mips.c (s_align): Leave enabling auto-align to the
85 (s_change_sec): Try section changing only if we output ELF.
87 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
89 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
91 (smallest_imm_type): Remove Cpu086.
92 (i386_target_format): Likewise.
94 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
97 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
98 Michael Meissner <michael.meissner@amd.com>
100 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
101 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
102 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
104 (i386_align_code): Ditto.
105 (md_assemble_code): Add support for insertq/extrq instructions,
106 swapping as needed for intel syntax.
107 (swap_imm_operands): New function to swap immediate operands.
108 (swap_operands): Deal with 4 operand instructions.
109 (build_modrm_byte): Add support for insertq instruction.
111 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
113 * config/tc-i386.h (Size64): Fix a typo in comment.
115 2006-07-12 Nick Clifton <nickc@redhat.com>
117 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
118 fixup_segment() to repeat a range check on a value that has
119 already been checked here.
121 2006-07-07 James E Wilson <wilson@specifix.com>
123 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
125 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
126 Nick Clifton <nickc@redhat.com>
129 * doc/as.texi: Fix spelling typo: branchs => branches.
130 * doc/c-m68hc11.texi: Likewise.
131 * config/tc-m68hc11.c: Likewise.
132 Support old spelling of command line switch for backwards
135 2006-07-04 Thiemo Seufer <ths@mips.com>
136 David Ung <davidu@mips.com>
138 * config/tc-mips.c (s_is_linkonce): New function.
139 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
140 weak, external, and linkonce symbols.
141 (pic_need_relax): Use s_is_linkonce.
143 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
145 * doc/as.texinfo (Org): Remove space.
146 (P2align): Add "@var{abs-expr},".
148 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
150 * config/tc-i386.c (cpu_arch_tune_set): New.
151 (cpu_arch_isa): Likewise.
152 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
153 nops with short or long nop sequences based on -march=/.arch
155 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
156 set cpu_arch_tune and cpu_arch_tune_flags.
157 (md_parse_option): For -march=, set cpu_arch_isa and set
158 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
159 0. Set cpu_arch_tune_set to 1 for -mtune=.
160 (i386_target_format): Don't set cpu_arch_tune.
162 2006-06-23 Nigel Stephens <nigel@mips.com>
164 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
165 generated .sbss.* and .gnu.linkonce.sb.*.
167 2006-06-23 Thiemo Seufer <ths@mips.com>
168 David Ung <davidu@mips.com>
170 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
172 * config/tc-mips.c (label_list): Define per-segment label_list.
173 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
174 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
175 mips_from_file_after_relocs, mips_define_label): Use per-segment
178 2006-06-22 Thiemo Seufer <ths@mips.com>
180 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
181 (append_insn): Use it.
182 (md_apply_fix): Whitespace formatting.
183 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
184 mips16_extended_frag): Remove register specifier.
185 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
188 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
190 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
191 a directive saving VFP registers for ARMv6 or later.
192 (s_arm_unwind_save): Add parameter arch_v6 and call
193 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
195 (md_pseudo_table): Add entry for new "vsave" directive.
196 * doc/c-arm.texi: Correct error in example for "save"
197 directive (fstmdf -> fstmdx). Also document "vsave" directive.
199 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
200 Anatoly Sokolov <aesok@post.ru>
202 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
203 and atmega644p devices. Rename atmega164/atmega324 devices to
204 atmega164p/atmega324p.
205 * doc/c-avr.texi: Document new mcu and arch options.
207 2006-06-17 Nick Clifton <nickc@redhat.com>
209 * config/tc-arm.c (enum parse_operand_result): Move outside of
210 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
212 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
214 * config/tc-i386.h (processor_type): New.
215 (arch_entry): Add type.
217 * config/tc-i386.c (cpu_arch_tune): New.
218 (cpu_arch_tune_flags): Likewise.
219 (cpu_arch_isa_flags): Likewise.
221 (set_cpu_arch): Also update cpu_arch_isa_flags.
222 (md_assemble): Update cpu_arch_isa_flags.
224 (OPTION_MTUNE): Likewise.
225 (md_longopts): Add -march= and -mtune=.
226 (md_parse_option): Support -march= and -mtune=.
227 (md_show_usage): Add -march=CPU/-mtune=CPU.
228 (i386_target_format): Also update cpu_arch_isa_flags,
229 cpu_arch_tune and cpu_arch_tune_flags.
231 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
233 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
235 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
237 * config/tc-arm.c (enum parse_operand_result): New.
238 (struct group_reloc_table_entry): New.
239 (enum group_reloc_type): New.
240 (group_reloc_table): New array.
241 (find_group_reloc_table_entry): New function.
242 (parse_shifter_operand_group_reloc): New function.
243 (parse_address_main): New function, incorporating code
244 from the old parse_address function. To be used via...
245 (parse_address): wrapper for parse_address_main; and
246 (parse_address_group_reloc): new function, likewise.
247 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
248 OP_ADDRGLDRS, OP_ADDRGLDC.
249 (parse_operands): Support for these new operand codes.
250 New macro po_misc_or_fail_no_backtrack.
251 (encode_arm_cp_address): Preserve group relocations.
252 (insns): Modify to use the above operand codes where group
253 relocations are permitted.
254 (md_apply_fix): Handle the group relocations
255 ALU_PC_G0_NC through LDC_SB_G2.
256 (tc_gen_reloc): Likewise.
257 (arm_force_relocation): Leave group relocations for the linker.
258 (arm_fix_adjustable): Likewise.
260 2006-06-15 Julian Brown <julian@codesourcery.com>
262 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
263 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
266 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
268 * config/tc-i386.c (process_suffix): Don't add rex64 for
271 2006-06-09 Thiemo Seufer <ths@mips.com>
273 * config/tc-mips.c (mips_ip): Maintain argument count.
275 2006-06-09 Alan Modra <amodra@bigpond.net.au>
277 * config/tc-iq2000.c: Include sb.h.
279 2006-06-08 Nigel Stephens <nigel@mips.com>
281 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
282 aliases for better compatibility with SGI tools.
284 2006-06-08 Alan Modra <amodra@bigpond.net.au>
286 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
287 * Makefile.am (GASLIBS): Expand @BFDLIB@.
289 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
290 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
291 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
293 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
294 * Makefile.in: Regenerate.
295 * doc/Makefile.in: Regenerate.
296 * configure: Regenerate.
298 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
300 * po/Make-in (pdf, ps): New dummy targets.
302 2006-06-07 Julian Brown <julian@codesourcery.com>
304 * config/tc-arm.c (stdarg.h): include.
305 (arm_it): Add uncond_value field. Add isvec and issingle to operand
307 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
308 REG_TYPE_NSDQ (single, double or quad vector reg).
309 (reg_expected_msgs): Update.
310 (BAD_FPU): Add macro for unsupported FPU instruction error.
311 (parse_neon_type): Support 'd' as an alias for .f64.
312 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
314 (parse_vfp_reg_list): Don't update first arg on error.
315 (parse_neon_mov): Support extra syntax for VFP moves.
316 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
317 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
318 (parse_operands): Support isvec, issingle operands fields, new parse
320 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
322 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
323 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
324 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
325 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
327 (neon_shape): Redefine in terms of above.
328 (neon_shape_class): New enumeration, table of shape classes.
329 (neon_shape_el): New enumeration. One element of a shape.
330 (neon_shape_el_size): Register widths of above, where appropriate.
331 (neon_shape_info): New struct. Info for shape table.
332 (neon_shape_tab): New array.
333 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
334 (neon_check_shape): Rewrite as...
335 (neon_select_shape): New function to classify instruction shapes,
336 driven by new table neon_shape_tab array.
337 (neon_quad): New function. Return 1 if shape should set Q flag in
338 instructions (or equivalent), 0 otherwise.
339 (type_chk_of_el_type): Support F64.
340 (el_type_of_type_chk): Likewise.
341 (neon_check_type): Add support for VFP type checking (VFP data
342 elements fill their containing registers).
343 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
344 in thumb mode for VFP instructions.
345 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
346 and encode the current instruction as if it were that opcode.
347 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
348 arguments, call function in PFN.
349 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
350 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
351 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
352 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
353 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
354 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
355 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
356 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
357 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
358 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
359 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
360 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
361 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
362 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
363 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
365 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
366 between VFP and Neon turns out to belong to Neon. Perform
367 architecture check and fill in condition field if appropriate.
368 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
369 (do_neon_cvt): Add support for VFP variants of instructions.
370 (neon_cvt_flavour): Extend to cover VFP conversions.
371 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
373 (do_neon_ldr_str): Handle single-precision VFP load/store.
374 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
375 NS_NULL not NS_IGNORE.
376 (opcode_tag): Add OT_csuffixF for operands which either take a
377 conditional suffix, or have 0xF in the condition field.
378 (md_assemble): Add support for OT_csuffixF.
379 (NCE): Replace macro with...
380 (NCE_tag, NCE, NCEF): New macros.
381 (nCE): Replace macro with...
382 (nCE_tag, nCE, nCEF): New macros.
383 (insns): Add support for VFP insns or VFP versions of insns msr,
384 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
385 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
386 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
387 VFP/Neon insns together.
389 2006-06-07 Alan Modra <amodra@bigpond.net.au>
390 Ladislav Michl <ladis@linux-mips.org>
392 * app.c: Don't include headers already included by as.h.
394 * atof-generic.c: Likewise.
396 * dwarf2dbg.c: Likewise.
398 * input-file.c: Likewise.
399 * input-scrub.c: Likewise.
401 * output-file.c: Likewise.
404 * config/bfin-lex.l: Likewise.
405 * config/obj-coff.h: Likewise.
406 * config/obj-elf.h: Likewise.
407 * config/obj-som.h: Likewise.
408 * config/tc-arc.c: Likewise.
409 * config/tc-arm.c: Likewise.
410 * config/tc-avr.c: Likewise.
411 * config/tc-bfin.c: Likewise.
412 * config/tc-cris.c: Likewise.
413 * config/tc-d10v.c: Likewise.
414 * config/tc-d30v.c: Likewise.
415 * config/tc-dlx.h: Likewise.
416 * config/tc-fr30.c: Likewise.
417 * config/tc-frv.c: Likewise.
418 * config/tc-h8300.c: Likewise.
419 * config/tc-hppa.c: Likewise.
420 * config/tc-i370.c: Likewise.
421 * config/tc-i860.c: Likewise.
422 * config/tc-i960.c: Likewise.
423 * config/tc-ip2k.c: Likewise.
424 * config/tc-iq2000.c: Likewise.
425 * config/tc-m32c.c: Likewise.
426 * config/tc-m32r.c: Likewise.
427 * config/tc-maxq.c: Likewise.
428 * config/tc-mcore.c: Likewise.
429 * config/tc-mips.c: Likewise.
430 * config/tc-mmix.c: Likewise.
431 * config/tc-mn10200.c: Likewise.
432 * config/tc-mn10300.c: Likewise.
433 * config/tc-msp430.c: Likewise.
434 * config/tc-mt.c: Likewise.
435 * config/tc-ns32k.c: Likewise.
436 * config/tc-openrisc.c: Likewise.
437 * config/tc-ppc.c: Likewise.
438 * config/tc-s390.c: Likewise.
439 * config/tc-sh.c: Likewise.
440 * config/tc-sh64.c: Likewise.
441 * config/tc-sparc.c: Likewise.
442 * config/tc-tic30.c: Likewise.
443 * config/tc-tic4x.c: Likewise.
444 * config/tc-tic54x.c: Likewise.
445 * config/tc-v850.c: Likewise.
446 * config/tc-vax.c: Likewise.
447 * config/tc-xc16x.c: Likewise.
448 * config/tc-xstormy16.c: Likewise.
449 * config/tc-xtensa.c: Likewise.
450 * config/tc-z80.c: Likewise.
451 * config/tc-z8k.c: Likewise.
452 * macro.h: Don't include sb.h or ansidecl.h.
453 * sb.h: Don't include stdio.h or ansidecl.h.
454 * cond.c: Include sb.h.
455 * itbl-lex.l: Include as.h instead of other system headers.
456 * itbl-parse.y: Likewise.
457 * itbl-ops.c: Similarly.
458 * itbl-ops.h: Don't include as.h or ansidecl.h.
459 * config/bfin-defs.h: Don't include bfd.h or as.h.
460 * config/bfin-parse.y: Include as.h instead of other system headers.
462 2006-06-06 Ben Elliston <bje@au.ibm.com>
463 Anton Blanchard <anton@samba.org>
465 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
466 (md_show_usage): Document it.
467 (ppc_setup_opcodes): Test power6 opcode flag bits.
468 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
470 2006-06-06 Thiemo Seufer <ths@mips.com>
471 Chao-ying Fu <fu@mips.com>
473 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
474 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
475 (macro_build): Update comment.
476 (mips_ip): Allow DSP64 instructions for MIPS64R2.
477 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
479 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
480 MIPS_CPU_ASE_MDMX flags for sb1.
482 2006-06-05 Thiemo Seufer <ths@mips.com>
484 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
486 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
487 (mips_ip): Make overflowed/underflowed constant arguments in DSP
488 and MT instructions a fatal error. Use INSERT_OPERAND where
489 appropriate. Improve warnings for break and wait code overflows.
490 Use symbolic constant of OP_MASK_COPZ.
491 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
493 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
495 * po/Make-in (top_builddir): Define.
497 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
499 * doc/Makefile.am (TEXI2DVI): Define.
500 * doc/Makefile.in: Regenerate.
501 * doc/c-arc.texi: Fix typo.
503 2006-06-01 Alan Modra <amodra@bigpond.net.au>
505 * config/obj-ieee.c: Delete.
506 * config/obj-ieee.h: Delete.
507 * Makefile.am (OBJ_FORMATS): Remove ieee.
508 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
509 (obj-ieee.o): Remove rule.
510 * Makefile.in: Regenerate.
511 * configure.in (atof): Remove tahoe.
512 (OBJ_MAYBE_IEEE): Don't define.
513 * configure: Regenerate.
514 * config.in: Regenerate.
515 * doc/Makefile.in: Regenerate.
516 * po/POTFILES.in: Regenerate.
518 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
520 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
521 and LIBINTL_DEP everywhere.
523 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
524 * acinclude.m4: Include new gettext macros.
525 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
526 Remove local code for po/Makefile.
527 * Makefile.in, configure, doc/Makefile.in: Regenerated.
529 2006-05-30 Nick Clifton <nickc@redhat.com>
531 * po/es.po: Updated Spanish translation.
533 2006-05-06 Denis Chertykov <denisc@overta.ru>
535 * doc/c-avr.texi: New file.
536 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
537 * doc/all.texi: Set AVR
538 * doc/as.texinfo: Include c-avr.texi
540 2006-05-28 Jie Zhang <jie.zhang@analog.com>
542 * config/bfin-parse.y (check_macfunc): Loose the condition of
543 calling check_multiply_halfregs ().
545 2006-05-25 Jie Zhang <jie.zhang@analog.com>
547 * config/bfin-parse.y (asm_1): Better check and deal with
548 vector and scalar Multiply 16-Bit Operands instructions.
550 2006-05-24 Nick Clifton <nickc@redhat.com>
552 * config/tc-hppa.c: Convert to ISO C90 format.
553 * config/tc-hppa.h: Likewise.
555 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
556 Randolph Chung <randolph@tausq.org>
558 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
559 is_tls_ieoff, is_tls_leoff): Define.
560 (fix_new_hppa): Handle TLS.
561 (cons_fix_new_hppa): Likewise.
563 (md_apply_fix): Handle TLS relocs.
564 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
566 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
568 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
570 2006-05-23 Thiemo Seufer <ths@mips.com>
571 David Ung <davidu@mips.com>
572 Nigel Stephens <nigel@mips.com>
575 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
576 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
577 ISA_HAS_MXHC1): New macros.
578 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
579 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
580 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
581 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
582 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
583 (mips_after_parse_args): Change default handling of float register
584 size to account for 32bit code with 64bit FP. Better sanity checking
585 of ISA/ASE/ABI option combinations.
586 (s_mipsset): Support switching of GPR and FPR sizes via
587 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
589 (mips_elf_final_processing): We should record the use of 64bit FP
590 registers in 32bit code but we don't, because ELF header flags are
592 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
593 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
594 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
595 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
596 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
597 missing -march options. Document .set arch=CPU. Move .set smartmips
598 to ASE page. Use @code for .set FOO examples.
600 2006-05-23 Jie Zhang <jie.zhang@analog.com>
602 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
605 2006-05-23 Jie Zhang <jie.zhang@analog.com>
607 * config/bfin-defs.h (bfin_equals): Remove declaration.
608 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
609 * config/tc-bfin.c (bfin_name_is_register): Remove.
610 (bfin_equals): Remove.
611 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
612 (bfin_name_is_register): Remove declaration.
614 2006-05-19 Thiemo Seufer <ths@mips.com>
615 Nigel Stephens <nigel@mips.com>
617 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
618 (mips_oddfpreg_ok): New function.
621 2006-05-19 Thiemo Seufer <ths@mips.com>
622 David Ung <davidu@mips.com>
624 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
625 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
626 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
627 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
628 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
629 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
630 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
631 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
632 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
633 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
634 reg_names_o32, reg_names_n32n64): Define register classes.
635 (reg_lookup): New function, use register classes.
636 (md_begin): Reserve register names in the symbol table. Simplify
638 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
640 (mips16_ip): Use reg_lookup.
641 (tc_get_register): Likewise.
642 (tc_mips_regname_to_dw2regnum): New function.
644 2006-05-19 Thiemo Seufer <ths@mips.com>
646 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
647 Un-constify string argument.
648 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
650 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
652 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
654 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
656 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
658 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
661 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
663 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
664 cfloat/m68881 to correct architecture before using it.
666 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
668 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
671 2006-05-15 Paul Brook <paul@codesourcery.com>
673 * config/tc-arm.c (arm_adjust_symtab): Use
674 bfd_is_arm_special_symbol_name.
676 2006-05-15 Bob Wilson <bob.wilson@acm.org>
678 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
679 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
680 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
681 Handle errors from calls to xtensa_opcode_is_* functions.
683 2006-05-14 Thiemo Seufer <ths@mips.com>
685 * config/tc-mips.c (macro_build): Test for currently active
687 (mips16_ip): Reject invalid opcodes.
689 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
691 * doc/as.texinfo: Rename "Index" to "AS Index",
692 and "ABORT" to "ABORT (COFF)".
694 2006-05-11 Paul Brook <paul@codesourcery.com>
696 * config/tc-arm.c (parse_half): New function.
697 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
698 (parse_operands): Ditto.
699 (do_mov16): Reject invalid relocations.
700 (do_t_mov16): Ditto. Use Thumb reloc numbers.
701 (insns): Replace Iffff with HALF.
702 (md_apply_fix): Add MOVW and MOVT relocs.
703 (tc_gen_reloc): Ditto.
704 * doc/c-arm.texi: Document relocation operators
706 2006-05-11 Paul Brook <paul@codesourcery.com>
708 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
710 2006-05-11 Thiemo Seufer <ths@mips.com>
712 * config/tc-mips.c (append_insn): Don't check the range of j or
715 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
717 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
718 relocs against external symbols for WinCE targets.
719 (md_apply_fix): Likewise.
721 2006-05-09 David Ung <davidu@mips.com>
723 * config/tc-mips.c (append_insn): Only warn about an out-of-range
726 2006-05-09 Nick Clifton <nickc@redhat.com>
728 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
729 against symbols which are not going to be placed into the symbol
732 2006-05-09 Ben Elliston <bje@au.ibm.com>
734 * expr.c (operand): Remove `if (0 && ..)' statement and
735 subsequently unused target_op label. Collapse `if (1 || ..)'
737 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
738 separately above the switch.
740 2006-05-08 Nick Clifton <nickc@redhat.com>
743 * config/tc-msp430.c (line_separator_character): Define as |.
745 2006-05-08 Thiemo Seufer <ths@mips.com>
746 Nigel Stephens <nigel@mips.com>
747 David Ung <davidu@mips.com>
749 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
750 (mips_opts): Likewise.
751 (file_ase_smartmips): New variable.
752 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
753 (macro_build): Handle SmartMIPS instructions.
755 (md_longopts): Add argument handling for smartmips.
756 (md_parse_options, mips_after_parse_args): Likewise.
757 (s_mipsset): Add .set smartmips support.
758 (md_show_usage): Document -msmartmips/-mno-smartmips.
759 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
761 * doc/c-mips.texi: Likewise.
763 2006-05-08 Alan Modra <amodra@bigpond.net.au>
765 * write.c (relax_segment): Add pass count arg. Don't error on
766 negative org/space on first two passes.
767 (relax_seg_info): New struct.
768 (relax_seg, write_object_file): Adjust.
769 * write.h (relax_segment): Update prototype.
771 2006-05-05 Julian Brown <julian@codesourcery.com>
773 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
775 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
776 architecture version checks.
777 (insns): Allow overlapping instructions to be used in VFP mode.
779 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
782 * config/obj-elf.c (obj_elf_change_section): Allow user
783 specified SHF_ALPHA_GPREL.
785 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
787 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
788 for PMEM related expressions.
790 2006-05-05 Nick Clifton <nickc@redhat.com>
793 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
794 insertion of a directory separator character into a string at a
795 given offset. Uses heuristics to decide when to use a backslash
796 character rather than a forward-slash character.
797 (dwarf2_directive_loc): Use the macro.
798 (out_debug_info): Likewise.
800 2006-05-05 Thiemo Seufer <ths@mips.com>
801 David Ung <davidu@mips.com>
803 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
805 (macro): Add new case M_CACHE_AB.
807 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
809 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
810 (opcode_lookup): Issue a warning for opcode with
811 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
812 identical to OT_cinfix3.
813 (TxC3w, TC3w, tC3w): New.
814 (insns): Use tC3w and TC3w for comparison instructions with
817 2006-05-04 Alan Modra <amodra@bigpond.net.au>
819 * subsegs.h (struct frchain): Delete frch_seg.
820 (frchain_root): Delete.
821 (seg_info): Define as macro.
822 * subsegs.c (frchain_root): Delete.
823 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
824 (subsegs_begin, subseg_change): Adjust for above.
825 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
826 rather than to one big list.
827 (subseg_get): Don't special case abs, und sections.
828 (subseg_new, subseg_force_new): Don't set frchainP here.
830 (subsegs_print_statistics): Adjust frag chain control list traversal.
831 * debug.c (dmp_frags): Likewise.
832 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
833 at frchain_root. Make use of known frchain ordering.
834 (last_frag_for_seg): Likewise.
835 (get_frag_fix): Likewise. Add seg param.
836 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
837 * write.c (chain_frchains_together_1): Adjust for struct frchain.
838 (SUB_SEGMENT_ALIGN): Likewise.
839 (subsegs_finish): Adjust frchain list traversal.
840 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
841 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
842 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
843 (xtensa_fix_b_j_loop_end_frags): Likewise.
844 (xtensa_fix_close_loop_end_frags): Likewise.
845 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
846 (retrieve_segment_info): Delete frch_seg initialisation.
848 2006-05-03 Alan Modra <amodra@bigpond.net.au>
850 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
851 * config/obj-elf.h (obj_sec_set_private_data): Delete.
852 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
853 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
855 2006-05-02 Joseph Myers <joseph@codesourcery.com>
857 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
859 (md_apply_fix3): Multiply offset by 4 here for
860 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
862 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
863 Jan Beulich <jbeulich@novell.com>
865 * config/tc-i386.c (output_invalid_buf): Change size for
867 * config/tc-tic30.c (output_invalid_buf): Likewise.
869 * config/tc-i386.c (output_invalid): Cast none-ascii char to
871 * config/tc-tic30.c (output_invalid): Likewise.
873 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
875 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
876 (TEXI2POD): Use AM_MAKEINFOFLAGS.
877 (asconfig.texi): Don't set top_srcdir.
878 * doc/as.texinfo: Don't use top_srcdir.
879 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
881 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
883 * config/tc-i386.c (output_invalid_buf): Change size to 16.
884 * config/tc-tic30.c (output_invalid_buf): Likewise.
886 * config/tc-i386.c (output_invalid): Use snprintf instead of
888 * config/tc-ia64.c (declare_register_set): Likewise.
889 (emit_one_bundle): Likewise.
890 (check_dependencies): Likewise.
891 * config/tc-tic30.c (output_invalid): Likewise.
893 2006-05-02 Paul Brook <paul@codesourcery.com>
895 * config/tc-arm.c (arm_optimize_expr): New function.
896 * config/tc-arm.h (md_optimize_expr): Define
897 (arm_optimize_expr): Add prototype.
898 (TC_FORCE_RELOCATION_SUB_SAME): Define.
900 2006-05-02 Ben Elliston <bje@au.ibm.com>
902 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
905 * sb.h (sb_list_vector): Move to sb.c.
906 * sb.c (free_list): Use type of sb_list_vector directly.
907 (sb_build): Fix off-by-one error in assertion about `size'.
909 2006-05-01 Ben Elliston <bje@au.ibm.com>
911 * listing.c (listing_listing): Remove useless loop.
912 * macro.c (macro_expand): Remove is_positional local variable.
913 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
914 and simplify surrounding expressions, where possible.
915 (assign_symbol): Likewise.
916 (s_weakref): Likewise.
917 * symbols.c (colon): Likewise.
919 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
921 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
923 2006-04-30 Thiemo Seufer <ths@mips.com>
924 David Ung <davidu@mips.com>
926 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
927 (mips_immed): New table that records various handling of udi
928 instruction patterns.
929 (mips_ip): Adds udi handling.
931 2006-04-28 Alan Modra <amodra@bigpond.net.au>
933 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
934 of list rather than beginning.
936 2006-04-26 Julian Brown <julian@codesourcery.com>
938 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
939 (is_quarter_float): Rename from above. Simplify slightly.
940 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
942 (parse_neon_mov): Parse floating-point constants.
943 (neon_qfloat_bits): Fix encoding.
944 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
945 preference to integer encoding when using the F32 type.
947 2006-04-26 Julian Brown <julian@codesourcery.com>
949 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
950 zero-initialising structures containing it will lead to invalid types).
951 (arm_it): Add vectype to each operand.
952 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
954 (neon_typed_alias): New structure. Extra information for typed
956 (reg_entry): Add neon type info field.
957 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
958 Break out alternative syntax for coprocessor registers, etc. into...
959 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
960 out from arm_reg_parse.
961 (parse_neon_type): Move. Return SUCCESS/FAIL.
962 (first_error): New function. Call to ensure first error which occurs is
964 (parse_neon_operand_type): Parse exactly one type.
965 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
966 (parse_typed_reg_or_scalar): New function. Handle core of both
967 arm_typed_reg_parse and parse_scalar.
968 (arm_typed_reg_parse): Parse a register with an optional type.
969 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
971 (parse_scalar): Parse a Neon scalar with optional type.
972 (parse_reg_list): Use first_error.
973 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
974 (neon_alias_types_same): New function. Return true if two (alias) types
976 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
978 (insert_reg_alias): Return new reg_entry not void.
979 (insert_neon_reg_alias): New function. Insert type/index information as
980 well as register for alias.
981 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
982 make typed register aliases accordingly.
983 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
985 (s_unreq): Delete type information if present.
986 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
987 (s_arm_unwind_save_mmxwcg): Likewise.
988 (s_arm_unwind_movsp): Likewise.
989 (s_arm_unwind_setfp): Likewise.
990 (parse_shift): Likewise.
991 (parse_shifter_operand): Likewise.
992 (parse_address): Likewise.
993 (parse_tb): Likewise.
994 (tc_arm_regname_to_dw2regnum): Likewise.
995 (md_pseudo_table): Add dn, qn.
996 (parse_neon_mov): Handle typed operands.
997 (parse_operands): Likewise.
998 (neon_type_mask): Add N_SIZ.
999 (N_ALLMODS): New macro.
1000 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1001 (el_type_of_type_chk): Add some safeguards.
1002 (modify_types_allowed): Fix logic bug.
1003 (neon_check_type): Handle operands with types.
1004 (neon_three_same): Remove redundant optional arg handling.
1005 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1006 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1007 (do_neon_step): Adjust accordingly.
1008 (neon_cmode_for_logic_imm): Use first_error.
1009 (do_neon_bitfield): Call neon_check_type.
1010 (neon_dyadic): Rename to...
1011 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1012 to allow modification of type of the destination.
1013 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1014 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1015 (do_neon_compare): Make destination be an untyped bitfield.
1016 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1017 (neon_mul_mac): Return early in case of errors.
1018 (neon_move_immediate): Use first_error.
1019 (neon_mac_reg_scalar_long): Fix type to include scalar.
1020 (do_neon_dup): Likewise.
1021 (do_neon_mov): Likewise (in several places).
1022 (do_neon_tbl_tbx): Fix type.
1023 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1024 (do_neon_ld_dup): Exit early in case of errors and/or use
1026 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1027 Handle .dn/.qn directives.
1028 (REGDEF): Add zero for reg_entry neon field.
1030 2006-04-26 Julian Brown <julian@codesourcery.com>
1032 * config/tc-arm.c (limits.h): Include.
1033 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1034 (fpu_vfp_v3_or_neon_ext): Declare constants.
1035 (neon_el_type): New enumeration of types for Neon vector elements.
1036 (neon_type_el): New struct. Define type and size of a vector element.
1037 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1039 (neon_type): Define struct. The type of an instruction.
1040 (arm_it): Add 'vectype' for the current instruction.
1041 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1042 (vfp_sp_reg_pos): Rename to...
1043 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1045 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1046 (Neon D or Q register).
1047 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1049 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1050 (my_get_expression): Allow above constant as argument to accept
1051 64-bit constants with optional prefix.
1052 (arm_reg_parse): Add extra argument to return the specific type of
1053 register in when either a D or Q register (REG_TYPE_NDQ) is
1054 requested. Can be NULL.
1055 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1056 (parse_reg_list): Update for new arm_reg_parse args.
1057 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1058 (parse_neon_el_struct_list): New function. Parse element/structure
1059 register lists for VLD<n>/VST<n> instructions.
1060 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1061 (s_arm_unwind_save_mmxwr): Likewise.
1062 (s_arm_unwind_save_mmxwcg): Likewise.
1063 (s_arm_unwind_movsp): Likewise.
1064 (s_arm_unwind_setfp): Likewise.
1065 (parse_big_immediate): New function. Parse an immediate, which may be
1066 64 bits wide. Put results in inst.operands[i].
1067 (parse_shift): Update for new arm_reg_parse args.
1068 (parse_address): Likewise. Add parsing of alignment specifiers.
1069 (parse_neon_mov): Parse the operands of a VMOV instruction.
1070 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1071 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1072 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1073 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1074 (parse_operands): Handle new codes above.
1075 (encode_arm_vfp_sp_reg): Rename to...
1076 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1077 selected VFP version only supports D0-D15.
1078 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1079 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1080 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1081 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1082 encode_arm_vfp_reg name, and allow 32 D regs.
1083 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1084 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1086 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1087 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1088 constant-load and conversion insns introduced with VFPv3.
1089 (neon_tab_entry): New struct.
1090 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1091 those which are the targets of pseudo-instructions.
1092 (neon_opc): Enumerate opcodes, use as indices into...
1093 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1094 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1095 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1096 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1098 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1100 (neon_type_mask): New. Compact type representation for type checking.
1101 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1102 permitted type combinations.
1103 (N_IGNORE_TYPE): New macro.
1104 (neon_check_shape): New function. Check an instruction shape for
1105 multiple alternatives. Return the specific shape for the current
1107 (neon_modify_type_size): New function. Modify a vector type and size,
1108 depending on the bit mask in argument 1.
1109 (neon_type_promote): New function. Convert a given "key" type (of an
1110 operand) into the correct type for a different operand, based on a bit
1112 (type_chk_of_el_type): New function. Convert a type and size into the
1113 compact representation used for type checking.
1114 (el_type_of_type_ckh): New function. Reverse of above (only when a
1115 single bit is set in the bit mask).
1116 (modify_types_allowed): New function. Alter a mask of allowed types
1117 based on a bit mask of modifications.
1118 (neon_check_type): New function. Check the type of the current
1119 instruction against the variable argument list. The "key" type of the
1120 instruction is returned.
1121 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1122 a Neon data-processing instruction depending on whether we're in ARM
1123 mode or Thumb-2 mode.
1124 (neon_logbits): New function.
1125 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1126 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1127 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1128 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1129 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1130 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1131 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1132 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1133 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1134 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1135 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1136 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1137 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1138 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1139 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1140 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1141 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1142 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1143 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1144 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1145 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1146 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1147 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1148 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1149 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1151 (parse_neon_type): New function. Parse Neon type specifier.
1152 (opcode_lookup): Allow parsing of Neon type specifiers.
1153 (REGNUM2, REGSETH, REGSET2): New macros.
1154 (reg_names): Add new VFPv3 and Neon registers.
1155 (NUF, nUF, NCE, nCE): New macros for opcode table.
1156 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1157 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1158 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1159 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1160 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1161 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1162 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1163 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1164 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1165 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1166 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1167 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1168 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1169 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1171 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1172 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1173 (arm_option_cpu_value): Add vfp3 and neon.
1174 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1177 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1179 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1180 syntax instead of hardcoded opcodes with ".w18" suffixes.
1181 (wide_branch_opcode): New.
1182 (build_transition): Use it to check for wide branch opcodes with
1183 either ".w18" or ".w15" suffixes.
1185 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1187 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1188 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1189 frag's is_literal flag.
1191 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1193 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1195 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1197 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1198 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1199 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1200 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1201 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1203 2005-04-20 Paul Brook <paul@codesourcery.com>
1205 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1207 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1209 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1211 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1212 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1213 Make some cpus unsupported on ELF. Run "make dep-am".
1214 * Makefile.in: Regenerate.
1216 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1218 * configure.in (--enable-targets): Indent help message.
1219 * configure: Regenerate.
1221 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1224 * config/tc-i386.c (i386_immediate): Check illegal immediate
1227 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1229 * config/tc-i386.c: Formatting.
1230 (output_disp, output_imm): ISO C90 params.
1232 * frags.c (frag_offset_fixed_p): Constify args.
1233 * frags.h (frag_offset_fixed_p): Ditto.
1235 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1236 (COFF_MAGIC): Delete.
1238 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1240 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1242 * po/POTFILES.in: Regenerated.
1244 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1246 * doc/as.texinfo: Mention that some .type syntaxes are not
1247 supported on all architectures.
1249 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1251 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1252 instructions when such transformations have been disabled.
1254 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1256 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1257 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1258 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1259 decoding the loop instructions. Remove current_offset variable.
1260 (xtensa_fix_short_loop_frags): Likewise.
1261 (min_bytes_to_other_loop_end): Remove current_offset argument.
1263 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1265 * config/tc-z80.c (z80_optimize_expr): Removed.
1266 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1268 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1270 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1271 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1272 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1273 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1274 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1275 at90can64, at90usb646, at90usb647, at90usb1286 and
1277 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1279 2006-04-07 Paul Brook <paul@codesourcery.com>
1281 * config/tc-arm.c (parse_operands): Set default error message.
1283 2006-04-07 Paul Brook <paul@codesourcery.com>
1285 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1287 2006-04-07 Paul Brook <paul@codesourcery.com>
1289 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1291 2006-04-07 Paul Brook <paul@codesourcery.com>
1293 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1294 (move_or_literal_pool): Handle Thumb-2 instructions.
1295 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1297 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1300 * config/tc-i386.c (match_template): Move 64-bit operand tests
1303 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1305 * po/Make-in: Add install-html target.
1306 * Makefile.am: Add install-html and install-html-recursive targets.
1307 * Makefile.in: Regenerate.
1308 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1309 * configure: Regenerate.
1310 * doc/Makefile.am: Add install-html and install-html-am targets.
1311 * doc/Makefile.in: Regenerate.
1313 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1315 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1318 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1319 Daniel Jacobowitz <dan@codesourcery.com>
1321 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1322 (GOTT_BASE, GOTT_INDEX): New.
1323 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1324 GOTT_INDEX when generating VxWorks PIC.
1325 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1326 use the generic *-*-vxworks* stanza instead.
1328 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1331 * frags.c (frag_offset_fixed_p): New function.
1332 * frags.h (frag_offset_fixed_p): Declare.
1333 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1334 (resolve_expression): Likewise.
1336 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1338 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1339 of the same length but different numbers of slots.
1341 2006-03-30 Andreas Schwab <schwab@suse.de>
1343 * configure.in: Fix help string for --enable-targets option.
1344 * configure: Regenerate.
1346 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1348 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1349 (m68k_ip): ... here. Use for all chips. Protect against buffer
1350 overrun and avoid excessive copying.
1352 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1353 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1354 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1355 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1356 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1357 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1358 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1359 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1360 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1361 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1362 (struct m68k_cpu): Change chip field to control_regs.
1363 (current_chip): Remove.
1364 (control_regs): New.
1365 (m68k_archs, m68k_extensions): Adjust.
1366 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1367 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1368 (find_cf_chip): Reimplement for new organization of cpu table.
1369 (select_control_regs): Remove.
1371 (struct save_opts): Save control regs, not chip.
1372 (s_save, s_restore): Adjust.
1373 (m68k_lookup_cpu): Give deprecated warning when necessary.
1374 (m68k_init_arch): Adjust.
1375 (md_show_usage): Adjust for new cpu table organization.
1377 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1379 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1380 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1381 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1383 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1384 (any_gotrel): New rule.
1385 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1386 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1388 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1389 (bfin_pic_ptr): New function.
1390 (md_pseudo_table): Add it for ".picptr".
1391 (OPTION_FDPIC): New macro.
1392 (md_longopts): Add -mfdpic.
1393 (md_parse_option): Handle it.
1394 (md_begin): Set BFD flags.
1395 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1396 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1398 * Makefile.am (bfin-parse.o): Update dependencies.
1399 (DEPTC_bfin_elf): Likewise.
1400 * Makefile.in: Regenerate.
1402 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1404 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1405 mcfemac instead of mcfmac.
1407 2006-03-23 Michael Matz <matz@suse.de>
1409 * config/tc-i386.c (type_names): Correct placement of 'static'.
1410 (reloc): Map some more relocs to their 64 bit counterpart when
1412 (output_insn): Work around breakage if DEBUG386 is defined.
1413 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1414 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1415 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1416 different from i386.
1417 (output_imm): Ditto.
1418 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1420 (md_convert_frag): Jumps can now be larger than 2GB away, error
1422 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1423 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1425 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1426 Daniel Jacobowitz <dan@codesourcery.com>
1427 Phil Edwards <phil@codesourcery.com>
1428 Zack Weinberg <zack@codesourcery.com>
1429 Mark Mitchell <mark@codesourcery.com>
1430 Nathan Sidwell <nathan@codesourcery.com>
1432 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1433 (md_begin): Complain about -G being used for PIC. Don't change
1434 the text, data and bss alignments on VxWorks.
1435 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1436 generating VxWorks PIC.
1437 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1438 (macro): Likewise, but do not treat la $25 specially for
1439 VxWorks PIC, and do not handle jal.
1440 (OPTION_MVXWORKS_PIC): New macro.
1441 (md_longopts): Add -mvxworks-pic.
1442 (md_parse_option): Don't complain about using PIC and -G together here.
1443 Handle OPTION_MVXWORKS_PIC.
1444 (md_estimate_size_before_relax): Always use the first relaxation
1445 sequence on VxWorks.
1446 * config/tc-mips.h (VXWORKS_PIC): New.
1448 2006-03-21 Paul Brook <paul@codesourcery.com>
1450 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1452 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1454 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1455 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1456 (get_loop_align_size): New.
1457 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1458 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1459 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1460 (get_noop_aligned_address): Use get_loop_align_size.
1461 (get_aligned_diff): Likewise.
1463 2006-03-21 Paul Brook <paul@codesourcery.com>
1465 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1467 2006-03-20 Paul Brook <paul@codesourcery.com>
1469 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1470 (do_t_branch): Encode branches inside IT blocks as unconditional.
1471 (do_t_cps): New function.
1472 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1473 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1474 (opcode_lookup): Allow conditional suffixes on all instructions in
1476 (md_assemble): Advance condexec state before checking for errors.
1477 (insns): Use do_t_cps.
1479 2006-03-20 Paul Brook <paul@codesourcery.com>
1481 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1482 outputting the insn.
1484 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1486 * config/tc-vax.c: Update copyright year.
1487 * config/tc-vax.h: Likewise.
1489 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1491 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1493 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1495 2006-03-17 Paul Brook <paul@codesourcery.com>
1497 * config/tc-arm.c (insns): Add ldm and stm.
1499 2006-03-17 Ben Elliston <bje@au.ibm.com>
1502 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1504 2006-03-16 Paul Brook <paul@codesourcery.com>
1506 * config/tc-arm.c (insns): Add "svc".
1508 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1510 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1511 flag and avoid double underscore prefixes.
1513 2006-03-10 Paul Brook <paul@codesourcery.com>
1515 * config/tc-arm.c (md_begin): Handle EABIv5.
1516 (arm_eabis): Add EF_ARM_EABI_VER5.
1517 * doc/c-arm.texi: Document -meabi=5.
1519 2006-03-10 Ben Elliston <bje@au.ibm.com>
1521 * app.c (do_scrub_chars): Simplify string handling.
1523 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1524 Daniel Jacobowitz <dan@codesourcery.com>
1525 Zack Weinberg <zack@codesourcery.com>
1526 Nathan Sidwell <nathan@codesourcery.com>
1527 Paul Brook <paul@codesourcery.com>
1528 Ricardo Anguiano <anguiano@codesourcery.com>
1529 Phil Edwards <phil@codesourcery.com>
1531 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1532 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1534 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1535 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1536 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1538 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1540 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1541 even when using the text-section-literals option.
1543 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1545 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1547 (m68k_ip): <case 'J'> Check we have some control regs.
1548 (md_parse_option): Allow raw arch switch.
1549 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1550 whether 68881 or cfloat was meant by -mfloat.
1551 (md_show_usage): Adjust extension display.
1552 (m68k_elf_final_processing): Adjust.
1554 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1556 * config/tc-avr.c (avr_mod_hash_value): New function.
1557 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1558 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1559 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1560 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1562 (tc_gen_reloc): Handle substractions of symbols, if possible do
1563 fixups, abort otherwise.
1564 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1565 tc_fix_adjustable): Define.
1567 2006-03-02 James E Wilson <wilson@specifix.com>
1569 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1570 change the template, then clear md.slot[curr].end_of_insn_group.
1572 2006-02-28 Jan Beulich <jbeulich@novell.com>
1574 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1576 2006-02-28 Jan Beulich <jbeulich@novell.com>
1579 * macro.c (getstring): Don't treat parentheses special anymore.
1580 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1581 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1584 2006-02-28 Mat <mat@csail.mit.edu>
1586 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1588 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1590 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1592 (CFI_signal_frame): Define.
1593 (cfi_pseudo_table): Add .cfi_signal_frame.
1594 (dot_cfi): Handle CFI_signal_frame.
1595 (output_cie): Handle cie->signal_frame.
1596 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1597 different. Copy signal_frame from FDE to newly created CIE.
1598 * doc/as.texinfo: Document .cfi_signal_frame.
1600 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1602 * doc/Makefile.am: Add html target.
1603 * doc/Makefile.in: Regenerate.
1604 * po/Make-in: Add html target.
1606 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1608 * config/tc-i386.c (output_insn): Support Intel Merom New
1611 * config/tc-i386.h (CpuMNI): New.
1612 (CpuUnknownFlags): Add CpuMNI.
1614 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1616 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1617 (hpriv_reg_table): New table for hyperprivileged registers.
1618 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1621 2006-02-24 DJ Delorie <dj@redhat.com>
1623 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1624 (tc_gen_reloc): Don't define.
1625 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1626 (OPTION_LINKRELAX): New.
1627 (md_longopts): Add it.
1629 (md_parse_options): Set it.
1630 (md_assemble): Emit relaxation relocs as needed.
1631 (md_convert_frag): Emit relaxation relocs as needed.
1632 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1633 (m32c_apply_fix): New.
1634 (tc_gen_reloc): New.
1635 (m32c_force_relocation): Force out jump relocs when relaxing.
1636 (m32c_fix_adjustable): Return false if relaxing.
1638 2006-02-24 Paul Brook <paul@codesourcery.com>
1640 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1641 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1642 (struct asm_barrier_opt): Define.
1643 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1644 (parse_psr): Accept V7M psr names.
1645 (parse_barrier): New function.
1646 (enum operand_parse_code): Add OP_oBARRIER.
1647 (parse_operands): Implement OP_oBARRIER.
1648 (do_barrier): New function.
1649 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1650 (do_t_cpsi): Add V7M restrictions.
1651 (do_t_mrs, do_t_msr): Validate V7M variants.
1652 (md_assemble): Check for NULL variants.
1653 (v7m_psrs, barrier_opt_names): New tables.
1654 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1655 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1656 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1657 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1658 (struct cpu_arch_ver_table): Define.
1659 (cpu_arch_ver): New.
1660 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1661 Tag_CPU_arch_profile.
1662 * doc/c-arm.texi: Document new cpu and arch options.
1664 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1666 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1668 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1670 * config/tc-ia64.c: Update copyright years.
1672 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1674 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1677 2005-02-22 Paul Brook <paul@codesourcery.com>
1679 * config/tc-arm.c (do_pld): Remove incorrect write to
1681 (encode_thumb32_addr_mode): Use correct operand.
1683 2006-02-21 Paul Brook <paul@codesourcery.com>
1685 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1687 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1688 Anil Paranjape <anilp1@kpitcummins.com>
1689 Shilin Shakti <shilins@kpitcummins.com>
1691 * Makefile.am: Add xc16x related entry.
1692 * Makefile.in: Regenerate.
1693 * configure.in: Added xc16x related entry.
1694 * configure: Regenerate.
1695 * config/tc-xc16x.h: New file
1696 * config/tc-xc16x.c: New file
1697 * doc/c-xc16x.texi: New file for xc16x
1698 * doc/all.texi: Entry for xc16x
1699 * doc/Makefile.texi: Added c-xc16x.texi
1700 * NEWS: Announce the support for the new target.
1702 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1704 * configure.tgt: set emulation for mips-*-netbsd*
1706 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1708 * config.in: Rebuilt.
1710 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1712 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1713 from 1, not 0, in error messages.
1714 (md_assemble): Simplify special-case check for ENTRY instructions.
1715 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1716 operand in error message.
1718 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1720 * configure.tgt (arm-*-linux-gnueabi*): Change to
1723 2006-02-10 Nick Clifton <nickc@redhat.com>
1725 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1726 32-bit value is propagated into the upper bits of a 64-bit long.
1728 * config/tc-arc.c (init_opcode_tables): Fix cast.
1729 (arc_extoper, md_operand): Likewise.
1731 2006-02-09 David Heine <dlheine@tensilica.com>
1733 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1734 each relaxation step.
1736 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1738 * configure.in (CHECK_DECLS): Add vsnprintf.
1739 * configure: Regenerate.
1740 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1741 include/declare here, but...
1742 * as.h: Move code detecting VARARGS idiom to the top.
1743 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1744 (vsnprintf): Declare if not already declared.
1746 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1748 * as.c (close_output_file): New.
1749 (main): Register close_output_file with xatexit before
1750 dump_statistics. Don't call output_file_close.
1752 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1754 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1755 mcf5329_control_regs): New.
1756 (not_current_architecture, selected_arch, selected_cpu): New.
1757 (m68k_archs, m68k_extensions): New.
1758 (archs): Renamed to ...
1759 (m68k_cpus): ... here. Adjust.
1761 (md_pseudo_table): Add arch and cpu directives.
1762 (find_cf_chip, m68k_ip): Adjust table scanning.
1763 (no_68851, no_68881): Remove.
1764 (md_assemble): Lazily initialize.
1765 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1766 (md_init_after_args): Move functionality to m68k_init_arch.
1767 (mri_chip): Adjust table scanning.
1768 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1769 options with saner parsing.
1770 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1771 m68k_init_arch): New.
1772 (s_m68k_cpu, s_m68k_arch): New.
1773 (md_show_usage): Adjust.
1774 (m68k_elf_final_processing): Set CF EF flags.
1775 * config/tc-m68k.h (m68k_init_after_args): Remove.
1776 (tc_init_after_args): Remove.
1777 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1778 (M68k-Directives): Document .arch and .cpu directives.
1780 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1782 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1783 synonyms for equ and defl.
1784 (z80_cons_fix_new): New function.
1785 (emit_byte): Disallow relative jumps to absolute locations.
1786 (emit_data): Only handle defb, prototype changed, because defb is
1787 now handled as pseudo-op rather than an instruction.
1788 (instab): Entries for defb,defw,db,dw moved from here...
1789 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1790 Add entries for def24,def32,d24,d32.
1791 (md_assemble): Improved error handling.
1792 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1793 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1794 (z80_cons_fix_new): Declare.
1795 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1796 (def24,d24,def32,d32): New pseudo-ops.
1798 2006-02-02 Paul Brook <paul@codesourcery.com>
1800 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1802 2005-02-02 Paul Brook <paul@codesourcery.com>
1804 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1805 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1806 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1807 T2_OPCODE_RSB): Define.
1808 (thumb32_negate_data_op): New function.
1809 (md_apply_fix): Use it.
1811 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1813 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1815 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1816 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1818 (relaxation_requirements): Add pfinish_frag argument and use it to
1819 replace setting tinsn->record_fix fields.
1820 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1821 and vinsn_to_insnbuf. Remove references to record_fix and
1822 slot_sub_symbols fields.
1823 (xtensa_mark_narrow_branches): Delete unused code.
1824 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1826 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1828 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1829 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1830 of the record_fix field. Simplify error messages for unexpected
1832 (set_expr_symbol_offset_diff): Delete.
1834 2006-01-31 Paul Brook <paul@codesourcery.com>
1836 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1838 2006-01-31 Paul Brook <paul@codesourcery.com>
1839 Richard Earnshaw <rearnsha@arm.com>
1841 * config/tc-arm.c: Use arm_feature_set.
1842 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1843 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1844 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1847 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1848 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1849 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1850 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1852 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1853 (arm_opts): Move old cpu/arch options from here...
1854 (arm_legacy_opts): ... to here.
1855 (md_parse_option): Search arm_legacy_opts.
1856 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1857 (arm_float_abis, arm_eabis): Make const.
1859 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1861 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1863 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1865 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1866 in load immediate intruction.
1868 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1870 * config/bfin-parse.y (value_match): Use correct conversion
1871 specifications in template string for __FILE__ and __LINE__.
1875 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1877 Introduce TLS descriptors for i386 and x86_64.
1878 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1879 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1880 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1881 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1882 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1884 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1885 (lex_got): Handle @tlsdesc and @tlscall.
1886 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1888 2006-01-11 Nick Clifton <nickc@redhat.com>
1890 Fixes for building on 64-bit hosts:
1891 * config/tc-avr.c (mod_index): New union to allow conversion
1892 between pointers and integers.
1893 (md_begin, avr_ldi_expression): Use it.
1894 * config/tc-i370.c (md_assemble): Add cast for argument to print
1896 * config/tc-tic54x.c (subsym_substitute): Likewise.
1897 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1898 opindex field of fr_cgen structure into a pointer so that it can
1899 be stored in a frag.
1900 * config/tc-mn10300.c (md_assemble): Likewise.
1901 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1903 * config/tc-v850.c: Replace uses of (int) casts with correct
1906 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1909 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1911 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1914 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1915 a local-label reference.
1917 For older changes see ChangeLog-2005
1923 version-control: never