1 2006-07-20 Thiemo Seufer <ths@mips.com>
2 Nigel Stephens <nigel@mips.com>
4 * config/tc-mips.c (md_parse_option): Don't infer optimisation
5 options from debug options.
7 2006-07-20 Thiemo Seufer <ths@mips.com>
9 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
10 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
12 2006-07-19 Paul Brook <paul@codesourcery.com>
14 * config/tc-arm.c (insns): Fix rbit Arm opcode.
16 2006-07-18 Paul Brook <paul@codesourcery.com>
18 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
19 (md_convert_frag): Use correct reloc for add_pc. Use
20 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
21 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
22 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
24 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
26 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
27 when file and line unknown.
29 2006-07-17 Thiemo Seufer <ths@mips.com>
31 * read.c (s_struct): Use IS_ELF.
32 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
33 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
34 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
35 s_mips_mask): Likewise.
37 2006-07-16 Thiemo Seufer <ths@mips.com>
38 David Ung <davidu@mips.com>
40 * read.c (s_struct): Handle ELF section changing.
41 * config/tc-mips.c (s_align): Leave enabling auto-align to the
43 (s_change_sec): Try section changing only if we output ELF.
45 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
47 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
49 (smallest_imm_type): Remove Cpu086.
50 (i386_target_format): Likewise.
52 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
55 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
56 Michael Meissner <michael.meissner@amd.com>
58 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
59 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
60 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
62 (i386_align_code): Ditto.
63 (md_assemble_code): Add support for insertq/extrq instructions,
64 swapping as needed for intel syntax.
65 (swap_imm_operands): New function to swap immediate operands.
66 (swap_operands): Deal with 4 operand instructions.
67 (build_modrm_byte): Add support for insertq instruction.
69 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
71 * config/tc-i386.h (Size64): Fix a typo in comment.
73 2006-07-12 Nick Clifton <nickc@redhat.com>
75 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
76 fixup_segment() to repeat a range check on a value that has
77 already been checked here.
79 2006-07-07 James E Wilson <wilson@specifix.com>
81 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
83 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
84 Nick Clifton <nickc@redhat.com>
87 * doc/as.texi: Fix spelling typo: branchs => branches.
88 * doc/c-m68hc11.texi: Likewise.
89 * config/tc-m68hc11.c: Likewise.
90 Support old spelling of command line switch for backwards
93 2006-07-04 Thiemo Seufer <ths@mips.com>
94 David Ung <davidu@mips.com>
96 * config/tc-mips.c (s_is_linkonce): New function.
97 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
98 weak, external, and linkonce symbols.
99 (pic_need_relax): Use s_is_linkonce.
101 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
103 * doc/as.texinfo (Org): Remove space.
104 (P2align): Add "@var{abs-expr},".
106 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
108 * config/tc-i386.c (cpu_arch_tune_set): New.
109 (cpu_arch_isa): Likewise.
110 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
111 nops with short or long nop sequences based on -march=/.arch
113 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
114 set cpu_arch_tune and cpu_arch_tune_flags.
115 (md_parse_option): For -march=, set cpu_arch_isa and set
116 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
117 0. Set cpu_arch_tune_set to 1 for -mtune=.
118 (i386_target_format): Don't set cpu_arch_tune.
120 2006-06-23 Nigel Stephens <nigel@mips.com>
122 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
123 generated .sbss.* and .gnu.linkonce.sb.*.
125 2006-06-23 Thiemo Seufer <ths@mips.com>
126 David Ung <davidu@mips.com>
128 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
130 * config/tc-mips.c (label_list): Define per-segment label_list.
131 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
132 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
133 mips_from_file_after_relocs, mips_define_label): Use per-segment
136 2006-06-22 Thiemo Seufer <ths@mips.com>
138 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
139 (append_insn): Use it.
140 (md_apply_fix): Whitespace formatting.
141 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
142 mips16_extended_frag): Remove register specifier.
143 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
146 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
148 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
149 a directive saving VFP registers for ARMv6 or later.
150 (s_arm_unwind_save): Add parameter arch_v6 and call
151 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
153 (md_pseudo_table): Add entry for new "vsave" directive.
154 * doc/c-arm.texi: Correct error in example for "save"
155 directive (fstmdf -> fstmdx). Also document "vsave" directive.
157 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
158 Anatoly Sokolov <aesok@post.ru>
160 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
161 and atmega644p devices. Rename atmega164/atmega324 devices to
162 atmega164p/atmega324p.
163 * doc/c-avr.texi: Document new mcu and arch options.
165 2006-06-17 Nick Clifton <nickc@redhat.com>
167 * config/tc-arm.c (enum parse_operand_result): Move outside of
168 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
170 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
172 * config/tc-i386.h (processor_type): New.
173 (arch_entry): Add type.
175 * config/tc-i386.c (cpu_arch_tune): New.
176 (cpu_arch_tune_flags): Likewise.
177 (cpu_arch_isa_flags): Likewise.
179 (set_cpu_arch): Also update cpu_arch_isa_flags.
180 (md_assemble): Update cpu_arch_isa_flags.
182 (OPTION_MTUNE): Likewise.
183 (md_longopts): Add -march= and -mtune=.
184 (md_parse_option): Support -march= and -mtune=.
185 (md_show_usage): Add -march=CPU/-mtune=CPU.
186 (i386_target_format): Also update cpu_arch_isa_flags,
187 cpu_arch_tune and cpu_arch_tune_flags.
189 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
191 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
193 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
195 * config/tc-arm.c (enum parse_operand_result): New.
196 (struct group_reloc_table_entry): New.
197 (enum group_reloc_type): New.
198 (group_reloc_table): New array.
199 (find_group_reloc_table_entry): New function.
200 (parse_shifter_operand_group_reloc): New function.
201 (parse_address_main): New function, incorporating code
202 from the old parse_address function. To be used via...
203 (parse_address): wrapper for parse_address_main; and
204 (parse_address_group_reloc): new function, likewise.
205 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
206 OP_ADDRGLDRS, OP_ADDRGLDC.
207 (parse_operands): Support for these new operand codes.
208 New macro po_misc_or_fail_no_backtrack.
209 (encode_arm_cp_address): Preserve group relocations.
210 (insns): Modify to use the above operand codes where group
211 relocations are permitted.
212 (md_apply_fix): Handle the group relocations
213 ALU_PC_G0_NC through LDC_SB_G2.
214 (tc_gen_reloc): Likewise.
215 (arm_force_relocation): Leave group relocations for the linker.
216 (arm_fix_adjustable): Likewise.
218 2006-06-15 Julian Brown <julian@codesourcery.com>
220 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
221 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
224 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
226 * config/tc-i386.c (process_suffix): Don't add rex64 for
229 2006-06-09 Thiemo Seufer <ths@mips.com>
231 * config/tc-mips.c (mips_ip): Maintain argument count.
233 2006-06-09 Alan Modra <amodra@bigpond.net.au>
235 * config/tc-iq2000.c: Include sb.h.
237 2006-06-08 Nigel Stephens <nigel@mips.com>
239 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
240 aliases for better compatibility with SGI tools.
242 2006-06-08 Alan Modra <amodra@bigpond.net.au>
244 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
245 * Makefile.am (GASLIBS): Expand @BFDLIB@.
247 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
248 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
249 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
251 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
252 * Makefile.in: Regenerate.
253 * doc/Makefile.in: Regenerate.
254 * configure: Regenerate.
256 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
258 * po/Make-in (pdf, ps): New dummy targets.
260 2006-06-07 Julian Brown <julian@codesourcery.com>
262 * config/tc-arm.c (stdarg.h): include.
263 (arm_it): Add uncond_value field. Add isvec and issingle to operand
265 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
266 REG_TYPE_NSDQ (single, double or quad vector reg).
267 (reg_expected_msgs): Update.
268 (BAD_FPU): Add macro for unsupported FPU instruction error.
269 (parse_neon_type): Support 'd' as an alias for .f64.
270 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
272 (parse_vfp_reg_list): Don't update first arg on error.
273 (parse_neon_mov): Support extra syntax for VFP moves.
274 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
275 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
276 (parse_operands): Support isvec, issingle operands fields, new parse
278 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
280 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
281 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
282 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
283 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
285 (neon_shape): Redefine in terms of above.
286 (neon_shape_class): New enumeration, table of shape classes.
287 (neon_shape_el): New enumeration. One element of a shape.
288 (neon_shape_el_size): Register widths of above, where appropriate.
289 (neon_shape_info): New struct. Info for shape table.
290 (neon_shape_tab): New array.
291 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
292 (neon_check_shape): Rewrite as...
293 (neon_select_shape): New function to classify instruction shapes,
294 driven by new table neon_shape_tab array.
295 (neon_quad): New function. Return 1 if shape should set Q flag in
296 instructions (or equivalent), 0 otherwise.
297 (type_chk_of_el_type): Support F64.
298 (el_type_of_type_chk): Likewise.
299 (neon_check_type): Add support for VFP type checking (VFP data
300 elements fill their containing registers).
301 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
302 in thumb mode for VFP instructions.
303 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
304 and encode the current instruction as if it were that opcode.
305 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
306 arguments, call function in PFN.
307 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
308 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
309 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
310 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
311 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
312 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
313 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
314 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
315 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
316 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
317 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
318 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
319 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
320 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
321 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
323 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
324 between VFP and Neon turns out to belong to Neon. Perform
325 architecture check and fill in condition field if appropriate.
326 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
327 (do_neon_cvt): Add support for VFP variants of instructions.
328 (neon_cvt_flavour): Extend to cover VFP conversions.
329 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
331 (do_neon_ldr_str): Handle single-precision VFP load/store.
332 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
333 NS_NULL not NS_IGNORE.
334 (opcode_tag): Add OT_csuffixF for operands which either take a
335 conditional suffix, or have 0xF in the condition field.
336 (md_assemble): Add support for OT_csuffixF.
337 (NCE): Replace macro with...
338 (NCE_tag, NCE, NCEF): New macros.
339 (nCE): Replace macro with...
340 (nCE_tag, nCE, nCEF): New macros.
341 (insns): Add support for VFP insns or VFP versions of insns msr,
342 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
343 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
344 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
345 VFP/Neon insns together.
347 2006-06-07 Alan Modra <amodra@bigpond.net.au>
348 Ladislav Michl <ladis@linux-mips.org>
350 * app.c: Don't include headers already included by as.h.
352 * atof-generic.c: Likewise.
354 * dwarf2dbg.c: Likewise.
356 * input-file.c: Likewise.
357 * input-scrub.c: Likewise.
359 * output-file.c: Likewise.
362 * config/bfin-lex.l: Likewise.
363 * config/obj-coff.h: Likewise.
364 * config/obj-elf.h: Likewise.
365 * config/obj-som.h: Likewise.
366 * config/tc-arc.c: Likewise.
367 * config/tc-arm.c: Likewise.
368 * config/tc-avr.c: Likewise.
369 * config/tc-bfin.c: Likewise.
370 * config/tc-cris.c: Likewise.
371 * config/tc-d10v.c: Likewise.
372 * config/tc-d30v.c: Likewise.
373 * config/tc-dlx.h: Likewise.
374 * config/tc-fr30.c: Likewise.
375 * config/tc-frv.c: Likewise.
376 * config/tc-h8300.c: Likewise.
377 * config/tc-hppa.c: Likewise.
378 * config/tc-i370.c: Likewise.
379 * config/tc-i860.c: Likewise.
380 * config/tc-i960.c: Likewise.
381 * config/tc-ip2k.c: Likewise.
382 * config/tc-iq2000.c: Likewise.
383 * config/tc-m32c.c: Likewise.
384 * config/tc-m32r.c: Likewise.
385 * config/tc-maxq.c: Likewise.
386 * config/tc-mcore.c: Likewise.
387 * config/tc-mips.c: Likewise.
388 * config/tc-mmix.c: Likewise.
389 * config/tc-mn10200.c: Likewise.
390 * config/tc-mn10300.c: Likewise.
391 * config/tc-msp430.c: Likewise.
392 * config/tc-mt.c: Likewise.
393 * config/tc-ns32k.c: Likewise.
394 * config/tc-openrisc.c: Likewise.
395 * config/tc-ppc.c: Likewise.
396 * config/tc-s390.c: Likewise.
397 * config/tc-sh.c: Likewise.
398 * config/tc-sh64.c: Likewise.
399 * config/tc-sparc.c: Likewise.
400 * config/tc-tic30.c: Likewise.
401 * config/tc-tic4x.c: Likewise.
402 * config/tc-tic54x.c: Likewise.
403 * config/tc-v850.c: Likewise.
404 * config/tc-vax.c: Likewise.
405 * config/tc-xc16x.c: Likewise.
406 * config/tc-xstormy16.c: Likewise.
407 * config/tc-xtensa.c: Likewise.
408 * config/tc-z80.c: Likewise.
409 * config/tc-z8k.c: Likewise.
410 * macro.h: Don't include sb.h or ansidecl.h.
411 * sb.h: Don't include stdio.h or ansidecl.h.
412 * cond.c: Include sb.h.
413 * itbl-lex.l: Include as.h instead of other system headers.
414 * itbl-parse.y: Likewise.
415 * itbl-ops.c: Similarly.
416 * itbl-ops.h: Don't include as.h or ansidecl.h.
417 * config/bfin-defs.h: Don't include bfd.h or as.h.
418 * config/bfin-parse.y: Include as.h instead of other system headers.
420 2006-06-06 Ben Elliston <bje@au.ibm.com>
421 Anton Blanchard <anton@samba.org>
423 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
424 (md_show_usage): Document it.
425 (ppc_setup_opcodes): Test power6 opcode flag bits.
426 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
428 2006-06-06 Thiemo Seufer <ths@mips.com>
429 Chao-ying Fu <fu@mips.com>
431 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
432 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
433 (macro_build): Update comment.
434 (mips_ip): Allow DSP64 instructions for MIPS64R2.
435 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
437 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
438 MIPS_CPU_ASE_MDMX flags for sb1.
440 2006-06-05 Thiemo Seufer <ths@mips.com>
442 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
444 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
445 (mips_ip): Make overflowed/underflowed constant arguments in DSP
446 and MT instructions a fatal error. Use INSERT_OPERAND where
447 appropriate. Improve warnings for break and wait code overflows.
448 Use symbolic constant of OP_MASK_COPZ.
449 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
451 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
453 * po/Make-in (top_builddir): Define.
455 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
457 * doc/Makefile.am (TEXI2DVI): Define.
458 * doc/Makefile.in: Regenerate.
459 * doc/c-arc.texi: Fix typo.
461 2006-06-01 Alan Modra <amodra@bigpond.net.au>
463 * config/obj-ieee.c: Delete.
464 * config/obj-ieee.h: Delete.
465 * Makefile.am (OBJ_FORMATS): Remove ieee.
466 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
467 (obj-ieee.o): Remove rule.
468 * Makefile.in: Regenerate.
469 * configure.in (atof): Remove tahoe.
470 (OBJ_MAYBE_IEEE): Don't define.
471 * configure: Regenerate.
472 * config.in: Regenerate.
473 * doc/Makefile.in: Regenerate.
474 * po/POTFILES.in: Regenerate.
476 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
478 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
479 and LIBINTL_DEP everywhere.
481 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
482 * acinclude.m4: Include new gettext macros.
483 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
484 Remove local code for po/Makefile.
485 * Makefile.in, configure, doc/Makefile.in: Regenerated.
487 2006-05-30 Nick Clifton <nickc@redhat.com>
489 * po/es.po: Updated Spanish translation.
491 2006-05-06 Denis Chertykov <denisc@overta.ru>
493 * doc/c-avr.texi: New file.
494 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
495 * doc/all.texi: Set AVR
496 * doc/as.texinfo: Include c-avr.texi
498 2006-05-28 Jie Zhang <jie.zhang@analog.com>
500 * config/bfin-parse.y (check_macfunc): Loose the condition of
501 calling check_multiply_halfregs ().
503 2006-05-25 Jie Zhang <jie.zhang@analog.com>
505 * config/bfin-parse.y (asm_1): Better check and deal with
506 vector and scalar Multiply 16-Bit Operands instructions.
508 2006-05-24 Nick Clifton <nickc@redhat.com>
510 * config/tc-hppa.c: Convert to ISO C90 format.
511 * config/tc-hppa.h: Likewise.
513 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
514 Randolph Chung <randolph@tausq.org>
516 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
517 is_tls_ieoff, is_tls_leoff): Define.
518 (fix_new_hppa): Handle TLS.
519 (cons_fix_new_hppa): Likewise.
521 (md_apply_fix): Handle TLS relocs.
522 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
524 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
526 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
528 2006-05-23 Thiemo Seufer <ths@mips.com>
529 David Ung <davidu@mips.com>
530 Nigel Stephens <nigel@mips.com>
533 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
534 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
535 ISA_HAS_MXHC1): New macros.
536 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
537 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
538 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
539 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
540 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
541 (mips_after_parse_args): Change default handling of float register
542 size to account for 32bit code with 64bit FP. Better sanity checking
543 of ISA/ASE/ABI option combinations.
544 (s_mipsset): Support switching of GPR and FPR sizes via
545 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
547 (mips_elf_final_processing): We should record the use of 64bit FP
548 registers in 32bit code but we don't, because ELF header flags are
550 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
551 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
552 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
553 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
554 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
555 missing -march options. Document .set arch=CPU. Move .set smartmips
556 to ASE page. Use @code for .set FOO examples.
558 2006-05-23 Jie Zhang <jie.zhang@analog.com>
560 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
563 2006-05-23 Jie Zhang <jie.zhang@analog.com>
565 * config/bfin-defs.h (bfin_equals): Remove declaration.
566 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
567 * config/tc-bfin.c (bfin_name_is_register): Remove.
568 (bfin_equals): Remove.
569 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
570 (bfin_name_is_register): Remove declaration.
572 2006-05-19 Thiemo Seufer <ths@mips.com>
573 Nigel Stephens <nigel@mips.com>
575 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
576 (mips_oddfpreg_ok): New function.
579 2006-05-19 Thiemo Seufer <ths@mips.com>
580 David Ung <davidu@mips.com>
582 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
583 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
584 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
585 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
586 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
587 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
588 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
589 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
590 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
591 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
592 reg_names_o32, reg_names_n32n64): Define register classes.
593 (reg_lookup): New function, use register classes.
594 (md_begin): Reserve register names in the symbol table. Simplify
596 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
598 (mips16_ip): Use reg_lookup.
599 (tc_get_register): Likewise.
600 (tc_mips_regname_to_dw2regnum): New function.
602 2006-05-19 Thiemo Seufer <ths@mips.com>
604 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
605 Un-constify string argument.
606 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
608 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
610 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
612 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
614 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
616 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
619 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
621 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
622 cfloat/m68881 to correct architecture before using it.
624 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
626 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
629 2006-05-15 Paul Brook <paul@codesourcery.com>
631 * config/tc-arm.c (arm_adjust_symtab): Use
632 bfd_is_arm_special_symbol_name.
634 2006-05-15 Bob Wilson <bob.wilson@acm.org>
636 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
637 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
638 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
639 Handle errors from calls to xtensa_opcode_is_* functions.
641 2006-05-14 Thiemo Seufer <ths@mips.com>
643 * config/tc-mips.c (macro_build): Test for currently active
645 (mips16_ip): Reject invalid opcodes.
647 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
649 * doc/as.texinfo: Rename "Index" to "AS Index",
650 and "ABORT" to "ABORT (COFF)".
652 2006-05-11 Paul Brook <paul@codesourcery.com>
654 * config/tc-arm.c (parse_half): New function.
655 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
656 (parse_operands): Ditto.
657 (do_mov16): Reject invalid relocations.
658 (do_t_mov16): Ditto. Use Thumb reloc numbers.
659 (insns): Replace Iffff with HALF.
660 (md_apply_fix): Add MOVW and MOVT relocs.
661 (tc_gen_reloc): Ditto.
662 * doc/c-arm.texi: Document relocation operators
664 2006-05-11 Paul Brook <paul@codesourcery.com>
666 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
668 2006-05-11 Thiemo Seufer <ths@mips.com>
670 * config/tc-mips.c (append_insn): Don't check the range of j or
673 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
675 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
676 relocs against external symbols for WinCE targets.
677 (md_apply_fix): Likewise.
679 2006-05-09 David Ung <davidu@mips.com>
681 * config/tc-mips.c (append_insn): Only warn about an out-of-range
684 2006-05-09 Nick Clifton <nickc@redhat.com>
686 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
687 against symbols which are not going to be placed into the symbol
690 2006-05-09 Ben Elliston <bje@au.ibm.com>
692 * expr.c (operand): Remove `if (0 && ..)' statement and
693 subsequently unused target_op label. Collapse `if (1 || ..)'
695 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
696 separately above the switch.
698 2006-05-08 Nick Clifton <nickc@redhat.com>
701 * config/tc-msp430.c (line_separator_character): Define as |.
703 2006-05-08 Thiemo Seufer <ths@mips.com>
704 Nigel Stephens <nigel@mips.com>
705 David Ung <davidu@mips.com>
707 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
708 (mips_opts): Likewise.
709 (file_ase_smartmips): New variable.
710 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
711 (macro_build): Handle SmartMIPS instructions.
713 (md_longopts): Add argument handling for smartmips.
714 (md_parse_options, mips_after_parse_args): Likewise.
715 (s_mipsset): Add .set smartmips support.
716 (md_show_usage): Document -msmartmips/-mno-smartmips.
717 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
719 * doc/c-mips.texi: Likewise.
721 2006-05-08 Alan Modra <amodra@bigpond.net.au>
723 * write.c (relax_segment): Add pass count arg. Don't error on
724 negative org/space on first two passes.
725 (relax_seg_info): New struct.
726 (relax_seg, write_object_file): Adjust.
727 * write.h (relax_segment): Update prototype.
729 2006-05-05 Julian Brown <julian@codesourcery.com>
731 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
733 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
734 architecture version checks.
735 (insns): Allow overlapping instructions to be used in VFP mode.
737 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
740 * config/obj-elf.c (obj_elf_change_section): Allow user
741 specified SHF_ALPHA_GPREL.
743 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
745 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
746 for PMEM related expressions.
748 2006-05-05 Nick Clifton <nickc@redhat.com>
751 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
752 insertion of a directory separator character into a string at a
753 given offset. Uses heuristics to decide when to use a backslash
754 character rather than a forward-slash character.
755 (dwarf2_directive_loc): Use the macro.
756 (out_debug_info): Likewise.
758 2006-05-05 Thiemo Seufer <ths@mips.com>
759 David Ung <davidu@mips.com>
761 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
763 (macro): Add new case M_CACHE_AB.
765 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
767 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
768 (opcode_lookup): Issue a warning for opcode with
769 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
770 identical to OT_cinfix3.
771 (TxC3w, TC3w, tC3w): New.
772 (insns): Use tC3w and TC3w for comparison instructions with
775 2006-05-04 Alan Modra <amodra@bigpond.net.au>
777 * subsegs.h (struct frchain): Delete frch_seg.
778 (frchain_root): Delete.
779 (seg_info): Define as macro.
780 * subsegs.c (frchain_root): Delete.
781 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
782 (subsegs_begin, subseg_change): Adjust for above.
783 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
784 rather than to one big list.
785 (subseg_get): Don't special case abs, und sections.
786 (subseg_new, subseg_force_new): Don't set frchainP here.
788 (subsegs_print_statistics): Adjust frag chain control list traversal.
789 * debug.c (dmp_frags): Likewise.
790 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
791 at frchain_root. Make use of known frchain ordering.
792 (last_frag_for_seg): Likewise.
793 (get_frag_fix): Likewise. Add seg param.
794 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
795 * write.c (chain_frchains_together_1): Adjust for struct frchain.
796 (SUB_SEGMENT_ALIGN): Likewise.
797 (subsegs_finish): Adjust frchain list traversal.
798 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
799 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
800 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
801 (xtensa_fix_b_j_loop_end_frags): Likewise.
802 (xtensa_fix_close_loop_end_frags): Likewise.
803 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
804 (retrieve_segment_info): Delete frch_seg initialisation.
806 2006-05-03 Alan Modra <amodra@bigpond.net.au>
808 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
809 * config/obj-elf.h (obj_sec_set_private_data): Delete.
810 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
811 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
813 2006-05-02 Joseph Myers <joseph@codesourcery.com>
815 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
817 (md_apply_fix3): Multiply offset by 4 here for
818 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
820 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
821 Jan Beulich <jbeulich@novell.com>
823 * config/tc-i386.c (output_invalid_buf): Change size for
825 * config/tc-tic30.c (output_invalid_buf): Likewise.
827 * config/tc-i386.c (output_invalid): Cast none-ascii char to
829 * config/tc-tic30.c (output_invalid): Likewise.
831 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
833 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
834 (TEXI2POD): Use AM_MAKEINFOFLAGS.
835 (asconfig.texi): Don't set top_srcdir.
836 * doc/as.texinfo: Don't use top_srcdir.
837 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
839 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
841 * config/tc-i386.c (output_invalid_buf): Change size to 16.
842 * config/tc-tic30.c (output_invalid_buf): Likewise.
844 * config/tc-i386.c (output_invalid): Use snprintf instead of
846 * config/tc-ia64.c (declare_register_set): Likewise.
847 (emit_one_bundle): Likewise.
848 (check_dependencies): Likewise.
849 * config/tc-tic30.c (output_invalid): Likewise.
851 2006-05-02 Paul Brook <paul@codesourcery.com>
853 * config/tc-arm.c (arm_optimize_expr): New function.
854 * config/tc-arm.h (md_optimize_expr): Define
855 (arm_optimize_expr): Add prototype.
856 (TC_FORCE_RELOCATION_SUB_SAME): Define.
858 2006-05-02 Ben Elliston <bje@au.ibm.com>
860 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
863 * sb.h (sb_list_vector): Move to sb.c.
864 * sb.c (free_list): Use type of sb_list_vector directly.
865 (sb_build): Fix off-by-one error in assertion about `size'.
867 2006-05-01 Ben Elliston <bje@au.ibm.com>
869 * listing.c (listing_listing): Remove useless loop.
870 * macro.c (macro_expand): Remove is_positional local variable.
871 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
872 and simplify surrounding expressions, where possible.
873 (assign_symbol): Likewise.
874 (s_weakref): Likewise.
875 * symbols.c (colon): Likewise.
877 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
879 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
881 2006-04-30 Thiemo Seufer <ths@mips.com>
882 David Ung <davidu@mips.com>
884 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
885 (mips_immed): New table that records various handling of udi
886 instruction patterns.
887 (mips_ip): Adds udi handling.
889 2006-04-28 Alan Modra <amodra@bigpond.net.au>
891 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
892 of list rather than beginning.
894 2006-04-26 Julian Brown <julian@codesourcery.com>
896 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
897 (is_quarter_float): Rename from above. Simplify slightly.
898 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
900 (parse_neon_mov): Parse floating-point constants.
901 (neon_qfloat_bits): Fix encoding.
902 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
903 preference to integer encoding when using the F32 type.
905 2006-04-26 Julian Brown <julian@codesourcery.com>
907 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
908 zero-initialising structures containing it will lead to invalid types).
909 (arm_it): Add vectype to each operand.
910 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
912 (neon_typed_alias): New structure. Extra information for typed
914 (reg_entry): Add neon type info field.
915 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
916 Break out alternative syntax for coprocessor registers, etc. into...
917 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
918 out from arm_reg_parse.
919 (parse_neon_type): Move. Return SUCCESS/FAIL.
920 (first_error): New function. Call to ensure first error which occurs is
922 (parse_neon_operand_type): Parse exactly one type.
923 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
924 (parse_typed_reg_or_scalar): New function. Handle core of both
925 arm_typed_reg_parse and parse_scalar.
926 (arm_typed_reg_parse): Parse a register with an optional type.
927 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
929 (parse_scalar): Parse a Neon scalar with optional type.
930 (parse_reg_list): Use first_error.
931 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
932 (neon_alias_types_same): New function. Return true if two (alias) types
934 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
936 (insert_reg_alias): Return new reg_entry not void.
937 (insert_neon_reg_alias): New function. Insert type/index information as
938 well as register for alias.
939 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
940 make typed register aliases accordingly.
941 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
943 (s_unreq): Delete type information if present.
944 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
945 (s_arm_unwind_save_mmxwcg): Likewise.
946 (s_arm_unwind_movsp): Likewise.
947 (s_arm_unwind_setfp): Likewise.
948 (parse_shift): Likewise.
949 (parse_shifter_operand): Likewise.
950 (parse_address): Likewise.
951 (parse_tb): Likewise.
952 (tc_arm_regname_to_dw2regnum): Likewise.
953 (md_pseudo_table): Add dn, qn.
954 (parse_neon_mov): Handle typed operands.
955 (parse_operands): Likewise.
956 (neon_type_mask): Add N_SIZ.
957 (N_ALLMODS): New macro.
958 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
959 (el_type_of_type_chk): Add some safeguards.
960 (modify_types_allowed): Fix logic bug.
961 (neon_check_type): Handle operands with types.
962 (neon_three_same): Remove redundant optional arg handling.
963 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
964 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
965 (do_neon_step): Adjust accordingly.
966 (neon_cmode_for_logic_imm): Use first_error.
967 (do_neon_bitfield): Call neon_check_type.
968 (neon_dyadic): Rename to...
969 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
970 to allow modification of type of the destination.
971 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
972 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
973 (do_neon_compare): Make destination be an untyped bitfield.
974 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
975 (neon_mul_mac): Return early in case of errors.
976 (neon_move_immediate): Use first_error.
977 (neon_mac_reg_scalar_long): Fix type to include scalar.
978 (do_neon_dup): Likewise.
979 (do_neon_mov): Likewise (in several places).
980 (do_neon_tbl_tbx): Fix type.
981 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
982 (do_neon_ld_dup): Exit early in case of errors and/or use
984 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
985 Handle .dn/.qn directives.
986 (REGDEF): Add zero for reg_entry neon field.
988 2006-04-26 Julian Brown <julian@codesourcery.com>
990 * config/tc-arm.c (limits.h): Include.
991 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
992 (fpu_vfp_v3_or_neon_ext): Declare constants.
993 (neon_el_type): New enumeration of types for Neon vector elements.
994 (neon_type_el): New struct. Define type and size of a vector element.
995 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
997 (neon_type): Define struct. The type of an instruction.
998 (arm_it): Add 'vectype' for the current instruction.
999 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1000 (vfp_sp_reg_pos): Rename to...
1001 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1003 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1004 (Neon D or Q register).
1005 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1007 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1008 (my_get_expression): Allow above constant as argument to accept
1009 64-bit constants with optional prefix.
1010 (arm_reg_parse): Add extra argument to return the specific type of
1011 register in when either a D or Q register (REG_TYPE_NDQ) is
1012 requested. Can be NULL.
1013 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1014 (parse_reg_list): Update for new arm_reg_parse args.
1015 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1016 (parse_neon_el_struct_list): New function. Parse element/structure
1017 register lists for VLD<n>/VST<n> instructions.
1018 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1019 (s_arm_unwind_save_mmxwr): Likewise.
1020 (s_arm_unwind_save_mmxwcg): Likewise.
1021 (s_arm_unwind_movsp): Likewise.
1022 (s_arm_unwind_setfp): Likewise.
1023 (parse_big_immediate): New function. Parse an immediate, which may be
1024 64 bits wide. Put results in inst.operands[i].
1025 (parse_shift): Update for new arm_reg_parse args.
1026 (parse_address): Likewise. Add parsing of alignment specifiers.
1027 (parse_neon_mov): Parse the operands of a VMOV instruction.
1028 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1029 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1030 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1031 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1032 (parse_operands): Handle new codes above.
1033 (encode_arm_vfp_sp_reg): Rename to...
1034 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1035 selected VFP version only supports D0-D15.
1036 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1037 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1038 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1039 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1040 encode_arm_vfp_reg name, and allow 32 D regs.
1041 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1042 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1044 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1045 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1046 constant-load and conversion insns introduced with VFPv3.
1047 (neon_tab_entry): New struct.
1048 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1049 those which are the targets of pseudo-instructions.
1050 (neon_opc): Enumerate opcodes, use as indices into...
1051 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1052 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1053 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1054 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1056 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1058 (neon_type_mask): New. Compact type representation for type checking.
1059 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1060 permitted type combinations.
1061 (N_IGNORE_TYPE): New macro.
1062 (neon_check_shape): New function. Check an instruction shape for
1063 multiple alternatives. Return the specific shape for the current
1065 (neon_modify_type_size): New function. Modify a vector type and size,
1066 depending on the bit mask in argument 1.
1067 (neon_type_promote): New function. Convert a given "key" type (of an
1068 operand) into the correct type for a different operand, based on a bit
1070 (type_chk_of_el_type): New function. Convert a type and size into the
1071 compact representation used for type checking.
1072 (el_type_of_type_ckh): New function. Reverse of above (only when a
1073 single bit is set in the bit mask).
1074 (modify_types_allowed): New function. Alter a mask of allowed types
1075 based on a bit mask of modifications.
1076 (neon_check_type): New function. Check the type of the current
1077 instruction against the variable argument list. The "key" type of the
1078 instruction is returned.
1079 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1080 a Neon data-processing instruction depending on whether we're in ARM
1081 mode or Thumb-2 mode.
1082 (neon_logbits): New function.
1083 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1084 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1085 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1086 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1087 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1088 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1089 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1090 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1091 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1092 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1093 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1094 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1095 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1096 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1097 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1098 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1099 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1100 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1101 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1102 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1103 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1104 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1105 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1106 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1107 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1109 (parse_neon_type): New function. Parse Neon type specifier.
1110 (opcode_lookup): Allow parsing of Neon type specifiers.
1111 (REGNUM2, REGSETH, REGSET2): New macros.
1112 (reg_names): Add new VFPv3 and Neon registers.
1113 (NUF, nUF, NCE, nCE): New macros for opcode table.
1114 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1115 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1116 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1117 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1118 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1119 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1120 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1121 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1122 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1123 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1124 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1125 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1126 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1127 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1129 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1130 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1131 (arm_option_cpu_value): Add vfp3 and neon.
1132 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1135 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1137 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1138 syntax instead of hardcoded opcodes with ".w18" suffixes.
1139 (wide_branch_opcode): New.
1140 (build_transition): Use it to check for wide branch opcodes with
1141 either ".w18" or ".w15" suffixes.
1143 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1145 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1146 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1147 frag's is_literal flag.
1149 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1151 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1153 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1155 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1156 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1157 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1158 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1159 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1161 2005-04-20 Paul Brook <paul@codesourcery.com>
1163 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1165 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1167 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1169 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1170 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1171 Make some cpus unsupported on ELF. Run "make dep-am".
1172 * Makefile.in: Regenerate.
1174 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1176 * configure.in (--enable-targets): Indent help message.
1177 * configure: Regenerate.
1179 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1182 * config/tc-i386.c (i386_immediate): Check illegal immediate
1185 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1187 * config/tc-i386.c: Formatting.
1188 (output_disp, output_imm): ISO C90 params.
1190 * frags.c (frag_offset_fixed_p): Constify args.
1191 * frags.h (frag_offset_fixed_p): Ditto.
1193 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1194 (COFF_MAGIC): Delete.
1196 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1198 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1200 * po/POTFILES.in: Regenerated.
1202 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1204 * doc/as.texinfo: Mention that some .type syntaxes are not
1205 supported on all architectures.
1207 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1209 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1210 instructions when such transformations have been disabled.
1212 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1214 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1215 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1216 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1217 decoding the loop instructions. Remove current_offset variable.
1218 (xtensa_fix_short_loop_frags): Likewise.
1219 (min_bytes_to_other_loop_end): Remove current_offset argument.
1221 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1223 * config/tc-z80.c (z80_optimize_expr): Removed.
1224 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1226 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1228 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1229 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1230 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1231 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1232 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1233 at90can64, at90usb646, at90usb647, at90usb1286 and
1235 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1237 2006-04-07 Paul Brook <paul@codesourcery.com>
1239 * config/tc-arm.c (parse_operands): Set default error message.
1241 2006-04-07 Paul Brook <paul@codesourcery.com>
1243 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1245 2006-04-07 Paul Brook <paul@codesourcery.com>
1247 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1249 2006-04-07 Paul Brook <paul@codesourcery.com>
1251 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1252 (move_or_literal_pool): Handle Thumb-2 instructions.
1253 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1255 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1258 * config/tc-i386.c (match_template): Move 64-bit operand tests
1261 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1263 * po/Make-in: Add install-html target.
1264 * Makefile.am: Add install-html and install-html-recursive targets.
1265 * Makefile.in: Regenerate.
1266 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1267 * configure: Regenerate.
1268 * doc/Makefile.am: Add install-html and install-html-am targets.
1269 * doc/Makefile.in: Regenerate.
1271 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1273 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1276 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1277 Daniel Jacobowitz <dan@codesourcery.com>
1279 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1280 (GOTT_BASE, GOTT_INDEX): New.
1281 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1282 GOTT_INDEX when generating VxWorks PIC.
1283 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1284 use the generic *-*-vxworks* stanza instead.
1286 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1289 * frags.c (frag_offset_fixed_p): New function.
1290 * frags.h (frag_offset_fixed_p): Declare.
1291 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1292 (resolve_expression): Likewise.
1294 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1296 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1297 of the same length but different numbers of slots.
1299 2006-03-30 Andreas Schwab <schwab@suse.de>
1301 * configure.in: Fix help string for --enable-targets option.
1302 * configure: Regenerate.
1304 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1306 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1307 (m68k_ip): ... here. Use for all chips. Protect against buffer
1308 overrun and avoid excessive copying.
1310 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1311 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1312 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1313 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1314 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1315 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1316 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1317 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1318 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1319 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1320 (struct m68k_cpu): Change chip field to control_regs.
1321 (current_chip): Remove.
1322 (control_regs): New.
1323 (m68k_archs, m68k_extensions): Adjust.
1324 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1325 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1326 (find_cf_chip): Reimplement for new organization of cpu table.
1327 (select_control_regs): Remove.
1329 (struct save_opts): Save control regs, not chip.
1330 (s_save, s_restore): Adjust.
1331 (m68k_lookup_cpu): Give deprecated warning when necessary.
1332 (m68k_init_arch): Adjust.
1333 (md_show_usage): Adjust for new cpu table organization.
1335 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1337 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1338 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1339 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1341 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1342 (any_gotrel): New rule.
1343 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1344 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1346 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1347 (bfin_pic_ptr): New function.
1348 (md_pseudo_table): Add it for ".picptr".
1349 (OPTION_FDPIC): New macro.
1350 (md_longopts): Add -mfdpic.
1351 (md_parse_option): Handle it.
1352 (md_begin): Set BFD flags.
1353 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1354 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1356 * Makefile.am (bfin-parse.o): Update dependencies.
1357 (DEPTC_bfin_elf): Likewise.
1358 * Makefile.in: Regenerate.
1360 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1362 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1363 mcfemac instead of mcfmac.
1365 2006-03-23 Michael Matz <matz@suse.de>
1367 * config/tc-i386.c (type_names): Correct placement of 'static'.
1368 (reloc): Map some more relocs to their 64 bit counterpart when
1370 (output_insn): Work around breakage if DEBUG386 is defined.
1371 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1372 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1373 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1374 different from i386.
1375 (output_imm): Ditto.
1376 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1378 (md_convert_frag): Jumps can now be larger than 2GB away, error
1380 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1381 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1383 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1384 Daniel Jacobowitz <dan@codesourcery.com>
1385 Phil Edwards <phil@codesourcery.com>
1386 Zack Weinberg <zack@codesourcery.com>
1387 Mark Mitchell <mark@codesourcery.com>
1388 Nathan Sidwell <nathan@codesourcery.com>
1390 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1391 (md_begin): Complain about -G being used for PIC. Don't change
1392 the text, data and bss alignments on VxWorks.
1393 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1394 generating VxWorks PIC.
1395 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1396 (macro): Likewise, but do not treat la $25 specially for
1397 VxWorks PIC, and do not handle jal.
1398 (OPTION_MVXWORKS_PIC): New macro.
1399 (md_longopts): Add -mvxworks-pic.
1400 (md_parse_option): Don't complain about using PIC and -G together here.
1401 Handle OPTION_MVXWORKS_PIC.
1402 (md_estimate_size_before_relax): Always use the first relaxation
1403 sequence on VxWorks.
1404 * config/tc-mips.h (VXWORKS_PIC): New.
1406 2006-03-21 Paul Brook <paul@codesourcery.com>
1408 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1410 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1412 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1413 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1414 (get_loop_align_size): New.
1415 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1416 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1417 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1418 (get_noop_aligned_address): Use get_loop_align_size.
1419 (get_aligned_diff): Likewise.
1421 2006-03-21 Paul Brook <paul@codesourcery.com>
1423 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1425 2006-03-20 Paul Brook <paul@codesourcery.com>
1427 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1428 (do_t_branch): Encode branches inside IT blocks as unconditional.
1429 (do_t_cps): New function.
1430 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1431 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1432 (opcode_lookup): Allow conditional suffixes on all instructions in
1434 (md_assemble): Advance condexec state before checking for errors.
1435 (insns): Use do_t_cps.
1437 2006-03-20 Paul Brook <paul@codesourcery.com>
1439 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1440 outputting the insn.
1442 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1444 * config/tc-vax.c: Update copyright year.
1445 * config/tc-vax.h: Likewise.
1447 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1449 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1451 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1453 2006-03-17 Paul Brook <paul@codesourcery.com>
1455 * config/tc-arm.c (insns): Add ldm and stm.
1457 2006-03-17 Ben Elliston <bje@au.ibm.com>
1460 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1462 2006-03-16 Paul Brook <paul@codesourcery.com>
1464 * config/tc-arm.c (insns): Add "svc".
1466 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1468 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1469 flag and avoid double underscore prefixes.
1471 2006-03-10 Paul Brook <paul@codesourcery.com>
1473 * config/tc-arm.c (md_begin): Handle EABIv5.
1474 (arm_eabis): Add EF_ARM_EABI_VER5.
1475 * doc/c-arm.texi: Document -meabi=5.
1477 2006-03-10 Ben Elliston <bje@au.ibm.com>
1479 * app.c (do_scrub_chars): Simplify string handling.
1481 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1482 Daniel Jacobowitz <dan@codesourcery.com>
1483 Zack Weinberg <zack@codesourcery.com>
1484 Nathan Sidwell <nathan@codesourcery.com>
1485 Paul Brook <paul@codesourcery.com>
1486 Ricardo Anguiano <anguiano@codesourcery.com>
1487 Phil Edwards <phil@codesourcery.com>
1489 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1490 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1492 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1493 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1494 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1496 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1498 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1499 even when using the text-section-literals option.
1501 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1503 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1505 (m68k_ip): <case 'J'> Check we have some control regs.
1506 (md_parse_option): Allow raw arch switch.
1507 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1508 whether 68881 or cfloat was meant by -mfloat.
1509 (md_show_usage): Adjust extension display.
1510 (m68k_elf_final_processing): Adjust.
1512 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1514 * config/tc-avr.c (avr_mod_hash_value): New function.
1515 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1516 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1517 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1518 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1520 (tc_gen_reloc): Handle substractions of symbols, if possible do
1521 fixups, abort otherwise.
1522 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1523 tc_fix_adjustable): Define.
1525 2006-03-02 James E Wilson <wilson@specifix.com>
1527 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1528 change the template, then clear md.slot[curr].end_of_insn_group.
1530 2006-02-28 Jan Beulich <jbeulich@novell.com>
1532 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1534 2006-02-28 Jan Beulich <jbeulich@novell.com>
1537 * macro.c (getstring): Don't treat parentheses special anymore.
1538 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1539 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1542 2006-02-28 Mat <mat@csail.mit.edu>
1544 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1546 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1548 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1550 (CFI_signal_frame): Define.
1551 (cfi_pseudo_table): Add .cfi_signal_frame.
1552 (dot_cfi): Handle CFI_signal_frame.
1553 (output_cie): Handle cie->signal_frame.
1554 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1555 different. Copy signal_frame from FDE to newly created CIE.
1556 * doc/as.texinfo: Document .cfi_signal_frame.
1558 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1560 * doc/Makefile.am: Add html target.
1561 * doc/Makefile.in: Regenerate.
1562 * po/Make-in: Add html target.
1564 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1566 * config/tc-i386.c (output_insn): Support Intel Merom New
1569 * config/tc-i386.h (CpuMNI): New.
1570 (CpuUnknownFlags): Add CpuMNI.
1572 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1574 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1575 (hpriv_reg_table): New table for hyperprivileged registers.
1576 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1579 2006-02-24 DJ Delorie <dj@redhat.com>
1581 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1582 (tc_gen_reloc): Don't define.
1583 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1584 (OPTION_LINKRELAX): New.
1585 (md_longopts): Add it.
1587 (md_parse_options): Set it.
1588 (md_assemble): Emit relaxation relocs as needed.
1589 (md_convert_frag): Emit relaxation relocs as needed.
1590 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1591 (m32c_apply_fix): New.
1592 (tc_gen_reloc): New.
1593 (m32c_force_relocation): Force out jump relocs when relaxing.
1594 (m32c_fix_adjustable): Return false if relaxing.
1596 2006-02-24 Paul Brook <paul@codesourcery.com>
1598 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1599 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1600 (struct asm_barrier_opt): Define.
1601 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1602 (parse_psr): Accept V7M psr names.
1603 (parse_barrier): New function.
1604 (enum operand_parse_code): Add OP_oBARRIER.
1605 (parse_operands): Implement OP_oBARRIER.
1606 (do_barrier): New function.
1607 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1608 (do_t_cpsi): Add V7M restrictions.
1609 (do_t_mrs, do_t_msr): Validate V7M variants.
1610 (md_assemble): Check for NULL variants.
1611 (v7m_psrs, barrier_opt_names): New tables.
1612 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1613 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1614 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1615 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1616 (struct cpu_arch_ver_table): Define.
1617 (cpu_arch_ver): New.
1618 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1619 Tag_CPU_arch_profile.
1620 * doc/c-arm.texi: Document new cpu and arch options.
1622 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1624 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1626 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1628 * config/tc-ia64.c: Update copyright years.
1630 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1632 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1635 2005-02-22 Paul Brook <paul@codesourcery.com>
1637 * config/tc-arm.c (do_pld): Remove incorrect write to
1639 (encode_thumb32_addr_mode): Use correct operand.
1641 2006-02-21 Paul Brook <paul@codesourcery.com>
1643 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1645 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1646 Anil Paranjape <anilp1@kpitcummins.com>
1647 Shilin Shakti <shilins@kpitcummins.com>
1649 * Makefile.am: Add xc16x related entry.
1650 * Makefile.in: Regenerate.
1651 * configure.in: Added xc16x related entry.
1652 * configure: Regenerate.
1653 * config/tc-xc16x.h: New file
1654 * config/tc-xc16x.c: New file
1655 * doc/c-xc16x.texi: New file for xc16x
1656 * doc/all.texi: Entry for xc16x
1657 * doc/Makefile.texi: Added c-xc16x.texi
1658 * NEWS: Announce the support for the new target.
1660 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1662 * configure.tgt: set emulation for mips-*-netbsd*
1664 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1666 * config.in: Rebuilt.
1668 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1670 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1671 from 1, not 0, in error messages.
1672 (md_assemble): Simplify special-case check for ENTRY instructions.
1673 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1674 operand in error message.
1676 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1678 * configure.tgt (arm-*-linux-gnueabi*): Change to
1681 2006-02-10 Nick Clifton <nickc@redhat.com>
1683 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1684 32-bit value is propagated into the upper bits of a 64-bit long.
1686 * config/tc-arc.c (init_opcode_tables): Fix cast.
1687 (arc_extoper, md_operand): Likewise.
1689 2006-02-09 David Heine <dlheine@tensilica.com>
1691 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1692 each relaxation step.
1694 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1696 * configure.in (CHECK_DECLS): Add vsnprintf.
1697 * configure: Regenerate.
1698 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1699 include/declare here, but...
1700 * as.h: Move code detecting VARARGS idiom to the top.
1701 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1702 (vsnprintf): Declare if not already declared.
1704 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1706 * as.c (close_output_file): New.
1707 (main): Register close_output_file with xatexit before
1708 dump_statistics. Don't call output_file_close.
1710 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1712 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1713 mcf5329_control_regs): New.
1714 (not_current_architecture, selected_arch, selected_cpu): New.
1715 (m68k_archs, m68k_extensions): New.
1716 (archs): Renamed to ...
1717 (m68k_cpus): ... here. Adjust.
1719 (md_pseudo_table): Add arch and cpu directives.
1720 (find_cf_chip, m68k_ip): Adjust table scanning.
1721 (no_68851, no_68881): Remove.
1722 (md_assemble): Lazily initialize.
1723 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1724 (md_init_after_args): Move functionality to m68k_init_arch.
1725 (mri_chip): Adjust table scanning.
1726 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1727 options with saner parsing.
1728 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1729 m68k_init_arch): New.
1730 (s_m68k_cpu, s_m68k_arch): New.
1731 (md_show_usage): Adjust.
1732 (m68k_elf_final_processing): Set CF EF flags.
1733 * config/tc-m68k.h (m68k_init_after_args): Remove.
1734 (tc_init_after_args): Remove.
1735 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1736 (M68k-Directives): Document .arch and .cpu directives.
1738 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1740 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1741 synonyms for equ and defl.
1742 (z80_cons_fix_new): New function.
1743 (emit_byte): Disallow relative jumps to absolute locations.
1744 (emit_data): Only handle defb, prototype changed, because defb is
1745 now handled as pseudo-op rather than an instruction.
1746 (instab): Entries for defb,defw,db,dw moved from here...
1747 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1748 Add entries for def24,def32,d24,d32.
1749 (md_assemble): Improved error handling.
1750 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1751 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1752 (z80_cons_fix_new): Declare.
1753 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1754 (def24,d24,def32,d32): New pseudo-ops.
1756 2006-02-02 Paul Brook <paul@codesourcery.com>
1758 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1760 2005-02-02 Paul Brook <paul@codesourcery.com>
1762 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1763 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1764 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1765 T2_OPCODE_RSB): Define.
1766 (thumb32_negate_data_op): New function.
1767 (md_apply_fix): Use it.
1769 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1771 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1773 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1774 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1776 (relaxation_requirements): Add pfinish_frag argument and use it to
1777 replace setting tinsn->record_fix fields.
1778 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1779 and vinsn_to_insnbuf. Remove references to record_fix and
1780 slot_sub_symbols fields.
1781 (xtensa_mark_narrow_branches): Delete unused code.
1782 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1784 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1786 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1787 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1788 of the record_fix field. Simplify error messages for unexpected
1790 (set_expr_symbol_offset_diff): Delete.
1792 2006-01-31 Paul Brook <paul@codesourcery.com>
1794 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1796 2006-01-31 Paul Brook <paul@codesourcery.com>
1797 Richard Earnshaw <rearnsha@arm.com>
1799 * config/tc-arm.c: Use arm_feature_set.
1800 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1801 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1802 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1805 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1806 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1807 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1808 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1810 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1811 (arm_opts): Move old cpu/arch options from here...
1812 (arm_legacy_opts): ... to here.
1813 (md_parse_option): Search arm_legacy_opts.
1814 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1815 (arm_float_abis, arm_eabis): Make const.
1817 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1819 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1821 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1823 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1824 in load immediate intruction.
1826 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1828 * config/bfin-parse.y (value_match): Use correct conversion
1829 specifications in template string for __FILE__ and __LINE__.
1833 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1835 Introduce TLS descriptors for i386 and x86_64.
1836 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1837 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1838 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1839 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1840 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1842 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1843 (lex_got): Handle @tlsdesc and @tlscall.
1844 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1846 2006-01-11 Nick Clifton <nickc@redhat.com>
1848 Fixes for building on 64-bit hosts:
1849 * config/tc-avr.c (mod_index): New union to allow conversion
1850 between pointers and integers.
1851 (md_begin, avr_ldi_expression): Use it.
1852 * config/tc-i370.c (md_assemble): Add cast for argument to print
1854 * config/tc-tic54x.c (subsym_substitute): Likewise.
1855 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1856 opindex field of fr_cgen structure into a pointer so that it can
1857 be stored in a frag.
1858 * config/tc-mn10300.c (md_assemble): Likewise.
1859 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1861 * config/tc-v850.c: Replace uses of (int) casts with correct
1864 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1867 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1869 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1872 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1873 a local-label reference.
1875 For older changes see ChangeLog-2005
1881 version-control: never