1 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
3 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
4 a directive saving VFP registers for ARMv6 or later.
5 (s_arm_unwind_save): Add parameter arch_v6 and call
6 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
8 (md_pseudo_table): Add entry for new "vsave" directive.
9 * doc/c-arm.texi: Correct error in example for "save"
10 directive (fstmdf -> fstmdx). Also document "vsave" directive.
12 2006-18-06 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
13 Anatoly Sokolov <aesok@post.ru>
15 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
16 and atmega644p devices. Rename atmega164/atmega324 devices to
17 atmega164p/atmega324p.
18 * doc/c-avr.texi: Document new mcu and arch options.
20 2006-06-17 Nick Clifton <nickc@redhat.com>
22 * config/tc-arm.c (enum parse_operand_result): Move outside of
23 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
25 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
27 * config/tc-i386.h (processor_type): New.
28 (arch_entry): Add type.
30 * config/tc-i386.c (cpu_arch_tune): New.
31 (cpu_arch_tune_flags): Likewise.
32 (cpu_arch_isa_flags): Likewise.
34 (set_cpu_arch): Also update cpu_arch_isa_flags.
35 (md_assemble): Update cpu_arch_isa_flags.
37 (OPTION_MTUNE): Likewise.
38 (md_longopts): Add -march= and -mtune=.
39 (md_parse_option): Support -march= and -mtune=.
40 (md_show_usage): Add -march=CPU/-mtune=CPU.
41 (i386_target_format): Also update cpu_arch_isa_flags,
42 cpu_arch_tune and cpu_arch_tune_flags.
44 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
46 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
48 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
50 * config/tc-arm.c (enum parse_operand_result): New.
51 (struct group_reloc_table_entry): New.
52 (enum group_reloc_type): New.
53 (group_reloc_table): New array.
54 (find_group_reloc_table_entry): New function.
55 (parse_shifter_operand_group_reloc): New function.
56 (parse_address_main): New function, incorporating code
57 from the old parse_address function. To be used via...
58 (parse_address): wrapper for parse_address_main; and
59 (parse_address_group_reloc): new function, likewise.
60 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
61 OP_ADDRGLDRS, OP_ADDRGLDC.
62 (parse_operands): Support for these new operand codes.
63 New macro po_misc_or_fail_no_backtrack.
64 (encode_arm_cp_address): Preserve group relocations.
65 (insns): Modify to use the above operand codes where group
66 relocations are permitted.
67 (md_apply_fix): Handle the group relocations
68 ALU_PC_G0_NC through LDC_SB_G2.
69 (tc_gen_reloc): Likewise.
70 (arm_force_relocation): Leave group relocations for the linker.
71 (arm_fix_adjustable): Likewise.
73 2006-06-15 Julian Brown <julian@codesourcery.com>
75 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
76 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
79 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
81 * config/tc-i386.c (process_suffix): Don't add rex64 for
84 2006-06-09 Thiemo Seufer <ths@mips.com>
86 * config/tc-mips.c (mips_ip): Maintain argument count.
88 2006-06-09 Alan Modra <amodra@bigpond.net.au>
90 * config/tc-iq2000.c: Include sb.h.
92 2006-06-08 Nigel Stephens <nigel@mips.com>
94 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
95 aliases for better compatibility with SGI tools.
97 2006-06-08 Alan Modra <amodra@bigpond.net.au>
99 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
100 * Makefile.am (GASLIBS): Expand @BFDLIB@.
102 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
103 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
104 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
106 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
107 * Makefile.in: Regenerate.
108 * doc/Makefile.in: Regenerate.
109 * configure: Regenerate.
111 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
113 * po/Make-in (pdf, ps): New dummy targets.
115 2006-06-07 Julian Brown <julian@codesourcery.com>
117 * config/tc-arm.c (stdarg.h): include.
118 (arm_it): Add uncond_value field. Add isvec and issingle to operand
120 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
121 REG_TYPE_NSDQ (single, double or quad vector reg).
122 (reg_expected_msgs): Update.
123 (BAD_FPU): Add macro for unsupported FPU instruction error.
124 (parse_neon_type): Support 'd' as an alias for .f64.
125 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
127 (parse_vfp_reg_list): Don't update first arg on error.
128 (parse_neon_mov): Support extra syntax for VFP moves.
129 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
130 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
131 (parse_operands): Support isvec, issingle operands fields, new parse
133 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
135 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
136 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
137 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
138 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
140 (neon_shape): Redefine in terms of above.
141 (neon_shape_class): New enumeration, table of shape classes.
142 (neon_shape_el): New enumeration. One element of a shape.
143 (neon_shape_el_size): Register widths of above, where appropriate.
144 (neon_shape_info): New struct. Info for shape table.
145 (neon_shape_tab): New array.
146 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
147 (neon_check_shape): Rewrite as...
148 (neon_select_shape): New function to classify instruction shapes,
149 driven by new table neon_shape_tab array.
150 (neon_quad): New function. Return 1 if shape should set Q flag in
151 instructions (or equivalent), 0 otherwise.
152 (type_chk_of_el_type): Support F64.
153 (el_type_of_type_chk): Likewise.
154 (neon_check_type): Add support for VFP type checking (VFP data
155 elements fill their containing registers).
156 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
157 in thumb mode for VFP instructions.
158 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
159 and encode the current instruction as if it were that opcode.
160 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
161 arguments, call function in PFN.
162 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
163 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
164 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
165 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
166 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
167 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
168 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
169 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
170 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
171 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
172 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
173 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
174 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
175 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
176 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
178 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
179 between VFP and Neon turns out to belong to Neon. Perform
180 architecture check and fill in condition field if appropriate.
181 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
182 (do_neon_cvt): Add support for VFP variants of instructions.
183 (neon_cvt_flavour): Extend to cover VFP conversions.
184 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
186 (do_neon_ldr_str): Handle single-precision VFP load/store.
187 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
188 NS_NULL not NS_IGNORE.
189 (opcode_tag): Add OT_csuffixF for operands which either take a
190 conditional suffix, or have 0xF in the condition field.
191 (md_assemble): Add support for OT_csuffixF.
192 (NCE): Replace macro with...
193 (NCE_tag, NCE, NCEF): New macros.
194 (nCE): Replace macro with...
195 (nCE_tag, nCE, nCEF): New macros.
196 (insns): Add support for VFP insns or VFP versions of insns msr,
197 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
198 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
199 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
200 VFP/Neon insns together.
202 2006-06-07 Alan Modra <amodra@bigpond.net.au>
203 Ladislav Michl <ladis@linux-mips.org>
205 * app.c: Don't include headers already included by as.h.
207 * atof-generic.c: Likewise.
209 * dwarf2dbg.c: Likewise.
211 * input-file.c: Likewise.
212 * input-scrub.c: Likewise.
214 * output-file.c: Likewise.
217 * config/bfin-lex.l: Likewise.
218 * config/obj-coff.h: Likewise.
219 * config/obj-elf.h: Likewise.
220 * config/obj-som.h: Likewise.
221 * config/tc-arc.c: Likewise.
222 * config/tc-arm.c: Likewise.
223 * config/tc-avr.c: Likewise.
224 * config/tc-bfin.c: Likewise.
225 * config/tc-cris.c: Likewise.
226 * config/tc-d10v.c: Likewise.
227 * config/tc-d30v.c: Likewise.
228 * config/tc-dlx.h: Likewise.
229 * config/tc-fr30.c: Likewise.
230 * config/tc-frv.c: Likewise.
231 * config/tc-h8300.c: Likewise.
232 * config/tc-hppa.c: Likewise.
233 * config/tc-i370.c: Likewise.
234 * config/tc-i860.c: Likewise.
235 * config/tc-i960.c: Likewise.
236 * config/tc-ip2k.c: Likewise.
237 * config/tc-iq2000.c: Likewise.
238 * config/tc-m32c.c: Likewise.
239 * config/tc-m32r.c: Likewise.
240 * config/tc-maxq.c: Likewise.
241 * config/tc-mcore.c: Likewise.
242 * config/tc-mips.c: Likewise.
243 * config/tc-mmix.c: Likewise.
244 * config/tc-mn10200.c: Likewise.
245 * config/tc-mn10300.c: Likewise.
246 * config/tc-msp430.c: Likewise.
247 * config/tc-mt.c: Likewise.
248 * config/tc-ns32k.c: Likewise.
249 * config/tc-openrisc.c: Likewise.
250 * config/tc-ppc.c: Likewise.
251 * config/tc-s390.c: Likewise.
252 * config/tc-sh.c: Likewise.
253 * config/tc-sh64.c: Likewise.
254 * config/tc-sparc.c: Likewise.
255 * config/tc-tic30.c: Likewise.
256 * config/tc-tic4x.c: Likewise.
257 * config/tc-tic54x.c: Likewise.
258 * config/tc-v850.c: Likewise.
259 * config/tc-vax.c: Likewise.
260 * config/tc-xc16x.c: Likewise.
261 * config/tc-xstormy16.c: Likewise.
262 * config/tc-xtensa.c: Likewise.
263 * config/tc-z80.c: Likewise.
264 * config/tc-z8k.c: Likewise.
265 * macro.h: Don't include sb.h or ansidecl.h.
266 * sb.h: Don't include stdio.h or ansidecl.h.
267 * cond.c: Include sb.h.
268 * itbl-lex.l: Include as.h instead of other system headers.
269 * itbl-parse.y: Likewise.
270 * itbl-ops.c: Similarly.
271 * itbl-ops.h: Don't include as.h or ansidecl.h.
272 * config/bfin-defs.h: Don't include bfd.h or as.h.
273 * config/bfin-parse.y: Include as.h instead of other system headers.
275 2006-06-06 Ben Elliston <bje@au.ibm.com>
276 Anton Blanchard <anton@samba.org>
278 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
279 (md_show_usage): Document it.
280 (ppc_setup_opcodes): Test power6 opcode flag bits.
281 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
283 2006-06-06 Thiemo Seufer <ths@mips.com>
284 Chao-ying Fu <fu@mips.com>
286 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
287 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
288 (macro_build): Update comment.
289 (mips_ip): Allow DSP64 instructions for MIPS64R2.
290 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
292 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
293 MIPS_CPU_ASE_MDMX flags for sb1.
295 2006-06-05 Thiemo Seufer <ths@mips.com>
297 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
299 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
300 (mips_ip): Make overflowed/underflowed constant arguments in DSP
301 and MT instructions a fatal error. Use INSERT_OPERAND where
302 appropriate. Improve warnings for break and wait code overflows.
303 Use symbolic constant of OP_MASK_COPZ.
304 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
306 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
308 * po/Make-in (top_builddir): Define.
310 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
312 * doc/Makefile.am (TEXI2DVI): Define.
313 * doc/Makefile.in: Regenerate.
314 * doc/c-arc.texi: Fix typo.
316 2006-06-01 Alan Modra <amodra@bigpond.net.au>
318 * config/obj-ieee.c: Delete.
319 * config/obj-ieee.h: Delete.
320 * Makefile.am (OBJ_FORMATS): Remove ieee.
321 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
322 (obj-ieee.o): Remove rule.
323 * Makefile.in: Regenerate.
324 * configure.in (atof): Remove tahoe.
325 (OBJ_MAYBE_IEEE): Don't define.
326 * configure: Regenerate.
327 * config.in: Regenerate.
328 * doc/Makefile.in: Regenerate.
329 * po/POTFILES.in: Regenerate.
331 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
333 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
334 and LIBINTL_DEP everywhere.
336 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
337 * acinclude.m4: Include new gettext macros.
338 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
339 Remove local code for po/Makefile.
340 * Makefile.in, configure, doc/Makefile.in: Regenerated.
342 2006-05-30 Nick Clifton <nickc@redhat.com>
344 * po/es.po: Updated Spanish translation.
346 2006-05-06 Denis Chertykov <denisc@overta.ru>
348 * doc/c-avr.texi: New file.
349 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
350 * doc/all.texi: Set AVR
351 * doc/as.texinfo: Include c-avr.texi
353 2006-05-28 Jie Zhang <jie.zhang@analog.com>
355 * config/bfin-parse.y (check_macfunc): Loose the condition of
356 calling check_multiply_halfregs ().
358 2006-05-25 Jie Zhang <jie.zhang@analog.com>
360 * config/bfin-parse.y (asm_1): Better check and deal with
361 vector and scalar Multiply 16-Bit Operands instructions.
363 2006-05-24 Nick Clifton <nickc@redhat.com>
365 * config/tc-hppa.c: Convert to ISO C90 format.
366 * config/tc-hppa.h: Likewise.
368 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
369 Randolph Chung <randolph@tausq.org>
371 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
372 is_tls_ieoff, is_tls_leoff): Define.
373 (fix_new_hppa): Handle TLS.
374 (cons_fix_new_hppa): Likewise.
376 (md_apply_fix): Handle TLS relocs.
377 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
379 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
381 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
383 2006-05-23 Thiemo Seufer <ths@mips.com>
384 David Ung <davidu@mips.com>
385 Nigel Stephens <nigel@mips.com>
388 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
389 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
390 ISA_HAS_MXHC1): New macros.
391 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
392 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
393 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
394 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
395 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
396 (mips_after_parse_args): Change default handling of float register
397 size to account for 32bit code with 64bit FP. Better sanity checking
398 of ISA/ASE/ABI option combinations.
399 (s_mipsset): Support switching of GPR and FPR sizes via
400 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
402 (mips_elf_final_processing): We should record the use of 64bit FP
403 registers in 32bit code but we don't, because ELF header flags are
405 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
406 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
407 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
408 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
409 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
410 missing -march options. Document .set arch=CPU. Move .set smartmips
411 to ASE page. Use @code for .set FOO examples.
413 2006-05-23 Jie Zhang <jie.zhang@analog.com>
415 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
418 2006-05-23 Jie Zhang <jie.zhang@analog.com>
420 * config/bfin-defs.h (bfin_equals): Remove declaration.
421 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
422 * config/tc-bfin.c (bfin_name_is_register): Remove.
423 (bfin_equals): Remove.
424 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
425 (bfin_name_is_register): Remove declaration.
427 2006-05-19 Thiemo Seufer <ths@mips.com>
428 Nigel Stephens <nigel@mips.com>
430 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
431 (mips_oddfpreg_ok): New function.
434 2006-05-19 Thiemo Seufer <ths@mips.com>
435 David Ung <davidu@mips.com>
437 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
438 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
439 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
440 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
441 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
442 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
443 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
444 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
445 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
446 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
447 reg_names_o32, reg_names_n32n64): Define register classes.
448 (reg_lookup): New function, use register classes.
449 (md_begin): Reserve register names in the symbol table. Simplify
451 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
453 (mips16_ip): Use reg_lookup.
454 (tc_get_register): Likewise.
455 (tc_mips_regname_to_dw2regnum): New function.
457 2006-05-19 Thiemo Seufer <ths@mips.com>
459 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
460 Un-constify string argument.
461 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
463 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
465 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
467 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
469 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
471 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
474 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
476 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
477 cfloat/m68881 to correct architecture before using it.
479 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
481 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
484 2006-05-15 Paul Brook <paul@codesourcery.com>
486 * config/tc-arm.c (arm_adjust_symtab): Use
487 bfd_is_arm_special_symbol_name.
489 2006-05-15 Bob Wilson <bob.wilson@acm.org>
491 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
492 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
493 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
494 Handle errors from calls to xtensa_opcode_is_* functions.
496 2006-05-14 Thiemo Seufer <ths@mips.com>
498 * config/tc-mips.c (macro_build): Test for currently active
500 (mips16_ip): Reject invalid opcodes.
502 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
504 * doc/as.texinfo: Rename "Index" to "AS Index",
505 and "ABORT" to "ABORT (COFF)".
507 2006-05-11 Paul Brook <paul@codesourcery.com>
509 * config/tc-arm.c (parse_half): New function.
510 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
511 (parse_operands): Ditto.
512 (do_mov16): Reject invalid relocations.
513 (do_t_mov16): Ditto. Use Thumb reloc numbers.
514 (insns): Replace Iffff with HALF.
515 (md_apply_fix): Add MOVW and MOVT relocs.
516 (tc_gen_reloc): Ditto.
517 * doc/c-arm.texi: Document relocation operators
519 2006-05-11 Paul Brook <paul@codesourcery.com>
521 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
523 2006-05-11 Thiemo Seufer <ths@mips.com>
525 * config/tc-mips.c (append_insn): Don't check the range of j or
528 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
530 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
531 relocs against external symbols for WinCE targets.
532 (md_apply_fix): Likewise.
534 2006-05-09 David Ung <davidu@mips.com>
536 * config/tc-mips.c (append_insn): Only warn about an out-of-range
539 2006-05-09 Nick Clifton <nickc@redhat.com>
541 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
542 against symbols which are not going to be placed into the symbol
545 2006-05-09 Ben Elliston <bje@au.ibm.com>
547 * expr.c (operand): Remove `if (0 && ..)' statement and
548 subsequently unused target_op label. Collapse `if (1 || ..)'
550 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
551 separately above the switch.
553 2006-05-08 Nick Clifton <nickc@redhat.com>
556 * config/tc-msp430.c (line_separator_character): Define as |.
558 2006-05-08 Thiemo Seufer <ths@mips.com>
559 Nigel Stephens <nigel@mips.com>
560 David Ung <davidu@mips.com>
562 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
563 (mips_opts): Likewise.
564 (file_ase_smartmips): New variable.
565 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
566 (macro_build): Handle SmartMIPS instructions.
568 (md_longopts): Add argument handling for smartmips.
569 (md_parse_options, mips_after_parse_args): Likewise.
570 (s_mipsset): Add .set smartmips support.
571 (md_show_usage): Document -msmartmips/-mno-smartmips.
572 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
574 * doc/c-mips.texi: Likewise.
576 2006-05-08 Alan Modra <amodra@bigpond.net.au>
578 * write.c (relax_segment): Add pass count arg. Don't error on
579 negative org/space on first two passes.
580 (relax_seg_info): New struct.
581 (relax_seg, write_object_file): Adjust.
582 * write.h (relax_segment): Update prototype.
584 2006-05-05 Julian Brown <julian@codesourcery.com>
586 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
588 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
589 architecture version checks.
590 (insns): Allow overlapping instructions to be used in VFP mode.
592 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
595 * config/obj-elf.c (obj_elf_change_section): Allow user
596 specified SHF_ALPHA_GPREL.
598 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
600 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
601 for PMEM related expressions.
603 2006-05-05 Nick Clifton <nickc@redhat.com>
606 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
607 insertion of a directory separator character into a string at a
608 given offset. Uses heuristics to decide when to use a backslash
609 character rather than a forward-slash character.
610 (dwarf2_directive_loc): Use the macro.
611 (out_debug_info): Likewise.
613 2006-05-05 Thiemo Seufer <ths@mips.com>
614 David Ung <davidu@mips.com>
616 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
618 (macro): Add new case M_CACHE_AB.
620 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
622 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
623 (opcode_lookup): Issue a warning for opcode with
624 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
625 identical to OT_cinfix3.
626 (TxC3w, TC3w, tC3w): New.
627 (insns): Use tC3w and TC3w for comparison instructions with
630 2006-05-04 Alan Modra <amodra@bigpond.net.au>
632 * subsegs.h (struct frchain): Delete frch_seg.
633 (frchain_root): Delete.
634 (seg_info): Define as macro.
635 * subsegs.c (frchain_root): Delete.
636 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
637 (subsegs_begin, subseg_change): Adjust for above.
638 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
639 rather than to one big list.
640 (subseg_get): Don't special case abs, und sections.
641 (subseg_new, subseg_force_new): Don't set frchainP here.
643 (subsegs_print_statistics): Adjust frag chain control list traversal.
644 * debug.c (dmp_frags): Likewise.
645 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
646 at frchain_root. Make use of known frchain ordering.
647 (last_frag_for_seg): Likewise.
648 (get_frag_fix): Likewise. Add seg param.
649 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
650 * write.c (chain_frchains_together_1): Adjust for struct frchain.
651 (SUB_SEGMENT_ALIGN): Likewise.
652 (subsegs_finish): Adjust frchain list traversal.
653 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
654 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
655 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
656 (xtensa_fix_b_j_loop_end_frags): Likewise.
657 (xtensa_fix_close_loop_end_frags): Likewise.
658 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
659 (retrieve_segment_info): Delete frch_seg initialisation.
661 2006-05-03 Alan Modra <amodra@bigpond.net.au>
663 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
664 * config/obj-elf.h (obj_sec_set_private_data): Delete.
665 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
666 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
668 2006-05-02 Joseph Myers <joseph@codesourcery.com>
670 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
672 (md_apply_fix3): Multiply offset by 4 here for
673 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
675 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
676 Jan Beulich <jbeulich@novell.com>
678 * config/tc-i386.c (output_invalid_buf): Change size for
680 * config/tc-tic30.c (output_invalid_buf): Likewise.
682 * config/tc-i386.c (output_invalid): Cast none-ascii char to
684 * config/tc-tic30.c (output_invalid): Likewise.
686 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
688 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
689 (TEXI2POD): Use AM_MAKEINFOFLAGS.
690 (asconfig.texi): Don't set top_srcdir.
691 * doc/as.texinfo: Don't use top_srcdir.
692 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
694 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
696 * config/tc-i386.c (output_invalid_buf): Change size to 16.
697 * config/tc-tic30.c (output_invalid_buf): Likewise.
699 * config/tc-i386.c (output_invalid): Use snprintf instead of
701 * config/tc-ia64.c (declare_register_set): Likewise.
702 (emit_one_bundle): Likewise.
703 (check_dependencies): Likewise.
704 * config/tc-tic30.c (output_invalid): Likewise.
706 2006-05-02 Paul Brook <paul@codesourcery.com>
708 * config/tc-arm.c (arm_optimize_expr): New function.
709 * config/tc-arm.h (md_optimize_expr): Define
710 (arm_optimize_expr): Add prototype.
711 (TC_FORCE_RELOCATION_SUB_SAME): Define.
713 2006-05-02 Ben Elliston <bje@au.ibm.com>
715 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
718 * sb.h (sb_list_vector): Move to sb.c.
719 * sb.c (free_list): Use type of sb_list_vector directly.
720 (sb_build): Fix off-by-one error in assertion about `size'.
722 2006-05-01 Ben Elliston <bje@au.ibm.com>
724 * listing.c (listing_listing): Remove useless loop.
725 * macro.c (macro_expand): Remove is_positional local variable.
726 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
727 and simplify surrounding expressions, where possible.
728 (assign_symbol): Likewise.
729 (s_weakref): Likewise.
730 * symbols.c (colon): Likewise.
732 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
734 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
736 2006-04-30 Thiemo Seufer <ths@mips.com>
737 David Ung <davidu@mips.com>
739 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
740 (mips_immed): New table that records various handling of udi
741 instruction patterns.
742 (mips_ip): Adds udi handling.
744 2006-04-28 Alan Modra <amodra@bigpond.net.au>
746 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
747 of list rather than beginning.
749 2006-04-26 Julian Brown <julian@codesourcery.com>
751 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
752 (is_quarter_float): Rename from above. Simplify slightly.
753 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
755 (parse_neon_mov): Parse floating-point constants.
756 (neon_qfloat_bits): Fix encoding.
757 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
758 preference to integer encoding when using the F32 type.
760 2006-04-26 Julian Brown <julian@codesourcery.com>
762 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
763 zero-initialising structures containing it will lead to invalid types).
764 (arm_it): Add vectype to each operand.
765 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
767 (neon_typed_alias): New structure. Extra information for typed
769 (reg_entry): Add neon type info field.
770 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
771 Break out alternative syntax for coprocessor registers, etc. into...
772 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
773 out from arm_reg_parse.
774 (parse_neon_type): Move. Return SUCCESS/FAIL.
775 (first_error): New function. Call to ensure first error which occurs is
777 (parse_neon_operand_type): Parse exactly one type.
778 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
779 (parse_typed_reg_or_scalar): New function. Handle core of both
780 arm_typed_reg_parse and parse_scalar.
781 (arm_typed_reg_parse): Parse a register with an optional type.
782 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
784 (parse_scalar): Parse a Neon scalar with optional type.
785 (parse_reg_list): Use first_error.
786 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
787 (neon_alias_types_same): New function. Return true if two (alias) types
789 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
791 (insert_reg_alias): Return new reg_entry not void.
792 (insert_neon_reg_alias): New function. Insert type/index information as
793 well as register for alias.
794 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
795 make typed register aliases accordingly.
796 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
798 (s_unreq): Delete type information if present.
799 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
800 (s_arm_unwind_save_mmxwcg): Likewise.
801 (s_arm_unwind_movsp): Likewise.
802 (s_arm_unwind_setfp): Likewise.
803 (parse_shift): Likewise.
804 (parse_shifter_operand): Likewise.
805 (parse_address): Likewise.
806 (parse_tb): Likewise.
807 (tc_arm_regname_to_dw2regnum): Likewise.
808 (md_pseudo_table): Add dn, qn.
809 (parse_neon_mov): Handle typed operands.
810 (parse_operands): Likewise.
811 (neon_type_mask): Add N_SIZ.
812 (N_ALLMODS): New macro.
813 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
814 (el_type_of_type_chk): Add some safeguards.
815 (modify_types_allowed): Fix logic bug.
816 (neon_check_type): Handle operands with types.
817 (neon_three_same): Remove redundant optional arg handling.
818 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
819 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
820 (do_neon_step): Adjust accordingly.
821 (neon_cmode_for_logic_imm): Use first_error.
822 (do_neon_bitfield): Call neon_check_type.
823 (neon_dyadic): Rename to...
824 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
825 to allow modification of type of the destination.
826 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
827 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
828 (do_neon_compare): Make destination be an untyped bitfield.
829 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
830 (neon_mul_mac): Return early in case of errors.
831 (neon_move_immediate): Use first_error.
832 (neon_mac_reg_scalar_long): Fix type to include scalar.
833 (do_neon_dup): Likewise.
834 (do_neon_mov): Likewise (in several places).
835 (do_neon_tbl_tbx): Fix type.
836 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
837 (do_neon_ld_dup): Exit early in case of errors and/or use
839 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
840 Handle .dn/.qn directives.
841 (REGDEF): Add zero for reg_entry neon field.
843 2006-04-26 Julian Brown <julian@codesourcery.com>
845 * config/tc-arm.c (limits.h): Include.
846 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
847 (fpu_vfp_v3_or_neon_ext): Declare constants.
848 (neon_el_type): New enumeration of types for Neon vector elements.
849 (neon_type_el): New struct. Define type and size of a vector element.
850 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
852 (neon_type): Define struct. The type of an instruction.
853 (arm_it): Add 'vectype' for the current instruction.
854 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
855 (vfp_sp_reg_pos): Rename to...
856 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
858 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
859 (Neon D or Q register).
860 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
862 (GE_OPT_PREFIX_BIG): Define constant, for use in...
863 (my_get_expression): Allow above constant as argument to accept
864 64-bit constants with optional prefix.
865 (arm_reg_parse): Add extra argument to return the specific type of
866 register in when either a D or Q register (REG_TYPE_NDQ) is
867 requested. Can be NULL.
868 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
869 (parse_reg_list): Update for new arm_reg_parse args.
870 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
871 (parse_neon_el_struct_list): New function. Parse element/structure
872 register lists for VLD<n>/VST<n> instructions.
873 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
874 (s_arm_unwind_save_mmxwr): Likewise.
875 (s_arm_unwind_save_mmxwcg): Likewise.
876 (s_arm_unwind_movsp): Likewise.
877 (s_arm_unwind_setfp): Likewise.
878 (parse_big_immediate): New function. Parse an immediate, which may be
879 64 bits wide. Put results in inst.operands[i].
880 (parse_shift): Update for new arm_reg_parse args.
881 (parse_address): Likewise. Add parsing of alignment specifiers.
882 (parse_neon_mov): Parse the operands of a VMOV instruction.
883 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
884 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
885 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
886 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
887 (parse_operands): Handle new codes above.
888 (encode_arm_vfp_sp_reg): Rename to...
889 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
890 selected VFP version only supports D0-D15.
891 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
892 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
893 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
894 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
895 encode_arm_vfp_reg name, and allow 32 D regs.
896 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
897 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
899 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
900 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
901 constant-load and conversion insns introduced with VFPv3.
902 (neon_tab_entry): New struct.
903 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
904 those which are the targets of pseudo-instructions.
905 (neon_opc): Enumerate opcodes, use as indices into...
906 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
907 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
908 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
909 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
911 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
913 (neon_type_mask): New. Compact type representation for type checking.
914 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
915 permitted type combinations.
916 (N_IGNORE_TYPE): New macro.
917 (neon_check_shape): New function. Check an instruction shape for
918 multiple alternatives. Return the specific shape for the current
920 (neon_modify_type_size): New function. Modify a vector type and size,
921 depending on the bit mask in argument 1.
922 (neon_type_promote): New function. Convert a given "key" type (of an
923 operand) into the correct type for a different operand, based on a bit
925 (type_chk_of_el_type): New function. Convert a type and size into the
926 compact representation used for type checking.
927 (el_type_of_type_ckh): New function. Reverse of above (only when a
928 single bit is set in the bit mask).
929 (modify_types_allowed): New function. Alter a mask of allowed types
930 based on a bit mask of modifications.
931 (neon_check_type): New function. Check the type of the current
932 instruction against the variable argument list. The "key" type of the
933 instruction is returned.
934 (neon_dp_fixup): New function. Fill in and modify instruction bits for
935 a Neon data-processing instruction depending on whether we're in ARM
936 mode or Thumb-2 mode.
937 (neon_logbits): New function.
938 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
939 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
940 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
941 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
942 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
943 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
944 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
945 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
946 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
947 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
948 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
949 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
950 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
951 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
952 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
953 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
954 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
955 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
956 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
957 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
958 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
959 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
960 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
961 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
962 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
964 (parse_neon_type): New function. Parse Neon type specifier.
965 (opcode_lookup): Allow parsing of Neon type specifiers.
966 (REGNUM2, REGSETH, REGSET2): New macros.
967 (reg_names): Add new VFPv3 and Neon registers.
968 (NUF, nUF, NCE, nCE): New macros for opcode table.
969 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
970 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
971 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
972 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
973 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
974 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
975 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
976 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
977 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
978 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
979 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
980 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
981 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
982 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
984 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
985 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
986 (arm_option_cpu_value): Add vfp3 and neon.
987 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
990 2006-04-25 Bob Wilson <bob.wilson@acm.org>
992 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
993 syntax instead of hardcoded opcodes with ".w18" suffixes.
994 (wide_branch_opcode): New.
995 (build_transition): Use it to check for wide branch opcodes with
996 either ".w18" or ".w15" suffixes.
998 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1000 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1001 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1002 frag's is_literal flag.
1004 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1006 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1008 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1010 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1011 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1012 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1013 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1014 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1016 2005-04-20 Paul Brook <paul@codesourcery.com>
1018 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1020 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1022 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1024 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1025 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1026 Make some cpus unsupported on ELF. Run "make dep-am".
1027 * Makefile.in: Regenerate.
1029 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1031 * configure.in (--enable-targets): Indent help message.
1032 * configure: Regenerate.
1034 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1037 * config/tc-i386.c (i386_immediate): Check illegal immediate
1040 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1042 * config/tc-i386.c: Formatting.
1043 (output_disp, output_imm): ISO C90 params.
1045 * frags.c (frag_offset_fixed_p): Constify args.
1046 * frags.h (frag_offset_fixed_p): Ditto.
1048 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1049 (COFF_MAGIC): Delete.
1051 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1053 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1055 * po/POTFILES.in: Regenerated.
1057 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1059 * doc/as.texinfo: Mention that some .type syntaxes are not
1060 supported on all architectures.
1062 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1064 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1065 instructions when such transformations have been disabled.
1067 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1069 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1070 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1071 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1072 decoding the loop instructions. Remove current_offset variable.
1073 (xtensa_fix_short_loop_frags): Likewise.
1074 (min_bytes_to_other_loop_end): Remove current_offset argument.
1076 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1078 * config/tc-z80.c (z80_optimize_expr): Removed.
1079 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1081 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1083 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1084 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1085 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1086 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1087 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1088 at90can64, at90usb646, at90usb647, at90usb1286 and
1090 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1092 2006-04-07 Paul Brook <paul@codesourcery.com>
1094 * config/tc-arm.c (parse_operands): Set default error message.
1096 2006-04-07 Paul Brook <paul@codesourcery.com>
1098 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1100 2006-04-07 Paul Brook <paul@codesourcery.com>
1102 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1104 2006-04-07 Paul Brook <paul@codesourcery.com>
1106 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1107 (move_or_literal_pool): Handle Thumb-2 instructions.
1108 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1110 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1113 * config/tc-i386.c (match_template): Move 64-bit operand tests
1116 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1118 * po/Make-in: Add install-html target.
1119 * Makefile.am: Add install-html and install-html-recursive targets.
1120 * Makefile.in: Regenerate.
1121 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1122 * configure: Regenerate.
1123 * doc/Makefile.am: Add install-html and install-html-am targets.
1124 * doc/Makefile.in: Regenerate.
1126 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1128 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1131 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1132 Daniel Jacobowitz <dan@codesourcery.com>
1134 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1135 (GOTT_BASE, GOTT_INDEX): New.
1136 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1137 GOTT_INDEX when generating VxWorks PIC.
1138 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1139 use the generic *-*-vxworks* stanza instead.
1141 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1144 * frags.c (frag_offset_fixed_p): New function.
1145 * frags.h (frag_offset_fixed_p): Declare.
1146 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1147 (resolve_expression): Likewise.
1149 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1151 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1152 of the same length but different numbers of slots.
1154 2006-03-30 Andreas Schwab <schwab@suse.de>
1156 * configure.in: Fix help string for --enable-targets option.
1157 * configure: Regenerate.
1159 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1161 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1162 (m68k_ip): ... here. Use for all chips. Protect against buffer
1163 overrun and avoid excessive copying.
1165 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1166 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1167 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1168 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1169 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1170 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1171 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1172 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1173 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1174 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1175 (struct m68k_cpu): Change chip field to control_regs.
1176 (current_chip): Remove.
1177 (control_regs): New.
1178 (m68k_archs, m68k_extensions): Adjust.
1179 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1180 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1181 (find_cf_chip): Reimplement for new organization of cpu table.
1182 (select_control_regs): Remove.
1184 (struct save_opts): Save control regs, not chip.
1185 (s_save, s_restore): Adjust.
1186 (m68k_lookup_cpu): Give deprecated warning when necessary.
1187 (m68k_init_arch): Adjust.
1188 (md_show_usage): Adjust for new cpu table organization.
1190 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1192 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1193 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1194 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1196 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1197 (any_gotrel): New rule.
1198 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1199 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1201 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1202 (bfin_pic_ptr): New function.
1203 (md_pseudo_table): Add it for ".picptr".
1204 (OPTION_FDPIC): New macro.
1205 (md_longopts): Add -mfdpic.
1206 (md_parse_option): Handle it.
1207 (md_begin): Set BFD flags.
1208 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1209 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1211 * Makefile.am (bfin-parse.o): Update dependencies.
1212 (DEPTC_bfin_elf): Likewise.
1213 * Makefile.in: Regenerate.
1215 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1217 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1218 mcfemac instead of mcfmac.
1220 2006-03-23 Michael Matz <matz@suse.de>
1222 * config/tc-i386.c (type_names): Correct placement of 'static'.
1223 (reloc): Map some more relocs to their 64 bit counterpart when
1225 (output_insn): Work around breakage if DEBUG386 is defined.
1226 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1227 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1228 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1229 different from i386.
1230 (output_imm): Ditto.
1231 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1233 (md_convert_frag): Jumps can now be larger than 2GB away, error
1235 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1236 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1238 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1239 Daniel Jacobowitz <dan@codesourcery.com>
1240 Phil Edwards <phil@codesourcery.com>
1241 Zack Weinberg <zack@codesourcery.com>
1242 Mark Mitchell <mark@codesourcery.com>
1243 Nathan Sidwell <nathan@codesourcery.com>
1245 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1246 (md_begin): Complain about -G being used for PIC. Don't change
1247 the text, data and bss alignments on VxWorks.
1248 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1249 generating VxWorks PIC.
1250 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1251 (macro): Likewise, but do not treat la $25 specially for
1252 VxWorks PIC, and do not handle jal.
1253 (OPTION_MVXWORKS_PIC): New macro.
1254 (md_longopts): Add -mvxworks-pic.
1255 (md_parse_option): Don't complain about using PIC and -G together here.
1256 Handle OPTION_MVXWORKS_PIC.
1257 (md_estimate_size_before_relax): Always use the first relaxation
1258 sequence on VxWorks.
1259 * config/tc-mips.h (VXWORKS_PIC): New.
1261 2006-03-21 Paul Brook <paul@codesourcery.com>
1263 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1265 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1267 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1268 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1269 (get_loop_align_size): New.
1270 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1271 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1272 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1273 (get_noop_aligned_address): Use get_loop_align_size.
1274 (get_aligned_diff): Likewise.
1276 2006-03-21 Paul Brook <paul@codesourcery.com>
1278 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1280 2006-03-20 Paul Brook <paul@codesourcery.com>
1282 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1283 (do_t_branch): Encode branches inside IT blocks as unconditional.
1284 (do_t_cps): New function.
1285 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1286 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1287 (opcode_lookup): Allow conditional suffixes on all instructions in
1289 (md_assemble): Advance condexec state before checking for errors.
1290 (insns): Use do_t_cps.
1292 2006-03-20 Paul Brook <paul@codesourcery.com>
1294 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1295 outputting the insn.
1297 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1299 * config/tc-vax.c: Update copyright year.
1300 * config/tc-vax.h: Likewise.
1302 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1304 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1306 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1308 2006-03-17 Paul Brook <paul@codesourcery.com>
1310 * config/tc-arm.c (insns): Add ldm and stm.
1312 2006-03-17 Ben Elliston <bje@au.ibm.com>
1315 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1317 2006-03-16 Paul Brook <paul@codesourcery.com>
1319 * config/tc-arm.c (insns): Add "svc".
1321 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1323 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1324 flag and avoid double underscore prefixes.
1326 2006-03-10 Paul Brook <paul@codesourcery.com>
1328 * config/tc-arm.c (md_begin): Handle EABIv5.
1329 (arm_eabis): Add EF_ARM_EABI_VER5.
1330 * doc/c-arm.texi: Document -meabi=5.
1332 2006-03-10 Ben Elliston <bje@au.ibm.com>
1334 * app.c (do_scrub_chars): Simplify string handling.
1336 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1337 Daniel Jacobowitz <dan@codesourcery.com>
1338 Zack Weinberg <zack@codesourcery.com>
1339 Nathan Sidwell <nathan@codesourcery.com>
1340 Paul Brook <paul@codesourcery.com>
1341 Ricardo Anguiano <anguiano@codesourcery.com>
1342 Phil Edwards <phil@codesourcery.com>
1344 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1345 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1347 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1348 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1349 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1351 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1353 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1354 even when using the text-section-literals option.
1356 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1358 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1360 (m68k_ip): <case 'J'> Check we have some control regs.
1361 (md_parse_option): Allow raw arch switch.
1362 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1363 whether 68881 or cfloat was meant by -mfloat.
1364 (md_show_usage): Adjust extension display.
1365 (m68k_elf_final_processing): Adjust.
1367 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1369 * config/tc-avr.c (avr_mod_hash_value): New function.
1370 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1371 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1372 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1373 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1375 (tc_gen_reloc): Handle substractions of symbols, if possible do
1376 fixups, abort otherwise.
1377 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1378 tc_fix_adjustable): Define.
1380 2006-03-02 James E Wilson <wilson@specifix.com>
1382 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1383 change the template, then clear md.slot[curr].end_of_insn_group.
1385 2006-02-28 Jan Beulich <jbeulich@novell.com>
1387 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1389 2006-02-28 Jan Beulich <jbeulich@novell.com>
1392 * macro.c (getstring): Don't treat parentheses special anymore.
1393 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1394 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1397 2006-02-28 Mat <mat@csail.mit.edu>
1399 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1401 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1403 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1405 (CFI_signal_frame): Define.
1406 (cfi_pseudo_table): Add .cfi_signal_frame.
1407 (dot_cfi): Handle CFI_signal_frame.
1408 (output_cie): Handle cie->signal_frame.
1409 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1410 different. Copy signal_frame from FDE to newly created CIE.
1411 * doc/as.texinfo: Document .cfi_signal_frame.
1413 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1415 * doc/Makefile.am: Add html target.
1416 * doc/Makefile.in: Regenerate.
1417 * po/Make-in: Add html target.
1419 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1421 * config/tc-i386.c (output_insn): Support Intel Merom New
1424 * config/tc-i386.h (CpuMNI): New.
1425 (CpuUnknownFlags): Add CpuMNI.
1427 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1429 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1430 (hpriv_reg_table): New table for hyperprivileged registers.
1431 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1434 2006-02-24 DJ Delorie <dj@redhat.com>
1436 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1437 (tc_gen_reloc): Don't define.
1438 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1439 (OPTION_LINKRELAX): New.
1440 (md_longopts): Add it.
1442 (md_parse_options): Set it.
1443 (md_assemble): Emit relaxation relocs as needed.
1444 (md_convert_frag): Emit relaxation relocs as needed.
1445 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1446 (m32c_apply_fix): New.
1447 (tc_gen_reloc): New.
1448 (m32c_force_relocation): Force out jump relocs when relaxing.
1449 (m32c_fix_adjustable): Return false if relaxing.
1451 2006-02-24 Paul Brook <paul@codesourcery.com>
1453 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1454 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1455 (struct asm_barrier_opt): Define.
1456 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1457 (parse_psr): Accept V7M psr names.
1458 (parse_barrier): New function.
1459 (enum operand_parse_code): Add OP_oBARRIER.
1460 (parse_operands): Implement OP_oBARRIER.
1461 (do_barrier): New function.
1462 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1463 (do_t_cpsi): Add V7M restrictions.
1464 (do_t_mrs, do_t_msr): Validate V7M variants.
1465 (md_assemble): Check for NULL variants.
1466 (v7m_psrs, barrier_opt_names): New tables.
1467 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1468 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1469 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1470 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1471 (struct cpu_arch_ver_table): Define.
1472 (cpu_arch_ver): New.
1473 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1474 Tag_CPU_arch_profile.
1475 * doc/c-arm.texi: Document new cpu and arch options.
1477 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1479 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1481 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1483 * config/tc-ia64.c: Update copyright years.
1485 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1487 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1490 2005-02-22 Paul Brook <paul@codesourcery.com>
1492 * config/tc-arm.c (do_pld): Remove incorrect write to
1494 (encode_thumb32_addr_mode): Use correct operand.
1496 2006-02-21 Paul Brook <paul@codesourcery.com>
1498 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1500 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1501 Anil Paranjape <anilp1@kpitcummins.com>
1502 Shilin Shakti <shilins@kpitcummins.com>
1504 * Makefile.am: Add xc16x related entry.
1505 * Makefile.in: Regenerate.
1506 * configure.in: Added xc16x related entry.
1507 * configure: Regenerate.
1508 * config/tc-xc16x.h: New file
1509 * config/tc-xc16x.c: New file
1510 * doc/c-xc16x.texi: New file for xc16x
1511 * doc/all.texi: Entry for xc16x
1512 * doc/Makefile.texi: Added c-xc16x.texi
1513 * NEWS: Announce the support for the new target.
1515 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1517 * configure.tgt: set emulation for mips-*-netbsd*
1519 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1521 * config.in: Rebuilt.
1523 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1525 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1526 from 1, not 0, in error messages.
1527 (md_assemble): Simplify special-case check for ENTRY instructions.
1528 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1529 operand in error message.
1531 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1533 * configure.tgt (arm-*-linux-gnueabi*): Change to
1536 2006-02-10 Nick Clifton <nickc@redhat.com>
1538 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1539 32-bit value is propagated into the upper bits of a 64-bit long.
1541 * config/tc-arc.c (init_opcode_tables): Fix cast.
1542 (arc_extoper, md_operand): Likewise.
1544 2006-02-09 David Heine <dlheine@tensilica.com>
1546 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1547 each relaxation step.
1549 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1551 * configure.in (CHECK_DECLS): Add vsnprintf.
1552 * configure: Regenerate.
1553 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1554 include/declare here, but...
1555 * as.h: Move code detecting VARARGS idiom to the top.
1556 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1557 (vsnprintf): Declare if not already declared.
1559 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1561 * as.c (close_output_file): New.
1562 (main): Register close_output_file with xatexit before
1563 dump_statistics. Don't call output_file_close.
1565 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1567 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1568 mcf5329_control_regs): New.
1569 (not_current_architecture, selected_arch, selected_cpu): New.
1570 (m68k_archs, m68k_extensions): New.
1571 (archs): Renamed to ...
1572 (m68k_cpus): ... here. Adjust.
1574 (md_pseudo_table): Add arch and cpu directives.
1575 (find_cf_chip, m68k_ip): Adjust table scanning.
1576 (no_68851, no_68881): Remove.
1577 (md_assemble): Lazily initialize.
1578 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1579 (md_init_after_args): Move functionality to m68k_init_arch.
1580 (mri_chip): Adjust table scanning.
1581 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1582 options with saner parsing.
1583 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1584 m68k_init_arch): New.
1585 (s_m68k_cpu, s_m68k_arch): New.
1586 (md_show_usage): Adjust.
1587 (m68k_elf_final_processing): Set CF EF flags.
1588 * config/tc-m68k.h (m68k_init_after_args): Remove.
1589 (tc_init_after_args): Remove.
1590 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1591 (M68k-Directives): Document .arch and .cpu directives.
1593 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1595 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1596 synonyms for equ and defl.
1597 (z80_cons_fix_new): New function.
1598 (emit_byte): Disallow relative jumps to absolute locations.
1599 (emit_data): Only handle defb, prototype changed, because defb is
1600 now handled as pseudo-op rather than an instruction.
1601 (instab): Entries for defb,defw,db,dw moved from here...
1602 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1603 Add entries for def24,def32,d24,d32.
1604 (md_assemble): Improved error handling.
1605 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1606 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1607 (z80_cons_fix_new): Declare.
1608 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1609 (def24,d24,def32,d32): New pseudo-ops.
1611 2006-02-02 Paul Brook <paul@codesourcery.com>
1613 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1615 2005-02-02 Paul Brook <paul@codesourcery.com>
1617 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1618 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1619 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1620 T2_OPCODE_RSB): Define.
1621 (thumb32_negate_data_op): New function.
1622 (md_apply_fix): Use it.
1624 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1626 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1628 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1629 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1631 (relaxation_requirements): Add pfinish_frag argument and use it to
1632 replace setting tinsn->record_fix fields.
1633 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1634 and vinsn_to_insnbuf. Remove references to record_fix and
1635 slot_sub_symbols fields.
1636 (xtensa_mark_narrow_branches): Delete unused code.
1637 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1639 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1641 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1642 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1643 of the record_fix field. Simplify error messages for unexpected
1645 (set_expr_symbol_offset_diff): Delete.
1647 2006-01-31 Paul Brook <paul@codesourcery.com>
1649 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1651 2006-01-31 Paul Brook <paul@codesourcery.com>
1652 Richard Earnshaw <rearnsha@arm.com>
1654 * config/tc-arm.c: Use arm_feature_set.
1655 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1656 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1657 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1660 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1661 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1662 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1663 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1665 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1666 (arm_opts): Move old cpu/arch options from here...
1667 (arm_legacy_opts): ... to here.
1668 (md_parse_option): Search arm_legacy_opts.
1669 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1670 (arm_float_abis, arm_eabis): Make const.
1672 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1674 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1676 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1678 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1679 in load immediate intruction.
1681 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1683 * config/bfin-parse.y (value_match): Use correct conversion
1684 specifications in template string for __FILE__ and __LINE__.
1688 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1690 Introduce TLS descriptors for i386 and x86_64.
1691 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1692 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1693 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1694 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1695 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1697 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1698 (lex_got): Handle @tlsdesc and @tlscall.
1699 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1701 2006-01-11 Nick Clifton <nickc@redhat.com>
1703 Fixes for building on 64-bit hosts:
1704 * config/tc-avr.c (mod_index): New union to allow conversion
1705 between pointers and integers.
1706 (md_begin, avr_ldi_expression): Use it.
1707 * config/tc-i370.c (md_assemble): Add cast for argument to print
1709 * config/tc-tic54x.c (subsym_substitute): Likewise.
1710 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1711 opindex field of fr_cgen structure into a pointer so that it can
1712 be stored in a frag.
1713 * config/tc-mn10300.c (md_assemble): Likewise.
1714 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1716 * config/tc-v850.c: Replace uses of (int) casts with correct
1719 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1722 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1724 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1727 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1728 a local-label reference.
1730 For older changes see ChangeLog-2005
1736 version-control: never