1 2006-08-29 Nick Clifton <nickc@redhat.com>
3 * read.c (s_align): Initialize the 'stopc' variable to prevent
4 compiler complaints about it being used without being
6 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
7 s_float_space, s_struct, cons_worker, equals): Likewise.
9 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
11 * ecoff.c (ecoff_directive_val): Fix message typo.
12 * config/tc-ns32k.c (convert_iif): Likewise.
13 * config/tc-sh64.c (shmedia_check_limits): Likewise.
15 2006-08-25 Sterling Augustine <sterling@tensilica.com>
16 Bob Wilson <bob.wilson@acm.org>
18 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
19 the state of the absolute_literals directive. Remove align frag at
20 the start of the literal pool position.
22 2006-08-25 Bob Wilson <bob.wilson@acm.org>
24 * doc/c-xtensa.texi: Add @group commands in examples.
26 2006-08-24 Bob Wilson <bob.wilson@acm.org>
28 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
29 (INIT_LITERAL_SECTION_NAME): Delete.
30 (lit_state struct): Remove segment names, init_lit_seg, and
31 fini_lit_seg. Add lit_prefix and current_text_seg.
32 (init_literal_head_h, init_literal_head): Delete.
33 (fini_literal_head_h, fini_literal_head): Delete.
34 (xtensa_begin_directive): Move argument parsing to
35 xtensa_literal_prefix function.
36 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
37 (xtensa_literal_prefix): Parse the directive argument here and
38 record it in the lit_prefix field. Remove code to derive literal
41 (get_is_linkonce_section): Use linkonce_len. Check for any
42 ".gnu.linkonce.*" section, not just text sections.
43 (md_begin): Remove initialization of deleted lit_state fields.
44 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
45 to init_literal_head and fini_literal_head.
46 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
47 when traversing literal_head list.
48 (match_section_group): New.
49 (cache_literal_section): Rewrite to determine the literal section
50 name on the fly, create the section and return it.
51 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
52 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
53 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
54 Use xtensa_get_property_section from bfd.
55 (retrieve_xtensa_section): Delete.
56 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
57 description to refer to plural literal sections and add xref to
58 the Literal Directive section.
59 (Literal Directive): Describe new rules for deriving literal section
60 names. Add footnote for special case of .init/.fini with
61 --text-section-literals.
62 (Literal Prefix Directive): Replace old naming rules with xref to the
63 Literal Directive section.
65 2006-08-21 Joseph Myers <joseph@codesourcery.com>
67 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
68 merging with previous long opcode.
70 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
72 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
73 * Makefile.in: Regenerate.
74 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
77 2006-08-16 Julian Brown <julian@codesourcery.com>
79 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
80 to use ARM instructions on non-ARM-supporting cores.
81 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
82 mode automatically based on cpu variant.
83 (md_begin): Call above function.
85 2006-08-16 Julian Brown <julian@codesourcery.com>
87 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
88 recognized in non-unified syntax mode.
90 2006-08-15 Thiemo Seufer <ths@mips.com>
91 Nigel Stephens <nigel@mips.com>
92 David Ung <davidu@mips.com>
94 * configure.tgt: Handle mips*-sde-elf*.
96 2006-08-12 Thiemo Seufer <ths@networkno.de>
98 * config/tc-mips.c (mips16_ip): Fix argument register handling
99 for restore instruction.
101 2006-08-08 Bob Wilson <bob.wilson@acm.org>
103 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
105 (out_fixed_inc_line_addr): New.
106 (process_entries): Use out_fixed_inc_line_addr when
107 DWARF2_USE_FIXED_ADVANCE_PC is set.
108 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
110 2006-08-08 DJ Delorie <dj@redhat.com>
112 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
113 vs full symbols so that we never have more than one pointer value
114 for any given symbol in our symbol table.
116 2006-08-08 Sterling Augustine <sterling@tensilica.com>
118 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
119 and emit DW_AT_ranges when code in compilation unit is not
121 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
123 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
124 (out_debug_ranges): New function to emit .debug_ranges section
125 when code is not contiguous.
127 2006-08-08 Nick Clifton <nickc@redhat.com>
129 * config/tc-arm.c (WARN_DEPRECATED): Enable.
131 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
133 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
135 (pe_directive_secrel) [TE_PE]: New function.
136 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
137 loc, loc_mark_labels.
138 [TE_PE]: Handle secrel32.
139 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
141 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
142 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
143 (md_section_align): Only round section sizes here for AOUT
145 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
146 (tc_pe_dwarf2_emit_offset): New function.
147 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
148 (cons_fix_new_arm): Handle O_secrel.
149 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
150 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
151 of OBJ_ELF only block.
152 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
153 tc_pe_dwarf2_emit_offset.
155 2006-08-04 Richard Sandiford <richard@codesourcery.com>
157 * config/tc-sh.c (apply_full_field_fix): New function.
158 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
159 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
160 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
161 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
163 2006-08-03 Nick Clifton <nickc@redhat.com>
166 * config.in: Regenerate.
168 2006-08-03 Joseph Myers <joseph@codesourcery.com>
170 * config/tc-arm.c (parse_operands): Handle invalid register name
173 2006-08-03 Joseph Myers <joseph@codesourcery.com>
175 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
176 (parse_operands): Handle it.
177 (insns): Use it for tmcr and tmrc.
179 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
182 * config/tc-i386.c (md_parse_option): Treat any target starting
183 with elf64_x86_64 as a viable target for the -64 switch.
184 (i386_target_format): For 64-bit ELF flavoured output use
186 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
188 2006-08-02 Nick Clifton <nickc@redhat.com>
191 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
193 * configure.in: Run BFD_BINARY_FOPEN.
194 * configure: Regenerate.
195 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
198 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
200 * config/tc-i386.c (md_assemble): Don't update
203 2006-08-01 Thiemo Seufer <ths@mips.com>
205 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
207 2006-08-01 Thiemo Seufer <ths@mips.com>
209 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
210 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
211 BFD_RELOC_32 and BFD_RELOC_16.
212 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
213 md_convert_frag, md_obj_end): Fix comment formatting.
215 2006-07-31 Thiemo Seufer <ths@mips.com>
217 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
218 handling for BFD_RELOC_MIPS16_JMP.
220 2006-07-24 Andreas Schwab <schwab@suse.de>
223 * read.c (read_a_source_file): Ignore unknown text after line
224 comment character. Fix misleading comment.
226 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
228 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
229 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
230 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
231 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
232 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
233 doc/c-z80.texi, doc/internals.texi: Fix some typos.
235 2006-07-21 Nick Clifton <nickc@redhat.com>
237 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
240 2006-07-20 Thiemo Seufer <ths@mips.com>
241 Nigel Stephens <nigel@mips.com>
243 * config/tc-mips.c (md_parse_option): Don't infer optimisation
244 options from debug options.
246 2006-07-20 Thiemo Seufer <ths@mips.com>
248 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
249 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
251 2006-07-19 Paul Brook <paul@codesourcery.com>
253 * config/tc-arm.c (insns): Fix rbit Arm opcode.
255 2006-07-18 Paul Brook <paul@codesourcery.com>
257 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
258 (md_convert_frag): Use correct reloc for add_pc. Use
259 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
260 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
261 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
263 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
265 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
266 when file and line unknown.
268 2006-07-17 Thiemo Seufer <ths@mips.com>
270 * read.c (s_struct): Use IS_ELF.
271 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
272 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
273 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
274 s_mips_mask): Likewise.
276 2006-07-16 Thiemo Seufer <ths@mips.com>
277 David Ung <davidu@mips.com>
279 * read.c (s_struct): Handle ELF section changing.
280 * config/tc-mips.c (s_align): Leave enabling auto-align to the
282 (s_change_sec): Try section changing only if we output ELF.
284 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
286 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
288 (smallest_imm_type): Remove Cpu086.
289 (i386_target_format): Likewise.
291 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
294 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
295 Michael Meissner <michael.meissner@amd.com>
297 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
298 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
299 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
301 (i386_align_code): Ditto.
302 (md_assemble_code): Add support for insertq/extrq instructions,
303 swapping as needed for intel syntax.
304 (swap_imm_operands): New function to swap immediate operands.
305 (swap_operands): Deal with 4 operand instructions.
306 (build_modrm_byte): Add support for insertq instruction.
308 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
310 * config/tc-i386.h (Size64): Fix a typo in comment.
312 2006-07-12 Nick Clifton <nickc@redhat.com>
314 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
315 fixup_segment() to repeat a range check on a value that has
316 already been checked here.
318 2006-07-07 James E Wilson <wilson@specifix.com>
320 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
322 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
323 Nick Clifton <nickc@redhat.com>
326 * doc/as.texi: Fix spelling typo: branchs => branches.
327 * doc/c-m68hc11.texi: Likewise.
328 * config/tc-m68hc11.c: Likewise.
329 Support old spelling of command line switch for backwards
332 2006-07-04 Thiemo Seufer <ths@mips.com>
333 David Ung <davidu@mips.com>
335 * config/tc-mips.c (s_is_linkonce): New function.
336 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
337 weak, external, and linkonce symbols.
338 (pic_need_relax): Use s_is_linkonce.
340 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
342 * doc/as.texinfo (Org): Remove space.
343 (P2align): Add "@var{abs-expr},".
345 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
347 * config/tc-i386.c (cpu_arch_tune_set): New.
348 (cpu_arch_isa): Likewise.
349 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
350 nops with short or long nop sequences based on -march=/.arch
352 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
353 set cpu_arch_tune and cpu_arch_tune_flags.
354 (md_parse_option): For -march=, set cpu_arch_isa and set
355 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
356 0. Set cpu_arch_tune_set to 1 for -mtune=.
357 (i386_target_format): Don't set cpu_arch_tune.
359 2006-06-23 Nigel Stephens <nigel@mips.com>
361 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
362 generated .sbss.* and .gnu.linkonce.sb.*.
364 2006-06-23 Thiemo Seufer <ths@mips.com>
365 David Ung <davidu@mips.com>
367 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
369 * config/tc-mips.c (label_list): Define per-segment label_list.
370 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
371 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
372 mips_from_file_after_relocs, mips_define_label): Use per-segment
375 2006-06-22 Thiemo Seufer <ths@mips.com>
377 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
378 (append_insn): Use it.
379 (md_apply_fix): Whitespace formatting.
380 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
381 mips16_extended_frag): Remove register specifier.
382 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
385 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
387 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
388 a directive saving VFP registers for ARMv6 or later.
389 (s_arm_unwind_save): Add parameter arch_v6 and call
390 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
392 (md_pseudo_table): Add entry for new "vsave" directive.
393 * doc/c-arm.texi: Correct error in example for "save"
394 directive (fstmdf -> fstmdx). Also document "vsave" directive.
396 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
397 Anatoly Sokolov <aesok@post.ru>
399 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
400 and atmega644p devices. Rename atmega164/atmega324 devices to
401 atmega164p/atmega324p.
402 * doc/c-avr.texi: Document new mcu and arch options.
404 2006-06-17 Nick Clifton <nickc@redhat.com>
406 * config/tc-arm.c (enum parse_operand_result): Move outside of
407 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
409 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
411 * config/tc-i386.h (processor_type): New.
412 (arch_entry): Add type.
414 * config/tc-i386.c (cpu_arch_tune): New.
415 (cpu_arch_tune_flags): Likewise.
416 (cpu_arch_isa_flags): Likewise.
418 (set_cpu_arch): Also update cpu_arch_isa_flags.
419 (md_assemble): Update cpu_arch_isa_flags.
421 (OPTION_MTUNE): Likewise.
422 (md_longopts): Add -march= and -mtune=.
423 (md_parse_option): Support -march= and -mtune=.
424 (md_show_usage): Add -march=CPU/-mtune=CPU.
425 (i386_target_format): Also update cpu_arch_isa_flags,
426 cpu_arch_tune and cpu_arch_tune_flags.
428 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
430 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
432 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
434 * config/tc-arm.c (enum parse_operand_result): New.
435 (struct group_reloc_table_entry): New.
436 (enum group_reloc_type): New.
437 (group_reloc_table): New array.
438 (find_group_reloc_table_entry): New function.
439 (parse_shifter_operand_group_reloc): New function.
440 (parse_address_main): New function, incorporating code
441 from the old parse_address function. To be used via...
442 (parse_address): wrapper for parse_address_main; and
443 (parse_address_group_reloc): new function, likewise.
444 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
445 OP_ADDRGLDRS, OP_ADDRGLDC.
446 (parse_operands): Support for these new operand codes.
447 New macro po_misc_or_fail_no_backtrack.
448 (encode_arm_cp_address): Preserve group relocations.
449 (insns): Modify to use the above operand codes where group
450 relocations are permitted.
451 (md_apply_fix): Handle the group relocations
452 ALU_PC_G0_NC through LDC_SB_G2.
453 (tc_gen_reloc): Likewise.
454 (arm_force_relocation): Leave group relocations for the linker.
455 (arm_fix_adjustable): Likewise.
457 2006-06-15 Julian Brown <julian@codesourcery.com>
459 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
460 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
463 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
465 * config/tc-i386.c (process_suffix): Don't add rex64 for
468 2006-06-09 Thiemo Seufer <ths@mips.com>
470 * config/tc-mips.c (mips_ip): Maintain argument count.
472 2006-06-09 Alan Modra <amodra@bigpond.net.au>
474 * config/tc-iq2000.c: Include sb.h.
476 2006-06-08 Nigel Stephens <nigel@mips.com>
478 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
479 aliases for better compatibility with SGI tools.
481 2006-06-08 Alan Modra <amodra@bigpond.net.au>
483 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
484 * Makefile.am (GASLIBS): Expand @BFDLIB@.
486 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
487 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
488 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
490 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
491 * Makefile.in: Regenerate.
492 * doc/Makefile.in: Regenerate.
493 * configure: Regenerate.
495 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
497 * po/Make-in (pdf, ps): New dummy targets.
499 2006-06-07 Julian Brown <julian@codesourcery.com>
501 * config/tc-arm.c (stdarg.h): include.
502 (arm_it): Add uncond_value field. Add isvec and issingle to operand
504 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
505 REG_TYPE_NSDQ (single, double or quad vector reg).
506 (reg_expected_msgs): Update.
507 (BAD_FPU): Add macro for unsupported FPU instruction error.
508 (parse_neon_type): Support 'd' as an alias for .f64.
509 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
511 (parse_vfp_reg_list): Don't update first arg on error.
512 (parse_neon_mov): Support extra syntax for VFP moves.
513 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
514 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
515 (parse_operands): Support isvec, issingle operands fields, new parse
517 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
519 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
520 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
521 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
522 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
524 (neon_shape): Redefine in terms of above.
525 (neon_shape_class): New enumeration, table of shape classes.
526 (neon_shape_el): New enumeration. One element of a shape.
527 (neon_shape_el_size): Register widths of above, where appropriate.
528 (neon_shape_info): New struct. Info for shape table.
529 (neon_shape_tab): New array.
530 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
531 (neon_check_shape): Rewrite as...
532 (neon_select_shape): New function to classify instruction shapes,
533 driven by new table neon_shape_tab array.
534 (neon_quad): New function. Return 1 if shape should set Q flag in
535 instructions (or equivalent), 0 otherwise.
536 (type_chk_of_el_type): Support F64.
537 (el_type_of_type_chk): Likewise.
538 (neon_check_type): Add support for VFP type checking (VFP data
539 elements fill their containing registers).
540 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
541 in thumb mode for VFP instructions.
542 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
543 and encode the current instruction as if it were that opcode.
544 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
545 arguments, call function in PFN.
546 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
547 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
548 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
549 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
550 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
551 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
552 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
553 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
554 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
555 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
556 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
557 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
558 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
559 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
560 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
562 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
563 between VFP and Neon turns out to belong to Neon. Perform
564 architecture check and fill in condition field if appropriate.
565 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
566 (do_neon_cvt): Add support for VFP variants of instructions.
567 (neon_cvt_flavour): Extend to cover VFP conversions.
568 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
570 (do_neon_ldr_str): Handle single-precision VFP load/store.
571 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
572 NS_NULL not NS_IGNORE.
573 (opcode_tag): Add OT_csuffixF for operands which either take a
574 conditional suffix, or have 0xF in the condition field.
575 (md_assemble): Add support for OT_csuffixF.
576 (NCE): Replace macro with...
577 (NCE_tag, NCE, NCEF): New macros.
578 (nCE): Replace macro with...
579 (nCE_tag, nCE, nCEF): New macros.
580 (insns): Add support for VFP insns or VFP versions of insns msr,
581 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
582 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
583 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
584 VFP/Neon insns together.
586 2006-06-07 Alan Modra <amodra@bigpond.net.au>
587 Ladislav Michl <ladis@linux-mips.org>
589 * app.c: Don't include headers already included by as.h.
591 * atof-generic.c: Likewise.
593 * dwarf2dbg.c: Likewise.
595 * input-file.c: Likewise.
596 * input-scrub.c: Likewise.
598 * output-file.c: Likewise.
601 * config/bfin-lex.l: Likewise.
602 * config/obj-coff.h: Likewise.
603 * config/obj-elf.h: Likewise.
604 * config/obj-som.h: Likewise.
605 * config/tc-arc.c: Likewise.
606 * config/tc-arm.c: Likewise.
607 * config/tc-avr.c: Likewise.
608 * config/tc-bfin.c: Likewise.
609 * config/tc-cris.c: Likewise.
610 * config/tc-d10v.c: Likewise.
611 * config/tc-d30v.c: Likewise.
612 * config/tc-dlx.h: Likewise.
613 * config/tc-fr30.c: Likewise.
614 * config/tc-frv.c: Likewise.
615 * config/tc-h8300.c: Likewise.
616 * config/tc-hppa.c: Likewise.
617 * config/tc-i370.c: Likewise.
618 * config/tc-i860.c: Likewise.
619 * config/tc-i960.c: Likewise.
620 * config/tc-ip2k.c: Likewise.
621 * config/tc-iq2000.c: Likewise.
622 * config/tc-m32c.c: Likewise.
623 * config/tc-m32r.c: Likewise.
624 * config/tc-maxq.c: Likewise.
625 * config/tc-mcore.c: Likewise.
626 * config/tc-mips.c: Likewise.
627 * config/tc-mmix.c: Likewise.
628 * config/tc-mn10200.c: Likewise.
629 * config/tc-mn10300.c: Likewise.
630 * config/tc-msp430.c: Likewise.
631 * config/tc-mt.c: Likewise.
632 * config/tc-ns32k.c: Likewise.
633 * config/tc-openrisc.c: Likewise.
634 * config/tc-ppc.c: Likewise.
635 * config/tc-s390.c: Likewise.
636 * config/tc-sh.c: Likewise.
637 * config/tc-sh64.c: Likewise.
638 * config/tc-sparc.c: Likewise.
639 * config/tc-tic30.c: Likewise.
640 * config/tc-tic4x.c: Likewise.
641 * config/tc-tic54x.c: Likewise.
642 * config/tc-v850.c: Likewise.
643 * config/tc-vax.c: Likewise.
644 * config/tc-xc16x.c: Likewise.
645 * config/tc-xstormy16.c: Likewise.
646 * config/tc-xtensa.c: Likewise.
647 * config/tc-z80.c: Likewise.
648 * config/tc-z8k.c: Likewise.
649 * macro.h: Don't include sb.h or ansidecl.h.
650 * sb.h: Don't include stdio.h or ansidecl.h.
651 * cond.c: Include sb.h.
652 * itbl-lex.l: Include as.h instead of other system headers.
653 * itbl-parse.y: Likewise.
654 * itbl-ops.c: Similarly.
655 * itbl-ops.h: Don't include as.h or ansidecl.h.
656 * config/bfin-defs.h: Don't include bfd.h or as.h.
657 * config/bfin-parse.y: Include as.h instead of other system headers.
659 2006-06-06 Ben Elliston <bje@au.ibm.com>
660 Anton Blanchard <anton@samba.org>
662 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
663 (md_show_usage): Document it.
664 (ppc_setup_opcodes): Test power6 opcode flag bits.
665 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
667 2006-06-06 Thiemo Seufer <ths@mips.com>
668 Chao-ying Fu <fu@mips.com>
670 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
671 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
672 (macro_build): Update comment.
673 (mips_ip): Allow DSP64 instructions for MIPS64R2.
674 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
676 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
677 MIPS_CPU_ASE_MDMX flags for sb1.
679 2006-06-05 Thiemo Seufer <ths@mips.com>
681 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
683 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
684 (mips_ip): Make overflowed/underflowed constant arguments in DSP
685 and MT instructions a fatal error. Use INSERT_OPERAND where
686 appropriate. Improve warnings for break and wait code overflows.
687 Use symbolic constant of OP_MASK_COPZ.
688 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
690 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
692 * po/Make-in (top_builddir): Define.
694 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
696 * doc/Makefile.am (TEXI2DVI): Define.
697 * doc/Makefile.in: Regenerate.
698 * doc/c-arc.texi: Fix typo.
700 2006-06-01 Alan Modra <amodra@bigpond.net.au>
702 * config/obj-ieee.c: Delete.
703 * config/obj-ieee.h: Delete.
704 * Makefile.am (OBJ_FORMATS): Remove ieee.
705 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
706 (obj-ieee.o): Remove rule.
707 * Makefile.in: Regenerate.
708 * configure.in (atof): Remove tahoe.
709 (OBJ_MAYBE_IEEE): Don't define.
710 * configure: Regenerate.
711 * config.in: Regenerate.
712 * doc/Makefile.in: Regenerate.
713 * po/POTFILES.in: Regenerate.
715 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
717 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
718 and LIBINTL_DEP everywhere.
720 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
721 * acinclude.m4: Include new gettext macros.
722 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
723 Remove local code for po/Makefile.
724 * Makefile.in, configure, doc/Makefile.in: Regenerated.
726 2006-05-30 Nick Clifton <nickc@redhat.com>
728 * po/es.po: Updated Spanish translation.
730 2006-05-06 Denis Chertykov <denisc@overta.ru>
732 * doc/c-avr.texi: New file.
733 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
734 * doc/all.texi: Set AVR
735 * doc/as.texinfo: Include c-avr.texi
737 2006-05-28 Jie Zhang <jie.zhang@analog.com>
739 * config/bfin-parse.y (check_macfunc): Loose the condition of
740 calling check_multiply_halfregs ().
742 2006-05-25 Jie Zhang <jie.zhang@analog.com>
744 * config/bfin-parse.y (asm_1): Better check and deal with
745 vector and scalar Multiply 16-Bit Operands instructions.
747 2006-05-24 Nick Clifton <nickc@redhat.com>
749 * config/tc-hppa.c: Convert to ISO C90 format.
750 * config/tc-hppa.h: Likewise.
752 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
753 Randolph Chung <randolph@tausq.org>
755 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
756 is_tls_ieoff, is_tls_leoff): Define.
757 (fix_new_hppa): Handle TLS.
758 (cons_fix_new_hppa): Likewise.
760 (md_apply_fix): Handle TLS relocs.
761 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
763 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
765 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
767 2006-05-23 Thiemo Seufer <ths@mips.com>
768 David Ung <davidu@mips.com>
769 Nigel Stephens <nigel@mips.com>
772 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
773 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
774 ISA_HAS_MXHC1): New macros.
775 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
776 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
777 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
778 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
779 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
780 (mips_after_parse_args): Change default handling of float register
781 size to account for 32bit code with 64bit FP. Better sanity checking
782 of ISA/ASE/ABI option combinations.
783 (s_mipsset): Support switching of GPR and FPR sizes via
784 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
786 (mips_elf_final_processing): We should record the use of 64bit FP
787 registers in 32bit code but we don't, because ELF header flags are
789 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
790 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
791 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
792 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
793 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
794 missing -march options. Document .set arch=CPU. Move .set smartmips
795 to ASE page. Use @code for .set FOO examples.
797 2006-05-23 Jie Zhang <jie.zhang@analog.com>
799 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
802 2006-05-23 Jie Zhang <jie.zhang@analog.com>
804 * config/bfin-defs.h (bfin_equals): Remove declaration.
805 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
806 * config/tc-bfin.c (bfin_name_is_register): Remove.
807 (bfin_equals): Remove.
808 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
809 (bfin_name_is_register): Remove declaration.
811 2006-05-19 Thiemo Seufer <ths@mips.com>
812 Nigel Stephens <nigel@mips.com>
814 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
815 (mips_oddfpreg_ok): New function.
818 2006-05-19 Thiemo Seufer <ths@mips.com>
819 David Ung <davidu@mips.com>
821 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
822 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
823 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
824 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
825 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
826 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
827 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
828 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
829 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
830 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
831 reg_names_o32, reg_names_n32n64): Define register classes.
832 (reg_lookup): New function, use register classes.
833 (md_begin): Reserve register names in the symbol table. Simplify
835 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
837 (mips16_ip): Use reg_lookup.
838 (tc_get_register): Likewise.
839 (tc_mips_regname_to_dw2regnum): New function.
841 2006-05-19 Thiemo Seufer <ths@mips.com>
843 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
844 Un-constify string argument.
845 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
847 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
849 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
851 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
853 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
855 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
858 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
860 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
861 cfloat/m68881 to correct architecture before using it.
863 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
865 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
868 2006-05-15 Paul Brook <paul@codesourcery.com>
870 * config/tc-arm.c (arm_adjust_symtab): Use
871 bfd_is_arm_special_symbol_name.
873 2006-05-15 Bob Wilson <bob.wilson@acm.org>
875 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
876 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
877 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
878 Handle errors from calls to xtensa_opcode_is_* functions.
880 2006-05-14 Thiemo Seufer <ths@mips.com>
882 * config/tc-mips.c (macro_build): Test for currently active
884 (mips16_ip): Reject invalid opcodes.
886 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
888 * doc/as.texinfo: Rename "Index" to "AS Index",
889 and "ABORT" to "ABORT (COFF)".
891 2006-05-11 Paul Brook <paul@codesourcery.com>
893 * config/tc-arm.c (parse_half): New function.
894 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
895 (parse_operands): Ditto.
896 (do_mov16): Reject invalid relocations.
897 (do_t_mov16): Ditto. Use Thumb reloc numbers.
898 (insns): Replace Iffff with HALF.
899 (md_apply_fix): Add MOVW and MOVT relocs.
900 (tc_gen_reloc): Ditto.
901 * doc/c-arm.texi: Document relocation operators
903 2006-05-11 Paul Brook <paul@codesourcery.com>
905 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
907 2006-05-11 Thiemo Seufer <ths@mips.com>
909 * config/tc-mips.c (append_insn): Don't check the range of j or
912 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
914 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
915 relocs against external symbols for WinCE targets.
916 (md_apply_fix): Likewise.
918 2006-05-09 David Ung <davidu@mips.com>
920 * config/tc-mips.c (append_insn): Only warn about an out-of-range
923 2006-05-09 Nick Clifton <nickc@redhat.com>
925 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
926 against symbols which are not going to be placed into the symbol
929 2006-05-09 Ben Elliston <bje@au.ibm.com>
931 * expr.c (operand): Remove `if (0 && ..)' statement and
932 subsequently unused target_op label. Collapse `if (1 || ..)'
934 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
935 separately above the switch.
937 2006-05-08 Nick Clifton <nickc@redhat.com>
940 * config/tc-msp430.c (line_separator_character): Define as |.
942 2006-05-08 Thiemo Seufer <ths@mips.com>
943 Nigel Stephens <nigel@mips.com>
944 David Ung <davidu@mips.com>
946 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
947 (mips_opts): Likewise.
948 (file_ase_smartmips): New variable.
949 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
950 (macro_build): Handle SmartMIPS instructions.
952 (md_longopts): Add argument handling for smartmips.
953 (md_parse_options, mips_after_parse_args): Likewise.
954 (s_mipsset): Add .set smartmips support.
955 (md_show_usage): Document -msmartmips/-mno-smartmips.
956 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
958 * doc/c-mips.texi: Likewise.
960 2006-05-08 Alan Modra <amodra@bigpond.net.au>
962 * write.c (relax_segment): Add pass count arg. Don't error on
963 negative org/space on first two passes.
964 (relax_seg_info): New struct.
965 (relax_seg, write_object_file): Adjust.
966 * write.h (relax_segment): Update prototype.
968 2006-05-05 Julian Brown <julian@codesourcery.com>
970 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
972 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
973 architecture version checks.
974 (insns): Allow overlapping instructions to be used in VFP mode.
976 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
979 * config/obj-elf.c (obj_elf_change_section): Allow user
980 specified SHF_ALPHA_GPREL.
982 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
984 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
985 for PMEM related expressions.
987 2006-05-05 Nick Clifton <nickc@redhat.com>
990 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
991 insertion of a directory separator character into a string at a
992 given offset. Uses heuristics to decide when to use a backslash
993 character rather than a forward-slash character.
994 (dwarf2_directive_loc): Use the macro.
995 (out_debug_info): Likewise.
997 2006-05-05 Thiemo Seufer <ths@mips.com>
998 David Ung <davidu@mips.com>
1000 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1002 (macro): Add new case M_CACHE_AB.
1004 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1006 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1007 (opcode_lookup): Issue a warning for opcode with
1008 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1009 identical to OT_cinfix3.
1010 (TxC3w, TC3w, tC3w): New.
1011 (insns): Use tC3w and TC3w for comparison instructions with
1014 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1016 * subsegs.h (struct frchain): Delete frch_seg.
1017 (frchain_root): Delete.
1018 (seg_info): Define as macro.
1019 * subsegs.c (frchain_root): Delete.
1020 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1021 (subsegs_begin, subseg_change): Adjust for above.
1022 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1023 rather than to one big list.
1024 (subseg_get): Don't special case abs, und sections.
1025 (subseg_new, subseg_force_new): Don't set frchainP here.
1027 (subsegs_print_statistics): Adjust frag chain control list traversal.
1028 * debug.c (dmp_frags): Likewise.
1029 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1030 at frchain_root. Make use of known frchain ordering.
1031 (last_frag_for_seg): Likewise.
1032 (get_frag_fix): Likewise. Add seg param.
1033 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1034 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1035 (SUB_SEGMENT_ALIGN): Likewise.
1036 (subsegs_finish): Adjust frchain list traversal.
1037 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1038 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1039 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1040 (xtensa_fix_b_j_loop_end_frags): Likewise.
1041 (xtensa_fix_close_loop_end_frags): Likewise.
1042 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1043 (retrieve_segment_info): Delete frch_seg initialisation.
1045 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1047 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1048 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1049 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1050 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1052 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1054 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1056 (md_apply_fix3): Multiply offset by 4 here for
1057 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1059 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1060 Jan Beulich <jbeulich@novell.com>
1062 * config/tc-i386.c (output_invalid_buf): Change size for
1064 * config/tc-tic30.c (output_invalid_buf): Likewise.
1066 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1068 * config/tc-tic30.c (output_invalid): Likewise.
1070 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1072 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1073 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1074 (asconfig.texi): Don't set top_srcdir.
1075 * doc/as.texinfo: Don't use top_srcdir.
1076 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1078 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1080 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1081 * config/tc-tic30.c (output_invalid_buf): Likewise.
1083 * config/tc-i386.c (output_invalid): Use snprintf instead of
1085 * config/tc-ia64.c (declare_register_set): Likewise.
1086 (emit_one_bundle): Likewise.
1087 (check_dependencies): Likewise.
1088 * config/tc-tic30.c (output_invalid): Likewise.
1090 2006-05-02 Paul Brook <paul@codesourcery.com>
1092 * config/tc-arm.c (arm_optimize_expr): New function.
1093 * config/tc-arm.h (md_optimize_expr): Define
1094 (arm_optimize_expr): Add prototype.
1095 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1097 2006-05-02 Ben Elliston <bje@au.ibm.com>
1099 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1102 * sb.h (sb_list_vector): Move to sb.c.
1103 * sb.c (free_list): Use type of sb_list_vector directly.
1104 (sb_build): Fix off-by-one error in assertion about `size'.
1106 2006-05-01 Ben Elliston <bje@au.ibm.com>
1108 * listing.c (listing_listing): Remove useless loop.
1109 * macro.c (macro_expand): Remove is_positional local variable.
1110 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1111 and simplify surrounding expressions, where possible.
1112 (assign_symbol): Likewise.
1113 (s_weakref): Likewise.
1114 * symbols.c (colon): Likewise.
1116 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1118 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1120 2006-04-30 Thiemo Seufer <ths@mips.com>
1121 David Ung <davidu@mips.com>
1123 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1124 (mips_immed): New table that records various handling of udi
1125 instruction patterns.
1126 (mips_ip): Adds udi handling.
1128 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1130 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1131 of list rather than beginning.
1133 2006-04-26 Julian Brown <julian@codesourcery.com>
1135 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1136 (is_quarter_float): Rename from above. Simplify slightly.
1137 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1139 (parse_neon_mov): Parse floating-point constants.
1140 (neon_qfloat_bits): Fix encoding.
1141 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1142 preference to integer encoding when using the F32 type.
1144 2006-04-26 Julian Brown <julian@codesourcery.com>
1146 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1147 zero-initialising structures containing it will lead to invalid types).
1148 (arm_it): Add vectype to each operand.
1149 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1151 (neon_typed_alias): New structure. Extra information for typed
1153 (reg_entry): Add neon type info field.
1154 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1155 Break out alternative syntax for coprocessor registers, etc. into...
1156 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1157 out from arm_reg_parse.
1158 (parse_neon_type): Move. Return SUCCESS/FAIL.
1159 (first_error): New function. Call to ensure first error which occurs is
1161 (parse_neon_operand_type): Parse exactly one type.
1162 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1163 (parse_typed_reg_or_scalar): New function. Handle core of both
1164 arm_typed_reg_parse and parse_scalar.
1165 (arm_typed_reg_parse): Parse a register with an optional type.
1166 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1168 (parse_scalar): Parse a Neon scalar with optional type.
1169 (parse_reg_list): Use first_error.
1170 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1171 (neon_alias_types_same): New function. Return true if two (alias) types
1173 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1175 (insert_reg_alias): Return new reg_entry not void.
1176 (insert_neon_reg_alias): New function. Insert type/index information as
1177 well as register for alias.
1178 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1179 make typed register aliases accordingly.
1180 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1182 (s_unreq): Delete type information if present.
1183 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1184 (s_arm_unwind_save_mmxwcg): Likewise.
1185 (s_arm_unwind_movsp): Likewise.
1186 (s_arm_unwind_setfp): Likewise.
1187 (parse_shift): Likewise.
1188 (parse_shifter_operand): Likewise.
1189 (parse_address): Likewise.
1190 (parse_tb): Likewise.
1191 (tc_arm_regname_to_dw2regnum): Likewise.
1192 (md_pseudo_table): Add dn, qn.
1193 (parse_neon_mov): Handle typed operands.
1194 (parse_operands): Likewise.
1195 (neon_type_mask): Add N_SIZ.
1196 (N_ALLMODS): New macro.
1197 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1198 (el_type_of_type_chk): Add some safeguards.
1199 (modify_types_allowed): Fix logic bug.
1200 (neon_check_type): Handle operands with types.
1201 (neon_three_same): Remove redundant optional arg handling.
1202 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1203 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1204 (do_neon_step): Adjust accordingly.
1205 (neon_cmode_for_logic_imm): Use first_error.
1206 (do_neon_bitfield): Call neon_check_type.
1207 (neon_dyadic): Rename to...
1208 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1209 to allow modification of type of the destination.
1210 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1211 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1212 (do_neon_compare): Make destination be an untyped bitfield.
1213 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1214 (neon_mul_mac): Return early in case of errors.
1215 (neon_move_immediate): Use first_error.
1216 (neon_mac_reg_scalar_long): Fix type to include scalar.
1217 (do_neon_dup): Likewise.
1218 (do_neon_mov): Likewise (in several places).
1219 (do_neon_tbl_tbx): Fix type.
1220 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1221 (do_neon_ld_dup): Exit early in case of errors and/or use
1223 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1224 Handle .dn/.qn directives.
1225 (REGDEF): Add zero for reg_entry neon field.
1227 2006-04-26 Julian Brown <julian@codesourcery.com>
1229 * config/tc-arm.c (limits.h): Include.
1230 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1231 (fpu_vfp_v3_or_neon_ext): Declare constants.
1232 (neon_el_type): New enumeration of types for Neon vector elements.
1233 (neon_type_el): New struct. Define type and size of a vector element.
1234 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1236 (neon_type): Define struct. The type of an instruction.
1237 (arm_it): Add 'vectype' for the current instruction.
1238 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1239 (vfp_sp_reg_pos): Rename to...
1240 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1242 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1243 (Neon D or Q register).
1244 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1246 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1247 (my_get_expression): Allow above constant as argument to accept
1248 64-bit constants with optional prefix.
1249 (arm_reg_parse): Add extra argument to return the specific type of
1250 register in when either a D or Q register (REG_TYPE_NDQ) is
1251 requested. Can be NULL.
1252 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1253 (parse_reg_list): Update for new arm_reg_parse args.
1254 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1255 (parse_neon_el_struct_list): New function. Parse element/structure
1256 register lists for VLD<n>/VST<n> instructions.
1257 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1258 (s_arm_unwind_save_mmxwr): Likewise.
1259 (s_arm_unwind_save_mmxwcg): Likewise.
1260 (s_arm_unwind_movsp): Likewise.
1261 (s_arm_unwind_setfp): Likewise.
1262 (parse_big_immediate): New function. Parse an immediate, which may be
1263 64 bits wide. Put results in inst.operands[i].
1264 (parse_shift): Update for new arm_reg_parse args.
1265 (parse_address): Likewise. Add parsing of alignment specifiers.
1266 (parse_neon_mov): Parse the operands of a VMOV instruction.
1267 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1268 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1269 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1270 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1271 (parse_operands): Handle new codes above.
1272 (encode_arm_vfp_sp_reg): Rename to...
1273 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1274 selected VFP version only supports D0-D15.
1275 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1276 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1277 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1278 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1279 encode_arm_vfp_reg name, and allow 32 D regs.
1280 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1281 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1283 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1284 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1285 constant-load and conversion insns introduced with VFPv3.
1286 (neon_tab_entry): New struct.
1287 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1288 those which are the targets of pseudo-instructions.
1289 (neon_opc): Enumerate opcodes, use as indices into...
1290 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1291 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1292 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1293 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1295 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1297 (neon_type_mask): New. Compact type representation for type checking.
1298 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1299 permitted type combinations.
1300 (N_IGNORE_TYPE): New macro.
1301 (neon_check_shape): New function. Check an instruction shape for
1302 multiple alternatives. Return the specific shape for the current
1304 (neon_modify_type_size): New function. Modify a vector type and size,
1305 depending on the bit mask in argument 1.
1306 (neon_type_promote): New function. Convert a given "key" type (of an
1307 operand) into the correct type for a different operand, based on a bit
1309 (type_chk_of_el_type): New function. Convert a type and size into the
1310 compact representation used for type checking.
1311 (el_type_of_type_ckh): New function. Reverse of above (only when a
1312 single bit is set in the bit mask).
1313 (modify_types_allowed): New function. Alter a mask of allowed types
1314 based on a bit mask of modifications.
1315 (neon_check_type): New function. Check the type of the current
1316 instruction against the variable argument list. The "key" type of the
1317 instruction is returned.
1318 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1319 a Neon data-processing instruction depending on whether we're in ARM
1320 mode or Thumb-2 mode.
1321 (neon_logbits): New function.
1322 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1323 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1324 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1325 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1326 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1327 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1328 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1329 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1330 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1331 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1332 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1333 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1334 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1335 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1336 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1337 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1338 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1339 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1340 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1341 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1342 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1343 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1344 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1345 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1346 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1348 (parse_neon_type): New function. Parse Neon type specifier.
1349 (opcode_lookup): Allow parsing of Neon type specifiers.
1350 (REGNUM2, REGSETH, REGSET2): New macros.
1351 (reg_names): Add new VFPv3 and Neon registers.
1352 (NUF, nUF, NCE, nCE): New macros for opcode table.
1353 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1354 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1355 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1356 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1357 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1358 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1359 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1360 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1361 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1362 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1363 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1364 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1365 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1366 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1368 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1369 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1370 (arm_option_cpu_value): Add vfp3 and neon.
1371 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1374 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1376 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1377 syntax instead of hardcoded opcodes with ".w18" suffixes.
1378 (wide_branch_opcode): New.
1379 (build_transition): Use it to check for wide branch opcodes with
1380 either ".w18" or ".w15" suffixes.
1382 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1384 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1385 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1386 frag's is_literal flag.
1388 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1390 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1392 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1394 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1395 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1396 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1397 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1398 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1400 2005-04-20 Paul Brook <paul@codesourcery.com>
1402 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1404 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1406 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1408 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1409 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1410 Make some cpus unsupported on ELF. Run "make dep-am".
1411 * Makefile.in: Regenerate.
1413 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1415 * configure.in (--enable-targets): Indent help message.
1416 * configure: Regenerate.
1418 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1421 * config/tc-i386.c (i386_immediate): Check illegal immediate
1424 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1426 * config/tc-i386.c: Formatting.
1427 (output_disp, output_imm): ISO C90 params.
1429 * frags.c (frag_offset_fixed_p): Constify args.
1430 * frags.h (frag_offset_fixed_p): Ditto.
1432 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1433 (COFF_MAGIC): Delete.
1435 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1437 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1439 * po/POTFILES.in: Regenerated.
1441 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1443 * doc/as.texinfo: Mention that some .type syntaxes are not
1444 supported on all architectures.
1446 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1448 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1449 instructions when such transformations have been disabled.
1451 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1453 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1454 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1455 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1456 decoding the loop instructions. Remove current_offset variable.
1457 (xtensa_fix_short_loop_frags): Likewise.
1458 (min_bytes_to_other_loop_end): Remove current_offset argument.
1460 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1462 * config/tc-z80.c (z80_optimize_expr): Removed.
1463 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1465 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1467 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1468 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1469 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1470 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1471 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1472 at90can64, at90usb646, at90usb647, at90usb1286 and
1474 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1476 2006-04-07 Paul Brook <paul@codesourcery.com>
1478 * config/tc-arm.c (parse_operands): Set default error message.
1480 2006-04-07 Paul Brook <paul@codesourcery.com>
1482 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1484 2006-04-07 Paul Brook <paul@codesourcery.com>
1486 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1488 2006-04-07 Paul Brook <paul@codesourcery.com>
1490 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1491 (move_or_literal_pool): Handle Thumb-2 instructions.
1492 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1494 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1497 * config/tc-i386.c (match_template): Move 64-bit operand tests
1500 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1502 * po/Make-in: Add install-html target.
1503 * Makefile.am: Add install-html and install-html-recursive targets.
1504 * Makefile.in: Regenerate.
1505 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1506 * configure: Regenerate.
1507 * doc/Makefile.am: Add install-html and install-html-am targets.
1508 * doc/Makefile.in: Regenerate.
1510 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1512 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1515 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1516 Daniel Jacobowitz <dan@codesourcery.com>
1518 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1519 (GOTT_BASE, GOTT_INDEX): New.
1520 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1521 GOTT_INDEX when generating VxWorks PIC.
1522 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1523 use the generic *-*-vxworks* stanza instead.
1525 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1528 * frags.c (frag_offset_fixed_p): New function.
1529 * frags.h (frag_offset_fixed_p): Declare.
1530 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1531 (resolve_expression): Likewise.
1533 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1535 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1536 of the same length but different numbers of slots.
1538 2006-03-30 Andreas Schwab <schwab@suse.de>
1540 * configure.in: Fix help string for --enable-targets option.
1541 * configure: Regenerate.
1543 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1545 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1546 (m68k_ip): ... here. Use for all chips. Protect against buffer
1547 overrun and avoid excessive copying.
1549 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1550 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1551 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1552 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1553 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1554 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1555 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1556 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1557 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1558 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1559 (struct m68k_cpu): Change chip field to control_regs.
1560 (current_chip): Remove.
1561 (control_regs): New.
1562 (m68k_archs, m68k_extensions): Adjust.
1563 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1564 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1565 (find_cf_chip): Reimplement for new organization of cpu table.
1566 (select_control_regs): Remove.
1568 (struct save_opts): Save control regs, not chip.
1569 (s_save, s_restore): Adjust.
1570 (m68k_lookup_cpu): Give deprecated warning when necessary.
1571 (m68k_init_arch): Adjust.
1572 (md_show_usage): Adjust for new cpu table organization.
1574 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1576 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1577 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1578 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1580 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1581 (any_gotrel): New rule.
1582 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1583 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1585 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1586 (bfin_pic_ptr): New function.
1587 (md_pseudo_table): Add it for ".picptr".
1588 (OPTION_FDPIC): New macro.
1589 (md_longopts): Add -mfdpic.
1590 (md_parse_option): Handle it.
1591 (md_begin): Set BFD flags.
1592 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1593 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1595 * Makefile.am (bfin-parse.o): Update dependencies.
1596 (DEPTC_bfin_elf): Likewise.
1597 * Makefile.in: Regenerate.
1599 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1601 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1602 mcfemac instead of mcfmac.
1604 2006-03-23 Michael Matz <matz@suse.de>
1606 * config/tc-i386.c (type_names): Correct placement of 'static'.
1607 (reloc): Map some more relocs to their 64 bit counterpart when
1609 (output_insn): Work around breakage if DEBUG386 is defined.
1610 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1611 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1612 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1613 different from i386.
1614 (output_imm): Ditto.
1615 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1617 (md_convert_frag): Jumps can now be larger than 2GB away, error
1619 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1620 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1622 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1623 Daniel Jacobowitz <dan@codesourcery.com>
1624 Phil Edwards <phil@codesourcery.com>
1625 Zack Weinberg <zack@codesourcery.com>
1626 Mark Mitchell <mark@codesourcery.com>
1627 Nathan Sidwell <nathan@codesourcery.com>
1629 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1630 (md_begin): Complain about -G being used for PIC. Don't change
1631 the text, data and bss alignments on VxWorks.
1632 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1633 generating VxWorks PIC.
1634 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1635 (macro): Likewise, but do not treat la $25 specially for
1636 VxWorks PIC, and do not handle jal.
1637 (OPTION_MVXWORKS_PIC): New macro.
1638 (md_longopts): Add -mvxworks-pic.
1639 (md_parse_option): Don't complain about using PIC and -G together here.
1640 Handle OPTION_MVXWORKS_PIC.
1641 (md_estimate_size_before_relax): Always use the first relaxation
1642 sequence on VxWorks.
1643 * config/tc-mips.h (VXWORKS_PIC): New.
1645 2006-03-21 Paul Brook <paul@codesourcery.com>
1647 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1649 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1651 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1652 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1653 (get_loop_align_size): New.
1654 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1655 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1656 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1657 (get_noop_aligned_address): Use get_loop_align_size.
1658 (get_aligned_diff): Likewise.
1660 2006-03-21 Paul Brook <paul@codesourcery.com>
1662 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1664 2006-03-20 Paul Brook <paul@codesourcery.com>
1666 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1667 (do_t_branch): Encode branches inside IT blocks as unconditional.
1668 (do_t_cps): New function.
1669 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1670 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1671 (opcode_lookup): Allow conditional suffixes on all instructions in
1673 (md_assemble): Advance condexec state before checking for errors.
1674 (insns): Use do_t_cps.
1676 2006-03-20 Paul Brook <paul@codesourcery.com>
1678 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1679 outputting the insn.
1681 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1683 * config/tc-vax.c: Update copyright year.
1684 * config/tc-vax.h: Likewise.
1686 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1688 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1690 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1692 2006-03-17 Paul Brook <paul@codesourcery.com>
1694 * config/tc-arm.c (insns): Add ldm and stm.
1696 2006-03-17 Ben Elliston <bje@au.ibm.com>
1699 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1701 2006-03-16 Paul Brook <paul@codesourcery.com>
1703 * config/tc-arm.c (insns): Add "svc".
1705 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1707 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1708 flag and avoid double underscore prefixes.
1710 2006-03-10 Paul Brook <paul@codesourcery.com>
1712 * config/tc-arm.c (md_begin): Handle EABIv5.
1713 (arm_eabis): Add EF_ARM_EABI_VER5.
1714 * doc/c-arm.texi: Document -meabi=5.
1716 2006-03-10 Ben Elliston <bje@au.ibm.com>
1718 * app.c (do_scrub_chars): Simplify string handling.
1720 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1721 Daniel Jacobowitz <dan@codesourcery.com>
1722 Zack Weinberg <zack@codesourcery.com>
1723 Nathan Sidwell <nathan@codesourcery.com>
1724 Paul Brook <paul@codesourcery.com>
1725 Ricardo Anguiano <anguiano@codesourcery.com>
1726 Phil Edwards <phil@codesourcery.com>
1728 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1729 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1731 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1732 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1733 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1735 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1737 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1738 even when using the text-section-literals option.
1740 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1742 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1744 (m68k_ip): <case 'J'> Check we have some control regs.
1745 (md_parse_option): Allow raw arch switch.
1746 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1747 whether 68881 or cfloat was meant by -mfloat.
1748 (md_show_usage): Adjust extension display.
1749 (m68k_elf_final_processing): Adjust.
1751 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1753 * config/tc-avr.c (avr_mod_hash_value): New function.
1754 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1755 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1756 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1757 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1759 (tc_gen_reloc): Handle substractions of symbols, if possible do
1760 fixups, abort otherwise.
1761 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1762 tc_fix_adjustable): Define.
1764 2006-03-02 James E Wilson <wilson@specifix.com>
1766 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1767 change the template, then clear md.slot[curr].end_of_insn_group.
1769 2006-02-28 Jan Beulich <jbeulich@novell.com>
1771 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1773 2006-02-28 Jan Beulich <jbeulich@novell.com>
1776 * macro.c (getstring): Don't treat parentheses special anymore.
1777 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1778 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1781 2006-02-28 Mat <mat@csail.mit.edu>
1783 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1785 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1787 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1789 (CFI_signal_frame): Define.
1790 (cfi_pseudo_table): Add .cfi_signal_frame.
1791 (dot_cfi): Handle CFI_signal_frame.
1792 (output_cie): Handle cie->signal_frame.
1793 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1794 different. Copy signal_frame from FDE to newly created CIE.
1795 * doc/as.texinfo: Document .cfi_signal_frame.
1797 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1799 * doc/Makefile.am: Add html target.
1800 * doc/Makefile.in: Regenerate.
1801 * po/Make-in: Add html target.
1803 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1805 * config/tc-i386.c (output_insn): Support Intel Merom New
1808 * config/tc-i386.h (CpuMNI): New.
1809 (CpuUnknownFlags): Add CpuMNI.
1811 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1813 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1814 (hpriv_reg_table): New table for hyperprivileged registers.
1815 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1818 2006-02-24 DJ Delorie <dj@redhat.com>
1820 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1821 (tc_gen_reloc): Don't define.
1822 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1823 (OPTION_LINKRELAX): New.
1824 (md_longopts): Add it.
1826 (md_parse_options): Set it.
1827 (md_assemble): Emit relaxation relocs as needed.
1828 (md_convert_frag): Emit relaxation relocs as needed.
1829 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1830 (m32c_apply_fix): New.
1831 (tc_gen_reloc): New.
1832 (m32c_force_relocation): Force out jump relocs when relaxing.
1833 (m32c_fix_adjustable): Return false if relaxing.
1835 2006-02-24 Paul Brook <paul@codesourcery.com>
1837 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1838 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1839 (struct asm_barrier_opt): Define.
1840 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1841 (parse_psr): Accept V7M psr names.
1842 (parse_barrier): New function.
1843 (enum operand_parse_code): Add OP_oBARRIER.
1844 (parse_operands): Implement OP_oBARRIER.
1845 (do_barrier): New function.
1846 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1847 (do_t_cpsi): Add V7M restrictions.
1848 (do_t_mrs, do_t_msr): Validate V7M variants.
1849 (md_assemble): Check for NULL variants.
1850 (v7m_psrs, barrier_opt_names): New tables.
1851 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1852 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1853 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1854 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1855 (struct cpu_arch_ver_table): Define.
1856 (cpu_arch_ver): New.
1857 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1858 Tag_CPU_arch_profile.
1859 * doc/c-arm.texi: Document new cpu and arch options.
1861 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1863 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1865 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1867 * config/tc-ia64.c: Update copyright years.
1869 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1871 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1874 2005-02-22 Paul Brook <paul@codesourcery.com>
1876 * config/tc-arm.c (do_pld): Remove incorrect write to
1878 (encode_thumb32_addr_mode): Use correct operand.
1880 2006-02-21 Paul Brook <paul@codesourcery.com>
1882 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1884 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1885 Anil Paranjape <anilp1@kpitcummins.com>
1886 Shilin Shakti <shilins@kpitcummins.com>
1888 * Makefile.am: Add xc16x related entry.
1889 * Makefile.in: Regenerate.
1890 * configure.in: Added xc16x related entry.
1891 * configure: Regenerate.
1892 * config/tc-xc16x.h: New file
1893 * config/tc-xc16x.c: New file
1894 * doc/c-xc16x.texi: New file for xc16x
1895 * doc/all.texi: Entry for xc16x
1896 * doc/Makefile.texi: Added c-xc16x.texi
1897 * NEWS: Announce the support for the new target.
1899 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1901 * configure.tgt: set emulation for mips-*-netbsd*
1903 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1905 * config.in: Rebuilt.
1907 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1909 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1910 from 1, not 0, in error messages.
1911 (md_assemble): Simplify special-case check for ENTRY instructions.
1912 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1913 operand in error message.
1915 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1917 * configure.tgt (arm-*-linux-gnueabi*): Change to
1920 2006-02-10 Nick Clifton <nickc@redhat.com>
1922 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1923 32-bit value is propagated into the upper bits of a 64-bit long.
1925 * config/tc-arc.c (init_opcode_tables): Fix cast.
1926 (arc_extoper, md_operand): Likewise.
1928 2006-02-09 David Heine <dlheine@tensilica.com>
1930 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1931 each relaxation step.
1933 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1935 * configure.in (CHECK_DECLS): Add vsnprintf.
1936 * configure: Regenerate.
1937 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1938 include/declare here, but...
1939 * as.h: Move code detecting VARARGS idiom to the top.
1940 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1941 (vsnprintf): Declare if not already declared.
1943 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1945 * as.c (close_output_file): New.
1946 (main): Register close_output_file with xatexit before
1947 dump_statistics. Don't call output_file_close.
1949 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1951 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1952 mcf5329_control_regs): New.
1953 (not_current_architecture, selected_arch, selected_cpu): New.
1954 (m68k_archs, m68k_extensions): New.
1955 (archs): Renamed to ...
1956 (m68k_cpus): ... here. Adjust.
1958 (md_pseudo_table): Add arch and cpu directives.
1959 (find_cf_chip, m68k_ip): Adjust table scanning.
1960 (no_68851, no_68881): Remove.
1961 (md_assemble): Lazily initialize.
1962 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1963 (md_init_after_args): Move functionality to m68k_init_arch.
1964 (mri_chip): Adjust table scanning.
1965 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1966 options with saner parsing.
1967 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1968 m68k_init_arch): New.
1969 (s_m68k_cpu, s_m68k_arch): New.
1970 (md_show_usage): Adjust.
1971 (m68k_elf_final_processing): Set CF EF flags.
1972 * config/tc-m68k.h (m68k_init_after_args): Remove.
1973 (tc_init_after_args): Remove.
1974 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1975 (M68k-Directives): Document .arch and .cpu directives.
1977 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1979 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1980 synonyms for equ and defl.
1981 (z80_cons_fix_new): New function.
1982 (emit_byte): Disallow relative jumps to absolute locations.
1983 (emit_data): Only handle defb, prototype changed, because defb is
1984 now handled as pseudo-op rather than an instruction.
1985 (instab): Entries for defb,defw,db,dw moved from here...
1986 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1987 Add entries for def24,def32,d24,d32.
1988 (md_assemble): Improved error handling.
1989 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1990 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1991 (z80_cons_fix_new): Declare.
1992 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1993 (def24,d24,def32,d32): New pseudo-ops.
1995 2006-02-02 Paul Brook <paul@codesourcery.com>
1997 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1999 2005-02-02 Paul Brook <paul@codesourcery.com>
2001 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2002 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2003 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2004 T2_OPCODE_RSB): Define.
2005 (thumb32_negate_data_op): New function.
2006 (md_apply_fix): Use it.
2008 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2010 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2012 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2013 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2015 (relaxation_requirements): Add pfinish_frag argument and use it to
2016 replace setting tinsn->record_fix fields.
2017 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2018 and vinsn_to_insnbuf. Remove references to record_fix and
2019 slot_sub_symbols fields.
2020 (xtensa_mark_narrow_branches): Delete unused code.
2021 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2023 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2025 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2026 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2027 of the record_fix field. Simplify error messages for unexpected
2029 (set_expr_symbol_offset_diff): Delete.
2031 2006-01-31 Paul Brook <paul@codesourcery.com>
2033 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2035 2006-01-31 Paul Brook <paul@codesourcery.com>
2036 Richard Earnshaw <rearnsha@arm.com>
2038 * config/tc-arm.c: Use arm_feature_set.
2039 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2040 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2041 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2044 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2045 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2046 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2047 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2049 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2050 (arm_opts): Move old cpu/arch options from here...
2051 (arm_legacy_opts): ... to here.
2052 (md_parse_option): Search arm_legacy_opts.
2053 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2054 (arm_float_abis, arm_eabis): Make const.
2056 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2058 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2060 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2062 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2063 in load immediate intruction.
2065 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2067 * config/bfin-parse.y (value_match): Use correct conversion
2068 specifications in template string for __FILE__ and __LINE__.
2072 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2074 Introduce TLS descriptors for i386 and x86_64.
2075 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2076 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2077 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2078 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2079 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2081 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2082 (lex_got): Handle @tlsdesc and @tlscall.
2083 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2085 2006-01-11 Nick Clifton <nickc@redhat.com>
2087 Fixes for building on 64-bit hosts:
2088 * config/tc-avr.c (mod_index): New union to allow conversion
2089 between pointers and integers.
2090 (md_begin, avr_ldi_expression): Use it.
2091 * config/tc-i370.c (md_assemble): Add cast for argument to print
2093 * config/tc-tic54x.c (subsym_substitute): Likewise.
2094 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2095 opindex field of fr_cgen structure into a pointer so that it can
2096 be stored in a frag.
2097 * config/tc-mn10300.c (md_assemble): Likewise.
2098 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2100 * config/tc-v850.c: Replace uses of (int) casts with correct
2103 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2106 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2108 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2111 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2112 a local-label reference.
2114 For older changes see ChangeLog-2005
2120 version-control: never