gas/NEWS

   1 -*- text -*-
   2
   3 * On RISC-V macro instructions expanding to AUIPC and a load, store, or branch
   4   no longer accept x0 as an intermediate and/or destination register.
   5
   6 * Add support for Reliability, Availability and Serviceability extension v2
   7   (RASv2) for AArch64.
   8
   9 * Add support for 128-bit Atomic Instructions (LSE128) for AArch64.
  10
  11 * Add support for Guarded Control Stack (GCS) for AArch64.
  12
  13 * Add support for AArch64 Check Feature Status Extension (CHK).
  14
  15 * Add support for 'armv8.9-a' and 'armv9.4-a' for -march in AArch64 GAS.
  16
  17 * Add support for Intel USER_MSR instructions.
  18
  19 * Add support for Intel AVX10.1.
  20
  21 * Add support for Intel PBNDKB instructions.
  22
  23 * Add support for Intel SM4 instructions.
  24
  25 * Add support for Intel SM3 instructions.
  26
  27 * Add support for Intel SHA512 instructions.
  28
  29 * Add support for Intel AVX-VNNI-INT16 instructions.
  30
  31 * Add support for Cortex-A520 for AArch64.
  32
  33 * Add support for Cortex-A720 for AArch64.
  34
  35 * Add support for Cortex-X4 for AArch64.
  36
  37 * Add support for various T-Head extensions (XTheadVector, XTheadZvlsseg
  38   and XTheadZvamo) from version 2.3.0 of the T-Head ISA manual.
  39
  40 * The BPF assembler now uses semi-colon (;) to separate statements, and
  41   therefore they cannot longer be used to begin line comments. This matches the
  42   behavior of the clang/LLVM BPF assembler.
  43
  44 * The BPF assembler now allows using both hash (#) and double slash (//) to
  45   begin line comments.
  46
  47 Changes in 2.41:
  48
  49 * Add support for the KVX instruction set.
  50
  51 * Add support for Intel FRED instructions.
  52
  53 * Add support for Intel LKGS instructions.
  54
  55 * Add support for Intel AMX-COMPLEX instructions.
  56
  57 * Add SME2 support to the AArch64 port.
  58
  59 * A new .insn directive is recognized by x86 gas.
  60
  61 * Add support for LoongArch LSX instructions.
  62
  63 * Add support for LoongArch LASX instructions.
  64
  65 * Add support for LoongArch LVZ instructions.
  66
  67 * Add support for LoongArch LBT instructions.
  68
  69 * Initial LoongArch support for linker relaxation has been added.
  70
  71 * Deprecate the LoongArch register aliases $v0, $v1, $x, $fv0 and $fv1.
  72
  73 Changes in 2.40:
  74
  75 * Add support for Intel RAO-INT instructions.
  76
  77 * Add support for Intel AVX-NE-CONVERT instructions.
  78
  79 * Add support for Intel MSRLIST instructions.
  80
  81 * Add support for Intel WRMSRNS instructions.
  82
  83 * Add support for Intel CMPccXADD instructions.
  84
  85 * Add support for Intel AVX-VNNI-INT8 instructions.
  86
  87 * Add support for Intel AVX-IFMA instructions.
  88
  89 * Add support for Intel PREFETCHI instructions.
  90
  91 * Add support for Intel AMX-FP16 instructions.
  92
  93 * gas now supports --compress-debug-sections=zstd to compress
  94   debug sections with zstd.
  95
  96 * Add --enable-default-compressed-debug-sections-algorithm={zlib,zstd}
  97   that selects the default compression algorithm
  98   for --enable-compressed-debug-sections.
  99
 100 * Add support for various T-Head extensions (XTheadBa, XTheadBb, XTheadBs,
 101   XTheadCmo, XTheadCondMov, XTheadFMemIdx, XTheadFmv, XTheadInt, XTheadMemIdx,
 102   XTheadMemPair, XTheadMac, and XTheadSync) from version 2.0 of the T-Head
 103   ISA manual, which are implemented in the Allwinner D1.
 104
 105 * Add support for the RISC-V Zawrs extension, version 1.0-rc4.
 106
 107 * Add support for Cortex-X1C for Arm.
 108
 109 * New command line option --gsframe to generate SFrame unwind information
 110   on x86_64 and aarch64 targets.
 111
 112 Changes in 2.39:
 113
 114 * Remove (rudimentary) support for the x86-64 sub-architectures Intel L1OM and
 115   Intel K1OM.
 116
 117 * Add support for the RISC-V Zicbop, Zicbom, and Zicboz extensions, version
 118   1.0-fd39d01.
 119
 120 * Add support for the RISC-V Zfh extension, version 1.0.
 121
 122 * Add support for the Zhinx extension, version 1.0.0-rc.
 123
 124 * Add support for the RISC-V H extension.
 125
 126 * Add support for the RISC-V Zfhmin extension, version 1.0, and Zhinxmin
 127   extension, version 1.0.0-rc.
 128
 129 Changes in 2.38:
 130
 131 * Add support for AArch64 system registers that were missing in previous
 132   releases.
 133
 134 * Add support for the LoongArch instruction set.
 135
 136 * Add a command-line option, -muse-unaligned-vector-move, for x86 target
 137   to encode aligned vector move as unaligned vector move.
 138
 139 * Add support for Cortex-R52+ for Arm.
 140
 141 * Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64.
 142
 143 * Add support for Cortex-A710 for Arm.
 144
 145 * Add support for Scalable Matrix Extension (SME) for AArch64.
 146
 147 * The --multibyte-handling=[allow|warn|warn-sym-only] option tells the
 148   assembler what to when it encoutners multibyte characters in the input.  The
 149   default is to allow them.  Setting the option to "warn" will generate a
 150   warning message whenever any multibyte character is encountered.  Using the
 151   option to "warn-sym-only" will make the assembler generate a warning whenever a
 152   symbol is defined containing multibyte characters.  (References to undefined
 153   symbols will not generate warnings).
 154
 155 * Outputs of .ds.x directive and .tfloat directive with hex input from
 156   x86 assembler have been reduced from 12 bytes to 10 bytes to match the
 157   output of .tfloat directive.
 158
 159 * Add support for 'armv8.8-a', 'armv9-a', 'armv9.1-a', 'armv9.2-a' and
 160   'armv9.3-a' for -march in AArch64 GAS.
 161
 162 * Add support for 'armv8.7-a', 'armv8.8-a', 'armv9-a', 'armv9.1-a',
 163   'armv9.2-a' and 'armv9.3-a' for -march in Arm GAS.
 164
 165 * Add support for Intel AVX512_FP16 instructions.
 166
 167 * Add support for the RISC-V scalar crypto extension, version 1.0.0.
 168
 169 * Add support for the RISC-V vector extension, version 1.0.
 170
 171 * Add support for the Z{f,d,q}inx extensions, version 1.0.0-rc.
 172
 173 * Add support for the RISC-V svinval extension, version 1.0.
 174
 175 * Add support for the RISC-V hypervisor extension, as defined by Privileged
 176   Specification 1.12.
 177
 178 Changes in 2.37:
 179
 180 * arm-symbianelf support removed.
 181
 182 * Add support for Realm Management Extension (RME) for AArch64.
 183
 184 * Add support for the Zba, Zbb, Zbc, and Zbs subsets of the RISC-V
 185   bit manipulation extension, version 0.93.
 186
 187 Changes in 2.36:
 188
 189 * Add support for Intel AVX VNNI instructions.
 190
 191 * Add support for Intel HRESET instruction.
 192
 193 * Add support for Intel UINTR instructions.
 194
 195 * Support non-absolute segment values for i386 lcall and ljmp.
 196
 197 * When setting the link order attribute of ELF sections, it is now possible to
 198   use a numeric section index instead of symbol name.
 199
 200 * Add support for Cortex-A78, Cortex-A78AE, Cortex-A78C and Cortex-X1 for
 201   AArch64 and ARM.
 202   Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
 203
 204 * Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
 205   Extension), TRBE (Trace Buffer Extension)and BRBE (Branch Record Buffer
 206   Extension) system registers for AArch64.
 207
 208 * Add support for Armv8-R and Armv8.7-A AArch64.
 209
 210 * Add support for DSB memory nXS barrier, WFET and WFIT instruction for Armv8.7
 211   AArch64.
 212
 213 * Add support for +flagm feature for -march in Armv8.4 AArch64.
 214
 215 * Add support for +ls64 feature for -march in Armv8.7 AArch64. Add atomic
 216   64-byte load/store instructions for this feature.
 217
 218 * Add support for +pauth (Pointer Authentication) feature for -march in
 219   AArch64.
 220
 221 * Add support for Intel TDX instructions.
 222
 223 * Add support for Intel Key Locker instructions.
 224
 225 * Added a .nop directive to generate a single no-op instruction in a target
 226   neutral manner.  This instruction does have an effect on DWARF line number
 227   generation, if that is active.
 228
 229 * Removed --reduce-memory-overheads and --hash-size as gas now
 230   uses hash tables that can be expand and shrink automatically.
 231
 232 * Add {disp16} pseudo prefix to x86 assembler.
 233
 234 * Add support for Intel AMX instructions.
 235
 236 * Configure with --enable-x86-used-note by default for Linux/x86.
 237
 238 * Add support for the SHF_GNU_RETAIN flag, which can be applied to
 239   sections using the 'R' flag in the .section directive.
 240   SHF_GNU_RETAIN specifies that the section should not be garbage
 241   collected by the linker.  It requires the GNU or FreeBSD ELF OSABIs.
 242
 243 * Add support for the RISC-V Zihintpause extension.
 244
 245 Changes in 2.35:
 246
 247 * X86 NaCl target support is removed.
 248
 249 * Extend .symver directive to update visibility of the original symbol
 250   and assign one original symbol to different versioned symbols.
 251
 252 * Add support for Intel SERIALIZE and TSXLDTRK instructions.
 253
 254 * Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
 255   -mlfence-before-ret= options to x86 assembler to help mitigate
 256   CVE-2020-0551.
 257
 258 * Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
 259   (if such output is being generated).  Added the ability to generate
 260   version 5 .debug_line sections.
 261
 262 * Add -mbig-obj support to i386 MingW targets.
 263
 264 * Add support for the -mriscv-isa-version argument, to select the version of
 265   the RISC-V ISA specification used when assembling.
 266
 267 * Remove support for the RISC-V privileged specification, version 1.9.
 268
 269 Changes in 2.34:
 270
 271 * Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
 272   -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
 273   options to x86 assembler to align branches within a fixed boundary
 274   with segment prefixes or NOPs.
 275
 276 * Add support for Zilog eZ80 and Zilog Z180 CPUs.
 277
 278 * Add support for z80-elf target.
 279
 280 * Add support for relocation of each byte or word of multibyte value to Z80
 281   targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
 282   with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
 283
 284 * Add SDCC support for Z80 targets.
 285
 286 Changes in 2.33:
 287
 288 * Add support for the Arm Scalable Vector Extension version 2 (SVE2)
 289   instructions.
 290
 291 * Add support for the Arm Transactional Memory Extension (TME)
 292   instructions.
 293
 294 * Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
 295   instructions.
 296
 297 * For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
 298   LLSC Errata.  Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
 299   time option to set the default behavior. Set the default if the configure
 300   option is not used to "no".
 301
 302 * Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
 303   processors.
 304
 305 * Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
 306   Cortex-A76AE, and Cortex-A77 processors.
 307
 308 * Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
 309   floating point literals.  Add .float16_format directive and
 310   -mfp16-format=[ieee|alternative] option for Arm to control the format of the
 311   encoding.
 312
 313 * Add --gdwarf-cie-version command line flag.  This allows control over which
 314   version of DWARF CIE the assembler creates.
 315
 316 Changes in 2.32:
 317
 318 * Add -mvexwig=[0|1] option to x86 assembler to control encoding of
 319   VEX.W-ignored (WIG) VEX instructions.
 320
 321 * Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
 322   notes.  Add a --enable-x86-used-note configure time option to set the
 323   default behavior.  Set the default if the configure option is not used
 324   to "no".
 325
 326 * Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
 327
 328 * Add support for the MIPS Loongson EXTensions (EXT) instructions.
 329
 330 * Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
 331
 332 * Add support for the C-SKY processor series.
 333
 334 * Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
 335   ASE.
 336
 337 Changes in 2.31:
 338
 339 * The ADR and ADRL pseudo-instructions supported by the ARM assembler
 340   now only set the bottom bit of the address of thumb function symbols
 341   if the -mthumb-interwork command line option is active.
 342
 343 * Add support for the MIPS Global INValidate (GINV) ASE.
 344
 345 * Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
 346
 347 * Add support for the Freescale S12Z architecture.
 348
 349 * Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
 350   Build Attribute notes if none are present in the input sources.  Add a
 351   --enable-generate-build-notes=[yes|no] configure time option to set the
 352   default behaviour.  Set the default if the configure option is not used
 353   to "no".
 354
 355 * Remove -mold-gcc command-line option for x86 targets.
 356
 357 * Add -O[2|s] command-line options to x86 assembler to enable alternate
 358   shorter instruction encoding.
 359
 360 * Add support for .nops directive.  It is currently supported only for
 361   x86 targets.
 362
 363 * Add support for the .insn directive on RISC-V targets.
 364
 365 Changes in 2.30:
 366
 367 * Add support for loaction views in DWARF debug line information.
 368
 369 Changes in 2.29:
 370
 371 * Add support for ELF SHF_GNU_MBIND.
 372
 373 * Add support for the WebAssembly file format and wasm32 ELF conversion.
 374
 375 * PowerPC gas now checks that the correct register class is used in
 376   instructions.  For instance, "addi %f4,%cr3,%r31" warns three times
 377   that the registers are invalid.
 378
 379 * Add support for the Texas Instruments PRU processor.
 380
 381 * Support for the ARMv8-R architecture and Cortex-R52 processor has been
 382   added to the ARM port.
 383
 384 Changes in 2.28:
 385
 386 * Add support for the RISC-V architecture.
 387
 388 * Add support for the ARM Cortex-M23 and Cortex-M33 processors.
 389
 390 Changes in 2.27:
 391
 392 * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
 393
 394 * Add --no-pad-sections to stop the assembler from padding the end of output
 395   sections up to their alignment boundary.
 396
 397 * Support for the ARMv8-M architecture has been added to the ARM port.  Support
 398   for the ARMv8-M Security and DSP Extensions has also been added to the ARM
 399   port.
 400
 401 * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
 402   .extCoreRegister pseudo-ops that allow an user to define custom
 403   instructions, conditional codes, auxiliary and core registers.
 404
 405 * Add a configure option --enable-elf-stt-common to decide whether ELF
 406   assembler should generate common symbols with the STT_COMMON type by
 407   default.  Default to no.
 408
 409 * New command-line option --elf-stt-common= for ELF targets to control
 410   whether to generate common symbols with the STT_COMMON type.
 411
 412 * Add ability to set section flags and types via numeric values for ELF
 413   based targets.
 414
 415 * Add a configure option --enable-x86-relax-relocations to decide whether
 416   x86 assembler should generate relax relocations by default.  Default to
 417   yes, except for x86 Solaris targets older than Solaris 12.
 418
 419 * New command-line option -mrelax-relocations= for x86 target to control
 420   whether to generate relax relocations.
 421
 422 * New command-line option -mfence-as-lock-add=yes for x86 target to encode
 423   lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
 424
 425 * Add assembly-time relaxation option for ARC cpus.
 426
 427 * Add --with-cpu=TYPE configure option for ARC gas.  This allows the default
 428   cpu type to be adjusted at configure time.
 429
 430 Changes in 2.26:
 431
 432 * Add a configure option --enable-compressed-debug-sections={all,gas} to
 433   decide whether DWARF debug sections should be compressed by default.
 434
 435 * Add support for the ARC EM/HS, and ARC600/700 architectures.  Remove
 436   assembler support for Argonaut RISC architectures.
 437
 438 * Symbol and label names can now be enclosed in double quotes (") which allows
 439   them to contain characters that are not part of valid symbol names in high
 440   level languages.
 441
 442 * Added the correctly spelled -march=armv6kz, for ARMv6KZ support.  The
 443   previous spelling, -march=armv6zk, is still accepted.
 444
 445 * Support for the ARMv8.1 architecture has been added to the Aarch64 port.
 446   Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
 447   extensions has also been added to the Aarch64 port.
 448
 449 * Support for the ARMv8.1 architecture has been added to the ARM port.  Support
 450   for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
 451   been added to the ARM port.
 452
 453 * Extend --compress-debug-sections option to support
 454   --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
 455   targets.
 456
 457 * --compress-debug-sections is turned on for Linux/x86 by default.
 458
 459 Changes in 2.25:
 460
 461 * Add support for the AVR Tiny microcontrollers.
 462
 463 * Replace support for openrisc and or32 with support for or1k.
 464
 465 * Enhanced the ARM port to accept the assembler output from the CodeComposer
 466   Studio tool.  Support is enabled via the new command-line option -mccs.
 467
 468 * Add support for the Andes NDS32.
 469
 470 Changes in 2.24:
 471
 472 * Add support for the Texas Instruments MSP430X processor.
 473
 474 * Add -gdwarf-sections command-line option to enable per-code-section
 475   generation of DWARF .debug_line sections.
 476
 477 * Add support for Altera Nios II.
 478
 479 * Add support for the Imagination Technologies Meta processor.
 480
 481 * Add support for the v850e3v5.
 482
 483 * Remove assembler support for MIPS ECOFF targets.
 484
 485 Changes in 2.23:
 486
 487 * Add support for the 64-bit ARM architecture: AArch64.
 488
 489 * Add support for S12X processor.
 490
 491 * Add support for the VLE extension to the PowerPC architecture.
 492
 493 * Add support for the Freescale XGATE architecture.
 494
 495 * Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
 496   directives.  These are currently available only for x86 and ARM targets.
 497
 498 * Add support for the Renesas RL78 architecture.
 499
 500 * Add support for the Adapteva EPIPHANY architecture.
 501
 502 * For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
 503
 504 Changes in 2.22:
 505
 506 * Add support for the Tilera TILEPro and TILE-Gx architectures.
 507
 508 Changes in 2.21:
 509
 510 * Gas no longer requires doubling of ampersands in macros.
 511
 512 * Add support for the TMS320C6000 (TI C6X) processor family.
 513
 514 * GAS now understands an extended syntax in the .section directive flags
 515   for COFF targets that allows the section's alignment to be specified.  This
 516   feature has also been backported to the 2.20 release series, starting with
 517   2.20.1.
 518
 519 * Add support for the Renesas RX processor.
 520
 521 * New command-line option, --compress-debug-sections, which requests
 522   compression of DWARF debug information sections in the relocatable output
 523   file.  Compressed debug sections are supported by readelf, objdump, and
 524   gold, but not currently by Gnu ld.
 525
 526 Changes in 2.20:
 527
 528 * Added support for v850e2 and v850e2v3.
 529
 530 * GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
 531   pseudo op.  It marks the symbol as being globally unique in the entire
 532   process.
 533
 534 * ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
 535   in binary rather than text.
 536
 537 * Add support for common symbol alignment to PE formats.
 538
 539 * Add support for the new discriminator column in the DWARF line table,
 540   with a discriminator operand for the .loc directive.
 541
 542 * Add support for Sunplus score architecture.
 543
 544 * The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
 545   indicate that if the symbol is the target of a relocation, its value should
 546   not be use.  Instead the function should be invoked and its result used as
 547   the value.
 548
 549 * Add support for Lattice Mico32 (lm32) architecture.
 550
 551 * Add support for Xilinx MicroBlaze architecture.
 552
 553 Changes in 2.19:
 554
 555 * New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
 556   tables without runtime relocation.
 557
 558 * New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
 559   adds compatibility with H'00 style hex constants.
 560
 561 * New command-line option, -msse-check=[none|error|warning], for x86
 562   targets.
 563
 564 * New sub-option added to the assembler's -a command-line switch to
 565   generate a listing output.  The 'g' sub-option will insert into the listing
 566   various information about the assembly, such as assembler version, the
 567   command-line options used, and a time stamp.
 568
 569 * New command-line option -msse2avx for x86 target to encode SSE
 570   instructions with VEX prefix.
 571
 572 * Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
 573
 574 * New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
 575   -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
 576   -mnaked-reg and -mold-gcc, for x86 targets.
 577
 578 * Support for generating wide character strings has been added via the new
 579   pseudo ops: .string16, .string32 and .string64.
 580
 581 * Support for SSE5 has been added to the i386 port.
 582
 583 Changes in 2.18:
 584
 585 * The GAS sources are now released under the GPLv3.
 586
 587 * Support for the National Semiconductor CR16 target has been added.
 588
 589 * Added gas .reloc pseudo.  This is a low-level interface for creating
 590   relocations.
 591
 592 * Add support for x86_64 PE+ target.
 593
 594 * Add support for Score target.
 595
 596 Changes in 2.17:
 597
 598 * Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
 599
 600 * Support for ms2 architecture has been added.
 601
 602 * Support for the Z80 processor family has been added.
 603
 604 * Add support for the "@<file>" syntax to the command line, so that extra
 605   switches can be read from <file>.
 606
 607 * The SH target supports a new command-line switch --enable-reg-prefix which,
 608   if enabled, will allow register names to be optionally prefixed with a $
 609   character.  This allows register names to be distinguished from label names.
 610
 611 * Macros with a variable number of arguments are now supported. See the
 612   documentation for how this works.
 613
 614 * Added --reduce-memory-overheads switch to reduce the size of the hash
 615   tables used, at the expense of longer assembly times, and
 616   --hash-size=<NUMBER> to set the size of the hash tables used by gas.
 617
 618 * Macro names and macro parameter names can now be any identifier that would
 619   also be legal as a symbol elsewhere. For macro parameter names, this is
 620   known to cause problems in certain sources when the respective target uses
 621   characters inconsistently, and thus macro parameter references may no longer
 622   be recognized as such (see the documentation for details).
 623
 624 * Support the .f_floating, .d_floating, .g_floating and .h_floating directives
 625   for the VAX target in order to be more compatible with the VAX MACRO
 626   assembler.
 627
 628 * New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
 629
 630 Changes in 2.16:
 631
 632 * Redefinition of macros now results in an error.
 633
 634 * New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
 635
 636 * New command-line option -munwind-check=[warning|error] for IA64
 637   targets.
 638
 639 * The IA64 port now uses automatic dependency violation removal as its default
 640   mode.
 641
 642 * Port to MAXQ processor contributed by HCL Tech.
 643
 644 * Added support for generating unwind tables for ARM ELF targets.
 645
 646 * Add a -g command-line option to generate debug information in the target's
 647   preferred debug format.
 648
 649 * Support for the crx-elf target added.
 650
 651 * Support for the sh-symbianelf target added.
 652
 653 * Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
 654   on pe[i]-i386; required for this target's DWARF 2 support.
 655
 656 * Support for Motorola MCF521x/5249/547x/548x added.
 657
 658 * Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
 659   instrucitons.
 660
 661 * New command-line option -mno-shared for MIPS ELF targets.
 662
 663 * New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
 664   added to enter (and leave) alternate macro syntax mode.
 665
 666 Changes in 2.15:
 667
 668 * The MIPS -membedded-pic option (Embedded-PIC code generation) is
 669   deprecated and will be removed in a future release.
 670
 671 * Added PIC m32r Linux (ELF) and support to M32R assembler.
 672
 673 * Added support for ARM V6.
 674
 675 * Added support for sh4a and variants.
 676
 677 * Support for Renesas M32R2 added.
 678
 679 * Limited support for Mapping Symbols as specified in the ARM ELF
 680   specification has been added to the arm assembler.
 681
 682 * On ARM architectures, added a new gas directive ".unreq" that undoes
 683   definitions created by ".req".
 684
 685 * Support for Motorola ColdFire MCF528x added.
 686
 687 * Added --gstabs+ switch to enable the generation of STABS debug format
 688   information with GNU extensions.
 689
 690 * Added support for MIPS64 Release 2.
 691
 692 * Added support for v850e1.
 693
 694 * Added -n switch for x86 assembler.  By default, x86 GAS replaces
 695   multiple nop instructions used for alignment within code sections
 696   with multi-byte nop instructions such as leal 0(%esi,1),%esi.  This
 697   switch disables the optimization.
 698
 699 * Removed -n option from MIPS assembler.  It was not useful, and confused the
 700   existing -non_shared option.
 701
 702 Changes in 2.14:
 703
 704 * Added support for MIPS32 Release 2.
 705
 706 * Added support for Xtensa architecture.
 707
 708 * Support for Intel's iWMMXt processor (an ARM variant) added.
 709
 710 * An assembler test generator has been contributed and an example file that
 711   uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
 712
 713 * Support for SH2E added.
 714
 715 * GASP has now been removed.
 716
 717 * Support for Texas Instruments TMS320C4x and TMS320C3x series of
 718   DSP's contributed by Michael Hayes and Svein E. Seldal.
 719
 720 * Support for the Ubicom IP2xxx microcontroller added.
 721
 722 Changes in 2.13:
 723
 724 * Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
 725   and FR500 included.
 726
 727 * Support for DLX processor added.
 728
 729 * GASP has now been deprecated and will be removed in a future release.  Use
 730   the macro facilities in GAS instead.
 731
 732 * GASP now correctly parses floating point numbers. Unless the base is
 733   explicitly specified, they are interpreted as decimal numbers regardless of
 734   the currently specified base.
 735
 736 Changes in 2.12:
 737
 738 * Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
 739
 740 * Support for the OpenRISC 32-bit embedded processor by OpenCores.
 741
 742 * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
 743   specifying the target instruction set.  The old method of specifying the
 744   target processor has been deprecated, but is still accepted for
 745   compatibility.
 746
 747 * Support for the VFP floating-point instruction set has been added to
 748   the ARM assembler.
 749
 750 * New psuedo op: .incbin to include a set of binary data at a given point
 751   in the assembly.  Contributed by Anders Norlander.
 752
 753 * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
 754   but still works for compatability.
 755
 756 * The MIPS assembler no longer issues a warning by default when it
 757   generates a nop instruction from a macro. The new command-line option
 758   -n will turn on the warning.
 759
 760 Changes in 2.11:
 761
 762 * Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
 763
 764 * x86 gas now supports the full Pentium4 instruction set.
 765
 766 * Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
 767
 768 * Support for Motorola 68HC11 and 68HC12.
 769
 770 * Support for Texas Instruments TMS320C54x (tic54x).
 771
 772 * Support for IA-64.
 773
 774 * Support for i860, by Jason Eckhardt.
 775
 776 * Support for CRIS (Axis Communications ETRAX series).
 777
 778 * x86 gas has a new .arch pseudo op to specify the target CPU architecture.
 779
 780 * x86 gas -q command-line option quietens warnings about register size changes
 781   due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
 782   translating various deprecated floating point instructions.
 783
 784 Changes in 2.10:
 785
 786 * Support for the ARM msr instruction was changed to only allow an immediate
 787   operand when altering the flags field.
 788
 789 * Support for ATMEL AVR.
 790
 791 * Support for IBM 370 ELF.  Somewhat experimental.
 792
 793 * Support for numbers with suffixes.
 794
 795 * Added support for breaking to the end of repeat loops.
 796
 797 * Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
 798
 799 * New .elseif pseudo-op added.
 800
 801 * New --fatal-warnings option.
 802
 803 * picoJava architecture support added.
 804
 805 * Motorola MCore 210 processor support added.
 806
 807 * A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
 808   assembly programs with intel syntax.
 809
 810 * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
 811
 812 * Added -gdwarf2 option to generate DWARF 2 debugging information.
 813
 814 * Full 16-bit mode support for i386.
 815
 816 * Greatly improved instruction operand checking for i386.  This change will
 817   produce errors or warnings on incorrect assembly code that previous versions
 818   of gas accepted.  If you get unexpected messages from code that worked with
 819   older versions of gas, please double check the code before reporting a bug.
 820
 821 * Weak symbol support added for COFF targets.
 822
 823 * Mitsubishi D30V support added.
 824
 825 * Texas Instruments c80 (tms320c80) support added.
 826
 827 * i960 ELF support added.
 828
 829 * ARM ELF support added.
 830
 831 Changes in 2.9:
 832
 833 * Texas Instruments c30 (tms320c30) support added.
 834
 835 * The assembler now optimizes the exception frame information generated by egcs
 836   and gcc 2.8.  The new --traditional-format option disables this optimization.
 837
 838 * Added --gstabs option to generate stabs debugging information.
 839
 840 * The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
 841   listing.
 842
 843 * Added -MD option to print dependencies.
 844
 845 Changes in 2.8:
 846
 847 * BeOS support added.
 848
 849 * MIPS16 support added.
 850
 851 * Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
 852
 853 * Alpha/VMS support added.
 854
 855 * m68k options --base-size-default-16, --base-size-default-32,
 856   --disp-size-default-16, and --disp-size-default-32 added.
 857
 858 * The alignment directives now take an optional third argument, which is the
 859   maximum number of bytes to skip.  If doing the alignment would require
 860   skipping more than the given number of bytes, the alignment is not done at
 861   all.
 862
 863 * The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
 864
 865 * The -a option takes a new suboption, c (e.g., -alc), to skip false
 866   conditionals in listings.
 867
 868 * Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
 869   the symbol is already defined.
 870
 871 Changes in 2.7:
 872
 873 * The PowerPC assembler now allows the use of symbolic register names (r0,
 874   etc.) if -mregnames is used.  Symbolic names preceded by a '%' (%r0, etc.)
 875   can be used any time.  PowerPC 860 move to/from SPR instructions have been
 876   added.
 877
 878 * Alpha Linux (ELF) support added.
 879
 880 * PowerPC ELF support added.
 881
 882 * m68k Linux (ELF) support added.
 883
 884 * i960 Hx/Jx support added.
 885
 886 * i386/PowerPC gnu-win32 support added.
 887
 888 * SCO ELF support added.  For OpenServer 5 targets (i386-unknown-sco3.2v5) the
 889   default is to build COFF-only support.  To get a set of tools that generate
 890   ELF (they'll understand both COFF and ELF), you must configure with
 891   target=i386-unknown-sco3.2v5elf.
 892
 893 * m88k-motorola-sysv3* support added.
 894
 895 Changes in 2.6:
 896
 897 * Gas now directly supports macros, without requiring GASP.
 898
 899 * Gas now has an MRI assembler compatibility mode.  Use -M or --mri to select
 900   MRI mode.  The pseudo-op ``.mri 1'' will switch into the MRI mode until the
 901   ``.mri 0'' is seen; this can be convenient for inline assembler code.
 902
 903 * Added --defsym SYM=VALUE option.
 904
 905 * Added -mips4 support to MIPS assembler.
 906
 907 * Added PIC support to Solaris and SPARC SunOS 4 assembler.
 908
 909 Changes in 2.4:
 910
 911 * Converted this directory to use an autoconf-generated configure script.
 912
 913 * ARM support, from Richard Earnshaw.
 914
 915 * Updated VMS support, from Pat Rankin, including considerably improved
 916   debugging support.
 917
 918 * Support for the control registers in the 68060.
 919
 920 * Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
 921   provide for possible future gcc changes, for targets where gas provides some
 922   features not available in the native assembler.  If the native assembler is
 923   used, it should become obvious pretty quickly what the problem is.
 924
 925 * Usage message is available with "--help".
 926
 927 * The GNU Assembler Preprocessor (gasp) is included.  (Actually, it was in 2.3
 928   also, but didn't get into the NEWS file.)
 929
 930 * Weak symbol support for a.out.
 931
 932 * A bug in the listing code which could cause an infinite loop has been fixed.
 933   Bugs in listings when generating a COFF object file have also been fixed.
 934
 935 * Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
 936   Paul Kranenburg.
 937
 938 * Improved Alpha support.  Immediate constants can have a much larger range
 939   now. Support for the 21164 has been contributed by Digital.
 940
 941 * Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
 942
 943 Changes in 2.3:
 944
 945 * Mach i386 support, by David Mackenzie and Ken Raeburn.
 946
 947 * RS/6000 and PowerPC support by Ian Taylor.
 948
 949 * VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
 950   based on mail received from various people.  The `-h#' option should work
 951   again too.
 952
 953 * HP-PA work, by Jeff Law.  Note, for the PA, gas-2.3 has been designed to work
 954   with gdb-4.12 and gcc-2.6.  As gcc-2.6 has not been released yet, a special
 955   version of gcc-2.5.8 has been patched to work with gas-2.3.  You can retrieve
 956   this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
 957   in the "dist" directory.
 958
 959 * Vax support in gas fixed for BSD, so it builds and seems to run a couple
 960   simple tests okay.  I haven't put it through extensive testing.  (GNU make is
 961   currently required for BSD 4.3 builds.)
 962
 963 * Support for the DEC Alpha, running OSF/1 (ECOFF format).  The gas support is
 964   based on code donated by CMU, which used an a.out-based format.  I'm afraid
 965   the alpha-a.out support is pretty badly mangled, and much of it removed;
 966   making it work will require rewriting it as BFD support for the format anyways.
 967
 968 * Irix 5 support.
 969
 970 * The test suites have been fixed up a bit, so that they should work with a
 971   couple different versions of expect and dejagnu.
 972
 973 * Symbols' values are now handled internally as expressions, permitting more
 974   flexibility in evaluating them in some cases.  Some details of relocation
 975   handling have also changed, and simple constant pool management has been
 976   added, to make the Alpha port easier.
 977
 978 * New option "--statistics" for printing out program run times.  This is
 979   intended to be used with the gcc "-Q" option, which prints out times spent in
 980   various phases of compilation.  (You should be able to get all of them
 981   printed out with "gcc -Q -Wa,--statistics", I think.)
 982
 983 Changes in 2.2:
 984
 985 * RS/6000 AIX and MIPS SGI Irix 5 support has been added.
 986
 987 * Configurations that are still in development (and therefore are convenient to
 988   have listed in configure.in) still get rejected without a minor change to
 989   gas/Makefile.in, so people not doing development work shouldn't get the
 990   impression that support for such configurations is actually believed to be
 991   reliable.
 992
 993 * The program name (usually "as") is printed when a fatal error message is
 994   displayed.  This should prevent some confusion about the source of occasional
 995   messages about "internal errors".
 996
 997 * ELF support is falling into place.  Support for the 386 should be working.
 998   Support for SPARC Solaris is in.  HPPA support from Utah is being integrated.
 999
1000 * Symbol values are maintained as expressions instead of being immediately
1001   boiled down to add-symbol, sub-symbol, and constant.  This permits slightly
1002   more complex calculations involving symbols whose values are not alreadey
1003   known.
1004
1005 * DBX-style debugging info ("stabs") is now supported for COFF formats.
1006   If any stabs directives are seen in the source, GAS will create two new
1007   sections: a ".stab" and a ".stabstr" section.  The format of the .stab
1008   section is nearly identical to the a.out symbol format, and .stabstr is
1009   its string table.  For this to be useful, you must have configured GCC
1010   to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
1011   that can use the stab sections (4.11 or later).
1012
1013 * LynxOS, on i386 and m68k platforms, is now supported.  SPARC LynxOS
1014   support is in progress.
1015
1016 Changes in 2.1:
1017
1018 * Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
1019   incorporated, but not well tested yet.
1020
1021 * Altered the opcode table split for m68k; it should require less VM to compile
1022   with gcc now.
1023
1024 * Some minor adjustments to add (Convergent Technologies') Miniframe support,
1025   suggested by Ronald Cole.
1026
1027 * HPPA support (running OSF only, not HPUX) has been contributed by Utah.  This
1028   includes improved ELF support, which I've started adapting for SPARC Solaris
1029   2.x.  Integration isn't completely, so it probably won't work.
1030
1031 * HP9000/300 support, donated by HP, has been merged in.
1032
1033 * Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
1034
1035 * Better error messages for unsupported configurations (e.g., hppa-hpux).
1036
1037 * Test suite framework is starting to become reasonable.
1038
1039 Changes in 2.0:
1040
1041 * Mostly bug fixes.
1042
1043 * Some more merging of BFD and ELF code, but ELF still doesn't work.
1044
1045 Changes in 1.94:
1046
1047 * BFD merge is partly done.  Adventurous souls may try giving configure the
1048   "--with-bfd-assembler" option.  Currently, ELF format requires it, a.out
1049   format accepts it; SPARC CPU accepts it.  It's the default only for OS "elf"
1050   or "solaris".  (ELF isn't really supported yet.  It needs work.  I've got
1051   some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
1052   fully merged yet.)
1053
1054 * The 68K opcode table has been split in half.  It should now compile under gcc
1055   without consuming ridiculous amounts of memory.
1056
1057 * A couple data structures have been reduced in size.  This should result in
1058   saving a little bit of space at runtime.
1059
1060 * Support for MIPS, from OSF and Ralph Campbell, has been merged in.  The OSF
1061   code provided ROSE format support, which I haven't merged in yet.  (I can
1062   make it available, if anyone wants to try it out.)  Ralph's code, for BSD
1063   4.4, supports a.out format.  We don't have ECOFF support in just yet; it's
1064   coming.
1065
1066 * Support for the Hitachi H8/500 has been added.
1067
1068 * VMS host and target support should be working now, thanks chiefly to Eric
1069   Youngdale.
1070
1071 Changes in 1.93.01:
1072
1073 * For m68k, support for more processors has been added: 68040, CPU32, 68851.
1074
1075 * For i386, .align is now power-of-two; was number-of-bytes.
1076
1077 * For m68k, "%" is now accepted before register names.  For COFF format, which
1078   doesn't use underscore prefixes for C labels, it is required, so variable "a0"
1079   can be distinguished from the register.
1080
1081 * Last public release was 1.38.  Lots of configuration changes since then, lots
1082   of new CPUs and formats, lots of bugs fixed.
1083
1084 \f
1085 Copyright (C) 2012-2023 Free Software Foundation, Inc.
1086
1087 Copying and distribution of this file, with or without modification,
1088 are permitted in any medium without royalty provided the copyright
1089 notice and this notice are preserved.
1090
1091 Local variables:
1092 fill-column: 79
1093 End: