gas/NEWS

   1 -*- text -*-
   2
   3 * Initial support for Intel APX: 32 GPRs, NDD, PUSH2/POP2 and PUSHP/POPP.
   4
   5 * On RISC-V macro instructions expanding to AUIPC and a load, store, or branch
   6   no longer accept x0 as an intermediate and/or destination register.
   7
   8 * Add support for Reliability, Availability and Serviceability extension v2
   9   (RASv2) for AArch64.
  10
  11 * Add support for 128-bit Atomic Instructions (LSE128) for AArch64.
  12
  13 * Add support for Guarded Control Stack (GCS) for AArch64.
  14
  15 * Add support for AArch64 Check Feature Status Extension (CHK).
  16
  17 * Add support for 'armv8.9-a' and 'armv9.4-a' for -march in AArch64 GAS.
  18
  19 * Add support for Intel USER_MSR instructions.
  20
  21 * Add support for Intel AVX10.1.
  22
  23 * Add support for Intel PBNDKB instructions.
  24
  25 * Add support for Intel SM4 instructions.
  26
  27 * Add support for Intel SM3 instructions.
  28
  29 * Add support for Intel SHA512 instructions.
  30
  31 * Add support for Intel AVX-VNNI-INT16 instructions.
  32
  33 * Add support for Cortex-A520 for AArch64.
  34
  35 * Add support for Cortex-A720 for AArch64.
  36
  37 * Add support for Cortex-X3 for AArch64.
  38
  39 * Add support for Cortex-X4 for AArch64.
  40
  41 * Add support for RISC-V T-Head extensions (XTheadVector, XTheadZvlsseg
  42   and XTheadZvamo) from version 2.3.0 of the T-Head ISA manual.
  43
  44 * Add support for RISC-V CORE-V extensions (XCVmac, XCValu) with version 1.0.
  45
  46 * Add support for RISC-V SiFive VCIX extension (XSfVcp) with version 1.0.
  47
  48 * The BPF assembler now uses semi-colon (;) to separate statements, and
  49   therefore they cannot longer be used to begin line comments. This matches the
  50   behavior of the clang/LLVM BPF assembler.
  51
  52 * The BPF assembler now allows using both hash (#) and double slash (//) to
  53   begin line comments.
  54
  55 Changes in 2.41:
  56
  57 * Add support for the KVX instruction set.
  58
  59 * Add support for Intel FRED instructions.
  60
  61 * Add support for Intel LKGS instructions.
  62
  63 * Add support for Intel AMX-COMPLEX instructions.
  64
  65 * Add SME2 support to the AArch64 port.
  66
  67 * A new .insn directive is recognized by x86 gas.
  68
  69 * Add support for LoongArch LSX instructions.
  70
  71 * Add support for LoongArch LASX instructions.
  72
  73 * Add support for LoongArch LVZ instructions.
  74
  75 * Add support for LoongArch LBT instructions.
  76
  77 * Initial LoongArch support for linker relaxation has been added.
  78
  79 * Deprecate the LoongArch register aliases $v0, $v1, $x, $fv0 and $fv1.
  80
  81 Changes in 2.40:
  82
  83 * Add support for Intel RAO-INT instructions.
  84
  85 * Add support for Intel AVX-NE-CONVERT instructions.
  86
  87 * Add support for Intel MSRLIST instructions.
  88
  89 * Add support for Intel WRMSRNS instructions.
  90
  91 * Add support for Intel CMPccXADD instructions.
  92
  93 * Add support for Intel AVX-VNNI-INT8 instructions.
  94
  95 * Add support for Intel AVX-IFMA instructions.
  96
  97 * Add support for Intel PREFETCHI instructions.
  98
  99 * Add support for Intel AMX-FP16 instructions.
 100
 101 * gas now supports --compress-debug-sections=zstd to compress
 102   debug sections with zstd.
 103
 104 * Add --enable-default-compressed-debug-sections-algorithm={zlib,zstd}
 105   that selects the default compression algorithm
 106   for --enable-compressed-debug-sections.
 107
 108 * Add support for various T-Head extensions (XTheadBa, XTheadBb, XTheadBs,
 109   XTheadCmo, XTheadCondMov, XTheadFMemIdx, XTheadFmv, XTheadInt, XTheadMemIdx,
 110   XTheadMemPair, XTheadMac, and XTheadSync) from version 2.0 of the T-Head
 111   ISA manual, which are implemented in the Allwinner D1.
 112
 113 * Add support for the RISC-V Zawrs extension, version 1.0-rc4.
 114
 115 * Add support for Cortex-X1C for Arm.
 116
 117 * New command line option --gsframe to generate SFrame unwind information
 118   on x86_64 and aarch64 targets.
 119
 120 Changes in 2.39:
 121
 122 * Remove (rudimentary) support for the x86-64 sub-architectures Intel L1OM and
 123   Intel K1OM.
 124
 125 * Add support for the RISC-V Zicbop, Zicbom, and Zicboz extensions, version
 126   1.0-fd39d01.
 127
 128 * Add support for the RISC-V Zfh extension, version 1.0.
 129
 130 * Add support for the Zhinx extension, version 1.0.0-rc.
 131
 132 * Add support for the RISC-V H extension.
 133
 134 * Add support for the RISC-V Zfhmin extension, version 1.0, and Zhinxmin
 135   extension, version 1.0.0-rc.
 136
 137 Changes in 2.38:
 138
 139 * Add support for AArch64 system registers that were missing in previous
 140   releases.
 141
 142 * Add support for the LoongArch instruction set.
 143
 144 * Add a command-line option, -muse-unaligned-vector-move, for x86 target
 145   to encode aligned vector move as unaligned vector move.
 146
 147 * Add support for Cortex-R52+ for Arm.
 148
 149 * Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64.
 150
 151 * Add support for Cortex-A710 for Arm.
 152
 153 * Add support for Scalable Matrix Extension (SME) for AArch64.
 154
 155 * The --multibyte-handling=[allow|warn|warn-sym-only] option tells the
 156   assembler what to when it encoutners multibyte characters in the input.  The
 157   default is to allow them.  Setting the option to "warn" will generate a
 158   warning message whenever any multibyte character is encountered.  Using the
 159   option to "warn-sym-only" will make the assembler generate a warning whenever a
 160   symbol is defined containing multibyte characters.  (References to undefined
 161   symbols will not generate warnings).
 162
 163 * Outputs of .ds.x directive and .tfloat directive with hex input from
 164   x86 assembler have been reduced from 12 bytes to 10 bytes to match the
 165   output of .tfloat directive.
 166
 167 * Add support for 'armv8.8-a', 'armv9-a', 'armv9.1-a', 'armv9.2-a' and
 168   'armv9.3-a' for -march in AArch64 GAS.
 169
 170 * Add support for 'armv8.7-a', 'armv8.8-a', 'armv9-a', 'armv9.1-a',
 171   'armv9.2-a' and 'armv9.3-a' for -march in Arm GAS.
 172
 173 * Add support for Intel AVX512_FP16 instructions.
 174
 175 * Add support for the RISC-V scalar crypto extension, version 1.0.0.
 176
 177 * Add support for the RISC-V vector extension, version 1.0.
 178
 179 * Add support for the Z{f,d,q}inx extensions, version 1.0.0-rc.
 180
 181 * Add support for the RISC-V svinval extension, version 1.0.
 182
 183 * Add support for the RISC-V hypervisor extension, as defined by Privileged
 184   Specification 1.12.
 185
 186 Changes in 2.37:
 187
 188 * arm-symbianelf support removed.
 189
 190 * Add support for Realm Management Extension (RME) for AArch64.
 191
 192 * Add support for the Zba, Zbb, Zbc, and Zbs subsets of the RISC-V
 193   bit manipulation extension, version 0.93.
 194
 195 Changes in 2.36:
 196
 197 * Add support for Intel AVX VNNI instructions.
 198
 199 * Add support for Intel HRESET instruction.
 200
 201 * Add support for Intel UINTR instructions.
 202
 203 * Support non-absolute segment values for i386 lcall and ljmp.
 204
 205 * When setting the link order attribute of ELF sections, it is now possible to
 206   use a numeric section index instead of symbol name.
 207
 208 * Add support for Cortex-A78, Cortex-A78AE, Cortex-A78C and Cortex-X1 for
 209   AArch64 and ARM.
 210   Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
 211
 212 * Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
 213   Extension), TRBE (Trace Buffer Extension)and BRBE (Branch Record Buffer
 214   Extension) system registers for AArch64.
 215
 216 * Add support for Armv8-R and Armv8.7-A AArch64.
 217
 218 * Add support for DSB memory nXS barrier, WFET and WFIT instruction for Armv8.7
 219   AArch64.
 220
 221 * Add support for +flagm feature for -march in Armv8.4 AArch64.
 222
 223 * Add support for +ls64 feature for -march in Armv8.7 AArch64. Add atomic
 224   64-byte load/store instructions for this feature.
 225
 226 * Add support for +pauth (Pointer Authentication) feature for -march in
 227   AArch64.
 228
 229 * Add support for Intel TDX instructions.
 230
 231 * Add support for Intel Key Locker instructions.
 232
 233 * Added a .nop directive to generate a single no-op instruction in a target
 234   neutral manner.  This instruction does have an effect on DWARF line number
 235   generation, if that is active.
 236
 237 * Removed --reduce-memory-overheads and --hash-size as gas now
 238   uses hash tables that can be expand and shrink automatically.
 239
 240 * Add {disp16} pseudo prefix to x86 assembler.
 241
 242 * Add support for Intel AMX instructions.
 243
 244 * Configure with --enable-x86-used-note by default for Linux/x86.
 245
 246 * Add support for the SHF_GNU_RETAIN flag, which can be applied to
 247   sections using the 'R' flag in the .section directive.
 248   SHF_GNU_RETAIN specifies that the section should not be garbage
 249   collected by the linker.  It requires the GNU or FreeBSD ELF OSABIs.
 250
 251 * Add support for the RISC-V Zihintpause extension.
 252
 253 Changes in 2.35:
 254
 255 * X86 NaCl target support is removed.
 256
 257 * Extend .symver directive to update visibility of the original symbol
 258   and assign one original symbol to different versioned symbols.
 259
 260 * Add support for Intel SERIALIZE and TSXLDTRK instructions.
 261
 262 * Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
 263   -mlfence-before-ret= options to x86 assembler to help mitigate
 264   CVE-2020-0551.
 265
 266 * Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
 267   (if such output is being generated).  Added the ability to generate
 268   version 5 .debug_line sections.
 269
 270 * Add -mbig-obj support to i386 MingW targets.
 271
 272 * Add support for the -mriscv-isa-version argument, to select the version of
 273   the RISC-V ISA specification used when assembling.
 274
 275 * Remove support for the RISC-V privileged specification, version 1.9.
 276
 277 Changes in 2.34:
 278
 279 * Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
 280   -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
 281   options to x86 assembler to align branches within a fixed boundary
 282   with segment prefixes or NOPs.
 283
 284 * Add support for Zilog eZ80 and Zilog Z180 CPUs.
 285
 286 * Add support for z80-elf target.
 287
 288 * Add support for relocation of each byte or word of multibyte value to Z80
 289   targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
 290   with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
 291
 292 * Add SDCC support for Z80 targets.
 293
 294 Changes in 2.33:
 295
 296 * Add support for the Arm Scalable Vector Extension version 2 (SVE2)
 297   instructions.
 298
 299 * Add support for the Arm Transactional Memory Extension (TME)
 300   instructions.
 301
 302 * Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
 303   instructions.
 304
 305 * For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
 306   LLSC Errata.  Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
 307   time option to set the default behavior. Set the default if the configure
 308   option is not used to "no".
 309
 310 * Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
 311   processors.
 312
 313 * Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
 314   Cortex-A76AE, and Cortex-A77 processors.
 315
 316 * Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
 317   floating point literals.  Add .float16_format directive and
 318   -mfp16-format=[ieee|alternative] option for Arm to control the format of the
 319   encoding.
 320
 321 * Add --gdwarf-cie-version command line flag.  This allows control over which
 322   version of DWARF CIE the assembler creates.
 323
 324 Changes in 2.32:
 325
 326 * Add -mvexwig=[0|1] option to x86 assembler to control encoding of
 327   VEX.W-ignored (WIG) VEX instructions.
 328
 329 * Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
 330   notes.  Add a --enable-x86-used-note configure time option to set the
 331   default behavior.  Set the default if the configure option is not used
 332   to "no".
 333
 334 * Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
 335
 336 * Add support for the MIPS Loongson EXTensions (EXT) instructions.
 337
 338 * Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
 339
 340 * Add support for the C-SKY processor series.
 341
 342 * Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
 343   ASE.
 344
 345 Changes in 2.31:
 346
 347 * The ADR and ADRL pseudo-instructions supported by the ARM assembler
 348   now only set the bottom bit of the address of thumb function symbols
 349   if the -mthumb-interwork command line option is active.
 350
 351 * Add support for the MIPS Global INValidate (GINV) ASE.
 352
 353 * Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
 354
 355 * Add support for the Freescale S12Z architecture.
 356
 357 * Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
 358   Build Attribute notes if none are present in the input sources.  Add a
 359   --enable-generate-build-notes=[yes|no] configure time option to set the
 360   default behaviour.  Set the default if the configure option is not used
 361   to "no".
 362
 363 * Remove -mold-gcc command-line option for x86 targets.
 364
 365 * Add -O[2|s] command-line options to x86 assembler to enable alternate
 366   shorter instruction encoding.
 367
 368 * Add support for .nops directive.  It is currently supported only for
 369   x86 targets.
 370
 371 * Add support for the .insn directive on RISC-V targets.
 372
 373 Changes in 2.30:
 374
 375 * Add support for loaction views in DWARF debug line information.
 376
 377 Changes in 2.29:
 378
 379 * Add support for ELF SHF_GNU_MBIND.
 380
 381 * Add support for the WebAssembly file format and wasm32 ELF conversion.
 382
 383 * PowerPC gas now checks that the correct register class is used in
 384   instructions.  For instance, "addi %f4,%cr3,%r31" warns three times
 385   that the registers are invalid.
 386
 387 * Add support for the Texas Instruments PRU processor.
 388
 389 * Support for the ARMv8-R architecture and Cortex-R52 processor has been
 390   added to the ARM port.
 391
 392 Changes in 2.28:
 393
 394 * Add support for the RISC-V architecture.
 395
 396 * Add support for the ARM Cortex-M23 and Cortex-M33 processors.
 397
 398 Changes in 2.27:
 399
 400 * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
 401
 402 * Add --no-pad-sections to stop the assembler from padding the end of output
 403   sections up to their alignment boundary.
 404
 405 * Support for the ARMv8-M architecture has been added to the ARM port.  Support
 406   for the ARMv8-M Security and DSP Extensions has also been added to the ARM
 407   port.
 408
 409 * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
 410   .extCoreRegister pseudo-ops that allow an user to define custom
 411   instructions, conditional codes, auxiliary and core registers.
 412
 413 * Add a configure option --enable-elf-stt-common to decide whether ELF
 414   assembler should generate common symbols with the STT_COMMON type by
 415   default.  Default to no.
 416
 417 * New command-line option --elf-stt-common= for ELF targets to control
 418   whether to generate common symbols with the STT_COMMON type.
 419
 420 * Add ability to set section flags and types via numeric values for ELF
 421   based targets.
 422
 423 * Add a configure option --enable-x86-relax-relocations to decide whether
 424   x86 assembler should generate relax relocations by default.  Default to
 425   yes, except for x86 Solaris targets older than Solaris 12.
 426
 427 * New command-line option -mrelax-relocations= for x86 target to control
 428   whether to generate relax relocations.
 429
 430 * New command-line option -mfence-as-lock-add=yes for x86 target to encode
 431   lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
 432
 433 * Add assembly-time relaxation option for ARC cpus.
 434
 435 * Add --with-cpu=TYPE configure option for ARC gas.  This allows the default
 436   cpu type to be adjusted at configure time.
 437
 438 Changes in 2.26:
 439
 440 * Add a configure option --enable-compressed-debug-sections={all,gas} to
 441   decide whether DWARF debug sections should be compressed by default.
 442
 443 * Add support for the ARC EM/HS, and ARC600/700 architectures.  Remove
 444   assembler support for Argonaut RISC architectures.
 445
 446 * Symbol and label names can now be enclosed in double quotes (") which allows
 447   them to contain characters that are not part of valid symbol names in high
 448   level languages.
 449
 450 * Added the correctly spelled -march=armv6kz, for ARMv6KZ support.  The
 451   previous spelling, -march=armv6zk, is still accepted.
 452
 453 * Support for the ARMv8.1 architecture has been added to the Aarch64 port.
 454   Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
 455   extensions has also been added to the Aarch64 port.
 456
 457 * Support for the ARMv8.1 architecture has been added to the ARM port.  Support
 458   for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
 459   been added to the ARM port.
 460
 461 * Extend --compress-debug-sections option to support
 462   --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
 463   targets.
 464
 465 * --compress-debug-sections is turned on for Linux/x86 by default.
 466
 467 Changes in 2.25:
 468
 469 * Add support for the AVR Tiny microcontrollers.
 470
 471 * Replace support for openrisc and or32 with support for or1k.
 472
 473 * Enhanced the ARM port to accept the assembler output from the CodeComposer
 474   Studio tool.  Support is enabled via the new command-line option -mccs.
 475
 476 * Add support for the Andes NDS32.
 477
 478 Changes in 2.24:
 479
 480 * Add support for the Texas Instruments MSP430X processor.
 481
 482 * Add -gdwarf-sections command-line option to enable per-code-section
 483   generation of DWARF .debug_line sections.
 484
 485 * Add support for Altera Nios II.
 486
 487 * Add support for the Imagination Technologies Meta processor.
 488
 489 * Add support for the v850e3v5.
 490
 491 * Remove assembler support for MIPS ECOFF targets.
 492
 493 Changes in 2.23:
 494
 495 * Add support for the 64-bit ARM architecture: AArch64.
 496
 497 * Add support for S12X processor.
 498
 499 * Add support for the VLE extension to the PowerPC architecture.
 500
 501 * Add support for the Freescale XGATE architecture.
 502
 503 * Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
 504   directives.  These are currently available only for x86 and ARM targets.
 505
 506 * Add support for the Renesas RL78 architecture.
 507
 508 * Add support for the Adapteva EPIPHANY architecture.
 509
 510 * For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
 511
 512 Changes in 2.22:
 513
 514 * Add support for the Tilera TILEPro and TILE-Gx architectures.
 515
 516 Changes in 2.21:
 517
 518 * Gas no longer requires doubling of ampersands in macros.
 519
 520 * Add support for the TMS320C6000 (TI C6X) processor family.
 521
 522 * GAS now understands an extended syntax in the .section directive flags
 523   for COFF targets that allows the section's alignment to be specified.  This
 524   feature has also been backported to the 2.20 release series, starting with
 525   2.20.1.
 526
 527 * Add support for the Renesas RX processor.
 528
 529 * New command-line option, --compress-debug-sections, which requests
 530   compression of DWARF debug information sections in the relocatable output
 531   file.  Compressed debug sections are supported by readelf, objdump, and
 532   gold, but not currently by Gnu ld.
 533
 534 Changes in 2.20:
 535
 536 * Added support for v850e2 and v850e2v3.
 537
 538 * GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
 539   pseudo op.  It marks the symbol as being globally unique in the entire
 540   process.
 541
 542 * ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
 543   in binary rather than text.
 544
 545 * Add support for common symbol alignment to PE formats.
 546
 547 * Add support for the new discriminator column in the DWARF line table,
 548   with a discriminator operand for the .loc directive.
 549
 550 * Add support for Sunplus score architecture.
 551
 552 * The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
 553   indicate that if the symbol is the target of a relocation, its value should
 554   not be use.  Instead the function should be invoked and its result used as
 555   the value.
 556
 557 * Add support for Lattice Mico32 (lm32) architecture.
 558
 559 * Add support for Xilinx MicroBlaze architecture.
 560
 561 Changes in 2.19:
 562
 563 * New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
 564   tables without runtime relocation.
 565
 566 * New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
 567   adds compatibility with H'00 style hex constants.
 568
 569 * New command-line option, -msse-check=[none|error|warning], for x86
 570   targets.
 571
 572 * New sub-option added to the assembler's -a command-line switch to
 573   generate a listing output.  The 'g' sub-option will insert into the listing
 574   various information about the assembly, such as assembler version, the
 575   command-line options used, and a time stamp.
 576
 577 * New command-line option -msse2avx for x86 target to encode SSE
 578   instructions with VEX prefix.
 579
 580 * Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
 581
 582 * New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
 583   -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
 584   -mnaked-reg and -mold-gcc, for x86 targets.
 585
 586 * Support for generating wide character strings has been added via the new
 587   pseudo ops: .string16, .string32 and .string64.
 588
 589 * Support for SSE5 has been added to the i386 port.
 590
 591 Changes in 2.18:
 592
 593 * The GAS sources are now released under the GPLv3.
 594
 595 * Support for the National Semiconductor CR16 target has been added.
 596
 597 * Added gas .reloc pseudo.  This is a low-level interface for creating
 598   relocations.
 599
 600 * Add support for x86_64 PE+ target.
 601
 602 * Add support for Score target.
 603
 604 Changes in 2.17:
 605
 606 * Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
 607
 608 * Support for ms2 architecture has been added.
 609
 610 * Support for the Z80 processor family has been added.
 611
 612 * Add support for the "@<file>" syntax to the command line, so that extra
 613   switches can be read from <file>.
 614
 615 * The SH target supports a new command-line switch --enable-reg-prefix which,
 616   if enabled, will allow register names to be optionally prefixed with a $
 617   character.  This allows register names to be distinguished from label names.
 618
 619 * Macros with a variable number of arguments are now supported. See the
 620   documentation for how this works.
 621
 622 * Added --reduce-memory-overheads switch to reduce the size of the hash
 623   tables used, at the expense of longer assembly times, and
 624   --hash-size=<NUMBER> to set the size of the hash tables used by gas.
 625
 626 * Macro names and macro parameter names can now be any identifier that would
 627   also be legal as a symbol elsewhere. For macro parameter names, this is
 628   known to cause problems in certain sources when the respective target uses
 629   characters inconsistently, and thus macro parameter references may no longer
 630   be recognized as such (see the documentation for details).
 631
 632 * Support the .f_floating, .d_floating, .g_floating and .h_floating directives
 633   for the VAX target in order to be more compatible with the VAX MACRO
 634   assembler.
 635
 636 * New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
 637
 638 Changes in 2.16:
 639
 640 * Redefinition of macros now results in an error.
 641
 642 * New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
 643
 644 * New command-line option -munwind-check=[warning|error] for IA64
 645   targets.
 646
 647 * The IA64 port now uses automatic dependency violation removal as its default
 648   mode.
 649
 650 * Port to MAXQ processor contributed by HCL Tech.
 651
 652 * Added support for generating unwind tables for ARM ELF targets.
 653
 654 * Add a -g command-line option to generate debug information in the target's
 655   preferred debug format.
 656
 657 * Support for the crx-elf target added.
 658
 659 * Support for the sh-symbianelf target added.
 660
 661 * Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
 662   on pe[i]-i386; required for this target's DWARF 2 support.
 663
 664 * Support for Motorola MCF521x/5249/547x/548x added.
 665
 666 * Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
 667   instrucitons.
 668
 669 * New command-line option -mno-shared for MIPS ELF targets.
 670
 671 * New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
 672   added to enter (and leave) alternate macro syntax mode.
 673
 674 Changes in 2.15:
 675
 676 * The MIPS -membedded-pic option (Embedded-PIC code generation) is
 677   deprecated and will be removed in a future release.
 678
 679 * Added PIC m32r Linux (ELF) and support to M32R assembler.
 680
 681 * Added support for ARM V6.
 682
 683 * Added support for sh4a and variants.
 684
 685 * Support for Renesas M32R2 added.
 686
 687 * Limited support for Mapping Symbols as specified in the ARM ELF
 688   specification has been added to the arm assembler.
 689
 690 * On ARM architectures, added a new gas directive ".unreq" that undoes
 691   definitions created by ".req".
 692
 693 * Support for Motorola ColdFire MCF528x added.
 694
 695 * Added --gstabs+ switch to enable the generation of STABS debug format
 696   information with GNU extensions.
 697
 698 * Added support for MIPS64 Release 2.
 699
 700 * Added support for v850e1.
 701
 702 * Added -n switch for x86 assembler.  By default, x86 GAS replaces
 703   multiple nop instructions used for alignment within code sections
 704   with multi-byte nop instructions such as leal 0(%esi,1),%esi.  This
 705   switch disables the optimization.
 706
 707 * Removed -n option from MIPS assembler.  It was not useful, and confused the
 708   existing -non_shared option.
 709
 710 Changes in 2.14:
 711
 712 * Added support for MIPS32 Release 2.
 713
 714 * Added support for Xtensa architecture.
 715
 716 * Support for Intel's iWMMXt processor (an ARM variant) added.
 717
 718 * An assembler test generator has been contributed and an example file that
 719   uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
 720
 721 * Support for SH2E added.
 722
 723 * GASP has now been removed.
 724
 725 * Support for Texas Instruments TMS320C4x and TMS320C3x series of
 726   DSP's contributed by Michael Hayes and Svein E. Seldal.
 727
 728 * Support for the Ubicom IP2xxx microcontroller added.
 729
 730 Changes in 2.13:
 731
 732 * Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
 733   and FR500 included.
 734
 735 * Support for DLX processor added.
 736
 737 * GASP has now been deprecated and will be removed in a future release.  Use
 738   the macro facilities in GAS instead.
 739
 740 * GASP now correctly parses floating point numbers. Unless the base is
 741   explicitly specified, they are interpreted as decimal numbers regardless of
 742   the currently specified base.
 743
 744 Changes in 2.12:
 745
 746 * Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
 747
 748 * Support for the OpenRISC 32-bit embedded processor by OpenCores.
 749
 750 * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
 751   specifying the target instruction set.  The old method of specifying the
 752   target processor has been deprecated, but is still accepted for
 753   compatibility.
 754
 755 * Support for the VFP floating-point instruction set has been added to
 756   the ARM assembler.
 757
 758 * New psuedo op: .incbin to include a set of binary data at a given point
 759   in the assembly.  Contributed by Anders Norlander.
 760
 761 * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
 762   but still works for compatability.
 763
 764 * The MIPS assembler no longer issues a warning by default when it
 765   generates a nop instruction from a macro. The new command-line option
 766   -n will turn on the warning.
 767
 768 Changes in 2.11:
 769
 770 * Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
 771
 772 * x86 gas now supports the full Pentium4 instruction set.
 773
 774 * Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
 775
 776 * Support for Motorola 68HC11 and 68HC12.
 777
 778 * Support for Texas Instruments TMS320C54x (tic54x).
 779
 780 * Support for IA-64.
 781
 782 * Support for i860, by Jason Eckhardt.
 783
 784 * Support for CRIS (Axis Communications ETRAX series).
 785
 786 * x86 gas has a new .arch pseudo op to specify the target CPU architecture.
 787
 788 * x86 gas -q command-line option quietens warnings about register size changes
 789   due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
 790   translating various deprecated floating point instructions.
 791
 792 Changes in 2.10:
 793
 794 * Support for the ARM msr instruction was changed to only allow an immediate
 795   operand when altering the flags field.
 796
 797 * Support for ATMEL AVR.
 798
 799 * Support for IBM 370 ELF.  Somewhat experimental.
 800
 801 * Support for numbers with suffixes.
 802
 803 * Added support for breaking to the end of repeat loops.
 804
 805 * Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
 806
 807 * New .elseif pseudo-op added.
 808
 809 * New --fatal-warnings option.
 810
 811 * picoJava architecture support added.
 812
 813 * Motorola MCore 210 processor support added.
 814
 815 * A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
 816   assembly programs with intel syntax.
 817
 818 * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
 819
 820 * Added -gdwarf2 option to generate DWARF 2 debugging information.
 821
 822 * Full 16-bit mode support for i386.
 823
 824 * Greatly improved instruction operand checking for i386.  This change will
 825   produce errors or warnings on incorrect assembly code that previous versions
 826   of gas accepted.  If you get unexpected messages from code that worked with
 827   older versions of gas, please double check the code before reporting a bug.
 828
 829 * Weak symbol support added for COFF targets.
 830
 831 * Mitsubishi D30V support added.
 832
 833 * Texas Instruments c80 (tms320c80) support added.
 834
 835 * i960 ELF support added.
 836
 837 * ARM ELF support added.
 838
 839 Changes in 2.9:
 840
 841 * Texas Instruments c30 (tms320c30) support added.
 842
 843 * The assembler now optimizes the exception frame information generated by egcs
 844   and gcc 2.8.  The new --traditional-format option disables this optimization.
 845
 846 * Added --gstabs option to generate stabs debugging information.
 847
 848 * The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
 849   listing.
 850
 851 * Added -MD option to print dependencies.
 852
 853 Changes in 2.8:
 854
 855 * BeOS support added.
 856
 857 * MIPS16 support added.
 858
 859 * Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
 860
 861 * Alpha/VMS support added.
 862
 863 * m68k options --base-size-default-16, --base-size-default-32,
 864   --disp-size-default-16, and --disp-size-default-32 added.
 865
 866 * The alignment directives now take an optional third argument, which is the
 867   maximum number of bytes to skip.  If doing the alignment would require
 868   skipping more than the given number of bytes, the alignment is not done at
 869   all.
 870
 871 * The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
 872
 873 * The -a option takes a new suboption, c (e.g., -alc), to skip false
 874   conditionals in listings.
 875
 876 * Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
 877   the symbol is already defined.
 878
 879 Changes in 2.7:
 880
 881 * The PowerPC assembler now allows the use of symbolic register names (r0,
 882   etc.) if -mregnames is used.  Symbolic names preceded by a '%' (%r0, etc.)
 883   can be used any time.  PowerPC 860 move to/from SPR instructions have been
 884   added.
 885
 886 * Alpha Linux (ELF) support added.
 887
 888 * PowerPC ELF support added.
 889
 890 * m68k Linux (ELF) support added.
 891
 892 * i960 Hx/Jx support added.
 893
 894 * i386/PowerPC gnu-win32 support added.
 895
 896 * SCO ELF support added.  For OpenServer 5 targets (i386-unknown-sco3.2v5) the
 897   default is to build COFF-only support.  To get a set of tools that generate
 898   ELF (they'll understand both COFF and ELF), you must configure with
 899   target=i386-unknown-sco3.2v5elf.
 900
 901 * m88k-motorola-sysv3* support added.
 902
 903 Changes in 2.6:
 904
 905 * Gas now directly supports macros, without requiring GASP.
 906
 907 * Gas now has an MRI assembler compatibility mode.  Use -M or --mri to select
 908   MRI mode.  The pseudo-op ``.mri 1'' will switch into the MRI mode until the
 909   ``.mri 0'' is seen; this can be convenient for inline assembler code.
 910
 911 * Added --defsym SYM=VALUE option.
 912
 913 * Added -mips4 support to MIPS assembler.
 914
 915 * Added PIC support to Solaris and SPARC SunOS 4 assembler.
 916
 917 Changes in 2.4:
 918
 919 * Converted this directory to use an autoconf-generated configure script.
 920
 921 * ARM support, from Richard Earnshaw.
 922
 923 * Updated VMS support, from Pat Rankin, including considerably improved
 924   debugging support.
 925
 926 * Support for the control registers in the 68060.
 927
 928 * Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
 929   provide for possible future gcc changes, for targets where gas provides some
 930   features not available in the native assembler.  If the native assembler is
 931   used, it should become obvious pretty quickly what the problem is.
 932
 933 * Usage message is available with "--help".
 934
 935 * The GNU Assembler Preprocessor (gasp) is included.  (Actually, it was in 2.3
 936   also, but didn't get into the NEWS file.)
 937
 938 * Weak symbol support for a.out.
 939
 940 * A bug in the listing code which could cause an infinite loop has been fixed.
 941   Bugs in listings when generating a COFF object file have also been fixed.
 942
 943 * Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
 944   Paul Kranenburg.
 945
 946 * Improved Alpha support.  Immediate constants can have a much larger range
 947   now. Support for the 21164 has been contributed by Digital.
 948
 949 * Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
 950
 951 Changes in 2.3:
 952
 953 * Mach i386 support, by David Mackenzie and Ken Raeburn.
 954
 955 * RS/6000 and PowerPC support by Ian Taylor.
 956
 957 * VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
 958   based on mail received from various people.  The `-h#' option should work
 959   again too.
 960
 961 * HP-PA work, by Jeff Law.  Note, for the PA, gas-2.3 has been designed to work
 962   with gdb-4.12 and gcc-2.6.  As gcc-2.6 has not been released yet, a special
 963   version of gcc-2.5.8 has been patched to work with gas-2.3.  You can retrieve
 964   this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
 965   in the "dist" directory.
 966
 967 * Vax support in gas fixed for BSD, so it builds and seems to run a couple
 968   simple tests okay.  I haven't put it through extensive testing.  (GNU make is
 969   currently required for BSD 4.3 builds.)
 970
 971 * Support for the DEC Alpha, running OSF/1 (ECOFF format).  The gas support is
 972   based on code donated by CMU, which used an a.out-based format.  I'm afraid
 973   the alpha-a.out support is pretty badly mangled, and much of it removed;
 974   making it work will require rewriting it as BFD support for the format anyways.
 975
 976 * Irix 5 support.
 977
 978 * The test suites have been fixed up a bit, so that they should work with a
 979   couple different versions of expect and dejagnu.
 980
 981 * Symbols' values are now handled internally as expressions, permitting more
 982   flexibility in evaluating them in some cases.  Some details of relocation
 983   handling have also changed, and simple constant pool management has been
 984   added, to make the Alpha port easier.
 985
 986 * New option "--statistics" for printing out program run times.  This is
 987   intended to be used with the gcc "-Q" option, which prints out times spent in
 988   various phases of compilation.  (You should be able to get all of them
 989   printed out with "gcc -Q -Wa,--statistics", I think.)
 990
 991 Changes in 2.2:
 992
 993 * RS/6000 AIX and MIPS SGI Irix 5 support has been added.
 994
 995 * Configurations that are still in development (and therefore are convenient to
 996   have listed in configure.in) still get rejected without a minor change to
 997   gas/Makefile.in, so people not doing development work shouldn't get the
 998   impression that support for such configurations is actually believed to be
 999   reliable.
1000
1001 * The program name (usually "as") is printed when a fatal error message is
1002   displayed.  This should prevent some confusion about the source of occasional
1003   messages about "internal errors".
1004
1005 * ELF support is falling into place.  Support for the 386 should be working.
1006   Support for SPARC Solaris is in.  HPPA support from Utah is being integrated.
1007
1008 * Symbol values are maintained as expressions instead of being immediately
1009   boiled down to add-symbol, sub-symbol, and constant.  This permits slightly
1010   more complex calculations involving symbols whose values are not alreadey
1011   known.
1012
1013 * DBX-style debugging info ("stabs") is now supported for COFF formats.
1014   If any stabs directives are seen in the source, GAS will create two new
1015   sections: a ".stab" and a ".stabstr" section.  The format of the .stab
1016   section is nearly identical to the a.out symbol format, and .stabstr is
1017   its string table.  For this to be useful, you must have configured GCC
1018   to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
1019   that can use the stab sections (4.11 or later).
1020
1021 * LynxOS, on i386 and m68k platforms, is now supported.  SPARC LynxOS
1022   support is in progress.
1023
1024 Changes in 2.1:
1025
1026 * Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
1027   incorporated, but not well tested yet.
1028
1029 * Altered the opcode table split for m68k; it should require less VM to compile
1030   with gcc now.
1031
1032 * Some minor adjustments to add (Convergent Technologies') Miniframe support,
1033   suggested by Ronald Cole.
1034
1035 * HPPA support (running OSF only, not HPUX) has been contributed by Utah.  This
1036   includes improved ELF support, which I've started adapting for SPARC Solaris
1037   2.x.  Integration isn't completely, so it probably won't work.
1038
1039 * HP9000/300 support, donated by HP, has been merged in.
1040
1041 * Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
1042
1043 * Better error messages for unsupported configurations (e.g., hppa-hpux).
1044
1045 * Test suite framework is starting to become reasonable.
1046
1047 Changes in 2.0:
1048
1049 * Mostly bug fixes.
1050
1051 * Some more merging of BFD and ELF code, but ELF still doesn't work.
1052
1053 Changes in 1.94:
1054
1055 * BFD merge is partly done.  Adventurous souls may try giving configure the
1056   "--with-bfd-assembler" option.  Currently, ELF format requires it, a.out
1057   format accepts it; SPARC CPU accepts it.  It's the default only for OS "elf"
1058   or "solaris".  (ELF isn't really supported yet.  It needs work.  I've got
1059   some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
1060   fully merged yet.)
1061
1062 * The 68K opcode table has been split in half.  It should now compile under gcc
1063   without consuming ridiculous amounts of memory.
1064
1065 * A couple data structures have been reduced in size.  This should result in
1066   saving a little bit of space at runtime.
1067
1068 * Support for MIPS, from OSF and Ralph Campbell, has been merged in.  The OSF
1069   code provided ROSE format support, which I haven't merged in yet.  (I can
1070   make it available, if anyone wants to try it out.)  Ralph's code, for BSD
1071   4.4, supports a.out format.  We don't have ECOFF support in just yet; it's
1072   coming.
1073
1074 * Support for the Hitachi H8/500 has been added.
1075
1076 * VMS host and target support should be working now, thanks chiefly to Eric
1077   Youngdale.
1078
1079 Changes in 1.93.01:
1080
1081 * For m68k, support for more processors has been added: 68040, CPU32, 68851.
1082
1083 * For i386, .align is now power-of-two; was number-of-bytes.
1084
1085 * For m68k, "%" is now accepted before register names.  For COFF format, which
1086   doesn't use underscore prefixes for C labels, it is required, so variable "a0"
1087   can be distinguished from the register.
1088
1089 * Last public release was 1.38.  Lots of configuration changes since then, lots
1090   of new CPUs and formats, lots of bugs fixed.
1091
1092 \f
1093 Copyright (C) 2012-2024 Free Software Foundation, Inc.
1094
1095 Copying and distribution of this file, with or without modification,
1096 are permitted in any medium without royalty provided the copyright
1097 notice and this notice are preserved.
1098
1099 Local variables:
1100 fill-column: 79
1101 End: