1 /* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
2 Copyright (C) 1989, 93-98, 1999 Free Software Foundation, Inc.
3 Contributed by Carnegie Mellon University, 1993.
4 Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
5 Modified by Ken Raeburn for gas-2.x and ECOFF support.
6 Modified by Richard Henderson for ELF support.
7 Modified by Klaus K"ampf for EVAX (openVMS/Alpha) support.
9 This file is part of GAS, the GNU Assembler.
11 GAS is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
16 GAS is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with GAS; see the file COPYING. If not, write to the Free
23 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
27 * Mach Operating System
28 * Copyright (c) 1993 Carnegie Mellon University
29 * All Rights Reserved.
31 * Permission to use, copy, modify and distribute this software and its
32 * documentation is hereby granted, provided that both the copyright
33 * notice and this permission notice appear in all copies of the
34 * software, derivative works or modified versions, and any portions
35 * thereof, and that both notices appear in supporting documentation.
37 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
38 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
39 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
41 * Carnegie Mellon requests users of this software to return to
43 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
44 * School of Computer Science
45 * Carnegie Mellon University
46 * Pittsburgh PA 15213-3890
48 * any improvements or extensions that they make and grant Carnegie the
49 * rights to redistribute these changes.
56 #include "opcode/alpha.h"
59 #include "elf/alpha.h"
67 #define MAX_INSN_FIXUPS 2
68 #define MAX_INSN_ARGS 5
73 bfd_reloc_code_real_type reloc
;
80 struct alpha_fixup fixups
[MAX_INSN_FIXUPS
];
85 MACRO_EOA
= 1, MACRO_IR
, MACRO_PIR
, MACRO_CPIR
, MACRO_FPR
, MACRO_EXP
91 void (*emit
) PARAMS ((const expressionS
*, int, const PTR
));
93 enum alpha_macro_arg argsets
[16];
96 /* Two extra symbols we want to see in our input. This is a blatent
97 misuse of the expressionS.X_op field. */
99 #define O_pregister (O_max+1) /* O_register, but in parentheses */
100 #define O_cpregister (O_pregister+1) /* + a leading comma */
102 /* Macros for extracting the type and number of encoded register tokens */
104 #define is_ir_num(x) (((x) & 32) == 0)
105 #define is_fpr_num(x) (((x) & 32) != 0)
106 #define regno(x) ((x) & 31)
108 /* Something odd inherited from the old assembler */
110 #define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
111 #define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
113 /* Predicates for 16- and 32-bit ranges */
114 /* XXX: The non-shift version appears to trigger a compiler bug when
115 cross-assembling from x86 w/ gcc 2.7.2. */
118 #define range_signed_16(x) \
119 (((offsetT)(x) >> 15) == 0 || ((offsetT)(x) >> 15) == -1)
120 #define range_signed_32(x) \
121 (((offsetT)(x) >> 31) == 0 || ((offsetT)(x) >> 31) == -1)
123 #define range_signed_16(x) ((offsetT)(x) >= -(offsetT)0x8000 && \
124 (offsetT)(x) <= (offsetT)0x7FFF)
125 #define range_signed_32(x) ((offsetT)(x) >= -(offsetT)0x80000000 && \
126 (offsetT)(x) <= (offsetT)0x7FFFFFFF)
129 /* Macros for sign extending from 16- and 32-bits. */
130 /* XXX: The cast macros will work on all the systems that I care about,
131 but really a predicate should be found to use the non-cast forms. */
134 #define sign_extend_16(x) ((short)(x))
135 #define sign_extend_32(x) ((int)(x))
137 #define sign_extend_16(x) ((offsetT)(((x) & 0xFFFF) ^ 0x8000) - 0x8000)
138 #define sign_extend_32(x) ((offsetT)(((x) & 0xFFFFFFFF) \
139 ^ 0x80000000) - 0x80000000)
142 /* Macros to build tokens */
144 #define set_tok_reg(t, r) (memset(&(t), 0, sizeof(t)), \
145 (t).X_op = O_register, \
146 (t).X_add_number = (r))
147 #define set_tok_preg(t, r) (memset(&(t), 0, sizeof(t)), \
148 (t).X_op = O_pregister, \
149 (t).X_add_number = (r))
150 #define set_tok_cpreg(t, r) (memset(&(t), 0, sizeof(t)), \
151 (t).X_op = O_cpregister, \
152 (t).X_add_number = (r))
153 #define set_tok_freg(t, r) (memset(&(t), 0, sizeof(t)), \
154 (t).X_op = O_register, \
155 (t).X_add_number = (r)+32)
156 #define set_tok_sym(t, s, a) (memset(&(t), 0, sizeof(t)), \
157 (t).X_op = O_symbol, \
158 (t).X_add_symbol = (s), \
159 (t).X_add_number = (a))
160 #define set_tok_const(t, n) (memset(&(t), 0, sizeof(t)), \
161 (t).X_op = O_constant, \
162 (t).X_add_number = (n))
165 /* Prototypes for all local functions */
167 static int tokenize_arguments
PARAMS ((char *, expressionS
*, int));
168 static const struct alpha_opcode
*find_opcode_match
169 PARAMS ((const struct alpha_opcode
*, const expressionS
*, int *, int *));
170 static const struct alpha_macro
*find_macro_match
171 PARAMS ((const struct alpha_macro
*, const expressionS
*, int *));
172 static unsigned insert_operand
173 PARAMS ((unsigned, const struct alpha_operand
*, offsetT
, char *, unsigned));
174 static void assemble_insn
175 PARAMS ((const struct alpha_opcode
*, const expressionS
*, int,
176 struct alpha_insn
*));
177 static void emit_insn
PARAMS ((struct alpha_insn
*));
178 static void assemble_tokens_to_insn
179 PARAMS ((const char *, const expressionS
*, int, struct alpha_insn
*));
180 static void assemble_tokens
181 PARAMS ((const char *, const expressionS
*, int, int));
183 static int load_expression
184 PARAMS ((int, const expressionS
*, int *, expressionS
*));
186 static void emit_ldgp
PARAMS ((const expressionS
*, int, const PTR
));
187 static void emit_division
PARAMS ((const expressionS
*, int, const PTR
));
188 static void emit_lda
PARAMS ((const expressionS
*, int, const PTR
));
189 static void emit_ldah
PARAMS ((const expressionS
*, int, const PTR
));
190 static void emit_ir_load
PARAMS ((const expressionS
*, int, const PTR
));
191 static void emit_loadstore
PARAMS ((const expressionS
*, int, const PTR
));
192 static void emit_jsrjmp
PARAMS ((const expressionS
*, int, const PTR
));
193 static void emit_ldX
PARAMS ((const expressionS
*, int, const PTR
));
194 static void emit_ldXu
PARAMS ((const expressionS
*, int, const PTR
));
195 static void emit_uldX
PARAMS ((const expressionS
*, int, const PTR
));
196 static void emit_uldXu
PARAMS ((const expressionS
*, int, const PTR
));
197 static void emit_ldil
PARAMS ((const expressionS
*, int, const PTR
));
198 static void emit_stX
PARAMS ((const expressionS
*, int, const PTR
));
199 static void emit_ustX
PARAMS ((const expressionS
*, int, const PTR
));
200 static void emit_sextX
PARAMS ((const expressionS
*, int, const PTR
));
201 static void emit_retjcr
PARAMS ((const expressionS
*, int, const PTR
));
203 static void s_alpha_text
PARAMS ((int));
204 static void s_alpha_data
PARAMS ((int));
206 static void s_alpha_comm
PARAMS ((int));
207 static void s_alpha_rdata
PARAMS ((int));
210 static void s_alpha_sdata
PARAMS ((int));
213 static void s_alpha_section
PARAMS ((int));
214 static void s_alpha_ent
PARAMS ((int));
215 static void s_alpha_end
PARAMS ((int));
216 static void s_alpha_mask
PARAMS ((int));
217 static void s_alpha_frame
PARAMS ((int));
218 static void s_alpha_prologue
PARAMS ((int));
219 static void s_alpha_coff_wrapper
PARAMS ((int));
222 static void s_alpha_section
PARAMS ((int));
224 static void s_alpha_gprel32
PARAMS ((int));
225 static void s_alpha_float_cons
PARAMS ((int));
226 static void s_alpha_proc
PARAMS ((int));
227 static void s_alpha_set
PARAMS ((int));
228 static void s_alpha_base
PARAMS ((int));
229 static void s_alpha_align
PARAMS ((int));
230 static void s_alpha_stringer
PARAMS ((int));
231 static void s_alpha_space
PARAMS ((int));
233 static void create_literal_section
PARAMS ((const char *, segT
*, symbolS
**));
235 static void select_gp_value
PARAMS ((void));
237 static void alpha_align
PARAMS ((int, char *, symbolS
*, int));
240 /* Generic assembler global variables which must be defined by all
243 /* Characters which always start a comment. */
244 const char comment_chars
[] = "#";
246 /* Characters which start a comment at the beginning of a line. */
247 const char line_comment_chars
[] = "#";
249 /* Characters which may be used to separate multiple commands on a
251 const char line_separator_chars
[] = ";";
253 /* Characters which are used to indicate an exponent in a floating
255 const char EXP_CHARS
[] = "eE";
257 /* Characters which mean that a number is a floating point constant,
260 const char FLT_CHARS
[] = "dD";
262 /* XXX: Do all of these really get used on the alpha?? */
263 char FLT_CHARS
[] = "rRsSfFdDxXpP";
267 const char *md_shortopts
= "Fm:g+1h:HG:";
269 const char *md_shortopts
= "Fm:gG:";
272 struct option md_longopts
[] = {
273 #define OPTION_32ADDR (OPTION_MD_BASE)
274 { "32addr", no_argument
, NULL
, OPTION_32ADDR
},
275 #define OPTION_RELAX (OPTION_32ADDR+1)
276 { "relax", no_argument
, NULL
, OPTION_RELAX
},
278 #define OPTION_MDEBUG (OPTION_RELAX+1)
279 #define OPTION_NO_MDEBUG (OPTION_MDEBUG+1)
280 { "mdebug", no_argument
, NULL
, OPTION_MDEBUG
},
281 { "no-mdebug", no_argument
, NULL
, OPTION_NO_MDEBUG
},
283 { NULL
, no_argument
, NULL
, 0 }
286 size_t md_longopts_size
= sizeof(md_longopts
);
291 #define AXP_REG_R16 16
292 #define AXP_REG_R17 17
294 #define AXP_REG_T9 22
296 #define AXP_REG_T10 23
298 #define AXP_REG_T11 24
300 #define AXP_REG_T12 25
301 #define AXP_REG_AI 25
303 #define AXP_REG_FP 29
306 #define AXP_REG_GP AXP_REG_PV
307 #endif /* OBJ_EVAX */
309 /* The cpu for which we are generating code */
310 static unsigned alpha_target
= AXP_OPCODE_BASE
;
311 static const char *alpha_target_name
= "<all>";
313 /* The hash table of instruction opcodes */
314 static struct hash_control
*alpha_opcode_hash
;
316 /* The hash table of macro opcodes */
317 static struct hash_control
*alpha_macro_hash
;
320 /* The $gp relocation symbol */
321 static symbolS
*alpha_gp_symbol
;
323 /* XXX: what is this, and why is it exported? */
324 valueT alpha_gp_value
;
327 /* The current $gp register */
328 static int alpha_gp_register
= AXP_REG_GP
;
330 /* A table of the register symbols */
331 static symbolS
*alpha_register_table
[64];
333 /* Constant sections, or sections of constants */
335 static segT alpha_lita_section
;
336 static segT alpha_lit4_section
;
339 static segT alpha_link_section
;
340 static segT alpha_ctors_section
;
341 static segT alpha_dtors_section
;
343 static segT alpha_lit8_section
;
345 /* Symbols referring to said sections. */
347 static symbolS
*alpha_lita_symbol
;
348 static symbolS
*alpha_lit4_symbol
;
351 static symbolS
*alpha_link_symbol
;
352 static symbolS
*alpha_ctors_symbol
;
353 static symbolS
*alpha_dtors_symbol
;
355 static symbolS
*alpha_lit8_symbol
;
357 /* Literal for .litX+0x8000 within .lita */
359 static offsetT alpha_lit4_literal
;
360 static offsetT alpha_lit8_literal
;
363 /* The active .ent symbol. */
365 static symbolS
*alpha_cur_ent_sym
;
368 /* Is the assembler not allowed to use $at? */
369 static int alpha_noat_on
= 0;
371 /* Are macros enabled? */
372 static int alpha_macros_on
= 1;
374 /* Are floats disabled? */
375 static int alpha_nofloats_on
= 0;
377 /* Are addresses 32 bit? */
378 static int alpha_addr32_on
= 0;
380 /* Symbol labelling the current insn. When the Alpha gas sees
383 and the section happens to not be on an eight byte boundary, it
384 will align both the symbol and the .quad to an eight byte boundary. */
385 static symbolS
*alpha_insn_label
;
387 /* Whether we should automatically align data generation pseudo-ops.
388 .align 0 will turn this off. */
389 static int alpha_auto_align_on
= 1;
391 /* The known current alignment of the current section. */
392 static int alpha_current_align
;
394 /* These are exported to ECOFF code. */
395 unsigned long alpha_gprmask
, alpha_fprmask
;
397 /* Whether the debugging option was seen. */
398 static int alpha_debug
;
401 /* Whether we are emitting an mdebug section. */
402 int alpha_flag_mdebug
= 1;
405 /* Don't fully resolve relocations, allowing code movement in the linker. */
406 static int alpha_flag_relax
;
408 /* What value to give to bfd_set_gp_size. */
409 static int g_switch_value
= 8;
412 /* Collect information about current procedure here. */
414 symbolS
*symbol
; /* proc pdesc symbol */
416 int framereg
; /* register for frame pointer */
417 int framesize
; /* size of frame */
427 static int alpha_flag_hash_long_names
= 0; /* -+ */
428 static int alpha_flag_show_after_trunc
= 0; /* -H */
430 /* If the -+ switch is given, then a hash is appended to any name that is
431 * longer than 64 characters, else longer symbol names are truncated.
436 /* A table of CPU names and opcode sets. */
438 static const struct cpu_type
444 /* Ad hoc convention: cpu number gets palcode, process code doesn't.
445 This supports usage under DU 4.0b that does ".arch ev4", and
446 usage in MILO that does -m21064. Probably something more
447 specific like -m21064-pal should be used, but oh well. */
449 { "21064", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
450 { "21064a", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
451 { "21066", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
452 { "21068", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
453 { "21164", AXP_OPCODE_BASE
|AXP_OPCODE_EV5
},
454 { "21164a", AXP_OPCODE_BASE
|AXP_OPCODE_EV5
|AXP_OPCODE_BWX
},
455 { "21164pc", (AXP_OPCODE_BASE
|AXP_OPCODE_EV5
|AXP_OPCODE_BWX
457 { "21264", (AXP_OPCODE_BASE
|AXP_OPCODE_EV6
|AXP_OPCODE_BWX
458 |AXP_OPCODE_MAX
|AXP_OPCODE_CIX
) },
460 { "ev4", AXP_OPCODE_BASE
},
461 { "ev45", AXP_OPCODE_BASE
},
462 { "lca45", AXP_OPCODE_BASE
},
463 { "ev5", AXP_OPCODE_BASE
},
464 { "ev56", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
},
465 { "pca56", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
|AXP_OPCODE_MAX
},
466 { "ev6", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
|AXP_OPCODE_MAX
|AXP_OPCODE_CIX
},
468 { "all", AXP_OPCODE_BASE
},
472 /* The macro table */
474 static const struct alpha_macro alpha_macros
[] = {
475 /* Load/Store macros */
476 { "lda", emit_lda
, NULL
,
477 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
478 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
479 { "ldah", emit_ldah
, NULL
,
480 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
482 { "ldl", emit_ir_load
, "ldl",
483 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
484 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
485 { "ldl_l", emit_ir_load
, "ldl_l",
486 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
487 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
488 { "ldq", emit_ir_load
, "ldq",
489 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
490 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
491 { "ldq_l", emit_ir_load
, "ldq_l",
492 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
493 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
494 { "ldq_u", emit_ir_load
, "ldq_u",
495 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
496 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
497 { "ldf", emit_loadstore
, "ldf",
498 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
499 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
500 { "ldg", emit_loadstore
, "ldg",
501 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
502 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
503 { "lds", emit_loadstore
, "lds",
504 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
505 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
506 { "ldt", emit_loadstore
, "ldt",
507 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
508 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
510 { "ldb", emit_ldX
, (PTR
)0,
511 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
512 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
513 { "ldbu", emit_ldXu
, (PTR
)0,
514 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
515 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
516 { "ldw", emit_ldX
, (PTR
)1,
517 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
518 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
519 { "ldwu", emit_ldXu
, (PTR
)1,
520 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
521 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
523 { "uldw", emit_uldX
, (PTR
)1,
524 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
525 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
526 { "uldwu", emit_uldXu
, (PTR
)1,
527 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
528 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
529 { "uldl", emit_uldX
, (PTR
)2,
530 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
531 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
532 { "uldlu", emit_uldXu
, (PTR
)2,
533 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
534 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
535 { "uldq", emit_uldXu
, (PTR
)3,
536 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
537 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
539 { "ldgp", emit_ldgp
, NULL
,
540 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
} },
542 { "ldi", emit_lda
, NULL
,
543 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
544 { "ldil", emit_ldil
, NULL
,
545 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
546 { "ldiq", emit_lda
, NULL
,
547 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
549 { "ldif" emit_ldiq
, NULL
,
550 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
551 { "ldid" emit_ldiq
, NULL
,
552 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
553 { "ldig" emit_ldiq
, NULL
,
554 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
555 { "ldis" emit_ldiq
, NULL
,
556 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
557 { "ldit" emit_ldiq
, NULL
,
558 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
561 { "stl", emit_loadstore
, "stl",
562 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
563 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
564 { "stl_c", emit_loadstore
, "stl_c",
565 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
566 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
567 { "stq", emit_loadstore
, "stq",
568 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
569 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
570 { "stq_c", emit_loadstore
, "stq_c",
571 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
572 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
573 { "stq_u", emit_loadstore
, "stq_u",
574 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
575 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
576 { "stf", emit_loadstore
, "stf",
577 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
578 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
579 { "stg", emit_loadstore
, "stg",
580 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
581 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
582 { "sts", emit_loadstore
, "sts",
583 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
584 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
585 { "stt", emit_loadstore
, "stt",
586 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
587 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
589 { "stb", emit_stX
, (PTR
)0,
590 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
591 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
592 { "stw", emit_stX
, (PTR
)1,
593 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
594 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
595 { "ustw", emit_ustX
, (PTR
)1,
596 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
597 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
598 { "ustl", emit_ustX
, (PTR
)2,
599 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
600 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
601 { "ustq", emit_ustX
, (PTR
)3,
602 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
603 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
605 /* Arithmetic macros */
607 { "absl" emit_absl
, 1, { IR
} },
608 { "absl" emit_absl
, 2, { IR
, IR
} },
609 { "absl" emit_absl
, 2, { EXP
, IR
} },
610 { "absq" emit_absq
, 1, { IR
} },
611 { "absq" emit_absq
, 2, { IR
, IR
} },
612 { "absq" emit_absq
, 2, { EXP
, IR
} },
615 { "sextb", emit_sextX
, (PTR
)0,
616 { MACRO_IR
, MACRO_IR
, MACRO_EOA
,
618 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
619 { "sextw", emit_sextX
, (PTR
)1,
620 { MACRO_IR
, MACRO_IR
, MACRO_EOA
,
622 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
624 { "divl", emit_division
, "__divl",
625 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
626 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
627 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
628 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
629 { "divlu", emit_division
, "__divlu",
630 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
631 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
632 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
633 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
634 { "divq", emit_division
, "__divq",
635 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
636 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
637 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
638 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
639 { "divqu", emit_division
, "__divqu",
640 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
641 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
642 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
643 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
644 { "reml", emit_division
, "__reml",
645 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
646 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
647 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
648 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
649 { "remlu", emit_division
, "__remlu",
650 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
651 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
652 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
653 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
654 { "remq", emit_division
, "__remq",
655 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
656 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
657 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
658 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
659 { "remqu", emit_division
, "__remqu",
660 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
661 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
662 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
663 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
665 { "jsr", emit_jsrjmp
, "jsr",
666 { MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
667 MACRO_PIR
, MACRO_EOA
,
668 MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
669 MACRO_EXP
, MACRO_EOA
} },
670 { "jmp", emit_jsrjmp
, "jmp",
671 { MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
672 MACRO_PIR
, MACRO_EOA
,
673 MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
674 MACRO_EXP
, MACRO_EOA
} },
675 { "ret", emit_retjcr
, "ret",
676 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
678 MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
679 MACRO_PIR
, MACRO_EOA
,
680 MACRO_EXP
, MACRO_EOA
,
682 { "jcr", emit_retjcr
, "jcr",
683 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
685 MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
686 MACRO_PIR
, MACRO_EOA
,
687 MACRO_EXP
, MACRO_EOA
,
689 { "jsr_coroutine", emit_retjcr
, "jcr",
690 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
692 MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
693 MACRO_PIR
, MACRO_EOA
,
694 MACRO_EXP
, MACRO_EOA
,
698 static const int alpha_num_macros
699 = sizeof(alpha_macros
) / sizeof(*alpha_macros
);
701 /* Public interface functions */
703 /* This function is called once, at assembler startup time. It sets
704 up all the tables, etc. that the MD part of the assembler will
705 need, that can be determined before arguments are parsed. */
712 /* Create the opcode hash table */
714 alpha_opcode_hash
= hash_new ();
715 for (i
= 0; i
< alpha_num_opcodes
; )
717 const char *name
, *retval
, *slash
;
719 name
= alpha_opcodes
[i
].name
;
720 retval
= hash_insert (alpha_opcode_hash
, name
, (PTR
)&alpha_opcodes
[i
]);
722 as_fatal (_("internal error: can't hash opcode `%s': %s"), name
, retval
);
724 /* Some opcodes include modifiers of various sorts with a "/mod"
725 syntax, like the architecture manual suggests. However, for
726 use with gcc at least, we also need access to those same opcodes
729 if ((slash
= strchr (name
, '/')) != NULL
)
731 char *p
= xmalloc (strlen (name
));
732 memcpy (p
, name
, slash
- name
);
733 strcpy (p
+ (slash
- name
), slash
+ 1);
735 (void)hash_insert(alpha_opcode_hash
, p
, (PTR
)&alpha_opcodes
[i
]);
736 /* Ignore failures -- the opcode table does duplicate some
737 variants in different forms, like "hw_stq" and "hw_st/q". */
740 while (++i
< alpha_num_opcodes
741 && (alpha_opcodes
[i
].name
== name
742 || !strcmp (alpha_opcodes
[i
].name
, name
)))
746 /* Create the macro hash table */
748 alpha_macro_hash
= hash_new ();
749 for (i
= 0; i
< alpha_num_macros
; )
751 const char *name
, *retval
;
753 name
= alpha_macros
[i
].name
;
754 retval
= hash_insert (alpha_macro_hash
, name
, (PTR
)&alpha_macros
[i
]);
756 as_fatal (_("internal error: can't hash macro `%s': %s"), name
, retval
);
758 while (++i
< alpha_num_macros
759 && (alpha_macros
[i
].name
== name
760 || !strcmp (alpha_macros
[i
].name
, name
)))
764 /* Construct symbols for each of the registers */
766 for (i
= 0; i
< 32; ++i
)
769 sprintf(name
, "$%d", i
);
770 alpha_register_table
[i
] = symbol_create(name
, reg_section
, i
,
776 sprintf(name
, "$f%d", i
-32);
777 alpha_register_table
[i
] = symbol_create(name
, reg_section
, i
,
781 /* Create the special symbols and sections we'll be using */
783 /* So .sbss will get used for tiny objects. */
784 bfd_set_gp_size (stdoutput
, g_switch_value
);
787 create_literal_section (".lita", &alpha_lita_section
, &alpha_lita_symbol
);
789 /* For handling the GP, create a symbol that won't be output in the
790 symbol table. We'll edit it out of relocs later. */
791 alpha_gp_symbol
= symbol_create ("<GP value>", alpha_lita_section
, 0x8000,
796 create_literal_section (".link", &alpha_link_section
, &alpha_link_symbol
);
802 segT sec
= subseg_new(".mdebug", (subsegT
)0);
803 bfd_set_section_flags(stdoutput
, sec
, SEC_HAS_CONTENTS
|SEC_READONLY
);
804 bfd_set_section_alignment(stdoutput
, sec
, 3);
808 subseg_set(text_section
, 0);
811 /* The public interface to the instruction assembler. */
817 char opname
[32]; /* current maximum is 13 */
818 expressionS tok
[MAX_INSN_ARGS
];
819 int ntok
, opnamelen
, trunclen
;
821 /* split off the opcode */
822 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_/48");
823 trunclen
= (opnamelen
< sizeof (opname
) - 1
825 : sizeof (opname
) - 1);
826 memcpy (opname
, str
, trunclen
);
827 opname
[trunclen
] = '\0';
829 /* tokenize the rest of the line */
830 if ((ntok
= tokenize_arguments (str
+ opnamelen
, tok
, MAX_INSN_ARGS
)) < 0)
832 as_bad (_("syntax error"));
837 assemble_tokens (opname
, tok
, ntok
, alpha_macros_on
);
840 /* Round up a section's size to the appropriate boundary. */
843 md_section_align (seg
, size
)
847 int align
= bfd_get_section_alignment(stdoutput
, seg
);
848 valueT mask
= ((valueT
)1 << align
) - 1;
850 return (size
+ mask
) & ~mask
;
853 /* Turn a string in input_line_pointer into a floating point constant
854 of type type, and store the appropriate bytes in *litP. The number
855 of LITTLENUMS emitted is stored in *sizeP. An error message is
856 returned, or NULL on OK. */
858 /* Equal to MAX_PRECISION in atof-ieee.c */
859 #define MAX_LITTLENUMS 6
861 extern char *vax_md_atof
PARAMS ((int, char *, int *));
864 md_atof (type
, litP
, sizeP
)
870 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
871 LITTLENUM_TYPE
*wordP
;
878 /* VAX md_atof doesn't like "G" for some reason. */
882 return vax_md_atof (type
, litP
, sizeP
);
905 return _("Bad call to MD_ATOF()");
907 t
= atof_ieee (input_line_pointer
, type
, words
);
909 input_line_pointer
= t
;
910 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
912 for (wordP
= words
+ prec
- 1; prec
--;)
914 md_number_to_chars (litP
, (long) (*wordP
--), sizeof (LITTLENUM_TYPE
));
915 litP
+= sizeof (LITTLENUM_TYPE
);
921 /* Take care of the target-specific command-line options. */
924 md_parse_option (c
, arg
)
931 alpha_nofloats_on
= 1;
943 g_switch_value
= atoi(arg
);
948 const struct cpu_type
*p
;
949 for (p
= cpu_types
; p
->name
; ++p
)
950 if (strcmp(arg
, p
->name
) == 0)
952 alpha_target_name
= p
->name
, alpha_target
= p
->flags
;
955 as_warn(_("Unknown CPU identifier `%s'"), arg
);
961 case '+': /* For g++. Hash any name > 63 chars long. */
962 alpha_flag_hash_long_names
= 1;
965 case 'H': /* Show new symbol after hash truncation */
966 alpha_flag_show_after_trunc
= 1;
969 case 'h': /* for gnu-c/vax compatibility. */
974 alpha_flag_relax
= 1;
979 alpha_flag_mdebug
= 1;
981 case OPTION_NO_MDEBUG
:
982 alpha_flag_mdebug
= 0;
993 /* Print a description of the command-line options that we accept. */
996 md_show_usage (stream
)
1001 -32addr treat addresses as 32-bit values\n\
1002 -F lack floating point instructions support\n\
1003 -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mall\n\
1004 specify variant of Alpha architecture\n
1005 -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264\n\
1006 these variants include PALcode opcodes\n"),
1011 -+ hash encode (don't truncate) names longer than 64 characters\n\
1012 -H show new symbol after hash truncation\n"),
1017 /* Decide from what point a pc-relative relocation is relative to,
1018 relative to the pc-relative fixup. Er, relatively speaking. */
1021 md_pcrel_from (fixP
)
1024 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
1025 switch (fixP
->fx_r_type
)
1027 case BFD_RELOC_ALPHA_GPDISP
:
1028 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1029 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1032 return fixP
->fx_size
+ addr
;
1036 /* Attempt to simplify or even eliminate a fixup. The return value is
1037 ignored; perhaps it was once meaningful, but now it is historical.
1038 To indicate that a fixup has been eliminated, set fixP->fx_done.
1040 For ELF, here it is that we transform the GPDISP_HI16 reloc we used
1041 internally into the GPDISP reloc used externally. We had to do
1042 this so that we'd have the GPDISP_LO16 reloc as a tag to compute
1043 the distance to the "lda" instruction for setting the addend to
1047 md_apply_fix (fixP
, valueP
)
1051 char * const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
1052 valueT value
= *valueP
;
1053 unsigned image
, size
;
1055 switch (fixP
->fx_r_type
)
1057 /* The GPDISP relocations are processed internally with a symbol
1058 referring to the current function; we need to drop in a value
1059 which, when added to the address of the start of the function,
1060 gives the desired GP. */
1061 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1063 fixS
*next
= fixP
->fx_next
;
1064 assert (next
->fx_r_type
== BFD_RELOC_ALPHA_GPDISP_LO16
);
1066 fixP
->fx_offset
= (next
->fx_frag
->fr_address
+ next
->fx_where
1067 - fixP
->fx_frag
->fr_address
- fixP
->fx_where
);
1069 value
= (value
- sign_extend_16 (value
)) >> 16;
1072 fixP
->fx_r_type
= BFD_RELOC_ALPHA_GPDISP
;
1076 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1077 value
= sign_extend_16 (value
);
1078 fixP
->fx_offset
= 0;
1084 fixP
->fx_addsy
= section_symbol (absolute_section
);
1085 md_number_to_chars (fixpos
, value
, 2);
1090 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
1095 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
1100 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
1103 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
1105 md_number_to_chars (fixpos
, value
, size
);
1111 case BFD_RELOC_GPREL32
:
1112 assert (fixP
->fx_subsy
== alpha_gp_symbol
);
1114 /* FIXME: inherited this obliviousness of `value' -- why? */
1115 md_number_to_chars (fixpos
, -alpha_gp_value
, 4);
1119 case BFD_RELOC_GPREL32
:
1123 case BFD_RELOC_23_PCREL_S2
:
1124 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
1126 image
= bfd_getl32(fixpos
);
1127 image
= (image
& ~0x1FFFFF) | ((value
>> 2) & 0x1FFFFF);
1132 case BFD_RELOC_ALPHA_HINT
:
1133 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
1135 image
= bfd_getl32(fixpos
);
1136 image
= (image
& ~0x3FFF) | ((value
>> 2) & 0x3FFF);
1142 case BFD_RELOC_ALPHA_LITERAL
:
1143 md_number_to_chars (fixpos
, value
, 2);
1146 case BFD_RELOC_ALPHA_LITUSE
:
1150 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1151 case BFD_RELOC_ALPHA_LITUSE
:
1155 case BFD_RELOC_ALPHA_LINKAGE
:
1156 case BFD_RELOC_ALPHA_CODEADDR
:
1162 const struct alpha_operand
*operand
;
1164 if ((int)fixP
->fx_r_type
>= 0)
1165 as_fatal (_("unhandled relocation type %s"),
1166 bfd_get_reloc_code_name (fixP
->fx_r_type
));
1168 assert (-(int)fixP
->fx_r_type
< alpha_num_operands
);
1169 operand
= &alpha_operands
[-(int)fixP
->fx_r_type
];
1171 /* The rest of these fixups only exist internally during symbol
1172 resolution and have no representation in the object file.
1173 Therefore they must be completely resolved as constants. */
1175 if (fixP
->fx_addsy
!= 0
1176 && fixP
->fx_addsy
->bsym
->section
!= absolute_section
)
1177 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1178 _("non-absolute expression in constant field"));
1180 image
= bfd_getl32(fixpos
);
1181 image
= insert_operand(image
, operand
, (offsetT
)value
,
1182 fixP
->fx_file
, fixP
->fx_line
);
1187 if (fixP
->fx_addsy
!= 0 || fixP
->fx_pcrel
!= 0)
1191 as_warn_where(fixP
->fx_file
, fixP
->fx_line
,
1192 _("type %d reloc done?\n"), (int)fixP
->fx_r_type
);
1197 md_number_to_chars(fixpos
, image
, 4);
1205 * Look for a register name in the given symbol.
1209 md_undefined_symbol(name
)
1214 int is_float
= 0, num
;
1219 if (name
[1] == 'p' && name
[2] == '\0')
1220 return alpha_register_table
[AXP_REG_FP
];
1225 if (!isdigit(*++name
))
1229 case '0': case '1': case '2': case '3': case '4':
1230 case '5': case '6': case '7': case '8': case '9':
1231 if (name
[1] == '\0')
1232 num
= name
[0] - '0';
1233 else if (name
[0] != '0' && isdigit(name
[1]) && name
[2] == '\0')
1235 num
= (name
[0] - '0') * 10 + name
[1] - '0';
1242 if (!alpha_noat_on
&& num
== AXP_REG_AT
)
1243 as_warn(_("Used $at without \".set noat\""));
1244 return alpha_register_table
[num
+ is_float
];
1247 if (name
[1] == 't' && name
[2] == '\0')
1250 as_warn(_("Used $at without \".set noat\""));
1251 return alpha_register_table
[AXP_REG_AT
];
1256 if (name
[1] == 'p' && name
[2] == '\0')
1257 return alpha_register_table
[alpha_gp_register
];
1261 if (name
[1] == 'p' && name
[2] == '\0')
1262 return alpha_register_table
[AXP_REG_SP
];
1270 /* @@@ Magic ECOFF bits. */
1273 alpha_frob_ecoff_data ()
1276 /* $zero and $f31 are read-only */
1277 alpha_gprmask
&= ~1;
1278 alpha_fprmask
&= ~1;
1282 /* Hook to remember a recently defined label so that the auto-align
1283 code can adjust the symbol after we know what alignment will be
1287 alpha_define_label (sym
)
1290 alpha_insn_label
= sym
;
1293 /* Return true if we must always emit a reloc for a type and false if
1294 there is some hope of resolving it a assembly time. */
1297 alpha_force_relocation (f
)
1300 if (alpha_flag_relax
)
1303 switch (f
->fx_r_type
)
1305 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1306 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1307 case BFD_RELOC_ALPHA_GPDISP
:
1309 case BFD_RELOC_ALPHA_LITERAL
:
1312 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1314 case BFD_RELOC_ALPHA_LITUSE
:
1315 case BFD_RELOC_GPREL32
:
1317 case BFD_RELOC_ALPHA_LINKAGE
:
1318 case BFD_RELOC_ALPHA_CODEADDR
:
1322 case BFD_RELOC_23_PCREL_S2
:
1325 case BFD_RELOC_ALPHA_HINT
:
1329 assert((int)f
->fx_r_type
< 0 && -(int)f
->fx_r_type
< alpha_num_operands
);
1334 /* Return true if we can partially resolve a relocation now. */
1337 alpha_fix_adjustable (f
)
1341 /* Prevent all adjustments to global symbols */
1342 if (S_IS_EXTERN (f
->fx_addsy
) || S_IS_WEAK (f
->fx_addsy
))
1346 /* Are there any relocation types for which we must generate a reloc
1347 but we can adjust the values contained within it? */
1348 switch (f
->fx_r_type
)
1350 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1351 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1352 case BFD_RELOC_ALPHA_GPDISP
:
1356 case BFD_RELOC_ALPHA_LITERAL
:
1359 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1362 case BFD_RELOC_ALPHA_LINKAGE
:
1363 case BFD_RELOC_ALPHA_CODEADDR
:
1367 case BFD_RELOC_ALPHA_LITUSE
:
1370 case BFD_RELOC_GPREL32
:
1371 case BFD_RELOC_23_PCREL_S2
:
1374 case BFD_RELOC_ALPHA_HINT
:
1378 assert ((int)f
->fx_r_type
< 0
1379 && - (int)f
->fx_r_type
< alpha_num_operands
);
1385 /* Generate the BFD reloc to be stuck in the object file from the
1386 fixup used internally in the assembler. */
1389 tc_gen_reloc (sec
, fixp
)
1395 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
1396 reloc
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
1397 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1399 /* Make sure none of our internal relocations make it this far.
1400 They'd better have been fully resolved by this point. */
1401 assert ((int)fixp
->fx_r_type
> 0);
1403 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
1404 if (reloc
->howto
== NULL
)
1406 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1407 _("cannot represent `%s' relocation in object file"),
1408 bfd_get_reloc_code_name (fixp
->fx_r_type
));
1412 if (!fixp
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
1414 as_fatal (_("internal error? cannot generate `%s' relocation"),
1415 bfd_get_reloc_code_name (fixp
->fx_r_type
));
1417 assert (!fixp
->fx_pcrel
== !reloc
->howto
->pc_relative
);
1420 if (fixp
->fx_r_type
== BFD_RELOC_ALPHA_LITERAL
)
1422 /* fake out bfd_perform_relocation. sigh */
1423 reloc
->addend
= -alpha_gp_value
;
1428 reloc
->addend
= fixp
->fx_offset
;
1431 * Ohhh, this is ugly. The problem is that if this is a local global
1432 * symbol, the relocation will entirely be performed at link time, not
1433 * at assembly time. bfd_perform_reloc doesn't know about this sort
1434 * of thing, and as a result we need to fake it out here.
1436 if ((S_IS_EXTERN (fixp
->fx_addsy
) || S_IS_WEAK (fixp
->fx_addsy
))
1437 && !S_IS_COMMON(fixp
->fx_addsy
))
1438 reloc
->addend
-= fixp
->fx_addsy
->bsym
->value
;
1445 /* Parse a register name off of the input_line and return a register
1446 number. Gets md_undefined_symbol above to do the register name
1449 Only called as a part of processing the ECOFF .frame directive. */
1452 tc_get_register (frame
)
1455 int framereg
= AXP_REG_SP
;
1458 if (*input_line_pointer
== '$')
1460 char *s
= input_line_pointer
;
1461 char c
= get_symbol_end ();
1462 symbolS
*sym
= md_undefined_symbol (s
);
1464 *strchr(s
, '\0') = c
;
1465 if (sym
&& (framereg
= S_GET_VALUE (sym
)) <= 31)
1468 as_warn (_("frame reg expected, using $%d."), framereg
);
1471 note_gpreg (framereg
);
1475 /* This is called before the symbol table is processed. In order to
1476 work with gcc when using mips-tfile, we must keep all local labels.
1477 However, in other cases, we want to discard them. If we were
1478 called with -g, but we didn't see any debugging information, it may
1479 mean that gcc is smuggling debugging information through to
1480 mips-tfile, in which case we must generate all local labels. */
1485 alpha_frob_file_before_adjust ()
1487 if (alpha_debug
!= 0
1488 && ! ecoff_debugging_seen
)
1489 flag_keep_locals
= 1;
1492 #endif /* OBJ_ECOFF */
1494 /* Parse the arguments to an opcode. */
1497 tokenize_arguments (str
, tok
, ntok
)
1502 expressionS
*end_tok
= tok
+ ntok
;
1503 char *old_input_line_pointer
;
1504 int saw_comma
= 0, saw_arg
= 0;
1506 memset (tok
, 0, sizeof (*tok
) * ntok
);
1508 /* Save and restore input_line_pointer around this function */
1509 old_input_line_pointer
= input_line_pointer
;
1510 input_line_pointer
= str
;
1512 while (tok
< end_tok
&& *input_line_pointer
)
1515 switch (*input_line_pointer
)
1521 ++input_line_pointer
;
1522 if (saw_comma
|| !saw_arg
)
1529 char *hold
= input_line_pointer
++;
1531 /* First try for parenthesized register ... */
1533 if (*input_line_pointer
== ')' && tok
->X_op
== O_register
)
1535 tok
->X_op
= (saw_comma
? O_cpregister
: O_pregister
);
1538 ++input_line_pointer
;
1543 /* ... then fall through to plain expression */
1544 input_line_pointer
= hold
;
1548 if (saw_arg
&& !saw_comma
)
1551 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
1564 input_line_pointer
= old_input_line_pointer
;
1565 return ntok
- (end_tok
- tok
);
1568 input_line_pointer
= old_input_line_pointer
;
1572 /* Search forward through all variants of an opcode looking for a
1575 static const struct alpha_opcode
*
1576 find_opcode_match(first_opcode
, tok
, pntok
, pcpumatch
)
1577 const struct alpha_opcode
*first_opcode
;
1578 const expressionS
*tok
;
1582 const struct alpha_opcode
*opcode
= first_opcode
;
1584 int got_cpu_match
= 0;
1588 const unsigned char *opidx
;
1591 /* Don't match opcodes that don't exist on this architecture */
1592 if (!(opcode
->flags
& alpha_target
))
1597 for (opidx
= opcode
->operands
; *opidx
; ++opidx
)
1599 const struct alpha_operand
*operand
= &alpha_operands
[*opidx
];
1601 /* only take input from real operands */
1602 if (operand
->flags
& AXP_OPERAND_FAKE
)
1605 /* when we expect input, make sure we have it */
1608 if ((operand
->flags
& AXP_OPERAND_OPTIONAL_MASK
) == 0)
1613 /* match operand type with expression type */
1614 switch (operand
->flags
& AXP_OPERAND_TYPECHECK_MASK
)
1616 case AXP_OPERAND_IR
:
1617 if (tok
[tokidx
].X_op
!= O_register
1618 || !is_ir_num(tok
[tokidx
].X_add_number
))
1621 case AXP_OPERAND_FPR
:
1622 if (tok
[tokidx
].X_op
!= O_register
1623 || !is_fpr_num(tok
[tokidx
].X_add_number
))
1626 case AXP_OPERAND_IR
|AXP_OPERAND_PARENS
:
1627 if (tok
[tokidx
].X_op
!= O_pregister
1628 || !is_ir_num(tok
[tokidx
].X_add_number
))
1631 case AXP_OPERAND_IR
|AXP_OPERAND_PARENS
|AXP_OPERAND_COMMA
:
1632 if (tok
[tokidx
].X_op
!= O_cpregister
1633 || !is_ir_num(tok
[tokidx
].X_add_number
))
1637 case AXP_OPERAND_RELATIVE
:
1638 case AXP_OPERAND_SIGNED
:
1639 case AXP_OPERAND_UNSIGNED
:
1640 switch (tok
[tokidx
].X_op
)
1652 /* everything else should have been fake */
1658 /* possible match -- did we use all of our input? */
1667 while (++opcode
-alpha_opcodes
< alpha_num_opcodes
1668 && !strcmp(opcode
->name
, first_opcode
->name
));
1671 *pcpumatch
= got_cpu_match
;
1676 /* Search forward through all variants of a macro looking for a syntax
1679 static const struct alpha_macro
*
1680 find_macro_match(first_macro
, tok
, pntok
)
1681 const struct alpha_macro
*first_macro
;
1682 const expressionS
*tok
;
1685 const struct alpha_macro
*macro
= first_macro
;
1690 const enum alpha_macro_arg
*arg
= macro
->argsets
;
1705 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_register
1706 || !is_ir_num(tok
[tokidx
].X_add_number
))
1711 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_pregister
1712 || !is_ir_num(tok
[tokidx
].X_add_number
))
1717 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_cpregister
1718 || !is_ir_num(tok
[tokidx
].X_add_number
))
1723 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_register
1724 || !is_fpr_num(tok
[tokidx
].X_add_number
))
1732 switch (tok
[tokidx
].X_op
)
1745 while (*arg
!= MACRO_EOA
)
1753 while (++macro
-alpha_macros
< alpha_num_macros
1754 && !strcmp(macro
->name
, first_macro
->name
));
1759 /* Insert an operand value into an instruction. */
1762 insert_operand(insn
, operand
, val
, file
, line
)
1764 const struct alpha_operand
*operand
;
1769 if (operand
->bits
!= 32 && !(operand
->flags
& AXP_OPERAND_NOOVERFLOW
))
1773 if (operand
->flags
& AXP_OPERAND_SIGNED
)
1775 max
= (1 << (operand
->bits
- 1)) - 1;
1776 min
= -(1 << (operand
->bits
- 1));
1780 max
= (1 << operand
->bits
) - 1;
1784 if (val
< min
|| val
> max
)
1787 _("operand out of range (%s not between %d and %d)");
1788 char buf
[sizeof (val
) * 3 + 2];
1790 sprint_value(buf
, val
);
1792 as_warn_where(file
, line
, err
, buf
, min
, max
);
1794 as_warn(err
, buf
, min
, max
);
1798 if (operand
->insert
)
1800 const char *errmsg
= NULL
;
1802 insn
= (*operand
->insert
) (insn
, val
, &errmsg
);
1807 insn
|= ((val
& ((1 << operand
->bits
) - 1)) << operand
->shift
);
1813 * Turn an opcode description and a set of arguments into
1814 * an instruction and a fixup.
1818 assemble_insn(opcode
, tok
, ntok
, insn
)
1819 const struct alpha_opcode
*opcode
;
1820 const expressionS
*tok
;
1822 struct alpha_insn
*insn
;
1824 const unsigned char *argidx
;
1828 memset (insn
, 0, sizeof (*insn
));
1829 image
= opcode
->opcode
;
1831 for (argidx
= opcode
->operands
; *argidx
; ++argidx
)
1833 const struct alpha_operand
*operand
= &alpha_operands
[*argidx
];
1834 const expressionS
*t
;
1836 if (operand
->flags
& AXP_OPERAND_FAKE
)
1838 /* fake operands take no value and generate no fixup */
1839 image
= insert_operand(image
, operand
, 0, NULL
, 0);
1845 switch (operand
->flags
& AXP_OPERAND_OPTIONAL_MASK
)
1847 case AXP_OPERAND_DEFAULT_FIRST
:
1850 case AXP_OPERAND_DEFAULT_SECOND
:
1853 case AXP_OPERAND_DEFAULT_ZERO
:
1855 static const expressionS zero_exp
= { 0, 0, 0, O_constant
, 1 };
1871 image
= insert_operand(image
, operand
, regno(t
->X_add_number
),
1876 image
= insert_operand(image
, operand
, t
->X_add_number
, NULL
, 0);
1881 struct alpha_fixup
*fixup
;
1883 if (insn
->nfixups
>= MAX_INSN_FIXUPS
)
1884 as_fatal(_("too many fixups"));
1886 fixup
= &insn
->fixups
[insn
->nfixups
++];
1889 fixup
->reloc
= operand
->default_reloc
;
1899 * Actually output an instruction with its fixup.
1904 struct alpha_insn
*insn
;
1909 /* Take care of alignment duties */
1910 if (alpha_auto_align_on
&& alpha_current_align
< 2)
1911 alpha_align (2, (char *) NULL
, alpha_insn_label
, 0);
1912 if (alpha_current_align
> 2)
1913 alpha_current_align
= 2;
1914 alpha_insn_label
= NULL
;
1916 /* Write out the instruction. */
1918 md_number_to_chars (f
, insn
->insn
, 4);
1920 /* Apply the fixups in order */
1921 for (i
= 0; i
< insn
->nfixups
; ++i
)
1923 const struct alpha_operand
*operand
;
1924 struct alpha_fixup
*fixup
= &insn
->fixups
[i
];
1928 /* Some fixups are only used internally and so have no howto */
1929 if ((int)fixup
->reloc
< 0)
1931 operand
= &alpha_operands
[-(int)fixup
->reloc
];
1933 pcrel
= ((operand
->flags
& AXP_OPERAND_RELATIVE
) != 0);
1936 /* These relocation types are only used internally. */
1937 else if (fixup
->reloc
== BFD_RELOC_ALPHA_GPDISP_HI16
1938 || fixup
->reloc
== BFD_RELOC_ALPHA_GPDISP_LO16
)
1940 size
= 2, pcrel
= 0;
1945 reloc_howto_type
*reloc_howto
1946 = bfd_reloc_type_lookup (stdoutput
, fixup
->reloc
);
1947 assert (reloc_howto
);
1949 size
= bfd_get_reloc_size (reloc_howto
);
1950 pcrel
= reloc_howto
->pc_relative
;
1952 assert (size
>= 1 && size
<= 4);
1954 fixP
= fix_new_exp (frag_now
, f
- frag_now
->fr_literal
, size
,
1955 &fixup
->exp
, pcrel
, fixup
->reloc
);
1957 /* Turn off complaints that the addend is too large for some fixups */
1958 switch (fixup
->reloc
)
1960 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1962 case BFD_RELOC_ALPHA_LITERAL
:
1965 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1967 case BFD_RELOC_GPREL32
:
1968 fixP
->fx_no_overflow
= 1;
1972 if ((int)fixup
->reloc
< 0)
1974 if (operand
->flags
& AXP_OPERAND_NOOVERFLOW
)
1975 fixP
->fx_no_overflow
= 1;
1982 /* Given an opcode name and a pre-tokenized set of arguments, assemble
1983 the insn, but do not emit it.
1985 Note that this implies no macros allowed, since we can't store more
1986 than one insn in an insn structure. */
1989 assemble_tokens_to_insn(opname
, tok
, ntok
, insn
)
1991 const expressionS
*tok
;
1993 struct alpha_insn
*insn
;
1995 const struct alpha_opcode
*opcode
;
1997 /* search opcodes */
1998 opcode
= (const struct alpha_opcode
*) hash_find (alpha_opcode_hash
, opname
);
2002 opcode
= find_opcode_match (opcode
, tok
, &ntok
, &cpumatch
);
2005 assemble_insn (opcode
, tok
, ntok
, insn
);
2009 as_bad (_("inappropriate arguments for opcode `%s'"), opname
);
2011 as_bad (_("opcode `%s' not supported for target %s"), opname
,
2015 as_bad (_("unknown opcode `%s'"), opname
);
2018 /* Given an opcode name and a pre-tokenized set of arguments, take the
2019 opcode all the way through emission. */
2022 assemble_tokens (opname
, tok
, ntok
, local_macros_on
)
2024 const expressionS
*tok
;
2026 int local_macros_on
;
2028 int found_something
= 0;
2029 const struct alpha_opcode
*opcode
;
2030 const struct alpha_macro
*macro
;
2034 if (local_macros_on
)
2036 macro
= ((const struct alpha_macro
*)
2037 hash_find (alpha_macro_hash
, opname
));
2040 found_something
= 1;
2041 macro
= find_macro_match (macro
, tok
, &ntok
);
2044 (*macro
->emit
) (tok
, ntok
, macro
->arg
);
2050 /* search opcodes */
2051 opcode
= (const struct alpha_opcode
*) hash_find (alpha_opcode_hash
, opname
);
2054 found_something
= 1;
2055 opcode
= find_opcode_match (opcode
, tok
, &ntok
, &cpumatch
);
2058 struct alpha_insn insn
;
2059 assemble_insn (opcode
, tok
, ntok
, &insn
);
2065 if (found_something
)
2067 as_bad (_("inappropriate arguments for opcode `%s'"), opname
);
2069 as_bad (_("opcode `%s' not supported for target %s"), opname
,
2072 as_bad (_("unknown opcode `%s'"), opname
);
2076 /* Some instruction sets indexed by lg(size) */
2077 static const char * const sextX_op
[] = { "sextb", "sextw", "sextl", NULL
};
2078 static const char * const insXl_op
[] = { "insbl", "inswl", "insll", "insql" };
2079 static const char * const insXh_op
[] = { NULL
, "inswh", "inslh", "insqh" };
2080 static const char * const extXl_op
[] = { "extbl", "extwl", "extll", "extql" };
2081 static const char * const extXh_op
[] = { NULL
, "extwh", "extlh", "extqh" };
2082 static const char * const mskXl_op
[] = { "mskbl", "mskwl", "mskll", "mskql" };
2083 static const char * const mskXh_op
[] = { NULL
, "mskwh", "msklh", "mskqh" };
2084 static const char * const stX_op
[] = { "stb", "stw", "stl", "stq" };
2085 static const char * const ldX_op
[] = { "ldb", "ldw", "ldll", "ldq" };
2086 static const char * const ldXu_op
[] = { "ldbu", "ldwu", NULL
, NULL
};
2088 /* Implement the ldgp macro. */
2091 emit_ldgp (tok
, ntok
, unused
)
2092 const expressionS
*tok
;
2099 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
2100 /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)"
2101 with appropriate constants and relocations. */
2102 struct alpha_insn insn
;
2103 expressionS newtok
[3];
2106 /* We're going to need this symbol in md_apply_fix(). */
2107 (void) section_symbol (absolute_section
);
2110 if (regno (tok
[2].X_add_number
) == AXP_REG_PV
)
2111 ecoff_set_gp_prolog_size (0);
2115 set_tok_const (newtok
[1], 0);
2118 assemble_tokens_to_insn ("ldah", newtok
, 3, &insn
);
2123 if (addend
.X_op
!= O_constant
)
2124 as_bad (_("can not resolve expression"));
2125 addend
.X_op
= O_symbol
;
2126 addend
.X_add_symbol
= alpha_gp_symbol
;
2130 insn
.fixups
[0].exp
= addend
;
2131 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_GPDISP_HI16
;
2135 set_tok_preg (newtok
[2], tok
[0].X_add_number
);
2137 assemble_tokens_to_insn ("lda", newtok
, 3, &insn
);
2140 addend
.X_add_number
+= 4;
2144 insn
.fixups
[0].exp
= addend
;
2145 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_GPDISP_LO16
;
2148 #endif /* OBJ_ECOFF || OBJ_ELF */
2153 /* Add symbol+addend to link pool.
2154 Return offset from basesym to entry in link pool.
2156 Add new fixup only if offset isn't 16bit. */
2159 add_to_link_pool (basesym
, sym
, addend
)
2164 segT current_section
= now_seg
;
2165 int current_subsec
= now_subseg
;
2167 bfd_reloc_code_real_type reloc_type
;
2169 segment_info_type
*seginfo
= seg_info (alpha_link_section
);
2172 offset
= -basesym
->sy_obj
;
2174 /* @@ This assumes all entries in a given section will be of the same
2175 size... Probably correct, but unwise to rely on. */
2176 /* This must always be called with the same subsegment. */
2178 if (seginfo
->frchainP
)
2179 for (fixp
= seginfo
->frchainP
->fix_root
;
2180 fixp
!= (fixS
*) NULL
;
2181 fixp
= fixp
->fx_next
, offset
+= 8)
2183 if (fixp
->fx_addsy
== sym
&& fixp
->fx_offset
== addend
)
2185 if (range_signed_16 (offset
))
2192 /* Not found in 16bit signed range. */
2194 subseg_set (alpha_link_section
, 0);
2198 fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, sym
, addend
, 0,
2201 subseg_set (current_section
, current_subsec
);
2202 seginfo
->literal_pool_size
+= 8;
2206 #endif /* OBJ_EVAX */
2208 /* Load a (partial) expression into a target register.
2210 If poffset is not null, after the call it will either contain
2211 O_constant 0, or a 16-bit offset appropriate for any MEM format
2212 instruction. In addition, pbasereg will be modified to point to
2213 the base register to use in that MEM format instruction.
2215 In any case, *pbasereg should contain a base register to add to the
2216 expression. This will normally be either AXP_REG_ZERO or
2217 alpha_gp_register. Symbol addresses will always be loaded via $gp,
2218 so "foo($0)" is interpreted as adding the address of foo to $0;
2219 i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
2220 but this is what OSF/1 does.
2222 Finally, the return value is true if the calling macro may emit a
2223 LITUSE reloc if otherwise appropriate. */
2226 load_expression (targreg
, exp
, pbasereg
, poffset
)
2228 const expressionS
*exp
;
2230 expressionS
*poffset
;
2232 int emit_lituse
= 0;
2233 offsetT addend
= exp
->X_add_number
;
2234 int basereg
= *pbasereg
;
2235 struct alpha_insn insn
;
2236 expressionS newtok
[3];
2245 /* attempt to reduce .lit load by splitting the offset from
2246 its symbol when possible, but don't create a situation in
2248 if (!range_signed_32 (addend
) &&
2249 (alpha_noat_on
|| targreg
== AXP_REG_AT
))
2251 lit
= add_to_literal_pool (exp
->X_add_symbol
, addend
,
2252 alpha_lita_section
, 8);
2257 lit
= add_to_literal_pool (exp
->X_add_symbol
, 0,
2258 alpha_lita_section
, 8);
2262 as_fatal (_("overflow in literal (.lita) table"));
2264 /* emit "ldq r, lit(gp)" */
2266 if (basereg
!= alpha_gp_register
&& targreg
== basereg
)
2269 as_bad (_("macro requires $at register while noat in effect"));
2270 if (targreg
== AXP_REG_AT
)
2271 as_bad (_("macro requires $at while $at in use"));
2273 set_tok_reg (newtok
[0], AXP_REG_AT
);
2276 set_tok_reg (newtok
[0], targreg
);
2277 set_tok_sym (newtok
[1], alpha_lita_symbol
, lit
);
2278 set_tok_preg (newtok
[2], alpha_gp_register
);
2280 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2282 assert (insn
.nfixups
== 1);
2283 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITERAL
;
2284 #endif /* OBJ_ECOFF */
2286 /* emit "ldq r, gotoff(gp)" */
2288 if (basereg
!= alpha_gp_register
&& targreg
== basereg
)
2291 as_bad (_("macro requires $at register while noat in effect"));
2292 if (targreg
== AXP_REG_AT
)
2293 as_bad (_("macro requires $at while $at in use"));
2295 set_tok_reg (newtok
[0], AXP_REG_AT
);
2298 set_tok_reg (newtok
[0], targreg
);
2300 /* XXX: Disable this .got minimizing optimization so that we can get
2301 better instruction offset knowledge in the compiler. This happens
2302 very infrequently anyway. */
2303 if (1 || !range_signed_32 (addend
)
2304 && (alpha_noat_on
|| targreg
== AXP_REG_AT
))
2311 set_tok_sym (newtok
[1], exp
->X_add_symbol
, 0);
2314 set_tok_preg (newtok
[2], alpha_gp_register
);
2316 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2318 assert (insn
.nfixups
== 1);
2319 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_ELF_LITERAL
;
2320 #endif /* OBJ_ELF */
2324 /* Find symbol or symbol pointer in link section. */
2326 if (exp
->X_add_symbol
== alpha_evax_proc
.symbol
)
2328 if (range_signed_16 (addend
))
2330 set_tok_reg (newtok
[0], targreg
);
2331 set_tok_const (newtok
[1], addend
);
2332 set_tok_preg (newtok
[2], basereg
);
2333 assemble_tokens_to_insn ("lda", newtok
, 3, &insn
);
2338 set_tok_reg (newtok
[0], targreg
);
2339 set_tok_const (newtok
[1], 0);
2340 set_tok_preg (newtok
[2], basereg
);
2341 assemble_tokens_to_insn ("lda", newtok
, 3, &insn
);
2346 if (!range_signed_32 (addend
))
2348 link
= add_to_link_pool (alpha_evax_proc
.symbol
,
2349 exp
->X_add_symbol
, addend
);
2354 link
= add_to_link_pool (alpha_evax_proc
.symbol
,
2355 exp
->X_add_symbol
, 0);
2357 set_tok_reg (newtok
[0], targreg
);
2358 set_tok_const (newtok
[1], link
);
2359 set_tok_preg (newtok
[2], basereg
);
2360 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2362 #endif /* OBJ_EVAX */
2369 if (basereg
!= alpha_gp_register
&& basereg
!= AXP_REG_ZERO
)
2371 /* emit "addq r, base, r" */
2373 set_tok_reg (newtok
[1], basereg
);
2374 set_tok_reg (newtok
[2], targreg
);
2375 assemble_tokens ("addq", newtok
, 3, 0);
2387 /* Assume that this difference expression will be resolved to an
2388 absolute value and that that value will fit in 16 bits. */
2390 set_tok_reg (newtok
[0], targreg
);
2392 set_tok_preg (newtok
[2], basereg
);
2393 assemble_tokens ("lda", newtok
, 3, 0);
2396 set_tok_const (*poffset
, 0);
2400 if (exp
->X_add_number
> 0)
2401 as_bad (_("bignum invalid; zero assumed"));
2403 as_bad (_("floating point number invalid; zero assumed"));
2411 if (!range_signed_32 (addend
))
2415 /* for 64-bit addends, just put it in the literal pool */
2418 /* emit "ldq targreg, lit(basereg)" */
2419 lit
= add_to_link_pool (alpha_evax_proc
.symbol
,
2420 section_symbol (absolute_section
), addend
);
2421 set_tok_reg (newtok
[0], targreg
);
2422 set_tok_const (newtok
[1], lit
);
2423 set_tok_preg (newtok
[2], alpha_gp_register
);
2424 assemble_tokens ("ldq", newtok
, 3, 0);
2427 if (alpha_lit8_section
== NULL
)
2429 create_literal_section (".lit8",
2430 &alpha_lit8_section
,
2431 &alpha_lit8_symbol
);
2434 alpha_lit8_literal
= add_to_literal_pool (alpha_lit8_symbol
, 0x8000,
2435 alpha_lita_section
, 8);
2436 if (alpha_lit8_literal
>= 0x8000)
2437 as_fatal (_("overflow in literal (.lita) table"));
2441 lit
= add_to_literal_pool (NULL
, addend
, alpha_lit8_section
, 8) - 0x8000;
2443 as_fatal (_("overflow in literal (.lit8) table"));
2445 /* emit "lda litreg, .lit8+0x8000" */
2447 if (targreg
== basereg
)
2450 as_bad (_("macro requires $at register while noat in effect"));
2451 if (targreg
== AXP_REG_AT
)
2452 as_bad (_("macro requires $at while $at in use"));
2454 set_tok_reg (newtok
[0], AXP_REG_AT
);
2457 set_tok_reg (newtok
[0], targreg
);
2459 set_tok_sym (newtok
[1], alpha_lita_symbol
, alpha_lit8_literal
);
2462 set_tok_sym (newtok
[1], alpha_lit8_symbol
, 0x8000);
2464 set_tok_preg (newtok
[2], alpha_gp_register
);
2466 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2468 assert (insn
.nfixups
== 1);
2470 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITERAL
;
2473 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_ELF_LITERAL
;
2478 /* emit "ldq litreg, lit(litreg)" */
2480 set_tok_const (newtok
[1], lit
);
2481 set_tok_preg (newtok
[2], newtok
[0].X_add_number
);
2483 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2485 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
2486 if (insn
.nfixups
> 0)
2488 memmove (&insn
.fixups
[1], &insn
.fixups
[0],
2489 sizeof(struct alpha_fixup
) * insn
.nfixups
);
2492 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITUSE
;
2493 insn
.fixups
[0].exp
.X_op
= O_constant
;
2494 insn
.fixups
[0].exp
.X_add_number
= 1;
2499 /* emit "addq litreg, base, target" */
2501 if (basereg
!= AXP_REG_ZERO
)
2503 set_tok_reg (newtok
[1], basereg
);
2504 set_tok_reg (newtok
[2], targreg
);
2505 assemble_tokens ("addq", newtok
, 3, 0);
2507 #endif /* !OBJ_EVAX */
2510 set_tok_const (*poffset
, 0);
2511 *pbasereg
= targreg
;
2515 offsetT low
, high
, extra
, tmp
;
2517 /* for 32-bit operands, break up the addend */
2519 low
= sign_extend_16 (addend
);
2521 high
= sign_extend_16 (tmp
>> 16);
2523 if (tmp
- (high
<< 16))
2527 high
= sign_extend_16 (tmp
>> 16);
2532 set_tok_reg (newtok
[0], targreg
);
2533 set_tok_preg (newtok
[2], basereg
);
2537 /* emit "ldah r, extra(r) */
2538 set_tok_const (newtok
[1], extra
);
2539 assemble_tokens ("ldah", newtok
, 3, 0);
2540 set_tok_preg (newtok
[2], basereg
= targreg
);
2545 /* emit "ldah r, high(r) */
2546 set_tok_const (newtok
[1], high
);
2547 assemble_tokens ("ldah", newtok
, 3, 0);
2549 set_tok_preg (newtok
[2], basereg
);
2552 if ((low
&& !poffset
) || (!poffset
&& basereg
!= targreg
))
2554 /* emit "lda r, low(base)" */
2555 set_tok_const (newtok
[1], low
);
2556 assemble_tokens ("lda", newtok
, 3, 0);
2562 set_tok_const (*poffset
, low
);
2563 *pbasereg
= basereg
;
2569 /* The lda macro differs from the lda instruction in that it handles
2570 most simple expressions, particualrly symbol address loads and
2574 emit_lda (tok
, ntok
, unused
)
2575 const expressionS
*tok
;
2582 basereg
= (tok
[1].X_op
== O_constant
? AXP_REG_ZERO
: alpha_gp_register
);
2584 basereg
= tok
[2].X_add_number
;
2586 (void) load_expression (tok
[0].X_add_number
, &tok
[1], &basereg
, NULL
);
2589 /* The ldah macro differs from the ldah instruction in that it has $31
2590 as an implied base register. */
2593 emit_ldah (tok
, ntok
, unused
)
2594 const expressionS
*tok
;
2598 expressionS newtok
[3];
2602 set_tok_preg (newtok
[2], AXP_REG_ZERO
);
2604 assemble_tokens ("ldah", newtok
, 3, 0);
2607 /* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
2608 etc. They differ from the real instructions in that they do simple
2609 expressions like the lda macro. */
2612 emit_ir_load (tok
, ntok
, opname
)
2613 const expressionS
*tok
;
2617 int basereg
, lituse
;
2618 expressionS newtok
[3];
2619 struct alpha_insn insn
;
2622 basereg
= (tok
[1].X_op
== O_constant
? AXP_REG_ZERO
: alpha_gp_register
);
2624 basereg
= tok
[2].X_add_number
;
2626 lituse
= load_expression (tok
[0].X_add_number
, &tok
[1], &basereg
,
2630 set_tok_preg (newtok
[2], basereg
);
2632 assemble_tokens_to_insn ((const char *)opname
, newtok
, 3, &insn
);
2636 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
2637 if (insn
.nfixups
> 0)
2639 memmove (&insn
.fixups
[1], &insn
.fixups
[0],
2640 sizeof(struct alpha_fixup
) * insn
.nfixups
);
2643 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITUSE
;
2644 insn
.fixups
[0].exp
.X_op
= O_constant
;
2645 insn
.fixups
[0].exp
.X_add_number
= 1;
2651 /* Handle fp register loads, and both integer and fp register stores.
2652 Again, we handle simple expressions. */
2655 emit_loadstore (tok
, ntok
, opname
)
2656 const expressionS
*tok
;
2660 int basereg
, lituse
;
2661 expressionS newtok
[3];
2662 struct alpha_insn insn
;
2665 basereg
= (tok
[1].X_op
== O_constant
? AXP_REG_ZERO
: alpha_gp_register
);
2667 basereg
= tok
[2].X_add_number
;
2669 if (tok
[1].X_op
!= O_constant
|| !range_signed_16(tok
[1].X_add_number
))
2672 as_bad (_("macro requires $at register while noat in effect"));
2674 lituse
= load_expression (AXP_REG_AT
, &tok
[1], &basereg
, &newtok
[1]);
2683 set_tok_preg (newtok
[2], basereg
);
2685 assemble_tokens_to_insn ((const char *)opname
, newtok
, 3, &insn
);
2689 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
2690 if (insn
.nfixups
> 0)
2692 memmove (&insn
.fixups
[1], &insn
.fixups
[0],
2693 sizeof(struct alpha_fixup
) * insn
.nfixups
);
2696 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITUSE
;
2697 insn
.fixups
[0].exp
.X_op
= O_constant
;
2698 insn
.fixups
[0].exp
.X_add_number
= 1;
2704 /* Load a half-word or byte as an unsigned value. */
2707 emit_ldXu (tok
, ntok
, vlgsize
)
2708 const expressionS
*tok
;
2712 if (alpha_target
& AXP_OPCODE_BWX
)
2713 emit_ir_load (tok
, ntok
, ldXu_op
[(long)vlgsize
]);
2716 expressionS newtok
[3];
2719 as_bad (_("macro requires $at register while noat in effect"));
2721 /* emit "lda $at, exp" */
2723 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
2724 newtok
[0].X_add_number
= AXP_REG_AT
;
2725 assemble_tokens ("lda", newtok
, ntok
, 1);
2727 /* emit "ldq_u targ, 0($at)" */
2730 set_tok_const (newtok
[1], 0);
2731 set_tok_preg (newtok
[2], AXP_REG_AT
);
2732 assemble_tokens ("ldq_u", newtok
, 3, 1);
2734 /* emit "extXl targ, $at, targ" */
2736 set_tok_reg (newtok
[1], AXP_REG_AT
);
2737 newtok
[2] = newtok
[0];
2738 assemble_tokens (extXl_op
[(long)vlgsize
], newtok
, 3, 1);
2742 /* Load a half-word or byte as a signed value. */
2745 emit_ldX (tok
, ntok
, vlgsize
)
2746 const expressionS
*tok
;
2750 emit_ldXu (tok
, ntok
, vlgsize
);
2751 assemble_tokens (sextX_op
[(long)vlgsize
], tok
, 1, 1);
2754 /* Load an integral value from an unaligned address as an unsigned
2758 emit_uldXu (tok
, ntok
, vlgsize
)
2759 const expressionS
*tok
;
2763 long lgsize
= (long)vlgsize
;
2764 expressionS newtok
[3];
2767 as_bad (_("macro requires $at register while noat in effect"));
2769 /* emit "lda $at, exp" */
2771 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
2772 newtok
[0].X_add_number
= AXP_REG_AT
;
2773 assemble_tokens ("lda", newtok
, ntok
, 1);
2775 /* emit "ldq_u $t9, 0($at)" */
2777 set_tok_reg (newtok
[0], AXP_REG_T9
);
2778 set_tok_const (newtok
[1], 0);
2779 set_tok_preg (newtok
[2], AXP_REG_AT
);
2780 assemble_tokens ("ldq_u", newtok
, 3, 1);
2782 /* emit "ldq_u $t10, size-1($at)" */
2784 set_tok_reg (newtok
[0], AXP_REG_T10
);
2785 set_tok_const (newtok
[1], (1<<lgsize
)-1);
2786 assemble_tokens ("ldq_u", newtok
, 3, 1);
2788 /* emit "extXl $t9, $at, $t9" */
2790 set_tok_reg (newtok
[0], AXP_REG_T9
);
2791 set_tok_reg (newtok
[1], AXP_REG_AT
);
2792 set_tok_reg (newtok
[2], AXP_REG_T9
);
2793 assemble_tokens (extXl_op
[lgsize
], newtok
, 3, 1);
2795 /* emit "extXh $t10, $at, $t10" */
2797 set_tok_reg (newtok
[0], AXP_REG_T10
);
2798 set_tok_reg (newtok
[2], AXP_REG_T10
);
2799 assemble_tokens (extXh_op
[lgsize
], newtok
, 3, 1);
2801 /* emit "or $t9, $t10, targ" */
2803 set_tok_reg (newtok
[0], AXP_REG_T9
);
2804 set_tok_reg (newtok
[1], AXP_REG_T10
);
2806 assemble_tokens ("or", newtok
, 3, 1);
2809 /* Load an integral value from an unaligned address as a signed value.
2810 Note that quads should get funneled to the unsigned load since we
2811 don't have to do the sign extension. */
2814 emit_uldX (tok
, ntok
, vlgsize
)
2815 const expressionS
*tok
;
2819 emit_uldXu (tok
, ntok
, vlgsize
);
2820 assemble_tokens (sextX_op
[(long)vlgsize
], tok
, 1, 1);
2823 /* Implement the ldil macro. */
2826 emit_ldil (tok
, ntok
, unused
)
2827 const expressionS
*tok
;
2831 expressionS newtok
[2];
2833 memcpy (newtok
, tok
, sizeof(newtok
));
2834 newtok
[1].X_add_number
= sign_extend_32 (tok
[1].X_add_number
);
2836 assemble_tokens ("lda", newtok
, ntok
, 1);
2839 /* Store a half-word or byte. */
2842 emit_stX (tok
, ntok
, vlgsize
)
2843 const expressionS
*tok
;
2847 int lgsize
= (int)(long)vlgsize
;
2849 if (alpha_target
& AXP_OPCODE_BWX
)
2850 emit_loadstore (tok
, ntok
, stX_op
[lgsize
]);
2853 expressionS newtok
[3];
2856 as_bad(_("macro requires $at register while noat in effect"));
2858 /* emit "lda $at, exp" */
2860 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
2861 newtok
[0].X_add_number
= AXP_REG_AT
;
2862 assemble_tokens ("lda", newtok
, ntok
, 1);
2864 /* emit "ldq_u $t9, 0($at)" */
2866 set_tok_reg (newtok
[0], AXP_REG_T9
);
2867 set_tok_const (newtok
[1], 0);
2868 set_tok_preg (newtok
[2], AXP_REG_AT
);
2869 assemble_tokens ("ldq_u", newtok
, 3, 1);
2871 /* emit "insXl src, $at, $t10" */
2874 set_tok_reg (newtok
[1], AXP_REG_AT
);
2875 set_tok_reg (newtok
[2], AXP_REG_T10
);
2876 assemble_tokens (insXl_op
[lgsize
], newtok
, 3, 1);
2878 /* emit "mskXl $t9, $at, $t9" */
2880 set_tok_reg (newtok
[0], AXP_REG_T9
);
2881 newtok
[2] = newtok
[0];
2882 assemble_tokens (mskXl_op
[lgsize
], newtok
, 3, 1);
2884 /* emit "or $t9, $t10, $t9" */
2886 set_tok_reg (newtok
[1], AXP_REG_T10
);
2887 assemble_tokens ("or", newtok
, 3, 1);
2889 /* emit "stq_u $t9, 0($at) */
2891 set_tok_const (newtok
[1], 0);
2892 set_tok_preg (newtok
[2], AXP_REG_AT
);
2893 assemble_tokens ("stq_u", newtok
, 3, 1);
2897 /* Store an integer to an unaligned address. */
2900 emit_ustX (tok
, ntok
, vlgsize
)
2901 const expressionS
*tok
;
2905 int lgsize
= (int)(long)vlgsize
;
2906 expressionS newtok
[3];
2908 /* emit "lda $at, exp" */
2910 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
2911 newtok
[0].X_add_number
= AXP_REG_AT
;
2912 assemble_tokens ("lda", newtok
, ntok
, 1);
2914 /* emit "ldq_u $9, 0($at)" */
2916 set_tok_reg (newtok
[0], AXP_REG_T9
);
2917 set_tok_const (newtok
[1], 0);
2918 set_tok_preg (newtok
[2], AXP_REG_AT
);
2919 assemble_tokens ("ldq_u", newtok
, 3, 1);
2921 /* emit "ldq_u $10, size-1($at)" */
2923 set_tok_reg (newtok
[0], AXP_REG_T10
);
2924 set_tok_const (newtok
[1], (1 << lgsize
)-1);
2925 assemble_tokens ("ldq_u", newtok
, 3, 1);
2927 /* emit "insXl src, $at, $t11" */
2930 set_tok_reg (newtok
[1], AXP_REG_AT
);
2931 set_tok_reg (newtok
[2], AXP_REG_T11
);
2932 assemble_tokens (insXl_op
[lgsize
], newtok
, 3, 1);
2934 /* emit "insXh src, $at, $t12" */
2936 set_tok_reg (newtok
[2], AXP_REG_T12
);
2937 assemble_tokens (insXh_op
[lgsize
], newtok
, 3, 1);
2939 /* emit "mskXl $t9, $at, $t9" */
2941 set_tok_reg (newtok
[0], AXP_REG_T9
);
2942 newtok
[2] = newtok
[0];
2943 assemble_tokens (mskXl_op
[lgsize
], newtok
, 3, 1);
2945 /* emit "mskXh $t10, $at, $t10" */
2947 set_tok_reg (newtok
[0], AXP_REG_T10
);
2948 newtok
[2] = newtok
[0];
2949 assemble_tokens (mskXh_op
[lgsize
], newtok
, 3, 1);
2951 /* emit "or $t9, $t11, $t9" */
2953 set_tok_reg (newtok
[0], AXP_REG_T9
);
2954 set_tok_reg (newtok
[1], AXP_REG_T11
);
2955 newtok
[2] = newtok
[0];
2956 assemble_tokens ("or", newtok
, 3, 1);
2958 /* emit "or $t10, $t12, $t10" */
2960 set_tok_reg (newtok
[0], AXP_REG_T10
);
2961 set_tok_reg (newtok
[1], AXP_REG_T12
);
2962 newtok
[2] = newtok
[0];
2963 assemble_tokens ("or", newtok
, 3, 1);
2965 /* emit "stq_u $t9, 0($at)" */
2967 set_tok_reg (newtok
[0], AXP_REG_T9
);
2968 set_tok_const (newtok
[1], 0);
2969 set_tok_preg (newtok
[2], AXP_REG_AT
);
2970 assemble_tokens ("stq_u", newtok
, 3, 1);
2972 /* emit "stq_u $t10, size-1($at)" */
2974 set_tok_reg (newtok
[0], AXP_REG_T10
);
2975 set_tok_const (newtok
[1], (1 << lgsize
)-1);
2976 assemble_tokens ("stq_u", newtok
, 3, 1);
2979 /* Sign extend a half-word or byte. The 32-bit sign extend is
2980 implemented as "addl $31, $r, $t" in the opcode table. */
2983 emit_sextX (tok
, ntok
, vlgsize
)
2984 const expressionS
*tok
;
2988 long lgsize
= (long)vlgsize
;
2990 if (alpha_target
& AXP_OPCODE_BWX
)
2991 assemble_tokens (sextX_op
[lgsize
], tok
, ntok
, 0);
2994 int bitshift
= 64 - 8 * (1 << lgsize
);
2995 expressionS newtok
[3];
2997 /* emit "sll src,bits,dst" */
3000 set_tok_const (newtok
[1], bitshift
);
3001 newtok
[2] = tok
[ntok
- 1];
3002 assemble_tokens ("sll", newtok
, 3, 1);
3004 /* emit "sra dst,bits,dst" */
3006 newtok
[0] = newtok
[2];
3007 assemble_tokens ("sra", newtok
, 3, 1);
3011 /* Implement the division and modulus macros. */
3015 /* Make register usage like in normal procedure call.
3016 Don't clobber PV and RA. */
3019 emit_division (tok
, ntok
, symname
)
3020 const expressionS
*tok
;
3024 /* DIVISION and MODULUS. Yech.
3029 * mov x,R16 # if x != R16
3030 * mov y,R17 # if y != R17
3035 * with appropriate optimizations if R0,R16,R17 are the registers
3036 * specified by the compiler.
3041 expressionS newtok
[3];
3043 xr
= regno (tok
[0].X_add_number
);
3044 yr
= regno (tok
[1].X_add_number
);
3049 rr
= regno (tok
[2].X_add_number
);
3051 /* Move the operands into the right place */
3052 if (yr
== AXP_REG_R16
&& xr
== AXP_REG_R17
)
3054 /* They are in exactly the wrong order -- swap through AT */
3057 as_bad (_("macro requires $at register while noat in effect"));
3059 set_tok_reg (newtok
[0], AXP_REG_R16
);
3060 set_tok_reg (newtok
[1], AXP_REG_AT
);
3061 assemble_tokens ("mov", newtok
, 2, 1);
3063 set_tok_reg (newtok
[0], AXP_REG_R17
);
3064 set_tok_reg (newtok
[1], AXP_REG_R16
);
3065 assemble_tokens ("mov", newtok
, 2, 1);
3067 set_tok_reg (newtok
[0], AXP_REG_AT
);
3068 set_tok_reg (newtok
[1], AXP_REG_R17
);
3069 assemble_tokens ("mov", newtok
, 2, 1);
3073 if (yr
== AXP_REG_R16
)
3075 set_tok_reg (newtok
[0], AXP_REG_R16
);
3076 set_tok_reg (newtok
[1], AXP_REG_R17
);
3077 assemble_tokens ("mov", newtok
, 2, 1);
3080 if (xr
!= AXP_REG_R16
)
3082 set_tok_reg (newtok
[0], xr
);
3083 set_tok_reg (newtok
[1], AXP_REG_R16
);
3084 assemble_tokens ("mov", newtok
, 2, 1);
3087 if (yr
!= AXP_REG_R16
&& yr
!= AXP_REG_R17
)
3089 set_tok_reg (newtok
[0], yr
);
3090 set_tok_reg (newtok
[1], AXP_REG_R17
);
3091 assemble_tokens ("mov", newtok
, 2, 1);
3095 sym
= symbol_find_or_make ((const char *)symname
);
3097 set_tok_reg (newtok
[0], AXP_REG_AT
);
3098 set_tok_sym (newtok
[1], sym
, 0);
3099 assemble_tokens ("lda", newtok
, 2, 1);
3101 /* Call the division routine */
3102 set_tok_reg (newtok
[0], AXP_REG_AT
);
3103 set_tok_cpreg (newtok
[1], AXP_REG_AT
);
3104 set_tok_const (newtok
[2], 0);
3105 assemble_tokens ("jsr", newtok
, 3, 1);
3107 /* Move the result to the right place */
3108 if (rr
!= AXP_REG_R0
)
3110 set_tok_reg (newtok
[0], AXP_REG_R0
);
3111 set_tok_reg (newtok
[1], rr
);
3112 assemble_tokens ("mov", newtok
, 2, 1);
3116 #else /* !OBJ_EVAX */
3119 emit_division (tok
, ntok
, symname
)
3120 const expressionS
*tok
;
3124 /* DIVISION and MODULUS. Yech.
3134 * with appropriate optimizations if t10,t11,t12 are the registers
3135 * specified by the compiler.
3140 expressionS newtok
[3];
3142 xr
= regno (tok
[0].X_add_number
);
3143 yr
= regno (tok
[1].X_add_number
);
3148 rr
= regno (tok
[2].X_add_number
);
3150 sym
= symbol_find_or_make ((const char *)symname
);
3152 /* Move the operands into the right place */
3153 if (yr
== AXP_REG_T10
&& xr
== AXP_REG_T11
)
3155 /* They are in exactly the wrong order -- swap through AT */
3158 as_bad (_("macro requires $at register while noat in effect"));
3160 set_tok_reg (newtok
[0], AXP_REG_T10
);
3161 set_tok_reg (newtok
[1], AXP_REG_AT
);
3162 assemble_tokens ("mov", newtok
, 2, 1);
3164 set_tok_reg (newtok
[0], AXP_REG_T11
);
3165 set_tok_reg (newtok
[1], AXP_REG_T10
);
3166 assemble_tokens ("mov", newtok
, 2, 1);
3168 set_tok_reg (newtok
[0], AXP_REG_AT
);
3169 set_tok_reg (newtok
[1], AXP_REG_T11
);
3170 assemble_tokens ("mov", newtok
, 2, 1);
3174 if (yr
== AXP_REG_T10
)
3176 set_tok_reg (newtok
[0], AXP_REG_T10
);
3177 set_tok_reg (newtok
[1], AXP_REG_T11
);
3178 assemble_tokens ("mov", newtok
, 2, 1);
3181 if (xr
!= AXP_REG_T10
)
3183 set_tok_reg (newtok
[0], xr
);
3184 set_tok_reg (newtok
[1], AXP_REG_T10
);
3185 assemble_tokens ("mov", newtok
, 2, 1);
3188 if (yr
!= AXP_REG_T10
&& yr
!= AXP_REG_T11
)
3190 set_tok_reg (newtok
[0], yr
);
3191 set_tok_reg (newtok
[1], AXP_REG_T11
);
3192 assemble_tokens ("mov", newtok
, 2, 1);
3196 /* Call the division routine */
3197 set_tok_reg (newtok
[0], AXP_REG_T9
);
3198 set_tok_sym (newtok
[1], sym
, 0);
3199 assemble_tokens ("jsr", newtok
, 2, 1);
3201 /* Reload the GP register */
3205 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
3206 set_tok_reg (newtok
[0], alpha_gp_register
);
3207 set_tok_const (newtok
[1], 0);
3208 set_tok_preg (newtok
[2], AXP_REG_T9
);
3209 assemble_tokens ("ldgp", newtok
, 3, 1);
3212 /* Move the result to the right place */
3213 if (rr
!= AXP_REG_T12
)
3215 set_tok_reg (newtok
[0], AXP_REG_T12
);
3216 set_tok_reg (newtok
[1], rr
);
3217 assemble_tokens ("mov", newtok
, 2, 1);
3221 #endif /* !OBJ_EVAX */
3223 /* The jsr and jmp macros differ from their instruction counterparts
3224 in that they can load the target address and default most
3228 emit_jsrjmp (tok
, ntok
, vopname
)
3229 const expressionS
*tok
;
3233 const char *opname
= (const char *) vopname
;
3234 struct alpha_insn insn
;
3235 expressionS newtok
[3];
3236 int r
, tokidx
= 0, lituse
= 0;
3238 if (tokidx
< ntok
&& tok
[tokidx
].X_op
== O_register
)
3239 r
= regno (tok
[tokidx
++].X_add_number
);
3241 r
= strcmp (opname
, "jmp") == 0 ? AXP_REG_ZERO
: AXP_REG_RA
;
3243 set_tok_reg (newtok
[0], r
);
3245 if (tokidx
< ntok
&&
3246 (tok
[tokidx
].X_op
== O_pregister
|| tok
[tokidx
].X_op
== O_cpregister
))
3247 r
= regno (tok
[tokidx
++].X_add_number
);
3249 /* keep register if jsr $n.<sym> */
3253 int basereg
= alpha_gp_register
;
3254 lituse
= load_expression (r
= AXP_REG_PV
, &tok
[tokidx
], &basereg
, NULL
);
3258 set_tok_cpreg (newtok
[1], r
);
3261 /* FIXME: Add hint relocs to BFD for evax. */
3264 newtok
[2] = tok
[tokidx
];
3267 set_tok_const (newtok
[2], 0);
3269 assemble_tokens_to_insn (opname
, newtok
, 3, &insn
);
3271 /* add the LITUSE fixup */
3274 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
3275 if (insn
.nfixups
> 0)
3277 memmove (&insn
.fixups
[1], &insn
.fixups
[0],
3278 sizeof(struct alpha_fixup
) * insn
.nfixups
);
3281 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITUSE
;
3282 insn
.fixups
[0].exp
.X_op
= O_constant
;
3283 insn
.fixups
[0].exp
.X_add_number
= 3;
3289 /* The ret and jcr instructions differ from their instruction
3290 counterparts in that everything can be defaulted. */
3293 emit_retjcr (tok
, ntok
, vopname
)
3294 const expressionS
*tok
;
3298 const char *opname
= (const char *)vopname
;
3299 expressionS newtok
[3];
3302 if (tokidx
< ntok
&& tok
[tokidx
].X_op
== O_register
)
3303 r
= regno (tok
[tokidx
++].X_add_number
);
3307 set_tok_reg (newtok
[0], r
);
3309 if (tokidx
< ntok
&&
3310 (tok
[tokidx
].X_op
== O_pregister
|| tok
[tokidx
].X_op
== O_cpregister
))
3311 r
= regno (tok
[tokidx
++].X_add_number
);
3315 set_tok_cpreg (newtok
[1], r
);
3318 newtok
[2] = tok
[tokidx
];
3320 set_tok_const (newtok
[2], strcmp(opname
, "ret") == 0);
3322 assemble_tokens (opname
, newtok
, 3, 0);
3325 /* Assembler directives */
3327 /* Handle the .text pseudo-op. This is like the usual one, but it
3328 clears alpha_insn_label and restores auto alignment. */
3336 alpha_insn_label
= NULL
;
3337 alpha_auto_align_on
= 1;
3338 alpha_current_align
= 0;
3341 /* Handle the .data pseudo-op. This is like the usual one, but it
3342 clears alpha_insn_label and restores auto alignment. */
3349 alpha_insn_label
= NULL
;
3350 alpha_auto_align_on
= 1;
3351 alpha_current_align
= 0;
3354 #if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
3356 /* Handle the OSF/1 and openVMS .comm pseudo quirks.
3357 openVMS constructs a section for every common symbol. */
3360 s_alpha_comm (ignore
)
3363 register char *name
;
3367 register symbolS
*symbolP
;
3370 segT current_section
= now_seg
;
3371 int current_subsec
= now_subseg
;
3375 name
= input_line_pointer
;
3376 c
= get_symbol_end ();
3378 /* just after name is now '\0' */
3379 p
= input_line_pointer
;
3384 /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
3385 if (*input_line_pointer
== ',')
3387 input_line_pointer
++;
3390 if ((temp
= get_absolute_expression ()) < 0)
3392 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
3393 ignore_rest_of_line ();
3398 symbolP
= symbol_find_or_make (name
);
3401 /* Make a section for the common symbol. */
3402 new_seg
= subseg_new (xstrdup (name
), 0);
3408 /* alignment might follow */
3409 if (*input_line_pointer
== ',')
3413 input_line_pointer
++;
3414 align
= get_absolute_expression ();
3415 bfd_set_section_alignment (stdoutput
, new_seg
, align
);
3419 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
3421 as_bad (_("Ignoring attempt to re-define symbol"));
3422 ignore_rest_of_line ();
3427 if (bfd_section_size (stdoutput
, new_seg
) > 0)
3429 if (bfd_section_size (stdoutput
, new_seg
) != temp
)
3430 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
3431 S_GET_NAME (symbolP
),
3432 (long) bfd_section_size (stdoutput
, new_seg
),
3436 if (S_GET_VALUE (symbolP
))
3438 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
3439 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
3440 S_GET_NAME (symbolP
),
3441 (long) S_GET_VALUE (symbolP
),
3448 subseg_set (new_seg
, 0);
3449 p
= frag_more (temp
);
3450 new_seg
->flags
|= SEC_IS_COMMON
;
3451 if (! S_IS_DEFINED (symbolP
))
3452 symbolP
->bsym
->section
= new_seg
;
3454 S_SET_VALUE (symbolP
, (valueT
) temp
);
3456 S_SET_EXTERNAL (symbolP
);
3460 subseg_set (current_section
, current_subsec
);
3463 know (symbolP
->sy_frag
== &zero_address_frag
);
3465 demand_empty_rest_of_line ();
3468 #endif /* ! OBJ_ELF */
3472 /* Handle the .rdata pseudo-op. This is like the usual one, but it
3473 clears alpha_insn_label and restores auto alignment. */
3476 s_alpha_rdata (ignore
)
3481 temp
= get_absolute_expression ();
3482 subseg_new (".rdata", 0);
3483 demand_empty_rest_of_line ();
3484 alpha_insn_label
= NULL
;
3485 alpha_auto_align_on
= 1;
3486 alpha_current_align
= 0;
3493 /* Handle the .sdata pseudo-op. This is like the usual one, but it
3494 clears alpha_insn_label and restores auto alignment. */
3497 s_alpha_sdata (ignore
)
3502 temp
= get_absolute_expression ();
3503 subseg_new (".sdata", 0);
3504 demand_empty_rest_of_line ();
3505 alpha_insn_label
= NULL
;
3506 alpha_auto_align_on
= 1;
3507 alpha_current_align
= 0;
3513 /* Handle the .section pseudo-op. This is like the usual one, but it
3514 clears alpha_insn_label and restores auto alignment. */
3517 s_alpha_section (ignore
)
3520 obj_elf_section (ignore
);
3522 alpha_insn_label
= NULL
;
3523 alpha_auto_align_on
= 1;
3524 alpha_current_align
= 0;
3531 if (ECOFF_DEBUGGING
)
3532 ecoff_directive_ent (0);
3535 char *name
, name_end
;
3536 name
= input_line_pointer
;
3537 name_end
= get_symbol_end ();
3539 if (! is_name_beginner (*name
))
3541 as_warn (_(".ent directive has no name"));
3542 *input_line_pointer
= name_end
;
3548 if (alpha_cur_ent_sym
)
3549 as_warn (_("nested .ent directives"));
3551 sym
= symbol_find_or_make (name
);
3552 sym
->bsym
->flags
|= BSF_FUNCTION
;
3553 alpha_cur_ent_sym
= sym
;
3555 /* The .ent directive is sometimes followed by a number. Not sure
3556 what it really means, but ignore it. */
3557 *input_line_pointer
= name_end
;
3559 if (*input_line_pointer
== ',')
3561 input_line_pointer
++;
3564 if (isdigit (*input_line_pointer
) || *input_line_pointer
== '-')
3565 (void) get_absolute_expression ();
3567 demand_empty_rest_of_line ();
3575 if (ECOFF_DEBUGGING
)
3576 ecoff_directive_end (0);
3579 char *name
, name_end
;
3580 name
= input_line_pointer
;
3581 name_end
= get_symbol_end ();
3583 if (! is_name_beginner (*name
))
3585 as_warn (_(".end directive has no name"));
3586 *input_line_pointer
= name_end
;
3592 sym
= symbol_find (name
);
3593 if (sym
!= alpha_cur_ent_sym
)
3594 as_warn (_(".end directive names different symbol than .ent"));
3596 /* Create an expression to calculate the size of the function. */
3599 sym
->sy_obj
.size
= (expressionS
*) xmalloc (sizeof (expressionS
));
3600 sym
->sy_obj
.size
->X_op
= O_subtract
;
3601 sym
->sy_obj
.size
->X_add_symbol
3602 = symbol_new ("L0\001", now_seg
, frag_now_fix (), frag_now
);
3603 sym
->sy_obj
.size
->X_op_symbol
= sym
;
3604 sym
->sy_obj
.size
->X_add_number
= 0;
3607 alpha_cur_ent_sym
= NULL
;
3609 *input_line_pointer
= name_end
;
3611 demand_empty_rest_of_line ();
3619 if (ECOFF_DEBUGGING
)
3622 ecoff_directive_fmask (0);
3624 ecoff_directive_mask (0);
3627 discard_rest_of_line ();
3631 s_alpha_frame (dummy
)
3634 if (ECOFF_DEBUGGING
)
3635 ecoff_directive_frame (0);
3637 discard_rest_of_line ();
3641 s_alpha_prologue (ignore
)
3647 arg
= get_absolute_expression ();
3648 demand_empty_rest_of_line ();
3650 if (ECOFF_DEBUGGING
)
3651 sym
= ecoff_get_cur_proc_sym ();
3653 sym
= alpha_cur_ent_sym
;
3658 case 0: /* No PV required. */
3659 S_SET_OTHER (sym
, STO_ALPHA_NOPV
);
3661 case 1: /* Std GP load. */
3662 S_SET_OTHER (sym
, STO_ALPHA_STD_GPLOAD
);
3664 case 2: /* Non-std use of PV. */
3668 as_bad (_("Invalid argument %d to .prologue."), arg
);
3674 s_alpha_coff_wrapper (which
)
3677 static void (* const fns
[]) PARAMS ((int)) = {
3678 ecoff_directive_begin
,
3679 ecoff_directive_bend
,
3680 ecoff_directive_def
,
3681 ecoff_directive_dim
,
3682 ecoff_directive_endef
,
3683 ecoff_directive_file
,
3684 ecoff_directive_scl
,
3685 ecoff_directive_tag
,
3686 ecoff_directive_val
,
3687 ecoff_directive_loc
,
3690 assert (which
>= 0 && which
< sizeof(fns
)/sizeof(*fns
));
3692 if (ECOFF_DEBUGGING
)
3696 as_bad (_("ECOFF debugging is disabled."));
3697 ignore_rest_of_line ();
3700 #endif /* OBJ_ELF */
3704 /* Handle the section specific pseudo-op. */
3707 s_alpha_section (secid
)
3711 #define EVAX_SECTION_COUNT 5
3712 static char *section_name
[EVAX_SECTION_COUNT
+1] =
3713 { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
3715 if ((secid
<= 0) || (secid
> EVAX_SECTION_COUNT
))
3717 as_fatal (_("Unknown section directive"));
3718 demand_empty_rest_of_line ();
3721 temp
= get_absolute_expression ();
3722 subseg_new (section_name
[secid
], 0);
3723 demand_empty_rest_of_line ();
3724 alpha_insn_label
= NULL
;
3725 alpha_auto_align_on
= 1;
3726 alpha_current_align
= 0;
3730 /* Parse .ent directives. */
3733 s_alpha_ent (ignore
)
3737 expressionS symexpr
;
3739 alpha_evax_proc
.pdsckind
= 0;
3740 alpha_evax_proc
.framereg
= -1;
3741 alpha_evax_proc
.framesize
= 0;
3742 alpha_evax_proc
.rsa_offset
= 0;
3743 alpha_evax_proc
.ra_save
= AXP_REG_RA
;
3744 alpha_evax_proc
.fp_save
= -1;
3745 alpha_evax_proc
.imask
= 0;
3746 alpha_evax_proc
.fmask
= 0;
3747 alpha_evax_proc
.prologue
= 0;
3748 alpha_evax_proc
.type
= 0;
3750 expression (&symexpr
);
3752 if (symexpr
.X_op
!= O_symbol
)
3754 as_fatal (_(".ent directive has no symbol"));
3755 demand_empty_rest_of_line ();
3759 symbol
= make_expr_symbol (&symexpr
);
3760 symbol
->bsym
->flags
|= BSF_FUNCTION
;
3761 alpha_evax_proc
.symbol
= symbol
;
3763 demand_empty_rest_of_line ();
3768 /* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
3771 s_alpha_frame (ignore
)
3776 alpha_evax_proc
.framereg
= tc_get_register (1);
3779 if (*input_line_pointer
++ != ','
3780 || get_absolute_expression_and_terminator (&val
) != ',')
3782 as_warn (_("Bad .frame directive 1./2. param"));
3783 --input_line_pointer
;
3784 demand_empty_rest_of_line ();
3788 alpha_evax_proc
.framesize
= val
;
3790 (void) tc_get_register (1);
3792 if (*input_line_pointer
++ != ',')
3794 as_warn (_("Bad .frame directive 3./4. param"));
3795 --input_line_pointer
;
3796 demand_empty_rest_of_line ();
3799 alpha_evax_proc
.rsa_offset
= get_absolute_expression ();
3805 s_alpha_pdesc (ignore
)
3815 segment_info_type
*seginfo
= seg_info (alpha_link_section
);
3817 if (now_seg
!= alpha_link_section
)
3819 as_bad (_(".pdesc directive not in link (.link) section"));
3820 demand_empty_rest_of_line ();
3824 if ((alpha_evax_proc
.symbol
== 0)
3825 || (!S_IS_DEFINED (alpha_evax_proc
.symbol
)))
3827 as_fatal (_(".pdesc has no matching .ent"));
3828 demand_empty_rest_of_line ();
3832 alpha_evax_proc
.symbol
->sy_obj
= (valueT
)seginfo
->literal_pool_size
;
3835 if (exp
.X_op
!= O_symbol
)
3837 as_warn (_(".pdesc directive has no entry symbol"));
3838 demand_empty_rest_of_line ();
3842 entry_sym
= make_expr_symbol (&exp
);
3843 /* Save bfd symbol of proc desc in function symbol. */
3844 alpha_evax_proc
.symbol
->bsym
->udata
.p
= (PTR
)entry_sym
->bsym
;
3847 if (*input_line_pointer
++ != ',')
3849 as_warn (_("No comma after .pdesc <entryname>"));
3850 demand_empty_rest_of_line ();
3855 name
= input_line_pointer
;
3856 name_end
= get_symbol_end ();
3858 if (strncmp(name
, "stack", 5) == 0)
3860 alpha_evax_proc
.pdsckind
= PDSC_S_K_KIND_FP_STACK
;
3862 else if (strncmp(name
, "reg", 3) == 0)
3864 alpha_evax_proc
.pdsckind
= PDSC_S_K_KIND_FP_REGISTER
;
3866 else if (strncmp(name
, "null", 4) == 0)
3868 alpha_evax_proc
.pdsckind
= PDSC_S_K_KIND_NULL
;
3872 as_fatal (_("unknown procedure kind"));
3873 demand_empty_rest_of_line ();
3877 *input_line_pointer
= name_end
;
3878 demand_empty_rest_of_line ();
3880 #ifdef md_flush_pending_output
3881 md_flush_pending_output ();
3884 frag_align (3, 0, 0);
3886 fixp
= fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, 0, 0, 0, 0);
3888 seginfo
->literal_pool_size
+= 16;
3890 *p
= alpha_evax_proc
.pdsckind
3891 | ((alpha_evax_proc
.framereg
== 29) ? PDSC_S_M_BASE_REG_IS_FP
: 0);
3892 *(p
+1) = PDSC_S_M_NATIVE
3893 | PDSC_S_M_NO_JACKET
;
3895 switch (alpha_evax_proc
.pdsckind
)
3897 case PDSC_S_K_KIND_NULL
:
3901 case PDSC_S_K_KIND_FP_REGISTER
:
3902 *(p
+2) = alpha_evax_proc
.fp_save
;
3903 *(p
+3) = alpha_evax_proc
.ra_save
;
3905 case PDSC_S_K_KIND_FP_STACK
:
3906 md_number_to_chars (p
+2, (valueT
)alpha_evax_proc
.rsa_offset
, 2);
3908 default: /* impossible */
3913 *(p
+5) = alpha_evax_proc
.type
& 0x0f;
3915 /* Signature offset. */
3916 md_number_to_chars (p
+6, (valueT
)0, 2);
3918 fix_new_exp (frag_now
, p
-frag_now
->fr_literal
+8, 8, &exp
, 0, BFD_RELOC_64
);
3920 if (alpha_evax_proc
.pdsckind
== PDSC_S_K_KIND_NULL
)
3923 /* Add dummy fix to make add_to_link_pool work. */
3925 fixp
= fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, 0, 0, 0, 0);
3927 seginfo
->literal_pool_size
+= 8;
3929 /* pdesc+16: Size. */
3930 md_number_to_chars (p
, (valueT
)alpha_evax_proc
.framesize
, 4);
3932 md_number_to_chars (p
+4, (valueT
)0, 2);
3935 md_number_to_chars (p
+6, alpha_evax_proc
.prologue
, 2);
3937 if (alpha_evax_proc
.pdsckind
== PDSC_S_K_KIND_FP_REGISTER
)
3940 /* Add dummy fix to make add_to_link_pool work. */
3942 fixp
= fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, 0, 0, 0, 0);
3944 seginfo
->literal_pool_size
+= 8;
3946 /* pdesc+24: register masks. */
3948 md_number_to_chars (p
, alpha_evax_proc
.imask
, 4);
3949 md_number_to_chars (p
+4, alpha_evax_proc
.fmask
, 4);
3955 /* Support for crash debug on vms. */
3958 s_alpha_name (ignore
)
3963 segment_info_type
*seginfo
= seg_info (alpha_link_section
);
3965 if (now_seg
!= alpha_link_section
)
3967 as_bad (_(".name directive not in link (.link) section"));
3968 demand_empty_rest_of_line ();
3973 if (exp
.X_op
!= O_symbol
)
3975 as_warn (_(".name directive has no symbol"));
3976 demand_empty_rest_of_line ();
3980 demand_empty_rest_of_line ();
3982 #ifdef md_flush_pending_output
3983 md_flush_pending_output ();
3986 frag_align (3, 0, 0);
3988 seginfo
->literal_pool_size
+= 8;
3990 fix_new_exp (frag_now
, p
-frag_now
->fr_literal
, 8, &exp
, 0, BFD_RELOC_64
);
3997 s_alpha_linkage (ignore
)
4003 #ifdef md_flush_pending_output
4004 md_flush_pending_output ();
4008 if (exp
.X_op
!= O_symbol
)
4010 as_fatal (_("No symbol after .linkage"));
4014 p
= frag_more (LKP_S_K_SIZE
);
4015 memset (p
, 0, LKP_S_K_SIZE
);
4016 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, LKP_S_K_SIZE
, &exp
, 0,\
4017 BFD_RELOC_ALPHA_LINKAGE
);
4019 demand_empty_rest_of_line ();
4026 s_alpha_code_address (ignore
)
4032 #ifdef md_flush_pending_output
4033 md_flush_pending_output ();
4037 if (exp
.X_op
!= O_symbol
)
4039 as_fatal (_("No symbol after .code_address"));
4045 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 8, &exp
, 0,\
4046 BFD_RELOC_ALPHA_CODEADDR
);
4048 demand_empty_rest_of_line ();
4055 s_alpha_fp_save (ignore
)
4059 alpha_evax_proc
.fp_save
= tc_get_register (1);
4061 demand_empty_rest_of_line ();
4067 s_alpha_mask (ignore
)
4072 if (get_absolute_expression_and_terminator (&val
) != ',')
4074 as_warn (_("Bad .mask directive"));
4075 --input_line_pointer
;
4079 alpha_evax_proc
.imask
= val
;
4080 (void)get_absolute_expression ();
4082 demand_empty_rest_of_line ();
4089 s_alpha_fmask (ignore
)
4094 if (get_absolute_expression_and_terminator (&val
) != ',')
4096 as_warn (_("Bad .fmask directive"));
4097 --input_line_pointer
;
4101 alpha_evax_proc
.fmask
= val
;
4102 (void) get_absolute_expression ();
4104 demand_empty_rest_of_line ();
4110 s_alpha_end (ignore
)
4115 c
= get_symbol_end ();
4116 *input_line_pointer
= c
;
4117 demand_empty_rest_of_line ();
4118 alpha_evax_proc
.symbol
= 0;
4125 s_alpha_file (ignore
)
4130 static char case_hack
[32];
4132 extern char *demand_copy_string
PARAMS ((int *lenP
));
4134 sprintf (case_hack
, "<CASE:%01d%01d>",
4135 alpha_flag_hash_long_names
, alpha_flag_show_after_trunc
);
4137 s
= symbol_find_or_make (case_hack
);
4138 s
->bsym
->flags
|= BSF_FILE
;
4140 get_absolute_expression ();
4141 s
= symbol_find_or_make (demand_copy_string (&length
));
4142 s
->bsym
->flags
|= BSF_FILE
;
4143 demand_empty_rest_of_line ();
4147 #endif /* OBJ_EVAX */
4149 /* Handle the .gprel32 pseudo op. */
4152 s_alpha_gprel32 (ignore
)
4165 e
.X_add_symbol
= section_symbol(absolute_section
);
4178 e
.X_add_symbol
= section_symbol (absolute_section
);
4181 e
.X_op
= O_subtract
;
4182 e
.X_op_symbol
= alpha_gp_symbol
;
4190 if (alpha_auto_align_on
&& alpha_current_align
< 2)
4191 alpha_align (2, (char *) NULL
, alpha_insn_label
, 0);
4192 if (alpha_current_align
> 2)
4193 alpha_current_align
= 2;
4194 alpha_insn_label
= NULL
;
4198 fix_new_exp (frag_now
, p
-frag_now
->fr_literal
, 4,
4199 &e
, 0, BFD_RELOC_GPREL32
);
4202 /* Handle floating point allocation pseudo-ops. This is like the
4203 generic vresion, but it makes sure the current label, if any, is
4204 correctly aligned. */
4207 s_alpha_float_cons (type
)
4234 if (alpha_auto_align_on
&& alpha_current_align
< log_size
)
4235 alpha_align (log_size
, (char *) NULL
, alpha_insn_label
, 0);
4236 if (alpha_current_align
> log_size
)
4237 alpha_current_align
= log_size
;
4238 alpha_insn_label
= NULL
;
4243 /* Handle the .proc pseudo op. We don't really do much with it except
4247 s_alpha_proc (is_static
)
4256 /* Takes ".proc name,nargs" */
4258 name
= input_line_pointer
;
4259 c
= get_symbol_end ();
4260 p
= input_line_pointer
;
4261 symbolP
= symbol_find_or_make (name
);
4264 if (*input_line_pointer
!= ',')
4267 as_warn (_("Expected comma after name \"%s\""), name
);
4270 ignore_rest_of_line ();
4274 input_line_pointer
++;
4275 temp
= get_absolute_expression ();
4277 /* symbolP->sy_other = (signed char) temp; */
4278 as_warn (_("unhandled: .proc %s,%d"), name
, temp
);
4279 demand_empty_rest_of_line ();
4282 /* Handle the .set pseudo op. This is used to turn on and off most of
4283 the assembler features. */
4293 name
= input_line_pointer
;
4294 ch
= get_symbol_end ();
4297 if (s
[0] == 'n' && s
[1] == 'o')
4302 if (!strcmp ("reorder", s
))
4304 else if (!strcmp ("at", s
))
4305 alpha_noat_on
= !yesno
;
4306 else if (!strcmp ("macro", s
))
4307 alpha_macros_on
= yesno
;
4308 else if (!strcmp ("move", s
))
4310 else if (!strcmp ("volatile", s
))
4313 as_warn (_("Tried to .set unrecognized mode `%s'"), name
);
4315 *input_line_pointer
= ch
;
4316 demand_empty_rest_of_line ();
4319 /* Handle the .base pseudo op. This changes the assembler's notion of
4320 the $gp register. */
4323 s_alpha_base (ignore
)
4327 if (first_32bit_quadrant
)
4329 /* not fatal, but it might not work in the end */
4330 as_warn (_("File overrides no-base-register option."));
4331 first_32bit_quadrant
= 0;
4336 if (*input_line_pointer
== '$')
4338 input_line_pointer
++;
4339 if (*input_line_pointer
== 'r')
4340 input_line_pointer
++;
4343 alpha_gp_register
= get_absolute_expression ();
4344 if (alpha_gp_register
< 0 || alpha_gp_register
> 31)
4346 alpha_gp_register
= AXP_REG_GP
;
4347 as_warn (_("Bad base register, using $%d."), alpha_gp_register
);
4350 demand_empty_rest_of_line ();
4353 /* Handle the .align pseudo-op. This aligns to a power of two. It
4354 also adjusts any current instruction label. We treat this the same
4355 way the MIPS port does: .align 0 turns off auto alignment. */
4358 s_alpha_align (ignore
)
4363 long max_alignment
= 15;
4365 align
= get_absolute_expression ();
4366 if (align
> max_alignment
)
4368 align
= max_alignment
;
4369 as_bad (_("Alignment too large: %d. assumed"), align
);
4373 as_warn (_("Alignment negative: 0 assumed"));
4377 if (*input_line_pointer
== ',')
4379 input_line_pointer
++;
4380 fill
= get_absolute_expression ();
4388 alpha_auto_align_on
= 1;
4389 alpha_align (align
, pfill
, alpha_insn_label
, 1);
4393 alpha_auto_align_on
= 0;
4396 demand_empty_rest_of_line ();
4399 /* Hook the normal string processor to reset known alignment. */
4402 s_alpha_stringer (terminate
)
4405 alpha_current_align
= 0;
4406 alpha_insn_label
= NULL
;
4407 stringer (terminate
);
4410 /* Hook the normal space processing to reset known alignment. */
4413 s_alpha_space (ignore
)
4416 alpha_current_align
= 0;
4417 alpha_insn_label
= NULL
;
4421 /* Hook into cons for auto-alignment. */
4424 alpha_cons_align (size
)
4430 while ((size
>>= 1) != 0)
4433 if (alpha_auto_align_on
&& alpha_current_align
< log_size
)
4434 alpha_align (log_size
, (char *) NULL
, alpha_insn_label
, 0);
4435 if (alpha_current_align
> log_size
)
4436 alpha_current_align
= log_size
;
4437 alpha_insn_label
= NULL
;
4440 /* Here come the .uword, .ulong, and .uquad explicitly unaligned
4441 pseudos. We just turn off auto-alignment and call down to cons. */
4444 s_alpha_ucons (bytes
)
4447 int hold
= alpha_auto_align_on
;
4448 alpha_auto_align_on
= 0;
4450 alpha_auto_align_on
= hold
;
4453 /* Switch the working cpu type. */
4456 s_alpha_arch (ignored
)
4460 const struct cpu_type
*p
;
4463 name
= input_line_pointer
;
4464 ch
= get_symbol_end ();
4466 for (p
= cpu_types
; p
->name
; ++p
)
4467 if (strcmp(name
, p
->name
) == 0)
4469 alpha_target_name
= p
->name
, alpha_target
= p
->flags
;
4472 as_warn("Unknown CPU identifier `%s'", name
);
4475 *input_line_pointer
= ch
;
4476 demand_empty_rest_of_line ();
4482 /* print token expression with alpha specific extension. */
4485 alpha_print_token(f
, exp
)
4487 const expressionS
*exp
;
4497 expressionS nexp
= *exp
;
4498 nexp
.X_op
= O_register
;
4499 print_expr (f
, &nexp
);
4504 print_expr (f
, exp
);
4511 /* The target specific pseudo-ops which we support. */
4513 const pseudo_typeS md_pseudo_table
[] =
4516 {"comm", s_alpha_comm
, 0}, /* osf1 compiler does this */
4517 {"rdata", s_alpha_rdata
, 0},
4519 {"text", s_alpha_text
, 0},
4520 {"data", s_alpha_data
, 0},
4522 {"sdata", s_alpha_sdata
, 0},
4525 {"section", s_alpha_section
, 0},
4526 {"section.s", s_alpha_section
, 0},
4527 {"sect", s_alpha_section
, 0},
4528 {"sect.s", s_alpha_section
, 0},
4531 { "pdesc", s_alpha_pdesc
, 0},
4532 { "name", s_alpha_name
, 0},
4533 { "linkage", s_alpha_linkage
, 0},
4534 { "code_address", s_alpha_code_address
, 0},
4535 { "ent", s_alpha_ent
, 0},
4536 { "frame", s_alpha_frame
, 0},
4537 { "fp_save", s_alpha_fp_save
, 0},
4538 { "mask", s_alpha_mask
, 0},
4539 { "fmask", s_alpha_fmask
, 0},
4540 { "end", s_alpha_end
, 0},
4541 { "file", s_alpha_file
, 0},
4542 { "rdata", s_alpha_section
, 1},
4543 { "comm", s_alpha_comm
, 0},
4544 { "link", s_alpha_section
, 3},
4545 { "ctors", s_alpha_section
, 4},
4546 { "dtors", s_alpha_section
, 5},
4549 /* Frame related pseudos. */
4550 {"ent", s_alpha_ent
, 0},
4551 {"end", s_alpha_end
, 0},
4552 {"mask", s_alpha_mask
, 0},
4553 {"fmask", s_alpha_mask
, 1},
4554 {"frame", s_alpha_frame
, 0},
4555 {"prologue", s_alpha_prologue
, 0},
4556 /* COFF debugging related pseudos. */
4557 {"begin", s_alpha_coff_wrapper
, 0},
4558 {"bend", s_alpha_coff_wrapper
, 1},
4559 {"def", s_alpha_coff_wrapper
, 2},
4560 {"dim", s_alpha_coff_wrapper
, 3},
4561 {"endef", s_alpha_coff_wrapper
, 4},
4562 {"file", s_alpha_coff_wrapper
, 5},
4563 {"scl", s_alpha_coff_wrapper
, 6},
4564 {"tag", s_alpha_coff_wrapper
, 7},
4565 {"val", s_alpha_coff_wrapper
, 8},
4566 {"loc", s_alpha_coff_wrapper
, 9},
4568 {"prologue", s_ignore
, 0},
4570 {"gprel32", s_alpha_gprel32
, 0},
4571 {"t_floating", s_alpha_float_cons
, 'd'},
4572 {"s_floating", s_alpha_float_cons
, 'f'},
4573 {"f_floating", s_alpha_float_cons
, 'F'},
4574 {"g_floating", s_alpha_float_cons
, 'G'},
4575 {"d_floating", s_alpha_float_cons
, 'D'},
4577 {"proc", s_alpha_proc
, 0},
4578 {"aproc", s_alpha_proc
, 1},
4579 {"set", s_alpha_set
, 0},
4580 {"reguse", s_ignore
, 0},
4581 {"livereg", s_ignore
, 0},
4582 {"base", s_alpha_base
, 0}, /*??*/
4583 {"option", s_ignore
, 0},
4584 {"aent", s_ignore
, 0},
4585 {"ugen", s_ignore
, 0},
4586 {"eflag", s_ignore
, 0},
4588 {"align", s_alpha_align
, 0},
4589 {"double", s_alpha_float_cons
, 'd'},
4590 {"float", s_alpha_float_cons
, 'f'},
4591 {"single", s_alpha_float_cons
, 'f'},
4592 {"ascii", s_alpha_stringer
, 0},
4593 {"asciz", s_alpha_stringer
, 1},
4594 {"string", s_alpha_stringer
, 1},
4595 {"space", s_alpha_space
, 0},
4596 {"skip", s_alpha_space
, 0},
4597 {"zero", s_alpha_space
, 0},
4599 /* Unaligned data pseudos. */
4600 {"uword", s_alpha_ucons
, 2},
4601 {"ulong", s_alpha_ucons
, 4},
4602 {"uquad", s_alpha_ucons
, 8},
4605 /* Dwarf wants these versions of unaligned. */
4606 {"2byte", s_alpha_ucons
, 2},
4607 {"4byte", s_alpha_ucons
, 4},
4608 {"8byte", s_alpha_ucons
, 8},
4611 /* We don't do any optimizing, so we can safely ignore these. */
4612 {"noalias", s_ignore
, 0},
4613 {"alias", s_ignore
, 0},
4615 {"arch", s_alpha_arch
, 0},
4621 /* Build a BFD section with its flags set appropriately for the .lita,
4622 .lit8, or .lit4 sections. */
4625 create_literal_section (name
, secp
, symp
)
4630 segT current_section
= now_seg
;
4631 int current_subsec
= now_subseg
;
4634 *secp
= new_sec
= subseg_new (name
, 0);
4635 subseg_set (current_section
, current_subsec
);
4636 bfd_set_section_alignment (stdoutput
, new_sec
, 4);
4637 bfd_set_section_flags (stdoutput
, new_sec
,
4638 SEC_RELOC
| SEC_ALLOC
| SEC_LOAD
| SEC_READONLY
4641 S_CLEAR_EXTERNAL (*symp
= section_symbol (new_sec
));
4646 /* @@@ GP selection voodoo. All of this seems overly complicated and
4647 unnecessary; which is the primary reason it's for ECOFF only. */
4656 vma
= bfd_get_section_vma (foo
, sec
);
4657 if (vma
&& vma
< alpha_gp_value
)
4658 alpha_gp_value
= vma
;
4664 assert (alpha_gp_value
== 0);
4666 /* Get minus-one in whatever width... */
4667 alpha_gp_value
= 0; alpha_gp_value
--;
4669 /* Select the smallest VMA of these existing sections. */
4670 maybe_set_gp (alpha_lita_section
);
4672 /* These were disabled before -- should we use them? */
4673 maybe_set_gp (sdata
);
4674 maybe_set_gp (lit8_sec
);
4675 maybe_set_gp (lit4_sec
);
4678 /* @@ Will a simple 0x8000 work here? If not, why not? */
4679 #define GP_ADJUSTMENT (0x8000 - 0x10)
4681 alpha_gp_value
+= GP_ADJUSTMENT
;
4683 S_SET_VALUE (alpha_gp_symbol
, alpha_gp_value
);
4686 printf (_("Chose GP value of %lx\n"), alpha_gp_value
);
4689 #endif /* OBJ_ECOFF */
4691 /* Called internally to handle all alignment needs. This takes care
4692 of eliding calls to frag_align if'n the cached current alignment
4693 says we've already got it, as well as taking care of the auto-align
4694 feature wrt labels. */
4697 alpha_align (n
, pfill
, label
, force
)
4703 if (alpha_current_align
>= n
)
4709 && (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
) != 0)
4711 static char const unop
[4] = { 0x00, 0x00, 0xe0, 0x2f };
4712 static char const nopunop
[8] = {
4713 0x1f, 0x04, 0xff, 0x47,
4714 0x00, 0x00, 0xe0, 0x2f
4717 /* First, make sure we're on a four-byte boundary, in case
4718 someone has been putting .byte values into the text
4719 section. The DEC assembler silently fills with unaligned
4720 no-op instructions. This will zero-fill, then nop-fill
4721 with proper alignment. */
4722 if (alpha_current_align
< 2)
4723 frag_align (2, 0, 0);
4724 if (alpha_current_align
< 3)
4725 frag_align_pattern (3, unop
, sizeof unop
, 0);
4727 frag_align_pattern (n
, nopunop
, sizeof nopunop
, 0);
4730 frag_align (n
, 0, 0);
4733 frag_align (n
, *pfill
, 0);
4735 alpha_current_align
= n
;
4739 assert (S_GET_SEGMENT (label
) == now_seg
);
4740 label
->sy_frag
= frag_now
;
4741 S_SET_VALUE (label
, (valueT
) frag_now_fix ());
4744 record_alignment(now_seg
, n
);
4746 /* ??? if alpha_flag_relax && force && elf, record the requested alignment
4747 in a reloc for the linker to see. */
4750 /* The Alpha has support for some VAX floating point types, as well as for
4751 IEEE floating point. We consider IEEE to be the primary floating point
4752 format, and sneak in the VAX floating point support here. */
4753 #define md_atof vax_md_atof
4754 #include "config/atof-vax.c"