1 /* tc-cris.c -- Assembler code for the CRIS CPU core.
2 Copyright (C) 2000-2014 Free Software Foundation, Inc.
4 Contributed by Axis Communications AB, Lund, Sweden.
5 Originally written for GAS 1.38.1 by Mikael Asker.
6 Updates, BFDizing, GNUifying and ELF support by Hans-Peter Nilsson.
8 This file is part of GAS, the GNU Assembler.
10 GAS is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
15 GAS is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GAS; see the file COPYING. If not, write to the
22 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
23 MA 02110-1301, USA. */
26 #include "safe-ctype.h"
28 #include "opcode/cris.h"
29 #include "dwarf2dbg.h"
31 /* Conventions used here:
32 Generally speaking, pointers to binutils types such as "fragS" and
33 "expressionS" get parameter and variable names ending in "P", such as
34 "fragP", to harmonize with the rest of the binutils code. Other
35 pointers get a "p" suffix, such as "bufp". Any function or type-name
36 that could clash with a current or future binutils or GAS function get
39 #define SYNTAX_RELAX_REG_PREFIX "no_register_prefix"
40 #define SYNTAX_ENFORCE_REG_PREFIX "register_prefix"
41 #define SYNTAX_USER_SYM_LEADING_UNDERSCORE "leading_underscore"
42 #define SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE "no_leading_underscore"
43 #define REGISTER_PREFIX_CHAR '$'
45 /* True for expressions where getting X_add_symbol and X_add_number is
46 enough to get the "base" and "offset"; no need to make_expr_symbol.
47 It's not enough to check if X_op_symbol is NULL; that misses unary
48 operations like O_uminus. */
49 #define SIMPLE_EXPR(EXP) \
50 ((EXP)->X_op == O_constant || (EXP)->X_op == O_symbol)
52 /* Like in ":GOT", ":GOTOFF" etc. Other ports use '@', but that's in
53 line_separator_chars for CRIS, so we avoid it. */
54 #define RELOC_SUFFIX_CHAR ':'
56 /* This might be CRIS_INSN_NONE if we're assembling a prefix-insn only.
57 Note that some prefix-insns might be assembled as CRIS_INSN_NORMAL. */
60 CRIS_INSN_NORMAL
, CRIS_INSN_NONE
, CRIS_INSN_BRANCH
, CRIS_INSN_MUL
63 /* An instruction will have one of these prefixes.
64 Although the same bit-pattern, we handle BDAP with an immediate
65 expression (eventually quick or [pc+]) different from when we only have
66 register expressions. */
69 PREFIX_NONE
, PREFIX_BDAP_IMM
, PREFIX_BDAP
, PREFIX_BIAP
, PREFIX_DIP
,
73 /* The prefix for an instruction. */
76 enum prefix_kind kind
;
80 /* There might be an expression to be evaluated, like I in [rN+I]. */
83 /* If there's an expression, we might need a relocation. Here's the
84 type of what relocation to start relaxaton with.
85 The relocation is assumed to start immediately after the prefix insn,
86 so we don't provide an offset. */
87 enum bfd_reloc_code_real reloc
;
90 /* The description of the instruction being assembled. */
91 struct cris_instruction
93 /* If CRIS_INSN_NONE, then this insn is of zero length. */
94 enum cris_insn_kind insn_type
;
96 /* If a special register was mentioned, this is its description, else
98 const struct cris_spec_reg
*spec_reg
;
102 /* An insn may have at most one expression; theoretically there could be
103 another in its prefix (but I don't see how that could happen). */
106 /* The expression might need a relocation. Here's one to start
108 enum bfd_reloc_code_real reloc
;
110 /* The size in bytes of an immediate expression, or zero if
118 arch_crisv0
, arch_crisv3
, arch_crisv8
, arch_crisv10
,
119 arch_cris_any_v0_v10
, arch_crisv32
, arch_cris_common_v10_v32
122 static enum cris_archs
cris_arch_from_string (char **);
123 static int cris_insn_ver_valid_for_arch (enum cris_insn_version_usage
,
126 static void cris_process_instruction (char *, struct cris_instruction
*,
127 struct cris_prefix
*);
128 static int get_bwd_size_modifier (char **, int *);
129 static int get_bw_size_modifier (char **, int *);
130 static int get_gen_reg (char **, int *);
131 static int get_spec_reg (char **, const struct cris_spec_reg
**);
132 static int get_sup_reg (char **, int *);
133 static int get_autoinc_prefix_or_indir_op (char **, struct cris_prefix
*,
136 static int get_3op_or_dip_prefix_op (char **, struct cris_prefix
*);
137 static int cris_get_expression (char **, expressionS
*);
138 static int get_flags (char **, int *);
139 static void gen_bdap (int, expressionS
*);
140 static int branch_disp (int);
141 static void gen_cond_branch_32 (char *, char *, fragS
*, symbolS
*, symbolS
*,
143 static void cris_number_to_imm (char *, long, int, fixS
*, segT
);
144 static void s_syntax (int);
145 static void s_cris_file (int);
146 static void s_cris_loc (int);
147 static void s_cris_arch (int);
148 static void s_cris_dtpoff (int);
150 /* Get ":GOT", ":GOTOFF", ":PLT" etc. suffixes. */
151 static void cris_get_reloc_suffix (char **, bfd_reloc_code_real_type
*,
153 static unsigned int cris_get_specified_reloc_size (bfd_reloc_code_real_type
);
155 /* All the .syntax functions. */
156 static void cris_force_reg_prefix (void);
157 static void cris_relax_reg_prefix (void);
158 static void cris_sym_leading_underscore (void);
159 static void cris_sym_no_leading_underscore (void);
160 static char *cris_insn_first_word_frag (void);
162 /* Handle to the opcode hash table. */
163 static struct hash_control
*op_hash
= NULL
;
165 /* If we target cris-axis-linux-gnu (as opposed to generic cris-axis-elf),
166 we default to no underscore and required register-prefixes. The
167 difference is in the default values. */
169 #define DEFAULT_CRIS_AXIS_LINUX_GNU TRUE
171 #define DEFAULT_CRIS_AXIS_LINUX_GNU FALSE
174 /* Whether we demand that registers have a `$' prefix. Default here. */
175 static bfd_boolean demand_register_prefix
= DEFAULT_CRIS_AXIS_LINUX_GNU
;
177 /* Whether global user symbols have a leading underscore. Default here. */
178 static bfd_boolean symbols_have_leading_underscore
179 = !DEFAULT_CRIS_AXIS_LINUX_GNU
;
181 /* Whether or not we allow PIC, and expand to PIC-friendly constructs. */
182 static bfd_boolean pic
= FALSE
;
184 /* Whether or not we allow TLS suffixes. For the moment, we always do. */
185 static const bfd_boolean tls
= TRUE
;
187 /* If we're configured for "cris", default to allow all v0..v10
188 instructions and register names. */
189 #ifndef DEFAULT_CRIS_ARCH
190 #define DEFAULT_CRIS_ARCH cris_any_v0_v10
193 /* No whitespace in the CONCAT2 parameter list. */
194 static enum cris_archs cris_arch
= XCONCAT2 (arch_
,DEFAULT_CRIS_ARCH
);
196 const pseudo_typeS md_pseudo_table
[] =
199 {"dtpoffd", s_cris_dtpoff
, 4},
200 {"syntax", s_syntax
, 0},
201 {"file", s_cris_file
, 0},
202 {"loc", s_cris_loc
, 0},
203 {"arch", s_cris_arch
, 0},
207 static int warn_for_branch_expansion
= 0;
209 /* Whether to emit error when a MULS/MULU could be located last on a
211 static int err_for_dangerous_mul_placement
212 = (XCONCAT2 (arch_
,DEFAULT_CRIS_ARCH
) != arch_crisv32
);
214 const char cris_comment_chars
[] = ";";
216 /* This array holds the chars that only start a comment at the beginning of
217 a line. If the line seems to have the form '# 123 filename'
218 .line and .file directives will appear in the pre-processed output. */
219 /* Note that input_file.c hand-checks for '#' at the beginning of the
220 first line of the input file. This is because the compiler outputs
221 #NO_APP at the beginning of its output. */
222 /* Also note that slash-star will always start a comment. */
223 const char line_comment_chars
[] = "#";
224 const char line_separator_chars
[] = "@";
226 /* Now all floating point support is shut off. See md_atof. */
227 const char EXP_CHARS
[] = "";
228 const char FLT_CHARS
[] = "";
230 /* For CRIS, we encode the relax_substateTs (in e.g. fr_substate) as:
232 ---/ /--+-----------------+-----------------+-----------------+
233 | what state ? | how long ? |
234 ---/ /--+-----------------+-----------------+-----------------+
236 The "how long" bits are 00 = byte, 01 = word, 10 = dword (long).
237 Not all lengths are legit for a given value of (what state).
239 Groups for CRIS address relaxing:
242 length: byte, word, 10-byte expansion
245 length: byte, word, dword
248 Not really a relaxation (no infrastructure to get delay-slots
249 right), just an alignment and placement checker for the v10
252 4. Bcc (V32 and later)
253 length: byte, word, 14-byte expansion
256 length: byte, word, error
259 length: byte, word, dword
265 #define STATE_COND_BRANCH (1)
266 #define STATE_BASE_PLUS_DISP_PREFIX (2)
267 #define STATE_MUL (3)
268 #define STATE_COND_BRANCH_V32 (4)
269 #define STATE_COND_BRANCH_COMMON (5)
270 #define STATE_ABS_BRANCH_V32 (6)
271 #define STATE_LAPC (7)
272 #define STATE_COND_BRANCH_PIC (8)
274 #define STATE_LENGTH_MASK (3)
275 #define STATE_BYTE (0)
276 #define STATE_WORD (1)
277 #define STATE_DWORD (2)
278 /* Symbol undefined. */
279 #define STATE_UNDF (3)
280 #define STATE_MAX_LENGTH (3)
282 /* These displacements are relative to the address following the opcode
283 word of the instruction. The first letter is Byte, Word. The 2nd
284 letter is Forward, Backward. */
286 #define BRANCH_BF ( 254)
287 #define BRANCH_BB (-256)
288 #define BRANCH_BF_V32 ( 252)
289 #define BRANCH_BB_V32 (-258)
290 #define BRANCH_WF (2 + 32767)
291 #define BRANCH_WB (2 + -32768)
292 #define BRANCH_WF_V32 (-2 + 32767)
293 #define BRANCH_WB_V32 (-2 + -32768)
295 #define BDAP_BF ( 127)
296 #define BDAP_BB (-128)
297 #define BDAP_WF ( 32767)
298 #define BDAP_WB (-32768)
300 #define ENCODE_RELAX(what, length) (((what) << 2) + (length))
302 const relax_typeS md_cris_relax_table
[] =
304 /* Error sentinel (0, 0). */
317 {BRANCH_BF
, BRANCH_BB
, 0, ENCODE_RELAX (1, 1)},
319 /* Bcc [PC+] (1, 1). */
320 {BRANCH_WF
, BRANCH_WB
, 2, ENCODE_RELAX (1, 2)},
322 /* BEXT/BWF, BA, JUMP (external), JUMP (always), Bnot_cc, JUMP (default)
330 {BDAP_BF
, BDAP_BB
, 0, ENCODE_RELAX (2, 1)},
332 /* BDAP.[bw] [PC+] (2, 1). */
333 {BDAP_WF
, BDAP_WB
, 2, ENCODE_RELAX (2, 2)},
335 /* BDAP.d [PC+] (2, 2). */
341 /* MULS/MULU (3, 0). Positions (3, 1..3) are unused. */
342 {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0},
344 /* V32: Bcc o (4, 0). */
345 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (4, 1)},
347 /* V32: Bcc [PC+] (4, 1). */
348 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (4, 2)},
350 /* V32: BA .+12; NOP; BA32 target; NOP; Bcc .-6 (4, 2). */
356 /* COMMON: Bcc o (5, 0). The offsets are calculated as for v32. Code
357 should contain two nop insns (or four if offset size is large or
358 unknown) after every label. */
359 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (5, 1)},
361 /* COMMON: Bcc [PC+] (5, 1). */
362 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (5, 2)},
364 /* COMMON: FIXME: ???. Treat as error currently. */
370 /* V32: BA o (6, 0). */
371 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (6, 1)},
373 /* V32: BA.W (6, 1). */
374 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (6, 2)},
376 /* V32: BA.D (6, 2). */
382 /* LAPC: LAPCQ .+0..15*2,Rn (7, 0). */
383 {14*2, -1*2, 0, ENCODE_RELAX (7, 2)},
386 While there's a shorter sequence, e.g. LAPCQ + an ADDQ or SUBQ,
387 that would affect flags, so we can't do that as it wouldn't be a
388 proper insn expansion of LAPCQ. This row is associated with a
389 2-byte expansion, so it's unused rather than the next. */
392 /* LAPC: LAPC.D (7, 2). */
398 /* PIC for pre-v32: Bcc o (8, 0). */
399 {BRANCH_BF
, BRANCH_BB
, 0, ENCODE_RELAX (STATE_COND_BRANCH_PIC
, 1)},
401 /* Bcc [PC+] (8, 1). */
402 {BRANCH_WF
, BRANCH_WB
, 2, ENCODE_RELAX (STATE_COND_BRANCH_PIC
, 2)},
404 /* 32-bit expansion, PIC (8, 2). */
416 /* Target-specific multicharacter options, not const-declared. */
417 struct option md_longopts
[] =
419 #define OPTION_NO_US (OPTION_MD_BASE + 0)
420 {"no-underscore", no_argument
, NULL
, OPTION_NO_US
},
421 #define OPTION_US (OPTION_MD_BASE + 1)
422 {"underscore", no_argument
, NULL
, OPTION_US
},
423 #define OPTION_PIC (OPTION_US + 1)
424 {"pic", no_argument
, NULL
, OPTION_PIC
},
425 #define OPTION_MULBUG_ABORT_ON (OPTION_PIC + 1)
426 {"mul-bug-abort", no_argument
, NULL
, OPTION_MULBUG_ABORT_ON
},
427 #define OPTION_MULBUG_ABORT_OFF (OPTION_MULBUG_ABORT_ON + 1)
428 {"no-mul-bug-abort", no_argument
, NULL
, OPTION_MULBUG_ABORT_OFF
},
429 #define OPTION_ARCH (OPTION_MULBUG_ABORT_OFF + 1)
430 {"march", required_argument
, NULL
, OPTION_ARCH
},
431 {NULL
, no_argument
, NULL
, 0}
434 /* Not const-declared. */
435 size_t md_longopts_size
= sizeof (md_longopts
);
436 const char *md_shortopts
= "hHN";
438 /* At first glance, this may seems wrong and should be 4 (ba + nop); but
439 since a short_jump must skip a *number* of long jumps, it must also be
440 a long jump. Here, we hope to make it a "ba [16bit_offs]" and a "nop"
441 for the delay slot and hope that the jump table at most needs
442 32767/4=8191 long-jumps. A branch is better than a jump, since it is
443 relative; we will not have a reloc to fix up somewhere.
445 Note that we can't add relocs, because relaxation uses these fixed
446 numbers, and md_create_short_jump is called after relaxation. */
448 int md_short_jump_size
= 6;
450 /* The v32 version has a delay-slot, hence two bytes longer.
451 The pre-v32 PIC version uses a prefixed insn. */
452 #define cris_any_v0_v10_long_jump_size 6
453 #define cris_any_v0_v10_long_jump_size_pic 8
454 #define crisv32_long_jump_size 8
456 int md_long_jump_size
= XCONCAT2 (DEFAULT_CRIS_ARCH
,_long_jump_size
);
458 /* Report output format. Small changes in output format (like elf
459 variants below) can happen until all options are parsed, but after
460 that, the output format must remain fixed. */
463 cris_target_format (void)
465 switch (OUTPUT_FLAVOR
)
467 case bfd_target_aout_flavour
:
470 case bfd_target_elf_flavour
:
471 if (symbols_have_leading_underscore
)
472 return "elf32-us-cris";
481 /* Return a bfd_mach_cris... value corresponding to the value of
487 unsigned int retval
= 0;
491 case arch_cris_common_v10_v32
:
492 retval
= bfd_mach_cris_v10_v32
;
496 retval
= bfd_mach_cris_v32
;
500 case arch_cris_any_v0_v10
:
501 retval
= bfd_mach_cris_v0_v10
;
505 BAD_CASE (cris_arch
);
511 /* We need a port-specific relaxation function to cope with sym2 - sym1
512 relative expressions with both symbols in the same segment (but not
513 necessarily in the same frag as this insn), for example:
514 move.d [pc+sym2-(sym1-2)],r10
516 The offset can be 8, 16 or 32 bits long. */
519 cris_relax_frag (segT seg ATTRIBUTE_UNUSED
, fragS
*fragP
,
520 long stretch ATTRIBUTE_UNUSED
)
525 const relax_typeS
*this_type
;
526 const relax_typeS
*start_type
;
527 relax_substateT next_state
;
528 relax_substateT this_state
;
529 const relax_typeS
*table
= TC_GENERIC_RELAX_TABLE
;
531 /* We only have to cope with frags as prepared by
532 md_estimate_size_before_relax. The dword cases may get here
533 because of the different reasons that they aren't relaxable. */
534 switch (fragP
->fr_subtype
)
536 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_DWORD
):
537 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
538 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
539 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
540 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
541 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
542 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
543 /* When we get to these states, the frag won't grow any more. */
546 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
547 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
548 if (fragP
->fr_symbol
== NULL
549 || S_GET_SEGMENT (fragP
->fr_symbol
) != absolute_section
)
550 as_fatal (_("internal inconsistency problem in %s: fr_symbol %lx"),
551 __FUNCTION__
, (long) fragP
->fr_symbol
);
552 symbolP
= fragP
->fr_symbol
;
553 if (symbol_resolved_p (symbolP
))
554 as_fatal (_("internal inconsistency problem in %s: resolved symbol"),
556 aim
= S_GET_VALUE (symbolP
);
559 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
560 /* Nothing to do here. */
564 as_fatal (_("internal inconsistency problem in %s: fr_subtype %d"),
565 __FUNCTION__
, fragP
->fr_subtype
);
568 /* The rest is stolen from relax_frag. There's no obvious way to
569 share the code, but fortunately no requirement to keep in sync as
570 long as fragP->fr_symbol does not have its segment changed. */
572 this_state
= fragP
->fr_subtype
;
573 start_type
= this_type
= table
+ this_state
;
577 /* Look backwards. */
578 for (next_state
= this_type
->rlx_more
; next_state
;)
579 if (aim
>= this_type
->rlx_backward
)
583 /* Grow to next state. */
584 this_state
= next_state
;
585 this_type
= table
+ this_state
;
586 next_state
= this_type
->rlx_more
;
592 for (next_state
= this_type
->rlx_more
; next_state
;)
593 if (aim
<= this_type
->rlx_forward
)
597 /* Grow to next state. */
598 this_state
= next_state
;
599 this_type
= table
+ this_state
;
600 next_state
= this_type
->rlx_more
;
604 growth
= this_type
->rlx_length
- start_type
->rlx_length
;
606 fragP
->fr_subtype
= this_state
;
610 /* Prepare machine-dependent frags for relaxation.
612 Called just before relaxation starts. Any symbol that is now undefined
613 will not become defined.
615 Return the correct fr_subtype in the frag.
617 Return the initial "guess for fr_var" to caller. The guess for fr_var
618 is *actually* the growth beyond fr_fix. Whatever we do to grow fr_fix
619 or fr_var contributes to our returned value.
621 Although it may not be explicit in the frag, pretend
622 fr_var starts with a value. */
625 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
628 symbolS
*symbolP
= fragP
->fr_symbol
;
630 #define HANDLE_RELAXABLE(state) \
631 case ENCODE_RELAX (state, STATE_UNDF): \
632 if (symbolP != NULL \
633 && S_GET_SEGMENT (symbolP) == segment_type \
634 && !S_IS_WEAK (symbolP)) \
635 /* The symbol lies in the same segment - a relaxable \
638 = ENCODE_RELAX (state, STATE_BYTE); \
640 /* Unknown or not the same segment, so not relaxable. */ \
642 = ENCODE_RELAX (state, STATE_DWORD); \
644 = md_cris_relax_table[fragP->fr_subtype].rlx_length; \
647 old_fr_fix
= fragP
->fr_fix
;
649 switch (fragP
->fr_subtype
)
651 HANDLE_RELAXABLE (STATE_COND_BRANCH
);
652 HANDLE_RELAXABLE (STATE_COND_BRANCH_V32
);
653 HANDLE_RELAXABLE (STATE_COND_BRANCH_COMMON
);
654 HANDLE_RELAXABLE (STATE_COND_BRANCH_PIC
);
655 HANDLE_RELAXABLE (STATE_ABS_BRANCH_V32
);
657 case ENCODE_RELAX (STATE_LAPC
, STATE_UNDF
):
659 && S_GET_SEGMENT (symbolP
) == segment_type
660 && !S_IS_WEAK (symbolP
))
662 /* The symbol lies in the same segment - a relaxable case.
663 Check if we currently have an odd offset; we can't code
664 that into the instruction. Relaxing presumably only cause
665 multiple-of-two changes, so we should only need to adjust
667 bfd_vma target_address
669 ? S_GET_VALUE (symbolP
)
670 : 0) + fragP
->fr_offset
;
671 bfd_vma var_part_offset
= fragP
->fr_fix
;
672 bfd_vma address_of_var_part
= fragP
->fr_address
+ var_part_offset
;
673 long offset
= target_address
- (address_of_var_part
- 2);
677 ? ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
)
678 : ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
);
681 /* Unknown or not the same segment, so not relaxable. */
683 = ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
);
685 = md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
688 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_UNDF
):
689 /* Note that we can not do anything sane with relaxing
690 [rX + a_known_symbol_in_text], it will have to be a 32-bit
693 We could play tricks with managing a constant pool and make
694 a_known_symbol_in_text a "bdap [pc + offset]" pointing there
695 (like the GOT for ELF shared libraries), but that's no use, it
696 would in general be no shorter or faster code, only more
699 if (S_GET_SEGMENT (symbolP
) != absolute_section
)
701 /* Go for dword if not absolute or same segment. */
703 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
);
704 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
706 else if (!symbol_resolved_p (fragP
->fr_symbol
))
708 /* The symbol will eventually be completely resolved as an
709 absolute expression, but right now it depends on the result
710 of relaxation and we don't know anything else about the
711 value. We start relaxation with the assumption that it'll
714 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
);
715 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
719 /* Absolute expression. */
721 value
= (symbolP
!= NULL
722 ? S_GET_VALUE (symbolP
) : 0) + fragP
->fr_offset
;
724 if (value
>= -128 && value
<= 127)
726 /* Byte displacement. */
727 (fragP
->fr_opcode
)[0] = value
;
731 /* Word or dword displacement. */
732 int pow2_of_size
= 1;
735 if (value
< -32768 || value
> 32767)
737 /* Outside word range, make it a dword. */
741 /* Modify the byte-offset BDAP into a word or dword offset
742 BDAP. Or really, a BDAP rX,8bit into a
743 BDAP.[wd] rX,[PC+] followed by a word or dword. */
744 (fragP
->fr_opcode
)[0] = BDAP_PC_LOW
+ pow2_of_size
* 16;
746 /* Keep the register number in the highest four bits. */
747 (fragP
->fr_opcode
)[1] &= 0xF0;
748 (fragP
->fr_opcode
)[1] |= BDAP_INCR_HIGH
;
750 /* It grew by two or four bytes. */
751 fragP
->fr_fix
+= 1 << pow2_of_size
;
752 writep
= fragP
->fr_literal
+ old_fr_fix
;
753 md_number_to_chars (writep
, value
, 1 << pow2_of_size
);
759 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_BYTE
):
760 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_WORD
):
761 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
762 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_BYTE
):
763 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_WORD
):
764 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_DWORD
):
765 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_BYTE
):
766 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_WORD
):
767 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
768 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_BYTE
):
769 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_WORD
):
770 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
771 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_BYTE
):
772 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_WORD
):
773 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
774 case ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
):
775 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
776 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
777 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
778 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
779 /* When relaxing a section for the second time, we don't need to
780 do anything except making sure that fr_var is set right. */
781 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
784 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
785 /* Nothing to do here. */
789 BAD_CASE (fragP
->fr_subtype
);
792 return fragP
->fr_var
+ (fragP
->fr_fix
- old_fr_fix
);
795 /* Perform post-processing of machine-dependent frags after relaxation.
796 Called after relaxation is finished.
798 fr_type == rs_machine_dependent.
799 fr_subtype is what the address relaxed to.
801 Out: Any fixS:s and constants are set up.
803 The caller will turn the frag into a ".space 0". */
806 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec ATTRIBUTE_UNUSED
,
809 /* Pointer to first byte in variable-sized part of the frag. */
812 /* Pointer to first opcode byte in frag. */
815 /* Used to check integrity of the relaxation.
816 One of 2 = long, 1 = word, or 0 = byte. */
817 int length_code ATTRIBUTE_UNUSED
;
819 /* Size in bytes of variable-sized part of frag. */
820 int var_part_size
= 0;
822 /* This is part of *fragP. It contains all information about addresses
823 and offsets to varying parts. */
825 unsigned long var_part_offset
;
827 /* Where, in file space, is _var of *fragP? */
828 unsigned long address_of_var_part
= 0;
830 /* Where, in file space, does addr point? */
831 unsigned long target_address
;
833 know (fragP
->fr_type
== rs_machine_dependent
);
835 length_code
= fragP
->fr_subtype
& STATE_LENGTH_MASK
;
836 know (length_code
>= 0 && length_code
< STATE_MAX_LENGTH
);
838 var_part_offset
= fragP
->fr_fix
;
839 var_partp
= fragP
->fr_literal
+ var_part_offset
;
840 opcodep
= fragP
->fr_opcode
;
842 symbolP
= fragP
->fr_symbol
;
843 target_address
= (symbolP
? S_GET_VALUE (symbolP
) : 0) + fragP
->fr_offset
;
844 address_of_var_part
= fragP
->fr_address
+ var_part_offset
;
846 switch (fragP
->fr_subtype
)
848 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_BYTE
):
849 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_BYTE
):
850 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_BYTE
):
851 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_BYTE
):
852 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_BYTE
):
853 opcodep
[0] = branch_disp ((target_address
- address_of_var_part
));
857 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_WORD
):
858 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_WORD
):
859 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_WORD
):
860 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_WORD
):
861 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_WORD
):
862 /* We had a quick immediate branch, now turn it into a word one i.e. a
864 opcodep
[0] = BRANCH_PC_LOW
;
866 opcodep
[1] |= BRANCH_INCR_HIGH
;
867 md_number_to_chars (var_partp
,
870 - (address_of_var_part
871 + (cris_arch
== arch_crisv32
872 || cris_arch
== arch_cris_common_v10_v32
878 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
879 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
880 fragP
->fr_symbol
, (symbolS
*) NULL
,
882 /* Ten bytes added: a branch, nop and a jump. */
883 var_part_size
= 2 + 2 + 4 + 2;
886 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_DWORD
):
887 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
888 fragP
->fr_symbol
, (symbolS
*) NULL
,
890 /* Twelve bytes added: a branch, nop and a pic-branch-32. */
891 var_part_size
= 2 + 2 + 4 + 2 + 2;
894 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
895 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
896 fragP
->fr_symbol
, (symbolS
*) NULL
,
898 /* Twelve bytes added: a branch, nop and another branch and nop. */
899 var_part_size
= 2 + 2 + 2 + 4 + 2;
902 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
903 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
904 _("Relaxation to long branches for .arch common_v10_v32\
906 /* Pretend we have twelve bytes for sake of quelling further
908 var_part_size
= 2 + 2 + 2 + 4 + 2;
911 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
912 /* We had a quick immediate branch or a word immediate ba. Now
913 turn it into a dword one. */
914 opcodep
[0] = BA_DWORD_OPCODE
& 255;
915 opcodep
[1] = (BA_DWORD_OPCODE
>> 8) & 255;
916 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, symbolP
,
917 fragP
->fr_offset
+ 6, 1, BFD_RELOC_32_PCREL
);
921 case ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
):
923 long offset
= target_address
- (address_of_var_part
- 2);
925 /* This is mostly a sanity check; useful occurrences (if there
926 really are any) should have been caught in
927 md_estimate_size_before_relax. We can (at least
928 theoretically) stumble over invalid code with odd sizes and
929 .p2aligns within the code, so emit an error if that happens.
930 (The generic relaxation machinery is not fit to check this.) */
933 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
934 _("Complicated LAPC target operand is not\
935 a multiple of two. Use LAPC.D"));
937 /* FIXME: This *is* a sanity check. Remove when done with. */
938 if (offset
> 15*2 || offset
< 0)
939 as_fatal (_("Internal error found in md_convert_frag: offset %ld.\
940 Please report this."),
943 opcodep
[0] |= (offset
/ 2) & 0xf;
948 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
950 md_number_to_chars (opcodep
,
951 LAPC_DWORD_OPCODE
+ (opcodep
[1] & 0xf0) * 256,
953 /* Remember that the reloc is against the position *after* the
954 relocated contents, so we need to adjust to the start of
956 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, fragP
->fr_symbol
,
957 fragP
->fr_offset
+ 6, 1, BFD_RELOC_32_PCREL
);
962 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
964 as_fatal (_("internal inconsistency in %s: bdapq no symbol"),
966 opcodep
[0] = S_GET_VALUE (symbolP
);
970 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
971 /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit
972 one that uses PC autoincrement. */
973 opcodep
[0] = BDAP_PC_LOW
+ (1 << 4);
975 opcodep
[1] |= BDAP_INCR_HIGH
;
977 as_fatal (_("internal inconsistency in %s: bdap.w with no symbol"),
979 md_number_to_chars (var_partp
, S_GET_VALUE (symbolP
), 2);
983 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
984 /* We had a BDAP 16-bit "word", change the offset to a dword. */
985 opcodep
[0] = BDAP_PC_LOW
+ (2 << 4);
987 opcodep
[1] |= BDAP_INCR_HIGH
;
988 if (fragP
->fr_symbol
== NULL
)
989 md_number_to_chars (var_partp
, fragP
->fr_offset
, 4);
991 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, fragP
->fr_symbol
,
992 fragP
->fr_offset
, 0, BFD_RELOC_32
);
996 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
997 /* This is the only time we check position and alignment of the
998 placement-tracking frag. */
999 if (sec
->alignment_power
< 2)
1000 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
1001 _("section alignment must be >= 4 bytes to check MULS/MULU safeness"));
1004 /* If the address after the MULS/MULU has alignment which is
1005 that of the section and may be that of a cache-size of the
1006 buggy versions, then the MULS/MULU can be placed badly. */
1007 if ((address_of_var_part
1008 & ((1 << sec
->alignment_power
) - 1) & 31) == 0)
1009 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
1010 _("dangerous MULS/MULU location; give it higher alignment"));
1015 BAD_CASE (fragP
->fr_subtype
);
1019 fragP
->fr_fix
+= var_part_size
;
1022 /* Generate a short jump around a secondary jump table.
1023 Also called from md_create_long_jump, when sufficient. */
1026 md_create_short_jump (char *storep
, addressT from_addr
, addressT to_addr
,
1027 fragS
*fragP ATTRIBUTE_UNUSED
,
1028 symbolS
*to_symbol ATTRIBUTE_UNUSED
)
1032 /* See md_create_long_jump about the comment on the "+ 2". */
1033 long int max_minimal_minus_distance
;
1034 long int max_minimal_plus_distance
;
1035 long int max_minus_distance
;
1036 long int max_plus_distance
;
1039 if (cris_arch
== arch_crisv32
)
1041 max_minimal_minus_distance
= BRANCH_BB_V32
+ 2;
1042 max_minimal_plus_distance
= BRANCH_BF_V32
+ 2;
1043 max_minus_distance
= BRANCH_WB_V32
+ 2;
1044 max_plus_distance
= BRANCH_WF_V32
+ 2;
1045 nop_opcode
= NOP_OPCODE_V32
;
1047 else if (cris_arch
== arch_cris_common_v10_v32
)
1048 /* Bail out for compatibility mode. (It seems it can be implemented,
1049 perhaps with a 10-byte sequence: "move.d NNNN,$pc/$acr", "jump
1050 $acr", "nop"; but doesn't seem worth it at the moment.) */
1051 as_fatal (_("Out-of-range .word offset handling\
1052 is not implemented for .arch common_v10_v32"));
1055 max_minimal_minus_distance
= BRANCH_BB
+ 2;
1056 max_minimal_plus_distance
= BRANCH_BF
+ 2;
1057 max_minus_distance
= BRANCH_WB
+ 2;
1058 max_plus_distance
= BRANCH_WF
+ 2;
1059 nop_opcode
= NOP_OPCODE
;
1062 distance
= to_addr
- from_addr
;
1064 if (max_minimal_minus_distance
<= distance
1065 && distance
<= max_minimal_plus_distance
)
1067 /* Create a "short" short jump: "BA distance - 2". */
1068 storep
[0] = branch_disp (distance
- 2);
1069 storep
[1] = BA_QUICK_HIGH
;
1071 /* A nop for the delay slot. */
1072 md_number_to_chars (storep
+ 2, nop_opcode
, 2);
1074 /* The extra word should be filled with something sane too. Make it
1075 a nop to keep disassembly sane. */
1076 md_number_to_chars (storep
+ 4, nop_opcode
, 2);
1078 else if (max_minus_distance
<= distance
1079 && distance
<= max_plus_distance
)
1081 /* Make it a "long" short jump: "BA (PC+)". */
1082 md_number_to_chars (storep
, BA_PC_INCR_OPCODE
, 2);
1084 /* ".WORD distance - 4". */
1085 md_number_to_chars (storep
+ 2,
1086 (long) (distance
- 4
1087 - (cris_arch
== arch_crisv32
1091 /* A nop for the delay slot. */
1092 md_number_to_chars (storep
+ 4, nop_opcode
, 2);
1095 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
1096 _(".word case-table handling failed: table too large"));
1099 /* Generate a long jump in a secondary jump table.
1101 storep Where to store the jump instruction.
1102 from_addr Address of the jump instruction.
1103 to_addr Destination address of the jump.
1104 fragP Which frag the destination address operand
1106 to_symbol Destination symbol. */
1109 md_create_long_jump (char *storep
, addressT from_addr
, addressT to_addr
,
1110 fragS
*fragP
, symbolS
*to_symbol
)
1114 /* FIXME: What's that "+ 3"? It comes from the magic numbers that
1115 used to be here, it's just translated to the limit macros used in
1116 the relax table. But why + 3? */
1117 long int max_short_minus_distance
1118 = cris_arch
!= arch_crisv32
? BRANCH_WB
+ 3 : BRANCH_WB_V32
+ 3;
1120 long int max_short_plus_distance
1121 = cris_arch
!= arch_crisv32
? BRANCH_WF
+ 3 : BRANCH_WF_V32
+ 3;
1123 distance
= to_addr
- from_addr
;
1125 if (max_short_minus_distance
<= distance
1126 && distance
<= max_short_plus_distance
)
1128 /* Then make it a "short" long jump. */
1129 md_create_short_jump (storep
, from_addr
, to_addr
, fragP
,
1131 if (cris_arch
== arch_crisv32
)
1132 md_number_to_chars (storep
+ 6, NOP_OPCODE_V32
, 2);
1134 md_number_to_chars (storep
+ 6, NOP_OPCODE
, 2);
1138 /* We have a "long" long jump: "JUMP [PC+]". If CRISv32, always
1139 make it a BA. Else make it an "MOVE [PC=PC+N],P0" if we're supposed
1140 to emit PIC code. */
1141 md_number_to_chars (storep
,
1142 cris_arch
== arch_crisv32
1144 : (pic
? MOVE_PC_INCR_OPCODE_PREFIX
1145 : JUMP_PC_INCR_OPCODE
),
1148 /* Follow with a ".DWORD to_addr", PC-relative for PIC. */
1149 fix_new (fragP
, storep
+ 2 - fragP
->fr_literal
, 4, to_symbol
,
1150 cris_arch
== arch_crisv32
? 6 : 0,
1151 cris_arch
== arch_crisv32
|| pic
? 1 : 0,
1152 cris_arch
== arch_crisv32
|| pic
1153 ? BFD_RELOC_32_PCREL
: BFD_RELOC_32
);
1155 /* Follow it with a "NOP" for CRISv32. */
1156 if (cris_arch
== arch_crisv32
)
1157 md_number_to_chars (storep
+ 6, NOP_OPCODE_V32
, 2);
1159 /* ...and the rest of the move-opcode for pre-v32 PIC. */
1160 md_number_to_chars (storep
+ 6, MOVE_PC_INCR_OPCODE_SUFFIX
, 2);
1164 /* Allocate space for the first piece of an insn, and mark it as the
1165 start of the insn for debug-format use. */
1168 cris_insn_first_word_frag (void)
1170 char *insnp
= frag_more (2);
1172 /* We need to mark the start of the insn by passing dwarf2_emit_insn
1173 the offset from the current fragment position. This must be done
1174 after the first fragment is created but before any other fragments
1175 (fixed or varying) are created. Note that the offset only
1176 corresponds to the "size" of the insn for a fixed-size,
1177 non-expanded insn. */
1178 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
1179 dwarf2_emit_insn (2);
1184 /* Port-specific assembler initialization. */
1189 const char *hashret
= NULL
;
1192 /* Set up a hash table for the instructions. */
1193 op_hash
= hash_new ();
1194 if (op_hash
== NULL
)
1195 as_fatal (_("Virtual memory exhausted"));
1197 /* Enable use of ".if ..asm.arch.cris.v32"
1198 and ".if ..asm.arch.cris.common_v10_v32" and a few others. */
1199 symbol_table_insert (symbol_new ("..asm.arch.cris.v32", absolute_section
,
1200 (cris_arch
== arch_crisv32
),
1201 &zero_address_frag
));
1202 symbol_table_insert (symbol_new ("..asm.arch.cris.v10", absolute_section
,
1203 (cris_arch
== arch_crisv10
),
1204 &zero_address_frag
));
1205 symbol_table_insert (symbol_new ("..asm.arch.cris.common_v10_v32",
1207 (cris_arch
== arch_cris_common_v10_v32
),
1208 &zero_address_frag
));
1209 symbol_table_insert (symbol_new ("..asm.arch.cris.any_v0_v10",
1211 (cris_arch
== arch_cris_any_v0_v10
),
1212 &zero_address_frag
));
1214 while (cris_opcodes
[i
].name
!= NULL
)
1216 const char *name
= cris_opcodes
[i
].name
;
1218 if (! cris_insn_ver_valid_for_arch (cris_opcodes
[i
].applicable_version
,
1225 /* Need to cast to get rid of "const". FIXME: Fix hash_insert instead. */
1226 hashret
= hash_insert (op_hash
, name
, (void *) &cris_opcodes
[i
]);
1228 if (hashret
!= NULL
&& *hashret
!= '\0')
1229 as_fatal (_("Can't hash `%s': %s\n"), cris_opcodes
[i
].name
,
1230 *hashret
== 0 ? _("(unknown reason)") : hashret
);
1233 if (cris_opcodes
[i
].match
& cris_opcodes
[i
].lose
)
1234 as_fatal (_("Buggy opcode: `%s' \"%s\"\n"), cris_opcodes
[i
].name
,
1235 cris_opcodes
[i
].args
);
1239 while (cris_opcodes
[i
].name
!= NULL
1240 && strcmp (cris_opcodes
[i
].name
, name
) == 0);
1244 /* Assemble a source line. */
1247 md_assemble (char *str
)
1249 struct cris_instruction output_instruction
;
1250 struct cris_prefix prefix
;
1256 /* Do the low-level grunt - assemble to bits and split up into a prefix
1257 and ordinary insn. */
1258 cris_process_instruction (str
, &output_instruction
, &prefix
);
1260 /* Handle any prefixes to the instruction. */
1261 switch (prefix
.kind
)
1266 /* When the expression is unknown for a BDAP, it can need 0, 2 or 4
1267 extra bytes, so we handle it separately. */
1268 case PREFIX_BDAP_IMM
:
1269 /* We only do it if the relocation is unspecified, i.e. not a PIC or TLS
1271 if (prefix
.reloc
== BFD_RELOC_NONE
)
1273 gen_bdap (prefix
.base_reg_number
, &prefix
.expr
);
1280 opcodep
= cris_insn_first_word_frag ();
1282 /* Output the prefix opcode. */
1283 md_number_to_chars (opcodep
, (long) prefix
.opcode
, 2);
1285 /* Having a specified reloc only happens for DIP and for BDAP with
1286 PIC or TLS operands, but it is ok to drop through here for the other
1287 prefixes as they can have no relocs specified. */
1288 if (prefix
.reloc
!= BFD_RELOC_NONE
)
1290 unsigned int relocsize
1291 = (prefix
.kind
== PREFIX_DIP
1292 ? 4 : cris_get_specified_reloc_size (prefix
.reloc
));
1294 p
= frag_more (relocsize
);
1295 fix_new_exp (frag_now
, (p
- frag_now
->fr_literal
), relocsize
,
1296 &prefix
.expr
, 0, prefix
.reloc
);
1301 opcodep
= cris_insn_first_word_frag ();
1303 /* Output the prefix opcode. Being a "push", we add the negative
1304 size of the register to "sp". */
1305 if (output_instruction
.spec_reg
!= NULL
)
1307 /* Special register. */
1308 opcodep
[0] = -output_instruction
.spec_reg
->reg_size
;
1312 /* General register. */
1315 opcodep
[1] = (REG_SP
<< 4) + (BDAP_QUICK_OPCODE
>> 8);
1319 BAD_CASE (prefix
.kind
);
1322 /* If we only had a prefix insn, we're done. */
1323 if (output_instruction
.insn_type
== CRIS_INSN_NONE
)
1326 /* Done with the prefix. Continue with the main instruction. */
1327 if (prefix
.kind
== PREFIX_NONE
)
1328 opcodep
= cris_insn_first_word_frag ();
1330 opcodep
= frag_more (2);
1332 /* Output the instruction opcode. */
1333 md_number_to_chars (opcodep
, (long) (output_instruction
.opcode
), 2);
1335 /* Output the symbol-dependent instruction stuff. */
1336 if (output_instruction
.insn_type
== CRIS_INSN_BRANCH
)
1338 segT to_seg
= absolute_section
;
1339 int is_undefined
= 0;
1342 if (output_instruction
.expr
.X_op
!= O_constant
)
1344 to_seg
= S_GET_SEGMENT (output_instruction
.expr
.X_add_symbol
);
1346 if (to_seg
== undefined_section
)
1350 if (to_seg
== now_seg
|| is_undefined
1351 /* In CRISv32, there *is* a 32-bit absolute branch, so don't
1352 emit the 12-byte sequence for known symbols in other
1354 || (cris_arch
== arch_crisv32
1355 && output_instruction
.opcode
== BA_QUICK_OPCODE
))
1357 /* Handle complex expressions. */
1359 = (SIMPLE_EXPR (&output_instruction
.expr
)
1360 ? output_instruction
.expr
.X_add_number
1363 = (SIMPLE_EXPR (&output_instruction
.expr
)
1364 ? output_instruction
.expr
.X_add_symbol
1365 : make_expr_symbol (&output_instruction
.expr
));
1367 /* If is_undefined, the expression may still become now_seg.
1368 That case is handled by md_estimate_size_before_relax. */
1369 length_code
= to_seg
== now_seg
? STATE_BYTE
: STATE_UNDF
;
1371 /* Make room for max twelve bytes of variable length for v32 mode
1372 or PIC, ten for v10 and older. */
1373 frag_var (rs_machine_dependent
,
1374 (cris_arch
== arch_crisv32
1375 || cris_arch
== arch_cris_common_v10_v32
1376 || pic
) ? 12 : 10, 0,
1377 ENCODE_RELAX (cris_arch
== arch_crisv32
1378 ? (output_instruction
.opcode
1380 ? STATE_ABS_BRANCH_V32
1381 : STATE_COND_BRANCH_V32
)
1382 : (cris_arch
== arch_cris_common_v10_v32
1383 ? STATE_COND_BRANCH_COMMON
1384 : (pic
? STATE_COND_BRANCH_PIC
1385 : STATE_COND_BRANCH
)),
1387 sym
, addvalue
, opcodep
);
1391 /* We have: to_seg != now_seg && to_seg != undefined_section.
1392 This means it is a branch to a known symbol in another
1393 section, perhaps an absolute address. Emit a 32-bit branch. */
1395 = frag_more ((cris_arch
== arch_crisv32
1396 || cris_arch
== arch_cris_common_v10_v32
1400 gen_cond_branch_32 (opcodep
, cond_jump
, frag_now
,
1401 output_instruction
.expr
.X_add_symbol
,
1403 output_instruction
.expr
.X_add_number
);
1406 else if (output_instruction
.insn_type
== CRIS_INSN_MUL
1407 && err_for_dangerous_mul_placement
)
1408 /* Create a frag which which we track the location of the mul insn
1409 (in the last two bytes before the mul-frag). */
1410 frag_variant (rs_machine_dependent
, 0, 0,
1411 ENCODE_RELAX (STATE_MUL
, STATE_BYTE
),
1415 if (output_instruction
.imm_oprnd_size
> 0)
1417 /* The instruction has an immediate operand. */
1418 enum bfd_reloc_code_real reloc
= BFD_RELOC_NONE
;
1420 switch (output_instruction
.imm_oprnd_size
)
1422 /* Any byte-size immediate constants are treated as
1423 word-size. FIXME: Thus overflow check does not work
1427 /* Note that size-check for the explicit reloc has already
1428 been done when we get here. */
1429 if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1430 reloc
= output_instruction
.reloc
;
1432 reloc
= BFD_RELOC_16
;
1436 /* Allow a relocation specified in the operand. */
1437 if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1438 reloc
= output_instruction
.reloc
;
1440 reloc
= BFD_RELOC_32
;
1444 BAD_CASE (output_instruction
.imm_oprnd_size
);
1447 p
= frag_more (output_instruction
.imm_oprnd_size
);
1448 fix_new_exp (frag_now
, (p
- frag_now
->fr_literal
),
1449 output_instruction
.imm_oprnd_size
,
1450 &output_instruction
.expr
,
1451 reloc
== BFD_RELOC_32_PCREL
1452 || reloc
== BFD_RELOC_16_PCREL
1453 || reloc
== BFD_RELOC_8_PCREL
, reloc
);
1455 else if (output_instruction
.reloc
== BFD_RELOC_CRIS_LAPCQ_OFFSET
1456 && output_instruction
.expr
.X_md
!= 0)
1458 /* Handle complex expressions. */
1460 = (output_instruction
.expr
.X_op_symbol
!= NULL
1461 ? 0 : output_instruction
.expr
.X_add_number
);
1463 = (output_instruction
.expr
.X_op_symbol
!= NULL
1464 ? make_expr_symbol (&output_instruction
.expr
)
1465 : output_instruction
.expr
.X_add_symbol
);
1467 /* This is a relaxing construct, so we need a frag_var rather
1468 than the fix_new_exp call below. */
1469 frag_var (rs_machine_dependent
,
1471 ENCODE_RELAX (STATE_LAPC
, STATE_UNDF
),
1472 sym
, addvalue
, opcodep
);
1474 else if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1476 /* An immediate operand that has a relocation and needs to be
1477 processed further. */
1479 /* It is important to use fix_new_exp here and everywhere else
1480 (and not fix_new), as fix_new_exp can handle "difference
1481 expressions" - where the expression contains a difference of
1482 two symbols in the same segment. */
1483 fix_new_exp (frag_now
, (opcodep
- frag_now
->fr_literal
), 2,
1484 &output_instruction
.expr
,
1485 output_instruction
.reloc
== BFD_RELOC_32_PCREL
1486 || output_instruction
.reloc
== BFD_RELOC_16_PCREL
1487 || output_instruction
.reloc
== BFD_RELOC_8_PCREL
1488 || (output_instruction
.reloc
1489 == BFD_RELOC_CRIS_LAPCQ_OFFSET
),
1490 output_instruction
.reloc
);
1495 /* Low level text-to-bits assembly. */
1498 cris_process_instruction (char *insn_text
, struct cris_instruction
*out_insnp
,
1499 struct cris_prefix
*prefixp
)
1502 char modified_char
= 0;
1504 struct cris_opcode
*instruction
;
1511 /* Reset these fields to a harmless state in case we need to return in
1513 prefixp
->kind
= PREFIX_NONE
;
1514 prefixp
->reloc
= BFD_RELOC_NONE
;
1515 out_insnp
->insn_type
= CRIS_INSN_NONE
;
1516 out_insnp
->imm_oprnd_size
= 0;
1518 /* Find the end of the opcode mnemonic. We assume (true in 2.9.1)
1519 that the caller has translated the opcode to lower-case, up to the
1520 first non-letter. */
1521 for (operands
= insn_text
; ISLOWER (*operands
); ++operands
)
1524 /* Terminate the opcode after letters, but save the character there if
1525 it was of significance. */
1532 /* Put back the modified character later. */
1533 modified_char
= *operands
;
1537 /* Consume the character after the mnemonic
1538 and replace it with '\0'. */
1543 as_bad (_("Unknown opcode: `%s'"), insn_text
);
1547 /* Find the instruction. */
1548 instruction
= (struct cris_opcode
*) hash_find (op_hash
, insn_text
);
1549 if (instruction
== NULL
)
1551 as_bad (_("Unknown opcode: `%s'"), insn_text
);
1555 /* Put back the modified character. */
1556 switch (modified_char
)
1562 *--operands
= modified_char
;
1565 /* Try to match an opcode table slot. */
1566 for (s
= operands
;;)
1570 /* Initialize *prefixp, perhaps after being modified for a
1572 prefixp
->kind
= PREFIX_NONE
;
1573 prefixp
->reloc
= BFD_RELOC_NONE
;
1575 /* Initialize *out_insnp. */
1576 memset (out_insnp
, 0, sizeof (*out_insnp
));
1577 out_insnp
->opcode
= instruction
->match
;
1578 out_insnp
->reloc
= BFD_RELOC_NONE
;
1579 out_insnp
->insn_type
= CRIS_INSN_NORMAL
;
1580 out_insnp
->imm_oprnd_size
= 0;
1584 /* Build the opcode, checking as we go to make sure that the
1586 for (args
= instruction
->args
;; ++args
)
1591 /* If we've come to the end of arguments, we're done. */
1597 /* Non-matcher character for disassembly.
1605 /* These must match exactly. */
1611 /* "ACR", case-insensitive.
1612 Handle a sometimes-mandatory dollar sign as register
1614 if (*s
== REGISTER_PREFIX_CHAR
)
1616 else if (demand_register_prefix
)
1619 if ((*s
++ != 'a' && s
[-1] != 'A')
1620 || (*s
++ != 'c' && s
[-1] != 'C')
1621 || (*s
++ != 'r' && s
[-1] != 'R'))
1626 /* This is not really an operand, but causes a "BDAP
1627 -size,SP" prefix to be output, for PUSH instructions. */
1628 prefixp
->kind
= PREFIX_PUSH
;
1632 /* This letter marks an operand that should not be matched
1633 in the assembler. It is a branch with 16-bit
1634 displacement. The assembler will create them from the
1635 8-bit flavor when necessary. The assembler does not
1636 support the [rN+] operand, as the [r15+] that is
1637 generated for 16-bit displacements. */
1641 /* A 5-bit unsigned immediate in bits <4:0>. */
1642 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1646 if (out_insnp
->expr
.X_op
== O_constant
1647 && (out_insnp
->expr
.X_add_number
< 0
1648 || out_insnp
->expr
.X_add_number
> 31))
1649 as_bad (_("Immediate value not in 5 bit unsigned range: %ld"),
1650 out_insnp
->expr
.X_add_number
);
1652 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_5
;
1657 /* A 4-bit unsigned immediate in bits <3:0>. */
1658 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1662 if (out_insnp
->expr
.X_op
== O_constant
1663 && (out_insnp
->expr
.X_add_number
< 0
1664 || out_insnp
->expr
.X_add_number
> 15))
1665 as_bad (_("Immediate value not in 4 bit unsigned range: %ld"),
1666 out_insnp
->expr
.X_add_number
);
1668 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_4
;
1672 /* For 'd', check for an optional ".d" or ".D" at the
1673 start of the operands, followed by a space character. */
1675 if (modified_char
== '.' && *s
== '.')
1677 if ((s
[1] != 'd' && s
[1] == 'D')
1678 || ! ISSPACE (s
[2]))
1686 /* General register in bits <15:12> and <3:0>. */
1687 if (! get_gen_reg (&s
, ®no
))
1691 out_insnp
->opcode
|= regno
/* << 0 */;
1692 out_insnp
->opcode
|= regno
<< 12;
1697 /* Flags from the condition code register. */
1701 if (! get_flags (&s
, &flags
))
1704 out_insnp
->opcode
|= ((flags
& 0xf0) << 8) | (flags
& 0xf);
1709 /* A 6-bit signed immediate in bits <5:0>. */
1710 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1714 if (out_insnp
->expr
.X_op
== O_constant
1715 && (out_insnp
->expr
.X_add_number
< -32
1716 || out_insnp
->expr
.X_add_number
> 31))
1717 as_bad (_("Immediate value not in 6 bit range: %ld"),
1718 out_insnp
->expr
.X_add_number
);
1719 out_insnp
->reloc
= BFD_RELOC_CRIS_SIGNED_6
;
1724 /* A 6-bit unsigned immediate in bits <5:0>. */
1725 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1729 if (out_insnp
->expr
.X_op
== O_constant
1730 && (out_insnp
->expr
.X_add_number
< 0
1731 || out_insnp
->expr
.X_add_number
> 63))
1732 as_bad (_("Immediate value not in 6 bit unsigned range: %ld"),
1733 out_insnp
->expr
.X_add_number
);
1734 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_6
;
1739 /* A size modifier, B, W or D, to be put in a bit position
1740 suitable for CLEAR instructions (i.e. reflecting a zero
1742 if (! get_bwd_size_modifier (&s
, &size_bits
))
1749 out_insnp
->opcode
|= 0 << 12;
1753 out_insnp
->opcode
|= 4 << 12;
1757 out_insnp
->opcode
|= 8 << 12;
1764 /* A size modifier, B, W or D, to be put in bits <5:4>. */
1765 if (modified_char
!= '.'
1766 || ! get_bwd_size_modifier (&s
, &size_bits
))
1770 out_insnp
->opcode
|= size_bits
<< 4;
1775 /* A branch expression. */
1776 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1780 out_insnp
->insn_type
= CRIS_INSN_BRANCH
;
1785 /* A 8-bit quick BDAP expression, "expr,R". */
1786 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1794 if (!get_gen_reg (&s
, ®no
))
1797 out_insnp
->opcode
|= regno
<< 12;
1798 out_insnp
->reloc
= BFD_RELOC_CRIS_SIGNED_8
;
1802 /* A BDAP expression for any size, "expr,R". */
1803 if (! cris_get_expression (&s
, &prefixp
->expr
))
1812 if (!get_gen_reg (&s
, &prefixp
->base_reg_number
))
1815 /* Since 'O' is used with an explicit bdap, we have no
1816 "real" instruction. */
1817 prefixp
->kind
= PREFIX_BDAP_IMM
;
1819 = BDAP_QUICK_OPCODE
| (prefixp
->base_reg_number
<< 12);
1821 out_insnp
->insn_type
= CRIS_INSN_NONE
;
1826 /* Special register in bits <15:12>. */
1827 if (! get_spec_reg (&s
, &out_insnp
->spec_reg
))
1831 /* Use of some special register names come with a
1832 specific warning. Note that we have no ".cpu type"
1833 pseudo yet, so some of this is just unused
1835 if (out_insnp
->spec_reg
->warning
)
1836 as_warn ("%s", out_insnp
->spec_reg
->warning
);
1837 else if (out_insnp
->spec_reg
->applicable_version
1838 == cris_ver_warning
)
1839 /* Others have a generic warning. */
1840 as_warn (_("Unimplemented register `%s' specified"),
1841 out_insnp
->spec_reg
->name
);
1844 |= out_insnp
->spec_reg
->number
<< 12;
1849 /* This character is used in the disassembler to
1850 recognize a prefix instruction to fold into the
1851 addressing mode for the next instruction. It is
1856 /* General register in bits <15:12>. */
1857 if (! get_gen_reg (&s
, ®no
))
1861 out_insnp
->opcode
|= regno
<< 12;
1866 /* General register in bits <3:0>. */
1867 if (! get_gen_reg (&s
, ®no
))
1871 out_insnp
->opcode
|= regno
/* << 0 */;
1876 /* Source operand in bit <10> and a prefix; a 3-operand
1878 if (! get_3op_or_dip_prefix_op (&s
, prefixp
))
1884 /* Source operand in bits <10>, <3:0> and optionally a
1885 prefix; i.e. an indirect operand or an side-effect
1886 prefix (where valid). */
1887 if (! get_autoinc_prefix_or_indir_op (&s
, prefixp
, &mode
,
1894 if (prefixp
->kind
!= PREFIX_NONE
)
1896 /* A prefix, so it has the autoincrement bit
1898 out_insnp
->opcode
|= (AUTOINCR_BIT
<< 8);
1902 /* No prefix. The "mode" variable contains bits like
1903 whether or not this is autoincrement mode. */
1904 out_insnp
->opcode
|= (mode
<< 10);
1906 /* If there was a reloc specifier, then it was
1907 attached to the prefix. Note that we can't check
1908 that the reloc size matches, since we don't have
1909 all the operands yet in all cases. */
1910 if (prefixp
->reloc
!= BFD_RELOC_NONE
)
1911 out_insnp
->reloc
= prefixp
->reloc
;
1914 out_insnp
->opcode
|= regno
/* << 0 */ ;
1920 /* Like 's', but immediate operand only. Also do not
1921 modify insn. There are no insns where an explicit reloc
1922 specifier makes sense. */
1923 if (cris_get_expression (&s
, &out_insnp
->expr
))
1931 /* Like 'N', but PC-relative to the start of the insn.
1932 There might be a :PLT to request a PLT entry. */
1933 if (cris_get_expression (&s
, &out_insnp
->expr
))
1936 out_insnp
->reloc
= BFD_RELOC_32_PCREL
;
1938 /* We have to adjust the expression, because that
1939 relocation is to the location *after* the
1940 relocation. So add 2 for the insn and 4 for the
1942 out_insnp
->expr
.X_add_number
+= 6;
1944 /* TLS specifiers do not make sense here. */
1945 if (pic
&& *s
== RELOC_SUFFIX_CHAR
)
1946 cris_get_reloc_suffix (&s
, &out_insnp
->reloc
,
1954 /* Maybe 'u', maybe 'n'. Only for LAPC/LAPCQ. */
1955 if (cris_get_expression (&s
, &out_insnp
->expr
))
1957 out_insnp
->reloc
= BFD_RELOC_CRIS_LAPCQ_OFFSET
;
1959 /* Define 1 as relaxing. */
1960 out_insnp
->expr
.X_md
= 1;
1966 /* Four PC-relative bits in <3:0> representing <4:1>:0 of
1967 an offset relative to the beginning of the current
1969 if (cris_get_expression (&s
, &out_insnp
->expr
))
1971 out_insnp
->reloc
= BFD_RELOC_CRIS_LAPCQ_OFFSET
;
1973 /* Define 0 as non-relaxing. */
1974 out_insnp
->expr
.X_md
= 0;
1976 /* We have to adjust the expression, because that
1977 relocation is to the location *after* the
1978 insn. So add 2 for the insn. */
1979 out_insnp
->expr
.X_add_number
+= 2;
1985 /* Rs.m in bits <15:12> and <5:4>. */
1986 if (! get_gen_reg (&s
, ®no
)
1987 || ! get_bwd_size_modifier (&s
, &size_bits
))
1991 out_insnp
->opcode
|= (regno
<< 12) | (size_bits
<< 4);
1996 /* Source operand in bits <10>, <3:0> and optionally a
1997 prefix; i.e. an indirect operand or an side-effect
2000 The difference to 's' is that this does not allow an
2001 "immediate" expression. */
2002 if (! get_autoinc_prefix_or_indir_op (&s
, prefixp
,
2010 if (prefixp
->kind
!= PREFIX_NONE
)
2012 /* A prefix, and those matched here always have
2013 side-effects (see 's' case). */
2014 out_insnp
->opcode
|= (AUTOINCR_BIT
<< 8);
2018 /* No prefix. The "mode" variable contains bits
2019 like whether or not this is autoincrement
2021 out_insnp
->opcode
|= (mode
<< 10);
2024 out_insnp
->opcode
|= regno
/* << 0 */;
2029 /* Size modifier (B or W) in bit <4>. */
2030 if (! get_bw_size_modifier (&s
, &size_bits
))
2034 out_insnp
->opcode
|= size_bits
<< 4;
2039 if (cris_arch
== arch_crisv32
2040 && get_sup_reg (&s
, ®no
))
2042 out_insnp
->opcode
|= regno
<< 12;
2051 /* We get here when we fail a match above or we found a
2052 complete match. Break out of this loop. */
2056 /* Was it a match or a miss? */
2059 /* If it's just that the args don't match, maybe the next
2060 item in the table is the same opcode but with
2061 matching operands. First skip any invalid ones. */
2062 while (instruction
[1].name
!= NULL
2063 && strcmp (instruction
->name
, instruction
[1].name
) == 0
2064 && ! cris_insn_ver_valid_for_arch (instruction
[1]
2065 .applicable_version
,
2069 if (instruction
[1].name
!= NULL
2070 && strcmp (instruction
->name
, instruction
[1].name
) == 0
2071 && cris_insn_ver_valid_for_arch (instruction
[1]
2072 .applicable_version
,
2075 /* Yep. Restart and try that one instead. */
2082 /* We've come to the end of instructions with this
2083 opcode, so it must be an error. */
2084 as_bad (_("Illegal operands"));
2086 /* As discard_rest_of_line, but without continuing to the
2088 while (!is_end_of_line
[(unsigned char) *input_line_pointer
])
2089 input_line_pointer
++;
2095 /* We have a match. Check if there's anything more to do. */
2098 /* There was an immediate mode operand, so we must check
2099 that it has an appropriate size. */
2100 switch (instruction
->imm_oprnd_size
)
2104 /* Shouldn't happen; this one does not have immediate
2105 operands with different sizes. */
2106 BAD_CASE (instruction
->imm_oprnd_size
);
2110 out_insnp
->imm_oprnd_size
= 4;
2114 if (cris_arch
== arch_crisv32
)
2115 /* All immediate loads of special registers are
2116 32-bit on CRISv32. */
2117 out_insnp
->imm_oprnd_size
= 4;
2119 switch (out_insnp
->spec_reg
->reg_size
)
2122 if (out_insnp
->expr
.X_op
== O_constant
2123 && (out_insnp
->expr
.X_add_number
< -128
2124 || out_insnp
->expr
.X_add_number
> 255))
2125 as_bad (_("Immediate value not in 8 bit range: %ld"),
2126 out_insnp
->expr
.X_add_number
);
2129 /* FIXME: We need an indicator in the instruction
2130 table to pass on, to indicate if we need to check
2131 overflow for a signed or unsigned number. */
2132 if (out_insnp
->expr
.X_op
== O_constant
2133 && (out_insnp
->expr
.X_add_number
< -32768
2134 || out_insnp
->expr
.X_add_number
> 65535))
2135 as_bad (_("Immediate value not in 16 bit range: %ld"),
2136 out_insnp
->expr
.X_add_number
);
2137 out_insnp
->imm_oprnd_size
= 2;
2141 out_insnp
->imm_oprnd_size
= 4;
2145 BAD_CASE (out_insnp
->spec_reg
->reg_size
);
2150 case SIZE_FIELD_SIGNED
:
2151 case SIZE_FIELD_UNSIGNED
:
2154 /* FIXME: Find way to pass un/signedness to
2155 caller, and set reloc type instead, postponing
2156 this check until cris_number_to_imm. That
2157 necessarily corrects the reloc type for the
2158 byte case, maybe requiring further changes. */
2160 if (out_insnp
->expr
.X_op
== O_constant
)
2162 if (instruction
->imm_oprnd_size
== SIZE_FIELD
2163 && (out_insnp
->expr
.X_add_number
< -128
2164 || out_insnp
->expr
.X_add_number
> 255))
2165 as_bad (_("Immediate value not in 8 bit range: %ld"),
2166 out_insnp
->expr
.X_add_number
);
2167 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_SIGNED
2168 && (out_insnp
->expr
.X_add_number
< -128
2169 || out_insnp
->expr
.X_add_number
> 127))
2170 as_bad (_("Immediate value not in 8 bit signed range: %ld"),
2171 out_insnp
->expr
.X_add_number
);
2172 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_UNSIGNED
2173 && (out_insnp
->expr
.X_add_number
< 0
2174 || out_insnp
->expr
.X_add_number
> 255))
2175 as_bad (_("Immediate value not in 8 bit unsigned range: %ld"),
2176 out_insnp
->expr
.X_add_number
);
2181 if (out_insnp
->expr
.X_op
== O_constant
)
2183 if (instruction
->imm_oprnd_size
== SIZE_FIELD
2184 && (out_insnp
->expr
.X_add_number
< -32768
2185 || out_insnp
->expr
.X_add_number
> 65535))
2186 as_bad (_("Immediate value not in 16 bit range: %ld"),
2187 out_insnp
->expr
.X_add_number
);
2188 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_SIGNED
2189 && (out_insnp
->expr
.X_add_number
< -32768
2190 || out_insnp
->expr
.X_add_number
> 32767))
2191 as_bad (_("Immediate value not in 16 bit signed range: %ld"),
2192 out_insnp
->expr
.X_add_number
);
2193 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_UNSIGNED
2194 && (out_insnp
->expr
.X_add_number
< 0
2195 || out_insnp
->expr
.X_add_number
> 65535))
2196 as_bad (_("Immediate value not in 16 bit unsigned range: %ld"),
2197 out_insnp
->expr
.X_add_number
);
2199 out_insnp
->imm_oprnd_size
= 2;
2203 out_insnp
->imm_oprnd_size
= 4;
2207 BAD_CASE (out_insnp
->spec_reg
->reg_size
);
2211 /* If there was a relocation specified for the immediate
2212 expression (i.e. it had a PIC or TLS modifier) check that the
2213 size of the relocation matches the size specified by
2215 if (out_insnp
->reloc
!= BFD_RELOC_NONE
2216 && (cris_get_specified_reloc_size (out_insnp
->reloc
)
2217 != (unsigned int) out_insnp
->imm_oprnd_size
))
2218 as_bad (out_insnp
->reloc
== BFD_RELOC_CRIS_32_GD
2219 || out_insnp
->reloc
== BFD_RELOC_CRIS_32_TPREL
2220 || out_insnp
->reloc
== BFD_RELOC_CRIS_16_TPREL
2221 || out_insnp
->reloc
== BFD_RELOC_CRIS_32_IE
2222 ? _("TLS relocation size does not match operand size")
2223 : _("PIC relocation size does not match operand size"));
2225 else if (instruction
->op
== cris_muls_op
2226 || instruction
->op
== cris_mulu_op
)
2227 out_insnp
->insn_type
= CRIS_INSN_MUL
;
2233 /* Get a B, W, or D size modifier from the string pointed out by *cPP,
2234 which must point to a '.' in front of the modifier. On successful
2235 return, *cPP is advanced to the character following the size
2236 modifier, and is undefined otherwise.
2238 cPP Pointer to pointer to string starting
2239 with the size modifier.
2241 size_bitsp Pointer to variable to contain the size bits on
2244 Return 1 iff a correct size modifier is found, else 0. */
2247 get_bwd_size_modifier (char **cPP
, int *size_bitsp
)
2253 /* Consume the '.'. */
2277 /* Consume the size letter. */
2283 /* Get a B or W size modifier from the string pointed out by *cPP,
2284 which must point to a '.' in front of the modifier. On successful
2285 return, *cPP is advanced to the character following the size
2286 modifier, and is undefined otherwise.
2288 cPP Pointer to pointer to string starting
2289 with the size modifier.
2291 size_bitsp Pointer to variable to contain the size bits on
2294 Return 1 iff a correct size modifier is found, else 0. */
2297 get_bw_size_modifier (char **cPP
, int *size_bitsp
)
2303 /* Consume the '.'. */
2322 /* Consume the size letter. */
2328 /* Get a general register from the string pointed out by *cPP. The
2329 variable *cPP is advanced to the character following the general
2330 register name on a successful return, and has its initial position
2333 cPP Pointer to pointer to string, beginning with a general
2336 regnop Pointer to int containing the register number.
2338 Return 1 iff a correct general register designator is found,
2342 get_gen_reg (char **cPP
, int *regnop
)
2347 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2348 if (**cPP
== REGISTER_PREFIX_CHAR
)
2350 else if (demand_register_prefix
)
2357 /* "P" as in "PC"? Consume the "P". */
2360 if ((**cPP
== 'C' || **cPP
== 'c')
2361 && ! ISALNUM ((*cPP
)[1])
2362 /* Here's a little twist: For v32 and the compatibility mode,
2363 we only recognize PC as a register number if there's '+]'
2364 after. We don't consume that, but the presence can only be
2365 valid after a register in a post-increment context, which
2366 is also the only valid context for PC as a register for
2367 v32. Not that it's used very often, but saying "MOVE.D
2368 [PC+],R5" should remain valid. It's not supported for
2369 jump-type insns or other insns with no [Rn+] mode, though. */
2370 && ((cris_arch
!= arch_crisv32
2371 && cris_arch
!= arch_cris_common_v10_v32
)
2372 || ((*cPP
)[1] == '+' && (*cPP
)[2] == ']')))
2374 /* It's "PC": consume the "c" and we're done. */
2381 /* Like with PC, we recognize ACR, but only if it's *not* followed
2382 by '+', and only for v32. */
2385 if (cris_arch
!= arch_crisv32
2386 || ((*cPP
)[1] != 'c' && (*cPP
)[1] != 'C')
2387 || ((*cPP
)[2] != 'r' && (*cPP
)[2] != 'R')
2388 || ISALNUM ((*cPP
)[3])
2389 || (*cPP
)[3] == '+')
2397 /* Hopefully r[0-9] or r1[0-5]. Consume 'R' or 'r'. */
2400 if (ISDIGIT (**cPP
))
2402 /* It's r[0-9]. Consume and check the next digit. */
2403 *regnop
= **cPP
- '0';
2406 if (! ISALNUM (**cPP
))
2408 /* No more digits, we're done. */
2413 /* One more digit. Consume and add. */
2414 *regnop
= *regnop
* 10 + (**cPP
- '0');
2416 /* We need to check for a valid register number; Rn,
2417 0 <= n <= MAX_REG. */
2418 if (*regnop
<= MAX_REG
)
2420 /* Consume second digit. */
2430 /* "S" as in "SP"? Consume the "S". */
2432 if (**cPP
== 'P' || **cPP
== 'p')
2434 /* It's "SP": consume the "p" and we're done. */
2442 /* Just here to silence compilation warnings. */
2446 /* We get here if we fail. Restore the pointer. */
2451 /* Get a special register from the string pointed out by *cPP. The
2452 variable *cPP is advanced to the character following the special
2453 register name if one is found, and retains its original position
2456 cPP Pointer to pointer to string starting with a special register
2459 sregpp Pointer to Pointer to struct spec_reg, where a pointer to the
2460 register description will be stored.
2462 Return 1 iff a correct special register name is found. */
2465 get_spec_reg (char **cPP
, const struct cris_spec_reg
**sregpp
)
2469 char *name_begin
= *cPP
;
2471 const struct cris_spec_reg
*sregp
;
2473 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2474 if (*name_begin
== REGISTER_PREFIX_CHAR
)
2476 else if (demand_register_prefix
)
2479 /* Loop over all special registers. */
2480 for (sregp
= cris_spec_regs
; sregp
->name
!= NULL
; sregp
++)
2482 /* Start over from beginning of the supposed name. */
2486 while (*s2
!= '\0' && TOLOWER (*s1
) == *s2
)
2492 /* For a match, we must have consumed the name in the table, and we
2493 must be outside what could be part of a name. Assume here that a
2494 test for alphanumerics is sufficient for a name test. */
2495 if (*s2
== 0 && ! ISALNUM (*s1
)
2496 && cris_insn_ver_valid_for_arch (sregp
->applicable_version
,
2499 /* We have a match. Update the pointer and be done. */
2506 /* If we got here, we did not find any name. */
2510 /* Get a support register from the string pointed out by *cPP. The
2511 variable *cPP is advanced to the character following the support-
2512 register name if one is found, and retains its original position
2515 cPP Pointer to pointer to string starting with a support-register
2518 sregpp Pointer to int containing the register number.
2520 Return 1 iff a correct support-register name is found. */
2523 get_sup_reg (char **cPP
, int *regnop
)
2527 char *name_begin
= *cPP
;
2529 const struct cris_support_reg
*sregp
;
2531 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2532 if (*name_begin
== REGISTER_PREFIX_CHAR
)
2534 else if (demand_register_prefix
)
2537 /* Loop over all support-registers. */
2538 for (sregp
= cris_support_regs
; sregp
->name
!= NULL
; sregp
++)
2540 /* Start over from beginning of the supposed name. */
2544 while (*s2
!= '\0' && TOLOWER (*s1
) == *s2
)
2550 /* For a match, we must have consumed the name in the table, and we
2551 must be outside what could be part of a name. Assume here that a
2552 test for alphanumerics is sufficient for a name test. */
2553 if (*s2
== 0 && ! ISALNUM (*s1
))
2555 /* We have a match. Update the pointer and be done. */
2557 *regnop
= sregp
->number
;
2562 /* If we got here, we did not find any name. */
2566 /* Get an unprefixed or side-effect-prefix operand from the string pointed
2567 out by *cPP. The pointer *cPP is advanced to the character following
2568 the indirect operand if we have success, else it contains an undefined
2571 cPP Pointer to pointer to string beginning with the first
2572 character of the supposed operand.
2574 prefixp Pointer to structure containing an optional instruction
2577 is_autoincp Pointer to int indicating the indirect or autoincrement
2580 src_regnop Pointer to int containing the source register number in
2583 imm_foundp Pointer to an int indicating if an immediate expression
2586 imm_exprP Pointer to a structure containing an immediate
2587 expression, if success and if *imm_foundp is nonzero.
2589 Return 1 iff a correct indirect operand is found. */
2592 get_autoinc_prefix_or_indir_op (char **cPP
, struct cris_prefix
*prefixp
,
2593 int *is_autoincp
, int *src_regnop
,
2594 int *imm_foundp
, expressionS
*imm_exprP
)
2596 /* Assume there was no immediate mode expression. */
2601 /* So this operand is one of:
2603 Autoincrement: [rN+]
2604 Indexed with assign: [rN=rM+rO.S]
2605 Offset with assign: [rN=rM+I], [rN=rM+[rO].s], [rN=rM+[rO+].s]
2607 Either way, consume the '['. */
2610 /* Get the rN register. */
2611 if (! get_gen_reg (cPP
, src_regnop
))
2612 /* If there was no register, then this cannot match. */
2616 /* We got the register, now check the next character. */
2620 /* Indirect mode. We're done here. */
2621 prefixp
->kind
= PREFIX_NONE
;
2626 /* This must be an auto-increment mode, if there's a
2628 prefixp
->kind
= PREFIX_NONE
;
2631 /* We consume this character and break out to check the
2637 /* This must be indexed with assign, or offset with assign
2638 to match. Not supported for crisv32 or in
2639 compatibility mode. */
2640 if (cris_arch
== arch_crisv32
2641 || cris_arch
== arch_cris_common_v10_v32
)
2646 /* Either way, the next thing must be a register. */
2647 if (! get_gen_reg (cPP
, &prefixp
->base_reg_number
))
2648 /* No register, no match. */
2652 /* We've consumed "[rN=rM", so we must be looking at
2653 "+rO.s]" or "+I]", or "-I]", or "+[rO].s]" or
2657 int index_reg_number
;
2663 /* This must be [rx=ry+[rz].s] or
2664 [rx=ry+[rz+].s] or no match. We must be
2665 looking at rz after consuming the '['. */
2668 if (!get_gen_reg (cPP
, &index_reg_number
))
2671 prefixp
->kind
= PREFIX_BDAP
;
2673 = (BDAP_INDIR_OPCODE
2674 + (prefixp
->base_reg_number
<< 12)
2675 + index_reg_number
);
2679 /* We've seen "[rx=ry+[rz+" here, so now we
2680 know that there must be "].s]" left to
2683 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2686 /* If it wasn't autoincrement, we don't need to
2689 /* Check the next-to-last ']'. */
2695 /* Check the ".s" modifier. */
2696 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2699 prefixp
->opcode
|= size_bits
<< 4;
2701 /* Now we got [rx=ry+[rz+].s or [rx=ry+[rz].s.
2702 We break out to check the final ']'. */
2705 /* It wasn't an indirection. Check if it's a
2707 else if (get_gen_reg (cPP
, &index_reg_number
))
2711 /* Indexed with assign mode: "[rN+rM.S]". */
2712 prefixp
->kind
= PREFIX_BIAP
;
2714 = (BIAP_OPCODE
+ (index_reg_number
<< 12)
2715 + prefixp
->base_reg_number
/* << 0 */);
2717 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2718 /* Size missing, this isn't a match. */
2722 /* Size found, break out to check the
2724 prefixp
->opcode
|= size_bits
<< 4;
2728 /* Not a register. Then this must be "[rN+I]". */
2729 else if (cris_get_expression (cPP
, &prefixp
->expr
))
2731 /* We've got offset with assign mode. Fill
2732 in the blanks and break out to match the
2734 prefixp
->kind
= PREFIX_BDAP_IMM
;
2736 /* We tentatively put an opcode corresponding to
2737 a 32-bit operand here, although it may be
2738 relaxed when there's no relocation
2739 specifier for the operand. */
2741 = (BDAP_INDIR_OPCODE
2742 | (prefixp
->base_reg_number
<< 12)
2743 | (AUTOINCR_BIT
<< 8)
2745 | REG_PC
/* << 0 */);
2747 /* This can have a PIC suffix, specifying reloc
2749 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
2751 unsigned int relocsize
;
2753 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
,
2756 /* Tweak the size of the immediate operand
2757 in the prefix opcode if it isn't what we
2760 = cris_get_specified_reloc_size (prefixp
->reloc
);
2763 = ((prefixp
->opcode
& ~(3 << 4))
2764 | ((relocsize
>> 1) << 4));
2769 /* Neither register nor expression found, so
2770 this can't be a match. */
2773 /* Not "[rN+" but perhaps "[rN-"? */
2774 else if (**cPP
== '-')
2776 /* We must have an offset with assign mode. */
2777 if (! cris_get_expression (cPP
, &prefixp
->expr
))
2778 /* No expression, no match. */
2782 /* We've got offset with assign mode. Fill
2783 in the blanks and break out to match the
2786 Note that we don't allow a relocation
2787 suffix for an operand with a minus
2789 prefixp
->kind
= PREFIX_BDAP_IMM
;
2794 /* Neither '+' nor '-' after "[rN=rM". Lose. */
2798 /* Neither ']' nor '+' nor '=' after "[rN". Lose. */
2803 /* When we get here, we have a match and will just check the closing
2804 ']'. We can still fail though. */
2809 /* Don't forget to consume the final ']'.
2810 Then return in glory. */
2815 /* No indirection. Perhaps a constant? */
2816 else if (cris_get_expression (cPP
, imm_exprP
))
2818 /* Expression found, this is immediate mode. */
2819 prefixp
->kind
= PREFIX_NONE
;
2821 *src_regnop
= REG_PC
;
2824 /* This can have a PIC suffix, specifying reloc type to use. The
2825 caller must check that the reloc size matches the operand size. */
2826 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
2827 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
, imm_exprP
);
2832 /* No luck today. */
2836 /* This function gets an indirect operand in a three-address operand
2837 combination from the string pointed out by *cPP. The pointer *cPP is
2838 advanced to the character following the indirect operand on success, or
2839 has an unspecified value on failure.
2841 cPP Pointer to pointer to string beginning
2844 prefixp Pointer to structure containing an
2847 Returns 1 iff a correct indirect operand is found. */
2850 get_3op_or_dip_prefix_op (char **cPP
, struct cris_prefix
*prefixp
)
2855 /* We must have a '[' or it's a clean failure. */
2858 /* Eat the first '['. */
2863 /* A second '[', so this must be double-indirect mode. */
2865 prefixp
->kind
= PREFIX_DIP
;
2866 prefixp
->opcode
= DIP_OPCODE
;
2868 /* Get the register or fail entirely. */
2869 if (! get_gen_reg (cPP
, ®_number
))
2873 prefixp
->opcode
|= reg_number
/* << 0 */ ;
2876 /* Since we found a '+', this must be double-indirect
2877 autoincrement mode. */
2879 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2882 /* There's nothing particular to do, if this was a
2883 double-indirect *without* autoincrement. */
2886 /* Check the first ']'. The second one is checked at the end. */
2890 /* Eat the first ']', so we'll be looking at a second ']'. */
2893 /* No second '['. Then we should have a register here, making
2895 else if (get_gen_reg (cPP
, &prefixp
->base_reg_number
))
2897 /* This must be indexed or offset mode: "[rN+I]" or
2898 "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]". */
2901 int index_reg_number
;
2907 /* This is "[rx+["... Expect a register next. */
2911 if (!get_gen_reg (cPP
, &index_reg_number
))
2914 prefixp
->kind
= PREFIX_BDAP
;
2916 = (BDAP_INDIR_OPCODE
2917 + (prefixp
->base_reg_number
<< 12)
2918 + index_reg_number
);
2920 /* We've seen "[rx+[ry", so check if this is
2924 /* Yep, now at "[rx+[ry+". */
2926 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2928 /* If it wasn't autoincrement, we don't need to
2931 /* Check a first closing ']': "[rx+[ry]" or
2937 /* Now expect a size modifier ".S". */
2938 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2941 prefixp
->opcode
|= size_bits
<< 4;
2943 /* Ok, all interesting stuff has been seen:
2944 "[rx+[ry+].S" or "[rx+[ry].S". We only need to
2945 expect a final ']', which we'll do in a common
2948 /* Seen "[rN+", but not a '[', so check if we have a
2950 else if (get_gen_reg (cPP
, &index_reg_number
))
2952 /* This is indexed mode: "[rN+rM.S]" or
2955 prefixp
->kind
= PREFIX_BIAP
;
2958 | prefixp
->base_reg_number
/* << 0 */
2959 | (index_reg_number
<< 12));
2961 /* Consume the ".S". */
2962 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2963 /* Missing size, so fail. */
2966 /* Size found. Add that piece and drop down to
2967 the common checking of the closing ']'. */
2968 prefixp
->opcode
|= size_bits
<< 4;
2970 /* Seen "[rN+", but not a '[' or a register, so then
2971 it must be a constant "I".
2973 As a quality of implementation improvement, we check for a
2974 closing ']', like in an erroneous "[rN+]". If we don't,
2975 the expression parser will emit a confusing "bad
2976 expression" when it sees the ']', probably because it
2977 doesn't like seeing no expression. */
2978 else if (**cPP
!= ']' && cris_get_expression (cPP
, &prefixp
->expr
))
2980 /* Expression found, so fill in the bits of offset
2981 mode and drop down to check the closing ']'. */
2982 prefixp
->kind
= PREFIX_BDAP_IMM
;
2984 /* We tentatively put an opcode corresponding to a 32-bit
2985 operand here, although it may be relaxed when there's no
2986 PIC specifier for the operand. */
2988 = (BDAP_INDIR_OPCODE
2989 | (prefixp
->base_reg_number
<< 12)
2990 | (AUTOINCR_BIT
<< 8)
2992 | REG_PC
/* << 0 */);
2994 /* This can have a PIC suffix, specifying reloc type to use. */
2995 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
2997 unsigned int relocsize
;
2999 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
, &prefixp
->expr
);
3001 /* Tweak the size of the immediate operand in the prefix
3002 opcode if it isn't what we set. */
3003 relocsize
= cris_get_specified_reloc_size (prefixp
->reloc
);
3006 = ((prefixp
->opcode
& ~(3 << 4))
3007 | ((relocsize
>> 1) << 4));
3011 /* Nothing valid here: lose. */
3014 /* Seen "[rN" but no '+', so check if it's a '-'. */
3015 else if (**cPP
== '-')
3017 /* Yep, we must have offset mode. */
3018 if (! cris_get_expression (cPP
, &prefixp
->expr
))
3019 /* No expression, so we lose. */
3023 /* Expression found to make this offset mode, so
3024 fill those bits and drop down to check the
3027 Note that we don't allow a PIC suffix for
3028 an operand with a minus sign like this. */
3029 prefixp
->kind
= PREFIX_BDAP_IMM
;
3034 /* We've seen "[rN", but not '+' or '-'; rather a ']'.
3035 Hmm. Normally this is a simple indirect mode that we
3036 shouldn't match, but if we expect ']', then we have a
3037 zero offset, so it can be a three-address-operand,
3038 like "[rN],rO,rP", thus offset mode.
3040 Don't eat the ']', that will be done in the closing
3042 prefixp
->expr
.X_op
= O_constant
;
3043 prefixp
->expr
.X_add_number
= 0;
3044 prefixp
->expr
.X_add_symbol
= NULL
;
3045 prefixp
->expr
.X_op_symbol
= NULL
;
3046 prefixp
->kind
= PREFIX_BDAP_IMM
;
3049 /* A '[', but no second '[', and no register. Check if we
3050 have an expression, making this "[I]" for a double-indirect
3052 else if (cris_get_expression (cPP
, &prefixp
->expr
))
3054 /* Expression found, the so called absolute mode for a
3055 double-indirect prefix on PC. */
3056 prefixp
->kind
= PREFIX_DIP
;
3057 prefixp
->opcode
= DIP_OPCODE
| (AUTOINCR_BIT
<< 8) | REG_PC
;
3058 prefixp
->reloc
= BFD_RELOC_32
;
3060 /* For :GD and :IE, it makes sense to have TLS specifiers here. */
3061 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
3062 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
, &prefixp
->expr
);
3065 /* Neither '[' nor register nor expression. We lose. */
3068 /* We get here as a closing ceremony to a successful match. We just
3069 need to check the closing ']'. */
3071 /* Oops. Close but no air-polluter. */
3074 /* Don't forget to consume that ']', before returning in glory. */
3079 /* Get an expression from the string pointed out by *cPP.
3080 The pointer *cPP is advanced to the character following the expression
3081 on a success, or retains its original value otherwise.
3083 cPP Pointer to pointer to string beginning with the expression.
3085 exprP Pointer to structure containing the expression.
3087 Return 1 iff a correct expression is found. */
3090 cris_get_expression (char **cPP
, expressionS
*exprP
)
3092 char *saved_input_line_pointer
;
3094 /* The "expression" function expects to find an expression at the
3095 global variable input_line_pointer, so we have to save it to give
3096 the impression that we don't fiddle with global variables. */
3097 saved_input_line_pointer
= input_line_pointer
;
3098 input_line_pointer
= *cPP
;
3100 /* Avoid a common error, confusing addressing modes. Beware that the
3101 call to expression below does not signal that error; it treats []
3102 as parentheses, unless #define NEED_INDEX_OPERATOR in which case it
3103 gives them other confusing semantics rather than plain outlawing
3104 them, which is what we want. */
3105 if (*input_line_pointer
== '[')
3107 input_line_pointer
= saved_input_line_pointer
;
3112 if (exprP
->X_op
== O_illegal
|| exprP
->X_op
== O_absent
)
3114 input_line_pointer
= saved_input_line_pointer
;
3118 /* Everything seems to be fine, just restore the global
3119 input_line_pointer and say we're successful. */
3120 *cPP
= input_line_pointer
;
3121 input_line_pointer
= saved_input_line_pointer
;
3125 /* Get a sequence of flag characters from *spp. The pointer *cPP is
3126 advanced to the character following the expression. The flag
3127 characters are consecutive, no commas or spaces.
3129 cPP Pointer to pointer to string beginning with the expression.
3131 flagp Pointer to int to return the flags expression.
3133 Return 1 iff a correct flags expression is found. */
3136 get_flags (char **cPP
, int *flagsp
)
3144 if (! cris_insn_ver_valid_for_arch (cris_ver_v0_3
,
3152 if (! cris_insn_ver_valid_for_arch (cris_ver_v8_10
,
3160 if (! cris_insn_ver_valid_for_arch (cris_ver_v0_3
,
3168 if (! cris_insn_ver_valid_for_arch (cris_ver_v8_10
,
3176 if (! cris_insn_ver_valid_for_arch (cris_ver_v32p
,
3184 if (! cris_insn_ver_valid_for_arch (cris_ver_v32p
,
3221 /* We consider this successful if we stop at a comma or
3222 whitespace. Anything else, and we consider it a failure. */
3225 && ! ISSPACE (**cPP
))
3231 /* Don't forget to consume each flag character. */
3236 /* Generate code and fixes for a BDAP prefix.
3237 For v32, this handles ADDOQ because thankfully the opcodes are the
3240 base_regno Int containing the base register number.
3242 exprP Pointer to structure containing the offset expression. */
3245 gen_bdap (int base_regno
, expressionS
*exprP
)
3247 unsigned int opcode
;
3250 /* Put out the prefix opcode; assume quick immediate mode at first. */
3251 opcode
= BDAP_QUICK_OPCODE
| (base_regno
<< 12);
3252 opcodep
= cris_insn_first_word_frag ();
3253 md_number_to_chars (opcodep
, opcode
, 2);
3255 if (exprP
->X_op
== O_constant
)
3257 /* We have an absolute expression that we know the size of right
3262 value
= exprP
->X_add_number
;
3263 if (value
< -32768 || value
> 32767)
3264 /* Outside range for a "word", make it a dword. */
3267 /* Assume "word" size. */
3270 /* If this is a signed-byte value, we can fit it into the prefix
3272 if (value
>= -128 && value
<= 127)
3276 /* This is a word or dword displacement, which will be put in a
3277 word or dword after the prefix. */
3280 opcodep
[0] = BDAP_PC_LOW
+ (size
<< 4);
3282 opcodep
[1] |= BDAP_INCR_HIGH
;
3283 p
= frag_more (1 << size
);
3284 md_number_to_chars (p
, value
, 1 << size
);
3289 /* Handle complex expressions. */
3291 = SIMPLE_EXPR (exprP
) ? exprP
->X_add_number
: 0;
3293 = (SIMPLE_EXPR (exprP
)
3294 ? exprP
->X_add_symbol
: make_expr_symbol (exprP
));
3296 /* The expression is not defined yet but may become absolute. We
3297 make it a relocation to be relaxed. */
3298 frag_var (rs_machine_dependent
, 4, 0,
3299 ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_UNDF
),
3300 sym
, addvalue
, opcodep
);
3304 /* Encode a branch displacement in the range -256..254 into the form used
3305 by CRIS conditional branch instructions.
3307 offset The displacement value in bytes. */
3310 branch_disp (int offset
)
3314 /* Adjust all short branch offsets here. */
3315 if (cris_arch
== arch_crisv32
|| cris_arch
== arch_cris_common_v10_v32
)
3318 disp
= offset
& 0xFE;
3326 /* Generate code and fixes for a 32-bit conditional branch instruction
3327 created by "extending" an existing 8-bit branch instruction.
3329 opcodep Pointer to the word containing the original 8-bit branch
3332 writep Pointer to "extension area" following the first instruction
3335 fragP Pointer to the frag containing the instruction.
3337 add_symP, Parts of the destination address expression.
3342 gen_cond_branch_32 (char *opcodep
, char *writep
, fragS
*fragP
,
3343 symbolS
*add_symP
, symbolS
*sub_symP
, long int add_num
)
3349 if (cris_arch
== arch_crisv32
)
3351 nop_opcode
= NOP_OPCODE_V32
;
3353 branch_offset
= -2 - 8;
3357 nop_opcode
= NOP_OPCODE
;
3359 branch_offset
= -2 - 8;
3363 nop_opcode
= NOP_OPCODE
;
3365 branch_offset
= -2 - 6;
3368 /* We should never get here for compatibility mode. */
3369 if (cris_arch
== arch_cris_common_v10_v32
)
3370 as_fatal (_("Calling gen_cond_branch_32 for .arch common_v10_v32\n"));
3372 if (warn_for_branch_expansion
)
3373 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3374 _("32-bit conditional branch generated"));
3376 /* Here, writep points to what will be opcodep + 2. First, we change
3377 the actual branch in opcodep[0] and opcodep[1], so that in the
3378 final insn, it will look like:
3381 This means we don't have to worry about changing the opcode or
3382 messing with the delay-slot instruction. So, we move it to last in
3383 the "extended" branch, and just change the displacement. Admittedly,
3384 it's not the optimal extended construct, but we should get this
3385 rarely enough that it shouldn't matter. */
3387 writep
[opc_offset
] = branch_disp (branch_offset
);
3388 writep
[opc_offset
+ 1] = opcodep
[1];
3390 /* Then, we change the branch to an unconditional branch over the
3391 extended part, to the new location of the Bcc:
3395 Note that these two writes are to currently different locations,
3398 md_number_to_chars (opcodep
, BA_QUICK_OPCODE
3399 + (cris_arch
== arch_crisv32
? 12 : (pic
? 10 : 8)),
3401 md_number_to_chars (writep
, nop_opcode
, 2);
3403 /* Then the extended thing, the 32-bit jump insn.
3404 opcodep+4: JUMP [PC+]
3405 or, in the PIC case,
3406 opcodep+4: MOVE [PC=PC+N],P0. */
3408 md_number_to_chars (writep
+ 2,
3409 cris_arch
== arch_crisv32
3411 : (pic
? MOVE_PC_INCR_OPCODE_PREFIX
3412 : JUMP_PC_INCR_OPCODE
), 2);
3414 /* We have to fill in the actual value too.
3416 This is most probably an expression, but we can cope with an absolute
3417 value too. FIXME: Testcase needed with and without pic. */
3419 if (add_symP
== NULL
&& sub_symP
== NULL
)
3421 /* An absolute address. */
3422 if (pic
|| cris_arch
== arch_crisv32
)
3423 fix_new (fragP
, writep
+ 4 - fragP
->fr_literal
, 4,
3424 section_symbol (absolute_section
),
3426 + (cris_arch
== arch_crisv32
? 6 : 0),
3427 1, BFD_RELOC_32_PCREL
);
3429 md_number_to_chars (writep
+ 4, add_num
, 4);
3433 if (sub_symP
!= NULL
)
3434 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3435 _("Complex expression not supported"));
3437 /* Not absolute, we have to make it a frag for later evaluation. */
3438 fix_new (fragP
, writep
+ 4 - fragP
->fr_literal
, 4, add_symP
,
3439 add_num
+ (cris_arch
== arch_crisv32
? 6 : 0),
3440 pic
|| cris_arch
== arch_crisv32
? 1 : 0,
3441 pic
|| cris_arch
== arch_crisv32
3442 ? BFD_RELOC_32_PCREL
: BFD_RELOC_32
);
3445 if (cris_arch
== arch_crisv32
)
3446 /* Follow it with a "NOP" for CRISv32. */
3447 md_number_to_chars (writep
+ 8, NOP_OPCODE_V32
, 2);
3449 /* ...and the rest of the move-opcode for pre-v32 PIC. */
3450 md_number_to_chars (writep
+ 8, MOVE_PC_INCR_OPCODE_SUFFIX
, 2);
3453 /* Get the size of an immediate-reloc in bytes. Only valid for
3454 specified relocs (TLS, PIC). */
3457 cris_get_specified_reloc_size (bfd_reloc_code_real_type reloc
)
3460 reloc
== BFD_RELOC_CRIS_16_GOTPLT
3461 || reloc
== BFD_RELOC_CRIS_16_GOT
3462 || reloc
== BFD_RELOC_CRIS_16_GOT_GD
3463 || reloc
== BFD_RELOC_CRIS_16_DTPREL
3464 || reloc
== BFD_RELOC_CRIS_16_GOT_TPREL
3465 || reloc
== BFD_RELOC_CRIS_16_TPREL
3469 /* Store a reloc type at *RELOCP corresponding to the PIC suffix at *CPP.
3470 Adjust *EXPRP with any addend found after the PIC suffix. */
3473 cris_get_reloc_suffix (char **cPP
, bfd_reloc_code_real_type
*relocp
,
3478 expressionS const_expr
;
3480 const struct pic_suffixes_struct
3482 const char *const suffix
;
3484 bfd_reloc_code_real_type reloc
;
3490 #define PICMAP(s, r) {s, sizeof (s) - 1, r, TRUE, FALSE}
3491 #define PICTLSMAP(s, r) {s, sizeof (s) - 1, r, TRUE, TRUE}
3492 #define TLSMAP(s, r) {s, sizeof (s) - 1, r, FALSE, TRUE}
3493 /* Keep this in order with longest unambiguous prefix first. */
3494 PICMAP ("GOTPLT16", BFD_RELOC_CRIS_16_GOTPLT
),
3495 PICMAP ("GOTPLT", BFD_RELOC_CRIS_32_GOTPLT
),
3496 PICMAP ("PLTG", BFD_RELOC_CRIS_32_PLT_GOTREL
),
3497 PICMAP ("PLT", BFD_RELOC_CRIS_32_PLT_PCREL
),
3498 PICMAP ("GOTOFF", BFD_RELOC_CRIS_32_GOTREL
),
3499 PICMAP ("GOT16", BFD_RELOC_CRIS_16_GOT
),
3500 PICMAP ("GOT", BFD_RELOC_CRIS_32_GOT
),
3501 PICTLSMAP ("GDGOTREL16", BFD_RELOC_CRIS_16_GOT_GD
),
3502 PICTLSMAP ("GDGOTREL", BFD_RELOC_CRIS_32_GOT_GD
),
3503 TLSMAP ("GD", BFD_RELOC_CRIS_32_GD
),
3504 PICTLSMAP ("DTPREL16", BFD_RELOC_CRIS_16_DTPREL
),
3505 PICTLSMAP ("DTPREL", BFD_RELOC_CRIS_32_DTPREL
),
3506 TLSMAP ("IE", BFD_RELOC_CRIS_32_IE
),
3507 PICTLSMAP ("TPOFFGOT16", BFD_RELOC_CRIS_16_GOT_TPREL
),
3508 PICTLSMAP ("TPOFFGOT", BFD_RELOC_CRIS_32_GOT_TPREL
),
3509 TLSMAP ("TPOFF16", BFD_RELOC_CRIS_16_TPREL
),
3510 TLSMAP ("TPOFF", BFD_RELOC_CRIS_32_TPREL
)
3513 /* We've already seen the ':', so consume it. */
3516 for (i
= 0; i
< sizeof (pic_suffixes
)/sizeof (pic_suffixes
[0]); i
++)
3518 if (strncmp (s
, pic_suffixes
[i
].suffix
, pic_suffixes
[i
].len
) == 0
3519 && ! is_part_of_name (s
[pic_suffixes
[i
].len
])
3520 /* PIC and non-PIC relocations are exclusive. */
3521 && (pic
!= 0) == (pic_suffixes
[i
].pic_p
!= 0)
3522 /* But TLS can be active for non-TLS relocations too. */
3523 && (pic_suffixes
[i
].tls_p
== 0 || tls
))
3525 /* We have a match. Consume the suffix and set the relocation
3527 s
+= pic_suffixes
[i
].len
;
3529 /* There can be a constant term appended. If so, we will add it
3531 if (*s
== '+' || *s
== '-')
3533 if (! cris_get_expression (&s
, &const_expr
))
3534 /* There was some kind of syntax error. Bail out. */
3537 /* Allow complex expressions as the constant part. It still
3538 has to be an assembly-time constant or there will be an
3539 error emitting the reloc. This makes the PIC qualifiers
3540 idempotent; foo:GOTOFF+32 == foo+32:GOTOFF. The former we
3541 recognize here; the latter is parsed in the incoming
3543 exprP
->X_add_symbol
= make_expr_symbol (exprP
);
3544 exprP
->X_op
= O_add
;
3545 exprP
->X_add_number
= 0;
3546 exprP
->X_op_symbol
= make_expr_symbol (&const_expr
);
3549 *relocp
= pic_suffixes
[i
].reloc
;
3555 /* No match. Don't consume anything; fall back and there will be a
3559 /* This *could* have been:
3561 Turn a string in input_line_pointer into a floating point constant
3562 of type TYPE, and store the appropriate bytes in *LITP. The number
3563 of LITTLENUMS emitted is stored in *SIZEP.
3565 type A character from FLTCHARS that describes what kind of
3566 floating-point number is wanted.
3568 litp A pointer to an array that the result should be stored in.
3570 sizep A pointer to an integer where the size of the result is stored.
3572 But we don't support floating point constants in assembly code *at all*,
3573 since it's suboptimal and just opens up bug opportunities. GCC emits
3574 the bit patterns as hex. All we could do here is to emit what GCC
3575 would have done in the first place. *Nobody* writes floating-point
3576 code as assembly code, but if they do, they should be able enough to
3577 find out the correct bit patterns and use them. */
3580 md_atof (int type ATTRIBUTE_UNUSED
, char *litp ATTRIBUTE_UNUSED
,
3581 int *sizep ATTRIBUTE_UNUSED
)
3583 /* FIXME: Is this function mentioned in the internals.texi manual? If
3585 return _("Bad call to md_atof () - floating point formats are not supported");
3588 /* Turn a number as a fixS * into a series of bytes that represents the
3589 number on the target machine. The purpose of this procedure is the
3590 same as that of md_number_to_chars but this procedure is supposed to
3591 handle general bit field fixes and machine-dependent fixups.
3593 bufp Pointer to an array where the result should be stored.
3595 val The value to store.
3597 n The number of bytes in "val" that should be stored.
3599 fixP The fix to be applied to the bit field starting at bufp.
3601 seg The segment containing this number. */
3604 cris_number_to_imm (char *bufp
, long val
, int n
, fixS
*fixP
, segT seg
)
3611 /* We put the relative "vma" for the other segment for inter-segment
3612 relocations in the object data to stay binary "compatible" (with an
3613 uninteresting old version) for the relocation.
3614 Maybe delete some day. */
3616 && (sym_seg
= S_GET_SEGMENT (fixP
->fx_addsy
)) != seg
)
3617 val
+= sym_seg
->vma
;
3619 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3620 switch (fixP
->fx_r_type
)
3622 /* These must be fully resolved when getting here. */
3623 case BFD_RELOC_16_PCREL
:
3624 case BFD_RELOC_8_PCREL
:
3625 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3626 _("PC-relative relocation must be trivially resolved"));
3631 /* Only use the computed value for old-arch binaries. For all
3632 others, where we're going to output a relocation, put 0 in the
3634 if (cris_arch
!= arch_cris_any_v0_v10
3635 && (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
))
3638 switch (fixP
->fx_r_type
)
3640 /* Ditto here, we put the addend into the object code as
3641 well as the reloc addend. Keep it that way for now, to simplify
3642 regression tests on the object file contents. FIXME: Seems
3643 uninteresting now that we have a test suite. */
3645 case BFD_RELOC_CRIS_32_GOT_GD
:
3646 case BFD_RELOC_CRIS_16_GOT_GD
:
3647 case BFD_RELOC_CRIS_32_GD
:
3648 case BFD_RELOC_CRIS_32_IE
:
3649 case BFD_RELOC_CRIS_32_DTPREL
:
3650 case BFD_RELOC_CRIS_16_DTPREL
:
3651 case BFD_RELOC_CRIS_32_GOT_TPREL
:
3652 case BFD_RELOC_CRIS_16_GOT_TPREL
:
3653 case BFD_RELOC_CRIS_32_TPREL
:
3654 case BFD_RELOC_CRIS_16_TPREL
:
3655 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3656 if (IS_ELF
&& fixP
->fx_addsy
!= NULL
)
3657 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3661 case BFD_RELOC_CRIS_16_GOT
:
3662 case BFD_RELOC_CRIS_32_GOT
:
3663 case BFD_RELOC_CRIS_32_GOTREL
:
3664 case BFD_RELOC_CRIS_16_GOTPLT
:
3665 case BFD_RELOC_CRIS_32_GOTPLT
:
3666 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
3667 case BFD_RELOC_CRIS_32_PLT_PCREL
:
3668 /* We don't want to put in any kind of non-zero bits in the data
3669 being relocated for these. */
3670 md_number_to_chars (bufp
, 0, n
);
3673 case BFD_RELOC_32_PCREL
:
3674 /* If this one isn't fully resolved, we don't want to put non-zero
3676 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3681 /* No use having warnings here, since most hosts have a 32-bit type
3682 for "long" (which will probably change soon, now that I wrote
3684 bufp
[3] = (val
>> 24) & 0xFF;
3685 bufp
[2] = (val
>> 16) & 0xFF;
3686 bufp
[1] = (val
>> 8) & 0xFF;
3687 bufp
[0] = val
& 0xFF;
3690 /* FIXME: The 16 and 8-bit cases should have a way to check
3691 whether a signed or unsigned (or any signedness) number is
3695 case BFD_RELOC_16_PCREL
:
3696 if (val
> 0xffff || val
< -32768)
3697 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3698 _("Value not in 16 bit range: %ld"), val
);
3699 bufp
[1] = (val
>> 8) & 0xFF;
3700 bufp
[0] = val
& 0xFF;
3703 case BFD_RELOC_CRIS_SIGNED_16
:
3704 if (val
> 32767 || val
< -32768)
3705 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3706 _("Value not in 16 bit signed range: %ld"), val
);
3707 bufp
[1] = (val
>> 8) & 0xFF;
3708 bufp
[0] = val
& 0xFF;
3712 case BFD_RELOC_8_PCREL
:
3713 if (val
> 255 || val
< -128)
3714 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("Value not in 8 bit range: %ld"), val
);
3715 bufp
[0] = val
& 0xFF;
3718 case BFD_RELOC_CRIS_SIGNED_8
:
3719 if (val
> 127 || val
< -128)
3720 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3721 _("Value not in 8 bit signed range: %ld"), val
);
3722 bufp
[0] = val
& 0xFF;
3725 case BFD_RELOC_CRIS_LAPCQ_OFFSET
:
3726 /* FIXME: Test-cases for out-of-range values. Probably also need
3727 to use as_bad_where. */
3728 case BFD_RELOC_CRIS_UNSIGNED_4
:
3729 if (val
> 15 || val
< 0)
3730 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3731 _("Value not in 4 bit unsigned range: %ld"), val
);
3732 bufp
[0] |= val
& 0x0F;
3735 case BFD_RELOC_CRIS_UNSIGNED_5
:
3736 if (val
> 31 || val
< 0)
3737 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3738 _("Value not in 5 bit unsigned range: %ld"), val
);
3739 bufp
[0] |= val
& 0x1F;
3742 case BFD_RELOC_CRIS_SIGNED_6
:
3743 if (val
> 31 || val
< -32)
3744 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3745 _("Value not in 6 bit range: %ld"), val
);
3746 bufp
[0] |= val
& 0x3F;
3749 case BFD_RELOC_CRIS_UNSIGNED_6
:
3750 if (val
> 63 || val
< 0)
3751 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3752 _("Value not in 6 bit unsigned range: %ld"), val
);
3753 bufp
[0] |= val
& 0x3F;
3756 case BFD_RELOC_CRIS_BDISP8
:
3757 bufp
[0] = branch_disp (val
);
3760 case BFD_RELOC_NONE
:
3761 /* May actually happen automatically. For example at broken
3762 words, if the word turns out not to be broken.
3763 FIXME: When? Which testcase? */
3764 if (! fixP
->fx_addsy
)
3765 md_number_to_chars (bufp
, val
, n
);
3768 case BFD_RELOC_VTABLE_INHERIT
:
3769 /* This borrowed from tc-ppc.c on a whim. */
3771 && !S_IS_DEFINED (fixP
->fx_addsy
)
3772 && !S_IS_WEAK (fixP
->fx_addsy
))
3773 S_SET_WEAK (fixP
->fx_addsy
);
3776 case BFD_RELOC_VTABLE_ENTRY
:
3781 BAD_CASE (fixP
->fx_r_type
);
3785 /* Processes machine-dependent command line options. Called once for
3786 each option on the command line that the machine-independent part of
3787 GAS does not understand. */
3790 md_parse_option (int arg
, char *argp ATTRIBUTE_UNUSED
)
3796 printf (_("Please use --help to see usage and options for this assembler.\n"));
3797 md_show_usage (stdout
);
3798 exit (EXIT_SUCCESS
);
3801 warn_for_branch_expansion
= 1;
3805 demand_register_prefix
= TRUE
;
3807 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
)
3808 as_bad (_("--no-underscore is invalid with a.out format"));
3810 symbols_have_leading_underscore
= FALSE
;
3814 demand_register_prefix
= FALSE
;
3815 symbols_have_leading_underscore
= TRUE
;
3819 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
)
3820 as_bad (_("--pic is invalid for this object format"));
3822 if (cris_arch
!= arch_crisv32
)
3823 md_long_jump_size
= cris_any_v0_v10_long_jump_size_pic
;
3825 md_long_jump_size
= crisv32_long_jump_size
;
3831 enum cris_archs argarch
= cris_arch_from_string (&str
);
3833 if (argarch
== arch_cris_unknown
)
3834 as_bad (_("invalid <arch> in --march=<arch>: %s"), argp
);
3836 cris_arch
= argarch
;
3838 if (argarch
== arch_crisv32
)
3840 err_for_dangerous_mul_placement
= 0;
3841 md_long_jump_size
= crisv32_long_jump_size
;
3846 md_long_jump_size
= cris_any_v0_v10_long_jump_size_pic
;
3848 md_long_jump_size
= cris_any_v0_v10_long_jump_size
;
3853 case OPTION_MULBUG_ABORT_OFF
:
3854 err_for_dangerous_mul_placement
= 0;
3857 case OPTION_MULBUG_ABORT_ON
:
3858 err_for_dangerous_mul_placement
= 1;
3868 /* Round up a section size to the appropriate boundary. */
3870 md_section_align (segT segment
, valueT size
)
3872 /* Round all sects to multiple of 4, except the bss section, which
3873 we'll round to word-size.
3875 FIXME: Check if this really matters. All sections should be
3876 rounded up, and all sections should (optionally) be assumed to be
3877 dword-aligned, it's just that there is actual usage of linking to a
3879 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
)
3881 if (segment
== bss_section
)
3882 return (size
+ 1) & ~1;
3883 return (size
+ 3) & ~3;
3887 /* FIXME: Is this wanted? It matches the testsuite, but that's not
3888 really a valid reason. */
3889 if (segment
== text_section
)
3890 return (size
+ 3) & ~3;
3896 /* Generate a machine-dependent relocation. */
3898 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixP
)
3901 bfd_reloc_code_real_type code
;
3903 switch (fixP
->fx_r_type
)
3905 case BFD_RELOC_CRIS_SIGNED_8
:
3909 case BFD_RELOC_CRIS_SIGNED_16
:
3910 code
= BFD_RELOC_16
;
3913 case BFD_RELOC_CRIS_16_GOT
:
3914 case BFD_RELOC_CRIS_32_GOT
:
3915 case BFD_RELOC_CRIS_16_GOTPLT
:
3916 case BFD_RELOC_CRIS_32_GOTPLT
:
3917 case BFD_RELOC_CRIS_32_GOTREL
:
3918 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
3919 case BFD_RELOC_CRIS_32_PLT_PCREL
:
3921 case BFD_RELOC_32_PCREL
:
3924 case BFD_RELOC_VTABLE_INHERIT
:
3925 case BFD_RELOC_VTABLE_ENTRY
:
3926 case BFD_RELOC_CRIS_UNSIGNED_8
:
3927 case BFD_RELOC_CRIS_UNSIGNED_16
:
3928 case BFD_RELOC_CRIS_LAPCQ_OFFSET
:
3929 case BFD_RELOC_CRIS_32_GOT_GD
:
3930 case BFD_RELOC_CRIS_16_GOT_GD
:
3931 case BFD_RELOC_CRIS_32_GD
:
3932 case BFD_RELOC_CRIS_32_IE
:
3933 case BFD_RELOC_CRIS_32_DTPREL
:
3934 case BFD_RELOC_CRIS_16_DTPREL
:
3935 case BFD_RELOC_CRIS_32_GOT_TPREL
:
3936 case BFD_RELOC_CRIS_16_GOT_TPREL
:
3937 case BFD_RELOC_CRIS_32_TPREL
:
3938 case BFD_RELOC_CRIS_16_TPREL
:
3939 code
= fixP
->fx_r_type
;
3942 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3943 _("Semantics error. This type of operand can not be relocated, it must be an assembly-time constant"));
3947 relP
= (arelent
*) xmalloc (sizeof (arelent
));
3948 gas_assert (relP
!= 0);
3949 relP
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
3950 *relP
->sym_ptr_ptr
= symbol_get_bfdsym (fixP
->fx_addsy
);
3951 relP
->address
= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
3953 relP
->addend
= fixP
->fx_offset
;
3955 /* This is the standard place for KLUDGEs to work around bugs in
3956 bfd_install_relocation (first such note in the documentation
3957 appears with binutils-2.8).
3959 That function bfd_install_relocation does the wrong thing with
3960 putting stuff into the addend of a reloc (it should stay out) for a
3961 weak symbol. The really bad thing is that it adds the
3962 "segment-relative offset" of the symbol into the reloc. In this
3963 case, the reloc should instead be relative to the symbol with no
3964 other offset than the assembly code shows; and since the symbol is
3965 weak, any local definition should be ignored until link time (or
3967 To wit: weaksym+42 should be weaksym+42 in the reloc,
3968 not weaksym+(offset_from_segment_of_local_weaksym_definition)
3970 To "work around" this, we subtract the segment-relative offset of
3971 "known" weak symbols. This evens out the extra offset.
3973 That happens for a.out but not for ELF, since for ELF,
3974 bfd_install_relocation uses the "special function" field of the
3975 howto, and does not execute the code that needs to be undone. */
3977 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
3978 && fixP
->fx_addsy
&& S_IS_WEAK (fixP
->fx_addsy
)
3979 && ! bfd_is_und_section (S_GET_SEGMENT (fixP
->fx_addsy
)))
3981 relP
->addend
-= S_GET_VALUE (fixP
->fx_addsy
);
3984 relP
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
3989 name
= S_GET_NAME (fixP
->fx_addsy
);
3991 name
= _("<unknown>");
3992 as_fatal (_("Cannot generate relocation type for symbol %s, code %s"),
3993 name
, bfd_get_reloc_code_name (code
));
3999 /* Machine-dependent usage-output. */
4002 md_show_usage (FILE *stream
)
4004 /* The messages are formatted to line up with the generic options. */
4005 fprintf (stream
, _("CRIS-specific options:\n"));
4006 fprintf (stream
, "%s",
4007 _(" -h, -H Don't execute, print this help text. Deprecated.\n"));
4008 fprintf (stream
, "%s",
4009 _(" -N Warn when branches are expanded to jumps.\n"));
4010 fprintf (stream
, "%s",
4011 _(" --underscore User symbols are normally prepended with underscore.\n"));
4012 fprintf (stream
, "%s",
4013 _(" Registers will not need any prefix.\n"));
4014 fprintf (stream
, "%s",
4015 _(" --no-underscore User symbols do not have any prefix.\n"));
4016 fprintf (stream
, "%s",
4017 _(" Registers will require a `$'-prefix.\n"));
4018 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4019 fprintf (stream
, "%s",
4020 _(" --pic Enable generation of position-independent code.\n"));
4022 fprintf (stream
, "%s",
4023 _(" --march=<arch> Generate code for <arch>. Valid choices for <arch>\n\
4024 are v0_v10, v10, v32 and common_v10_v32.\n"));
4027 /* Apply a fixS (fixup of an instruction or data that we didn't have
4028 enough info to complete immediately) to the data in a frag. */
4031 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
4033 /* This assignment truncates upper bits if valueT is 64 bits (as with
4034 --enable-64-bit-bfd), which is fine here, though we cast to avoid
4035 any compiler warnings. */
4036 long val
= (long) *valP
;
4037 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
4039 if (fixP
->fx_addsy
== 0 && !fixP
->fx_pcrel
)
4042 if (fixP
->fx_bit_fixP
|| fixP
->fx_im_disp
!= 0)
4044 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("Invalid relocation"));
4049 /* We can't actually support subtracting a symbol. */
4050 if (fixP
->fx_subsy
!= (symbolS
*) NULL
)
4051 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
4052 _("expression too complex"));
4054 /* This operand-type is scaled. */
4055 if (fixP
->fx_r_type
== BFD_RELOC_CRIS_LAPCQ_OFFSET
)
4057 cris_number_to_imm (buf
, val
, fixP
->fx_size
, fixP
, seg
);
4061 /* All relocations are relative to the location just after the fixup;
4062 the address of the fixup plus its size. */
4065 md_pcrel_from (fixS
*fixP
)
4067 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4069 /* FIXME: We get here only at the end of assembly, when X in ".-X" is
4070 still unknown. Since we don't have pc-relative relocations in a.out,
4071 this is invalid. What to do if anything for a.out, is to add
4072 pc-relative relocations everywhere including the elinux program
4073 loader. For ELF, allow straight-forward PC-relative relocations,
4074 which are always relative to the location after the relocation. */
4075 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
4076 || (fixP
->fx_r_type
!= BFD_RELOC_8_PCREL
4077 && fixP
->fx_r_type
!= BFD_RELOC_16_PCREL
4078 && fixP
->fx_r_type
!= BFD_RELOC_32_PCREL
4079 && fixP
->fx_r_type
!= BFD_RELOC_CRIS_LAPCQ_OFFSET
))
4080 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
4081 _("Invalid pc-relative relocation"));
4082 return fixP
->fx_size
+ addr
;
4085 /* We have no need to give defaults for symbol-values. */
4087 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
4092 /* If this function returns non-zero, it prevents the relocation
4093 against symbol(s) in the FIXP from being replaced with relocations
4094 against section symbols, and guarantees that a relocation will be
4095 emitted even when the value can be resolved locally. */
4097 md_cris_force_relocation (struct fix
*fixp
)
4099 switch (fixp
->fx_r_type
)
4101 case BFD_RELOC_CRIS_16_GOT
:
4102 case BFD_RELOC_CRIS_32_GOT
:
4103 case BFD_RELOC_CRIS_16_GOTPLT
:
4104 case BFD_RELOC_CRIS_32_GOTPLT
:
4105 case BFD_RELOC_CRIS_32_GOTREL
:
4106 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
4107 case BFD_RELOC_CRIS_32_PLT_PCREL
:
4113 return generic_force_reloc (fixp
);
4116 /* Check and emit error if broken-word handling has failed to fix up a
4117 case-table. This is called from write.c, after doing everything it
4118 knows about how to handle broken words. */
4121 tc_cris_check_adjusted_broken_word (offsetT new_offset
, struct broken_word
*brokwP
)
4123 if (new_offset
> 32767 || new_offset
< -32768)
4124 /* We really want a genuine error, not a warning, so make it one. */
4125 as_bad_where (brokwP
->frag
->fr_file
, brokwP
->frag
->fr_line
,
4126 _("Adjusted signed .word (%ld) overflows: `switch'-statement too large."),
4130 /* Make a leading REGISTER_PREFIX_CHAR mandatory for all registers. */
4133 cris_force_reg_prefix (void)
4135 demand_register_prefix
= TRUE
;
4138 /* Do not demand a leading REGISTER_PREFIX_CHAR for all registers. */
4141 cris_relax_reg_prefix (void)
4143 demand_register_prefix
= FALSE
;
4146 /* Adjust for having a leading '_' on all user symbols. */
4149 cris_sym_leading_underscore (void)
4151 /* We can't really do anything more than assert that what the program
4152 thinks symbol starts with agrees with the command-line options, since
4153 the bfd is already created. */
4155 if (!symbols_have_leading_underscore
)
4156 as_bad (_(".syntax %s requires command-line option `--underscore'"),
4157 SYNTAX_USER_SYM_LEADING_UNDERSCORE
);
4160 /* Adjust for not having any particular prefix on user symbols. */
4162 static void cris_sym_no_leading_underscore (void)
4164 if (symbols_have_leading_underscore
)
4165 as_bad (_(".syntax %s requires command-line option `--no-underscore'"),
4166 SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE
);
4169 /* Handle the .syntax pseudo, which takes an argument that decides what
4170 syntax the assembly code has. */
4173 s_syntax (int ignore ATTRIBUTE_UNUSED
)
4175 static const struct syntaxes
4177 const char *const operand
;
4180 {{SYNTAX_ENFORCE_REG_PREFIX
, cris_force_reg_prefix
},
4181 {SYNTAX_RELAX_REG_PREFIX
, cris_relax_reg_prefix
},
4182 {SYNTAX_USER_SYM_LEADING_UNDERSCORE
, cris_sym_leading_underscore
},
4183 {SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE
, cris_sym_no_leading_underscore
}};
4185 const struct syntaxes
*sp
;
4187 for (sp
= syntax_table
;
4188 sp
< syntax_table
+ sizeof (syntax_table
) / sizeof (syntax_table
[0]);
4191 if (strncmp (input_line_pointer
, sp
->operand
,
4192 strlen (sp
->operand
)) == 0)
4196 input_line_pointer
+= strlen (sp
->operand
);
4197 demand_empty_rest_of_line ();
4202 as_bad (_("Unknown .syntax operand"));
4205 /* Wrapper for dwarf2_directive_file to emit error if this is seen when
4206 not emitting ELF. */
4209 s_cris_file (int dummy
)
4211 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
)
4212 as_bad (_("Pseudodirective .file is only valid when generating ELF"));
4214 dwarf2_directive_file (dummy
);
4217 /* Wrapper for dwarf2_directive_loc to emit error if this is seen when not
4221 s_cris_loc (int dummy
)
4223 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
)
4224 as_bad (_("Pseudodirective .loc is only valid when generating ELF"));
4226 dwarf2_directive_loc (dummy
);
4229 /* Worker for .dtpoffd: generate a R_CRIS_32_DTPREL reloc, as for
4230 expr:DTPREL but for use in debug info. */
4233 s_cris_dtpoff (int bytes
)
4239 as_fatal (_("internal inconsistency problem: %s called for %d bytes"),
4240 __FUNCTION__
, bytes
);
4244 p
= frag_more (bytes
);
4245 md_number_to_chars (p
, 0, bytes
);
4246 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, bytes
, &ex
, FALSE
,
4247 BFD_RELOC_CRIS_32_DTPREL
);
4249 demand_empty_rest_of_line ();
4253 /* Translate a <arch> string (as common to --march=<arch> and .arch <arch>)
4254 into an enum. If the string *STR is recognized, *STR is updated to point
4255 to the end of the string. If the string is not recognized,
4256 arch_cris_unknown is returned. */
4258 static enum cris_archs
4259 cris_arch_from_string (char **str
)
4261 static const struct cris_arch_struct
4263 const char *const name
;
4264 enum cris_archs arch
;
4266 /* Keep in order longest-first for choices where one is a prefix
4268 {{"v0_v10", arch_cris_any_v0_v10
},
4269 {"v10", arch_crisv10
},
4270 {"v32", arch_crisv32
},
4271 {"common_v10_v32", arch_cris_common_v10_v32
}};
4273 const struct cris_arch_struct
*ap
;
4275 for (ap
= arch_table
;
4276 ap
< arch_table
+ sizeof (arch_table
) / sizeof (arch_table
[0]);
4279 int len
= strlen (ap
->name
);
4281 if (strncmp (*str
, ap
->name
, len
) == 0
4282 && (str
[0][len
] == 0 || ISSPACE (str
[0][len
])))
4284 *str
+= strlen (ap
->name
);
4289 return arch_cris_unknown
;
4292 /* Return nonzero if architecture version ARCH matches version range in
4296 cris_insn_ver_valid_for_arch (enum cris_insn_version_usage iver
,
4297 enum cris_archs arch
)
4301 case arch_cris_any_v0_v10
:
4303 (iver
== cris_ver_version_all
4304 || iver
== cris_ver_warning
4305 || iver
== cris_ver_v0_3
4306 || iver
== cris_ver_v3p
4307 || iver
== cris_ver_v0_10
4308 || iver
== cris_ver_sim_v0_10
4309 || iver
== cris_ver_v3_10
4310 || iver
== cris_ver_v8
4311 || iver
== cris_ver_v8p
4312 || iver
== cris_ver_v8_10
4313 || iver
== cris_ver_v10
4314 || iver
== cris_ver_v10p
);
4318 (iver
== cris_ver_version_all
4319 || iver
== cris_ver_v3p
4320 || iver
== cris_ver_v8p
4321 || iver
== cris_ver_v10p
4322 || iver
== cris_ver_v32p
);
4324 case arch_cris_common_v10_v32
:
4326 (iver
== cris_ver_version_all
4327 || iver
== cris_ver_v3p
4328 || iver
== cris_ver_v8p
4329 || iver
== cris_ver_v10p
);
4333 (iver
== cris_ver_version_all
4334 || iver
== cris_ver_v0_3
4335 || iver
== cris_ver_v0_10
4336 || iver
== cris_ver_sim_v0_10
);
4340 (iver
== cris_ver_version_all
4341 || iver
== cris_ver_v0_3
4342 || iver
== cris_ver_v3p
4343 || iver
== cris_ver_v0_10
4344 || iver
== cris_ver_sim_v0_10
4345 || iver
== cris_ver_v3_10
);
4349 (iver
== cris_ver_version_all
4350 || iver
== cris_ver_v3p
4351 || iver
== cris_ver_v0_10
4352 || iver
== cris_ver_sim_v0_10
4353 || iver
== cris_ver_v3_10
4354 || iver
== cris_ver_v8
4355 || iver
== cris_ver_v8p
4356 || iver
== cris_ver_v8_10
);
4360 (iver
== cris_ver_version_all
4361 || iver
== cris_ver_v3p
4362 || iver
== cris_ver_v0_10
4363 || iver
== cris_ver_sim_v0_10
4364 || iver
== cris_ver_v3_10
4365 || iver
== cris_ver_v8p
4366 || iver
== cris_ver_v8_10
4367 || iver
== cris_ver_v10
4368 || iver
== cris_ver_v10p
);
4375 /* Assert that the .arch ARCHCHOICE1 is compatible with the specified or
4376 default --march=<ARCHCHOICE2> option. */
4379 s_cris_arch (int dummy ATTRIBUTE_UNUSED
)
4381 /* Right now we take the easy route and check for sameness. It's not
4382 obvious that allowing e.g. --march=v32 and .arch common_v0_v32
4383 would be more useful than confusing, implementation-wise and
4386 char *str
= input_line_pointer
;
4387 enum cris_archs arch
= cris_arch_from_string (&str
);
4389 if (arch
== arch_cris_unknown
)
4391 as_bad (_("unknown operand to .arch"));
4393 /* For this one, str does not reflect the end of the operand,
4394 since there was no matching arch. Skip it manually; skip
4395 things that can be part of a word (a name). */
4396 while (is_part_of_name (*str
))
4399 else if (arch
!= cris_arch
)
4400 as_bad (_(".arch <arch> requires a matching --march=... option"));
4402 input_line_pointer
= str
;
4403 demand_empty_rest_of_line ();
4409 * eval: (c-set-style "gnu")
4410 * indent-tabs-mode: t