1 /* tc-h8300.c -- Assemble code for the Hitachi H8/300
2 Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000, 2001
3 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* Written By Steve Chamberlain <sac@cygnus.com>. */
29 #define h8_opcodes ops
30 #include "opcode/h8300.h"
37 const char comment_chars
[] = ";";
38 const char line_comment_chars
[] = "#";
39 const char line_separator_chars
[] = "";
41 /* This table describes all the machine specific pseudo-ops the assembler
42 has to support. The fields are:
43 pseudo-op name without dot
44 function to call to execute this pseudo-op
45 Integer arg to pass to the function
52 #define PSIZE (Hmode ? L_32 : L_16)
54 #define DSYMMODE (Hmode ? L_24 : L_16)
55 int bsize
= L_8
; /* default branch displacement */
63 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300h
))
64 as_warn (_("could not set architecture and machine"));
74 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300s
))
75 as_warn (_("could not set architecture and machine"));
92 const pseudo_typeS md_pseudo_table
[] =
94 {"h8300h", h8300hmode
, 0},
95 {"h8300s", h8300smode
, 0},
96 {"sbranch", sbranch
, L_8
},
97 {"lbranch", sbranch
, L_16
},
103 {"form", listing_psize
, 0},
104 {"heading", listing_title
, 0},
105 {"import", s_ignore
, 0},
106 {"page", listing_eject
, 0},
107 {"program", s_ignore
, 0},
111 const int md_reloc_size
;
113 const char EXP_CHARS
[] = "eE";
115 /* Chars that mean this number is a floating point constant */
118 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
120 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
122 /* This function is called once, at assembler startup time. This
123 should set up all the tables, etc. that the MD part of the assembler
128 struct h8_opcode
*opcode
;
129 char prev_buffer
[100];
133 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300
))
134 as_warn (_("could not set architecture and machine"));
137 opcode_hash_control
= hash_new ();
140 for (opcode
= h8_opcodes
; opcode
->name
; opcode
++)
142 /* Strip off any . part when inserting the opcode and only enter
143 unique codes into the hash table. */
144 char *src
= opcode
->name
;
145 unsigned int len
= strlen (src
);
146 char *dst
= malloc (len
+ 1);
161 if (strcmp (buffer
, prev_buffer
))
163 hash_insert (opcode_hash_control
, buffer
, (char *) opcode
);
164 strcpy (prev_buffer
, buffer
);
169 /* Find the number of operands. */
170 opcode
->noperands
= 0;
171 while (opcode
->args
.nib
[opcode
->noperands
] != E
)
174 /* Find the length of the opcode in bytes. */
176 while (opcode
->data
.nib
[opcode
->length
* 2] != E
)
191 int opsize
; /* Set when a register size is seen */
202 WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp
211 /* Try to parse a reg name. Return the number of chars consumed. */
214 parse_reg (src
, mode
, reg
, direction
)
224 /* Cribbed from get_symbol_end. */
225 if (!is_name_beginner (*src
) || *src
== '\001')
228 while (is_part_of_name (*end
) || *end
== '\001')
232 if (len
== 2 && src
[0] == 's' && src
[1] == 'p')
234 *mode
= PSIZE
| REG
| direction
;
238 if (len
== 3 && src
[0] == 'c' && src
[1] == 'c' && src
[2] == 'r')
244 if (len
== 3 && src
[0] == 'e' && src
[1] == 'x' && src
[2] == 'r')
250 if (len
== 2 && src
[0] == 'f' && src
[1] == 'p')
252 *mode
= PSIZE
| REG
| direction
;
256 if (len
== 3 && src
[0] == 'e' && src
[1] == 'r'
257 && src
[2] >= '0' && src
[2] <= '7')
259 *mode
= L_32
| REG
| direction
;
262 as_warn (_("Reg not valid for H8/300"));
265 if (len
== 2 && src
[0] == 'e' && src
[1] >= '0' && src
[1] <= '7')
267 *mode
= L_16
| REG
| direction
;
268 *reg
= src
[1] - '0' + 8;
270 as_warn (_("Reg not valid for H8/300"));
276 if (src
[1] >= '0' && src
[1] <= '7')
278 if (len
== 3 && src
[2] == 'l')
280 *mode
= L_8
| REG
| direction
;
281 *reg
= (src
[1] - '0') + 8;
284 if (len
== 3 && src
[2] == 'h')
286 *mode
= L_8
| REG
| direction
;
287 *reg
= (src
[1] - '0');
292 *mode
= L_16
| REG
| direction
;
293 *reg
= (src
[1] - '0');
307 char *save
= input_line_pointer
;
310 input_line_pointer
= s
;
312 if (op
->X_op
== O_absent
)
313 as_bad (_("missing operand"));
314 new = input_line_pointer
;
315 input_line_pointer
= save
;
320 skip_colonthing (ptr
, exp
, mode
)
322 expressionS
*exp ATTRIBUTE_UNUSED
;
332 /* ff fill any 8 bit quantity */
333 /* exp->X_add_number -= 0x100; */
342 else if (*ptr
== '3')
346 else if (*ptr
== '1')
350 while (isdigit (*ptr
))
357 /* The many forms of operand:
360 @Rn Register indirect
361 @(exp[:16], Rn) Register indirect with displacement
365 @aa:16 absolute 16 bit
368 #xx[:size] immediate data
369 @(exp:[8], pc) pc rel
370 @@aa[:8] memory indirect
381 src
= skip_colonthing (src
, &op
->exp
, &mode
);
385 /* Choose a default mode. */
386 if (op
->exp
.X_add_number
< -32768
387 || op
->exp
.X_add_number
> 32767)
394 else if (op
->exp
.X_add_symbol
395 || op
->exp
.X_op_symbol
)
406 get_operand (ptr
, op
, dst
, direction
)
409 unsigned int dst ATTRIBUTE_UNUSED
;
419 /* Gross. Gross. ldm and stm have a format not easily handled
420 by get_operand. We deal with it explicitly here. */
421 if (src
[0] == 'e' && src
[1] == 'r' && isdigit (src
[2])
422 && src
[3] == '-' && src
[4] == 'e' && src
[5] == 'r' && isdigit (src
[6]))
430 as_bad (_("Invalid register list for ldm/stm\n"));
433 as_bad (_("Invalid register list for ldm/stm\n"));
436 as_bad (_("Invalid register list for ldm/stm\n"));
440 as_bad (_("Invalid register list for ldm/stm\n"));
442 /* Even sicker. We encode two registers into op->reg. One
443 for the low register to save, the other for the high
444 register to save; we also set the high bit in op->reg
445 so we know this is "very special". */
446 op
->reg
= 0x80000000 | (high
<< 8) | low
;
452 len
= parse_reg (src
, &op
->mode
, &op
->reg
, direction
);
465 src
= parse_exp (src
, &op
->exp
);
467 src
= skip_colonthing (src
, &op
->exp
, &op
->mode
);
478 len
= parse_reg (src
, &mode
, &num
, direction
);
481 /* Oops, not a reg after all, must be ordinary exp. */
483 /* Must be a symbol. */
484 op
->mode
= ABS
| PSIZE
| direction
;
485 *ptr
= skip_colonthing (parse_exp (src
, &op
->exp
),
486 &op
->exp
, &op
->mode
);
491 if ((mode
& SIZE
) != PSIZE
)
492 as_bad (_("Wrong size pointer register for architecture."));
503 /* Start off assuming a 16 bit offset. */
505 src
= parse_exp (src
, &op
->exp
);
507 src
= colonmod24 (op
, src
);
512 op
->mode
|= ABS
| direction
;
519 as_bad (_("expected @(exp, reg16)"));
525 len
= parse_reg (src
, &mode
, &op
->reg
, direction
);
526 if (len
== 0 || !(mode
& REG
))
528 as_bad (_("expected @(exp, reg16)"));
531 op
->mode
|= DISP
| direction
;
534 src
= skip_colonthing (src
, &op
->exp
, &op
->mode
);
536 if (*src
!= ')' && '(')
538 as_bad (_("expected @(exp, reg16)"));
545 len
= parse_reg (src
, &mode
, &num
, direction
);
553 if ((mode
& SIZE
) != PSIZE
)
554 as_bad (_("Wrong size pointer register for architecture."));
560 if ((mode
& SIZE
) != PSIZE
)
561 as_bad (_("Wrong size pointer register for architecture."));
563 op
->mode
= direction
| IND
| PSIZE
;
571 /* must be a symbol */
573 op
->mode
= ABS
| direction
;
574 src
= parse_exp (src
, &op
->exp
);
576 *ptr
= colonmod24 (op
, src
);
586 src
= parse_exp (src
, &op
->exp
);
587 *ptr
= skip_colonthing (src
, &op
->exp
, &op
->mode
);
591 else if (strncmp (src
, "mach", 4) == 0
592 || strncmp (src
, "macl", 4) == 0)
594 op
->reg
= src
[3] == 'l';
601 src
= parse_exp (src
, &op
->exp
);
602 /* Trailing ':' size ? */
605 if (src
[1] == '1' && src
[2] == '6')
607 op
->mode
= PCREL
| L_16
;
610 else if (src
[1] == '8')
612 op
->mode
= PCREL
| L_8
;
617 as_bad (_("expect :8 or :16 here"));
622 op
->mode
= PCREL
| bsize
;
629 get_operands (noperands
, op_end
, operand
)
630 unsigned int noperands
;
632 struct h8_op
*operand
;
645 get_operand (&ptr
, operand
+ 0, 0, SRC
);
649 get_operand (&ptr
, operand
+ 1, 1, DST
);
659 get_operand (&ptr
, operand
+ 0, 0, SRC
);
662 get_operand (&ptr
, operand
+ 1, 1, DST
);
672 /* Passed a pointer to a list of opcodes which use different
673 addressing modes, return the opcode which matches the opcodes
675 static struct h8_opcode
*
676 get_specific (opcode
, operands
, size
)
677 struct h8_opcode
*opcode
;
678 struct h8_op
*operands
;
681 struct h8_opcode
*this_try
= opcode
;
684 unsigned int this_index
= opcode
->idx
;
686 /* There's only one ldm/stm and it's easier to just
687 get out quick for them. */
688 if (strcmp (opcode
->name
, "stm.l") == 0
689 || strcmp (opcode
->name
, "ldm.l") == 0)
692 while (this_index
== opcode
->idx
&& !found
)
697 if (this_try
->noperands
== 0)
701 this_size
= this_try
->how
& SN
;
702 if (this_size
!= size
&& (this_size
!= SB
|| size
!= SN
))
709 for (i
= 0; i
< this_try
->noperands
&& found
; i
++)
711 op_type op
= this_try
->args
.nib
[i
];
712 int x
= operands
[i
].mode
;
714 if ((op
& (DISP
| REG
)) == (DISP
| REG
)
715 && ((x
& (DISP
| REG
)) == (DISP
| REG
)))
717 dispreg
= operands
[i
].reg
;
725 x
= (x
& ~L_P
) | (Hmode
? L_32
: L_16
);
727 op
= (op
& ~L_P
) | (Hmode
? L_32
: L_16
);
731 /* The size of the reg is v important. */
732 if ((op
& SIZE
) != (x
& SIZE
))
735 else if ((op
& ABSJMP
) && (x
& ABS
))
737 operands
[i
].mode
&= ~ABS
;
738 operands
[i
].mode
|= ABSJMP
;
739 /* But it may not be 24 bits long. */
742 operands
[i
].mode
&= ~SIZE
;
743 operands
[i
].mode
|= L_16
;
746 else if ((op
& (KBIT
| DBIT
)) && (x
& IMM
))
748 /* This is ok if the immediate value is sensible. */
752 /* The size of the displacement is important. */
753 if ((op
& SIZE
) != (x
& SIZE
))
756 else if ((op
& (DISP
| IMM
| ABS
))
757 && (op
& (DISP
| IMM
| ABS
)) == (x
& (DISP
| IMM
| ABS
)))
759 /* Promote a L_24 to L_32 if it makes us match. */
760 if ((x
& L_24
) && (op
& L_32
))
765 /* Promote an L8 to L_16 if it makes us match. */
766 if (op
& ABS
&& op
& L_8
&& op
& DISP
)
771 else if ((x
& SIZE
) != 0
772 && ((op
& SIZE
) != (x
& SIZE
)))
775 else if ((op
& MACREG
) != (x
& MACREG
))
779 else if ((op
& MODE
) != (x
& MODE
))
793 check_operand (operand
, width
, string
)
794 struct h8_op
*operand
;
798 if (operand
->exp
.X_add_symbol
== 0
799 && operand
->exp
.X_op_symbol
== 0)
801 /* No symbol involved, let's look at offset, it's dangerous if
802 any of the high bits are not 0 or ff's, find out by oring or
803 anding with the width and seeing if the answer is 0 or all
806 if ((operand
->exp
.X_add_number
& ~width
) != 0 &&
807 (operand
->exp
.X_add_number
| width
) != (~0))
810 && (operand
->exp
.X_add_number
& 0xff00) == 0xff00)
812 /* Just ignore this one - which happens when trying to
813 fit a 16 bit address truncated into an 8 bit address
814 of something like bset. */
818 as_warn (_("operand %s0x%lx out of range."), string
,
819 (unsigned long) operand
->exp
.X_add_number
);
825 /* RELAXMODE has one of 3 values:
827 0 Output a "normal" reloc, no relaxing possible for this insn/reloc
829 1 Output a relaxable 24bit absolute mov.w address relocation
830 (may relax into a 16bit absolute address).
832 2 Output a relaxable 16/24 absolute mov.b address relocation
833 (may relax into an 8bit absolute address). */
836 do_a_fix_imm (offset
, operand
, relaxmode
)
838 struct h8_op
*operand
;
845 char *t
= operand
->mode
& IMM
? "#" : "@";
847 if (operand
->exp
.X_add_symbol
== 0)
849 char *bytes
= frag_now
->fr_literal
+ offset
;
850 switch (operand
->mode
& SIZE
)
853 check_operand (operand
, 0x3, t
);
854 bytes
[0] |= (operand
->exp
.X_add_number
) << 4;
857 check_operand (operand
, 0x7, t
);
858 bytes
[0] |= (operand
->exp
.X_add_number
) << 4;
861 check_operand (operand
, 0xff, t
);
862 bytes
[0] = operand
->exp
.X_add_number
;
865 check_operand (operand
, 0xffff, t
);
866 bytes
[0] = operand
->exp
.X_add_number
>> 8;
867 bytes
[1] = operand
->exp
.X_add_number
>> 0;
870 check_operand (operand
, 0xffffff, t
);
871 bytes
[0] = operand
->exp
.X_add_number
>> 16;
872 bytes
[1] = operand
->exp
.X_add_number
>> 8;
873 bytes
[2] = operand
->exp
.X_add_number
>> 0;
877 /* This should be done with bfd. */
878 bytes
[0] = operand
->exp
.X_add_number
>> 24;
879 bytes
[1] = operand
->exp
.X_add_number
>> 16;
880 bytes
[2] = operand
->exp
.X_add_number
>> 8;
881 bytes
[3] = operand
->exp
.X_add_number
>> 0;
884 idx
= (relaxmode
== 2) ? R_MOV24B1
: R_MOVL1
;
885 fix_new_exp (frag_now
, offset
, 4, &operand
->exp
, 0, idx
);
892 switch (operand
->mode
& SIZE
)
897 where
= (operand
->mode
& SIZE
) == L_24
? -1 : 0;
900 else if (relaxmode
== 1)
906 as_bad (_("Can't work out size of operand.\n"));
914 operand
->exp
.X_add_number
=
915 ((operand
->exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
921 operand
->exp
.X_add_number
=
922 ((operand
->exp
.X_add_number
& 0xff) ^ 0x80) - 0x80;
925 fix_new_exp (frag_now
,
934 /* Now we know what sort of opcodes it is, let's build the bytes. */
936 build_bytes (this_try
, operand
)
937 struct h8_opcode
*this_try
;
938 struct h8_op
*operand
;
942 char *output
= frag_more (this_try
->length
);
943 op_type
*nibble_ptr
= this_try
->data
.nib
;
945 unsigned int nibble_count
= 0;
953 if (!(this_try
->inbase
|| Hmode
))
954 as_warn (_("Opcode `%s' with these operand types not available in H8/300 mode"),
957 while (*nibble_ptr
!= E
)
962 d
= (c
& (DST
| SRC_IN_DST
)) != 0;
970 if (c
& (REG
| IND
| INC
| DEC
))
972 nib
= operand
[d
].reg
;
974 else if ((c
& DISPREG
) == (DISPREG
))
981 absat
= nibble_count
/ 2;
984 else if (c
& (IMM
| PCREL
| ABS
| ABSJMP
| DISP
))
987 immat
= nibble_count
/ 2;
996 switch (operand
[0].exp
.X_add_number
)
1005 as_bad (_("Need #1 or #2 here"));
1010 switch (operand
[0].exp
.X_add_number
)
1020 as_warn (_("#4 not valid on H8/300."));
1025 as_bad (_("Need #1 or #2 here"));
1028 /* Stop it making a fix. */
1029 operand
[0].mode
= 0;
1034 operand
[d
].mode
|= MEMRELAX
;
1044 if (operand
[0].mode
== MACREG
)
1045 /* stmac has mac[hl] as the first operand. */
1046 nib
= 2 + operand
[0].reg
;
1048 /* ldmac has mac[hl] as the second operand. */
1049 nib
= 2 + operand
[1].reg
;
1057 /* Disgusting. Why, oh why didn't someone ask us for advice
1058 on the assembler format. */
1059 if (strcmp (this_try
->name
, "stm.l") == 0
1060 || strcmp (this_try
->name
, "ldm.l") == 0)
1063 high
= (operand
[this_try
->name
[0] == 'l' ? 1 : 0].reg
>> 8) & 0xf;
1064 low
= operand
[this_try
->name
[0] == 'l' ? 1 : 0].reg
& 0xf;
1066 asnibbles
[2] = high
- low
;
1067 asnibbles
[7] = (this_try
->name
[0] == 'l') ? high
: low
;
1070 for (i
= 0; i
< this_try
->length
; i
++)
1072 output
[i
] = (asnibbles
[i
* 2] << 4) | asnibbles
[i
* 2 + 1];
1075 /* Note if this is a movb instruction -- there's a special relaxation
1076 which only applies to them. */
1077 if (strcmp (this_try
->name
, "mov.b") == 0)
1080 /* Output any fixes. */
1081 for (i
= 0; i
< 2; i
++)
1083 int x
= operand
[i
].mode
;
1085 if (x
& (IMM
| DISP
))
1087 do_a_fix_imm (output
- frag_now
->fr_literal
+ immat
,
1088 operand
+ i
, x
& MEMRELAX
!= 0);
1092 do_a_fix_imm (output
- frag_now
->fr_literal
+ absat
,
1093 operand
+ i
, x
& MEMRELAX
? movb
+ 1 : 0);
1097 int size16
= x
& L_16
;
1098 int where
= size16
? 2 : 1;
1099 int size
= size16
? 2 : 1;
1100 int type
= size16
? R_PCRWORD
: R_PCRBYTE
;
1103 check_operand (operand
+ i
, size16
? 0x7fff : 0x7f, "@");
1105 if (operand
[i
].exp
.X_add_number
& 1)
1107 as_warn (_("branch operand has odd offset (%lx)\n"),
1108 (unsigned long) operand
->exp
.X_add_number
);
1112 /* The COFF port has always been off by one, changing it
1113 now would be an incompatible change, so we leave it as-is.
1115 We don't want to do this for ELF as we want to be
1116 compatible with the proposed ELF format from Hitachi. */
1117 operand
[i
].exp
.X_add_number
-= 1;
1120 operand
[i
].exp
.X_add_number
=
1121 ((operand
[i
].exp
.X_add_number
& 0xff) ^ 0x80) - 0x80;
1123 fixP
= fix_new_exp (frag_now
,
1124 output
- frag_now
->fr_literal
+ where
,
1129 fixP
->fx_signed
= 1;
1131 else if (x
& MEMIND
)
1133 check_operand (operand
+ i
, 0xff, "@@");
1134 fix_new_exp (frag_now
,
1135 output
- frag_now
->fr_literal
+ 1,
1141 else if (x
& ABSJMP
)
1146 /* To be compatible with the proposed H8 ELF format, we
1147 want the relocation's offset to point to the first byte
1148 that will be modified, not to the start of the instruction. */
1153 /* This jmp may be a jump or a branch. */
1155 check_operand (operand
+ i
, Hmode
? 0xffffff : 0xffff, "@");
1156 if (operand
[i
].exp
.X_add_number
& 1)
1158 as_warn (_("branch operand has odd offset (%lx)\n"),
1159 (unsigned long) operand
->exp
.X_add_number
);
1162 operand
[i
].exp
.X_add_number
=
1163 ((operand
[i
].exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
1164 fix_new_exp (frag_now
,
1165 output
- frag_now
->fr_literal
+ where
,
1174 /* Try to give an intelligent error message for common and simple to
1177 clever_message (opcode
, operand
)
1178 struct h8_opcode
*opcode
;
1179 struct h8_op
*operand
;
1181 /* Find out if there was more than one possible opcode. */
1183 if ((opcode
+ 1)->idx
!= opcode
->idx
)
1187 /* Only one opcode of this flavour, try to guess which operand
1189 for (argn
= 0; argn
< opcode
->noperands
; argn
++)
1191 switch (opcode
->args
.nib
[argn
])
1194 if (operand
[argn
].mode
!= RD16
)
1196 as_bad (_("destination operand must be 16 bit register"));
1203 if (operand
[argn
].mode
!= RS8
)
1205 as_bad (_("source operand must be 8 bit register"));
1211 if (operand
[argn
].mode
!= ABS16DST
)
1213 as_bad (_("destination operand must be 16bit absolute address"));
1218 if (operand
[argn
].mode
!= RD8
)
1220 as_bad (_("destination operand must be 8 bit register"));
1226 if (operand
[argn
].mode
!= ABS16SRC
)
1228 as_bad (_("source operand must be 16bit absolute address"));
1236 as_bad (_("invalid operands"));
1239 /* This is the guts of the machine-dependent assembler. STR points to
1240 a machine dependent instruction. This function is supposed to emit
1241 the frags/bytes it assembles. */
1248 struct h8_op operand
[2];
1249 struct h8_opcode
*opcode
;
1250 struct h8_opcode
*prev_opcode
;
1256 /* Drop leading whitespace. */
1260 /* Find the op code end. */
1261 for (op_start
= op_end
= str
;
1262 *op_end
!= 0 && *op_end
!= ' ';
1274 if (op_end
== op_start
)
1276 as_bad (_("can't find opcode "));
1282 opcode
= (struct h8_opcode
*) hash_find (opcode_hash_control
,
1287 as_bad (_("unknown opcode"));
1291 /* We used to set input_line_pointer to the result of get_operands,
1292 but that is wrong. Our caller assumes we don't change it. */
1294 (void) get_operands (opcode
->noperands
, op_end
, operand
);
1296 prev_opcode
= opcode
;
1316 opcode
= get_specific (opcode
, operand
, size
);
1320 /* Couldn't find an opcode which matched the operands. */
1321 char *where
= frag_more (2);
1325 clever_message (prev_opcode
, operand
);
1329 if (opcode
->size
&& dot
)
1331 if (opcode
->size
!= *dot
)
1333 as_warn (_("mismatch between opcode size and operand size"));
1337 build_bytes (opcode
, operand
);
1340 #ifndef BFD_ASSEMBLER
1342 tc_crawl_symbol_chain (headers
)
1343 object_headers
*headers ATTRIBUTE_UNUSED
;
1345 printf (_("call to tc_crawl_symbol_chain \n"));
1350 md_undefined_symbol (name
)
1351 char *name ATTRIBUTE_UNUSED
;
1356 #ifndef BFD_ASSEMBLER
1358 tc_headers_hook (headers
)
1359 object_headers
*headers ATTRIBUTE_UNUSED
;
1361 printf (_("call to tc_headers_hook \n"));
1365 /* Various routines to kill one day */
1366 /* Equal to MAX_PRECISION in atof-ieee.c */
1367 #define MAX_LITTLENUMS 6
1369 /* Turn a string in input_line_pointer into a floating point constant
1370 of type TYPE, and store the appropriate bytes in *LITP. The number
1371 of LITTLENUMS emitted is stored in *SIZEP. An error message is
1372 returned, or NULL on OK. */
1375 md_atof (type
, litP
, sizeP
)
1381 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
1382 LITTLENUM_TYPE
*wordP
;
1414 return _("Bad call to MD_ATOF()");
1416 t
= atof_ieee (input_line_pointer
, type
, words
);
1418 input_line_pointer
= t
;
1420 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
1421 for (wordP
= words
; prec
--;)
1423 md_number_to_chars (litP
, (long) (*wordP
++), sizeof (LITTLENUM_TYPE
));
1424 litP
+= sizeof (LITTLENUM_TYPE
);
1429 CONST
char *md_shortopts
= "";
1430 struct option md_longopts
[] = {
1431 {NULL
, no_argument
, NULL
, 0}
1434 size_t md_longopts_size
= sizeof (md_longopts
);
1437 md_parse_option (c
, arg
)
1438 int c ATTRIBUTE_UNUSED
;
1439 char *arg ATTRIBUTE_UNUSED
;
1445 md_show_usage (stream
)
1446 FILE *stream ATTRIBUTE_UNUSED
;
1451 tc_aout_fix_to_chars ()
1453 printf (_("call to tc_aout_fix_to_chars \n"));
1458 md_convert_frag (headers
, seg
, fragP
)
1459 #ifdef BFD_ASSEMBLER
1460 bfd
*headers ATTRIBUTE_UNUSED
;
1462 object_headers
*headers ATTRIBUTE_UNUSED
;
1464 segT seg ATTRIBUTE_UNUSED
;
1465 fragS
*fragP ATTRIBUTE_UNUSED
;
1467 printf (_("call to md_convert_frag \n"));
1471 #ifdef BFD_ASSEMBLER
1473 md_section_align (segment
, size
)
1477 int align
= bfd_get_section_alignment (stdoutput
, segment
);
1478 return ((size
+ (1 << align
) - 1) & (-1 << align
));
1482 md_section_align (seg
, size
)
1486 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
1487 & (-1 << section_alignment
[(int) seg
]));
1492 #ifdef BFD_ASSEMBLER
1494 md_apply_fix (fixP
, valp
)
1499 md_apply_fix (fixP
, val
)
1504 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
1505 #ifdef BFD_ASSEMBLER
1509 switch (fixP
->fx_size
)
1515 *buf
++ = (val
>> 8);
1519 *buf
++ = (val
>> 24);
1520 *buf
++ = (val
>> 16);
1521 *buf
++ = (val
>> 8);
1530 md_estimate_size_before_relax (fragP
, segment_type
)
1531 register fragS
*fragP ATTRIBUTE_UNUSED
;
1532 register segT segment_type ATTRIBUTE_UNUSED
;
1534 printf (_("call tomd_estimate_size_before_relax \n"));
1538 /* Put number into target byte order. */
1540 md_number_to_chars (ptr
, use
, nbytes
)
1545 number_to_chars_bigendian (ptr
, use
, nbytes
);
1549 md_pcrel_from (fixP
)
1550 fixS
*fixP ATTRIBUTE_UNUSED
;
1555 #ifndef BFD_ASSEMBLER
1557 tc_reloc_mangle (fix_ptr
, intr
, base
)
1559 struct internal_reloc
*intr
;
1563 symbolS
*symbol_ptr
;
1565 symbol_ptr
= fix_ptr
->fx_addsy
;
1567 /* If this relocation is attached to a symbol then it's ok
1569 if (fix_ptr
->fx_r_type
== TC_CONS_RELOC
)
1571 /* cons likes to create reloc32's whatever the size of the reloc..
1573 switch (fix_ptr
->fx_size
)
1576 intr
->r_type
= R_RELLONG
;
1579 intr
->r_type
= R_RELWORD
;
1582 intr
->r_type
= R_RELBYTE
;
1590 intr
->r_type
= fix_ptr
->fx_r_type
;
1593 intr
->r_vaddr
= fix_ptr
->fx_frag
->fr_address
+ fix_ptr
->fx_where
+ base
;
1594 intr
->r_offset
= fix_ptr
->fx_offset
;
1598 if (symbol_ptr
->sy_number
!= -1)
1599 intr
->r_symndx
= symbol_ptr
->sy_number
;
1604 /* This case arises when a reference is made to `.'. */
1605 segsym
= seg_info (S_GET_SEGMENT (symbol_ptr
))->dot
;
1607 intr
->r_symndx
= -1;
1610 intr
->r_symndx
= segsym
->sy_number
;
1611 intr
->r_offset
+= S_GET_VALUE (symbol_ptr
);
1616 intr
->r_symndx
= -1;
1618 #else /* BFD_ASSEMBLER */
1620 tc_gen_reloc (section
, fixp
)
1621 asection
*section ATTRIBUTE_UNUSED
;
1625 bfd_reloc_code_real_type r_type
;
1627 rel
= (arelent
*) xmalloc (sizeof (arelent
));
1628 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
1629 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
1630 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1631 rel
->addend
= fixp
->fx_offset
;
1633 r_type
= fixp
->fx_r_type
;
1637 fprintf (stderr
, "%s\n", bfd_get_reloc_code_name (r_type
));
1640 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
1641 if (rel
->howto
== NULL
)
1643 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1644 _("Cannot represent relocation type %s"),
1645 bfd_get_reloc_code_name (r_type
));