1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright (C) 1998-2024 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
56 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
58 /* Some systems define MIN in, e.g., param.h. */
60 #define MIN(a,b) ((a) < (b) ? (a) : (b))
63 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
64 #define CURR_SLOT md.slot[md.curr_slot]
66 #define O_pseudo_fixup (O_max + 1)
70 /* IA-64 ABI section pseudo-ops. */
71 SPECIAL_SECTION_SBSS
= 0,
72 SPECIAL_SECTION_SDATA
,
73 SPECIAL_SECTION_RODATA
,
74 SPECIAL_SECTION_COMMENT
,
75 SPECIAL_SECTION_UNWIND
,
76 SPECIAL_SECTION_UNWIND_INFO
,
77 /* HPUX specific section pseudo-ops. */
78 SPECIAL_SECTION_INIT_ARRAY
,
79 SPECIAL_SECTION_FINI_ARRAY
,
96 FUNC_LT_FPTR_RELATIVE
,
102 FUNC_SLOTCOUNT_RELOC
,
109 REG_FR
= (REG_GR
+ 128),
110 REG_AR
= (REG_FR
+ 128),
111 REG_CR
= (REG_AR
+ 128),
112 REG_DAHR
= (REG_CR
+ 128),
113 REG_P
= (REG_DAHR
+ 8),
114 REG_BR
= (REG_P
+ 64),
115 REG_IP
= (REG_BR
+ 8),
122 /* The following are pseudo-registers for use by gas only. */
134 /* The following pseudo-registers are used for unwind directives only: */
142 DYNREG_GR
= 0, /* dynamic general purpose register */
143 DYNREG_FR
, /* dynamic floating point register */
144 DYNREG_PR
, /* dynamic predicate register */
148 enum operand_match_result
151 OPERAND_OUT_OF_RANGE
,
155 /* On the ia64, we can't know the address of a text label until the
156 instructions are packed into a bundle. To handle this, we keep
157 track of the list of labels that appear in front of each
161 struct label_fix
*next
;
163 bool dw2_mark_labels
;
167 /* An internally used relocation. */
168 #define DUMMY_RELOC_IA64_SLOTCOUNT (BFD_RELOC_UNUSED + 1)
171 /* This is the endianness of the current section. */
172 extern int target_big_endian
;
174 /* This is the default endianness. */
175 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
177 void (*ia64_number_to_chars
) (char *, valueT
, int);
179 static void ia64_float_to_chars_bigendian (char *, LITTLENUM_TYPE
*, int);
180 static void ia64_float_to_chars_littleendian (char *, LITTLENUM_TYPE
*, int);
182 static void (*ia64_float_to_chars
) (char *, LITTLENUM_TYPE
*, int);
184 static htab_t alias_hash
;
185 static htab_t alias_name_hash
;
186 static htab_t secalias_hash
;
187 static htab_t secalias_name_hash
;
189 /* List of chars besides those in app.c:symbol_chars that can start an
190 operand. Used to prevent the scrubber eating vital white-space. */
191 const char ia64_symbol_chars
[] = "@?";
193 /* Characters which always start a comment. */
194 const char comment_chars
[] = "";
196 /* Characters which start a comment at the beginning of a line. */
197 const char line_comment_chars
[] = "#";
199 /* Characters which may be used to separate multiple commands on a
201 const char line_separator_chars
[] = ";{}";
203 /* Characters which are used to indicate an exponent in a floating
205 const char EXP_CHARS
[] = "eE";
207 /* Characters which mean that a number is a floating point constant,
209 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
211 /* ia64-specific option processing: */
213 const char *md_shortopts
= "m:N:x::";
215 struct option md_longopts
[] =
217 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
218 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
219 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
220 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
223 size_t md_longopts_size
= sizeof (md_longopts
);
227 htab_t pseudo_hash
; /* pseudo opcode hash table */
228 htab_t reg_hash
; /* register name hash table */
229 htab_t dynreg_hash
; /* dynamic register hash table */
230 htab_t const_hash
; /* constant hash table */
231 htab_t entry_hash
; /* code entry hint hash table */
233 /* If X_op is != O_absent, the register name for the instruction's
234 qualifying predicate. If NULL, p0 is assumed for instructions
235 that are predictable. */
238 /* Optimize for which CPU. */
245 /* What to do when hint.b is used. */
257 explicit_mode
: 1, /* which mode we're in */
258 default_explicit_mode
: 1, /* which mode is the default */
259 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
261 keep_pending_output
: 1;
263 /* What to do when something is wrong with unwind directives. */
266 unwind_check_warning
,
270 /* Each bundle consists of up to three instructions. We keep
271 track of four most recent instructions so we can correctly set
272 the end_of_insn_group for the last instruction in a bundle. */
274 int num_slots_in_use
;
278 end_of_insn_group
: 1,
279 manual_bundling_on
: 1,
280 manual_bundling_off
: 1,
281 loc_directive_seen
: 1;
282 signed char user_template
; /* user-selected template, if any */
283 unsigned char qp_regno
; /* qualifying predicate */
284 /* This duplicates a good fraction of "struct fix" but we
285 can't use a "struct fix" instead since we can't call
286 fix_new_exp() until we know the address of the instruction. */
290 bfd_reloc_code_real_type code
;
291 enum ia64_opnd opnd
; /* type of operand in need of fix */
292 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
293 expressionS expr
; /* the value to be inserted */
295 fixup
[2]; /* at most two fixups per insn */
296 struct ia64_opcode
*idesc
;
297 struct label_fix
*label_fixups
;
298 struct label_fix
*tag_fixups
;
299 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
301 const char *src_file
;
302 unsigned int src_line
;
303 struct dwarf2_line_info debug_line
;
308 subsegT last_text_subseg
;
312 struct dynreg
*next
; /* next dynamic register */
314 unsigned short base
; /* the base register number */
315 unsigned short num_regs
; /* # of registers in this set */
317 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
319 flagword flags
; /* ELF-header flags */
322 unsigned hint
:1; /* is this hint currently valid? */
323 bfd_vma offset
; /* mem.offset offset */
324 bfd_vma base
; /* mem.offset base */
327 int path
; /* number of alt. entry points seen */
328 const char **entry_labels
; /* labels of all alternate paths in
329 the current DV-checking block. */
330 int maxpaths
; /* size currently allocated for
333 int pointer_size
; /* size in bytes of a pointer */
334 int pointer_size_shift
; /* shift size of a pointer for alignment */
336 symbolS
*indregsym
[IND_RR
- IND_CPUID
+ 1];
340 /* These are not const, because they are modified to MMI for non-itanium1
342 /* MFI bundle of nops. */
343 static unsigned char le_nop
[16] =
345 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
348 /* MFI bundle of nops with stop-bit. */
349 static unsigned char le_nop_stop
[16] =
351 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
352 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
355 /* application registers: */
361 #define AR_BSPSTORE 18
387 {"ar.k0", AR_K0
}, {"ar.k1", AR_K0
+ 1},
388 {"ar.k2", AR_K0
+ 2}, {"ar.k3", AR_K0
+ 3},
389 {"ar.k4", AR_K0
+ 4}, {"ar.k5", AR_K0
+ 5},
390 {"ar.k6", AR_K0
+ 6}, {"ar.k7", AR_K7
},
391 {"ar.rsc", AR_RSC
}, {"ar.bsp", AR_BSP
},
392 {"ar.bspstore", AR_BSPSTORE
}, {"ar.rnat", AR_RNAT
},
393 {"ar.fcr", AR_FCR
}, {"ar.eflag", AR_EFLAG
},
394 {"ar.csd", AR_CSD
}, {"ar.ssd", AR_SSD
},
395 {"ar.cflg", AR_CFLG
}, {"ar.fsr", AR_FSR
},
396 {"ar.fir", AR_FIR
}, {"ar.fdr", AR_FDR
},
397 {"ar.ccv", AR_CCV
}, {"ar.unat", AR_UNAT
},
398 {"ar.fpsr", AR_FPSR
}, {"ar.itc", AR_ITC
},
399 {"ar.ruc", AR_RUC
}, {"ar.pfs", AR_PFS
},
400 {"ar.lc", AR_LC
}, {"ar.ec", AR_EC
},
403 /* control registers: */
444 {"cr.gpta", CR_GPTA
},
445 {"cr.ipsr", CR_IPSR
},
449 {"cr.itir", CR_ITIR
},
450 {"cr.iipa", CR_IIPA
},
454 {"cr.iib0", CR_IIB0
},
455 {"cr.iib1", CR_IIB1
},
460 {"cr.irr0", CR_IRR0
},
461 {"cr.irr1", CR_IRR0
+ 1},
462 {"cr.irr2", CR_IRR0
+ 2},
463 {"cr.irr3", CR_IRR3
},
466 {"cr.cmcv", CR_CMCV
},
467 {"cr.lrr0", CR_LRR0
},
476 static const struct const_desc
483 /* PSR constant masks: */
486 {"psr.be", ((valueT
) 1) << 1},
487 {"psr.up", ((valueT
) 1) << 2},
488 {"psr.ac", ((valueT
) 1) << 3},
489 {"psr.mfl", ((valueT
) 1) << 4},
490 {"psr.mfh", ((valueT
) 1) << 5},
492 {"psr.ic", ((valueT
) 1) << 13},
493 {"psr.i", ((valueT
) 1) << 14},
494 {"psr.pk", ((valueT
) 1) << 15},
496 {"psr.dt", ((valueT
) 1) << 17},
497 {"psr.dfl", ((valueT
) 1) << 18},
498 {"psr.dfh", ((valueT
) 1) << 19},
499 {"psr.sp", ((valueT
) 1) << 20},
500 {"psr.pp", ((valueT
) 1) << 21},
501 {"psr.di", ((valueT
) 1) << 22},
502 {"psr.si", ((valueT
) 1) << 23},
503 {"psr.db", ((valueT
) 1) << 24},
504 {"psr.lp", ((valueT
) 1) << 25},
505 {"psr.tb", ((valueT
) 1) << 26},
506 {"psr.rt", ((valueT
) 1) << 27},
507 /* 28-31: reserved */
508 /* 32-33: cpl (current privilege level) */
509 {"psr.is", ((valueT
) 1) << 34},
510 {"psr.mc", ((valueT
) 1) << 35},
511 {"psr.it", ((valueT
) 1) << 36},
512 {"psr.id", ((valueT
) 1) << 37},
513 {"psr.da", ((valueT
) 1) << 38},
514 {"psr.dd", ((valueT
) 1) << 39},
515 {"psr.ss", ((valueT
) 1) << 40},
516 /* 41-42: ri (restart instruction) */
517 {"psr.ed", ((valueT
) 1) << 43},
518 {"psr.bn", ((valueT
) 1) << 44},
521 /* indirect register-sets/memory: */
530 { "CPUID", IND_CPUID
},
531 { "cpuid", IND_CPUID
},
540 { "dahr", IND_DAHR
},
544 /* Pseudo functions used to indicate relocation types (these functions
545 start with an at sign (@). */
567 /* reloc pseudo functions (these must come first!): */
568 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
569 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
570 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
571 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
572 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
573 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
574 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
575 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
576 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
577 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
578 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
579 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
580 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
581 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
582 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
583 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
584 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
586 { "slotcount", PSEUDO_FUNC_RELOC
, { 0 } },
589 /* mbtype4 constants: */
590 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
591 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
592 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
593 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
594 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
596 /* fclass constants: */
597 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
598 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
599 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
600 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
601 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
602 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
603 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
604 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
605 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
607 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
609 /* hint constants: */
610 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
611 { "priority", PSEUDO_FUNC_CONST
, { 0x1 } },
614 { "clz", PSEUDO_FUNC_CONST
, { 32 } },
615 { "mpy", PSEUDO_FUNC_CONST
, { 33 } },
616 { "datahints", PSEUDO_FUNC_CONST
, { 34 } },
618 /* unwind-related constants: */
619 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
620 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
621 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
622 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_GNU
} },
623 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
624 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
625 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
627 /* unwind-related registers: */
628 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
631 /* 41-bit nop opcodes (one per unit): */
632 static const bfd_vma nop
[IA64_NUM_UNITS
] =
634 0x0000000000LL
, /* NIL => break 0 */
635 0x0008000000LL
, /* I-unit nop */
636 0x0008000000LL
, /* M-unit nop */
637 0x4000000000LL
, /* B-unit nop */
638 0x0008000000LL
, /* F-unit nop */
639 0x0000000000LL
, /* L-"unit" nop immediate */
640 0x0008000000LL
, /* X-unit nop */
643 /* Can't be `const' as it's passed to input routines (which have the
644 habit of setting temporary sentinels. */
645 static char special_section_name
[][20] =
647 {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
648 {".IA_64.unwind"}, {".IA_64.unwind_info"},
649 {".init_array"}, {".fini_array"}
652 /* The best template for a particular sequence of up to three
654 #define N IA64_NUM_TYPES
655 static unsigned char best_template
[N
][N
][N
];
658 /* Resource dependencies currently in effect */
660 int depind
; /* dependency index */
661 const struct ia64_dependency
*dependency
; /* actual dependency */
662 unsigned specific
:1, /* is this a specific bit/regno? */
663 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
664 int index
; /* specific regno/bit within dependency */
665 int note
; /* optional qualifying note (0 if none) */
669 int insn_srlz
; /* current insn serialization state */
670 int data_srlz
; /* current data serialization state */
671 int qp_regno
; /* qualifying predicate for this usage */
672 const char *file
; /* what file marked this dependency */
673 unsigned int line
; /* what line marked this dependency */
674 struct mem_offset mem_offset
; /* optional memory offset hint */
675 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
676 int path
; /* corresponding code entry index */
678 static int regdepslen
= 0;
679 static int regdepstotlen
= 0;
680 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
681 static const char *dv_sem
[] = { "none", "implied", "impliedf",
682 "data", "instr", "specific", "stop", "other" };
683 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
685 /* Current state of PR mutexation */
686 static struct qpmutex
{
689 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
690 static int qp_mutexeslen
= 0;
691 static int qp_mutexestotlen
= 0;
692 static valueT qp_safe_across_calls
= 0;
694 /* Current state of PR implications */
695 static struct qp_imply
{
698 unsigned p2_branched
:1;
700 } *qp_implies
= NULL
;
701 static int qp_implieslen
= 0;
702 static int qp_impliestotlen
= 0;
704 /* Keep track of static GR values so that indirect register usage can
705 sometimes be tracked. */
716 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
722 /* Remember the alignment frag. */
723 static fragS
*align_frag
;
725 /* These are the routines required to output the various types of
728 /* A slot_number is a frag address plus the slot index (0-2). We use the
729 frag address here so that if there is a section switch in the middle of
730 a function, then instructions emitted to a different section are not
731 counted. Since there may be more than one frag for a function, this
732 means we also need to keep track of which frag this address belongs to
733 so we can compute inter-frag distances. This also nicely solves the
734 problem with nops emitted for align directives, which can't easily be
735 counted, but can easily be derived from frag sizes. */
737 typedef struct unw_rec_list
{
739 unsigned long slot_number
;
741 struct unw_rec_list
*next
;
744 #define SLOT_NUM_NOT_SET (unsigned)-1
746 /* Linked list of saved prologue counts. A very poor
747 implementation of a map from label numbers to prologue counts. */
748 typedef struct label_prologue_count
750 struct label_prologue_count
*next
;
751 unsigned long label_number
;
752 unsigned int prologue_count
;
753 } label_prologue_count
;
755 typedef struct proc_pending
758 struct proc_pending
*next
;
763 /* Maintain a list of unwind entries for the current function. */
767 /* Any unwind entries that should be attached to the current slot
768 that an insn is being constructed for. */
769 unw_rec_list
*current_entry
;
771 /* These are used to create the unwind table entry for this function. */
772 proc_pending proc_pending
;
773 symbolS
*info
; /* pointer to unwind info */
774 symbolS
*personality_routine
;
776 subsegT saved_text_subseg
;
777 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
779 /* TRUE if processing unwind directives in a prologue region. */
780 unsigned int prologue
: 1;
781 unsigned int prologue_mask
: 4;
782 unsigned int prologue_gr
: 7;
783 unsigned int body
: 1;
784 unsigned int insn
: 1;
785 unsigned int prologue_count
; /* number of .prologues seen so far */
786 /* Prologue counts at previous .label_state directives. */
787 struct label_prologue_count
* saved_prologue_counts
;
789 /* List of split up .save-s. */
790 unw_p_record
*pending_saves
;
793 /* The input value is a negated offset from psp, and specifies an address
794 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
795 must add 16 and divide by 4 to get the encoded value. */
797 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
799 typedef void (*vbyte_func
) (int, char *, char *);
801 /* Forward declarations: */
802 static void dot_alias (int);
803 static int parse_operand_and_eval (expressionS
*, int);
804 static void emit_one_bundle (void);
805 static bfd_reloc_code_real_type
ia64_gen_real_reloc_type (struct symbol
*,
806 bfd_reloc_code_real_type
);
807 static void insn_group_break (int, int, int);
808 static void add_qp_mutex (valueT
);
809 static void add_qp_imply (int, int);
810 static void clear_qp_mutex (valueT
);
811 static void clear_qp_implies (valueT
, valueT
);
812 static void print_dependency (const char *, int);
813 static void instruction_serialization (void);
814 static void data_serialization (void);
815 static void output_R3_format (vbyte_func
, unw_record_type
, unsigned long);
816 static void output_B3_format (vbyte_func
, unsigned long, unsigned long);
817 static void output_B4_format (vbyte_func
, unw_record_type
, unsigned long);
818 static void free_saved_prologue_counts (void);
820 /* Determine if application register REGNUM resides only in the integer
821 unit (as opposed to the memory unit). */
823 ar_is_only_in_integer_unit (int reg
)
826 return reg
>= 64 && reg
<= 111;
829 /* Determine if application register REGNUM resides only in the memory
830 unit (as opposed to the integer unit). */
832 ar_is_only_in_memory_unit (int reg
)
835 return reg
>= 0 && reg
<= 47;
838 /* Switch to section NAME and create section if necessary. It's
839 rather ugly that we have to manipulate input_line_pointer but I
840 don't see any other way to accomplish the same thing without
841 changing obj-elf.c (which may be the Right Thing, in the end). */
843 set_section (char *name
)
845 char *saved_input_line_pointer
;
847 saved_input_line_pointer
= input_line_pointer
;
848 input_line_pointer
= name
;
850 input_line_pointer
= saved_input_line_pointer
;
853 /* Map 's' to SHF_IA_64_SHORT. */
856 ia64_elf_section_letter (int letter
, const char **ptr_msg
)
859 return SHF_IA_64_SHORT
;
860 else if (letter
== 'o')
861 return SHF_LINK_ORDER
;
863 else if (letter
== 'O')
864 return SHF_IA_64_VMS_OVERLAID
;
865 else if (letter
== 'g')
866 return SHF_IA_64_VMS_GLOBAL
;
869 *ptr_msg
= _("bad .section directive: want a,o,s,w,x,M,S,G,T in string");
873 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
876 ia64_elf_section_flags (flagword flags
,
878 int type ATTRIBUTE_UNUSED
)
880 if (attr
& SHF_IA_64_SHORT
)
881 flags
|= SEC_SMALL_DATA
;
886 ia64_elf_section_type (const char *str
, size_t len
)
888 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
890 if (STREQ (ELF_STRING_ia64_unwind_info
))
893 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
896 if (STREQ (ELF_STRING_ia64_unwind
))
897 return SHT_IA_64_UNWIND
;
899 if (STREQ (ELF_STRING_ia64_unwind_once
))
900 return SHT_IA_64_UNWIND
;
902 if (STREQ ("unwind"))
903 return SHT_IA_64_UNWIND
;
910 set_regstack (unsigned int ins
,
918 sof
= ins
+ locs
+ outs
;
921 as_bad (_("Size of frame exceeds maximum of 96 registers"));
926 as_warn (_("Size of rotating registers exceeds frame size"));
929 md
.in
.base
= REG_GR
+ 32;
930 md
.loc
.base
= md
.in
.base
+ ins
;
931 md
.out
.base
= md
.loc
.base
+ locs
;
933 md
.in
.num_regs
= ins
;
934 md
.loc
.num_regs
= locs
;
935 md
.out
.num_regs
= outs
;
936 md
.rot
.num_regs
= rots
;
941 ia64_flush_insns (void)
943 struct label_fix
*lfix
;
945 subsegT saved_subseg
;
949 if (!md
.last_text_seg
)
953 saved_subseg
= now_subseg
;
955 subseg_set (md
.last_text_seg
, md
.last_text_subseg
);
957 while (md
.num_slots_in_use
> 0)
958 emit_one_bundle (); /* force out queued instructions */
960 /* In case there are labels following the last instruction, resolve
963 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
965 symbol_set_value_now (lfix
->sym
);
966 mark
|= lfix
->dw2_mark_labels
;
970 dwarf2_where (&CURR_SLOT
.debug_line
);
971 CURR_SLOT
.debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
972 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT
.debug_line
);
973 dwarf2_consume_line_info ();
975 CURR_SLOT
.label_fixups
= 0;
977 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
978 symbol_set_value_now (lfix
->sym
);
979 CURR_SLOT
.tag_fixups
= 0;
981 /* In case there are unwind directives following the last instruction,
982 resolve those now. We only handle prologue, body, and endp directives
983 here. Give an error for others. */
984 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
992 ptr
->slot_number
= (unsigned long) frag_more (0);
993 ptr
->slot_frag
= frag_now
;
996 /* Allow any record which doesn't have a "t" field (i.e.,
997 doesn't relate to a particular instruction). */
1013 as_bad (_("Unwind directive not followed by an instruction."));
1017 unwind
.current_entry
= NULL
;
1019 subseg_set (saved_seg
, saved_subseg
);
1021 if (md
.qp
.X_op
== O_register
)
1022 as_bad (_("qualifying predicate not followed by instruction"));
1026 ia64_cons_align (int nbytes
)
1031 for (log
= 0; (nbytes
& 1) != 1; nbytes
>>= 1)
1034 do_align (log
, NULL
, 0, 0);
1040 /* .vms_common section, symbol, size, alignment */
1043 obj_elf_vms_common (int ignore ATTRIBUTE_UNUSED
)
1045 const char *sec_name
;
1052 segT current_seg
= now_seg
;
1053 subsegT current_subseg
= now_subseg
;
1057 sec_name
= obj_elf_section_name ();
1058 if (sec_name
== NULL
)
1063 if (*input_line_pointer
== ',')
1065 input_line_pointer
++;
1070 as_bad (_("expected ',' after section name"));
1071 ignore_rest_of_line ();
1075 c
= get_symbol_name (&sym_name
);
1077 if (input_line_pointer
== sym_name
)
1079 (void) restore_line_pointer (c
);
1080 as_bad (_("expected symbol name"));
1081 ignore_rest_of_line ();
1085 symbolP
= symbol_find_or_make (sym_name
);
1086 (void) restore_line_pointer (c
);
1088 if ((S_IS_DEFINED (symbolP
) || symbol_equated_p (symbolP
))
1089 && !S_IS_COMMON (symbolP
))
1091 as_bad (_("Ignoring attempt to re-define symbol"));
1092 ignore_rest_of_line ();
1098 if (*input_line_pointer
== ',')
1100 input_line_pointer
++;
1105 as_bad (_("expected ',' after symbol name"));
1106 ignore_rest_of_line ();
1110 temp
= get_absolute_expression ();
1112 size
&= ((offsetT
) 2 << (stdoutput
->arch_info
->bits_per_address
- 1)) - 1;
1115 as_warn (_("size (%ld) out of range, ignored"), (long) temp
);
1116 ignore_rest_of_line ();
1122 if (*input_line_pointer
== ',')
1124 input_line_pointer
++;
1129 as_bad (_("expected ',' after symbol size"));
1130 ignore_rest_of_line ();
1134 log_align
= get_absolute_expression ();
1136 demand_empty_rest_of_line ();
1138 obj_elf_change_section
1139 (sec_name
, SHT_NOBITS
,
1140 SHF_ALLOC
| SHF_WRITE
| SHF_IA_64_VMS_OVERLAID
| SHF_IA_64_VMS_GLOBAL
,
1143 S_SET_VALUE (symbolP
, 0);
1144 S_SET_SIZE (symbolP
, size
);
1145 S_SET_EXTERNAL (symbolP
);
1146 S_SET_SEGMENT (symbolP
, now_seg
);
1148 symbol_get_bfdsym (symbolP
)->flags
|= BSF_OBJECT
;
1150 record_alignment (now_seg
, log_align
);
1152 cur_size
= bfd_section_size (now_seg
);
1153 if ((int) size
> cur_size
)
1156 = frag_var (rs_fill
, 1, 1, (relax_substateT
)0, NULL
,
1157 (valueT
)size
- (valueT
)cur_size
, NULL
);
1159 bfd_set_section_size (now_seg
, size
);
1162 /* Switch back to current segment. */
1163 subseg_set (current_seg
, current_subseg
);
1165 #ifdef md_elf_section_change_hook
1166 md_elf_section_change_hook ();
1172 /* Output COUNT bytes to a memory location. */
1173 static char *vbyte_mem_ptr
= NULL
;
1176 output_vbyte_mem (int count
, char *ptr
, char *comment ATTRIBUTE_UNUSED
)
1179 if (vbyte_mem_ptr
== NULL
)
1184 for (x
= 0; x
< count
; x
++)
1185 *(vbyte_mem_ptr
++) = ptr
[x
];
1188 /* Count the number of bytes required for records. */
1189 static int vbyte_count
= 0;
1191 count_output (int count
,
1192 char *ptr ATTRIBUTE_UNUSED
,
1193 char *comment ATTRIBUTE_UNUSED
)
1195 vbyte_count
+= count
;
1199 output_R1_format (vbyte_func f
, unw_record_type rtype
, int rlen
)
1205 output_R3_format (f
, rtype
, rlen
);
1211 else if (rtype
!= prologue
)
1212 as_bad (_("record type is not valid"));
1214 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1215 (*f
) (1, &byte
, NULL
);
1219 output_R2_format (vbyte_func f
, int mask
, int grsave
, unsigned long rlen
)
1223 mask
= (mask
& 0x0f);
1224 grsave
= (grsave
& 0x7f);
1226 bytes
[0] = (UNW_R2
| (mask
>> 1));
1227 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1228 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1229 (*f
) (count
, bytes
, NULL
);
1233 output_R3_format (vbyte_func f
, unw_record_type rtype
, unsigned long rlen
)
1239 output_R1_format (f
, rtype
, rlen
);
1245 else if (rtype
!= prologue
)
1246 as_bad (_("record type is not valid"));
1247 bytes
[0] = (UNW_R3
| r
);
1248 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1249 (*f
) (count
+ 1, bytes
, NULL
);
1253 output_P1_format (vbyte_func f
, int brmask
)
1256 byte
= UNW_P1
| (brmask
& 0x1f);
1257 (*f
) (1, &byte
, NULL
);
1261 output_P2_format (vbyte_func f
, int brmask
, int gr
)
1264 brmask
= (brmask
& 0x1f);
1265 bytes
[0] = UNW_P2
| (brmask
>> 1);
1266 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1267 (*f
) (2, bytes
, NULL
);
1271 output_P3_format (vbyte_func f
, unw_record_type rtype
, int reg
)
1315 as_bad (_("Invalid record type for P3 format."));
1317 bytes
[0] = (UNW_P3
| (r
>> 1));
1318 bytes
[1] = (((r
& 1) << 7) | reg
);
1319 (*f
) (2, bytes
, NULL
);
1323 output_P4_format (vbyte_func f
, unsigned char *imask
, unsigned long imask_size
)
1326 (*f
) (imask_size
, (char *) imask
, NULL
);
1330 output_P5_format (vbyte_func f
, int grmask
, unsigned long frmask
)
1333 grmask
= (grmask
& 0x0f);
1336 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1337 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1338 bytes
[3] = (frmask
& 0x000000ff);
1339 (*f
) (4, bytes
, NULL
);
1343 output_P6_format (vbyte_func f
, unw_record_type rtype
, int rmask
)
1348 if (rtype
== gr_mem
)
1350 else if (rtype
!= fr_mem
)
1351 as_bad (_("Invalid record type for format P6"));
1352 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1353 (*f
) (1, &byte
, NULL
);
1357 output_P7_format (vbyte_func f
,
1358 unw_record_type rtype
,
1365 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1370 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1420 bytes
[0] = (UNW_P7
| r
);
1421 (*f
) (count
, bytes
, NULL
);
1425 output_P8_format (vbyte_func f
, unw_record_type rtype
, unsigned long t
)
1463 case bspstore_psprel
:
1466 case bspstore_sprel
:
1478 case priunat_when_gr
:
1481 case priunat_psprel
:
1487 case priunat_when_mem
:
1494 count
+= output_leb128 (bytes
+ 2, t
, 0);
1495 (*f
) (count
, bytes
, NULL
);
1499 output_P9_format (vbyte_func f
, int grmask
, int gr
)
1503 bytes
[1] = (grmask
& 0x0f);
1504 bytes
[2] = (gr
& 0x7f);
1505 (*f
) (3, bytes
, NULL
);
1509 output_P10_format (vbyte_func f
, int abi
, int context
)
1513 bytes
[1] = (abi
& 0xff);
1514 bytes
[2] = (context
& 0xff);
1515 (*f
) (3, bytes
, NULL
);
1519 output_B1_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1525 output_B4_format (f
, rtype
, label
);
1528 if (rtype
== copy_state
)
1530 else if (rtype
!= label_state
)
1531 as_bad (_("Invalid record type for format B1"));
1533 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1534 (*f
) (1, &byte
, NULL
);
1538 output_B2_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1544 output_B3_format (f
, ecount
, t
);
1547 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1548 count
+= output_leb128 (bytes
+ 1, t
, 0);
1549 (*f
) (count
, bytes
, NULL
);
1553 output_B3_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1559 output_B2_format (f
, ecount
, t
);
1563 count
+= output_leb128 (bytes
+ 1, t
, 0);
1564 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1565 (*f
) (count
, bytes
, NULL
);
1569 output_B4_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1576 output_B1_format (f
, rtype
, label
);
1580 if (rtype
== copy_state
)
1582 else if (rtype
!= label_state
)
1583 as_bad (_("Invalid record type for format B1"));
1585 bytes
[0] = (UNW_B4
| (r
<< 3));
1586 count
+= output_leb128 (bytes
+ 1, label
, 0);
1587 (*f
) (count
, bytes
, NULL
);
1591 format_ab_reg (int ab
, int reg
)
1596 ret
= (ab
<< 5) | reg
;
1601 output_X1_format (vbyte_func f
,
1602 unw_record_type rtype
,
1613 if (rtype
== spill_sprel
)
1615 else if (rtype
!= spill_psprel
)
1616 as_bad (_("Invalid record type for format X1"));
1617 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1618 count
+= output_leb128 (bytes
+ 2, t
, 0);
1619 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1620 (*f
) (count
, bytes
, NULL
);
1624 output_X2_format (vbyte_func f
,
1635 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1636 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1637 count
+= output_leb128 (bytes
+ 3, t
, 0);
1638 (*f
) (count
, bytes
, NULL
);
1642 output_X3_format (vbyte_func f
,
1643 unw_record_type rtype
,
1655 if (rtype
== spill_sprel_p
)
1657 else if (rtype
!= spill_psprel_p
)
1658 as_bad (_("Invalid record type for format X3"));
1659 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1660 bytes
[2] = format_ab_reg (ab
, reg
);
1661 count
+= output_leb128 (bytes
+ 3, t
, 0);
1662 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1663 (*f
) (count
, bytes
, NULL
);
1667 output_X4_format (vbyte_func f
,
1679 bytes
[1] = (qp
& 0x3f);
1680 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1681 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1682 count
+= output_leb128 (bytes
+ 4, t
, 0);
1683 (*f
) (count
, bytes
, NULL
);
1686 /* This function checks whether there are any outstanding .save-s and
1687 discards them if so. */
1690 check_pending_save (void)
1692 if (unwind
.pending_saves
)
1694 unw_rec_list
*cur
, *prev
;
1696 as_warn (_("Previous .save incomplete"));
1697 for (cur
= unwind
.list
, prev
= NULL
; cur
; )
1698 if (&cur
->r
.record
.p
== unwind
.pending_saves
)
1701 prev
->next
= cur
->next
;
1703 unwind
.list
= cur
->next
;
1704 if (cur
== unwind
.tail
)
1706 if (cur
== unwind
.current_entry
)
1707 unwind
.current_entry
= cur
->next
;
1708 /* Don't free the first discarded record, it's being used as
1709 terminator for (currently) br_gr and gr_gr processing, and
1710 also prevents leaving a dangling pointer to it in its
1712 cur
->r
.record
.p
.grmask
= 0;
1713 cur
->r
.record
.p
.brmask
= 0;
1714 cur
->r
.record
.p
.frmask
= 0;
1715 prev
= cur
->r
.record
.p
.next
;
1716 cur
->r
.record
.p
.next
= NULL
;
1728 cur
= cur
->r
.record
.p
.next
;
1731 unwind
.pending_saves
= NULL
;
1735 /* This function allocates a record list structure, and initializes fields. */
1737 static unw_rec_list
*
1738 alloc_record (unw_record_type t
)
1741 ptr
= XNEW (unw_rec_list
);
1742 memset (ptr
, 0, sizeof (*ptr
));
1743 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1748 /* Dummy unwind record used for calculating the length of the last prologue or
1751 static unw_rec_list
*
1754 unw_rec_list
*ptr
= alloc_record (endp
);
1758 static unw_rec_list
*
1759 output_prologue (void)
1761 unw_rec_list
*ptr
= alloc_record (prologue
);
1765 static unw_rec_list
*
1766 output_prologue_gr (unsigned int saved_mask
, unsigned int reg
)
1768 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1769 ptr
->r
.record
.r
.grmask
= saved_mask
;
1770 ptr
->r
.record
.r
.grsave
= reg
;
1774 static unw_rec_list
*
1777 unw_rec_list
*ptr
= alloc_record (body
);
1781 static unw_rec_list
*
1782 output_mem_stack_f (unsigned int size
)
1784 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1785 ptr
->r
.record
.p
.size
= size
;
1789 static unw_rec_list
*
1790 output_mem_stack_v (void)
1792 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1796 static unw_rec_list
*
1797 output_psp_gr (unsigned int gr
)
1799 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1800 ptr
->r
.record
.p
.r
.gr
= gr
;
1804 static unw_rec_list
*
1805 output_psp_sprel (unsigned int offset
)
1807 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1808 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1812 static unw_rec_list
*
1813 output_rp_when (void)
1815 unw_rec_list
*ptr
= alloc_record (rp_when
);
1819 static unw_rec_list
*
1820 output_rp_gr (unsigned int gr
)
1822 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1823 ptr
->r
.record
.p
.r
.gr
= gr
;
1827 static unw_rec_list
*
1828 output_rp_br (unsigned int br
)
1830 unw_rec_list
*ptr
= alloc_record (rp_br
);
1831 ptr
->r
.record
.p
.r
.br
= br
;
1835 static unw_rec_list
*
1836 output_rp_psprel (unsigned int offset
)
1838 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1839 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1843 static unw_rec_list
*
1844 output_rp_sprel (unsigned int offset
)
1846 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1847 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1851 static unw_rec_list
*
1852 output_pfs_when (void)
1854 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1858 static unw_rec_list
*
1859 output_pfs_gr (unsigned int gr
)
1861 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1862 ptr
->r
.record
.p
.r
.gr
= gr
;
1866 static unw_rec_list
*
1867 output_pfs_psprel (unsigned int offset
)
1869 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1870 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1874 static unw_rec_list
*
1875 output_pfs_sprel (unsigned int offset
)
1877 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1878 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1882 static unw_rec_list
*
1883 output_preds_when (void)
1885 unw_rec_list
*ptr
= alloc_record (preds_when
);
1889 static unw_rec_list
*
1890 output_preds_gr (unsigned int gr
)
1892 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1893 ptr
->r
.record
.p
.r
.gr
= gr
;
1897 static unw_rec_list
*
1898 output_preds_psprel (unsigned int offset
)
1900 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1901 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1905 static unw_rec_list
*
1906 output_preds_sprel (unsigned int offset
)
1908 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1909 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1913 static unw_rec_list
*
1914 output_fr_mem (unsigned int mask
)
1916 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1917 unw_rec_list
*cur
= ptr
;
1919 ptr
->r
.record
.p
.frmask
= mask
;
1920 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1923 unw_rec_list
*prev
= cur
;
1925 /* Clear least significant set bit. */
1926 mask
&= ~(mask
& (~mask
+ 1));
1929 cur
= alloc_record (fr_mem
);
1930 cur
->r
.record
.p
.frmask
= mask
;
1931 /* Retain only least significant bit. */
1932 prev
->r
.record
.p
.frmask
^= mask
;
1933 prev
->r
.record
.p
.next
= cur
;
1937 static unw_rec_list
*
1938 output_frgr_mem (unsigned int gr_mask
, unsigned int fr_mask
)
1940 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1941 unw_rec_list
*cur
= ptr
;
1943 unwind
.pending_saves
= &cur
->r
.record
.p
;
1944 cur
->r
.record
.p
.frmask
= fr_mask
;
1947 unw_rec_list
*prev
= cur
;
1949 /* Clear least significant set bit. */
1950 fr_mask
&= ~(fr_mask
& (~fr_mask
+ 1));
1951 if (!gr_mask
&& !fr_mask
)
1953 cur
= alloc_record (frgr_mem
);
1954 cur
->r
.record
.p
.frmask
= fr_mask
;
1955 /* Retain only least significant bit. */
1956 prev
->r
.record
.p
.frmask
^= fr_mask
;
1957 prev
->r
.record
.p
.next
= cur
;
1959 cur
->r
.record
.p
.grmask
= gr_mask
;
1962 unw_rec_list
*prev
= cur
;
1964 /* Clear least significant set bit. */
1965 gr_mask
&= ~(gr_mask
& (~gr_mask
+ 1));
1968 cur
= alloc_record (frgr_mem
);
1969 cur
->r
.record
.p
.grmask
= gr_mask
;
1970 /* Retain only least significant bit. */
1971 prev
->r
.record
.p
.grmask
^= gr_mask
;
1972 prev
->r
.record
.p
.next
= cur
;
1976 static unw_rec_list
*
1977 output_gr_gr (unsigned int mask
, unsigned int reg
)
1979 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1980 unw_rec_list
*cur
= ptr
;
1982 ptr
->r
.record
.p
.grmask
= mask
;
1983 ptr
->r
.record
.p
.r
.gr
= reg
;
1984 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1987 unw_rec_list
*prev
= cur
;
1989 /* Clear least significant set bit. */
1990 mask
&= ~(mask
& (~mask
+ 1));
1993 cur
= alloc_record (gr_gr
);
1994 cur
->r
.record
.p
.grmask
= mask
;
1995 /* Indicate this record shouldn't be output. */
1996 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
1997 /* Retain only least significant bit. */
1998 prev
->r
.record
.p
.grmask
^= mask
;
1999 prev
->r
.record
.p
.next
= cur
;
2003 static unw_rec_list
*
2004 output_gr_mem (unsigned int mask
)
2006 unw_rec_list
*ptr
= alloc_record (gr_mem
);
2007 unw_rec_list
*cur
= ptr
;
2009 ptr
->r
.record
.p
.grmask
= mask
;
2010 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2013 unw_rec_list
*prev
= cur
;
2015 /* Clear least significant set bit. */
2016 mask
&= ~(mask
& (~mask
+ 1));
2019 cur
= alloc_record (gr_mem
);
2020 cur
->r
.record
.p
.grmask
= mask
;
2021 /* Retain only least significant bit. */
2022 prev
->r
.record
.p
.grmask
^= mask
;
2023 prev
->r
.record
.p
.next
= cur
;
2027 static unw_rec_list
*
2028 output_br_mem (unsigned int mask
)
2030 unw_rec_list
*ptr
= alloc_record (br_mem
);
2031 unw_rec_list
*cur
= ptr
;
2033 ptr
->r
.record
.p
.brmask
= mask
;
2034 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2037 unw_rec_list
*prev
= cur
;
2039 /* Clear least significant set bit. */
2040 mask
&= ~(mask
& (~mask
+ 1));
2043 cur
= alloc_record (br_mem
);
2044 cur
->r
.record
.p
.brmask
= mask
;
2045 /* Retain only least significant bit. */
2046 prev
->r
.record
.p
.brmask
^= mask
;
2047 prev
->r
.record
.p
.next
= cur
;
2051 static unw_rec_list
*
2052 output_br_gr (unsigned int mask
, unsigned int reg
)
2054 unw_rec_list
*ptr
= alloc_record (br_gr
);
2055 unw_rec_list
*cur
= ptr
;
2057 ptr
->r
.record
.p
.brmask
= mask
;
2058 ptr
->r
.record
.p
.r
.gr
= reg
;
2059 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2062 unw_rec_list
*prev
= cur
;
2064 /* Clear least significant set bit. */
2065 mask
&= ~(mask
& (~mask
+ 1));
2068 cur
= alloc_record (br_gr
);
2069 cur
->r
.record
.p
.brmask
= mask
;
2070 /* Indicate this record shouldn't be output. */
2071 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2072 /* Retain only least significant bit. */
2073 prev
->r
.record
.p
.brmask
^= mask
;
2074 prev
->r
.record
.p
.next
= cur
;
2078 static unw_rec_list
*
2079 output_spill_base (unsigned int offset
)
2081 unw_rec_list
*ptr
= alloc_record (spill_base
);
2082 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2086 static unw_rec_list
*
2087 output_unat_when (void)
2089 unw_rec_list
*ptr
= alloc_record (unat_when
);
2093 static unw_rec_list
*
2094 output_unat_gr (unsigned int gr
)
2096 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2097 ptr
->r
.record
.p
.r
.gr
= gr
;
2101 static unw_rec_list
*
2102 output_unat_psprel (unsigned int offset
)
2104 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2105 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2109 static unw_rec_list
*
2110 output_unat_sprel (unsigned int offset
)
2112 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2113 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2117 static unw_rec_list
*
2118 output_lc_when (void)
2120 unw_rec_list
*ptr
= alloc_record (lc_when
);
2124 static unw_rec_list
*
2125 output_lc_gr (unsigned int gr
)
2127 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2128 ptr
->r
.record
.p
.r
.gr
= gr
;
2132 static unw_rec_list
*
2133 output_lc_psprel (unsigned int offset
)
2135 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2136 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2140 static unw_rec_list
*
2141 output_lc_sprel (unsigned int offset
)
2143 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2144 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2148 static unw_rec_list
*
2149 output_fpsr_when (void)
2151 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2155 static unw_rec_list
*
2156 output_fpsr_gr (unsigned int gr
)
2158 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2159 ptr
->r
.record
.p
.r
.gr
= gr
;
2163 static unw_rec_list
*
2164 output_fpsr_psprel (unsigned int offset
)
2166 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2167 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2171 static unw_rec_list
*
2172 output_fpsr_sprel (unsigned int offset
)
2174 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2175 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2179 static unw_rec_list
*
2180 output_priunat_when_gr (void)
2182 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2186 static unw_rec_list
*
2187 output_priunat_when_mem (void)
2189 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2193 static unw_rec_list
*
2194 output_priunat_gr (unsigned int gr
)
2196 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2197 ptr
->r
.record
.p
.r
.gr
= gr
;
2201 static unw_rec_list
*
2202 output_priunat_psprel (unsigned int offset
)
2204 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2205 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2209 static unw_rec_list
*
2210 output_priunat_sprel (unsigned int offset
)
2212 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2213 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2217 static unw_rec_list
*
2218 output_bsp_when (void)
2220 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2224 static unw_rec_list
*
2225 output_bsp_gr (unsigned int gr
)
2227 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2228 ptr
->r
.record
.p
.r
.gr
= gr
;
2232 static unw_rec_list
*
2233 output_bsp_psprel (unsigned int offset
)
2235 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2236 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2240 static unw_rec_list
*
2241 output_bsp_sprel (unsigned int offset
)
2243 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2244 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2248 static unw_rec_list
*
2249 output_bspstore_when (void)
2251 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2255 static unw_rec_list
*
2256 output_bspstore_gr (unsigned int gr
)
2258 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2259 ptr
->r
.record
.p
.r
.gr
= gr
;
2263 static unw_rec_list
*
2264 output_bspstore_psprel (unsigned int offset
)
2266 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2267 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2271 static unw_rec_list
*
2272 output_bspstore_sprel (unsigned int offset
)
2274 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2275 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2279 static unw_rec_list
*
2280 output_rnat_when (void)
2282 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2286 static unw_rec_list
*
2287 output_rnat_gr (unsigned int gr
)
2289 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2290 ptr
->r
.record
.p
.r
.gr
= gr
;
2294 static unw_rec_list
*
2295 output_rnat_psprel (unsigned int offset
)
2297 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2298 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2302 static unw_rec_list
*
2303 output_rnat_sprel (unsigned int offset
)
2305 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2306 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2310 static unw_rec_list
*
2311 output_unwabi (unsigned long abi
, unsigned long context
)
2313 unw_rec_list
*ptr
= alloc_record (unwabi
);
2314 ptr
->r
.record
.p
.abi
= abi
;
2315 ptr
->r
.record
.p
.context
= context
;
2319 static unw_rec_list
*
2320 output_epilogue (unsigned long ecount
)
2322 unw_rec_list
*ptr
= alloc_record (epilogue
);
2323 ptr
->r
.record
.b
.ecount
= ecount
;
2327 static unw_rec_list
*
2328 output_label_state (unsigned long label
)
2330 unw_rec_list
*ptr
= alloc_record (label_state
);
2331 ptr
->r
.record
.b
.label
= label
;
2335 static unw_rec_list
*
2336 output_copy_state (unsigned long label
)
2338 unw_rec_list
*ptr
= alloc_record (copy_state
);
2339 ptr
->r
.record
.b
.label
= label
;
2343 static unw_rec_list
*
2344 output_spill_psprel (unsigned int ab
,
2346 unsigned int offset
,
2347 unsigned int predicate
)
2349 unw_rec_list
*ptr
= alloc_record (predicate
? spill_psprel_p
: spill_psprel
);
2350 ptr
->r
.record
.x
.ab
= ab
;
2351 ptr
->r
.record
.x
.reg
= reg
;
2352 ptr
->r
.record
.x
.where
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2353 ptr
->r
.record
.x
.qp
= predicate
;
2357 static unw_rec_list
*
2358 output_spill_sprel (unsigned int ab
,
2360 unsigned int offset
,
2361 unsigned int predicate
)
2363 unw_rec_list
*ptr
= alloc_record (predicate
? spill_sprel_p
: spill_sprel
);
2364 ptr
->r
.record
.x
.ab
= ab
;
2365 ptr
->r
.record
.x
.reg
= reg
;
2366 ptr
->r
.record
.x
.where
.spoff
= offset
/ 4;
2367 ptr
->r
.record
.x
.qp
= predicate
;
2371 static unw_rec_list
*
2372 output_spill_reg (unsigned int ab
,
2374 unsigned int targ_reg
,
2376 unsigned int predicate
)
2378 unw_rec_list
*ptr
= alloc_record (predicate
? spill_reg_p
: spill_reg
);
2379 ptr
->r
.record
.x
.ab
= ab
;
2380 ptr
->r
.record
.x
.reg
= reg
;
2381 ptr
->r
.record
.x
.where
.reg
= targ_reg
;
2382 ptr
->r
.record
.x
.xy
= xy
;
2383 ptr
->r
.record
.x
.qp
= predicate
;
2387 /* Given a unw_rec_list process the correct format with the
2388 specified function. */
2391 process_one_record (unw_rec_list
*ptr
, vbyte_func f
)
2393 unsigned int fr_mask
, gr_mask
;
2395 switch (ptr
->r
.type
)
2397 /* This is a dummy record that takes up no space in the output. */
2405 /* These are taken care of by prologue/prologue_gr. */
2410 if (ptr
->r
.type
== prologue_gr
)
2411 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2412 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2414 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2416 /* Output descriptor(s) for union of register spills (if any). */
2417 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2418 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2421 if ((fr_mask
& ~0xfUL
) == 0)
2422 output_P6_format (f
, fr_mem
, fr_mask
);
2425 output_P5_format (f
, gr_mask
, fr_mask
);
2430 output_P6_format (f
, gr_mem
, gr_mask
);
2431 if (ptr
->r
.record
.r
.mask
.br_mem
)
2432 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2434 /* output imask descriptor if necessary: */
2435 if (ptr
->r
.record
.r
.mask
.i
)
2436 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2437 ptr
->r
.record
.r
.imask_size
);
2441 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2445 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2446 ptr
->r
.record
.p
.size
);
2459 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.r
.gr
);
2462 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.r
.br
);
2465 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.off
.sp
, 0);
2473 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2482 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
, 0);
2492 case bspstore_sprel
:
2494 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.sp
);
2497 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2499 const unw_rec_list
*cur
= ptr
;
2501 gr_mask
= cur
->r
.record
.p
.grmask
;
2502 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2503 gr_mask
|= cur
->r
.record
.p
.grmask
;
2504 output_P9_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2508 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2510 const unw_rec_list
*cur
= ptr
;
2512 gr_mask
= cur
->r
.record
.p
.brmask
;
2513 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2514 gr_mask
|= cur
->r
.record
.p
.brmask
;
2515 output_P2_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2519 as_bad (_("spill_mask record unimplemented."));
2521 case priunat_when_gr
:
2522 case priunat_when_mem
:
2526 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2528 case priunat_psprel
:
2530 case bspstore_psprel
:
2532 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
);
2535 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2538 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2542 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2545 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2546 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2547 ptr
->r
.record
.x
.where
.pspoff
);
2550 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2551 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2552 ptr
->r
.record
.x
.where
.spoff
);
2555 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2556 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2557 ptr
->r
.record
.x
.where
.reg
, ptr
->r
.record
.x
.t
);
2559 case spill_psprel_p
:
2560 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2561 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2562 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.pspoff
);
2565 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2566 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2567 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.spoff
);
2570 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2571 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2572 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.where
.reg
,
2576 as_bad (_("record_type_not_valid"));
2581 /* Given a unw_rec_list list, process all the records with
2582 the specified function. */
2584 process_unw_records (unw_rec_list
*list
, vbyte_func f
)
2587 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2588 process_one_record (ptr
, f
);
2591 /* Determine the size of a record list in bytes. */
2593 calc_record_size (unw_rec_list
*list
)
2596 process_unw_records (list
, count_output
);
2600 /* Return the number of bits set in the input value.
2601 Perhaps this has a better place... */
2602 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2603 # define popcount __builtin_popcount
2606 popcount (unsigned x
)
2608 static const unsigned char popcnt
[16] =
2616 if (x
< NELEMS (popcnt
))
2618 return popcnt
[x
% NELEMS (popcnt
)] + popcount (x
/ NELEMS (popcnt
));
2622 /* Update IMASK bitmask to reflect the fact that one or more registers
2623 of type TYPE are saved starting at instruction with index T. If N
2624 bits are set in REGMASK, it is assumed that instructions T through
2625 T+N-1 save these registers.
2629 1: instruction saves next fp reg
2630 2: instruction saves next general reg
2631 3: instruction saves next branch reg */
2633 set_imask (unw_rec_list
*region
,
2634 unsigned long regmask
,
2638 unsigned char *imask
;
2639 unsigned long imask_size
;
2643 imask
= region
->r
.record
.r
.mask
.i
;
2644 imask_size
= region
->r
.record
.r
.imask_size
;
2647 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2648 imask
= XCNEWVEC (unsigned char, imask_size
);
2650 region
->r
.record
.r
.imask_size
= imask_size
;
2651 region
->r
.record
.r
.mask
.i
= imask
;
2655 pos
= 2 * (3 - t
% 4);
2658 if (i
>= imask_size
)
2660 as_bad (_("Ignoring attempt to spill beyond end of region"));
2664 imask
[i
] |= (type
& 0x3) << pos
;
2666 regmask
&= (regmask
- 1);
2676 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2677 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2678 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2681 static unsigned long
2682 slot_index (unsigned long slot_addr
,
2684 unsigned long first_addr
,
2688 unsigned long s_index
= 0;
2690 /* First time we are called, the initial address and frag are invalid. */
2691 if (first_addr
== 0)
2694 /* If the two addresses are in different frags, then we need to add in
2695 the remaining size of this frag, and then the entire size of intermediate
2697 while (slot_frag
!= first_frag
)
2699 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2703 /* We can get the final addresses only during and after
2705 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2706 s_index
+= 3 * ((first_frag
->fr_next
->fr_address
2707 - first_frag
->fr_address
2708 - first_frag
->fr_fix
) >> 4);
2711 /* We don't know what the final addresses will be. We try our
2712 best to estimate. */
2713 switch (first_frag
->fr_type
)
2719 as_fatal (_("Only constant space allocation is supported"));
2725 /* Take alignment into account. Assume the worst case
2726 before relaxation. */
2727 s_index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2731 if (first_frag
->fr_symbol
)
2733 as_fatal (_("Only constant offsets are supported"));
2738 s_index
+= 3 * (first_frag
->fr_offset
>> 4);
2742 /* Add in the full size of the frag converted to instruction slots. */
2743 s_index
+= 3 * (first_frag
->fr_fix
>> 4);
2744 /* Subtract away the initial part before first_addr. */
2745 s_index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2746 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2748 /* Move to the beginning of the next frag. */
2749 first_frag
= first_frag
->fr_next
;
2750 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2752 /* This can happen if there is section switching in the middle of a
2753 function, causing the frag chain for the function to be broken.
2754 It is too difficult to recover safely from this problem, so we just
2755 exit with an error. */
2756 if (first_frag
== NULL
)
2757 as_fatal (_("Section switching in code is not supported."));
2760 /* Add in the used part of the last frag. */
2761 s_index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2762 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2766 /* Optimize unwind record directives. */
2768 static unw_rec_list
*
2769 optimize_unw_records (unw_rec_list
*list
)
2774 /* If the only unwind record is ".prologue" or ".prologue" followed
2775 by ".body", then we can optimize the unwind directives away. */
2776 if (list
->r
.type
== prologue
2777 && (list
->next
->r
.type
== endp
2778 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2784 /* Given a complete record list, process any records which have
2785 unresolved fields, (ie length counts for a prologue). After
2786 this has been run, all necessary information should be available
2787 within each record to generate an image. */
2790 fixup_unw_records (unw_rec_list
*list
, int before_relax
)
2792 unw_rec_list
*ptr
, *region
= 0;
2793 unsigned long first_addr
= 0, rlen
= 0, t
;
2794 fragS
*first_frag
= 0;
2796 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2798 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2799 as_bad (_("Insn slot not set in unwind record."));
2800 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2801 first_addr
, first_frag
, before_relax
);
2802 switch (ptr
->r
.type
)
2810 unsigned long last_addr
= 0;
2811 fragS
*last_frag
= NULL
;
2813 first_addr
= ptr
->slot_number
;
2814 first_frag
= ptr
->slot_frag
;
2815 /* Find either the next body/prologue start, or the end of
2816 the function, and determine the size of the region. */
2817 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2818 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2819 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2821 last_addr
= last
->slot_number
;
2822 last_frag
= last
->slot_frag
;
2825 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2827 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2828 if (ptr
->r
.type
== body
)
2829 /* End of region. */
2837 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2839 /* This happens when a memory-stack-less procedure uses a
2840 ".restore sp" directive at the end of a region to pop
2842 ptr
->r
.record
.b
.t
= 0;
2853 case priunat_when_gr
:
2854 case priunat_when_mem
:
2858 ptr
->r
.record
.p
.t
= t
;
2866 case spill_psprel_p
:
2867 ptr
->r
.record
.x
.t
= t
;
2873 as_bad (_("frgr_mem record before region record!"));
2876 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2877 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2878 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2879 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2884 as_bad (_("fr_mem record before region record!"));
2887 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2888 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2893 as_bad (_("gr_mem record before region record!"));
2896 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2897 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2902 as_bad (_("br_mem record before region record!"));
2905 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2906 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2912 as_bad (_("gr_gr record before region record!"));
2915 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2920 as_bad (_("br_gr record before region record!"));
2923 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2932 /* Estimate the size of a frag before relaxing. We only have one type of frag
2933 to handle here, which is the unwind info frag. */
2936 ia64_estimate_size_before_relax (fragS
*frag
,
2937 asection
*segtype ATTRIBUTE_UNUSED
)
2942 /* ??? This code is identical to the first part of ia64_convert_frag. */
2943 list
= (unw_rec_list
*) frag
->fr_opcode
;
2944 fixup_unw_records (list
, 0);
2946 len
= calc_record_size (list
);
2947 /* pad to pointer-size boundary. */
2948 pad
= len
% md
.pointer_size
;
2950 len
+= md
.pointer_size
- pad
;
2951 /* Add 8 for the header. */
2953 /* Add a pointer for the personality offset. */
2954 if (frag
->fr_offset
)
2955 size
+= md
.pointer_size
;
2957 /* fr_var carries the max_chars that we created the fragment with.
2958 We must, of course, have allocated enough memory earlier. */
2959 gas_assert (frag
->fr_var
>= size
);
2961 return frag
->fr_fix
+ size
;
2964 /* This function converts a rs_machine_dependent variant frag into a
2965 normal fill frag with the unwind image from the record list. */
2967 ia64_convert_frag (fragS
*frag
)
2973 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2974 list
= (unw_rec_list
*) frag
->fr_opcode
;
2975 fixup_unw_records (list
, 0);
2977 len
= calc_record_size (list
);
2978 /* pad to pointer-size boundary. */
2979 pad
= len
% md
.pointer_size
;
2981 len
+= md
.pointer_size
- pad
;
2982 /* Add 8 for the header. */
2984 /* Add a pointer for the personality offset. */
2985 if (frag
->fr_offset
)
2986 size
+= md
.pointer_size
;
2988 /* fr_var carries the max_chars that we created the fragment with.
2989 We must, of course, have allocated enough memory earlier. */
2990 gas_assert (frag
->fr_var
>= size
);
2992 /* Initialize the header area. fr_offset is initialized with
2993 unwind.personality_routine. */
2994 if (frag
->fr_offset
)
2996 if (md
.flags
& EF_IA_64_ABI64
)
2997 flag_value
= (bfd_vma
) 3 << 32;
2999 /* 32-bit unwind info block. */
3000 flag_value
= (bfd_vma
) 0x1003 << 32;
3005 md_number_to_chars (frag
->fr_literal
,
3006 (((bfd_vma
) 1 << 48) /* Version. */
3007 | flag_value
/* U & E handler flags. */
3008 | (len
/ md
.pointer_size
)), /* Length. */
3011 /* Skip the header. */
3012 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
3013 process_unw_records (list
, output_vbyte_mem
);
3015 /* Fill the padding bytes with zeros. */
3017 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
3018 md
.pointer_size
- pad
);
3019 /* Fill the unwind personality with zeros. */
3020 if (frag
->fr_offset
)
3021 md_number_to_chars (frag
->fr_literal
+ size
- md
.pointer_size
, 0,
3024 frag
->fr_fix
+= size
;
3025 frag
->fr_type
= rs_fill
;
3027 frag
->fr_offset
= 0;
3031 parse_predicate_and_operand (expressionS
*e
, unsigned *qp
, const char *po
)
3033 int sep
= parse_operand_and_eval (e
, ',');
3035 *qp
= e
->X_add_number
- REG_P
;
3036 if (e
->X_op
!= O_register
|| *qp
> 63)
3038 as_bad (_("First operand to .%s must be a predicate"), po
);
3042 as_warn (_("Pointless use of p0 as first operand to .%s"), po
);
3044 sep
= parse_operand_and_eval (e
, ',');
3051 convert_expr_to_ab_reg (const expressionS
*e
,
3057 unsigned int reg
= e
->X_add_number
;
3059 *ab
= *regp
= 0; /* Anything valid is good here. */
3061 if (e
->X_op
!= O_register
)
3062 reg
= REG_GR
; /* Anything invalid is good here. */
3064 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
3067 *regp
= reg
- REG_GR
;
3069 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
3070 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3073 *regp
= reg
- REG_FR
;
3075 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3078 *regp
= reg
- REG_BR
;
3085 case REG_PR
: *regp
= 0; break;
3086 case REG_PSP
: *regp
= 1; break;
3087 case REG_PRIUNAT
: *regp
= 2; break;
3088 case REG_BR
+ 0: *regp
= 3; break;
3089 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3090 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3091 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3092 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3093 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3094 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3095 case REG_AR
+ AR_LC
: *regp
= 10; break;
3098 as_bad (_("Operand %d to .%s must be a preserved register"), n
, po
);
3105 convert_expr_to_xy_reg (const expressionS
*e
,
3111 unsigned int reg
= e
->X_add_number
;
3113 *xy
= *regp
= 0; /* Anything valid is good here. */
3115 if (e
->X_op
!= O_register
)
3116 reg
= REG_GR
; /* Anything invalid is good here. */
3118 if (reg
>= (REG_GR
+ 1) && reg
<= (REG_GR
+ 127))
3121 *regp
= reg
- REG_GR
;
3123 else if (reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 127))
3126 *regp
= reg
- REG_FR
;
3128 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3131 *regp
= reg
- REG_BR
;
3134 as_bad (_("Operand %d to .%s must be a writable register"), n
, po
);
3140 /* The current frag is an alignment frag. */
3141 align_frag
= frag_now
;
3142 s_align_bytes (arg
);
3146 dot_radix (int dummy ATTRIBUTE_UNUSED
)
3153 if (is_it_end_of_statement ())
3155 ch
= get_symbol_name (&radix
);
3156 ia64_canonicalize_symbol_name (radix
);
3157 if (strcasecmp (radix
, "C"))
3158 as_bad (_("Radix `%s' unsupported or invalid"), radix
);
3159 (void) restore_line_pointer (ch
);
3160 demand_empty_rest_of_line ();
3163 /* Helper function for .loc directives. If the assembler is not generating
3164 line number info, then we need to remember which instructions have a .loc
3165 directive, and only call dwarf2_gen_line_info for those instructions. */
3170 CURR_SLOT
.loc_directive_seen
= 1;
3171 dwarf2_directive_loc (x
);
3174 /* .sbss, .srodata etc. are macros that expand into ".section SECNAME". */
3176 dot_special_section (int which
)
3178 set_section ((char *) special_section_name
[which
]);
3181 /* Return -1 for warning and 0 for error. */
3184 unwind_diagnostic (const char * region
, const char *directive
)
3186 if (md
.unwind_check
== unwind_check_warning
)
3188 as_warn (_(".%s outside of %s"), directive
, region
);
3193 as_bad (_(".%s outside of %s"), directive
, region
);
3194 ignore_rest_of_line ();
3199 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3200 a procedure but the unwind directive check is set to warning, 0 if
3201 a directive isn't in a procedure and the unwind directive check is set
3205 in_procedure (const char *directive
)
3207 if (unwind
.proc_pending
.sym
3208 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3210 return unwind_diagnostic ("procedure", directive
);
3213 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3214 a prologue but the unwind directive check is set to warning, 0 if
3215 a directive isn't in a prologue and the unwind directive check is set
3219 in_prologue (const char *directive
)
3221 int in
= in_procedure (directive
);
3223 if (in
> 0 && !unwind
.prologue
)
3224 in
= unwind_diagnostic ("prologue", directive
);
3225 check_pending_save ();
3229 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3230 a body but the unwind directive check is set to warning, 0 if
3231 a directive isn't in a body and the unwind directive check is set
3235 in_body (const char *directive
)
3237 int in
= in_procedure (directive
);
3239 if (in
> 0 && !unwind
.body
)
3240 in
= unwind_diagnostic ("body region", directive
);
3245 add_unwind_entry (unw_rec_list
*ptr
, int sep
)
3250 unwind
.tail
->next
= ptr
;
3255 /* The current entry can in fact be a chain of unwind entries. */
3256 if (unwind
.current_entry
== NULL
)
3257 unwind
.current_entry
= ptr
;
3260 /* The current entry can in fact be a chain of unwind entries. */
3261 if (unwind
.current_entry
== NULL
)
3262 unwind
.current_entry
= ptr
;
3267 /* Parse a tag permitted for the current directive. */
3271 ch
= get_symbol_name (&name
);
3272 /* FIXME: For now, just issue a warning that this isn't implemented. */
3279 as_warn (_("Tags on unwind pseudo-ops aren't supported, yet"));
3282 (void) restore_line_pointer (ch
);
3284 if (sep
!= NOT_A_CHAR
)
3285 demand_empty_rest_of_line ();
3289 dot_fframe (int dummy ATTRIBUTE_UNUSED
)
3294 if (!in_prologue ("fframe"))
3297 sep
= parse_operand_and_eval (&e
, ',');
3299 if (e
.X_op
!= O_constant
)
3301 as_bad (_("First operand to .fframe must be a constant"));
3304 add_unwind_entry (output_mem_stack_f (e
.X_add_number
), sep
);
3308 dot_vframe (int dummy ATTRIBUTE_UNUSED
)
3314 if (!in_prologue ("vframe"))
3317 sep
= parse_operand_and_eval (&e
, ',');
3318 reg
= e
.X_add_number
- REG_GR
;
3319 if (e
.X_op
!= O_register
|| reg
> 127)
3321 as_bad (_("First operand to .vframe must be a general register"));
3324 add_unwind_entry (output_mem_stack_v (), sep
);
3325 if (! (unwind
.prologue_mask
& 2))
3326 add_unwind_entry (output_psp_gr (reg
), NOT_A_CHAR
);
3327 else if (reg
!= unwind
.prologue_gr
3328 + (unsigned) popcount (unwind
.prologue_mask
& -(2 << 1)))
3329 as_warn (_("Operand of .vframe contradicts .prologue"));
3333 dot_vframesp (int psp
)
3339 as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant"));
3341 if (!in_prologue ("vframesp"))
3344 sep
= parse_operand_and_eval (&e
, ',');
3345 if (e
.X_op
!= O_constant
)
3347 as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)"));
3350 add_unwind_entry (output_mem_stack_v (), sep
);
3351 add_unwind_entry (output_psp_sprel (e
.X_add_number
), NOT_A_CHAR
);
3355 dot_save (int dummy ATTRIBUTE_UNUSED
)
3358 unsigned reg1
, reg2
;
3361 if (!in_prologue ("save"))
3364 sep
= parse_operand_and_eval (&e1
, ',');
3366 sep
= parse_operand_and_eval (&e2
, ',');
3370 reg1
= e1
.X_add_number
;
3371 /* Make sure it's a valid ar.xxx reg, OR its br0, aka 'rp'. */
3372 if (e1
.X_op
!= O_register
)
3374 as_bad (_("First operand to .save not a register"));
3375 reg1
= REG_PR
; /* Anything valid is good here. */
3377 reg2
= e2
.X_add_number
- REG_GR
;
3378 if (e2
.X_op
!= O_register
|| reg2
> 127)
3380 as_bad (_("Second operand to .save not a valid register"));
3385 case REG_AR
+ AR_BSP
:
3386 add_unwind_entry (output_bsp_when (), sep
);
3387 add_unwind_entry (output_bsp_gr (reg2
), NOT_A_CHAR
);
3389 case REG_AR
+ AR_BSPSTORE
:
3390 add_unwind_entry (output_bspstore_when (), sep
);
3391 add_unwind_entry (output_bspstore_gr (reg2
), NOT_A_CHAR
);
3393 case REG_AR
+ AR_RNAT
:
3394 add_unwind_entry (output_rnat_when (), sep
);
3395 add_unwind_entry (output_rnat_gr (reg2
), NOT_A_CHAR
);
3397 case REG_AR
+ AR_UNAT
:
3398 add_unwind_entry (output_unat_when (), sep
);
3399 add_unwind_entry (output_unat_gr (reg2
), NOT_A_CHAR
);
3401 case REG_AR
+ AR_FPSR
:
3402 add_unwind_entry (output_fpsr_when (), sep
);
3403 add_unwind_entry (output_fpsr_gr (reg2
), NOT_A_CHAR
);
3405 case REG_AR
+ AR_PFS
:
3406 add_unwind_entry (output_pfs_when (), sep
);
3407 if (! (unwind
.prologue_mask
& 4))
3408 add_unwind_entry (output_pfs_gr (reg2
), NOT_A_CHAR
);
3409 else if (reg2
!= unwind
.prologue_gr
3410 + (unsigned) popcount (unwind
.prologue_mask
& -(4 << 1)))
3411 as_warn (_("Second operand of .save contradicts .prologue"));
3413 case REG_AR
+ AR_LC
:
3414 add_unwind_entry (output_lc_when (), sep
);
3415 add_unwind_entry (output_lc_gr (reg2
), NOT_A_CHAR
);
3418 add_unwind_entry (output_rp_when (), sep
);
3419 if (! (unwind
.prologue_mask
& 8))
3420 add_unwind_entry (output_rp_gr (reg2
), NOT_A_CHAR
);
3421 else if (reg2
!= unwind
.prologue_gr
)
3422 as_warn (_("Second operand of .save contradicts .prologue"));
3425 add_unwind_entry (output_preds_when (), sep
);
3426 if (! (unwind
.prologue_mask
& 1))
3427 add_unwind_entry (output_preds_gr (reg2
), NOT_A_CHAR
);
3428 else if (reg2
!= unwind
.prologue_gr
3429 + (unsigned) popcount (unwind
.prologue_mask
& -(1 << 1)))
3430 as_warn (_("Second operand of .save contradicts .prologue"));
3433 add_unwind_entry (output_priunat_when_gr (), sep
);
3434 add_unwind_entry (output_priunat_gr (reg2
), NOT_A_CHAR
);
3437 as_bad (_("First operand to .save not a valid register"));
3438 add_unwind_entry (NULL
, sep
);
3444 dot_restore (int dummy ATTRIBUTE_UNUSED
)
3447 unsigned long ecount
; /* # of _additional_ regions to pop */
3450 if (!in_body ("restore"))
3453 sep
= parse_operand_and_eval (&e1
, ',');
3454 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3455 as_bad (_("First operand to .restore must be stack pointer (sp)"));
3461 sep
= parse_operand_and_eval (&e2
, ',');
3462 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3464 as_bad (_("Second operand to .restore must be a constant >= 0"));
3465 e2
.X_add_number
= 0;
3467 ecount
= e2
.X_add_number
;
3470 ecount
= unwind
.prologue_count
- 1;
3472 if (ecount
>= unwind
.prologue_count
)
3474 as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"),
3475 ecount
+ 1, unwind
.prologue_count
);
3479 add_unwind_entry (output_epilogue (ecount
), sep
);
3481 if (ecount
< unwind
.prologue_count
)
3482 unwind
.prologue_count
-= ecount
+ 1;
3484 unwind
.prologue_count
= 0;
3488 dot_restorereg (int pred
)
3490 unsigned int qp
, ab
, reg
;
3493 const char * const po
= pred
? "restorereg.p" : "restorereg";
3495 if (!in_procedure (po
))
3499 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3502 sep
= parse_operand_and_eval (&e
, ',');
3505 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3507 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0, qp
), sep
);
3510 static const char *special_linkonce_name
[] =
3512 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3516 start_unwind_section (const segT text_seg
, int sec_index
)
3519 Use a slightly ugly scheme to derive the unwind section names from
3520 the text section name:
3522 text sect. unwind table sect.
3523 name: name: comments:
3524 ---------- ----------------- --------------------------------
3526 .text.foo .IA_64.unwind.text.foo
3527 .foo .IA_64.unwind.foo
3529 .gnu.linkonce.ia64unw.foo
3530 _info .IA_64.unwind_info gas issues error message (ditto)
3531 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3533 This mapping is done so that:
3535 (a) An object file with unwind info only in .text will use
3536 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3537 This follows the letter of the ABI and also ensures backwards
3538 compatibility with older toolchains.
3540 (b) An object file with unwind info in multiple text sections
3541 will use separate unwind sections for each text section.
3542 This allows us to properly set the "sh_info" and "sh_link"
3543 fields in SHT_IA_64_UNWIND as required by the ABI and also
3544 lets GNU ld support programs with multiple segments
3545 containing unwind info (as might be the case for certain
3546 embedded applications).
3548 (c) An error is issued if there would be a name clash.
3551 const char *text_name
, *sec_text_name
;
3553 const char *prefix
= special_section_name
[sec_index
];
3556 sec_text_name
= segment_name (text_seg
);
3557 text_name
= sec_text_name
;
3558 if (startswith (text_name
, "_info"))
3560 as_bad (_("Illegal section name `%s' (causes unwind section name clash)"),
3562 ignore_rest_of_line ();
3565 if (strcmp (text_name
, ".text") == 0)
3568 /* Build the unwind section name by appending the (possibly stripped)
3569 text section name to the unwind prefix. */
3571 if (startswith (text_name
, ".gnu.linkonce.t."))
3573 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3574 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3577 sec_name
= concat (prefix
, suffix
, NULL
);
3579 /* Handle COMDAT group. */
3580 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3581 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3584 const char *group_name
= elf_group_name (text_seg
);
3586 if (group_name
== NULL
)
3588 as_bad (_("Group section `%s' has no group signature"),
3590 ignore_rest_of_line ();
3595 /* We have to construct a fake section directive. */
3596 section
= concat (sec_name
, ",\"aG\",@progbits,", group_name
, ",comdat", NULL
);
3597 set_section (section
);
3602 set_section (sec_name
);
3603 bfd_set_section_flags (now_seg
, SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3606 elf_linked_to_section (now_seg
) = text_seg
;
3611 generate_unwind_image (const segT text_seg
)
3616 /* Mark the end of the unwind info, so that we can compute the size of the
3617 last unwind region. */
3618 add_unwind_entry (output_endp (), NOT_A_CHAR
);
3620 /* Force out pending instructions, to make sure all unwind records have
3621 a valid slot_number field. */
3622 ia64_flush_insns ();
3624 /* Generate the unwind record. */
3625 list
= optimize_unw_records (unwind
.list
);
3626 fixup_unw_records (list
, 1);
3627 size
= calc_record_size (list
);
3629 if (size
> 0 || unwind
.force_unwind_entry
)
3631 unwind
.force_unwind_entry
= 0;
3632 /* pad to pointer-size boundary. */
3633 pad
= size
% md
.pointer_size
;
3635 size
+= md
.pointer_size
- pad
;
3636 /* Add 8 for the header. */
3638 /* Add a pointer for the personality offset. */
3639 if (unwind
.personality_routine
)
3640 size
+= md
.pointer_size
;
3643 /* If there are unwind records, switch sections, and output the info. */
3647 bfd_reloc_code_real_type reloc
;
3649 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3651 /* Make sure the section has 4 byte alignment for ILP32 and
3652 8 byte alignment for LP64. */
3653 frag_align (md
.pointer_size_shift
, 0, 0);
3654 record_alignment (now_seg
, md
.pointer_size_shift
);
3656 /* Set expression which points to start of unwind descriptor area. */
3657 unwind
.info
= expr_build_dot ();
3659 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3660 (offsetT
) (long) unwind
.personality_routine
,
3663 /* Add the personality address to the image. */
3664 if (unwind
.personality_routine
!= 0)
3666 exp
.X_op
= O_symbol
;
3667 exp
.X_add_symbol
= unwind
.personality_routine
;
3668 exp
.X_add_number
= 0;
3670 if (md
.flags
& EF_IA_64_BE
)
3672 if (md
.flags
& EF_IA_64_ABI64
)
3673 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3675 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3679 if (md
.flags
& EF_IA_64_ABI64
)
3680 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3682 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3685 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3686 md
.pointer_size
, &exp
, 0, reloc
);
3687 unwind
.personality_routine
= 0;
3691 free_saved_prologue_counts ();
3692 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3696 dot_handlerdata (int dummy ATTRIBUTE_UNUSED
)
3698 if (!in_procedure ("handlerdata"))
3700 unwind
.force_unwind_entry
= 1;
3702 /* Remember which segment we're in so we can switch back after .endp */
3703 unwind
.saved_text_seg
= now_seg
;
3704 unwind
.saved_text_subseg
= now_subseg
;
3706 /* Generate unwind info into unwind-info section and then leave that
3707 section as the currently active one so dataXX directives go into
3708 the language specific data area of the unwind info block. */
3709 generate_unwind_image (now_seg
);
3710 demand_empty_rest_of_line ();
3714 dot_unwentry (int dummy ATTRIBUTE_UNUSED
)
3716 if (!in_procedure ("unwentry"))
3718 unwind
.force_unwind_entry
= 1;
3719 demand_empty_rest_of_line ();
3723 dot_altrp (int dummy ATTRIBUTE_UNUSED
)
3728 if (!in_prologue ("altrp"))
3731 parse_operand_and_eval (&e
, 0);
3732 reg
= e
.X_add_number
- REG_BR
;
3733 if (e
.X_op
!= O_register
|| reg
> 7)
3735 as_bad (_("First operand to .altrp not a valid branch register"));
3738 add_unwind_entry (output_rp_br (reg
), 0);
3742 dot_savemem (int psprel
)
3747 const char * const po
= psprel
? "savepsp" : "savesp";
3749 if (!in_prologue (po
))
3752 sep
= parse_operand_and_eval (&e1
, ',');
3754 sep
= parse_operand_and_eval (&e2
, ',');
3758 reg1
= e1
.X_add_number
;
3759 val
= e2
.X_add_number
;
3761 /* Make sure it's a valid ar.xxx reg, OR its br0, aka 'rp'. */
3762 if (e1
.X_op
!= O_register
)
3764 as_bad (_("First operand to .%s not a register"), po
);
3765 reg1
= REG_PR
; /* Anything valid is good here. */
3767 if (e2
.X_op
!= O_constant
)
3769 as_bad (_("Second operand to .%s not a constant"), po
);
3775 case REG_AR
+ AR_BSP
:
3776 add_unwind_entry (output_bsp_when (), sep
);
3777 add_unwind_entry ((psprel
3779 : output_bsp_sprel
) (val
), NOT_A_CHAR
);
3781 case REG_AR
+ AR_BSPSTORE
:
3782 add_unwind_entry (output_bspstore_when (), sep
);
3783 add_unwind_entry ((psprel
3784 ? output_bspstore_psprel
3785 : output_bspstore_sprel
) (val
), NOT_A_CHAR
);
3787 case REG_AR
+ AR_RNAT
:
3788 add_unwind_entry (output_rnat_when (), sep
);
3789 add_unwind_entry ((psprel
3790 ? output_rnat_psprel
3791 : output_rnat_sprel
) (val
), NOT_A_CHAR
);
3793 case REG_AR
+ AR_UNAT
:
3794 add_unwind_entry (output_unat_when (), sep
);
3795 add_unwind_entry ((psprel
3796 ? output_unat_psprel
3797 : output_unat_sprel
) (val
), NOT_A_CHAR
);
3799 case REG_AR
+ AR_FPSR
:
3800 add_unwind_entry (output_fpsr_when (), sep
);
3801 add_unwind_entry ((psprel
3802 ? output_fpsr_psprel
3803 : output_fpsr_sprel
) (val
), NOT_A_CHAR
);
3805 case REG_AR
+ AR_PFS
:
3806 add_unwind_entry (output_pfs_when (), sep
);
3807 add_unwind_entry ((psprel
3809 : output_pfs_sprel
) (val
), NOT_A_CHAR
);
3811 case REG_AR
+ AR_LC
:
3812 add_unwind_entry (output_lc_when (), sep
);
3813 add_unwind_entry ((psprel
3815 : output_lc_sprel
) (val
), NOT_A_CHAR
);
3818 add_unwind_entry (output_rp_when (), sep
);
3819 add_unwind_entry ((psprel
3821 : output_rp_sprel
) (val
), NOT_A_CHAR
);
3824 add_unwind_entry (output_preds_when (), sep
);
3825 add_unwind_entry ((psprel
3826 ? output_preds_psprel
3827 : output_preds_sprel
) (val
), NOT_A_CHAR
);
3830 add_unwind_entry (output_priunat_when_mem (), sep
);
3831 add_unwind_entry ((psprel
3832 ? output_priunat_psprel
3833 : output_priunat_sprel
) (val
), NOT_A_CHAR
);
3836 as_bad (_("First operand to .%s not a valid register"), po
);
3837 add_unwind_entry (NULL
, sep
);
3843 dot_saveg (int dummy ATTRIBUTE_UNUSED
)
3849 if (!in_prologue ("save.g"))
3852 sep
= parse_operand_and_eval (&e
, ',');
3854 grmask
= e
.X_add_number
;
3855 if (e
.X_op
!= O_constant
3856 || e
.X_add_number
<= 0
3857 || e
.X_add_number
> 0xf)
3859 as_bad (_("First operand to .save.g must be a positive 4-bit constant"));
3866 int n
= popcount (grmask
);
3868 parse_operand_and_eval (&e
, 0);
3869 reg
= e
.X_add_number
- REG_GR
;
3870 if (e
.X_op
!= O_register
|| reg
> 127)
3872 as_bad (_("Second operand to .save.g must be a general register"));
3875 else if (reg
> 128U - n
)
3877 as_bad (_("Second operand to .save.g must be the first of %d general registers"), n
);
3880 add_unwind_entry (output_gr_gr (grmask
, reg
), 0);
3883 add_unwind_entry (output_gr_mem (grmask
), 0);
3887 dot_savef (int dummy ATTRIBUTE_UNUSED
)
3891 if (!in_prologue ("save.f"))
3894 parse_operand_and_eval (&e
, 0);
3896 if (e
.X_op
!= O_constant
3897 || e
.X_add_number
<= 0
3898 || e
.X_add_number
> 0xfffff)
3900 as_bad (_("Operand to .save.f must be a positive 20-bit constant"));
3903 add_unwind_entry (output_fr_mem (e
.X_add_number
), 0);
3907 dot_saveb (int dummy ATTRIBUTE_UNUSED
)
3913 if (!in_prologue ("save.b"))
3916 sep
= parse_operand_and_eval (&e
, ',');
3918 brmask
= e
.X_add_number
;
3919 if (e
.X_op
!= O_constant
3920 || e
.X_add_number
<= 0
3921 || e
.X_add_number
> 0x1f)
3923 as_bad (_("First operand to .save.b must be a positive 5-bit constant"));
3930 int n
= popcount (brmask
);
3932 parse_operand_and_eval (&e
, 0);
3933 reg
= e
.X_add_number
- REG_GR
;
3934 if (e
.X_op
!= O_register
|| reg
> 127)
3936 as_bad (_("Second operand to .save.b must be a general register"));
3939 else if (reg
> 128U - n
)
3941 as_bad (_("Second operand to .save.b must be the first of %d general registers"), n
);
3944 add_unwind_entry (output_br_gr (brmask
, reg
), 0);
3947 add_unwind_entry (output_br_mem (brmask
), 0);
3951 dot_savegf (int dummy ATTRIBUTE_UNUSED
)
3955 if (!in_prologue ("save.gf"))
3958 if (parse_operand_and_eval (&e1
, ',') == ',')
3959 parse_operand_and_eval (&e2
, 0);
3963 if (e1
.X_op
!= O_constant
3964 || e1
.X_add_number
< 0
3965 || e1
.X_add_number
> 0xf)
3967 as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant"));
3969 e1
.X_add_number
= 0;
3971 if (e2
.X_op
!= O_constant
3972 || e2
.X_add_number
< 0
3973 || e2
.X_add_number
> 0xfffff)
3975 as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant"));
3977 e2
.X_add_number
= 0;
3979 if (e1
.X_op
== O_constant
3980 && e2
.X_op
== O_constant
3981 && e1
.X_add_number
== 0
3982 && e2
.X_add_number
== 0)
3983 as_bad (_("Operands to .save.gf may not be both zero"));
3985 add_unwind_entry (output_frgr_mem (e1
.X_add_number
, e2
.X_add_number
), 0);
3989 dot_spill (int dummy ATTRIBUTE_UNUSED
)
3993 if (!in_prologue ("spill"))
3996 parse_operand_and_eval (&e
, 0);
3998 if (e
.X_op
!= O_constant
)
4000 as_bad (_("Operand to .spill must be a constant"));
4003 add_unwind_entry (output_spill_base (e
.X_add_number
), 0);
4007 dot_spillreg (int pred
)
4010 unsigned int qp
, ab
, xy
, reg
, treg
;
4012 const char * const po
= pred
? "spillreg.p" : "spillreg";
4014 if (!in_procedure (po
))
4018 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4021 sep
= parse_operand_and_eval (&e
, ',');
4024 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4027 sep
= parse_operand_and_eval (&e
, ',');
4030 convert_expr_to_xy_reg (&e
, &xy
, &treg
, po
, 2 + pred
);
4032 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
, qp
), sep
);
4036 dot_spillmem (int psprel
)
4039 int pred
= (psprel
< 0), sep
;
4040 unsigned int qp
, ab
, reg
;
4046 po
= psprel
? "spillpsp.p" : "spillsp.p";
4049 po
= psprel
? "spillpsp" : "spillsp";
4051 if (!in_procedure (po
))
4055 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4058 sep
= parse_operand_and_eval (&e
, ',');
4061 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4064 sep
= parse_operand_and_eval (&e
, ',');
4067 if (e
.X_op
!= O_constant
)
4069 as_bad (_("Operand %d to .%s must be a constant"), 2 + pred
, po
);
4074 add_unwind_entry (output_spill_psprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4076 add_unwind_entry (output_spill_sprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4080 get_saved_prologue_count (unsigned long lbl
)
4082 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4084 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4088 return lpc
->prologue_count
;
4090 as_bad (_("Missing .label_state %ld"), lbl
);
4095 save_prologue_count (unsigned long lbl
, unsigned int count
)
4097 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4099 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4103 lpc
->prologue_count
= count
;
4106 label_prologue_count
*new_lpc
= XNEW (label_prologue_count
);
4108 new_lpc
->next
= unwind
.saved_prologue_counts
;
4109 new_lpc
->label_number
= lbl
;
4110 new_lpc
->prologue_count
= count
;
4111 unwind
.saved_prologue_counts
= new_lpc
;
4116 free_saved_prologue_counts (void)
4118 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4119 label_prologue_count
*next
;
4128 unwind
.saved_prologue_counts
= NULL
;
4132 dot_label_state (int dummy ATTRIBUTE_UNUSED
)
4136 if (!in_body ("label_state"))
4139 parse_operand_and_eval (&e
, 0);
4140 if (e
.X_op
== O_constant
)
4141 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4144 as_bad (_("Operand to .label_state must be a constant"));
4147 add_unwind_entry (output_label_state (e
.X_add_number
), 0);
4151 dot_copy_state (int dummy ATTRIBUTE_UNUSED
)
4155 if (!in_body ("copy_state"))
4158 parse_operand_and_eval (&e
, 0);
4159 if (e
.X_op
== O_constant
)
4160 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4163 as_bad (_("Operand to .copy_state must be a constant"));
4166 add_unwind_entry (output_copy_state (e
.X_add_number
), 0);
4170 dot_unwabi (int dummy ATTRIBUTE_UNUSED
)
4175 if (!in_prologue ("unwabi"))
4178 sep
= parse_operand_and_eval (&e1
, ',');
4180 parse_operand_and_eval (&e2
, 0);
4184 if (e1
.X_op
!= O_constant
)
4186 as_bad (_("First operand to .unwabi must be a constant"));
4187 e1
.X_add_number
= 0;
4190 if (e2
.X_op
!= O_constant
)
4192 as_bad (_("Second operand to .unwabi must be a constant"));
4193 e2
.X_add_number
= 0;
4196 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
), 0);
4200 dot_personality (int dummy ATTRIBUTE_UNUSED
)
4204 if (!in_procedure ("personality"))
4207 c
= get_symbol_name (&name
);
4208 p
= input_line_pointer
;
4209 unwind
.personality_routine
= symbol_find_or_make (name
);
4210 unwind
.force_unwind_entry
= 1;
4212 SKIP_WHITESPACE_AFTER_NAME ();
4213 demand_empty_rest_of_line ();
4217 dot_proc (int dummy ATTRIBUTE_UNUSED
)
4221 proc_pending
*pending
, *last_pending
;
4223 if (unwind
.proc_pending
.sym
)
4225 (md
.unwind_check
== unwind_check_warning
4227 : as_bad
) (_("Missing .endp after previous .proc"));
4228 while (unwind
.proc_pending
.next
)
4230 pending
= unwind
.proc_pending
.next
;
4231 unwind
.proc_pending
.next
= pending
->next
;
4235 last_pending
= NULL
;
4237 /* Parse names of main and alternate entry points and mark them as
4238 function symbols: */
4242 c
= get_symbol_name (&name
);
4243 p
= input_line_pointer
;
4245 as_bad (_("Empty argument of .proc"));
4248 sym
= symbol_find_or_make (name
);
4249 if (S_IS_DEFINED (sym
))
4250 as_bad (_("`%s' was already defined"), name
);
4251 else if (!last_pending
)
4253 unwind
.proc_pending
.sym
= sym
;
4254 last_pending
= &unwind
.proc_pending
;
4258 pending
= XNEW (proc_pending
);
4260 last_pending
= last_pending
->next
= pending
;
4262 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4265 SKIP_WHITESPACE_AFTER_NAME ();
4266 if (*input_line_pointer
!= ',')
4268 ++input_line_pointer
;
4272 unwind
.proc_pending
.sym
= expr_build_dot ();
4273 last_pending
= &unwind
.proc_pending
;
4275 last_pending
->next
= NULL
;
4276 demand_empty_rest_of_line ();
4277 do_align (4, NULL
, 0, 0);
4279 unwind
.prologue
= 0;
4280 unwind
.prologue_count
= 0;
4283 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4284 unwind
.personality_routine
= 0;
4288 dot_body (int dummy ATTRIBUTE_UNUSED
)
4290 if (!in_procedure ("body"))
4292 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4293 as_warn (_("Initial .body should precede any instructions"));
4294 check_pending_save ();
4296 unwind
.prologue
= 0;
4297 unwind
.prologue_mask
= 0;
4300 add_unwind_entry (output_body (), 0);
4304 dot_prologue (int dummy ATTRIBUTE_UNUSED
)
4306 unsigned mask
= 0, grsave
= 0;
4308 if (!in_procedure ("prologue"))
4310 if (unwind
.prologue
)
4312 as_bad (_(".prologue within prologue"));
4313 ignore_rest_of_line ();
4316 if (!unwind
.body
&& unwind
.insn
)
4317 as_warn (_("Initial .prologue should precede any instructions"));
4319 if (!is_it_end_of_statement ())
4322 int n
, sep
= parse_operand_and_eval (&e
, ',');
4324 if (e
.X_op
!= O_constant
4325 || e
.X_add_number
< 0
4326 || e
.X_add_number
> 0xf)
4327 as_bad (_("First operand to .prologue must be a positive 4-bit constant"));
4328 else if (e
.X_add_number
== 0)
4329 as_warn (_("Pointless use of zero first operand to .prologue"));
4331 mask
= e
.X_add_number
;
4333 n
= popcount (mask
);
4336 parse_operand_and_eval (&e
, 0);
4340 if (e
.X_op
== O_constant
4341 && e
.X_add_number
>= 0
4342 && e
.X_add_number
< 128)
4344 if (md
.unwind_check
== unwind_check_error
)
4345 as_warn (_("Using a constant as second operand to .prologue is deprecated"));
4346 grsave
= e
.X_add_number
;
4348 else if (e
.X_op
!= O_register
4349 || (grsave
= e
.X_add_number
- REG_GR
) > 127)
4351 as_bad (_("Second operand to .prologue must be a general register"));
4354 else if (grsave
> 128U - n
)
4356 as_bad (_("Second operand to .prologue must be the first of %d general registers"), n
);
4362 add_unwind_entry (output_prologue_gr (mask
, grsave
), 0);
4364 add_unwind_entry (output_prologue (), 0);
4366 unwind
.prologue
= 1;
4367 unwind
.prologue_mask
= mask
;
4368 unwind
.prologue_gr
= grsave
;
4370 ++unwind
.prologue_count
;
4374 dot_endp (int dummy ATTRIBUTE_UNUSED
)
4377 int bytes_per_address
;
4380 subsegT saved_subseg
;
4381 proc_pending
*pending
;
4382 int unwind_check
= md
.unwind_check
;
4384 md
.unwind_check
= unwind_check_error
;
4385 if (!in_procedure ("endp"))
4387 md
.unwind_check
= unwind_check
;
4389 if (unwind
.saved_text_seg
)
4391 saved_seg
= unwind
.saved_text_seg
;
4392 saved_subseg
= unwind
.saved_text_subseg
;
4393 unwind
.saved_text_seg
= NULL
;
4397 saved_seg
= now_seg
;
4398 saved_subseg
= now_subseg
;
4401 insn_group_break (1, 0, 0);
4403 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4405 generate_unwind_image (saved_seg
);
4407 if (unwind
.info
|| unwind
.force_unwind_entry
)
4411 subseg_set (md
.last_text_seg
, md
.last_text_subseg
);
4412 proc_end
= expr_build_dot ();
4414 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4416 /* Make sure that section has 4 byte alignment for ILP32 and
4417 8 byte alignment for LP64. */
4418 record_alignment (now_seg
, md
.pointer_size_shift
);
4420 /* Need space for 3 pointers for procedure start, procedure end,
4422 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4423 where
= frag_now_fix () - (3 * md
.pointer_size
);
4424 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4426 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4427 e
.X_op
= O_pseudo_fixup
;
4428 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4430 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4431 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4433 = symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4434 symbol_get_frag (unwind
.proc_pending
.sym
),
4435 S_GET_VALUE (unwind
.proc_pending
.sym
));
4437 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4438 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
,
4441 e
.X_op
= O_pseudo_fixup
;
4442 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4444 e
.X_add_symbol
= proc_end
;
4445 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4446 bytes_per_address
, &e
, BFD_RELOC_NONE
);
4450 e
.X_op
= O_pseudo_fixup
;
4451 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4453 e
.X_add_symbol
= unwind
.info
;
4454 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4455 bytes_per_address
, &e
, BFD_RELOC_NONE
);
4458 subseg_set (saved_seg
, saved_subseg
);
4460 /* Set symbol sizes. */
4461 pending
= &unwind
.proc_pending
;
4462 if (S_GET_NAME (pending
->sym
))
4466 symbolS
*sym
= pending
->sym
;
4468 if (!S_IS_DEFINED (sym
))
4469 as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym
));
4470 else if (S_GET_SIZE (sym
) == 0
4471 && symbol_get_obj (sym
)->size
== NULL
)
4473 fragS
*frag
= symbol_get_frag (sym
);
4477 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4478 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4481 symbol_get_obj (sym
)->size
= XNEW (expressionS
);
4482 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4483 symbol_get_obj (sym
)->size
->X_add_symbol
4484 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4485 frag_now
, frag_now_fix ());
4486 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4487 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4491 } while ((pending
= pending
->next
) != NULL
);
4494 /* Parse names of main and alternate entry points. */
4500 c
= get_symbol_name (&name
);
4501 p
= input_line_pointer
;
4503 (md
.unwind_check
== unwind_check_warning
4505 : as_bad
) (_("Empty argument of .endp"));
4508 symbolS
*sym
= symbol_find (name
);
4510 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4512 if (sym
== pending
->sym
)
4514 pending
->sym
= NULL
;
4518 if (!sym
|| !pending
)
4519 as_warn (_("`%s' was not specified with previous .proc"), name
);
4522 SKIP_WHITESPACE_AFTER_NAME ();
4523 if (*input_line_pointer
!= ',')
4525 ++input_line_pointer
;
4527 demand_empty_rest_of_line ();
4529 /* Deliberately only checking for the main entry point here; the
4530 language spec even says all arguments to .endp are ignored. */
4531 if (unwind
.proc_pending
.sym
4532 && S_GET_NAME (unwind
.proc_pending
.sym
)
4533 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4534 as_warn (_("`%s' should be an operand to this .endp"),
4535 S_GET_NAME (unwind
.proc_pending
.sym
));
4536 while (unwind
.proc_pending
.next
)
4538 pending
= unwind
.proc_pending
.next
;
4539 unwind
.proc_pending
.next
= pending
->next
;
4542 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4546 dot_template (int template_val
)
4548 CURR_SLOT
.user_template
= template_val
;
4552 dot_regstk (int dummy ATTRIBUTE_UNUSED
)
4554 int ins
, locs
, outs
, rots
;
4556 if (is_it_end_of_statement ())
4557 ins
= locs
= outs
= rots
= 0;
4560 ins
= get_absolute_expression ();
4561 if (*input_line_pointer
++ != ',')
4563 locs
= get_absolute_expression ();
4564 if (*input_line_pointer
++ != ',')
4566 outs
= get_absolute_expression ();
4567 if (*input_line_pointer
++ != ',')
4569 rots
= get_absolute_expression ();
4571 set_regstack (ins
, locs
, outs
, rots
);
4575 as_bad (_("Comma expected"));
4576 ignore_rest_of_line ();
4583 valueT num_alloced
= 0;
4584 struct dynreg
**drpp
, *dr
;
4585 int ch
, base_reg
= 0;
4591 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4592 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4593 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4597 /* First, remove existing names from hash table. */
4598 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4600 str_hash_delete (md
.dynreg_hash
, dr
->name
);
4601 /* FIXME: Free dr->name. */
4605 drpp
= &md
.dynreg
[type
];
4608 ch
= get_symbol_name (&start
);
4609 len
= strlen (ia64_canonicalize_symbol_name (start
));
4610 *input_line_pointer
= ch
;
4612 SKIP_WHITESPACE_AFTER_NAME ();
4613 if (*input_line_pointer
!= '[')
4615 as_bad (_("Expected '['"));
4618 ++input_line_pointer
; /* skip '[' */
4620 num_regs
= get_absolute_expression ();
4622 if (*input_line_pointer
++ != ']')
4624 as_bad (_("Expected ']'"));
4629 as_bad (_("Number of elements must be positive"));
4634 num_alloced
+= num_regs
;
4638 if (num_alloced
> md
.rot
.num_regs
)
4640 as_bad (_("Used more than the declared %d rotating registers"),
4646 if (num_alloced
> 96)
4648 as_bad (_("Used more than the available 96 rotating registers"));
4653 if (num_alloced
> 48)
4655 as_bad (_("Used more than the available 48 rotating registers"));
4665 *drpp
= notes_calloc (1, sizeof (**drpp
));
4667 name
= notes_memdup (start
, len
, len
+ 1);
4671 dr
->num_regs
= num_regs
;
4672 dr
->base
= base_reg
;
4674 base_reg
+= num_regs
;
4676 if (str_hash_insert (md
.dynreg_hash
, name
, dr
, 0) != NULL
)
4678 as_bad (_("Attempt to redefine register set `%s'"), name
);
4682 if (*input_line_pointer
!= ',')
4684 ++input_line_pointer
; /* skip comma */
4687 demand_empty_rest_of_line ();
4691 ignore_rest_of_line ();
4695 dot_byteorder (int byteorder
)
4697 segment_info_type
*seginfo
= seg_info (now_seg
);
4699 if (byteorder
== -1)
4701 if (seginfo
->tc_segment_info_data
.endian
== 0)
4702 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4703 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4706 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4708 if (target_big_endian
!= byteorder
)
4710 target_big_endian
= byteorder
;
4711 if (target_big_endian
)
4713 ia64_number_to_chars
= number_to_chars_bigendian
;
4714 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4718 ia64_number_to_chars
= number_to_chars_littleendian
;
4719 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4725 dot_psr (int dummy ATTRIBUTE_UNUSED
)
4732 ch
= get_symbol_name (&option
);
4733 if (strcmp (option
, "lsb") == 0)
4734 md
.flags
&= ~EF_IA_64_BE
;
4735 else if (strcmp (option
, "msb") == 0)
4736 md
.flags
|= EF_IA_64_BE
;
4737 else if (strcmp (option
, "abi32") == 0)
4738 md
.flags
&= ~EF_IA_64_ABI64
;
4739 else if (strcmp (option
, "abi64") == 0)
4740 md
.flags
|= EF_IA_64_ABI64
;
4742 as_bad (_("Unknown psr option `%s'"), option
);
4743 *input_line_pointer
= ch
;
4745 SKIP_WHITESPACE_AFTER_NAME ();
4746 if (*input_line_pointer
!= ',')
4749 ++input_line_pointer
;
4752 demand_empty_rest_of_line ();
4756 dot_ln (int dummy ATTRIBUTE_UNUSED
)
4758 new_logical_line (0, get_absolute_expression ());
4759 demand_empty_rest_of_line ();
4763 cross_section (int ref
, void (*builder
) (int), int ua
)
4766 int saved_auto_align
;
4767 unsigned int section_count
;
4770 start
= input_line_pointer
;
4771 name
= obj_elf_section_name ();
4774 end
= input_line_pointer
;
4775 if (*input_line_pointer
!= ',')
4777 as_bad (_("Comma expected after section name"));
4778 ignore_rest_of_line ();
4782 end
= input_line_pointer
+ 1; /* skip comma */
4783 input_line_pointer
= start
;
4784 md
.keep_pending_output
= 1;
4785 section_count
= bfd_count_sections (stdoutput
);
4786 obj_elf_section (0);
4787 if (section_count
!= bfd_count_sections (stdoutput
))
4788 as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."));
4789 input_line_pointer
= end
;
4790 saved_auto_align
= md
.auto_align
;
4795 md
.auto_align
= saved_auto_align
;
4796 obj_elf_previous (0);
4797 md
.keep_pending_output
= 0;
4801 dot_xdata (int size
)
4803 cross_section (size
, cons
, 0);
4806 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4809 stmt_float_cons (int kind
)
4829 do_align (alignment
, NULL
, 0, 0);
4834 stmt_cons_ua (int size
)
4836 int saved_auto_align
= md
.auto_align
;
4840 md
.auto_align
= saved_auto_align
;
4844 dot_xfloat_cons (int kind
)
4846 cross_section (kind
, stmt_float_cons
, 0);
4850 dot_xstringer (int zero
)
4852 cross_section (zero
, stringer
, 0);
4856 dot_xdata_ua (int size
)
4858 cross_section (size
, cons
, 1);
4862 dot_xfloat_cons_ua (int kind
)
4864 cross_section (kind
, float_cons
, 1);
4867 /* .reg.val <regname>,value */
4870 dot_reg_val (int dummy ATTRIBUTE_UNUSED
)
4874 expression_and_evaluate (®
);
4875 if (reg
.X_op
!= O_register
)
4877 as_bad (_("Register name expected"));
4878 ignore_rest_of_line ();
4880 else if (*input_line_pointer
++ != ',')
4882 as_bad (_("Comma expected"));
4883 ignore_rest_of_line ();
4887 valueT value
= get_absolute_expression ();
4888 int regno
= reg
.X_add_number
;
4889 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4890 as_warn (_("Register value annotation ignored"));
4893 gr_values
[regno
- REG_GR
].known
= 1;
4894 gr_values
[regno
- REG_GR
].value
= value
;
4895 gr_values
[regno
- REG_GR
].path
= md
.path
;
4898 demand_empty_rest_of_line ();
4903 .serialize.instruction
4906 dot_serialize (int type
)
4908 insn_group_break (0, 0, 0);
4910 instruction_serialization ();
4912 data_serialization ();
4913 insn_group_break (0, 0, 0);
4914 demand_empty_rest_of_line ();
4917 /* select dv checking mode
4922 A stop is inserted when changing modes
4926 dot_dv_mode (int type
)
4928 if (md
.manual_bundling
)
4929 as_warn (_("Directive invalid within a bundle"));
4931 if (type
== 'E' || type
== 'A')
4932 md
.mode_explicitly_set
= 0;
4934 md
.mode_explicitly_set
= 1;
4941 if (md
.explicit_mode
)
4942 insn_group_break (1, 0, 0);
4943 md
.explicit_mode
= 0;
4947 if (!md
.explicit_mode
)
4948 insn_group_break (1, 0, 0);
4949 md
.explicit_mode
= 1;
4953 if (md
.explicit_mode
!= md
.default_explicit_mode
)
4954 insn_group_break (1, 0, 0);
4955 md
.explicit_mode
= md
.default_explicit_mode
;
4956 md
.mode_explicitly_set
= 0;
4962 print_prmask (valueT mask
)
4965 const char *comma
= "";
4966 for (regno
= 0; regno
< 64; regno
++)
4968 if (mask
& ((valueT
) 1 << regno
))
4970 fprintf (stderr
, "%s p%d", comma
, regno
);
4977 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
4978 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
4979 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
4980 .pred.safe_across_calls p1 [, p2 [,...]]
4984 dot_pred_rel (int type
)
4988 int p1
= -1, p2
= -1;
4992 if (*input_line_pointer
== '"')
4995 char *form
= demand_copy_C_string (&len
);
4997 if (strcmp (form
, "mutex") == 0)
4999 else if (strcmp (form
, "clear") == 0)
5001 else if (strcmp (form
, "imply") == 0)
5005 else if (*input_line_pointer
== '@')
5010 ++input_line_pointer
;
5011 c
= get_symbol_name (&form
);
5013 if (strcmp (form
, "mutex") == 0)
5015 else if (strcmp (form
, "clear") == 0)
5017 else if (strcmp (form
, "imply") == 0)
5019 (void) restore_line_pointer (c
);
5023 as_bad (_("Missing predicate relation type"));
5024 ignore_rest_of_line ();
5029 as_bad (_("Unrecognized predicate relation type"));
5030 ignore_rest_of_line ();
5033 if (*input_line_pointer
== ',')
5034 ++input_line_pointer
;
5042 expressionS pr
, *pr1
, *pr2
;
5044 sep
= parse_operand_and_eval (&pr
, ',');
5045 if (pr
.X_op
== O_register
5046 && pr
.X_add_number
>= REG_P
5047 && pr
.X_add_number
<= REG_P
+ 63)
5049 regno
= pr
.X_add_number
- REG_P
;
5057 else if (type
!= 'i'
5058 && pr
.X_op
== O_subtract
5059 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5060 && pr1
->X_op
== O_register
5061 && pr1
->X_add_number
>= REG_P
5062 && pr1
->X_add_number
<= REG_P
+ 63
5063 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5064 && pr2
->X_op
== O_register
5065 && pr2
->X_add_number
>= REG_P
5066 && pr2
->X_add_number
<= REG_P
+ 63)
5071 regno
= pr1
->X_add_number
- REG_P
;
5072 stop
= pr2
->X_add_number
- REG_P
;
5075 as_bad (_("Bad register range"));
5076 ignore_rest_of_line ();
5079 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5080 count
+= stop
- regno
+ 1;
5084 as_bad (_("Predicate register expected"));
5085 ignore_rest_of_line ();
5089 as_warn (_("Duplicate predicate register ignored"));
5100 clear_qp_mutex (mask
);
5101 clear_qp_implies (mask
, (valueT
) 0);
5104 if (count
!= 2 || p1
== -1 || p2
== -1)
5105 as_bad (_("Predicate source and target required"));
5106 else if (p1
== 0 || p2
== 0)
5107 as_bad (_("Use of p0 is not valid in this context"));
5109 add_qp_imply (p1
, p2
);
5114 as_bad (_("At least two PR arguments expected"));
5119 as_bad (_("Use of p0 is not valid in this context"));
5122 add_qp_mutex (mask
);
5125 /* note that we don't override any existing relations */
5128 as_bad (_("At least one PR argument expected"));
5133 fprintf (stderr
, "Safe across calls: ");
5134 print_prmask (mask
);
5135 fprintf (stderr
, "\n");
5137 qp_safe_across_calls
= mask
;
5140 demand_empty_rest_of_line ();
5143 /* .entry label [, label [, ...]]
5144 Hint to DV code that the given labels are to be considered entry points.
5145 Otherwise, only global labels are considered entry points. */
5148 dot_entry (int dummy ATTRIBUTE_UNUSED
)
5156 c
= get_symbol_name (&name
);
5157 symbolP
= symbol_find_or_make (name
);
5159 if (str_hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), symbolP
, 0))
5160 as_bad (_("duplicate entry hint %s"), name
);
5162 *input_line_pointer
= c
;
5163 SKIP_WHITESPACE_AFTER_NAME ();
5164 c
= *input_line_pointer
;
5167 input_line_pointer
++;
5169 if (*input_line_pointer
== '\n')
5175 demand_empty_rest_of_line ();
5178 /* .mem.offset offset, base
5179 "base" is used to distinguish between offsets from a different base. */
5182 dot_mem_offset (int dummy ATTRIBUTE_UNUSED
)
5184 md
.mem_offset
.hint
= 1;
5185 md
.mem_offset
.offset
= get_absolute_expression ();
5186 if (*input_line_pointer
!= ',')
5188 as_bad (_("Comma expected"));
5189 ignore_rest_of_line ();
5192 ++input_line_pointer
;
5193 md
.mem_offset
.base
= get_absolute_expression ();
5194 demand_empty_rest_of_line ();
5197 /* ia64-specific pseudo-ops: */
5198 const pseudo_typeS md_pseudo_table
[] =
5200 { "radix", dot_radix
, 0 },
5201 { "lcomm", s_lcomm_bytes
, 1 },
5202 { "loc", dot_loc
, 0 },
5203 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5204 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5205 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5206 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5207 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5208 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5209 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5210 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5211 { "proc", dot_proc
, 0 },
5212 { "body", dot_body
, 0 },
5213 { "prologue", dot_prologue
, 0 },
5214 { "endp", dot_endp
, 0 },
5216 { "fframe", dot_fframe
, 0 },
5217 { "vframe", dot_vframe
, 0 },
5218 { "vframesp", dot_vframesp
, 0 },
5219 { "vframepsp", dot_vframesp
, 1 },
5220 { "save", dot_save
, 0 },
5221 { "restore", dot_restore
, 0 },
5222 { "restorereg", dot_restorereg
, 0 },
5223 { "restorereg.p", dot_restorereg
, 1 },
5224 { "handlerdata", dot_handlerdata
, 0 },
5225 { "unwentry", dot_unwentry
, 0 },
5226 { "altrp", dot_altrp
, 0 },
5227 { "savesp", dot_savemem
, 0 },
5228 { "savepsp", dot_savemem
, 1 },
5229 { "save.g", dot_saveg
, 0 },
5230 { "save.f", dot_savef
, 0 },
5231 { "save.b", dot_saveb
, 0 },
5232 { "save.gf", dot_savegf
, 0 },
5233 { "spill", dot_spill
, 0 },
5234 { "spillreg", dot_spillreg
, 0 },
5235 { "spillsp", dot_spillmem
, 0 },
5236 { "spillpsp", dot_spillmem
, 1 },
5237 { "spillreg.p", dot_spillreg
, 1 },
5238 { "spillsp.p", dot_spillmem
, ~0 },
5239 { "spillpsp.p", dot_spillmem
, ~1 },
5240 { "label_state", dot_label_state
, 0 },
5241 { "copy_state", dot_copy_state
, 0 },
5242 { "unwabi", dot_unwabi
, 0 },
5243 { "personality", dot_personality
, 0 },
5244 { "mii", dot_template
, 0x0 },
5245 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5246 { "mlx", dot_template
, 0x2 },
5247 { "mmi", dot_template
, 0x4 },
5248 { "mfi", dot_template
, 0x6 },
5249 { "mmf", dot_template
, 0x7 },
5250 { "mib", dot_template
, 0x8 },
5251 { "mbb", dot_template
, 0x9 },
5252 { "bbb", dot_template
, 0xb },
5253 { "mmb", dot_template
, 0xc },
5254 { "mfb", dot_template
, 0xe },
5255 { "align", dot_align
, 0 },
5256 { "regstk", dot_regstk
, 0 },
5257 { "rotr", dot_rot
, DYNREG_GR
},
5258 { "rotf", dot_rot
, DYNREG_FR
},
5259 { "rotp", dot_rot
, DYNREG_PR
},
5260 { "lsb", dot_byteorder
, 0 },
5261 { "msb", dot_byteorder
, 1 },
5262 { "psr", dot_psr
, 0 },
5263 { "alias", dot_alias
, 0 },
5264 { "secalias", dot_alias
, 1 },
5265 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5267 { "xdata1", dot_xdata
, 1 },
5268 { "xdata2", dot_xdata
, 2 },
5269 { "xdata4", dot_xdata
, 4 },
5270 { "xdata8", dot_xdata
, 8 },
5271 { "xdata16", dot_xdata
, 16 },
5272 { "xreal4", dot_xfloat_cons
, 'f' },
5273 { "xreal8", dot_xfloat_cons
, 'd' },
5274 { "xreal10", dot_xfloat_cons
, 'x' },
5275 { "xreal16", dot_xfloat_cons
, 'X' },
5276 { "xstring", dot_xstringer
, 8 + 0 },
5277 { "xstringz", dot_xstringer
, 8 + 1 },
5279 /* unaligned versions: */
5280 { "xdata2.ua", dot_xdata_ua
, 2 },
5281 { "xdata4.ua", dot_xdata_ua
, 4 },
5282 { "xdata8.ua", dot_xdata_ua
, 8 },
5283 { "xdata16.ua", dot_xdata_ua
, 16 },
5284 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5285 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5286 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5287 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5289 /* annotations/DV checking support */
5290 { "entry", dot_entry
, 0 },
5291 { "mem.offset", dot_mem_offset
, 0 },
5292 { "pred.rel", dot_pred_rel
, 0 },
5293 { "pred.rel.clear", dot_pred_rel
, 'c' },
5294 { "pred.rel.imply", dot_pred_rel
, 'i' },
5295 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5296 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5297 { "reg.val", dot_reg_val
, 0 },
5298 { "serialize.data", dot_serialize
, 0 },
5299 { "serialize.instruction", dot_serialize
, 1 },
5300 { "auto", dot_dv_mode
, 'a' },
5301 { "explicit", dot_dv_mode
, 'e' },
5302 { "default", dot_dv_mode
, 'd' },
5304 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5305 IA-64 aligns data allocation pseudo-ops by default, so we have to
5306 tell it that these ones are supposed to be unaligned. Long term,
5307 should rewrite so that only IA-64 specific data allocation pseudo-ops
5308 are aligned by default. */
5309 {"2byte", stmt_cons_ua
, 2},
5310 {"4byte", stmt_cons_ua
, 4},
5311 {"8byte", stmt_cons_ua
, 8},
5314 {"vms_common", obj_elf_vms_common
, 0},
5320 static const struct pseudo_opcode
5323 void (*handler
) (int);
5328 /* these are more like pseudo-ops, but don't start with a dot */
5329 { "data1", cons
, 1 },
5330 { "data2", cons
, 2 },
5331 { "data4", cons
, 4 },
5332 { "data8", cons
, 8 },
5333 { "data16", cons
, 16 },
5334 { "real4", stmt_float_cons
, 'f' },
5335 { "real8", stmt_float_cons
, 'd' },
5336 { "real10", stmt_float_cons
, 'x' },
5337 { "real16", stmt_float_cons
, 'X' },
5338 { "string", stringer
, 8 + 0 },
5339 { "stringz", stringer
, 8 + 1 },
5341 /* unaligned versions: */
5342 { "data2.ua", stmt_cons_ua
, 2 },
5343 { "data4.ua", stmt_cons_ua
, 4 },
5344 { "data8.ua", stmt_cons_ua
, 8 },
5345 { "data16.ua", stmt_cons_ua
, 16 },
5346 { "real4.ua", float_cons
, 'f' },
5347 { "real8.ua", float_cons
, 'd' },
5348 { "real10.ua", float_cons
, 'x' },
5349 { "real16.ua", float_cons
, 'X' },
5352 /* Declare a register by creating a symbol for it and entering it in
5353 the symbol table. */
5356 declare_register (const char *name
, unsigned int regnum
)
5360 sym
= symbol_create (name
, reg_section
, &zero_address_frag
, regnum
);
5362 if (str_hash_insert (md
.reg_hash
, S_GET_NAME (sym
), sym
, 0) != NULL
)
5363 as_fatal (_("duplicate %s"), name
);
5369 declare_register_set (const char *prefix
,
5370 unsigned int num_regs
,
5371 unsigned int base_regnum
)
5376 for (i
= 0; i
< num_regs
; ++i
)
5378 snprintf (name
, sizeof (name
), "%s%u", prefix
, i
);
5379 declare_register (name
, base_regnum
+ i
);
5384 operand_width (enum ia64_opnd opnd
)
5386 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5387 unsigned int bits
= 0;
5391 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5392 bits
+= odesc
->field
[i
].bits
;
5397 static enum operand_match_result
5398 operand_match (const struct ia64_opcode
*idesc
, int res_index
, expressionS
*e
)
5400 enum ia64_opnd opnd
= idesc
->operands
[res_index
];
5401 int bits
, relocatable
= 0;
5402 struct insn_fix
*fix
;
5409 case IA64_OPND_AR_CCV
:
5410 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5411 return OPERAND_MATCH
;
5414 case IA64_OPND_AR_CSD
:
5415 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5416 return OPERAND_MATCH
;
5419 case IA64_OPND_AR_PFS
:
5420 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5421 return OPERAND_MATCH
;
5425 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5426 return OPERAND_MATCH
;
5430 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5431 return OPERAND_MATCH
;
5435 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5436 return OPERAND_MATCH
;
5439 case IA64_OPND_PR_ROT
:
5440 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5441 return OPERAND_MATCH
;
5445 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5446 return OPERAND_MATCH
;
5449 case IA64_OPND_PSR_L
:
5450 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5451 return OPERAND_MATCH
;
5454 case IA64_OPND_PSR_UM
:
5455 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5456 return OPERAND_MATCH
;
5460 if (e
->X_op
== O_constant
)
5462 if (e
->X_add_number
== 1)
5463 return OPERAND_MATCH
;
5465 return OPERAND_OUT_OF_RANGE
;
5470 if (e
->X_op
== O_constant
)
5472 if (e
->X_add_number
== 8)
5473 return OPERAND_MATCH
;
5475 return OPERAND_OUT_OF_RANGE
;
5480 if (e
->X_op
== O_constant
)
5482 if (e
->X_add_number
== 16)
5483 return OPERAND_MATCH
;
5485 return OPERAND_OUT_OF_RANGE
;
5489 /* register operands: */
5492 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5493 && e
->X_add_number
< REG_AR
+ 128)
5494 return OPERAND_MATCH
;
5499 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5500 && e
->X_add_number
< REG_BR
+ 8)
5501 return OPERAND_MATCH
;
5505 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5506 && e
->X_add_number
< REG_CR
+ 128)
5507 return OPERAND_MATCH
;
5510 case IA64_OPND_DAHR3
:
5511 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_DAHR
5512 && e
->X_add_number
< REG_DAHR
+ 8)
5513 return OPERAND_MATCH
;
5520 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5521 && e
->X_add_number
< REG_FR
+ 128)
5522 return OPERAND_MATCH
;
5527 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5528 && e
->X_add_number
< REG_P
+ 64)
5529 return OPERAND_MATCH
;
5535 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5536 && e
->X_add_number
< REG_GR
+ 128)
5537 return OPERAND_MATCH
;
5540 case IA64_OPND_R3_2
:
5541 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5543 if (e
->X_add_number
< REG_GR
+ 4)
5544 return OPERAND_MATCH
;
5545 else if (e
->X_add_number
< REG_GR
+ 128)
5546 return OPERAND_OUT_OF_RANGE
;
5550 /* indirect operands: */
5551 case IA64_OPND_CPUID_R3
:
5552 case IA64_OPND_DBR_R3
:
5553 case IA64_OPND_DTR_R3
:
5554 case IA64_OPND_ITR_R3
:
5555 case IA64_OPND_IBR_R3
:
5556 case IA64_OPND_MSR_R3
:
5557 case IA64_OPND_PKR_R3
:
5558 case IA64_OPND_PMC_R3
:
5559 case IA64_OPND_PMD_R3
:
5560 case IA64_OPND_DAHR_R3
:
5561 case IA64_OPND_RR_R3
:
5562 if (e
->X_op
== O_index
&& e
->X_op_symbol
5563 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5564 == opnd
- IA64_OPND_CPUID_R3
))
5565 return OPERAND_MATCH
;
5569 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5570 return OPERAND_MATCH
;
5573 /* immediate operands: */
5574 case IA64_OPND_CNT2a
:
5575 case IA64_OPND_LEN4
:
5576 case IA64_OPND_LEN6
:
5577 bits
= operand_width (idesc
->operands
[res_index
]);
5578 if (e
->X_op
== O_constant
)
5580 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5581 return OPERAND_MATCH
;
5583 return OPERAND_OUT_OF_RANGE
;
5587 case IA64_OPND_CNT2b
:
5588 if (e
->X_op
== O_constant
)
5590 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5591 return OPERAND_MATCH
;
5593 return OPERAND_OUT_OF_RANGE
;
5597 case IA64_OPND_CNT2c
:
5598 val
= e
->X_add_number
;
5599 if (e
->X_op
== O_constant
)
5601 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5602 return OPERAND_MATCH
;
5604 return OPERAND_OUT_OF_RANGE
;
5609 /* SOR must be an integer multiple of 8 */
5610 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5611 return OPERAND_OUT_OF_RANGE
;
5615 if (e
->X_op
== O_constant
)
5617 if ((bfd_vma
) e
->X_add_number
<= 96)
5618 return OPERAND_MATCH
;
5620 return OPERAND_OUT_OF_RANGE
;
5624 case IA64_OPND_IMMU62
:
5625 if (e
->X_op
== O_constant
)
5627 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5628 return OPERAND_MATCH
;
5630 return OPERAND_OUT_OF_RANGE
;
5634 /* FIXME -- need 62-bit relocation type */
5635 as_bad (_("62-bit relocation not yet implemented"));
5639 case IA64_OPND_IMMU64
:
5640 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5641 || e
->X_op
== O_subtract
)
5643 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5644 fix
->code
= BFD_RELOC_IA64_IMM64
;
5645 if (e
->X_op
!= O_subtract
)
5647 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5648 if (e
->X_op
== O_pseudo_fixup
)
5652 fix
->opnd
= idesc
->operands
[res_index
];
5655 ++CURR_SLOT
.num_fixups
;
5656 return OPERAND_MATCH
;
5658 else if (e
->X_op
== O_constant
)
5659 return OPERAND_MATCH
;
5662 case IA64_OPND_IMMU5b
:
5663 if (e
->X_op
== O_constant
)
5665 val
= e
->X_add_number
;
5666 if (val
>= 32 && val
<= 63)
5667 return OPERAND_MATCH
;
5669 return OPERAND_OUT_OF_RANGE
;
5673 case IA64_OPND_CCNT5
:
5674 case IA64_OPND_CNT5
:
5675 case IA64_OPND_CNT6
:
5676 case IA64_OPND_CPOS6a
:
5677 case IA64_OPND_CPOS6b
:
5678 case IA64_OPND_CPOS6c
:
5679 case IA64_OPND_IMMU2
:
5680 case IA64_OPND_IMMU7a
:
5681 case IA64_OPND_IMMU7b
:
5682 case IA64_OPND_IMMU16
:
5683 case IA64_OPND_IMMU19
:
5684 case IA64_OPND_IMMU21
:
5685 case IA64_OPND_IMMU24
:
5686 case IA64_OPND_MBTYPE4
:
5687 case IA64_OPND_MHTYPE8
:
5688 case IA64_OPND_POS6
:
5689 bits
= operand_width (idesc
->operands
[res_index
]);
5690 if (e
->X_op
== O_constant
)
5692 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5693 return OPERAND_MATCH
;
5695 return OPERAND_OUT_OF_RANGE
;
5699 case IA64_OPND_IMMU9
:
5700 bits
= operand_width (idesc
->operands
[res_index
]);
5701 if (e
->X_op
== O_constant
)
5703 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5705 int lobits
= e
->X_add_number
& 0x3;
5706 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5707 e
->X_add_number
|= (bfd_vma
) 0x3;
5708 return OPERAND_MATCH
;
5711 return OPERAND_OUT_OF_RANGE
;
5715 case IA64_OPND_IMM44
:
5716 /* least 16 bits must be zero */
5717 if ((e
->X_add_number
& 0xffff) != 0)
5718 /* XXX technically, this is wrong: we should not be issuing warning
5719 messages until we're sure this instruction pattern is going to
5721 as_warn (_("lower 16 bits of mask ignored"));
5723 if (e
->X_op
== O_constant
)
5725 if (((e
->X_add_number
>= 0
5726 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5727 || (e
->X_add_number
< 0
5728 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5731 if (e
->X_add_number
>= 0
5732 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5734 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5736 return OPERAND_MATCH
;
5739 return OPERAND_OUT_OF_RANGE
;
5743 case IA64_OPND_IMM17
:
5744 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5745 if (e
->X_op
== O_constant
)
5747 if (((e
->X_add_number
>= 0
5748 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5749 || (e
->X_add_number
< 0
5750 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5753 if (e
->X_add_number
>= 0
5754 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5756 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5758 return OPERAND_MATCH
;
5761 return OPERAND_OUT_OF_RANGE
;
5765 case IA64_OPND_IMM14
:
5766 case IA64_OPND_IMM22
:
5769 case IA64_OPND_IMM1
:
5770 case IA64_OPND_IMM8
:
5771 case IA64_OPND_IMM8U4
:
5772 case IA64_OPND_IMM8M1
:
5773 case IA64_OPND_IMM8M1U4
:
5774 case IA64_OPND_IMM8M1U8
:
5775 case IA64_OPND_IMM9a
:
5776 case IA64_OPND_IMM9b
:
5777 bits
= operand_width (idesc
->operands
[res_index
]);
5778 if (relocatable
&& (e
->X_op
== O_symbol
5779 || e
->X_op
== O_subtract
5780 || e
->X_op
== O_pseudo_fixup
))
5782 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5784 if (idesc
->operands
[res_index
] == IA64_OPND_IMM14
)
5785 fix
->code
= BFD_RELOC_IA64_IMM14
;
5787 fix
->code
= BFD_RELOC_IA64_IMM22
;
5789 if (e
->X_op
!= O_subtract
)
5791 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5792 if (e
->X_op
== O_pseudo_fixup
)
5796 fix
->opnd
= idesc
->operands
[res_index
];
5799 ++CURR_SLOT
.num_fixups
;
5800 return OPERAND_MATCH
;
5802 else if (e
->X_op
!= O_constant
5803 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5804 return OPERAND_MISMATCH
;
5806 if (opnd
== IA64_OPND_IMM8M1U4
)
5808 /* Zero is not valid for unsigned compares that take an adjusted
5809 constant immediate range. */
5810 if (e
->X_add_number
== 0)
5811 return OPERAND_OUT_OF_RANGE
;
5813 /* Sign-extend 32-bit unsigned numbers, so that the following range
5814 checks will work. */
5815 val
= e
->X_add_number
;
5816 if ((val
& (~(bfd_vma
) 0 << 32)) == 0)
5817 val
= (val
^ ((bfd_vma
) 1 << 31)) - ((bfd_vma
) 1 << 31);
5819 /* Check for 0x100000000. This is valid because
5820 0x100000000-1 is the same as ((uint32_t) -1). */
5821 if (val
== ((bfd_signed_vma
) 1 << 32))
5822 return OPERAND_MATCH
;
5826 else if (opnd
== IA64_OPND_IMM8M1U8
)
5828 /* Zero is not valid for unsigned compares that take an adjusted
5829 constant immediate range. */
5830 if (e
->X_add_number
== 0)
5831 return OPERAND_OUT_OF_RANGE
;
5833 /* Check for 0x10000000000000000. */
5834 if (e
->X_op
== O_big
)
5836 if (generic_bignum
[0] == 0
5837 && generic_bignum
[1] == 0
5838 && generic_bignum
[2] == 0
5839 && generic_bignum
[3] == 0
5840 && generic_bignum
[4] == 1)
5841 return OPERAND_MATCH
;
5843 return OPERAND_OUT_OF_RANGE
;
5846 val
= e
->X_add_number
- 1;
5848 else if (opnd
== IA64_OPND_IMM8M1
)
5849 val
= e
->X_add_number
- 1;
5850 else if (opnd
== IA64_OPND_IMM8U4
)
5852 /* Sign-extend 32-bit unsigned numbers, so that the following range
5853 checks will work. */
5854 val
= e
->X_add_number
;
5855 if ((val
& (~(bfd_vma
) 0 << 32)) == 0)
5856 val
= (val
^ ((bfd_vma
) 1 << 31)) - ((bfd_vma
) 1 << 31);
5859 val
= e
->X_add_number
;
5861 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5862 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5863 return OPERAND_MATCH
;
5865 return OPERAND_OUT_OF_RANGE
;
5867 case IA64_OPND_INC3
:
5868 /* +/- 1, 4, 8, 16 */
5869 val
= e
->X_add_number
;
5872 if (e
->X_op
== O_constant
)
5874 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5875 return OPERAND_MATCH
;
5877 return OPERAND_OUT_OF_RANGE
;
5881 case IA64_OPND_TGT25
:
5882 case IA64_OPND_TGT25b
:
5883 case IA64_OPND_TGT25c
:
5884 case IA64_OPND_TGT64
:
5885 if (e
->X_op
== O_symbol
)
5887 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5888 if (opnd
== IA64_OPND_TGT25
)
5889 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5890 else if (opnd
== IA64_OPND_TGT25b
)
5891 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5892 else if (opnd
== IA64_OPND_TGT25c
)
5893 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5894 else if (opnd
== IA64_OPND_TGT64
)
5895 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5899 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5900 fix
->opnd
= idesc
->operands
[res_index
];
5903 ++CURR_SLOT
.num_fixups
;
5904 return OPERAND_MATCH
;
5907 case IA64_OPND_TAG13
:
5908 case IA64_OPND_TAG13b
:
5912 return OPERAND_MATCH
;
5915 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5916 /* There are no external relocs for TAG13/TAG13b fields, so we
5917 create a dummy reloc. This will not live past md_apply_fix. */
5918 fix
->code
= BFD_RELOC_UNUSED
;
5919 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5920 fix
->opnd
= idesc
->operands
[res_index
];
5923 ++CURR_SLOT
.num_fixups
;
5924 return OPERAND_MATCH
;
5931 case IA64_OPND_LDXMOV
:
5932 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5933 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5934 fix
->opnd
= idesc
->operands
[res_index
];
5937 ++CURR_SLOT
.num_fixups
;
5938 return OPERAND_MATCH
;
5940 case IA64_OPND_STRD5b
:
5941 if (e
->X_op
== O_constant
)
5943 /* 5-bit signed scaled by 64 */
5944 if ((e
->X_add_number
<= ( 0xf << 6 ))
5945 && (e
->X_add_number
>= -( 0x10 << 6 )))
5948 /* Must be a multiple of 64 */
5949 if ((e
->X_add_number
& 0x3f) != 0)
5950 as_warn (_("stride must be a multiple of 64; lower 6 bits ignored"));
5952 e
->X_add_number
&= ~ 0x3f;
5953 return OPERAND_MATCH
;
5956 return OPERAND_OUT_OF_RANGE
;
5959 case IA64_OPND_CNT6a
:
5960 if (e
->X_op
== O_constant
)
5962 /* 6-bit unsigned biased by 1 -- count 0 is meaningless */
5963 if ((e
->X_add_number
<= 64)
5964 && (e
->X_add_number
> 0) )
5966 return OPERAND_MATCH
;
5969 return OPERAND_OUT_OF_RANGE
;
5976 return OPERAND_MISMATCH
;
5980 parse_operand (expressionS
*e
, int more
)
5984 memset (e
, 0, sizeof (*e
));
5988 resolve_register (e
);
5989 sep
= *input_line_pointer
;
5990 if (more
&& (sep
== ',' || sep
== more
))
5991 ++input_line_pointer
;
5996 parse_operand_and_eval (expressionS
*e
, int more
)
5998 int sep
= parse_operand (e
, more
);
5999 resolve_expression (e
);
6004 parse_operand_maybe_eval (expressionS
*e
, int more
, enum ia64_opnd op
)
6006 int sep
= parse_operand (e
, more
);
6009 case IA64_OPND_IMM14
:
6010 case IA64_OPND_IMM22
:
6011 case IA64_OPND_IMMU64
:
6012 case IA64_OPND_TGT25
:
6013 case IA64_OPND_TGT25b
:
6014 case IA64_OPND_TGT25c
:
6015 case IA64_OPND_TGT64
:
6016 case IA64_OPND_TAG13
:
6017 case IA64_OPND_TAG13b
:
6018 case IA64_OPND_LDXMOV
:
6021 resolve_expression (e
);
6027 /* Returns the next entry in the opcode table that matches the one in
6028 IDESC, and frees the entry in IDESC. If no matching entry is
6029 found, NULL is returned instead. */
6031 static struct ia64_opcode
*
6032 get_next_opcode (struct ia64_opcode
*idesc
)
6034 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6035 ia64_free_opcode (idesc
);
6039 /* Parse the operands for the opcode and find the opcode variant that
6040 matches the specified operands, or NULL if no match is possible. */
6042 static struct ia64_opcode
*
6043 parse_operands (struct ia64_opcode
*idesc
)
6045 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6046 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6049 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6050 enum operand_match_result result
;
6052 char *first_arg
= 0, *end
, *saved_input_pointer
;
6055 gas_assert (strlen (idesc
->name
) <= 128);
6057 strcpy (mnemonic
, idesc
->name
);
6058 if (idesc
->operands
[2] == IA64_OPND_SOF
6059 || idesc
->operands
[1] == IA64_OPND_SOF
)
6061 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6062 can't parse the first operand until we have parsed the
6063 remaining operands of the "alloc" instruction. */
6065 first_arg
= input_line_pointer
;
6066 end
= strchr (input_line_pointer
, '=');
6069 as_bad (_("Expected separator `='"));
6072 input_line_pointer
= end
+ 1;
6079 if (i
< NELEMS (CURR_SLOT
.opnd
))
6081 enum ia64_opnd op
= IA64_OPND_NIL
;
6082 if (i
< NELEMS (idesc
->operands
))
6083 op
= idesc
->operands
[i
];
6084 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ i
, '=', op
);
6085 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6092 sep
= parse_operand (&dummy
, '=');
6093 if (dummy
.X_op
== O_absent
)
6099 if (sep
!= '=' && sep
!= ',')
6104 if (num_outputs
> 0)
6105 as_bad (_("Duplicate equal sign (=) in instruction"));
6107 num_outputs
= i
+ 1;
6112 as_bad (_("Illegal operand separator `%c'"), sep
);
6116 if (idesc
->operands
[2] == IA64_OPND_SOF
6117 || idesc
->operands
[1] == IA64_OPND_SOF
)
6119 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6120 Note, however, that due to that mapping operand numbers in error
6121 messages for any of the constant operands will not be correct. */
6122 know (strcmp (idesc
->name
, "alloc") == 0);
6123 /* The first operand hasn't been parsed/initialized, yet (but
6124 num_operands intentionally doesn't account for that). */
6125 i
= num_operands
> 4 ? 2 : 1;
6126 #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6127 ? CURR_SLOT.opnd[n].X_add_number \
6129 sof
= set_regstack (FORCE_CONST(i
),
6132 FORCE_CONST(i
+ 3));
6135 /* now we can parse the first arg: */
6136 saved_input_pointer
= input_line_pointer
;
6137 input_line_pointer
= first_arg
;
6138 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ 0, '=',
6139 idesc
->operands
[0]);
6141 --num_outputs
; /* force error */
6142 input_line_pointer
= saved_input_pointer
;
6144 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6145 if (CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6146 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
)
6147 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6148 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6150 CURR_SLOT
.opnd
[i
+ 1].X_op
= O_illegal
;
6151 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6154 highest_unmatched_operand
= -4;
6155 curr_out_of_range_pos
= -1;
6157 for (; idesc
; idesc
= get_next_opcode (idesc
))
6159 if (num_outputs
!= idesc
->num_outputs
)
6160 continue; /* mismatch in # of outputs */
6161 if (highest_unmatched_operand
< 0)
6162 highest_unmatched_operand
|= 1;
6163 if (num_operands
> NELEMS (idesc
->operands
)
6164 || (num_operands
< NELEMS (idesc
->operands
)
6165 && idesc
->operands
[num_operands
])
6166 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6167 continue; /* mismatch in number of arguments */
6168 if (highest_unmatched_operand
< 0)
6169 highest_unmatched_operand
|= 2;
6171 CURR_SLOT
.num_fixups
= 0;
6173 /* Try to match all operands. If we see an out-of-range operand,
6174 then continue trying to match the rest of the operands, since if
6175 the rest match, then this idesc will give the best error message. */
6177 out_of_range_pos
= -1;
6178 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6180 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6181 if (result
!= OPERAND_MATCH
)
6183 if (result
!= OPERAND_OUT_OF_RANGE
)
6185 if (out_of_range_pos
< 0)
6186 /* remember position of the first out-of-range operand: */
6187 out_of_range_pos
= i
;
6191 /* If we did not match all operands, or if at least one operand was
6192 out-of-range, then this idesc does not match. Keep track of which
6193 idesc matched the most operands before failing. If we have two
6194 idescs that failed at the same position, and one had an out-of-range
6195 operand, then prefer the out-of-range operand. Thus if we have
6196 "add r0=0x1000000,r1" we get an error saying the constant is out
6197 of range instead of an error saying that the constant should have been
6200 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6202 if (i
> highest_unmatched_operand
6203 || (i
== highest_unmatched_operand
6204 && out_of_range_pos
> curr_out_of_range_pos
))
6206 highest_unmatched_operand
= i
;
6207 if (out_of_range_pos
>= 0)
6209 expected_operand
= idesc
->operands
[out_of_range_pos
];
6210 error_pos
= out_of_range_pos
;
6214 expected_operand
= idesc
->operands
[i
];
6217 curr_out_of_range_pos
= out_of_range_pos
;
6226 if (expected_operand
)
6227 as_bad (_("Operand %u of `%s' should be %s"),
6228 error_pos
+ 1, mnemonic
,
6229 elf64_ia64_operands
[expected_operand
].desc
);
6230 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6231 as_bad (_("Wrong number of output operands"));
6232 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6233 as_bad (_("Wrong number of input operands"));
6235 as_bad (_("Operand mismatch"));
6239 /* Check that the instruction doesn't use
6240 - r0, f0, or f1 as output operands
6241 - the same predicate twice as output operands
6242 - r0 as address of a base update load or store
6243 - the same GR as output and address of a base update load
6244 - two even- or two odd-numbered FRs as output operands of a floating
6245 point parallel load.
6246 At most two (conflicting) output (or output-like) operands can exist,
6247 (floating point parallel loads have three outputs, but the base register,
6248 if updated, cannot conflict with the actual outputs). */
6250 for (i
= 0; i
< num_operands
; ++i
)
6255 switch (idesc
->operands
[i
])
6260 if (i
< num_outputs
)
6262 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6265 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6267 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6272 if (i
< num_outputs
)
6275 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6277 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6284 if (i
< num_outputs
)
6286 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6287 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6290 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6293 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6295 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6299 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6301 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6304 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6306 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6317 as_warn (_("Invalid use of `%c%d' as output operand"), reg_class
, regno
);
6320 as_warn (_("Invalid use of `r%d' as base update address operand"), regno
);
6326 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6331 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6336 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6344 as_warn (_("Invalid duplicate use of `%c%d'"), reg_class
, reg1
);
6346 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6347 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6348 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6349 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6350 && ! ((reg1
^ reg2
) & 1))
6351 as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"),
6352 reg1
- REG_FR
, reg2
- REG_FR
);
6353 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6354 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6355 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6356 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6357 as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"),
6358 reg1
- REG_FR
, reg2
- REG_FR
);
6363 build_insn (struct slot
*slot
, bfd_vma
*insnp
)
6365 const struct ia64_operand
*odesc
, *o2desc
;
6366 struct ia64_opcode
*idesc
= slot
->idesc
;
6372 insn
= idesc
->opcode
| slot
->qp_regno
;
6374 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6376 if (slot
->opnd
[i
].X_op
== O_register
6377 || slot
->opnd
[i
].X_op
== O_constant
6378 || slot
->opnd
[i
].X_op
== O_index
)
6379 val
= slot
->opnd
[i
].X_add_number
;
6380 else if (slot
->opnd
[i
].X_op
== O_big
)
6382 /* This must be the value 0x10000000000000000. */
6383 gas_assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6389 switch (idesc
->operands
[i
])
6391 case IA64_OPND_IMMU64
:
6392 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6393 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6394 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6395 | (((val
>> 63) & 0x1) << 36));
6398 case IA64_OPND_IMMU62
:
6399 val
&= 0x3fffffffffffffffULL
;
6400 if (val
!= slot
->opnd
[i
].X_add_number
)
6401 as_warn (_("Value truncated to 62 bits"));
6402 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6403 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6406 case IA64_OPND_TGT64
:
6408 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6409 insn
|= ((((val
>> 59) & 0x1) << 36)
6410 | (((val
>> 0) & 0xfffff) << 13));
6426 case IA64_OPND_DAHR3
:
6445 case IA64_OPND_R3_2
:
6446 case IA64_OPND_CPUID_R3
:
6447 case IA64_OPND_DBR_R3
:
6448 case IA64_OPND_DTR_R3
:
6449 case IA64_OPND_ITR_R3
:
6450 case IA64_OPND_IBR_R3
:
6452 case IA64_OPND_MSR_R3
:
6453 case IA64_OPND_PKR_R3
:
6454 case IA64_OPND_PMC_R3
:
6455 case IA64_OPND_PMD_R3
:
6456 case IA64_OPND_DAHR_R3
:
6457 case IA64_OPND_RR_R3
:
6465 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6466 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6468 as_bad_where (slot
->src_file
, slot
->src_line
,
6469 _("Bad operand value: %s"), err
);
6470 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6472 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6473 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6475 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6476 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6478 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6479 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6480 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6482 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6483 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6491 emit_one_bundle (void)
6493 int manual_bundling_off
= 0, manual_bundling
= 0;
6494 enum ia64_unit required_unit
, insn_unit
= 0;
6495 enum ia64_insn_type type
[3], insn_type
;
6496 unsigned int template_val
, orig_template
;
6497 bfd_vma insn
[3] = { -1, -1, -1 };
6498 struct ia64_opcode
*idesc
;
6499 int end_of_insn_group
= 0, user_template
= -1;
6500 int n
, i
, j
, first
, curr
, last_slot
;
6501 bfd_vma t0
= 0, t1
= 0;
6502 struct label_fix
*lfix
;
6504 struct insn_fix
*ifix
;
6510 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6511 know (first
>= 0 && first
< NUM_SLOTS
);
6512 n
= MIN (3, md
.num_slots_in_use
);
6514 /* Determine template: user user_template if specified, best match
6517 if (md
.slot
[first
].user_template
>= 0)
6518 user_template
= template_val
= md
.slot
[first
].user_template
;
6521 /* Auto select appropriate template. */
6522 memset (type
, 0, sizeof (type
));
6524 for (i
= 0; i
< n
; ++i
)
6526 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6528 type
[i
] = md
.slot
[curr
].idesc
->type
;
6529 curr
= (curr
+ 1) % NUM_SLOTS
;
6531 template_val
= best_template
[type
[0]][type
[1]][type
[2]];
6534 /* initialize instructions with appropriate nops: */
6535 for (i
= 0; i
< 3; ++i
)
6536 insn
[i
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[i
]];
6540 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6541 from the start of the frag. */
6542 addr_mod
= frag_now_fix () & 15;
6543 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6544 as_bad (_("instruction address is not a multiple of 16"));
6545 frag_now
->insn_addr
= addr_mod
;
6546 frag_now
->has_code
= 1;
6548 /* now fill in slots with as many insns as possible: */
6550 idesc
= md
.slot
[curr
].idesc
;
6551 end_of_insn_group
= 0;
6553 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6555 /* If we have unwind records, we may need to update some now. */
6556 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6557 unw_rec_list
*end_ptr
= NULL
;
6561 /* Find the last prologue/body record in the list for the current
6562 insn, and set the slot number for all records up to that point.
6563 This needs to be done now, because prologue/body records refer to
6564 the current point, not the point after the instruction has been
6565 issued. This matters because there may have been nops emitted
6566 meanwhile. Any non-prologue non-body record followed by a
6567 prologue/body record must also refer to the current point. */
6568 unw_rec_list
*last_ptr
;
6570 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6571 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6572 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6573 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6574 || ptr
->r
.type
== body
)
6578 /* Make last_ptr point one after the last prologue/body
6580 last_ptr
= last_ptr
->next
;
6581 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6584 ptr
->slot_number
= (unsigned long) f
+ i
;
6585 ptr
->slot_frag
= frag_now
;
6587 /* Remove the initialized records, so that we won't accidentally
6588 update them again if we insert a nop and continue. */
6589 md
.slot
[curr
].unwind_record
= last_ptr
;
6593 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6594 if (md
.slot
[curr
].manual_bundling_on
)
6597 manual_bundling
= 1;
6599 break; /* Need to start a new bundle. */
6602 /* If this instruction specifies a template, then it must be the first
6603 instruction of a bundle. */
6604 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6607 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6609 if (manual_bundling
&& !manual_bundling_off
)
6611 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6612 _("`%s' must be last in bundle"), idesc
->name
);
6614 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6618 if (idesc
->flags
& IA64_OPCODE_LAST
)
6621 unsigned int required_template
;
6623 /* If we need a stop bit after an M slot, our only choice is
6624 template 5 (M;;MI). If we need a stop bit after a B
6625 slot, our only choice is to place it at the end of the
6626 bundle, because the only available templates are MIB,
6627 MBB, BBB, MMB, and MFB. We don't handle anything other
6628 than M and B slots because these are the only kind of
6629 instructions that can have the IA64_OPCODE_LAST bit set. */
6630 required_template
= template_val
;
6631 switch (idesc
->type
)
6635 required_template
= 5;
6643 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6644 _("Internal error: don't know how to force %s to end of instruction group"),
6650 && (i
> required_slot
6651 || (required_slot
== 2 && !manual_bundling_off
)
6652 || (user_template
>= 0
6653 /* Changing from MMI to M;MI is OK. */
6654 && (template_val
^ required_template
) > 1)))
6656 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6657 _("`%s' must be last in instruction group"),
6659 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6660 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6662 if (required_slot
< i
)
6663 /* Can't fit this instruction. */
6667 if (required_template
!= template_val
)
6669 /* If we switch the template, we need to reset the NOPs
6670 after slot i. The slot-types of the instructions ahead
6671 of i never change, so we don't need to worry about
6672 changing NOPs in front of this slot. */
6673 for (j
= i
; j
< 3; ++j
)
6674 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6676 /* We just picked a template that includes the stop bit in the
6677 middle, so we don't need another one emitted later. */
6678 md
.slot
[curr
].end_of_insn_group
= 0;
6680 template_val
= required_template
;
6682 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6684 if (manual_bundling
)
6686 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6687 _("Label must be first in a bundle"));
6688 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6690 /* This insn must go into the first slot of a bundle. */
6694 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6696 /* We need an instruction group boundary in the middle of a
6697 bundle. See if we can switch to an other template with
6698 an appropriate boundary. */
6700 orig_template
= template_val
;
6701 if (i
== 1 && (user_template
== 4
6702 || (user_template
< 0
6703 && (ia64_templ_desc
[template_val
].exec_unit
[0]
6707 end_of_insn_group
= 0;
6709 else if (i
== 2 && (user_template
== 0
6710 || (user_template
< 0
6711 && (ia64_templ_desc
[template_val
].exec_unit
[1]
6713 /* This test makes sure we don't switch the template if
6714 the next instruction is one that needs to be first in
6715 an instruction group. Since all those instructions are
6716 in the M group, there is no way such an instruction can
6717 fit in this bundle even if we switch the template. The
6718 reason we have to check for this is that otherwise we
6719 may end up generating "MI;;I M.." which has the deadly
6720 effect that the second M instruction is no longer the
6721 first in the group! --davidm 99/12/16 */
6722 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6725 end_of_insn_group
= 0;
6728 && user_template
== 0
6729 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6730 /* Use the next slot. */
6732 else if (curr
!= first
)
6733 /* can't fit this insn */
6736 if (template_val
!= orig_template
)
6737 /* if we switch the template, we need to reset the NOPs
6738 after slot i. The slot-types of the instructions ahead
6739 of i never change, so we don't need to worry about
6740 changing NOPs in front of this slot. */
6741 for (j
= i
; j
< 3; ++j
)
6742 insn
[j
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[j
]];
6744 required_unit
= ia64_templ_desc
[template_val
].exec_unit
[i
];
6746 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6747 if (idesc
->type
== IA64_TYPE_DYN
)
6749 enum ia64_opnd opnd1
, opnd2
;
6751 if ((strcmp (idesc
->name
, "nop") == 0)
6752 || (strcmp (idesc
->name
, "break") == 0))
6753 insn_unit
= required_unit
;
6754 else if (strcmp (idesc
->name
, "hint") == 0)
6756 insn_unit
= required_unit
;
6757 if (required_unit
== IA64_UNIT_B
)
6763 case hint_b_warning
:
6764 as_warn (_("hint in B unit may be treated as nop"));
6767 /* When manual bundling is off and there is no
6768 user template, we choose a different unit so
6769 that hint won't go into the current slot. We
6770 will fill the current bundle with nops and
6771 try to put hint into the next bundle. */
6772 if (!manual_bundling
&& user_template
< 0)
6773 insn_unit
= IA64_UNIT_I
;
6775 as_bad (_("hint in B unit can't be used"));
6780 else if (strcmp (idesc
->name
, "chk.s") == 0
6781 || strcmp (idesc
->name
, "mov") == 0)
6783 insn_unit
= IA64_UNIT_M
;
6784 if (required_unit
== IA64_UNIT_I
6785 || (required_unit
== IA64_UNIT_F
&& template_val
== 6))
6786 insn_unit
= IA64_UNIT_I
;
6789 as_fatal (_("emit_one_bundle: unexpected dynamic op"));
6791 snprintf (mnemonic
, sizeof (mnemonic
), "%s.%c",
6792 idesc
->name
, "?imbfxx"[insn_unit
]);
6793 opnd1
= idesc
->operands
[0];
6794 opnd2
= idesc
->operands
[1];
6795 ia64_free_opcode (idesc
);
6796 idesc
= ia64_find_opcode (mnemonic
);
6797 /* moves to/from ARs have collisions */
6798 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6800 while (idesc
!= NULL
6801 && (idesc
->operands
[0] != opnd1
6802 || idesc
->operands
[1] != opnd2
))
6803 idesc
= get_next_opcode (idesc
);
6805 md
.slot
[curr
].idesc
= idesc
;
6809 insn_type
= idesc
->type
;
6810 insn_unit
= IA64_UNIT_NIL
;
6814 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6815 insn_unit
= required_unit
;
6817 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6818 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6819 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6820 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6821 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6826 if (insn_unit
!= required_unit
)
6827 continue; /* Try next slot. */
6829 /* Now is a good time to fix up the labels for this insn. */
6831 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6833 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6834 symbol_set_frag (lfix
->sym
, frag_now
);
6835 mark_label
|= lfix
->dw2_mark_labels
;
6837 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6839 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6840 symbol_set_frag (lfix
->sym
, frag_now
);
6843 if (debug_type
== DEBUG_DWARF2
6844 || md
.slot
[curr
].loc_directive_seen
6847 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6849 md
.slot
[curr
].loc_directive_seen
= 0;
6851 md
.slot
[curr
].debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
6853 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6856 build_insn (md
.slot
+ curr
, insn
+ i
);
6858 ptr
= md
.slot
[curr
].unwind_record
;
6861 /* Set slot numbers for all remaining unwind records belonging to the
6862 current insn. There can not be any prologue/body unwind records
6864 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6866 ptr
->slot_number
= (unsigned long) f
+ i
;
6867 ptr
->slot_frag
= frag_now
;
6869 md
.slot
[curr
].unwind_record
= NULL
;
6872 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6874 unsigned long where
;
6876 ifix
= md
.slot
[curr
].fixup
+ j
;
6877 where
= frag_now_fix () - 16 + i
;
6879 /* Relocations for instructions specify the slot in the
6880 bottom two bits of r_offset. The IA64 HP-UX linker
6881 expects PCREL60B relocations to specify slot 2 of an
6882 instruction. gas generates PCREL60B against slot 1. */
6883 if (ifix
->code
== BFD_RELOC_IA64_PCREL60B
)
6890 fix
= fix_new_exp (frag_now
, where
, 8,
6891 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6892 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6893 fix
->fx_file
= md
.slot
[curr
].src_file
;
6894 fix
->fx_line
= md
.slot
[curr
].src_line
;
6897 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6899 /* This adjustment to "i" must occur after the fix, otherwise the fix
6900 is assigned to the wrong slot, and the VMS linker complains. */
6901 if (required_unit
== IA64_UNIT_L
)
6904 /* skip one slot for long/X-unit instructions */
6907 --md
.num_slots_in_use
;
6911 ia64_free_opcode (md
.slot
[curr
].idesc
);
6912 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6913 md
.slot
[curr
].user_template
= -1;
6915 if (manual_bundling_off
)
6917 manual_bundling
= 0;
6920 curr
= (curr
+ 1) % NUM_SLOTS
;
6921 idesc
= md
.slot
[curr
].idesc
;
6924 /* A user template was specified, but the first following instruction did
6925 not fit. This can happen with or without manual bundling. */
6926 if (md
.num_slots_in_use
> 0 && last_slot
< 0)
6928 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6929 _("`%s' does not fit into %s template"),
6930 idesc
->name
, ia64_templ_desc
[template_val
].name
);
6931 /* Drop first insn so we don't livelock. */
6932 --md
.num_slots_in_use
;
6933 know (curr
== first
);
6934 ia64_free_opcode (md
.slot
[curr
].idesc
);
6935 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6936 md
.slot
[curr
].user_template
= -1;
6938 else if (manual_bundling
> 0)
6940 if (md
.num_slots_in_use
> 0)
6943 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6944 _("`%s' does not fit into bundle"), idesc
->name
);
6949 if (template_val
== 2)
6951 else if (last_slot
== 0)
6952 where
= "slots 2 or 3";
6955 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6956 _("`%s' can't go in %s of %s template"),
6957 idesc
->name
, where
, ia64_templ_desc
[template_val
].name
);
6961 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6962 _("Missing '}' at end of file"));
6965 know (md
.num_slots_in_use
< NUM_SLOTS
);
6967 t0
= end_of_insn_group
| (template_val
<< 1) | (insn
[0] << 5) | (insn
[1] << 46);
6968 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6970 number_to_chars_littleendian (f
+ 0, t0
, 8);
6971 number_to_chars_littleendian (f
+ 8, t1
, 8);
6975 md_parse_option (int c
, const char *arg
)
6980 /* Switches from the Intel assembler. */
6982 if (strcmp (arg
, "ilp64") == 0
6983 || strcmp (arg
, "lp64") == 0
6984 || strcmp (arg
, "p64") == 0)
6986 md
.flags
|= EF_IA_64_ABI64
;
6988 else if (strcmp (arg
, "ilp32") == 0)
6990 md
.flags
&= ~EF_IA_64_ABI64
;
6992 else if (strcmp (arg
, "le") == 0)
6994 md
.flags
&= ~EF_IA_64_BE
;
6995 default_big_endian
= 0;
6997 else if (strcmp (arg
, "be") == 0)
6999 md
.flags
|= EF_IA_64_BE
;
7000 default_big_endian
= 1;
7002 else if (startswith (arg
, "unwind-check="))
7005 if (strcmp (arg
, "warning") == 0)
7006 md
.unwind_check
= unwind_check_warning
;
7007 else if (strcmp (arg
, "error") == 0)
7008 md
.unwind_check
= unwind_check_error
;
7012 else if (startswith (arg
, "hint.b="))
7015 if (strcmp (arg
, "ok") == 0)
7016 md
.hint_b
= hint_b_ok
;
7017 else if (strcmp (arg
, "warning") == 0)
7018 md
.hint_b
= hint_b_warning
;
7019 else if (strcmp (arg
, "error") == 0)
7020 md
.hint_b
= hint_b_error
;
7024 else if (startswith (arg
, "tune="))
7027 if (strcmp (arg
, "itanium1") == 0)
7029 else if (strcmp (arg
, "itanium2") == 0)
7039 if (strcmp (arg
, "so") == 0)
7041 /* Suppress signon message. */
7043 else if (strcmp (arg
, "pi") == 0)
7045 /* Reject privileged instructions. FIXME */
7047 else if (strcmp (arg
, "us") == 0)
7049 /* Allow union of signed and unsigned range. FIXME */
7051 else if (strcmp (arg
, "close_fcalls") == 0)
7053 /* Do not resolve global function calls. */
7060 /* temp[="prefix"] Insert temporary labels into the object file
7061 symbol table prefixed by "prefix".
7062 Default prefix is ":temp:".
7067 /* indirect=<tgt> Assume unannotated indirect branches behavior
7068 according to <tgt> --
7069 exit: branch out from the current context (default)
7070 labels: all labels in context may be branch targets
7072 if (!startswith (arg
, "indirect="))
7077 /* -X conflicts with an ignored option, use -x instead */
7079 if (!arg
|| strcmp (arg
, "explicit") == 0)
7081 /* set default mode to explicit */
7082 md
.default_explicit_mode
= 1;
7085 else if (strcmp (arg
, "auto") == 0)
7087 md
.default_explicit_mode
= 0;
7089 else if (strcmp (arg
, "none") == 0)
7093 else if (strcmp (arg
, "debug") == 0)
7097 else if (strcmp (arg
, "debugx") == 0)
7099 md
.default_explicit_mode
= 1;
7102 else if (strcmp (arg
, "debugn") == 0)
7109 as_bad (_("Unrecognized option '-x%s'"), arg
);
7114 /* nops Print nops statistics. */
7117 /* GNU specific switches for gcc. */
7118 case OPTION_MCONSTANT_GP
:
7119 md
.flags
|= EF_IA_64_CONS_GP
;
7122 case OPTION_MAUTO_PIC
:
7123 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7134 md_show_usage (FILE *stream
)
7138 --mconstant-gp mark output file as using the constant-GP model\n\
7139 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7140 --mauto-pic mark output file as using the constant-GP model\n\
7141 without function descriptors (sets ELF header flag\n\
7142 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7143 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7144 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7145 -mtune=[itanium1|itanium2]\n\
7146 tune for a specific CPU (default -mtune=itanium2)\n\
7147 -munwind-check=[warning|error]\n\
7148 unwind directive check (default -munwind-check=warning)\n\
7149 -mhint.b=[ok|warning|error]\n\
7150 hint.b check (default -mhint.b=error)\n\
7151 -x | -xexplicit turn on dependency violation checking\n"), stream
);
7152 /* Note for translators: "automagically" can be translated as "automatically" here. */
7154 -xauto automagically remove dependency violations (default)\n\
7155 -xnone turn off dependency violation checking\n\
7156 -xdebug debug dependency violation checker\n\
7157 -xdebugn debug dependency violation checker but turn off\n\
7158 dependency violation checking\n\
7159 -xdebugx debug dependency violation checker and turn on\n\
7160 dependency violation checking\n"),
7165 ia64_after_parse_args (void)
7167 if (debug_type
== DEBUG_STABS
)
7168 as_fatal (_("--gstabs is not supported for ia64"));
7171 /* Return true if TYPE fits in TEMPL at SLOT. */
7174 match (int templ
, int type
, int slot
)
7176 enum ia64_unit unit
;
7179 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7182 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7184 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7186 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7187 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7188 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7189 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7190 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7191 default: result
= 0; break;
7196 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7197 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7198 type M or I would fit in TEMPL at SLOT. */
7201 extra_goodness (int templ
, int slot
)
7206 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7208 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7214 if (match (templ
, IA64_TYPE_M
, slot
)
7215 || match (templ
, IA64_TYPE_I
, slot
))
7216 /* Favor M- and I-unit NOPs. We definitely want to avoid
7217 F-unit and B-unit may cause split-issue or less-than-optimal
7218 branch-prediction. */
7229 /* This function is called once, at assembler startup time. It sets
7230 up all the tables, etc. that the MD part of the assembler will need
7231 that can be determined before arguments are parsed. */
7235 int i
, j
, k
, t
, goodness
, best
, ok
;
7238 md
.explicit_mode
= md
.default_explicit_mode
;
7240 bfd_set_section_alignment (text_section
, 4);
7242 /* Make sure function pointers get initialized. */
7243 target_big_endian
= -1;
7244 dot_byteorder (default_big_endian
);
7246 alias_hash
= str_htab_create ();
7247 alias_name_hash
= str_htab_create ();
7248 secalias_hash
= str_htab_create ();
7249 secalias_name_hash
= str_htab_create ();
7251 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7252 symbol_new (".<dtpmod>", undefined_section
,
7253 &zero_address_frag
, FUNC_DTP_MODULE
);
7255 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7256 symbol_new (".<dtprel>", undefined_section
,
7257 &zero_address_frag
, FUNC_DTP_RELATIVE
);
7259 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7260 symbol_new (".<fptr>", undefined_section
,
7261 &zero_address_frag
, FUNC_FPTR_RELATIVE
);
7263 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7264 symbol_new (".<gprel>", undefined_section
,
7265 &zero_address_frag
, FUNC_GP_RELATIVE
);
7267 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7268 symbol_new (".<ltoff>", undefined_section
,
7269 &zero_address_frag
, FUNC_LT_RELATIVE
);
7271 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7272 symbol_new (".<ltoffx>", undefined_section
,
7273 &zero_address_frag
, FUNC_LT_RELATIVE_X
);
7275 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7276 symbol_new (".<pcrel>", undefined_section
,
7277 &zero_address_frag
, FUNC_PC_RELATIVE
);
7279 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7280 symbol_new (".<pltoff>", undefined_section
,
7281 &zero_address_frag
, FUNC_PLT_RELATIVE
);
7283 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7284 symbol_new (".<secrel>", undefined_section
,
7285 &zero_address_frag
, FUNC_SEC_RELATIVE
);
7287 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7288 symbol_new (".<segrel>", undefined_section
,
7289 &zero_address_frag
, FUNC_SEG_RELATIVE
);
7291 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7292 symbol_new (".<tprel>", undefined_section
,
7293 &zero_address_frag
, FUNC_TP_RELATIVE
);
7295 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7296 symbol_new (".<ltv>", undefined_section
,
7297 &zero_address_frag
, FUNC_LTV_RELATIVE
);
7299 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7300 symbol_new (".<ltoff.fptr>", undefined_section
,
7301 &zero_address_frag
, FUNC_LT_FPTR_RELATIVE
);
7303 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7304 symbol_new (".<ltoff.dtpmod>", undefined_section
,
7305 &zero_address_frag
, FUNC_LT_DTP_MODULE
);
7307 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7308 symbol_new (".<ltoff.dptrel>", undefined_section
,
7309 &zero_address_frag
, FUNC_LT_DTP_RELATIVE
);
7311 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7312 symbol_new (".<ltoff.tprel>", undefined_section
,
7313 &zero_address_frag
, FUNC_LT_TP_RELATIVE
);
7315 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7316 symbol_new (".<iplt>", undefined_section
,
7317 &zero_address_frag
, FUNC_IPLT_RELOC
);
7320 pseudo_func
[FUNC_SLOTCOUNT_RELOC
].u
.sym
=
7321 symbol_new (".<slotcount>", undefined_section
,
7322 &zero_address_frag
, FUNC_SLOTCOUNT_RELOC
);
7325 if (md
.tune
!= itanium1
)
7327 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7329 le_nop_stop
[0] = 0x9;
7332 /* Compute the table of best templates. We compute goodness as a
7333 base 4 value, in which each match counts for 3. Match-failures
7334 result in NOPs and we use extra_goodness() to pick the execution
7335 units that are best suited for issuing the NOP. */
7336 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7337 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7338 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7341 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7344 if (match (t
, i
, 0))
7346 if (match (t
, j
, 1))
7348 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7349 goodness
= 3 + 3 + 3;
7351 goodness
= 3 + 3 + extra_goodness (t
, 2);
7353 else if (match (t
, j
, 2))
7354 goodness
= 3 + 3 + extra_goodness (t
, 1);
7358 goodness
+= extra_goodness (t
, 1);
7359 goodness
+= extra_goodness (t
, 2);
7362 else if (match (t
, i
, 1))
7364 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7367 goodness
= 3 + extra_goodness (t
, 2);
7369 else if (match (t
, i
, 2))
7370 goodness
= 3 + extra_goodness (t
, 1);
7372 if (goodness
> best
)
7375 best_template
[i
][j
][k
] = t
;
7380 #ifdef DEBUG_TEMPLATES
7381 /* For debugging changes to the best_template calculations. We don't care
7382 about combinations with invalid instructions, so start the loops at 1. */
7383 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7384 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7385 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7387 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7389 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7391 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7395 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7396 md
.slot
[i
].user_template
= -1;
7398 md
.pseudo_hash
= str_htab_create ();
7399 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7400 if (str_hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7401 pseudo_opcode
+ i
, 0) != NULL
)
7402 as_fatal (_("duplicate %s"), pseudo_opcode
[i
].name
);
7404 md
.reg_hash
= str_htab_create ();
7405 md
.dynreg_hash
= str_htab_create ();
7406 md
.const_hash
= str_htab_create ();
7407 md
.entry_hash
= str_htab_create ();
7409 /* general registers: */
7410 declare_register_set ("r", 128, REG_GR
);
7411 declare_register ("gp", REG_GR
+ 1);
7412 declare_register ("sp", REG_GR
+ 12);
7413 declare_register ("tp", REG_GR
+ 13);
7414 declare_register_set ("ret", 4, REG_GR
+ 8);
7416 /* floating point registers: */
7417 declare_register_set ("f", 128, REG_FR
);
7418 declare_register_set ("farg", 8, REG_FR
+ 8);
7419 declare_register_set ("fret", 8, REG_FR
+ 8);
7421 /* branch registers: */
7422 declare_register_set ("b", 8, REG_BR
);
7423 declare_register ("rp", REG_BR
+ 0);
7425 /* predicate registers: */
7426 declare_register_set ("p", 64, REG_P
);
7427 declare_register ("pr", REG_PR
);
7428 declare_register ("pr.rot", REG_PR_ROT
);
7430 /* application registers: */
7431 declare_register_set ("ar", 128, REG_AR
);
7432 for (i
= 0; i
< NELEMS (ar
); ++i
)
7433 declare_register (ar
[i
].name
, REG_AR
+ ar
[i
].regnum
);
7435 /* control registers: */
7436 declare_register_set ("cr", 128, REG_CR
);
7437 for (i
= 0; i
< NELEMS (cr
); ++i
)
7438 declare_register (cr
[i
].name
, REG_CR
+ cr
[i
].regnum
);
7440 /* dahr registers: */
7441 declare_register_set ("dahr", 8, REG_DAHR
);
7443 declare_register ("ip", REG_IP
);
7444 declare_register ("cfm", REG_CFM
);
7445 declare_register ("psr", REG_PSR
);
7446 declare_register ("psr.l", REG_PSR_L
);
7447 declare_register ("psr.um", REG_PSR_UM
);
7449 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7451 unsigned int regnum
= indirect_reg
[i
].regnum
;
7453 md
.indregsym
[regnum
- IND_CPUID
] = declare_register (indirect_reg
[i
].name
, regnum
);
7456 /* pseudo-registers used to specify unwind info: */
7457 declare_register ("psp", REG_PSP
);
7459 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7460 if (str_hash_insert (md
.const_hash
, const_bits
[i
].name
, const_bits
+ i
, 0))
7461 as_fatal (_("duplicate %s"), const_bits
[i
].name
);
7463 /* Set the architecture and machine depending on defaults and command line
7465 if (md
.flags
& EF_IA_64_ABI64
)
7466 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7468 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7471 as_warn (_("Could not set architecture and machine"));
7473 /* Set the pointer size and pointer shift size depending on md.flags */
7475 if (md
.flags
& EF_IA_64_ABI64
)
7477 md
.pointer_size
= 8; /* pointers are 8 bytes */
7478 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7482 md
.pointer_size
= 4; /* pointers are 4 bytes */
7483 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7486 md
.mem_offset
.hint
= 0;
7489 md
.entry_labels
= NULL
;
7492 /* Set the default options in md. Cannot do this in md_begin because
7493 that is called after md_parse_option which is where we set the
7494 options in md based on command line options. */
7497 ia64_init (int argc ATTRIBUTE_UNUSED
, char **argv ATTRIBUTE_UNUSED
)
7499 md
.flags
= MD_FLAGS_DEFAULT
;
7501 /* Don't turn on dependency checking for VMS, doesn't work. */
7504 /* FIXME: We should change it to unwind_check_error someday. */
7505 md
.unwind_check
= unwind_check_warning
;
7506 md
.hint_b
= hint_b_error
;
7510 /* Return a string for the target object file format. */
7513 ia64_target_format (void)
7515 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7517 if (md
.flags
& EF_IA_64_BE
)
7519 if (md
.flags
& EF_IA_64_ABI64
)
7520 #if defined(TE_AIX50)
7521 return "elf64-ia64-aix-big";
7522 #elif defined(TE_HPUX)
7523 return "elf64-ia64-hpux-big";
7525 return "elf64-ia64-big";
7528 #if defined(TE_AIX50)
7529 return "elf32-ia64-aix-big";
7530 #elif defined(TE_HPUX)
7531 return "elf32-ia64-hpux-big";
7533 return "elf32-ia64-big";
7538 if (md
.flags
& EF_IA_64_ABI64
)
7539 #if defined (TE_AIX50)
7540 return "elf64-ia64-aix-little";
7541 #elif defined (TE_VMS)
7543 md
.flags
|= EF_IA_64_ARCHVER_1
;
7544 return "elf64-ia64-vms";
7547 return "elf64-ia64-little";
7551 return "elf32-ia64-aix-little";
7553 return "elf32-ia64-little";
7558 return "unknown-format";
7562 ia64_md_finish (void)
7564 /* terminate insn group upon reaching end of file: */
7565 insn_group_break (1, 0, 0);
7567 /* emits slots we haven't written yet: */
7568 ia64_flush_insns ();
7570 bfd_set_private_flags (stdoutput
, md
.flags
);
7572 md
.mem_offset
.hint
= 0;
7576 ia64_start_line (void)
7581 /* Make sure we don't reference input_line_pointer[-1] when that's
7587 if (md
.qp
.X_op
== O_register
)
7588 as_bad (_("qualifying predicate not followed by instruction"));
7589 md
.qp
.X_op
= O_absent
;
7591 if (ignore_input ())
7594 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7596 if (md
.detect_dv
&& !md
.explicit_mode
)
7603 as_warn (_("Explicit stops are ignored in auto mode"));
7607 insn_group_break (1, 0, 0);
7609 else if (input_line_pointer
[-1] == '{')
7611 if (md
.manual_bundling
)
7612 as_warn (_("Found '{' when manual bundling is already turned on"));
7614 CURR_SLOT
.manual_bundling_on
= 1;
7615 md
.manual_bundling
= 1;
7617 /* Bundling is only acceptable in explicit mode
7618 or when in default automatic mode. */
7619 if (md
.detect_dv
&& !md
.explicit_mode
)
7621 if (!md
.mode_explicitly_set
7622 && !md
.default_explicit_mode
)
7625 as_warn (_("Found '{' after explicit switch to automatic mode"));
7628 else if (input_line_pointer
[-1] == '}')
7630 if (!md
.manual_bundling
)
7631 as_warn (_("Found '}' when manual bundling is off"));
7633 PREV_SLOT
.manual_bundling_off
= 1;
7634 md
.manual_bundling
= 0;
7636 /* switch back to automatic mode, if applicable */
7639 && !md
.mode_explicitly_set
7640 && !md
.default_explicit_mode
)
7645 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7647 static int defining_tag
= 0;
7650 ia64_unrecognized_line (int ch
)
7655 expression_and_evaluate (&md
.qp
);
7656 if (*input_line_pointer
++ != ')')
7658 as_bad (_("Expected ')'"));
7661 if (md
.qp
.X_op
!= O_register
)
7663 as_bad (_("Qualifying predicate expected"));
7666 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7668 as_bad (_("Predicate register expected"));
7680 if (md
.qp
.X_op
== O_register
)
7682 as_bad (_("Tag must come before qualifying predicate."));
7686 /* This implements just enough of read_a_source_file in read.c to
7687 recognize labels. */
7688 if (is_name_beginner (*input_line_pointer
))
7690 c
= get_symbol_name (&s
);
7692 else if (LOCAL_LABELS_FB
7693 && ISDIGIT (*input_line_pointer
))
7696 while (ISDIGIT (*input_line_pointer
))
7697 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7698 fb_label_instance_inc (temp
);
7699 s
= fb_label_name (temp
, 0);
7700 c
= *input_line_pointer
;
7709 /* Put ':' back for error messages' sake. */
7710 *input_line_pointer
++ = ':';
7711 as_bad (_("Expected ':'"));
7718 /* Put ':' back for error messages' sake. */
7719 *input_line_pointer
++ = ':';
7720 if (*input_line_pointer
++ != ']')
7722 as_bad (_("Expected ']'"));
7727 as_bad (_("Tag name expected"));
7737 /* Not a valid line. */
7742 ia64_frob_label (struct symbol
*sym
)
7744 struct label_fix
*fix
;
7746 /* Tags need special handling since they are not bundle breaks like
7750 fix
= XOBNEW (¬es
, struct label_fix
);
7752 fix
->next
= CURR_SLOT
.tag_fixups
;
7753 fix
->dw2_mark_labels
= false;
7754 CURR_SLOT
.tag_fixups
= fix
;
7759 if (bfd_section_flags (now_seg
) & SEC_CODE
)
7761 md
.last_text_seg
= now_seg
;
7762 md
.last_text_subseg
= now_subseg
;
7763 fix
= XOBNEW (¬es
, struct label_fix
);
7765 fix
->next
= CURR_SLOT
.label_fixups
;
7766 fix
->dw2_mark_labels
= dwarf2_loc_mark_labels
;
7767 CURR_SLOT
.label_fixups
= fix
;
7769 /* Keep track of how many code entry points we've seen. */
7770 if (md
.path
== md
.maxpaths
)
7773 md
.entry_labels
= XRESIZEVEC (const char *, md
.entry_labels
,
7776 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7781 /* The HP-UX linker will give unresolved symbol errors for symbols
7782 that are declared but unused. This routine removes declared,
7783 unused symbols from an object. */
7785 ia64_frob_symbol (struct symbol
*sym
)
7787 if ((S_GET_SEGMENT (sym
) == bfd_und_section_ptr
&& ! symbol_used_p (sym
) &&
7788 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7789 || (S_GET_SEGMENT (sym
) == bfd_abs_section_ptr
7790 && ! S_IS_EXTERNAL (sym
)))
7797 ia64_flush_pending_output (void)
7799 if (!md
.keep_pending_output
7800 && bfd_section_flags (now_seg
) & SEC_CODE
)
7802 /* ??? This causes many unnecessary stop bits to be emitted.
7803 Unfortunately, it isn't clear if it is safe to remove this. */
7804 insn_group_break (1, 0, 0);
7805 ia64_flush_insns ();
7809 /* Do ia64-specific expression optimization. All that's done here is
7810 to transform index expressions that are either due to the indexing
7811 of rotating registers or due to the indexing of indirect register
7814 ia64_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
7818 resolve_expression (l
);
7819 if (l
->X_op
== O_register
)
7821 unsigned num_regs
= l
->X_add_number
>> 16;
7823 resolve_expression (r
);
7826 /* Left side is a .rotX-allocated register. */
7827 if (r
->X_op
!= O_constant
)
7829 as_bad (_("Rotating register index must be a non-negative constant"));
7830 r
->X_add_number
= 0;
7832 else if ((valueT
) r
->X_add_number
>= num_regs
)
7834 as_bad (_("Index out of range 0..%u"), num_regs
- 1);
7835 r
->X_add_number
= 0;
7837 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7840 else if (l
->X_add_number
>= IND_CPUID
&& l
->X_add_number
<= IND_RR
)
7842 if (r
->X_op
!= O_register
7843 || r
->X_add_number
< REG_GR
7844 || r
->X_add_number
> REG_GR
+ 127)
7846 as_bad (_("Indirect register index must be a general register"));
7847 r
->X_add_number
= REG_GR
;
7850 l
->X_op_symbol
= md
.indregsym
[l
->X_add_number
- IND_CPUID
];
7851 l
->X_add_number
= r
->X_add_number
;
7855 as_bad (_("Index can only be applied to rotating or indirect registers"));
7856 /* Fall back to some register use of which has as little as possible
7857 side effects, to minimize subsequent error messages. */
7858 l
->X_op
= O_register
;
7859 l
->X_add_number
= REG_GR
+ 3;
7864 ia64_parse_name (char *name
, expressionS
*e
, char *nextcharP
)
7866 struct const_desc
*cdesc
;
7867 struct dynreg
*dr
= 0;
7874 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7876 /* Find what relocation pseudo-function we're dealing with. */
7877 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7878 if (pseudo_func
[idx
].name
7879 && pseudo_func
[idx
].name
[0] == name
[1]
7880 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7882 pseudo_type
= pseudo_func
[idx
].type
;
7885 switch (pseudo_type
)
7887 case PSEUDO_FUNC_RELOC
:
7888 end
= input_line_pointer
;
7889 if (*nextcharP
!= '(')
7891 as_bad (_("Expected '('"));
7895 ++input_line_pointer
;
7897 if (*input_line_pointer
!= ')')
7899 as_bad (_("Missing ')'"));
7903 ++input_line_pointer
;
7905 if (idx
== FUNC_SLOTCOUNT_RELOC
)
7907 /* @slotcount can accept any expression. Canonicalize. */
7908 e
->X_add_symbol
= make_expr_symbol (e
);
7910 e
->X_add_number
= 0;
7913 if (e
->X_op
!= O_symbol
)
7915 if (e
->X_op
!= O_pseudo_fixup
)
7917 as_bad (_("Not a symbolic expression"));
7920 if (idx
!= FUNC_LT_RELATIVE
)
7922 as_bad (_("Illegal combination of relocation functions"));
7925 switch (S_GET_VALUE (e
->X_op_symbol
))
7927 case FUNC_FPTR_RELATIVE
:
7928 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7929 case FUNC_DTP_MODULE
:
7930 idx
= FUNC_LT_DTP_MODULE
; break;
7931 case FUNC_DTP_RELATIVE
:
7932 idx
= FUNC_LT_DTP_RELATIVE
; break;
7933 case FUNC_TP_RELATIVE
:
7934 idx
= FUNC_LT_TP_RELATIVE
; break;
7936 as_bad (_("Illegal combination of relocation functions"));
7940 /* Make sure gas doesn't get rid of local symbols that are used
7942 e
->X_op
= O_pseudo_fixup
;
7943 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7945 *nextcharP
= *input_line_pointer
;
7948 case PSEUDO_FUNC_CONST
:
7949 e
->X_op
= O_constant
;
7950 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7953 case PSEUDO_FUNC_REG
:
7954 e
->X_op
= O_register
;
7955 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7964 /* first see if NAME is a known register name: */
7965 sym
= str_hash_find (md
.reg_hash
, name
);
7968 e
->X_op
= O_register
;
7969 e
->X_add_number
= S_GET_VALUE (sym
);
7973 cdesc
= str_hash_find (md
.const_hash
, name
);
7976 e
->X_op
= O_constant
;
7977 e
->X_add_number
= cdesc
->value
;
7981 /* check for inN, locN, or outN: */
7986 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7994 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
8002 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
8013 /* Ignore register numbers with leading zeroes, except zero itself. */
8014 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
8016 unsigned long regnum
;
8018 /* The name is inN, locN, or outN; parse the register number. */
8019 regnum
= strtoul (name
+ idx
, &end
, 10);
8020 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
8022 if (regnum
>= dr
->num_regs
)
8025 as_bad (_("No current frame"));
8027 as_bad (_("Register number out of range 0..%u"),
8031 e
->X_op
= O_register
;
8032 e
->X_add_number
= dr
->base
+ regnum
;
8037 end
= xstrdup (name
);
8038 name
= ia64_canonicalize_symbol_name (end
);
8039 if ((dr
= str_hash_find (md
.dynreg_hash
, name
)))
8041 /* We've got ourselves the name of a rotating register set.
8042 Store the base register number in the low 16 bits of
8043 X_add_number and the size of the register set in the top 16
8045 e
->X_op
= O_register
;
8046 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8054 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8057 ia64_canonicalize_symbol_name (char *name
)
8059 size_t len
= strlen (name
), full
= len
;
8061 while (len
> 0 && name
[len
- 1] == '#')
8066 as_bad (_("Standalone `#' is illegal"));
8068 else if (len
< full
- 1)
8069 as_warn (_("Redundant `#' suffix operators"));
8074 /* Return true if idesc is a conditional branch instruction. This excludes
8075 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8076 because they always read/write resources regardless of the value of the
8077 qualifying predicate. br.ia must always use p0, and hence is always
8078 taken. Thus this function returns true for branches which can fall
8079 through, and which use no resources if they do fall through. */
8082 is_conditional_branch (struct ia64_opcode
*idesc
)
8084 /* br is a conditional branch. Everything that starts with br. except
8085 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8086 Everything that starts with brl is a conditional branch. */
8087 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8088 && (idesc
->name
[2] == '\0'
8089 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8090 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8091 || idesc
->name
[2] == 'l'
8092 /* br.cond, br.call, br.clr */
8093 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8094 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8095 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8098 /* Return whether the given opcode is a taken branch. If there's any doubt,
8102 is_taken_branch (struct ia64_opcode
*idesc
)
8104 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8105 || startswith (idesc
->name
, "br.ia"));
8108 /* Return whether the given opcode is an interruption or rfi. If there's any
8109 doubt, returns zero. */
8112 is_interruption_or_rfi (struct ia64_opcode
*idesc
)
8114 if (strcmp (idesc
->name
, "rfi") == 0)
8119 /* Returns the index of the given dependency in the opcode's list of chks, or
8120 -1 if there is no dependency. */
8123 depends_on (int depind
, struct ia64_opcode
*idesc
)
8126 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8127 for (i
= 0; i
< dep
->nchks
; i
++)
8129 if (depind
== DEP (dep
->chks
[i
]))
8135 /* Determine a set of specific resources used for a particular resource
8136 class. Returns the number of specific resources identified For those
8137 cases which are not determinable statically, the resource returned is
8140 Meanings of value in 'NOTE':
8141 1) only read/write when the register number is explicitly encoded in the
8143 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8144 accesses CFM when qualifying predicate is in the rotating region.
8145 3) general register value is used to specify an indirect register; not
8146 determinable statically.
8147 4) only read the given resource when bits 7:0 of the indirect index
8148 register value does not match the register number of the resource; not
8149 determinable statically.
8150 5) all rules are implementation specific.
8151 6) only when both the index specified by the reader and the index specified
8152 by the writer have the same value in bits 63:61; not determinable
8154 7) only access the specified resource when the corresponding mask bit is
8156 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8157 only read when these insns reference FR2-31
8158 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8159 written when these insns write FR32-127
8160 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8162 11) The target predicates are written independently of PR[qp], but source
8163 registers are only read if PR[qp] is true. Since the state of PR[qp]
8164 cannot statically be determined, all source registers are marked used.
8165 12) This insn only reads the specified predicate register when that
8166 register is the PR[qp].
8167 13) This reference to ld-c only applies to the GR whose value is loaded
8168 with data returned from memory, not the post-incremented address register.
8169 14) The RSE resource includes the implementation-specific RSE internal
8170 state resources. At least one (and possibly more) of these resources are
8171 read by each instruction listed in IC:rse-readers. At least one (and
8172 possibly more) of these resources are written by each insn listed in
8174 15+16) Represents reserved instructions, which the assembler does not
8176 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and
8177 mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up.
8179 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8180 this code; there are no dependency violations based on memory access.
8183 #define MAX_SPECS 256
8188 specify_resource (const struct ia64_dependency
*dep
,
8189 struct ia64_opcode
*idesc
,
8190 /* is this a DV chk or a DV reg? */
8192 /* returned specific resources */
8193 struct rsrc specs
[MAX_SPECS
],
8194 /* resource note for this insn's usage */
8196 /* which execution path to examine */
8204 if (dep
->mode
== IA64_DV_WAW
8205 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8206 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8209 /* template for any resources we identify */
8210 tmpl
.dependency
= dep
;
8212 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8213 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8214 tmpl
.link_to_qp_branch
= 1;
8215 tmpl
.mem_offset
.hint
= 0;
8216 tmpl
.mem_offset
.offset
= 0;
8217 tmpl
.mem_offset
.base
= 0;
8220 tmpl
.cmp_type
= CMP_NONE
;
8227 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8228 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8229 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8231 /* we don't need to track these */
8232 if (dep
->semantics
== IA64_DVS_NONE
)
8235 switch (dep
->specifier
)
8240 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8242 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8243 if (regno
>= 0 && regno
<= 7)
8245 specs
[count
] = tmpl
;
8246 specs
[count
++].index
= regno
;
8252 for (i
= 0; i
< 8; i
++)
8254 specs
[count
] = tmpl
;
8255 specs
[count
++].index
= i
;
8264 case IA64_RS_AR_UNAT
:
8265 /* This is a mov =AR or mov AR= instruction. */
8266 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8268 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8269 if (regno
== AR_UNAT
)
8271 specs
[count
++] = tmpl
;
8276 /* This is a spill/fill, or other instruction that modifies the
8279 /* Unless we can determine the specific bits used, mark the whole
8280 thing; bits 8:3 of the memory address indicate the bit used in
8281 UNAT. The .mem.offset hint may be used to eliminate a small
8282 subset of conflicts. */
8283 specs
[count
] = tmpl
;
8284 if (md
.mem_offset
.hint
)
8287 fprintf (stderr
, " Using hint for spill/fill\n");
8288 /* The index isn't actually used, just set it to something
8289 approximating the bit index. */
8290 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8291 specs
[count
].mem_offset
.hint
= 1;
8292 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8293 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8297 specs
[count
++].specific
= 0;
8305 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8307 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8308 if ((regno
>= 8 && regno
<= 15)
8309 || (regno
>= 20 && regno
<= 23)
8310 || (regno
>= 31 && regno
<= 39)
8311 || (regno
>= 41 && regno
<= 47)
8312 || (regno
>= 67 && regno
<= 111))
8314 specs
[count
] = tmpl
;
8315 specs
[count
++].index
= regno
;
8328 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8330 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8331 if ((regno
>= 48 && regno
<= 63)
8332 || (regno
>= 112 && regno
<= 127))
8334 specs
[count
] = tmpl
;
8335 specs
[count
++].index
= regno
;
8341 for (i
= 48; i
< 64; i
++)
8343 specs
[count
] = tmpl
;
8344 specs
[count
++].index
= i
;
8346 for (i
= 112; i
< 128; i
++)
8348 specs
[count
] = tmpl
;
8349 specs
[count
++].index
= i
;
8367 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8368 if (idesc
->operands
[i
] == IA64_OPND_B1
8369 || idesc
->operands
[i
] == IA64_OPND_B2
)
8371 specs
[count
] = tmpl
;
8372 specs
[count
++].index
=
8373 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8378 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8379 if (idesc
->operands
[i
] == IA64_OPND_B1
8380 || idesc
->operands
[i
] == IA64_OPND_B2
)
8382 specs
[count
] = tmpl
;
8383 specs
[count
++].index
=
8384 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8390 case IA64_RS_CPUID
: /* four or more registers */
8393 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8395 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8396 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8399 specs
[count
] = tmpl
;
8400 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8404 specs
[count
] = tmpl
;
8405 specs
[count
++].specific
= 0;
8415 case IA64_RS_DBR
: /* four or more registers */
8418 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8420 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8421 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8424 specs
[count
] = tmpl
;
8425 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8429 specs
[count
] = tmpl
;
8430 specs
[count
++].specific
= 0;
8434 else if (note
== 0 && !rsrc_write
)
8436 specs
[count
] = tmpl
;
8437 specs
[count
++].specific
= 0;
8445 case IA64_RS_IBR
: /* four or more registers */
8448 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8450 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8451 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8454 specs
[count
] = tmpl
;
8455 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8459 specs
[count
] = tmpl
;
8460 specs
[count
++].specific
= 0;
8473 /* These are implementation specific. Force all references to
8474 conflict with all other references. */
8475 specs
[count
] = tmpl
;
8476 specs
[count
++].specific
= 0;
8484 case IA64_RS_PKR
: /* 16 or more registers */
8485 if (note
== 3 || note
== 4)
8487 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8489 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8490 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8495 specs
[count
] = tmpl
;
8496 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8499 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8501 /* Uses all registers *except* the one in R3. */
8502 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8504 specs
[count
] = tmpl
;
8505 specs
[count
++].index
= i
;
8511 specs
[count
] = tmpl
;
8512 specs
[count
++].specific
= 0;
8519 specs
[count
] = tmpl
;
8520 specs
[count
++].specific
= 0;
8524 case IA64_RS_PMC
: /* four or more registers */
8527 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8528 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8531 int reg_index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8533 int regno
= CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_GR
;
8534 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8537 specs
[count
] = tmpl
;
8538 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8542 specs
[count
] = tmpl
;
8543 specs
[count
++].specific
= 0;
8553 case IA64_RS_PMD
: /* four or more registers */
8556 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8558 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8559 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8562 specs
[count
] = tmpl
;
8563 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8567 specs
[count
] = tmpl
;
8568 specs
[count
++].specific
= 0;
8578 case IA64_RS_RR
: /* eight registers */
8581 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8583 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8584 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8587 specs
[count
] = tmpl
;
8588 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8592 specs
[count
] = tmpl
;
8593 specs
[count
++].specific
= 0;
8597 else if (note
== 0 && !rsrc_write
)
8599 specs
[count
] = tmpl
;
8600 specs
[count
++].specific
= 0;
8608 case IA64_RS_CR_IRR
:
8611 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8612 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8614 && idesc
->operands
[1] == IA64_OPND_CR3
8617 for (i
= 0; i
< 4; i
++)
8619 specs
[count
] = tmpl
;
8620 specs
[count
++].index
= CR_IRR0
+ i
;
8626 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8627 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8629 && regno
<= CR_IRR3
)
8631 specs
[count
] = tmpl
;
8632 specs
[count
++].index
= regno
;
8641 case IA64_RS_CR_IIB
:
8648 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8649 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8650 && (regno
== CR_IIB0
|| regno
== CR_IIB1
))
8652 specs
[count
] = tmpl
;
8653 specs
[count
++].index
= regno
;
8658 case IA64_RS_CR_LRR
:
8665 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8666 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8667 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8669 specs
[count
] = tmpl
;
8670 specs
[count
++].index
= regno
;
8678 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8680 specs
[count
] = tmpl
;
8681 specs
[count
++].index
=
8682 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8694 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DAHR3
)
8696 specs
[count
] = tmpl
;
8697 specs
[count
++].index
=
8698 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_DAHR
;
8713 else if (rsrc_write
)
8715 if (dep
->specifier
== IA64_RS_FRb
8716 && idesc
->operands
[0] == IA64_OPND_F1
)
8718 specs
[count
] = tmpl
;
8719 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8724 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8726 if (idesc
->operands
[i
] == IA64_OPND_F2
8727 || idesc
->operands
[i
] == IA64_OPND_F3
8728 || idesc
->operands
[i
] == IA64_OPND_F4
)
8730 specs
[count
] = tmpl
;
8731 specs
[count
++].index
=
8732 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8741 /* This reference applies only to the GR whose value is loaded with
8742 data returned from memory. */
8743 specs
[count
] = tmpl
;
8744 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8750 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8751 if (idesc
->operands
[i
] == IA64_OPND_R1
8752 || idesc
->operands
[i
] == IA64_OPND_R2
8753 || idesc
->operands
[i
] == IA64_OPND_R3
)
8755 specs
[count
] = tmpl
;
8756 specs
[count
++].index
=
8757 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8759 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8760 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8761 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8763 specs
[count
] = tmpl
;
8764 specs
[count
++].index
=
8765 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8770 /* Look for anything that reads a GR. */
8771 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8773 if (idesc
->operands
[i
] == IA64_OPND_MR3
8774 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8775 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8776 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8777 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8778 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8779 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8780 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8781 || idesc
->operands
[i
] == IA64_OPND_DAHR_R3
8782 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8783 || ((i
>= idesc
->num_outputs
)
8784 && (idesc
->operands
[i
] == IA64_OPND_R1
8785 || idesc
->operands
[i
] == IA64_OPND_R2
8786 || idesc
->operands
[i
] == IA64_OPND_R3
8787 /* addl source register. */
8788 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8790 specs
[count
] = tmpl
;
8791 specs
[count
++].index
=
8792 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8803 /* This is the same as IA64_RS_PRr, except that the register range is
8804 from 1 - 15, and there are no rotating register reads/writes here. */
8808 for (i
= 1; i
< 16; i
++)
8810 specs
[count
] = tmpl
;
8811 specs
[count
++].index
= i
;
8817 /* Mark only those registers indicated by the mask. */
8820 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8821 for (i
= 1; i
< 16; i
++)
8822 if (mask
& ((valueT
) 1 << i
))
8824 specs
[count
] = tmpl
;
8825 specs
[count
++].index
= i
;
8833 else if (note
== 11) /* note 11 implies note 1 as well */
8837 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8839 if (idesc
->operands
[i
] == IA64_OPND_P1
8840 || idesc
->operands
[i
] == IA64_OPND_P2
)
8842 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8843 if (regno
>= 1 && regno
< 16)
8845 specs
[count
] = tmpl
;
8846 specs
[count
++].index
= regno
;
8856 else if (note
== 12)
8858 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8860 specs
[count
] = tmpl
;
8861 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8868 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8869 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8870 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8871 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8873 if ((idesc
->operands
[0] == IA64_OPND_P1
8874 || idesc
->operands
[0] == IA64_OPND_P2
)
8875 && p1
>= 1 && p1
< 16)
8877 specs
[count
] = tmpl
;
8878 specs
[count
].cmp_type
=
8879 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8880 specs
[count
++].index
= p1
;
8882 if ((idesc
->operands
[1] == IA64_OPND_P1
8883 || idesc
->operands
[1] == IA64_OPND_P2
)
8884 && p2
>= 1 && p2
< 16)
8886 specs
[count
] = tmpl
;
8887 specs
[count
].cmp_type
=
8888 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8889 specs
[count
++].index
= p2
;
8894 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8896 specs
[count
] = tmpl
;
8897 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8899 if (idesc
->operands
[1] == IA64_OPND_PR
)
8901 for (i
= 1; i
< 16; i
++)
8903 specs
[count
] = tmpl
;
8904 specs
[count
++].index
= i
;
8915 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8916 simplified cases of this. */
8920 for (i
= 16; i
< 63; i
++)
8922 specs
[count
] = tmpl
;
8923 specs
[count
++].index
= i
;
8929 /* Mark only those registers indicated by the mask. */
8931 && idesc
->operands
[0] == IA64_OPND_PR
)
8933 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8934 if (mask
& ((valueT
) 1 << 16))
8935 for (i
= 16; i
< 63; i
++)
8937 specs
[count
] = tmpl
;
8938 specs
[count
++].index
= i
;
8942 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8944 for (i
= 16; i
< 63; i
++)
8946 specs
[count
] = tmpl
;
8947 specs
[count
++].index
= i
;
8955 else if (note
== 11) /* note 11 implies note 1 as well */
8959 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8961 if (idesc
->operands
[i
] == IA64_OPND_P1
8962 || idesc
->operands
[i
] == IA64_OPND_P2
)
8964 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8965 if (regno
>= 16 && regno
< 63)
8967 specs
[count
] = tmpl
;
8968 specs
[count
++].index
= regno
;
8978 else if (note
== 12)
8980 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8982 specs
[count
] = tmpl
;
8983 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8990 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8991 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8992 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8993 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8995 if ((idesc
->operands
[0] == IA64_OPND_P1
8996 || idesc
->operands
[0] == IA64_OPND_P2
)
8997 && p1
>= 16 && p1
< 63)
8999 specs
[count
] = tmpl
;
9000 specs
[count
].cmp_type
=
9001 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9002 specs
[count
++].index
= p1
;
9004 if ((idesc
->operands
[1] == IA64_OPND_P1
9005 || idesc
->operands
[1] == IA64_OPND_P2
)
9006 && p2
>= 16 && p2
< 63)
9008 specs
[count
] = tmpl
;
9009 specs
[count
].cmp_type
=
9010 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9011 specs
[count
++].index
= p2
;
9016 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9018 specs
[count
] = tmpl
;
9019 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9021 if (idesc
->operands
[1] == IA64_OPND_PR
)
9023 for (i
= 16; i
< 63; i
++)
9025 specs
[count
] = tmpl
;
9026 specs
[count
++].index
= i
;
9038 /* Verify that the instruction is using the PSR bit indicated in
9042 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
9044 if (dep
->regindex
< 6)
9046 specs
[count
++] = tmpl
;
9049 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
9051 if (dep
->regindex
< 32
9052 || dep
->regindex
== 35
9053 || dep
->regindex
== 36
9054 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
9056 specs
[count
++] = tmpl
;
9059 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
9061 if (dep
->regindex
< 32
9062 || dep
->regindex
== 35
9063 || dep
->regindex
== 36
9064 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9066 specs
[count
++] = tmpl
;
9071 /* Several PSR bits have very specific dependencies. */
9072 switch (dep
->regindex
)
9075 specs
[count
++] = tmpl
;
9080 specs
[count
++] = tmpl
;
9084 /* Only certain CR accesses use PSR.ic */
9085 if (idesc
->operands
[0] == IA64_OPND_CR3
9086 || idesc
->operands
[1] == IA64_OPND_CR3
)
9089 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9092 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_CR
;
9109 specs
[count
++] = tmpl
;
9118 specs
[count
++] = tmpl
;
9122 /* Only some AR accesses use cpl */
9123 if (idesc
->operands
[0] == IA64_OPND_AR3
9124 || idesc
->operands
[1] == IA64_OPND_AR3
)
9127 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9130 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_AR
;
9137 && regno
<= AR_K7
))))
9139 specs
[count
++] = tmpl
;
9144 specs
[count
++] = tmpl
;
9154 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9156 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9162 if (mask
& ((valueT
) 1 << dep
->regindex
))
9164 specs
[count
++] = tmpl
;
9169 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9170 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9171 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9172 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9174 if (idesc
->operands
[i
] == IA64_OPND_F1
9175 || idesc
->operands
[i
] == IA64_OPND_F2
9176 || idesc
->operands
[i
] == IA64_OPND_F3
9177 || idesc
->operands
[i
] == IA64_OPND_F4
)
9179 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9180 if (reg
>= min
&& reg
<= max
)
9182 specs
[count
++] = tmpl
;
9189 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9190 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9191 /* mfh is read on writes to FR32-127; mfl is read on writes to
9193 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9195 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9197 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9198 if (reg
>= min
&& reg
<= max
)
9200 specs
[count
++] = tmpl
;
9205 else if (note
== 10)
9207 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9209 if (idesc
->operands
[i
] == IA64_OPND_R1
9210 || idesc
->operands
[i
] == IA64_OPND_R2
9211 || idesc
->operands
[i
] == IA64_OPND_R3
)
9213 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9214 if (regno
>= 16 && regno
<= 31)
9216 specs
[count
++] = tmpl
;
9227 case IA64_RS_AR_FPSR
:
9228 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9230 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9231 if (regno
== AR_FPSR
)
9233 specs
[count
++] = tmpl
;
9238 specs
[count
++] = tmpl
;
9243 /* Handle all AR[REG] resources */
9244 if (note
== 0 || note
== 1)
9246 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9247 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9248 && regno
== dep
->regindex
)
9250 specs
[count
++] = tmpl
;
9252 /* other AR[REG] resources may be affected by AR accesses */
9253 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9256 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9257 switch (dep
->regindex
)
9263 if (regno
== AR_BSPSTORE
)
9265 specs
[count
++] = tmpl
;
9270 (regno
== AR_BSPSTORE
9271 || regno
== AR_RNAT
))
9273 specs
[count
++] = tmpl
;
9278 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9281 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9282 switch (dep
->regindex
)
9287 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9289 specs
[count
++] = tmpl
;
9296 specs
[count
++] = tmpl
;
9306 /* Handle all CR[REG] resources.
9307 ??? FIXME: The rule 17 isn't really handled correctly. */
9308 if (note
== 0 || note
== 1 || note
== 17)
9310 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9312 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9313 if (regno
== dep
->regindex
)
9315 specs
[count
++] = tmpl
;
9317 else if (!rsrc_write
)
9319 /* Reads from CR[IVR] affect other resources. */
9320 if (regno
== CR_IVR
)
9322 if ((dep
->regindex
>= CR_IRR0
9323 && dep
->regindex
<= CR_IRR3
)
9324 || dep
->regindex
== CR_TPR
)
9326 specs
[count
++] = tmpl
;
9333 specs
[count
++] = tmpl
;
9342 case IA64_RS_INSERVICE
:
9343 /* look for write of EOI (67) or read of IVR (65) */
9344 if ((idesc
->operands
[0] == IA64_OPND_CR3
9345 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9346 || (idesc
->operands
[1] == IA64_OPND_CR3
9347 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9349 specs
[count
++] = tmpl
;
9356 specs
[count
++] = tmpl
;
9367 specs
[count
++] = tmpl
;
9371 /* Check if any of the registers accessed are in the rotating region.
9372 mov to/from pr accesses CFM only when qp_regno is in the rotating
9374 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9376 if (idesc
->operands
[i
] == IA64_OPND_R1
9377 || idesc
->operands
[i
] == IA64_OPND_R2
9378 || idesc
->operands
[i
] == IA64_OPND_R3
)
9380 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9381 /* Assumes that md.rot.num_regs is always valid */
9382 if (md
.rot
.num_regs
> 0
9384 && num
< 31 + md
.rot
.num_regs
)
9386 specs
[count
] = tmpl
;
9387 specs
[count
++].specific
= 0;
9390 else if (idesc
->operands
[i
] == IA64_OPND_F1
9391 || idesc
->operands
[i
] == IA64_OPND_F2
9392 || idesc
->operands
[i
] == IA64_OPND_F3
9393 || idesc
->operands
[i
] == IA64_OPND_F4
)
9395 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9398 specs
[count
] = tmpl
;
9399 specs
[count
++].specific
= 0;
9402 else if (idesc
->operands
[i
] == IA64_OPND_P1
9403 || idesc
->operands
[i
] == IA64_OPND_P2
)
9405 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9408 specs
[count
] = tmpl
;
9409 specs
[count
++].specific
= 0;
9413 if (CURR_SLOT
.qp_regno
> 15)
9415 specs
[count
] = tmpl
;
9416 specs
[count
++].specific
= 0;
9421 /* This is the same as IA64_RS_PRr, except simplified to account for
9422 the fact that there is only one register. */
9426 specs
[count
++] = tmpl
;
9431 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9432 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9433 if (mask
& ((valueT
) 1 << 63))
9434 specs
[count
++] = tmpl
;
9436 else if (note
== 11)
9438 if ((idesc
->operands
[0] == IA64_OPND_P1
9439 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9440 || (idesc
->operands
[1] == IA64_OPND_P2
9441 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9443 specs
[count
++] = tmpl
;
9446 else if (note
== 12)
9448 if (CURR_SLOT
.qp_regno
== 63)
9450 specs
[count
++] = tmpl
;
9457 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9458 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9459 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9460 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9463 && (idesc
->operands
[0] == IA64_OPND_P1
9464 || idesc
->operands
[0] == IA64_OPND_P2
))
9466 specs
[count
] = tmpl
;
9467 specs
[count
++].cmp_type
=
9468 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9471 && (idesc
->operands
[1] == IA64_OPND_P1
9472 || idesc
->operands
[1] == IA64_OPND_P2
))
9474 specs
[count
] = tmpl
;
9475 specs
[count
++].cmp_type
=
9476 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9481 if (CURR_SLOT
.qp_regno
== 63)
9483 specs
[count
++] = tmpl
;
9494 /* FIXME we can identify some individual RSE written resources, but RSE
9495 read resources have not yet been completely identified, so for now
9496 treat RSE as a single resource */
9497 if (startswith (idesc
->name
, "mov"))
9501 if (idesc
->operands
[0] == IA64_OPND_AR3
9502 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9504 specs
[count
++] = tmpl
;
9509 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9511 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9512 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9514 specs
[count
++] = tmpl
;
9517 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9519 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9520 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9521 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9523 specs
[count
++] = tmpl
;
9530 specs
[count
++] = tmpl
;
9535 /* FIXME -- do any of these need to be non-specific? */
9536 specs
[count
++] = tmpl
;
9540 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9547 /* Clear branch flags on marked resources. This breaks the link between the
9548 QP of the marking instruction and a subsequent branch on the same QP. */
9551 clear_qp_branch_flag (valueT mask
)
9554 for (i
= 0; i
< regdepslen
; i
++)
9556 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9557 if ((bit
& mask
) != 0)
9559 regdeps
[i
].link_to_qp_branch
= 0;
9564 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9565 any mutexes which contain one of the PRs and create new ones when
9569 update_qp_mutex (valueT mask
)
9575 while (i
< qp_mutexeslen
)
9577 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9579 /* If it destroys and creates the same mutex, do nothing. */
9580 if (qp_mutexes
[i
].prmask
== mask
9581 && qp_mutexes
[i
].path
== md
.path
)
9592 fprintf (stderr
, " Clearing mutex relation");
9593 print_prmask (qp_mutexes
[i
].prmask
);
9594 fprintf (stderr
, "\n");
9597 /* Deal with the old mutex with more than 3+ PRs only if
9598 the new mutex on the same execution path with it.
9600 FIXME: The 3+ mutex support is incomplete.
9601 dot_pred_rel () may be a better place to fix it. */
9602 if (qp_mutexes
[i
].path
== md
.path
)
9604 /* If it is a proper subset of the mutex, create a
9607 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9610 qp_mutexes
[i
].prmask
&= ~mask
;
9611 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9613 /* Modify the mutex if there are more than one
9621 /* Remove the mutex. */
9622 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9630 add_qp_mutex (mask
);
9635 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9637 Any changes to a PR clears the mutex relations which include that PR. */
9640 clear_qp_mutex (valueT mask
)
9645 while (i
< qp_mutexeslen
)
9647 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9651 fprintf (stderr
, " Clearing mutex relation");
9652 print_prmask (qp_mutexes
[i
].prmask
);
9653 fprintf (stderr
, "\n");
9655 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9662 /* Clear implies relations which contain PRs in the given masks.
9663 P1_MASK indicates the source of the implies relation, while P2_MASK
9664 indicates the implied PR. */
9667 clear_qp_implies (valueT p1_mask
, valueT p2_mask
)
9672 while (i
< qp_implieslen
)
9674 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9675 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9678 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9679 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9680 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9687 /* Add the PRs specified to the list of implied relations. */
9690 add_qp_imply (int p1
, int p2
)
9696 /* p0 is not meaningful here. */
9697 if (p1
== 0 || p2
== 0)
9703 /* If it exists already, ignore it. */
9704 for (i
= 0; i
< qp_implieslen
; i
++)
9706 if (qp_implies
[i
].p1
== p1
9707 && qp_implies
[i
].p2
== p2
9708 && qp_implies
[i
].path
== md
.path
9709 && !qp_implies
[i
].p2_branched
)
9713 if (qp_implieslen
== qp_impliestotlen
)
9715 qp_impliestotlen
+= 20;
9716 qp_implies
= XRESIZEVEC (struct qp_imply
, qp_implies
, qp_impliestotlen
);
9719 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9720 qp_implies
[qp_implieslen
].p1
= p1
;
9721 qp_implies
[qp_implieslen
].p2
= p2
;
9722 qp_implies
[qp_implieslen
].path
= md
.path
;
9723 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9725 /* Add in the implied transitive relations; for everything that p2 implies,
9726 make p1 imply that, too; for everything that implies p1, make it imply p2
9728 for (i
= 0; i
< qp_implieslen
; i
++)
9730 if (qp_implies
[i
].p1
== p2
)
9731 add_qp_imply (p1
, qp_implies
[i
].p2
);
9732 if (qp_implies
[i
].p2
== p1
)
9733 add_qp_imply (qp_implies
[i
].p1
, p2
);
9735 /* Add in mutex relations implied by this implies relation; for each mutex
9736 relation containing p2, duplicate it and replace p2 with p1. */
9737 bit
= (valueT
) 1 << p1
;
9738 mask
= (valueT
) 1 << p2
;
9739 for (i
= 0; i
< qp_mutexeslen
; i
++)
9741 if (qp_mutexes
[i
].prmask
& mask
)
9742 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9746 /* Add the PRs specified in the mask to the mutex list; this means that only
9747 one of the PRs can be true at any time. PR0 should never be included in
9751 add_qp_mutex (valueT mask
)
9756 if (qp_mutexeslen
== qp_mutexestotlen
)
9758 qp_mutexestotlen
+= 20;
9759 qp_mutexes
= XRESIZEVEC (struct qpmutex
, qp_mutexes
, qp_mutexestotlen
);
9763 fprintf (stderr
, " Registering mutex on");
9764 print_prmask (mask
);
9765 fprintf (stderr
, "\n");
9767 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9768 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9772 has_suffix_p (const char *name
, const char *suffix
)
9774 size_t namelen
= strlen (name
);
9775 size_t sufflen
= strlen (suffix
);
9777 if (namelen
<= sufflen
)
9779 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9783 clear_register_values (void)
9787 fprintf (stderr
, " Clearing register values\n");
9788 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9789 gr_values
[i
].known
= 0;
9792 /* Keep track of register values/changes which affect DV tracking.
9794 optimization note: should add a flag to classes of insns where otherwise we
9795 have to examine a group of strings to identify them. */
9798 note_register_values (struct ia64_opcode
*idesc
)
9800 valueT qp_changemask
= 0;
9803 /* Invalidate values for registers being written to. */
9804 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9806 if (idesc
->operands
[i
] == IA64_OPND_R1
9807 || idesc
->operands
[i
] == IA64_OPND_R2
9808 || idesc
->operands
[i
] == IA64_OPND_R3
)
9810 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9811 if (regno
> 0 && regno
< NELEMS (gr_values
))
9812 gr_values
[regno
].known
= 0;
9814 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9816 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9817 if (regno
> 0 && regno
< 4)
9818 gr_values
[regno
].known
= 0;
9820 else if (idesc
->operands
[i
] == IA64_OPND_P1
9821 || idesc
->operands
[i
] == IA64_OPND_P2
)
9823 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9824 qp_changemask
|= (valueT
) 1 << regno
;
9826 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9828 if (idesc
->operands
[2] & (valueT
) 0x10000)
9829 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9831 qp_changemask
= idesc
->operands
[2];
9834 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9836 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9837 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9839 qp_changemask
= idesc
->operands
[1];
9840 qp_changemask
&= ~(valueT
) 0xFFFF;
9845 /* Always clear qp branch flags on any PR change. */
9846 /* FIXME there may be exceptions for certain compares. */
9847 clear_qp_branch_flag (qp_changemask
);
9849 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9850 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9852 qp_changemask
|= ~(valueT
) 0xFFFF;
9853 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9855 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9856 gr_values
[i
].known
= 0;
9858 clear_qp_mutex (qp_changemask
);
9859 clear_qp_implies (qp_changemask
, qp_changemask
);
9861 /* After a call, all register values are undefined, except those marked
9863 else if (startswith (idesc
->name
, "br.call")
9864 || startswith (idesc
->name
, "brl.call"))
9866 /* FIXME keep GR values which are marked as "safe_across_calls" */
9867 clear_register_values ();
9868 clear_qp_mutex (~qp_safe_across_calls
);
9869 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9870 clear_qp_branch_flag (~qp_safe_across_calls
);
9872 else if (is_interruption_or_rfi (idesc
)
9873 || is_taken_branch (idesc
))
9875 clear_register_values ();
9876 clear_qp_mutex (~(valueT
) 0);
9877 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9879 /* Look for mutex and implies relations. */
9880 else if ((idesc
->operands
[0] == IA64_OPND_P1
9881 || idesc
->operands
[0] == IA64_OPND_P2
)
9882 && (idesc
->operands
[1] == IA64_OPND_P1
9883 || idesc
->operands
[1] == IA64_OPND_P2
))
9885 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9886 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9887 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9888 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9890 /* If both PRs are PR0, we can't really do anything. */
9891 if (p1
== 0 && p2
== 0)
9894 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9896 /* In general, clear mutexes and implies which include P1 or P2,
9897 with the following exceptions. */
9898 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9899 || has_suffix_p (idesc
->name
, ".and.orcm"))
9901 clear_qp_implies (p2mask
, p1mask
);
9903 else if (has_suffix_p (idesc
->name
, ".andcm")
9904 || has_suffix_p (idesc
->name
, ".and"))
9906 clear_qp_implies (0, p1mask
| p2mask
);
9908 else if (has_suffix_p (idesc
->name
, ".orcm")
9909 || has_suffix_p (idesc
->name
, ".or"))
9911 clear_qp_mutex (p1mask
| p2mask
);
9912 clear_qp_implies (p1mask
| p2mask
, 0);
9918 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9920 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9921 if (p1
== 0 || p2
== 0)
9922 clear_qp_mutex (p1mask
| p2mask
);
9924 added
= update_qp_mutex (p1mask
| p2mask
);
9926 if (CURR_SLOT
.qp_regno
== 0
9927 || has_suffix_p (idesc
->name
, ".unc"))
9929 if (added
== 0 && p1
&& p2
)
9930 add_qp_mutex (p1mask
| p2mask
);
9931 if (CURR_SLOT
.qp_regno
!= 0)
9934 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9936 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9941 /* Look for mov imm insns into GRs. */
9942 else if (idesc
->operands
[0] == IA64_OPND_R1
9943 && (idesc
->operands
[1] == IA64_OPND_IMM22
9944 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9945 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9946 && (strcmp (idesc
->name
, "mov") == 0
9947 || strcmp (idesc
->name
, "movl") == 0))
9949 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9950 if (regno
> 0 && regno
< NELEMS (gr_values
))
9952 gr_values
[regno
].known
= 1;
9953 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9954 gr_values
[regno
].path
= md
.path
;
9956 fprintf (stderr
, " Know gr%d = %" PRIx64
"\n",
9957 regno
, gr_values
[regno
].value
);
9960 /* Look for dep.z imm insns. */
9961 else if (idesc
->operands
[0] == IA64_OPND_R1
9962 && idesc
->operands
[1] == IA64_OPND_IMM8
9963 && strcmp (idesc
->name
, "dep.z") == 0)
9965 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9966 if (regno
> 0 && regno
< NELEMS (gr_values
))
9968 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
9970 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
9971 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
9972 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
9973 gr_values
[regno
].known
= 1;
9974 gr_values
[regno
].value
= value
;
9975 gr_values
[regno
].path
= md
.path
;
9977 fprintf (stderr
, " Know gr%d = %" PRIx64
"\n",
9978 regno
, gr_values
[regno
].value
);
9983 clear_qp_mutex (qp_changemask
);
9984 clear_qp_implies (qp_changemask
, qp_changemask
);
9988 /* Return whether the given predicate registers are currently mutex. */
9991 qp_mutex (int p1
, int p2
, int path
)
9998 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9999 for (i
= 0; i
< qp_mutexeslen
; i
++)
10001 if (qp_mutexes
[i
].path
>= path
10002 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
10009 /* Return whether the given resource is in the given insn's list of chks
10010 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10014 resources_match (struct rsrc
*rs
,
10015 struct ia64_opcode
*idesc
,
10020 struct rsrc specs
[MAX_SPECS
];
10023 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10024 we don't need to check. One exception is note 11, which indicates that
10025 target predicates are written regardless of PR[qp]. */
10026 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
10030 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
10031 while (count
-- > 0)
10033 /* UNAT checking is a bit more specific than other resources */
10034 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
10035 && specs
[count
].mem_offset
.hint
10036 && rs
->mem_offset
.hint
)
10038 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
10040 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
10041 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10048 /* Skip apparent PR write conflicts where both writes are an AND or both
10049 writes are an OR. */
10050 if (rs
->dependency
->specifier
== IA64_RS_PR
10051 || rs
->dependency
->specifier
== IA64_RS_PRr
10052 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10054 if (specs
[count
].cmp_type
!= CMP_NONE
10055 && specs
[count
].cmp_type
== rs
->cmp_type
)
10058 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10059 dv_mode
[rs
->dependency
->mode
],
10060 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10061 specs
[count
].index
: 63);
10066 " %s on parallel compare conflict %s vs %s on PR%d\n",
10067 dv_mode
[rs
->dependency
->mode
],
10068 dv_cmp_type
[rs
->cmp_type
],
10069 dv_cmp_type
[specs
[count
].cmp_type
],
10070 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10071 specs
[count
].index
: 63);
10075 /* If either resource is not specific, conservatively assume a conflict
10077 if (!specs
[count
].specific
|| !rs
->specific
)
10079 else if (specs
[count
].index
== rs
->index
)
10086 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10087 insert a stop to create the break. Update all resource dependencies
10088 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10089 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10090 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10094 insn_group_break (int insert_stop
, int qp_regno
, int save_current
)
10098 if (insert_stop
&& md
.num_slots_in_use
> 0)
10099 PREV_SLOT
.end_of_insn_group
= 1;
10103 fprintf (stderr
, " Insn group break%s",
10104 (insert_stop
? " (w/stop)" : ""));
10106 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10107 fprintf (stderr
, "\n");
10111 while (i
< regdepslen
)
10113 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10116 && regdeps
[i
].qp_regno
!= qp_regno
)
10123 && CURR_SLOT
.src_file
== regdeps
[i
].file
10124 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10130 /* clear dependencies which are automatically cleared by a stop, or
10131 those that have reached the appropriate state of insn serialization */
10132 if (dep
->semantics
== IA64_DVS_IMPLIED
10133 || dep
->semantics
== IA64_DVS_IMPLIEDF
10134 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10136 print_dependency ("Removing", i
);
10137 regdeps
[i
] = regdeps
[--regdepslen
];
10141 if (dep
->semantics
== IA64_DVS_DATA
10142 || dep
->semantics
== IA64_DVS_INSTR
10143 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10145 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10146 regdeps
[i
].insn_srlz
= STATE_STOP
;
10147 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10148 regdeps
[i
].data_srlz
= STATE_STOP
;
10155 /* Add the given resource usage spec to the list of active dependencies. */
10158 mark_resource (struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
,
10159 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
,
10164 if (regdepslen
== regdepstotlen
)
10166 regdepstotlen
+= 20;
10167 regdeps
= XRESIZEVEC (struct rsrc
, regdeps
, regdepstotlen
);
10170 regdeps
[regdepslen
] = *spec
;
10171 regdeps
[regdepslen
].depind
= depind
;
10172 regdeps
[regdepslen
].path
= path
;
10173 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10174 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10176 print_dependency ("Adding", regdepslen
);
10182 print_dependency (const char *action
, int depind
)
10186 fprintf (stderr
, " %s %s '%s'",
10187 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10188 (regdeps
[depind
].dependency
)->name
);
10189 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10190 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10191 if (regdeps
[depind
].mem_offset
.hint
)
10192 fprintf (stderr
, " %" PRIx64
"+%" PRIx64
,
10193 regdeps
[depind
].mem_offset
.base
,
10194 regdeps
[depind
].mem_offset
.offset
);
10195 fprintf (stderr
, "\n");
10200 instruction_serialization (void)
10204 fprintf (stderr
, " Instruction serialization\n");
10205 for (i
= 0; i
< regdepslen
; i
++)
10206 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10207 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10211 data_serialization (void)
10215 fprintf (stderr
, " Data serialization\n");
10216 while (i
< regdepslen
)
10218 if (regdeps
[i
].data_srlz
== STATE_STOP
10219 /* Note: as of 991210, all "other" dependencies are cleared by a
10220 data serialization. This might change with new tables */
10221 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10223 print_dependency ("Removing", i
);
10224 regdeps
[i
] = regdeps
[--regdepslen
];
10231 /* Insert stops and serializations as needed to avoid DVs. */
10234 remove_marked_resource (struct rsrc
*rs
)
10236 switch (rs
->dependency
->semantics
)
10238 case IA64_DVS_SPECIFIC
:
10240 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10241 /* Fall through. */
10242 case IA64_DVS_INSTR
:
10244 fprintf (stderr
, "Inserting instr serialization\n");
10245 if (rs
->insn_srlz
< STATE_STOP
)
10246 insn_group_break (1, 0, 0);
10247 if (rs
->insn_srlz
< STATE_SRLZ
)
10249 struct slot oldslot
= CURR_SLOT
;
10250 /* Manually jam a srlz.i insn into the stream */
10251 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10252 CURR_SLOT
.user_template
= -1;
10253 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10254 instruction_serialization ();
10255 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10256 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10257 emit_one_bundle ();
10258 CURR_SLOT
= oldslot
;
10260 insn_group_break (1, 0, 0);
10262 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10263 "other" types of DV are eliminated
10264 by a data serialization */
10265 case IA64_DVS_DATA
:
10267 fprintf (stderr
, "Inserting data serialization\n");
10268 if (rs
->data_srlz
< STATE_STOP
)
10269 insn_group_break (1, 0, 0);
10271 struct slot oldslot
= CURR_SLOT
;
10272 /* Manually jam a srlz.d insn into the stream */
10273 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10274 CURR_SLOT
.user_template
= -1;
10275 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10276 data_serialization ();
10277 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10278 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10279 emit_one_bundle ();
10280 CURR_SLOT
= oldslot
;
10283 case IA64_DVS_IMPLIED
:
10284 case IA64_DVS_IMPLIEDF
:
10286 fprintf (stderr
, "Inserting stop\n");
10287 insn_group_break (1, 0, 0);
10294 /* Check the resources used by the given opcode against the current dependency
10297 The check is run once for each execution path encountered. In this case,
10298 a unique execution path is the sequence of instructions following a code
10299 entry point, e.g. the following has three execution paths, one starting
10300 at L0, one at L1, and one at L2.
10309 check_dependencies (struct ia64_opcode
*idesc
)
10311 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10315 /* Note that the number of marked resources may change within the
10316 loop if in auto mode. */
10318 while (i
< regdepslen
)
10320 struct rsrc
*rs
= ®deps
[i
];
10321 const struct ia64_dependency
*dep
= rs
->dependency
;
10324 int start_over
= 0;
10326 if (dep
->semantics
== IA64_DVS_NONE
10327 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10333 note
= NOTE (opdeps
->chks
[chkind
]);
10335 /* Check this resource against each execution path seen thus far. */
10336 for (path
= 0; path
<= md
.path
; path
++)
10340 /* If the dependency wasn't on the path being checked, ignore it. */
10341 if (rs
->path
< path
)
10344 /* If the QP for this insn implies a QP which has branched, don't
10345 bother checking. Ed. NOTE: I don't think this check is terribly
10346 useful; what's the point of generating code which will only be
10347 reached if its QP is zero?
10348 This code was specifically inserted to handle the following code,
10349 based on notes from Intel's DV checking code, where p1 implies p2.
10355 if (CURR_SLOT
.qp_regno
!= 0)
10359 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10361 if (qp_implies
[implies
].path
>= path
10362 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10363 && qp_implies
[implies
].p2_branched
)
10373 if ((matchtype
= resources_match (rs
, idesc
, note
,
10374 CURR_SLOT
.qp_regno
, path
)) != 0)
10377 char pathmsg
[256] = "";
10378 char indexmsg
[256] = "";
10379 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10382 snprintf (pathmsg
, sizeof (pathmsg
),
10383 " when entry is at label '%s'",
10384 md
.entry_labels
[path
- 1]);
10385 if (matchtype
== 1 && rs
->index
>= 0)
10386 snprintf (indexmsg
, sizeof (indexmsg
),
10387 ", specific resource number is %d",
10389 snprintf (msg
, sizeof (msg
),
10390 "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10392 (certain
? "violates" : "may violate"),
10393 dv_mode
[dep
->mode
], dep
->name
,
10394 dv_sem
[dep
->semantics
],
10395 pathmsg
, indexmsg
);
10397 if (md
.explicit_mode
)
10399 as_warn ("%s", msg
);
10400 if (path
< md
.path
)
10401 as_warn (_("Only the first path encountering the conflict is reported"));
10402 as_warn_where (rs
->file
, rs
->line
,
10403 _("This is the location of the conflicting usage"));
10404 /* Don't bother checking other paths, to avoid duplicating
10405 the same warning */
10411 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10413 remove_marked_resource (rs
);
10415 /* since the set of dependencies has changed, start over */
10416 /* FIXME -- since we're removing dvs as we go, we
10417 probably don't really need to start over... */
10430 /* Register new dependencies based on the given opcode. */
10433 mark_resources (struct ia64_opcode
*idesc
)
10436 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10437 int add_only_qp_reads
= 0;
10439 /* A conditional branch only uses its resources if it is taken; if it is
10440 taken, we stop following that path. The other branch types effectively
10441 *always* write their resources. If it's not taken, register only QP
10443 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10445 add_only_qp_reads
= 1;
10449 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10451 for (i
= 0; i
< opdeps
->nregs
; i
++)
10453 const struct ia64_dependency
*dep
;
10454 struct rsrc specs
[MAX_SPECS
];
10459 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10460 note
= NOTE (opdeps
->regs
[i
]);
10462 if (add_only_qp_reads
10463 && !(dep
->mode
== IA64_DV_WAR
10464 && (dep
->specifier
== IA64_RS_PR
10465 || dep
->specifier
== IA64_RS_PRr
10466 || dep
->specifier
== IA64_RS_PR63
)))
10469 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10471 while (count
-- > 0)
10473 mark_resource (idesc
, dep
, &specs
[count
],
10474 DEP (opdeps
->regs
[i
]), md
.path
);
10477 /* The execution path may affect register values, which may in turn
10478 affect which indirect-access resources are accessed. */
10479 switch (dep
->specifier
)
10483 case IA64_RS_CPUID
:
10491 for (path
= 0; path
< md
.path
; path
++)
10493 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10494 while (count
-- > 0)
10495 mark_resource (idesc
, dep
, &specs
[count
],
10496 DEP (opdeps
->regs
[i
]), path
);
10503 /* Remove dependencies when they no longer apply. */
10506 update_dependencies (struct ia64_opcode
*idesc
)
10510 if (strcmp (idesc
->name
, "srlz.i") == 0)
10512 instruction_serialization ();
10514 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10516 data_serialization ();
10518 else if (is_interruption_or_rfi (idesc
)
10519 || is_taken_branch (idesc
))
10521 /* Although technically the taken branch doesn't clear dependencies
10522 which require a srlz.[id], we don't follow the branch; the next
10523 instruction is assumed to start with a clean slate. */
10527 else if (is_conditional_branch (idesc
)
10528 && CURR_SLOT
.qp_regno
!= 0)
10530 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10532 for (i
= 0; i
< qp_implieslen
; i
++)
10534 /* If the conditional branch's predicate is implied by the predicate
10535 in an existing dependency, remove that dependency. */
10536 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10539 /* Note that this implied predicate takes a branch so that if
10540 a later insn generates a DV but its predicate implies this
10541 one, we can avoid the false DV warning. */
10542 qp_implies
[i
].p2_branched
= 1;
10543 while (depind
< regdepslen
)
10545 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10547 print_dependency ("Removing", depind
);
10548 regdeps
[depind
] = regdeps
[--regdepslen
];
10555 /* Any marked resources which have this same predicate should be
10556 cleared, provided that the QP hasn't been modified between the
10557 marking instruction and the branch. */
10560 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10565 while (i
< regdepslen
)
10567 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10568 && regdeps
[i
].link_to_qp_branch
10569 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10570 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10572 /* Treat like a taken branch */
10573 print_dependency ("Removing", i
);
10574 regdeps
[i
] = regdeps
[--regdepslen
];
10583 /* Examine the current instruction for dependency violations. */
10586 check_dv (struct ia64_opcode
*idesc
)
10590 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10591 idesc
->name
, CURR_SLOT
.src_line
,
10592 idesc
->dependencies
->nchks
,
10593 idesc
->dependencies
->nregs
);
10596 /* Look through the list of currently marked resources; if the current
10597 instruction has the dependency in its chks list which uses that resource,
10598 check against the specific resources used. */
10599 check_dependencies (idesc
);
10601 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10602 then add them to the list of marked resources. */
10603 mark_resources (idesc
);
10605 /* There are several types of dependency semantics, and each has its own
10606 requirements for being cleared
10608 Instruction serialization (insns separated by interruption, rfi, or
10609 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10611 Data serialization (instruction serialization, or writer + srlz.d +
10612 reader, where writer and srlz.d are in separate groups) clears
10613 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10614 always be the case).
10616 Instruction group break (groups separated by stop, taken branch,
10617 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10619 update_dependencies (idesc
);
10621 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10622 warning. Keep track of as many as possible that are useful. */
10623 note_register_values (idesc
);
10625 /* We don't need or want this anymore. */
10626 md
.mem_offset
.hint
= 0;
10631 /* Translate one line of assembly. Pseudo ops and labels do not show
10634 md_assemble (char *str
)
10636 char *saved_input_line_pointer
, *temp
;
10637 const char *mnemonic
;
10638 const struct pseudo_opcode
*pdesc
;
10639 struct ia64_opcode
*idesc
;
10640 unsigned char qp_regno
;
10641 unsigned int flags
;
10644 saved_input_line_pointer
= input_line_pointer
;
10645 input_line_pointer
= str
;
10647 /* extract the opcode (mnemonic): */
10649 ch
= get_symbol_name (&temp
);
10651 pdesc
= (struct pseudo_opcode
*) str_hash_find (md
.pseudo_hash
, mnemonic
);
10654 (void) restore_line_pointer (ch
);
10655 (*pdesc
->handler
) (pdesc
->arg
);
10659 /* Find the instruction descriptor matching the arguments. */
10661 idesc
= ia64_find_opcode (mnemonic
);
10662 (void) restore_line_pointer (ch
);
10665 as_bad (_("Unknown opcode `%s'"), mnemonic
);
10669 idesc
= parse_operands (idesc
);
10673 /* Handle the dynamic ops we can handle now: */
10674 if (idesc
->type
== IA64_TYPE_DYN
)
10676 if (strcmp (idesc
->name
, "add") == 0)
10678 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10679 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10683 ia64_free_opcode (idesc
);
10684 idesc
= ia64_find_opcode (mnemonic
);
10686 else if (strcmp (idesc
->name
, "mov") == 0)
10688 enum ia64_opnd opnd1
, opnd2
;
10691 opnd1
= idesc
->operands
[0];
10692 opnd2
= idesc
->operands
[1];
10693 if (opnd1
== IA64_OPND_AR3
)
10695 else if (opnd2
== IA64_OPND_AR3
)
10699 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10701 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10702 mnemonic
= "mov.i";
10703 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10704 mnemonic
= "mov.m";
10712 ia64_free_opcode (idesc
);
10713 idesc
= ia64_find_opcode (mnemonic
);
10714 while (idesc
!= NULL
10715 && (idesc
->operands
[0] != opnd1
10716 || idesc
->operands
[1] != opnd2
))
10717 idesc
= get_next_opcode (idesc
);
10721 else if (strcmp (idesc
->name
, "mov.i") == 0
10722 || strcmp (idesc
->name
, "mov.m") == 0)
10724 enum ia64_opnd opnd1
, opnd2
;
10727 opnd1
= idesc
->operands
[0];
10728 opnd2
= idesc
->operands
[1];
10729 if (opnd1
== IA64_OPND_AR3
)
10731 else if (opnd2
== IA64_OPND_AR3
)
10735 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10738 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10740 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10742 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10743 as_bad (_("AR %d can only be accessed by %c-unit"),
10744 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10748 else if (strcmp (idesc
->name
, "hint.b") == 0)
10754 case hint_b_warning
:
10755 as_warn (_("hint.b may be treated as nop"));
10758 as_bad (_("hint.b shouldn't be used"));
10764 if (md
.qp
.X_op
== O_register
)
10766 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10767 md
.qp
.X_op
= O_absent
;
10770 flags
= idesc
->flags
;
10772 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10774 /* The alignment frag has to end with a stop bit only if the
10775 next instruction after the alignment directive has to be
10776 the first instruction in an instruction group. */
10779 while (align_frag
->fr_type
!= rs_align_code
)
10781 align_frag
= align_frag
->fr_next
;
10785 /* align_frag can be NULL if there are directives in
10787 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10788 align_frag
->tc_frag_data
= 1;
10791 insn_group_break (1, 0, 0);
10795 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10797 as_bad (_("`%s' cannot be predicated"), idesc
->name
);
10801 /* Build the instruction. */
10802 CURR_SLOT
.qp_regno
= qp_regno
;
10803 CURR_SLOT
.idesc
= idesc
;
10804 CURR_SLOT
.src_file
= as_where (&CURR_SLOT
.src_line
);
10805 dwarf2_where (&CURR_SLOT
.debug_line
);
10806 dwarf2_consume_line_info ();
10808 /* Add unwind entries, if there are any. */
10809 if (unwind
.current_entry
)
10811 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10812 unwind
.current_entry
= NULL
;
10814 if (unwind
.pending_saves
)
10816 if (unwind
.pending_saves
->next
)
10818 /* Attach the next pending save to the next slot so that its
10819 slot number will get set correctly. */
10820 add_unwind_entry (unwind
.pending_saves
->next
, NOT_A_CHAR
);
10821 unwind
.pending_saves
= &unwind
.pending_saves
->next
->r
.record
.p
;
10824 unwind
.pending_saves
= NULL
;
10826 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10829 /* Check for dependency violations. */
10833 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10834 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10835 emit_one_bundle ();
10837 if ((flags
& IA64_OPCODE_LAST
) != 0)
10838 insn_group_break (1, 0, 0);
10840 md
.last_text_seg
= now_seg
;
10841 md
.last_text_subseg
= now_subseg
;
10844 input_line_pointer
= saved_input_line_pointer
;
10847 /* Called when symbol NAME cannot be found in the symbol table.
10848 Should be used for dynamic valued symbols only. */
10851 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
10856 /* Called for any expression that can not be recognized. When the
10857 function is called, `input_line_pointer' will point to the start of
10861 md_operand (expressionS
*e
)
10863 switch (*input_line_pointer
)
10866 ++input_line_pointer
;
10867 expression_and_evaluate (e
);
10868 if (*input_line_pointer
!= ']')
10870 as_bad (_("Closing bracket missing"));
10875 if (e
->X_op
!= O_register
10876 || e
->X_add_number
< REG_GR
10877 || e
->X_add_number
> REG_GR
+ 127)
10879 as_bad (_("Index must be a general register"));
10880 e
->X_add_number
= REG_GR
;
10883 ++input_line_pointer
;
10894 ignore_rest_of_line ();
10897 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10898 a section symbol plus some offset. For relocs involving @fptr(),
10899 directives we don't want such adjustments since we need to have the
10900 original symbol's name in the reloc. */
10902 ia64_fix_adjustable (fixS
*fix
)
10904 /* Prevent all adjustments to global symbols */
10905 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10908 switch (fix
->fx_r_type
)
10910 case BFD_RELOC_IA64_FPTR64I
:
10911 case BFD_RELOC_IA64_FPTR32MSB
:
10912 case BFD_RELOC_IA64_FPTR32LSB
:
10913 case BFD_RELOC_IA64_FPTR64MSB
:
10914 case BFD_RELOC_IA64_FPTR64LSB
:
10915 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10916 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10926 ia64_force_relocation (fixS
*fix
)
10928 switch (fix
->fx_r_type
)
10930 case BFD_RELOC_IA64_FPTR64I
:
10931 case BFD_RELOC_IA64_FPTR32MSB
:
10932 case BFD_RELOC_IA64_FPTR32LSB
:
10933 case BFD_RELOC_IA64_FPTR64MSB
:
10934 case BFD_RELOC_IA64_FPTR64LSB
:
10936 case BFD_RELOC_IA64_LTOFF22
:
10937 case BFD_RELOC_IA64_LTOFF64I
:
10938 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10939 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10940 case BFD_RELOC_IA64_PLTOFF22
:
10941 case BFD_RELOC_IA64_PLTOFF64I
:
10942 case BFD_RELOC_IA64_PLTOFF64MSB
:
10943 case BFD_RELOC_IA64_PLTOFF64LSB
:
10945 case BFD_RELOC_IA64_LTOFF22X
:
10946 case BFD_RELOC_IA64_LDXMOV
:
10953 return generic_force_reloc (fix
);
10956 /* Decide from what point a pc-relative relocation is relative to,
10957 relative to the pc-relative fixup. Er, relatively speaking. */
10959 ia64_pcrel_from_section (fixS
*fix
, segT sec
)
10961 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10963 if (bfd_section_flags (sec
) & SEC_CODE
)
10970 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10972 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10976 exp
.X_op
= O_pseudo_fixup
;
10977 exp
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10978 exp
.X_add_number
= 0;
10979 exp
.X_add_symbol
= symbol
;
10980 emit_expr (&exp
, size
);
10983 /* This is called whenever some data item (not an instruction) needs a
10984 fixup. We pick the right reloc code depending on the byteorder
10985 currently in effect. */
10987 ia64_cons_fix_new (fragS
*f
, int where
, int nbytes
, expressionS
*exp
,
10988 bfd_reloc_code_real_type code
)
10994 /* There are no reloc for 8 and 16 bit quantities, but we allow
10995 them here since they will work fine as long as the expression
10996 is fully defined at the end of the pass over the source file. */
10997 case 1: code
= BFD_RELOC_8
; break;
10998 case 2: code
= BFD_RELOC_16
; break;
11000 if (target_big_endian
)
11001 code
= BFD_RELOC_IA64_DIR32MSB
;
11003 code
= BFD_RELOC_IA64_DIR32LSB
;
11007 /* In 32-bit mode, data8 could mean function descriptors too. */
11008 if (exp
->X_op
== O_pseudo_fixup
11009 && exp
->X_op_symbol
11010 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
11011 && !(md
.flags
& EF_IA_64_ABI64
))
11013 if (target_big_endian
)
11014 code
= BFD_RELOC_IA64_IPLTMSB
;
11016 code
= BFD_RELOC_IA64_IPLTLSB
;
11017 exp
->X_op
= O_symbol
;
11022 if (target_big_endian
)
11023 code
= BFD_RELOC_IA64_DIR64MSB
;
11025 code
= BFD_RELOC_IA64_DIR64LSB
;
11030 if (exp
->X_op
== O_pseudo_fixup
11031 && exp
->X_op_symbol
11032 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
11034 if (target_big_endian
)
11035 code
= BFD_RELOC_IA64_IPLTMSB
;
11037 code
= BFD_RELOC_IA64_IPLTLSB
;
11038 exp
->X_op
= O_symbol
;
11044 as_bad (_("Unsupported fixup size %d"), nbytes
);
11045 ignore_rest_of_line ();
11049 if (exp
->X_op
== O_pseudo_fixup
)
11051 exp
->X_op
= O_symbol
;
11052 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11053 /* ??? If code unchanged, unsupported. */
11056 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11057 /* We need to store the byte order in effect in case we're going
11058 to fix an 8 or 16 bit relocation (for which there no real
11059 relocs available). See md_apply_fix(). */
11060 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11063 /* Return the actual relocation we wish to associate with the pseudo
11064 reloc described by SYM and R_TYPE. SYM should be one of the
11065 symbols in the pseudo_func array, or NULL. */
11067 static bfd_reloc_code_real_type
11068 ia64_gen_real_reloc_type (struct symbol
*sym
, bfd_reloc_code_real_type r_type
)
11070 bfd_reloc_code_real_type newr
= 0;
11071 const char *type
= NULL
, *suffix
= "";
11078 switch (S_GET_VALUE (sym
))
11080 case FUNC_FPTR_RELATIVE
:
11083 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_FPTR64I
; break;
11084 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_FPTR32MSB
; break;
11085 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_FPTR32LSB
; break;
11086 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_FPTR64MSB
; break;
11087 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_FPTR64LSB
; break;
11088 default: type
= "FPTR"; break;
11092 case FUNC_GP_RELATIVE
:
11095 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_GPREL22
; break;
11096 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_GPREL64I
; break;
11097 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_GPREL32MSB
; break;
11098 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_GPREL32LSB
; break;
11099 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_GPREL64MSB
; break;
11100 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_GPREL64LSB
; break;
11101 default: type
= "GPREL"; break;
11105 case FUNC_LT_RELATIVE
:
11108 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22
; break;
11109 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_LTOFF64I
; break;
11110 default: type
= "LTOFF"; break;
11114 case FUNC_LT_RELATIVE_X
:
11117 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22X
; break;
11118 default: type
= "LTOFF"; suffix
= "X"; break;
11122 case FUNC_PC_RELATIVE
:
11125 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PCREL22
; break;
11126 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PCREL64I
; break;
11127 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_PCREL32MSB
; break;
11128 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_PCREL32LSB
; break;
11129 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PCREL64MSB
; break;
11130 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PCREL64LSB
; break;
11131 default: type
= "PCREL"; break;
11135 case FUNC_PLT_RELATIVE
:
11138 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PLTOFF22
; break;
11139 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PLTOFF64I
; break;
11140 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PLTOFF64MSB
;break;
11141 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PLTOFF64LSB
;break;
11142 default: type
= "PLTOFF"; break;
11146 case FUNC_SEC_RELATIVE
:
11149 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SECREL32MSB
;break;
11150 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SECREL32LSB
;break;
11151 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SECREL64MSB
;break;
11152 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SECREL64LSB
;break;
11153 default: type
= "SECREL"; break;
11157 case FUNC_SEG_RELATIVE
:
11160 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SEGREL32MSB
;break;
11161 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SEGREL32LSB
;break;
11162 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SEGREL64MSB
;break;
11163 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SEGREL64LSB
;break;
11164 default: type
= "SEGREL"; break;
11168 case FUNC_LTV_RELATIVE
:
11171 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_LTV32MSB
; break;
11172 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_LTV32LSB
; break;
11173 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_LTV64MSB
; break;
11174 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_LTV64LSB
; break;
11175 default: type
= "LTV"; break;
11179 case FUNC_LT_FPTR_RELATIVE
:
11182 case BFD_RELOC_IA64_IMM22
:
11183 newr
= BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11184 case BFD_RELOC_IA64_IMM64
:
11185 newr
= BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11186 case BFD_RELOC_IA64_DIR32MSB
:
11187 newr
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11188 case BFD_RELOC_IA64_DIR32LSB
:
11189 newr
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11190 case BFD_RELOC_IA64_DIR64MSB
:
11191 newr
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11192 case BFD_RELOC_IA64_DIR64LSB
:
11193 newr
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11195 type
= "LTOFF_FPTR"; break;
11199 case FUNC_TP_RELATIVE
:
11202 case BFD_RELOC_IA64_IMM14
: newr
= BFD_RELOC_IA64_TPREL14
; break;
11203 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_TPREL22
; break;
11204 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_TPREL64I
; break;
11205 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_TPREL64MSB
; break;
11206 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_TPREL64LSB
; break;
11207 default: type
= "TPREL"; break;
11211 case FUNC_LT_TP_RELATIVE
:
11214 case BFD_RELOC_IA64_IMM22
:
11215 newr
= BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11217 type
= "LTOFF_TPREL"; break;
11221 case FUNC_DTP_MODULE
:
11224 case BFD_RELOC_IA64_DIR64MSB
:
11225 newr
= BFD_RELOC_IA64_DTPMOD64MSB
; break;
11226 case BFD_RELOC_IA64_DIR64LSB
:
11227 newr
= BFD_RELOC_IA64_DTPMOD64LSB
; break;
11229 type
= "DTPMOD"; break;
11233 case FUNC_LT_DTP_MODULE
:
11236 case BFD_RELOC_IA64_IMM22
:
11237 newr
= BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11239 type
= "LTOFF_DTPMOD"; break;
11243 case FUNC_DTP_RELATIVE
:
11246 case BFD_RELOC_IA64_DIR32MSB
:
11247 newr
= BFD_RELOC_IA64_DTPREL32MSB
; break;
11248 case BFD_RELOC_IA64_DIR32LSB
:
11249 newr
= BFD_RELOC_IA64_DTPREL32LSB
; break;
11250 case BFD_RELOC_IA64_DIR64MSB
:
11251 newr
= BFD_RELOC_IA64_DTPREL64MSB
; break;
11252 case BFD_RELOC_IA64_DIR64LSB
:
11253 newr
= BFD_RELOC_IA64_DTPREL64LSB
; break;
11254 case BFD_RELOC_IA64_IMM14
:
11255 newr
= BFD_RELOC_IA64_DTPREL14
; break;
11256 case BFD_RELOC_IA64_IMM22
:
11257 newr
= BFD_RELOC_IA64_DTPREL22
; break;
11258 case BFD_RELOC_IA64_IMM64
:
11259 newr
= BFD_RELOC_IA64_DTPREL64I
; break;
11261 type
= "DTPREL"; break;
11265 case FUNC_LT_DTP_RELATIVE
:
11268 case BFD_RELOC_IA64_IMM22
:
11269 newr
= BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11271 type
= "LTOFF_DTPREL"; break;
11275 case FUNC_IPLT_RELOC
:
11278 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11279 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11280 default: type
= "IPLT"; break;
11285 case FUNC_SLOTCOUNT_RELOC
:
11286 return DUMMY_RELOC_IA64_SLOTCOUNT
;
11303 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11304 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11305 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11306 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11307 case BFD_RELOC_UNUSED
: width
= 13; break;
11308 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11309 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11310 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11314 /* This should be an error, but since previously there wasn't any
11315 diagnostic here, don't make it fail because of this for now. */
11316 as_warn (_("Cannot express %s%d%s relocation"), type
, width
, suffix
);
11321 /* Here is where generate the appropriate reloc for pseudo relocation
11324 ia64_validate_fix (fixS
*fix
)
11326 switch (fix
->fx_r_type
)
11328 case BFD_RELOC_IA64_FPTR64I
:
11329 case BFD_RELOC_IA64_FPTR32MSB
:
11330 case BFD_RELOC_IA64_FPTR64LSB
:
11331 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11332 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11333 if (fix
->fx_offset
!= 0)
11334 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11335 _("No addend allowed in @fptr() relocation"));
11343 fix_insn (fixS
*fix
, const struct ia64_operand
*odesc
, valueT value
)
11345 bfd_vma insn
[3], t0
, t1
, control_bits
;
11350 slot
= fix
->fx_where
& 0x3;
11351 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11353 /* Bundles are always in little-endian byte order */
11354 t0
= bfd_getl64 (fixpos
);
11355 t1
= bfd_getl64 (fixpos
+ 8);
11356 control_bits
= t0
& 0x1f;
11357 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11358 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11359 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11362 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11364 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11365 insn
[2] |= (((value
& 0x7f) << 13)
11366 | (((value
>> 7) & 0x1ff) << 27)
11367 | (((value
>> 16) & 0x1f) << 22)
11368 | (((value
>> 21) & 0x1) << 21)
11369 | (((value
>> 63) & 0x1) << 36));
11371 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11373 if (value
& ~0x3fffffffffffffffULL
)
11374 err
= _("integer operand out of range");
11375 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11376 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11378 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11381 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11382 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11383 | (((value
>> 0) & 0xfffff) << 13));
11386 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11389 as_bad_where (fix
->fx_file
, fix
->fx_line
, "%s", err
);
11391 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11392 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11393 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11394 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11397 /* Attempt to simplify or even eliminate a fixup. The return value is
11398 ignored; perhaps it was once meaningful, but now it is historical.
11399 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11401 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11405 md_apply_fix (fixS
*fix
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
11408 valueT value
= *valP
;
11410 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11414 switch (fix
->fx_r_type
)
11416 case BFD_RELOC_IA64_PCREL21B
: break;
11417 case BFD_RELOC_IA64_PCREL21BI
: break;
11418 case BFD_RELOC_IA64_PCREL21F
: break;
11419 case BFD_RELOC_IA64_PCREL21M
: break;
11420 case BFD_RELOC_IA64_PCREL60B
: break;
11421 case BFD_RELOC_IA64_PCREL22
: break;
11422 case BFD_RELOC_IA64_PCREL64I
: break;
11423 case BFD_RELOC_IA64_PCREL32MSB
: break;
11424 case BFD_RELOC_IA64_PCREL32LSB
: break;
11425 case BFD_RELOC_IA64_PCREL64MSB
: break;
11426 case BFD_RELOC_IA64_PCREL64LSB
: break;
11428 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11435 switch ((unsigned) fix
->fx_r_type
)
11437 case BFD_RELOC_UNUSED
:
11438 /* This must be a TAG13 or TAG13b operand. There are no external
11439 relocs defined for them, so we must give an error. */
11440 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11441 _("%s must have a constant value"),
11442 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11446 case BFD_RELOC_IA64_TPREL14
:
11447 case BFD_RELOC_IA64_TPREL22
:
11448 case BFD_RELOC_IA64_TPREL64I
:
11449 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11450 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11451 case BFD_RELOC_IA64_DTPREL14
:
11452 case BFD_RELOC_IA64_DTPREL22
:
11453 case BFD_RELOC_IA64_DTPREL64I
:
11454 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11455 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11459 case DUMMY_RELOC_IA64_SLOTCOUNT
:
11460 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11461 _("cannot resolve @slotcount parameter"));
11470 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11473 if (fix
->fx_r_type
== DUMMY_RELOC_IA64_SLOTCOUNT
)
11475 /* For @slotcount, convert an addresses difference to a slots
11479 v
= (value
>> 4) * 3;
11480 switch (value
& 0x0f)
11494 as_bad (_("invalid @slotcount value"));
11500 if (fix
->tc_fix_data
.bigendian
)
11501 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11503 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11508 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11513 /* Generate the BFD reloc to be stuck in the object file from the
11514 fixup used internally in the assembler. */
11517 tc_gen_reloc (asection
*sec ATTRIBUTE_UNUSED
, fixS
*fixp
)
11521 reloc
= XNEW (arelent
);
11522 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
11523 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11524 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11525 reloc
->addend
= fixp
->fx_offset
;
11526 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11530 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11531 _("Cannot represent %s relocation in object file"),
11532 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11539 /* Turn a string in input_line_pointer into a floating point constant
11540 of type TYPE, and store the appropriate bytes in *LIT. The number
11541 of LITTLENUMS emitted is stored in *SIZE. An error message is
11542 returned, or NULL on OK. */
11545 md_atof (int type
, char *lit
, int *size
)
11547 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11577 return _("Unrecognized or unsupported floating point constant");
11579 t
= atof_ieee (input_line_pointer
, type
, words
);
11581 input_line_pointer
= t
;
11583 (*ia64_float_to_chars
) (lit
, words
, prec
);
11587 /* It is 10 byte floating point with 6 byte padding. */
11588 memset (&lit
[10], 0, 6);
11589 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11592 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11597 /* Handle ia64 specific semantics of the align directive. */
11600 ia64_md_do_align (int n ATTRIBUTE_UNUSED
,
11601 const char *fill ATTRIBUTE_UNUSED
,
11602 int len ATTRIBUTE_UNUSED
,
11603 int max ATTRIBUTE_UNUSED
)
11605 if (subseg_text_p (now_seg
))
11606 ia64_flush_insns ();
11609 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11610 of an rs_align_code fragment. */
11613 ia64_handle_align (fragS
*fragp
)
11617 const unsigned char *nop_type
;
11619 if (fragp
->fr_type
!= rs_align_code
)
11622 /* Check if this frag has to end with a stop bit. */
11623 nop_type
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11625 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11626 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11628 /* If no paddings are needed, we check if we need a stop bit. */
11629 if (!bytes
&& fragp
->tc_frag_data
)
11631 if (fragp
->fr_fix
< 16)
11633 /* FIXME: It won't work with
11635 alloc r32=ar.pfs,1,2,4,0
11639 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11640 _("Can't add stop bit to mark end of instruction group"));
11643 /* Bundles are always in little-endian byte order. Make sure
11644 the previous bundle has the stop bit. */
11648 /* Make sure we are on a 16-byte boundary, in case someone has been
11649 putting data into a text section. */
11652 int fix
= bytes
& 15;
11653 memset (p
, 0, fix
);
11656 fragp
->fr_fix
+= fix
;
11659 /* Instruction bundles are always little-endian. */
11660 memcpy (p
, nop_type
, 16);
11661 fragp
->fr_var
= 16;
11665 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11670 number_to_chars_bigendian (lit
, (long) (*words
++),
11671 sizeof (LITTLENUM_TYPE
));
11672 lit
+= sizeof (LITTLENUM_TYPE
);
11677 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11682 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11683 sizeof (LITTLENUM_TYPE
));
11684 lit
+= sizeof (LITTLENUM_TYPE
);
11689 ia64_elf_section_change_hook (void)
11691 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11692 && elf_linked_to_section (now_seg
) == NULL
)
11693 elf_linked_to_section (now_seg
) = text_section
;
11694 dot_byteorder (-1);
11697 /* Check if a label should be made global. */
11699 ia64_check_label (symbolS
*label
)
11701 if (*input_line_pointer
== ':')
11703 S_SET_EXTERNAL (label
);
11704 input_line_pointer
++;
11708 /* Used to remember where .alias and .secalias directives are seen. We
11709 will rename symbol and section names when we are about to output
11710 the relocatable file. */
11713 const char *file
; /* The file where the directive is seen. */
11714 unsigned int line
; /* The line number the directive is at. */
11715 const char *name
; /* The original name of the symbol. */
11718 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11719 .secalias. Otherwise, it is .alias. */
11721 dot_alias (int section
)
11723 char *name
, *alias
;
11729 htab_t ahash
, nhash
;
11732 delim
= get_symbol_name (&name
);
11733 end_name
= input_line_pointer
;
11736 if (name
== end_name
)
11738 as_bad (_("expected symbol name"));
11739 ignore_rest_of_line ();
11743 SKIP_WHITESPACE_AFTER_NAME ();
11745 if (*input_line_pointer
!= ',')
11748 as_bad (_("expected comma after \"%s\""), name
);
11750 ignore_rest_of_line ();
11754 input_line_pointer
++;
11756 ia64_canonicalize_symbol_name (name
);
11758 /* We call demand_copy_C_string to check if alias string is valid.
11759 There should be a closing `"' and no `\0' in the string. */
11760 alias
= demand_copy_C_string (&len
);
11763 ignore_rest_of_line ();
11767 /* Make a copy of name string. */
11768 name
= notes_strdup (name
);
11773 ahash
= secalias_hash
;
11774 nhash
= secalias_name_hash
;
11779 ahash
= alias_hash
;
11780 nhash
= alias_name_hash
;
11783 /* Check if alias has been used before. */
11785 h
= (struct alias
*) str_hash_find (ahash
, alias
);
11788 if (strcmp (h
->name
, name
))
11789 as_bad (_("`%s' is already the alias of %s `%s'"),
11790 alias
, kind
, h
->name
);
11791 notes_free (alias
);
11795 /* Check if name already has an alias. */
11796 a
= (const char *) str_hash_find (nhash
, name
);
11799 if (strcmp (a
, alias
))
11800 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11801 notes_free (alias
);
11805 h
= notes_alloc (sizeof (*h
));
11806 h
->file
= as_where (&h
->line
);
11809 str_hash_insert (ahash
, alias
, h
, 0);
11810 str_hash_insert (nhash
, name
, alias
, 0);
11813 demand_empty_rest_of_line ();
11816 /* It renames the original symbol name to its alias. */
11818 do_alias (void **slot
, void *arg ATTRIBUTE_UNUSED
)
11820 string_tuple_t
*tuple
= *((string_tuple_t
**) slot
);
11821 struct alias
*h
= (struct alias
*) tuple
->value
;
11822 symbolS
*sym
= symbol_find (h
->name
);
11827 /* Uses .alias extensively to alias CRTL functions to same with
11828 decc$ prefix. Sometimes function gets optimized away and a
11829 warning results, which should be suppressed. */
11830 if (!startswith (tuple
->key
, "decc$"))
11832 as_warn_where (h
->file
, h
->line
,
11833 _("symbol `%s' aliased to `%s' is not used"),
11834 h
->name
, tuple
->key
);
11837 S_SET_NAME (sym
, (char *) tuple
->key
);
11842 /* Called from write_object_file. */
11844 ia64_adjust_symtab (void)
11846 htab_traverse_noresize (alias_hash
, do_alias
, NULL
);
11849 /* It renames the original section name to its alias. */
11851 do_secalias (void **slot
, void *arg ATTRIBUTE_UNUSED
)
11853 string_tuple_t
*tuple
= *((string_tuple_t
**) slot
);
11854 struct alias
*h
= (struct alias
*) tuple
->value
;
11855 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11858 as_warn_where (h
->file
, h
->line
,
11859 _("section `%s' aliased to `%s' is not used"),
11860 h
->name
, tuple
->key
);
11862 sec
->name
= tuple
->key
;
11867 /* Called from write_object_file. */
11869 ia64_frob_file (void)
11871 htab_traverse_noresize (secalias_hash
, do_secalias
, NULL
);
11875 #define NT_VMS_MHD 1
11876 #define NT_VMS_LNM 2
11878 /* Integrity VMS 8.x identifies it's ELF modules with a standard ELF
11881 /* Manufacture a VMS-like time string. */
11883 get_vms_time (char *Now
)
11889 pnt
= ctime (&timeb
);
11895 sprintf (Now
, "%2s-%3s-%s %s", pnt
+ 8, pnt
+ 4, pnt
+ 20, pnt
+ 11);
11899 ia64_vms_note (void)
11902 asection
*seg
= now_seg
;
11903 subsegT subseg
= now_subseg
;
11904 asection
*secp
= NULL
;
11909 /* Create the .note section. */
11911 secp
= subseg_new (".note", 0);
11912 bfd_set_section_flags (secp
, SEC_HAS_CONTENTS
| SEC_READONLY
);
11914 /* Module header note (MHD). */
11915 bname
= xstrdup (lbasename (out_file_name
));
11916 if ((p
= strrchr (bname
, '.')))
11919 /* VMS note header is 24 bytes long. */
11920 p
= frag_more (8 + 8 + 8);
11921 number_to_chars_littleendian (p
+ 0, 8, 8);
11922 number_to_chars_littleendian (p
+ 8, 40 + strlen (bname
), 8);
11923 number_to_chars_littleendian (p
+ 16, NT_VMS_MHD
, 8);
11926 strcpy (p
, "IPF/VMS");
11928 p
= frag_more (17 + 17 + strlen (bname
) + 1 + 5);
11930 strcpy (p
+ 17, "24-FEB-2005 15:00");
11933 p
+= strlen (bname
) + 1;
11935 strcpy (p
, "V1.0");
11937 frag_align (3, 0, 0);
11939 /* Language processor name note. */
11940 sprintf (buf
, "GNU assembler version %s (%s) using BFD version %s",
11941 VERSION
, TARGET_ALIAS
, BFD_VERSION_STRING
);
11943 p
= frag_more (8 + 8 + 8);
11944 number_to_chars_littleendian (p
+ 0, 8, 8);
11945 number_to_chars_littleendian (p
+ 8, strlen (buf
) + 1, 8);
11946 number_to_chars_littleendian (p
+ 16, NT_VMS_LNM
, 8);
11949 strcpy (p
, "IPF/VMS");
11951 p
= frag_more (strlen (buf
) + 1);
11954 frag_align (3, 0, 0);
11956 secp
= subseg_new (".vms_display_name_info", 0);
11957 bfd_set_section_flags (secp
, SEC_HAS_CONTENTS
| SEC_READONLY
);
11959 /* This symbol should be passed on the command line and be variable
11960 according to language. */
11961 sym
= symbol_new ("__gnat_vms_display_name@gnat_demangler_rtl",
11962 absolute_section
, &zero_address_frag
, 0);
11963 symbol_table_insert (sym
);
11964 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
| BSF_DYNAMIC
;
11967 /* Format 3 of VMS demangler Spec. */
11968 number_to_chars_littleendian (p
, 3, 4);
11971 /* Place holder for symbol table index of above symbol. */
11972 number_to_chars_littleendian (p
, -1, 4);
11974 frag_align (3, 0, 0);
11976 /* We probably can't restore the current segment, for there likely
11977 isn't one yet... */
11979 subseg_set (seg
, subseg
);
11982 #endif /* TE_VMS */