1 /* tc-m32r.c -- Assembler for the Mitsubishi M32R.
2 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
26 #include "opcodes/m32r-desc.h"
27 #include "opcodes/m32r-opc.h"
30 /* Linked list of symbols that are debugging symbols to be defined as the
31 beginning of the current instruction. */
32 typedef struct sym_link
34 struct sym_link
*next
;
38 static sym_linkS
*debug_sym_link
= (sym_linkS
*)0;
40 /* Structure to hold all of the different components describing
41 an individual instruction. */
44 const CGEN_INSN
* insn
;
45 const CGEN_INSN
* orig_insn
;
48 CGEN_INSN_INT buffer
[1];
49 #define INSN_VALUE(buf) (*(buf))
51 unsigned char buffer
[CGEN_MAX_INSN_SIZE
];
52 #define INSN_VALUE(buf) (buf)
57 fixS
* fixups
[GAS_CGEN_MAX_FIXUPS
];
58 int indices
[MAX_OPERAND_INSTANCES
];
59 sym_linkS
*debug_sym_link
;
63 /* prev_insn.insn is non-null if last insn was a 16 bit insn on a 32 bit
64 boundary (i.e. was the first of two 16 bit insns). */
65 static m32r_insn prev_insn
;
67 /* Non-zero if we've seen a relaxable insn since the last 32 bit
69 static int seen_relaxable_p
= 0;
71 /* Non-zero if -relax specified, in which case sufficient relocs are output
72 for the linker to do relaxing.
73 We do simple forms of relaxing internally, but they are always done.
74 This flag does not apply to them. */
75 static int m32r_relax
;
77 #if 0 /* not supported yet */
78 /* If non-NULL, pointer to cpu description file to read.
79 This allows runtime additions to the assembler. */
80 static const char * m32r_cpu_desc
;
83 /* Non-zero if warn when a high/shigh reloc has no matching low reloc.
84 Each high/shigh reloc must be paired with it's low cousin in order to
85 properly calculate the addend in a relocatable link (since there is a
86 potential carry from the low to the high/shigh).
87 This option is off by default though for user-written assembler code it
88 might make sense to make the default be on (i.e. have gcc pass a flag
89 to turn it off). This warning must not be on for GCC created code as
90 optimization may delete the low but not the high/shigh (at least we
91 shouldn't assume or require it to). */
92 static int warn_unmatched_high
= 0;
95 /* stuff for .scomm symbols. */
96 static segT sbss_section
;
97 static asection scom_section
;
98 static asymbol scom_symbol
;
100 const char comment_chars
[] = ";";
101 const char line_comment_chars
[] = "#";
102 const char line_separator_chars
[] = "";
103 const char EXP_CHARS
[] = "eE";
104 const char FLT_CHARS
[] = "dD";
106 /* Relocations against symbols are done in two
107 parts, with a HI relocation and a LO relocation. Each relocation
108 has only 16 bits of space to store an addend. This means that in
109 order for the linker to handle carries correctly, it must be able
110 to locate both the HI and the LO relocation. This means that the
111 relocations must appear in order in the relocation table.
113 In order to implement this, we keep track of each unmatched HI
114 relocation. We then sort them so that they immediately precede the
115 corresponding LO relocation. */
119 struct m32r_hi_fixup
* next
; /* Next HI fixup. */
120 fixS
* fixp
; /* This fixup. */
121 segT seg
; /* The section this fixup is in. */
125 /* The list of unmatched HI relocs. */
127 static struct m32r_hi_fixup
* m32r_hi_fixup_list
;
131 #define M32R_SHORTOPTS ""
132 const char * md_shortopts
= M32R_SHORTOPTS
;
134 struct option md_longopts
[] =
137 /* Sigh. I guess all warnings must now have both variants. */
138 #define OPTION_WARN_UNMATCHED (OPTION_MD_BASE + 4)
139 {"warn-unmatched-high", no_argument
, NULL
, OPTION_WARN_UNMATCHED
},
140 {"Wuh", no_argument
, NULL
, OPTION_WARN_UNMATCHED
},
141 #define OPTION_NO_WARN_UNMATCHED (OPTION_MD_BASE + 5)
142 {"no-warn-unmatched-high", no_argument
, NULL
, OPTION_WARN_UNMATCHED
},
143 {"Wnuh", no_argument
, NULL
, OPTION_WARN_UNMATCHED
},
145 #if 0 /* not supported yet */
146 #define OPTION_RELAX (OPTION_MD_BASE + 6)
147 {"relax", no_argument
, NULL
, OPTION_RELAX
},
148 #define OPTION_CPU_DESC (OPTION_MD_BASE + 7)
149 {"cpu-desc", required_argument
, NULL
, OPTION_CPU_DESC
},
152 {NULL
, no_argument
, NULL
, 0}
154 size_t md_longopts_size
= sizeof (md_longopts
);
157 md_parse_option (c
, arg
)
164 case OPTION_WARN_UNMATCHED
:
165 warn_unmatched_high
= 1;
168 case OPTION_NO_WARN_UNMATCHED
:
169 warn_unmatched_high
= 0;
172 #if 0 /* not supported yet */
176 case OPTION_CPU_DESC
:
183 fprintf (stderr
, _("%s: unrecognised command line option: -%c\n"), myname
, c
);
185 fprintf (stderr
, _("%s: unrecognised command line option: -%c%s\n"), myname
, c
, arg
);
192 md_show_usage (stream
)
195 fprintf (stream
, _(" M32R specific command line options:\n"));
198 fprintf (stream
, _("\
199 -warn-unmatched-high warn when an (s)high reloc has no matching low reloc\n"));
200 fprintf (stream
, _("\
201 -no-warn-unmatched-high do not warn about missing low relocs\n"));
202 fprintf (stream
, _("\
203 -Wuh synonym for -warn-unmatched-high\n"));
204 fprintf (stream
, _("\
205 -Wnuh synonym for -no-warn-unmatched-high\n"));
208 fprintf (stream
, _("\
209 -relax create linker relaxable code\n"));
210 fprintf (stream
, _("\
211 -cpu-desc provide runtime cpu description file\n"));
215 static void fill_insn
PARAMS ((int));
216 static void m32r_scomm
PARAMS ((int));
217 static void debug_sym
PARAMS ((int));
218 static void expand_debug_syms
PARAMS ((sym_linkS
*, int));
220 /* Set by md_assemble for use by m32r_fill_insn. */
221 static subsegT prev_subseg
;
222 static segT prev_seg
;
224 /* The target specific pseudo-ops which we support. */
225 const pseudo_typeS md_pseudo_table
[] =
228 { "fillinsn", fill_insn
, 0 },
229 { "scomm", m32r_scomm
, 0 },
230 { "debugsym", debug_sym
, 0 },
234 /* FIXME: Should be machine generated. */
235 #define NOP_INSN 0x7000
236 #define PAR_NOP_INSN 0xf000 /* can only be used in 2nd slot */
238 /* When we align the .text section, insert the correct NOP pattern.
239 N is the power of 2 alignment. LEN is the length of pattern FILL.
240 MAX is the maximum number of characters to skip when doing the alignment,
241 or 0 if there is no maximum. */
244 m32r_do_align (n
, fill
, len
, max
)
250 /* Only do this if the fill pattern wasn't specified. */
252 && subseg_text_p (now_seg
)
253 /* Only do this special handling if aligning to at least a
256 /* Only do this special handling if we're allowed to emit at
258 && (max
== 0 || max
> 1))
260 static const unsigned char nop_pattern
[] = { 0xf0, 0x00 };
263 /* First align to a 2 byte boundary, in case there is an odd .byte. */
264 /* FIXME: How much memory will cause gas to use when assembling a big
265 program? Perhaps we can avoid the frag_align call? */
266 frag_align (1, 0, 0);
268 /* Next align to a 4 byte boundary (we know n >= 2) using a parallel
270 frag_align_pattern (2, nop_pattern
, sizeof nop_pattern
, 0);
271 /* If doing larger alignments use a repeating sequence of appropriate
275 static const unsigned char multi_nop_pattern
[] =
276 { 0x70, 0x00, 0xf0, 0x00 };
277 frag_align_pattern (n
, multi_nop_pattern
, sizeof multi_nop_pattern
,
281 prev_insn
.insn
= NULL
;
288 /* If the last instruction was the first of 2 16 bit insns,
289 output a nop to move the PC to a 32 bit boundary.
291 This is done via an alignment specification since branch relaxing
292 may make it unnecessary.
294 Internally, we need to output one of these each time a 32 bit insn is
295 seen after an insn that is relaxable. */
301 (void) m32r_do_align (2, NULL
, 0, 0);
302 prev_insn
.insn
= NULL
;
303 seen_relaxable_p
= 0;
306 /* Record the symbol so that when we output the insn, we can create
307 a symbol that is at the start of the instruction. This is used
308 to emit the label for the start of a breakpoint without causing
309 the assembler to emit a NOP if the previous instruction was a
310 16 bit instruction. */
318 register char *end_name
;
319 register symbolS
*symbolP
;
320 register sym_linkS
*link
;
322 name
= input_line_pointer
;
323 delim
= get_symbol_end ();
324 end_name
= input_line_pointer
;
326 if ((symbolP
= symbol_find (name
)) == NULL
327 && (symbolP
= md_undefined_symbol (name
)) == NULL
)
329 symbolP
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
332 symbol_table_insert (symbolP
);
333 if (S_IS_DEFINED (symbolP
) && S_GET_SEGMENT (symbolP
) != reg_section
)
334 /* xgettext:c-format */
335 as_bad (_("symbol `%s' already defined"), S_GET_NAME (symbolP
));
339 link
= (sym_linkS
*) xmalloc (sizeof (sym_linkS
));
340 link
->symbol
= symbolP
;
341 link
->next
= debug_sym_link
;
342 debug_sym_link
= link
;
343 symbol_get_obj (symbolP
)->local
= 1;
347 demand_empty_rest_of_line ();
350 /* Second pass to expanding the debug symbols, go through linked
351 list of symbols and reassign the address. */
354 expand_debug_syms (syms
, align
)
358 char *save_input_line
= input_line_pointer
;
359 sym_linkS
*next_syms
;
364 (void) m32r_do_align (align
, NULL
, 0, 0);
365 for (; syms
!= (sym_linkS
*)0; syms
= next_syms
)
367 symbolS
*symbolP
= syms
->symbol
;
368 next_syms
= syms
->next
;
369 input_line_pointer
= ".\n";
370 pseudo_set (symbolP
);
374 input_line_pointer
= save_input_line
;
377 /* Cover function to fill_insn called after a label and at end of assembly.
378 The result is always 1: we're called in a conditional to see if the
379 current line is a label. */
382 m32r_fill_insn (done
)
385 if (prev_seg
!= NULL
)
388 subsegT subseg
= now_subseg
;
390 subseg_set (prev_seg
, prev_subseg
);
394 subseg_set (seg
, subseg
);
397 if (done
&& debug_sym_link
)
399 expand_debug_syms (debug_sym_link
, 1);
400 debug_sym_link
= (sym_linkS
*)0;
413 /* Initialize the `cgen' interface. */
415 /* Set the machine number and endian. */
416 gas_cgen_cpu_desc
= m32r_cgen_cpu_open (CGEN_CPU_OPEN_MACHS
, 0,
417 CGEN_CPU_OPEN_ENDIAN
,
420 m32r_cgen_init_asm (gas_cgen_cpu_desc
);
422 /* The operand instance table is used during optimization to determine
423 which insns can be executed in parallel. It is also used to give
424 warnings regarding operand interference in parallel insns. */
425 m32r_cgen_init_opinst_table (gas_cgen_cpu_desc
);
427 /* This is a callback from cgen to gas to parse operands. */
428 cgen_set_parse_operand_fn (gas_cgen_cpu_desc
, gas_cgen_parse_operand
);
430 #if 0 /* not supported yet */
431 /* If a runtime cpu description file was provided, parse it. */
432 if (m32r_cpu_desc
!= NULL
)
436 errmsg
= cgen_read_cpu_file (gas_cgen_cpu_desc
, m32r_cpu_desc
);
438 as_bad ("%s: %s", m32r_cpu_desc
, errmsg
);
442 /* Save the current subseg so we can restore it [it's the default one and
443 we don't want the initial section to be .sbss]. */
447 /* The sbss section is for local .scomm symbols. */
448 sbss_section
= subseg_new (".sbss", 0);
450 /* This is copied from perform_an_assembly_pass. */
451 applicable
= bfd_applicable_section_flags (stdoutput
);
452 bfd_set_section_flags (stdoutput
, sbss_section
, applicable
& SEC_ALLOC
);
454 #if 0 /* What does this do? [see perform_an_assembly_pass] */
455 seg_info (bss_section
)->bss
= 1;
458 subseg_set (seg
, subseg
);
460 /* We must construct a fake section similar to bfd_com_section
461 but with the name .scommon. */
462 scom_section
= bfd_com_section
;
463 scom_section
.name
= ".scommon";
464 scom_section
.output_section
= & scom_section
;
465 scom_section
.symbol
= & scom_symbol
;
466 scom_section
.symbol_ptr_ptr
= & scom_section
.symbol
;
467 scom_symbol
= * bfd_com_section
.symbol
;
468 scom_symbol
.name
= ".scommon";
469 scom_symbol
.section
= & scom_section
;
483 /* Initialize GAS's cgen interface for a new instruction. */
484 gas_cgen_init_parse ();
487 insn
.debug_sym_link
= debug_sym_link
;
488 debug_sym_link
= (sym_linkS
*)0;
490 insn
.insn
= m32r_cgen_assemble_insn
491 (gas_cgen_cpu_desc
, str
, & insn
.fields
, insn
.buffer
, & errmsg
);
500 if (CGEN_INSN_BITSIZE (insn
.insn
) == 32)
502 /* 32 bit insns must live on 32 bit boundaries. */
503 if (prev_insn
.insn
|| seen_relaxable_p
)
505 /* ??? If calling fill_insn too many times turns us into a memory
506 pig, can we call a fn to assemble a nop instead of
507 !seen_relaxable_p? */
511 expand_debug_syms (insn
.debug_sym_link
, 2);
513 /* Doesn't really matter what we pass for RELAX_P here. */
514 gas_cgen_finish_insn (insn
.insn
, insn
.buffer
,
515 CGEN_FIELDS_BITSIZE (& insn
.fields
), 1, NULL
);
519 int on_32bit_boundary_p
;
521 if (CGEN_INSN_BITSIZE (insn
.insn
) != 16)
524 insn
.orig_insn
= insn
.insn
;
526 /* Compute whether we're on a 32 bit boundary or not.
527 prev_insn.insn is NULL when we're on a 32 bit boundary. */
528 on_32bit_boundary_p
= prev_insn
.insn
== NULL
;
531 expand_debug_syms (insn
.debug_sym_link
, 1);
537 /* Ensure each pair of 16 bit insns is in the same frag. */
540 gas_cgen_finish_insn (insn
.orig_insn
, insn
.buffer
,
541 CGEN_FIELDS_BITSIZE (& insn
.fields
),
545 insn
.num_fixups
= fi
.num_fixups
;
546 for (i
= 0; i
< fi
.num_fixups
; ++i
)
547 insn
.fixups
[i
] = fi
.fixups
[i
];
551 /* Keep track of whether we've seen a pair of 16 bit insns.
552 prev_insn.insn is NULL when we're on a 32 bit boundary. */
553 if (on_32bit_boundary_p
)
556 prev_insn
.insn
= NULL
;
558 /* If the insn needs the following one to be on a 32 bit boundary
559 (e.g. subroutine calls), fill this insn's slot. */
560 if (on_32bit_boundary_p
561 && CGEN_INSN_ATTR_VALUE (insn
.orig_insn
, CGEN_INSN_FILL_SLOT
) != 0)
564 /* If this is a relaxable insn (can be replaced with a larger version)
565 mark the fact so that we can emit an alignment directive for a
566 following 32 bit insn if we see one. */
567 if (CGEN_INSN_ATTR_VALUE (insn
.orig_insn
, CGEN_INSN_RELAXABLE
) != 0)
568 seen_relaxable_p
= 1;
571 /* Set these so m32r_fill_insn can use them. */
573 prev_subseg
= now_subseg
;
576 /* The syntax in the manual says constants begin with '#'.
577 We just ignore it. */
580 md_operand (expressionP
)
581 expressionS
* expressionP
;
583 if (* input_line_pointer
== '#')
585 input_line_pointer
++;
586 expression (expressionP
);
591 md_section_align (segment
, size
)
595 int align
= bfd_get_section_alignment (stdoutput
, segment
);
596 return ((size
+ (1 << align
) - 1) & (-1 << align
));
600 md_undefined_symbol (name
)
606 /* .scomm pseudo-op handler.
608 This is a new pseudo-op to handle putting objects in .scommon.
609 By doing this the linker won't need to do any work and more importantly
610 it removes the implicit -G arg necessary to correctly link the object file.
617 register char * name
;
621 register symbolS
* symbolP
;
625 name
= input_line_pointer
;
626 c
= get_symbol_end ();
628 /* just after name is now '\0' */
629 p
= input_line_pointer
;
632 if (* input_line_pointer
!= ',')
634 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
635 ignore_rest_of_line ();
639 input_line_pointer
++; /* skip ',' */
640 if ((size
= get_absolute_expression ()) < 0)
642 /* xgettext:c-format */
643 as_warn (_(".SCOMMon length (%ld.) <0! Ignored."), (long) size
);
644 ignore_rest_of_line ();
648 /* The third argument to .scomm is the alignment. */
649 if (* input_line_pointer
!= ',')
653 ++ input_line_pointer
;
654 align
= get_absolute_expression ();
657 as_warn (_("ignoring bad alignment"));
661 /* Convert to a power of 2 alignment. */
664 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++ align2
)
668 as_bad (_("Common alignment not a power of 2"));
669 ignore_rest_of_line ();
677 symbolP
= symbol_find_or_make (name
);
680 if (S_IS_DEFINED (symbolP
))
682 /* xgettext:c-format */
683 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
684 S_GET_NAME (symbolP
));
685 ignore_rest_of_line ();
689 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
691 /* xgettext:c-format */
692 as_bad (_("Length of .scomm \"%s\" is already %ld. Not changed to %ld."),
693 S_GET_NAME (symbolP
),
694 (long) S_GET_VALUE (symbolP
),
697 ignore_rest_of_line ();
701 if (symbol_get_obj (symbolP
)->local
)
703 segT old_sec
= now_seg
;
704 int old_subsec
= now_subseg
;
707 record_alignment (sbss_section
, align2
);
708 subseg_set (sbss_section
, 0);
711 frag_align (align2
, 0, 0);
713 if (S_GET_SEGMENT (symbolP
) == sbss_section
)
714 symbol_get_frag (symbolP
)->fr_symbol
= 0;
716 symbol_set_frag (symbolP
, frag_now
);
718 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
721 S_SET_SIZE (symbolP
, size
);
722 S_SET_SEGMENT (symbolP
, sbss_section
);
723 S_CLEAR_EXTERNAL (symbolP
);
724 subseg_set (old_sec
, old_subsec
);
728 S_SET_VALUE (symbolP
, (valueT
) size
);
729 S_SET_ALIGN (symbolP
, align2
);
730 S_SET_EXTERNAL (symbolP
);
731 S_SET_SEGMENT (symbolP
, & scom_section
);
734 demand_empty_rest_of_line ();
737 /* Interface to relax_segment. */
739 /* FIXME: Build table by hand, get it working, then machine generate. */
741 const relax_typeS md_relax_table
[] =
744 1) most positive reach of this state,
745 2) most negative reach of this state,
746 3) how many bytes this mode will add to the size of the current frag
747 4) which index into the table to try if we can't fit into this one. */
749 /* The first entry must be unused because an `rlx_more' value of zero ends
753 /* The displacement used by GAS is from the end of the 2 byte insn,
754 so we subtract 2 from the following. */
755 /* 16 bit insn, 8 bit disp -> 10 bit range.
756 This doesn't handle a branch in the right slot at the border:
757 the "& -4" isn't taken into account. It's not important enough to
758 complicate things over it, so we subtract an extra 2 (or + 2 in -ve
760 {511 - 2 - 2, -512 - 2 + 2, 0, 2 },
761 /* 32 bit insn, 24 bit disp -> 26 bit range. */
762 {0x2000000 - 1 - 2, -0x2000000 - 2, 2, 0 },
763 /* Same thing, but with leading nop for alignment. */
764 {0x2000000 - 1 - 2, -0x2000000 - 2, 4, 0 }
768 m32r_relax_frag (fragP
, stretch
)
772 /* Address of branch insn. */
773 long address
= fragP
->fr_address
+ fragP
->fr_fix
- 2;
776 /* Keep 32 bit insns aligned on 32 bit boundaries. */
777 if (fragP
->fr_subtype
== 2)
779 if ((address
& 3) != 0)
781 fragP
->fr_subtype
= 3;
785 else if (fragP
->fr_subtype
== 3)
787 if ((address
& 3) == 0)
789 fragP
->fr_subtype
= 2;
795 growth
= relax_frag (fragP
, stretch
);
797 /* Long jump on odd halfword boundary? */
798 if (fragP
->fr_subtype
== 2 && (address
& 3) != 0)
800 fragP
->fr_subtype
= 3;
808 /* Return an initial guess of the length by which a fragment must grow to
809 hold a branch to reach its destination.
810 Also updates fr_type/fr_subtype as necessary.
812 Called just before doing relaxation.
813 Any symbol that is now undefined will not become defined.
814 The guess for fr_var is ACTUALLY the growth beyond fr_fix.
815 Whatever we do to grow fr_fix or fr_var contributes to our returned value.
816 Although it may not be explicit in the frag, pretend fr_var starts with a
820 md_estimate_size_before_relax (fragP
, segment
)
824 int old_fr_fix
= fragP
->fr_fix
;
826 /* The only thing we have to handle here are symbols outside of the
827 current segment. They may be undefined or in a different segment in
828 which case linker scripts may place them anywhere.
829 However, we can't finish the fragment here and emit the reloc as insn
830 alignment requirements may move the insn about. */
832 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
834 /* The symbol is undefined in this segment.
835 Change the relaxation subtype to the max allowable and leave
836 all further handling to md_convert_frag. */
837 fragP
->fr_subtype
= 2;
839 #if 0 /* Can't use this, but leave in for illustration. */
840 /* Change 16 bit insn to 32 bit insn. */
841 fragP
->fr_opcode
[0] |= 0x80;
843 /* Increase known (fixed) size of fragment. */
846 /* Create a relocation for it. */
847 fix_new (fragP
, old_fr_fix
, 4,
849 fragP
->fr_offset
, 1 /* pcrel */,
850 /* FIXME: Can't use a real BFD reloc here.
851 gas_cgen_md_apply_fix3 can't handle it. */
852 BFD_RELOC_M32R_26_PCREL
);
854 /* Mark this fragment as finished. */
858 const CGEN_INSN
* insn
;
861 /* Update the recorded insn.
862 Fortunately we don't have to look very far.
863 FIXME: Change this to record in the instruction the next higher
864 relaxable insn to use. */
865 for (i
= 0, insn
= fragP
->fr_cgen
.insn
; i
< 4; i
++, insn
++)
867 if ((strcmp (CGEN_INSN_MNEMONIC (insn
),
868 CGEN_INSN_MNEMONIC (fragP
->fr_cgen
.insn
))
870 && CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_RELAX
))
876 fragP
->fr_cgen
.insn
= insn
;
882 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
885 /* *fragP has been relaxed to its final size, and now needs to have
886 the bytes inside it modified to conform to the new size.
888 Called after relaxation is finished.
889 fragP->fr_type == rs_machine_dependent.
890 fragP->fr_subtype is the subtype of what the address relaxed to. */
893 md_convert_frag (abfd
, sec
, fragP
)
905 opcode
= fragP
->fr_opcode
;
907 /* Address opcode resides at in file space. */
908 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
- 2;
910 switch (fragP
->fr_subtype
)
914 displacement
= & opcode
[1];
919 displacement
= & opcode
[1];
922 opcode
[2] = opcode
[0] | 0x80;
923 md_number_to_chars (opcode
, PAR_NOP_INSN
, 2);
926 displacement
= & opcode
[3];
932 if (S_GET_SEGMENT (fragP
->fr_symbol
) != sec
)
934 /* symbol must be resolved by linker */
935 if (fragP
->fr_offset
& 3)
936 as_warn (_("Addend to unresolved symbol not on word boundary."));
937 addend
= fragP
->fr_offset
>> 2;
941 /* Address we want to reach in file space. */
942 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
943 target_address
+= symbol_get_frag (fragP
->fr_symbol
)->fr_address
;
944 addend
= (target_address
- (opcode_address
& -4)) >> 2;
947 /* Create a relocation for symbols that must be resolved by the linker.
948 Otherwise output the completed insn. */
950 if (S_GET_SEGMENT (fragP
->fr_symbol
) != sec
)
952 assert (fragP
->fr_subtype
!= 1);
953 assert (fragP
->fr_cgen
.insn
!= 0);
954 gas_cgen_record_fixup (fragP
,
955 /* Offset of branch insn in frag. */
956 fragP
->fr_fix
+ extension
- 4,
959 /* FIXME: quick hack */
961 cgen_operand_lookup_by_num (gas_cgen_cpu_desc
,
962 fragP
->fr_cgen
.opindex
),
964 cgen_operand_lookup_by_num (gas_cgen_cpu_desc
,
965 M32R_OPERAND_DISP24
),
967 fragP
->fr_cgen
.opinfo
,
968 fragP
->fr_symbol
, fragP
->fr_offset
);
971 #define SIZE_FROM_RELAX_STATE(n) ((n) == 1 ? 1 : 3)
973 md_number_to_chars (displacement
, (valueT
) addend
,
974 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
976 fragP
->fr_fix
+= extension
;
979 /* Functions concerning relocs. */
981 /* The location from which a PC relative jump should be calculated,
982 given a PC relative reloc. */
985 md_pcrel_from_section (fixP
, sec
)
989 if (fixP
->fx_addsy
!= (symbolS
*) NULL
990 && (! S_IS_DEFINED (fixP
->fx_addsy
)
991 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
993 /* The symbol is undefined (or is defined but not in this section).
994 Let the linker figure it out. */
998 return (fixP
->fx_frag
->fr_address
+ fixP
->fx_where
) & -4L;
1001 /* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
1002 Returns BFD_RELOC_NONE if no reloc type can be found.
1003 *FIXP may be modified if desired. */
1005 bfd_reloc_code_real_type
1006 md_cgen_lookup_reloc (insn
, operand
, fixP
)
1007 const CGEN_INSN
* insn
;
1008 const CGEN_OPERAND
* operand
;
1011 switch (operand
->type
)
1013 case M32R_OPERAND_DISP8
: return BFD_RELOC_M32R_10_PCREL
;
1014 case M32R_OPERAND_DISP16
: return BFD_RELOC_M32R_18_PCREL
;
1015 case M32R_OPERAND_DISP24
: return BFD_RELOC_M32R_26_PCREL
;
1016 case M32R_OPERAND_UIMM24
: return BFD_RELOC_M32R_24
;
1017 case M32R_OPERAND_HI16
:
1018 case M32R_OPERAND_SLO16
:
1019 case M32R_OPERAND_ULO16
:
1020 /* If low/high/shigh/sda was used, it is recorded in `opinfo'. */
1021 if (fixP
->fx_cgen
.opinfo
!= 0)
1022 return fixP
->fx_cgen
.opinfo
;
1024 default : /* avoid -Wall warning */
1027 return BFD_RELOC_NONE
;
1030 /* Record a HI16 reloc for later matching with its LO16 cousin. */
1033 m32r_record_hi16 (reloc_type
, fixP
, seg
)
1038 struct m32r_hi_fixup
* hi_fixup
;
1040 assert (reloc_type
== BFD_RELOC_M32R_HI16_SLO
1041 || reloc_type
== BFD_RELOC_M32R_HI16_ULO
);
1043 hi_fixup
= ((struct m32r_hi_fixup
*)
1044 xmalloc (sizeof (struct m32r_hi_fixup
)));
1045 hi_fixup
->fixp
= fixP
;
1046 hi_fixup
->seg
= now_seg
;
1047 hi_fixup
->next
= m32r_hi_fixup_list
;
1049 m32r_hi_fixup_list
= hi_fixup
;
1052 /* Called while parsing an instruction to create a fixup.
1053 We need to check for HI16 relocs and queue them up for later sorting. */
1056 m32r_cgen_record_fixup_exp (frag
, where
, insn
, length
, operand
, opinfo
, exp
)
1059 const CGEN_INSN
* insn
;
1061 const CGEN_OPERAND
* operand
;
1065 fixS
* fixP
= gas_cgen_record_fixup_exp (frag
, where
, insn
, length
,
1066 operand
, opinfo
, exp
);
1068 switch (operand
->type
)
1070 case M32R_OPERAND_HI16
:
1071 /* If low/high/shigh/sda was used, it is recorded in `opinfo'. */
1072 if (fixP
->fx_cgen
.opinfo
== BFD_RELOC_M32R_HI16_SLO
1073 || fixP
->fx_cgen
.opinfo
== BFD_RELOC_M32R_HI16_ULO
)
1074 m32r_record_hi16 (fixP
->fx_cgen
.opinfo
, fixP
, now_seg
);
1076 default : /* avoid -Wall warning */
1083 /* Return BFD reloc type from opinfo field in a fixS.
1084 It's tricky using fx_r_type in m32r_frob_file because the values
1085 are BFD_RELOC_UNUSED + operand number. */
1086 #define FX_OPINFO_R_TYPE(f) ((f)->fx_cgen.opinfo)
1088 /* Sort any unmatched HI16 relocs so that they immediately precede
1089 the corresponding LO16 reloc. This is called before md_apply_fix and
1095 struct m32r_hi_fixup
* l
;
1097 for (l
= m32r_hi_fixup_list
; l
!= NULL
; l
= l
->next
)
1099 segment_info_type
* seginfo
;
1102 assert (FX_OPINFO_R_TYPE (l
->fixp
) == BFD_RELOC_M32R_HI16_SLO
1103 || FX_OPINFO_R_TYPE (l
->fixp
) == BFD_RELOC_M32R_HI16_ULO
);
1105 /* Check quickly whether the next fixup happens to be a matching low. */
1106 if (l
->fixp
->fx_next
!= NULL
1107 && FX_OPINFO_R_TYPE (l
->fixp
->fx_next
) == BFD_RELOC_M32R_LO16
1108 && l
->fixp
->fx_addsy
== l
->fixp
->fx_next
->fx_addsy
1109 && l
->fixp
->fx_offset
== l
->fixp
->fx_next
->fx_offset
)
1112 /* Look through the fixups for this segment for a matching `low'.
1113 When we find one, move the high/shigh just in front of it. We do
1114 this in two passes. In the first pass, we try to find a
1115 unique `low'. In the second pass, we permit multiple high's
1116 relocs for a single `low'. */
1117 seginfo
= seg_info (l
->seg
);
1118 for (pass
= 0; pass
< 2; pass
++)
1124 for (f
= seginfo
->fix_root
; f
!= NULL
; f
= f
->fx_next
)
1126 /* Check whether this is a `low' fixup which matches l->fixp. */
1127 if (FX_OPINFO_R_TYPE (f
) == BFD_RELOC_M32R_LO16
1128 && f
->fx_addsy
== l
->fixp
->fx_addsy
1129 && f
->fx_offset
== l
->fixp
->fx_offset
1132 || (FX_OPINFO_R_TYPE (prev
) != BFD_RELOC_M32R_HI16_SLO
1133 && FX_OPINFO_R_TYPE (prev
) != BFD_RELOC_M32R_HI16_ULO
)
1134 || prev
->fx_addsy
!= f
->fx_addsy
1135 || prev
->fx_offset
!= f
->fx_offset
))
1139 /* Move l->fixp before f. */
1140 for (pf
= &seginfo
->fix_root
;
1142 pf
= & (* pf
)->fx_next
)
1143 assert (* pf
!= NULL
);
1145 * pf
= l
->fixp
->fx_next
;
1147 l
->fixp
->fx_next
= f
;
1149 seginfo
->fix_root
= l
->fixp
;
1151 prev
->fx_next
= l
->fixp
;
1163 && warn_unmatched_high
)
1164 as_warn_where (l
->fixp
->fx_file
, l
->fixp
->fx_line
,
1165 _("Unmatched high/shigh reloc"));
1170 /* See whether we need to force a relocation into the output file.
1171 This is used to force out switch and PC relative relocations when
1175 m32r_force_relocation (fix
)
1178 if (fix
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
1179 || fix
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
1185 return (fix
->fx_pcrel
1189 /* Write a value out to the object file, using the appropriate endianness. */
1192 md_number_to_chars (buf
, val
, n
)
1197 if (target_big_endian
)
1198 number_to_chars_bigendian (buf
, val
, n
);
1200 number_to_chars_littleendian (buf
, val
, n
);
1203 /* Turn a string in input_line_pointer into a floating point constant of type
1204 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
1205 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
1208 /* Equal to MAX_PRECISION in atof-ieee.c */
1209 #define MAX_LITTLENUMS 6
1212 md_atof (type
, litP
, sizeP
)
1219 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
1221 char * atof_ieee ();
1239 /* FIXME: Some targets allow other format chars for bigger sizes here. */
1243 return _("Bad call to md_atof()");
1246 t
= atof_ieee (input_line_pointer
, type
, words
);
1248 input_line_pointer
= t
;
1249 * sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
1251 if (target_big_endian
)
1253 for (i
= 0; i
< prec
; i
++)
1255 md_number_to_chars (litP
, (valueT
) words
[i
],
1256 sizeof (LITTLENUM_TYPE
));
1257 litP
+= sizeof (LITTLENUM_TYPE
);
1262 for (i
= prec
- 1; i
>= 0; i
--)
1264 md_number_to_chars (litP
, (valueT
) words
[i
],
1265 sizeof (LITTLENUM_TYPE
));
1266 litP
+= sizeof (LITTLENUM_TYPE
);
1274 m32r_elf_section_change_hook ()
1276 /* If we have reached the end of a section and we have just emitted a
1277 16 bit insn, then emit a nop to make sure that the section ends on
1278 a 32 bit boundary. */
1280 if (prev_insn
.insn
|| seen_relaxable_p
)
1281 (void) m32r_fill_insn (0);
1285 m32r_fix_adjustable (fixP
)
1289 if (fixP
->fx_addsy
== NULL
)
1292 /* Prevent all adjustments to global symbols. */
1293 if (S_IS_EXTERN (fixP
->fx_addsy
))
1295 if (S_IS_WEAK (fixP
->fx_addsy
))
1298 /* We need the symbol name for the VTABLE entries */
1299 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
1300 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)