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1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
3 2006, 2007 Free Software Foundation, Inc.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
21
22 #include "as.h"
23 #include "safe-ctype.h"
24 #include "subsegs.h"
25 #include "opcode/mn10300.h"
26 #include "dwarf2dbg.h"
27 #include "libiberty.h"
28 \f
29 /* Structure to hold information about predefined registers. */
30 struct reg_name
31 {
32 const char *name;
33 int value;
34 };
35
36 /* Generic assembler global variables which must be defined by all
37 targets. */
38
39 /* Characters which always start a comment. */
40 const char comment_chars[] = "#";
41
42 /* Characters which start a comment at the beginning of a line. */
43 const char line_comment_chars[] = ";#";
44
45 /* Characters which may be used to separate multiple commands on a
46 single line. */
47 const char line_separator_chars[] = ";";
48
49 /* Characters which are used to indicate an exponent in a floating
50 point number. */
51 const char EXP_CHARS[] = "eE";
52
53 /* Characters which mean that a number is a floating point constant,
54 as in 0d1.0. */
55 const char FLT_CHARS[] = "dD";
56 \f
57 const relax_typeS md_relax_table[] =
58 {
59 /* The plus values for the bCC and fBCC instructions in the table below
60 are because the branch instruction is translated into a jump
61 instruction that is now +2 or +3 bytes further on in memory, and the
62 correct size of jump instruction must be selected. */
63 /* bCC relaxing. */
64 {0x7f, -0x80, 2, 1},
65 {0x7fff + 2, -0x8000 + 2, 5, 2},
66 {0x7fffffff, -0x80000000, 7, 0},
67
68 /* bCC relaxing (uncommon cases for 3byte length instructions) */
69 {0x7f, -0x80, 3, 4},
70 {0x7fff + 3, -0x8000 + 3, 6, 5},
71 {0x7fffffff, -0x80000000, 8, 0},
72
73 /* call relaxing. */
74 {0x7fff, -0x8000, 5, 7},
75 {0x7fffffff, -0x80000000, 7, 0},
76
77 /* calls relaxing. */
78 {0x7fff, -0x8000, 4, 9},
79 {0x7fffffff, -0x80000000, 6, 0},
80
81 /* jmp relaxing. */
82 {0x7f, -0x80, 2, 11},
83 {0x7fff, -0x8000, 3, 12},
84 {0x7fffffff, -0x80000000, 5, 0},
85
86 /* fbCC relaxing. */
87 {0x7f, -0x80, 3, 14},
88 {0x7fff + 3, -0x8000 + 3, 6, 15},
89 {0x7fffffff, -0x80000000, 8, 0},
90
91 };
92
93 /* Set linkrelax here to avoid fixups in most sections. */
94 int linkrelax = 1;
95
96 static int current_machine;
97
98 /* Fixups. */
99 #define MAX_INSN_FIXUPS 5
100
101 struct mn10300_fixup
102 {
103 expressionS exp;
104 int opindex;
105 bfd_reloc_code_real_type reloc;
106 };
107 struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
108 static int fc;
109
110 /* We must store the value of each register operand so that we can
111 verify that certain registers do not match. */
112 int mn10300_reg_operands[MN10300_MAX_OPERANDS];
113 \f
114 const char *md_shortopts = "";
115
116 struct option md_longopts[] =
117 {
118 {NULL, no_argument, NULL, 0}
119 };
120
121 size_t md_longopts_size = sizeof (md_longopts);
122
123 #define HAVE_AM33_2 (current_machine == AM33_2)
124 #define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2)
125 #define HAVE_AM30 (current_machine == AM30)
126
127 /* Opcode hash table. */
128 static struct hash_control *mn10300_hash;
129
130 /* This table is sorted. Suitable for searching by a binary search. */
131 static const struct reg_name data_registers[] =
132 {
133 { "d0", 0 },
134 { "d1", 1 },
135 { "d2", 2 },
136 { "d3", 3 },
137 };
138
139 static const struct reg_name address_registers[] =
140 {
141 { "a0", 0 },
142 { "a1", 1 },
143 { "a2", 2 },
144 { "a3", 3 },
145 };
146
147 static const struct reg_name r_registers[] =
148 {
149 { "a0", 8 },
150 { "a1", 9 },
151 { "a2", 10 },
152 { "a3", 11 },
153 { "d0", 12 },
154 { "d1", 13 },
155 { "d2", 14 },
156 { "d3", 15 },
157 { "e0", 0 },
158 { "e1", 1 },
159 { "e10", 10 },
160 { "e11", 11 },
161 { "e12", 12 },
162 { "e13", 13 },
163 { "e14", 14 },
164 { "e15", 15 },
165 { "e2", 2 },
166 { "e3", 3 },
167 { "e4", 4 },
168 { "e5", 5 },
169 { "e6", 6 },
170 { "e7", 7 },
171 { "e8", 8 },
172 { "e9", 9 },
173 { "r0", 0 },
174 { "r1", 1 },
175 { "r10", 10 },
176 { "r11", 11 },
177 { "r12", 12 },
178 { "r13", 13 },
179 { "r14", 14 },
180 { "r15", 15 },
181 { "r2", 2 },
182 { "r3", 3 },
183 { "r4", 4 },
184 { "r5", 5 },
185 { "r6", 6 },
186 { "r7", 7 },
187 { "r8", 8 },
188 { "r9", 9 },
189 };
190
191 static const struct reg_name xr_registers[] =
192 {
193 { "mcrh", 2 },
194 { "mcrl", 3 },
195 { "mcvf", 4 },
196 { "mdrq", 1 },
197 { "sp", 0 },
198 { "xr0", 0 },
199 { "xr1", 1 },
200 { "xr10", 10 },
201 { "xr11", 11 },
202 { "xr12", 12 },
203 { "xr13", 13 },
204 { "xr14", 14 },
205 { "xr15", 15 },
206 { "xr2", 2 },
207 { "xr3", 3 },
208 { "xr4", 4 },
209 { "xr5", 5 },
210 { "xr6", 6 },
211 { "xr7", 7 },
212 { "xr8", 8 },
213 { "xr9", 9 },
214 };
215
216 static const struct reg_name float_registers[] =
217 {
218 { "fs0", 0 },
219 { "fs1", 1 },
220 { "fs10", 10 },
221 { "fs11", 11 },
222 { "fs12", 12 },
223 { "fs13", 13 },
224 { "fs14", 14 },
225 { "fs15", 15 },
226 { "fs16", 16 },
227 { "fs17", 17 },
228 { "fs18", 18 },
229 { "fs19", 19 },
230 { "fs2", 2 },
231 { "fs20", 20 },
232 { "fs21", 21 },
233 { "fs22", 22 },
234 { "fs23", 23 },
235 { "fs24", 24 },
236 { "fs25", 25 },
237 { "fs26", 26 },
238 { "fs27", 27 },
239 { "fs28", 28 },
240 { "fs29", 29 },
241 { "fs3", 3 },
242 { "fs30", 30 },
243 { "fs31", 31 },
244 { "fs4", 4 },
245 { "fs5", 5 },
246 { "fs6", 6 },
247 { "fs7", 7 },
248 { "fs8", 8 },
249 { "fs9", 9 },
250 };
251
252 static const struct reg_name double_registers[] =
253 {
254 { "fd0", 0 },
255 { "fd10", 10 },
256 { "fd12", 12 },
257 { "fd14", 14 },
258 { "fd16", 16 },
259 { "fd18", 18 },
260 { "fd2", 2 },
261 { "fd20", 20 },
262 { "fd22", 22 },
263 { "fd24", 24 },
264 { "fd26", 26 },
265 { "fd28", 28 },
266 { "fd30", 30 },
267 { "fd4", 4 },
268 { "fd6", 6 },
269 { "fd8", 8 },
270 };
271
272 /* We abuse the `value' field, that would be otherwise unused, to
273 encode the architecture on which (access to) the register was
274 introduced. FIXME: we should probably warn when we encounter a
275 register name when assembling for an architecture that doesn't
276 support it, before parsing it as a symbol name. */
277 static const struct reg_name other_registers[] =
278 {
279 { "epsw", AM33 },
280 { "mdr", 0 },
281 { "pc", AM33 },
282 { "psw", 0 },
283 { "sp", 0 },
284 };
285
286 #define OTHER_REG_NAME_CNT ARRAY_SIZE (other_registers)
287
288 /* Perform a binary search of the given register table REGS to see
289 if NAME is a valid regiter name. Returns the register number from
290 the array on success, or -1 on failure. */
291
292 static int
293 reg_name_search (const struct reg_name *regs,
294 int regcount,
295 const char *name)
296 {
297 int low, high;
298
299 low = 0;
300 high = regcount - 1;
301
302 do
303 {
304 int cmp, middle;
305
306 middle = (low + high) / 2;
307 cmp = strcasecmp (name, regs[middle].name);
308 if (cmp < 0)
309 high = middle - 1;
310 else if (cmp > 0)
311 low = middle + 1;
312 else
313 return regs[middle].value;
314 }
315 while (low <= high);
316
317 return -1;
318 }
319
320 /* Looks at the current position in the input line to see if it is
321 the name of a register in TABLE. If it is, then the name is
322 converted into an expression returned in EXPRESSIONP (with X_op
323 set to O_register and X_add_number set to the register number), the
324 input pointer is left pointing at the first non-blank character after
325 the name and the function returns TRUE. Otherwise the input pointer
326 is left alone and the function returns FALSE. */
327
328 static bfd_boolean
329 get_register_name (expressionS * expressionP,
330 const struct reg_name * table,
331 size_t table_length)
332 {
333 int reg_number;
334 char *name;
335 char *start;
336 char c;
337
338 /* Find the spelling of the operand. */
339 start = name = input_line_pointer;
340
341 c = get_symbol_end ();
342 reg_number = reg_name_search (table, table_length, name);
343
344 /* Put back the delimiting char. */
345 *input_line_pointer = c;
346
347 /* Look to see if it's in the register table. */
348 if (reg_number >= 0)
349 {
350 expressionP->X_op = O_register;
351 expressionP->X_add_number = reg_number;
352
353 /* Make the rest nice. */
354 expressionP->X_add_symbol = NULL;
355 expressionP->X_op_symbol = NULL;
356
357 return TRUE;
358 }
359
360 /* Reset the line as if we had not done anything. */
361 input_line_pointer = start;
362 return FALSE;
363 }
364
365 static bfd_boolean
366 r_register_name (expressionS *expressionP)
367 {
368 return get_register_name (expressionP, r_registers, ARRAY_SIZE (r_registers));
369 }
370
371
372 static bfd_boolean
373 xr_register_name (expressionS *expressionP)
374 {
375 return get_register_name (expressionP, xr_registers, ARRAY_SIZE (xr_registers));
376 }
377
378 static bfd_boolean
379 data_register_name (expressionS *expressionP)
380 {
381 return get_register_name (expressionP, data_registers, ARRAY_SIZE (data_registers));
382 }
383
384 static bfd_boolean
385 address_register_name (expressionS *expressionP)
386 {
387 return get_register_name (expressionP, address_registers, ARRAY_SIZE (address_registers));
388 }
389
390 static bfd_boolean
391 float_register_name (expressionS *expressionP)
392 {
393 return get_register_name (expressionP, float_registers, ARRAY_SIZE (float_registers));
394 }
395
396 static bfd_boolean
397 double_register_name (expressionS *expressionP)
398 {
399 return get_register_name (expressionP, double_registers, ARRAY_SIZE (double_registers));
400 }
401
402 static bfd_boolean
403 other_register_name (expressionS *expressionP)
404 {
405 int reg_number;
406 char *name;
407 char *start;
408 char c;
409
410 /* Find the spelling of the operand. */
411 start = name = input_line_pointer;
412
413 c = get_symbol_end ();
414 reg_number = reg_name_search (other_registers, ARRAY_SIZE (other_registers), name);
415
416 /* Put back the delimiting char. */
417 *input_line_pointer = c;
418
419 /* Look to see if it's in the register table. */
420 if (reg_number == 0
421 || (reg_number == AM33 && HAVE_AM33))
422 {
423 expressionP->X_op = O_register;
424 expressionP->X_add_number = 0;
425
426 /* Make the rest nice. */
427 expressionP->X_add_symbol = NULL;
428 expressionP->X_op_symbol = NULL;
429
430 return TRUE;
431 }
432
433 /* Reset the line as if we had not done anything. */
434 input_line_pointer = start;
435 return FALSE;
436 }
437
438 void
439 md_show_usage (FILE *stream)
440 {
441 fprintf (stream, _("MN10300 assembler options:\n\
442 none yet\n"));
443 }
444
445 int
446 md_parse_option (int c ATTRIBUTE_UNUSED, char *arg ATTRIBUTE_UNUSED)
447 {
448 return 0;
449 }
450
451 symbolS *
452 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
453 {
454 return 0;
455 }
456
457 char *
458 md_atof (int type, char *litp, int *sizep)
459 {
460 return ieee_md_atof (type, litp, sizep, FALSE);
461 }
462
463 void
464 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
465 asection *sec,
466 fragS *fragP)
467 {
468 static unsigned long label_count = 0;
469 char buf[40];
470
471 subseg_change (sec, 0);
472 if (fragP->fr_subtype == 0)
473 {
474 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
475 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
476 fragP->fr_var = 0;
477 fragP->fr_fix += 2;
478 }
479 else if (fragP->fr_subtype == 1)
480 {
481 /* Reverse the condition of the first branch. */
482 int offset = fragP->fr_fix;
483 int opcode = fragP->fr_literal[offset] & 0xff;
484
485 switch (opcode)
486 {
487 case 0xc8:
488 opcode = 0xc9;
489 break;
490 case 0xc9:
491 opcode = 0xc8;
492 break;
493 case 0xc0:
494 opcode = 0xc2;
495 break;
496 case 0xc2:
497 opcode = 0xc0;
498 break;
499 case 0xc3:
500 opcode = 0xc1;
501 break;
502 case 0xc1:
503 opcode = 0xc3;
504 break;
505 case 0xc4:
506 opcode = 0xc6;
507 break;
508 case 0xc6:
509 opcode = 0xc4;
510 break;
511 case 0xc7:
512 opcode = 0xc5;
513 break;
514 case 0xc5:
515 opcode = 0xc7;
516 break;
517 default:
518 abort ();
519 }
520 fragP->fr_literal[offset] = opcode;
521
522 /* Create a fixup for the reversed conditional branch. */
523 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
524 fix_new (fragP, fragP->fr_fix + 1, 1,
525 symbol_new (buf, sec, 0, fragP->fr_next),
526 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
527
528 /* Now create the unconditional branch + fixup to the
529 final target. */
530 fragP->fr_literal[offset + 2] = 0xcc;
531 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
532 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
533 fragP->fr_var = 0;
534 fragP->fr_fix += 5;
535 }
536 else if (fragP->fr_subtype == 2)
537 {
538 /* Reverse the condition of the first branch. */
539 int offset = fragP->fr_fix;
540 int opcode = fragP->fr_literal[offset] & 0xff;
541
542 switch (opcode)
543 {
544 case 0xc8:
545 opcode = 0xc9;
546 break;
547 case 0xc9:
548 opcode = 0xc8;
549 break;
550 case 0xc0:
551 opcode = 0xc2;
552 break;
553 case 0xc2:
554 opcode = 0xc0;
555 break;
556 case 0xc3:
557 opcode = 0xc1;
558 break;
559 case 0xc1:
560 opcode = 0xc3;
561 break;
562 case 0xc4:
563 opcode = 0xc6;
564 break;
565 case 0xc6:
566 opcode = 0xc4;
567 break;
568 case 0xc7:
569 opcode = 0xc5;
570 break;
571 case 0xc5:
572 opcode = 0xc7;
573 break;
574 default:
575 abort ();
576 }
577 fragP->fr_literal[offset] = opcode;
578
579 /* Create a fixup for the reversed conditional branch. */
580 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
581 fix_new (fragP, fragP->fr_fix + 1, 1,
582 symbol_new (buf, sec, 0, fragP->fr_next),
583 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
584
585 /* Now create the unconditional branch + fixup to the
586 final target. */
587 fragP->fr_literal[offset + 2] = 0xdc;
588 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
589 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
590 fragP->fr_var = 0;
591 fragP->fr_fix += 7;
592 }
593 else if (fragP->fr_subtype == 3)
594 {
595 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
596 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
597 fragP->fr_var = 0;
598 fragP->fr_fix += 3;
599 }
600 else if (fragP->fr_subtype == 4)
601 {
602 /* Reverse the condition of the first branch. */
603 int offset = fragP->fr_fix;
604 int opcode = fragP->fr_literal[offset + 1] & 0xff;
605
606 switch (opcode)
607 {
608 case 0xe8:
609 opcode = 0xe9;
610 break;
611 case 0xe9:
612 opcode = 0xe8;
613 break;
614 case 0xea:
615 opcode = 0xeb;
616 break;
617 case 0xeb:
618 opcode = 0xea;
619 break;
620 default:
621 abort ();
622 }
623 fragP->fr_literal[offset + 1] = opcode;
624
625 /* Create a fixup for the reversed conditional branch. */
626 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
627 fix_new (fragP, fragP->fr_fix + 2, 1,
628 symbol_new (buf, sec, 0, fragP->fr_next),
629 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
630
631 /* Now create the unconditional branch + fixup to the
632 final target. */
633 fragP->fr_literal[offset + 3] = 0xcc;
634 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
635 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
636 fragP->fr_var = 0;
637 fragP->fr_fix += 6;
638 }
639 else if (fragP->fr_subtype == 5)
640 {
641 /* Reverse the condition of the first branch. */
642 int offset = fragP->fr_fix;
643 int opcode = fragP->fr_literal[offset + 1] & 0xff;
644
645 switch (opcode)
646 {
647 case 0xe8:
648 opcode = 0xe9;
649 break;
650 case 0xea:
651 opcode = 0xeb;
652 break;
653 case 0xeb:
654 opcode = 0xea;
655 break;
656 default:
657 abort ();
658 }
659 fragP->fr_literal[offset + 1] = opcode;
660
661 /* Create a fixup for the reversed conditional branch. */
662 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
663 fix_new (fragP, fragP->fr_fix + 2, 1,
664 symbol_new (buf, sec, 0, fragP->fr_next),
665 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
666
667 /* Now create the unconditional branch + fixup to the
668 final target. */
669 fragP->fr_literal[offset + 3] = 0xdc;
670 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
671 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
672 fragP->fr_var = 0;
673 fragP->fr_fix += 8;
674 }
675 else if (fragP->fr_subtype == 6)
676 {
677 int offset = fragP->fr_fix;
678 fragP->fr_literal[offset] = 0xcd;
679 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
680 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
681 fragP->fr_var = 0;
682 fragP->fr_fix += 5;
683 }
684 else if (fragP->fr_subtype == 7)
685 {
686 int offset = fragP->fr_fix;
687 fragP->fr_literal[offset] = 0xdd;
688 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
689 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
690
691 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
692 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
693 fragP->fr_var = 0;
694 fragP->fr_fix += 7;
695 }
696 else if (fragP->fr_subtype == 8)
697 {
698 int offset = fragP->fr_fix;
699 fragP->fr_literal[offset] = 0xfa;
700 fragP->fr_literal[offset + 1] = 0xff;
701 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
702 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
703 fragP->fr_var = 0;
704 fragP->fr_fix += 4;
705 }
706 else if (fragP->fr_subtype == 9)
707 {
708 int offset = fragP->fr_fix;
709 fragP->fr_literal[offset] = 0xfc;
710 fragP->fr_literal[offset + 1] = 0xff;
711
712 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
713 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
714 fragP->fr_var = 0;
715 fragP->fr_fix += 6;
716 }
717 else if (fragP->fr_subtype == 10)
718 {
719 fragP->fr_literal[fragP->fr_fix] = 0xca;
720 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
721 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
722 fragP->fr_var = 0;
723 fragP->fr_fix += 2;
724 }
725 else if (fragP->fr_subtype == 11)
726 {
727 int offset = fragP->fr_fix;
728 fragP->fr_literal[offset] = 0xcc;
729
730 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
731 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
732 fragP->fr_var = 0;
733 fragP->fr_fix += 3;
734 }
735 else if (fragP->fr_subtype == 12)
736 {
737 int offset = fragP->fr_fix;
738 fragP->fr_literal[offset] = 0xdc;
739
740 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
741 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
742 fragP->fr_var = 0;
743 fragP->fr_fix += 5;
744 }
745 else if (fragP->fr_subtype == 13)
746 {
747 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
748 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
749 fragP->fr_var = 0;
750 fragP->fr_fix += 3;
751 }
752 else if (fragP->fr_subtype == 14)
753 {
754 /* Reverse the condition of the first branch. */
755 int offset = fragP->fr_fix;
756 int opcode = fragP->fr_literal[offset + 1] & 0xff;
757
758 switch (opcode)
759 {
760 case 0xd0:
761 opcode = 0xd1;
762 break;
763 case 0xd1:
764 opcode = 0xd0;
765 break;
766 case 0xd2:
767 opcode = 0xdc;
768 break;
769 case 0xd3:
770 opcode = 0xdb;
771 break;
772 case 0xd4:
773 opcode = 0xda;
774 break;
775 case 0xd5:
776 opcode = 0xd9;
777 break;
778 case 0xd6:
779 opcode = 0xd8;
780 break;
781 case 0xd7:
782 opcode = 0xdd;
783 break;
784 case 0xd8:
785 opcode = 0xd6;
786 break;
787 case 0xd9:
788 opcode = 0xd5;
789 break;
790 case 0xda:
791 opcode = 0xd4;
792 break;
793 case 0xdb:
794 opcode = 0xd3;
795 break;
796 case 0xdc:
797 opcode = 0xd2;
798 break;
799 case 0xdd:
800 opcode = 0xd7;
801 break;
802 default:
803 abort ();
804 }
805 fragP->fr_literal[offset + 1] = opcode;
806
807 /* Create a fixup for the reversed conditional branch. */
808 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
809 fix_new (fragP, fragP->fr_fix + 2, 1,
810 symbol_new (buf, sec, 0, fragP->fr_next),
811 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
812
813 /* Now create the unconditional branch + fixup to the
814 final target. */
815 fragP->fr_literal[offset + 3] = 0xcc;
816 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
817 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
818 fragP->fr_var = 0;
819 fragP->fr_fix += 6;
820 }
821 else if (fragP->fr_subtype == 15)
822 {
823 /* Reverse the condition of the first branch. */
824 int offset = fragP->fr_fix;
825 int opcode = fragP->fr_literal[offset + 1] & 0xff;
826
827 switch (opcode)
828 {
829 case 0xd0:
830 opcode = 0xd1;
831 break;
832 case 0xd1:
833 opcode = 0xd0;
834 break;
835 case 0xd2:
836 opcode = 0xdc;
837 break;
838 case 0xd3:
839 opcode = 0xdb;
840 break;
841 case 0xd4:
842 opcode = 0xda;
843 break;
844 case 0xd5:
845 opcode = 0xd9;
846 break;
847 case 0xd6:
848 opcode = 0xd8;
849 break;
850 case 0xd7:
851 opcode = 0xdd;
852 break;
853 case 0xd8:
854 opcode = 0xd6;
855 break;
856 case 0xd9:
857 opcode = 0xd5;
858 break;
859 case 0xda:
860 opcode = 0xd4;
861 break;
862 case 0xdb:
863 opcode = 0xd3;
864 break;
865 case 0xdc:
866 opcode = 0xd2;
867 break;
868 case 0xdd:
869 opcode = 0xd7;
870 break;
871 default:
872 abort ();
873 }
874 fragP->fr_literal[offset + 1] = opcode;
875
876 /* Create a fixup for the reversed conditional branch. */
877 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
878 fix_new (fragP, fragP->fr_fix + 2, 1,
879 symbol_new (buf, sec, 0, fragP->fr_next),
880 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
881
882 /* Now create the unconditional branch + fixup to the
883 final target. */
884 fragP->fr_literal[offset + 3] = 0xdc;
885 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
886 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
887 fragP->fr_var = 0;
888 fragP->fr_fix += 8;
889 }
890 else
891 abort ();
892 }
893
894 valueT
895 md_section_align (asection *seg, valueT addr)
896 {
897 int align = bfd_get_section_alignment (stdoutput, seg);
898
899 return ((addr + (1 << align) - 1) & (-1 << align));
900 }
901
902 void
903 md_begin (void)
904 {
905 char *prev_name = "";
906 const struct mn10300_opcode *op;
907
908 mn10300_hash = hash_new ();
909
910 /* Insert unique names into hash table. The MN10300 instruction set
911 has many identical opcode names that have different opcodes based
912 on the operands. This hash table then provides a quick index to
913 the first opcode with a particular name in the opcode table. */
914
915 op = mn10300_opcodes;
916 while (op->name)
917 {
918 if (strcmp (prev_name, op->name))
919 {
920 prev_name = (char *) op->name;
921 hash_insert (mn10300_hash, op->name, (char *) op);
922 }
923 op++;
924 }
925
926 /* Set the default machine type. */
927 #ifdef TE_LINUX
928 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, AM33_2))
929 as_warn (_("could not set architecture and machine"));
930
931 current_machine = AM33_2;
932 #else
933 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
934 as_warn (_("could not set architecture and machine"));
935
936 current_machine = MN103;
937 #endif
938 }
939
940 static symbolS *GOT_symbol;
941
942 static inline int
943 mn10300_PIC_related_p (symbolS *sym)
944 {
945 expressionS *exp;
946
947 if (! sym)
948 return 0;
949
950 if (sym == GOT_symbol)
951 return 1;
952
953 exp = symbol_get_value_expression (sym);
954
955 return (exp->X_op == O_PIC_reloc
956 || mn10300_PIC_related_p (exp->X_add_symbol)
957 || mn10300_PIC_related_p (exp->X_op_symbol));
958 }
959
960 static inline int
961 mn10300_check_fixup (struct mn10300_fixup *fixup)
962 {
963 expressionS *exp = &fixup->exp;
964
965 repeat:
966 switch (exp->X_op)
967 {
968 case O_add:
969 case O_subtract: /* If we're sufficiently unlucky that the label
970 and the expression that references it happen
971 to end up in different frags, the subtract
972 won't be simplified within expression(). */
973 /* The PIC-related operand must be the first operand of a sum. */
974 if (exp != &fixup->exp || mn10300_PIC_related_p (exp->X_op_symbol))
975 return 1;
976
977 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
978 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
979
980 exp = symbol_get_value_expression (exp->X_add_symbol);
981 goto repeat;
982
983 case O_symbol:
984 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
985 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
986 break;
987
988 case O_PIC_reloc:
989 fixup->reloc = exp->X_md;
990 exp->X_op = O_symbol;
991 if (fixup->reloc == BFD_RELOC_32_PLT_PCREL
992 && fixup->opindex >= 0
993 && (mn10300_operands[fixup->opindex].flags
994 & MN10300_OPERAND_RELAX))
995 return 1;
996 break;
997
998 default:
999 return (mn10300_PIC_related_p (exp->X_add_symbol)
1000 || mn10300_PIC_related_p (exp->X_op_symbol));
1001 }
1002
1003 return 0;
1004 }
1005
1006 void
1007 mn10300_cons_fix_new (fragS *frag, int off, int size, expressionS *exp)
1008 {
1009 struct mn10300_fixup fixup;
1010
1011 fixup.opindex = -1;
1012 fixup.exp = *exp;
1013 fixup.reloc = BFD_RELOC_UNUSED;
1014
1015 mn10300_check_fixup (&fixup);
1016
1017 if (fixup.reloc == BFD_RELOC_MN10300_GOT32)
1018 switch (size)
1019 {
1020 case 2:
1021 fixup.reloc = BFD_RELOC_MN10300_GOT16;
1022 break;
1023
1024 case 3:
1025 fixup.reloc = BFD_RELOC_MN10300_GOT24;
1026 break;
1027
1028 case 4:
1029 break;
1030
1031 default:
1032 goto error;
1033 }
1034 else if (fixup.reloc == BFD_RELOC_UNUSED)
1035 switch (size)
1036 {
1037 case 1:
1038 fixup.reloc = BFD_RELOC_8;
1039 break;
1040
1041 case 2:
1042 fixup.reloc = BFD_RELOC_16;
1043 break;
1044
1045 case 3:
1046 fixup.reloc = BFD_RELOC_24;
1047 break;
1048
1049 case 4:
1050 fixup.reloc = BFD_RELOC_32;
1051 break;
1052
1053 default:
1054 goto error;
1055 }
1056 else if (size != 4)
1057 {
1058 error:
1059 as_bad (_("unsupported BFD relocation size %u"), size);
1060 fixup.reloc = BFD_RELOC_UNUSED;
1061 }
1062
1063 fix_new_exp (frag, off, size, &fixup.exp, 0, fixup.reloc);
1064 }
1065
1066 static bfd_boolean
1067 check_operand (const struct mn10300_operand *operand,
1068 offsetT val)
1069 {
1070 /* No need to check 32bit operands for a bit. Note that
1071 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1072 if (operand->bits != 32
1073 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1074 {
1075 long min, max;
1076 offsetT test;
1077 int bits;
1078
1079 bits = operand->bits;
1080 if (operand->flags & MN10300_OPERAND_24BIT)
1081 bits = 24;
1082
1083 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1084 {
1085 max = (1 << (bits - 1)) - 1;
1086 min = - (1 << (bits - 1));
1087 }
1088 else
1089 {
1090 max = (1 << bits) - 1;
1091 min = 0;
1092 }
1093
1094 test = val;
1095
1096 if (test < (offsetT) min || test > (offsetT) max)
1097 return FALSE;
1098 }
1099 return TRUE;
1100 }
1101
1102 /* Insert an operand value into an instruction. */
1103
1104 static void
1105 mn10300_insert_operand (unsigned long *insnp,
1106 unsigned long *extensionp,
1107 const struct mn10300_operand *operand,
1108 offsetT val,
1109 char *file,
1110 unsigned int line,
1111 unsigned int shift)
1112 {
1113 /* No need to check 32bit operands for a bit. Note that
1114 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1115 if (operand->bits != 32
1116 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1117 {
1118 long min, max;
1119 offsetT test;
1120 int bits;
1121
1122 bits = operand->bits;
1123 if (operand->flags & MN10300_OPERAND_24BIT)
1124 bits = 24;
1125
1126 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1127 {
1128 max = (1 << (bits - 1)) - 1;
1129 min = - (1 << (bits - 1));
1130 }
1131 else
1132 {
1133 max = (1 << bits) - 1;
1134 min = 0;
1135 }
1136
1137 test = val;
1138
1139 if (test < (offsetT) min || test > (offsetT) max)
1140 as_warn_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
1141 }
1142
1143 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1144 {
1145 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
1146 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
1147 << operand->shift);
1148 }
1149 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1150 {
1151 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
1152 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
1153 << operand->shift);
1154 }
1155 else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG)))
1156 {
1157 /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an
1158 explanation of these variables. Note that FMT-implied shifts
1159 are not taken into account for FP registers. */
1160 unsigned long mask_low, mask_high;
1161 int shl_low, shr_high, shl_high;
1162
1163 switch (operand->bits)
1164 {
1165 case 5:
1166 /* Handle regular FP registers. */
1167 if (operand->shift >= 0)
1168 {
1169 /* This is an `m' register. */
1170 shl_low = operand->shift;
1171 shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4;
1172 }
1173 else
1174 {
1175 /* This is an `n' register. */
1176 shl_low = -operand->shift;
1177 shl_high = shl_low / 4;
1178 }
1179
1180 mask_low = 0x0f;
1181 mask_high = 0x10;
1182 shr_high = 4;
1183 break;
1184
1185 case 3:
1186 /* Handle accumulators. */
1187 shl_low = -operand->shift;
1188 shl_high = 0;
1189 mask_low = 0x03;
1190 mask_high = 0x04;
1191 shr_high = 2;
1192 break;
1193
1194 default:
1195 abort ();
1196 }
1197 *insnp |= ((((val & mask_high) >> shr_high) << shl_high)
1198 | ((val & mask_low) << shl_low));
1199 }
1200 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
1201 {
1202 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1203 << (operand->shift + shift));
1204
1205 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1206 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1207 << (operand->shift + shift + operand->bits));
1208 }
1209 else
1210 {
1211 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1212 << (operand->shift + shift));
1213
1214 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1215 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1216 << (operand->shift + shift + operand->bits));
1217 }
1218 }
1219
1220 void
1221 md_assemble (char *str)
1222 {
1223 char *s;
1224 struct mn10300_opcode *opcode;
1225 struct mn10300_opcode *next_opcode;
1226 const unsigned char *opindex_ptr;
1227 int next_opindex, relaxable;
1228 unsigned long insn, extension, size = 0;
1229 char *f;
1230 int i;
1231 int match;
1232
1233 /* Get the opcode. */
1234 for (s = str; *s != '\0' && !ISSPACE (*s); s++)
1235 ;
1236 if (*s != '\0')
1237 *s++ = '\0';
1238
1239 /* Find the first opcode with the proper name. */
1240 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
1241 if (opcode == NULL)
1242 {
1243 as_bad (_("Unrecognized opcode: `%s'"), str);
1244 return;
1245 }
1246
1247 str = s;
1248 while (ISSPACE (*str))
1249 ++str;
1250
1251 input_line_pointer = str;
1252
1253 for (;;)
1254 {
1255 const char *errmsg;
1256 int op_idx;
1257 char *hold;
1258 int extra_shift = 0;
1259
1260 errmsg = _("Invalid opcode/operands");
1261
1262 /* Reset the array of register operands. */
1263 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
1264
1265 relaxable = 0;
1266 fc = 0;
1267 match = 0;
1268 next_opindex = 0;
1269 insn = opcode->opcode;
1270 extension = 0;
1271
1272 /* If the instruction is not available on the current machine
1273 then it can not possibly match. */
1274 if (opcode->machine
1275 && !(opcode->machine == AM33_2 && HAVE_AM33_2)
1276 && !(opcode->machine == AM33 && HAVE_AM33)
1277 && !(opcode->machine == AM30 && HAVE_AM30))
1278 goto error;
1279
1280 for (op_idx = 1, opindex_ptr = opcode->operands;
1281 *opindex_ptr != 0;
1282 opindex_ptr++, op_idx++)
1283 {
1284 const struct mn10300_operand *operand;
1285 expressionS ex;
1286
1287 if (next_opindex == 0)
1288 {
1289 operand = &mn10300_operands[*opindex_ptr];
1290 }
1291 else
1292 {
1293 operand = &mn10300_operands[next_opindex];
1294 next_opindex = 0;
1295 }
1296
1297 while (*str == ' ' || *str == ',')
1298 ++str;
1299
1300 if (operand->flags & MN10300_OPERAND_RELAX)
1301 relaxable = 1;
1302
1303 /* Gather the operand. */
1304 hold = input_line_pointer;
1305 input_line_pointer = str;
1306
1307 if (operand->flags & MN10300_OPERAND_PAREN)
1308 {
1309 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1310 {
1311 input_line_pointer = hold;
1312 str = hold;
1313 goto error;
1314 }
1315 input_line_pointer++;
1316 goto keep_going;
1317 }
1318 /* See if we can match the operands. */
1319 else if (operand->flags & MN10300_OPERAND_DREG)
1320 {
1321 if (!data_register_name (&ex))
1322 {
1323 input_line_pointer = hold;
1324 str = hold;
1325 goto error;
1326 }
1327 }
1328 else if (operand->flags & MN10300_OPERAND_AREG)
1329 {
1330 if (!address_register_name (&ex))
1331 {
1332 input_line_pointer = hold;
1333 str = hold;
1334 goto error;
1335 }
1336 }
1337 else if (operand->flags & MN10300_OPERAND_SP)
1338 {
1339 char *start = input_line_pointer;
1340 char c = get_symbol_end ();
1341
1342 if (strcasecmp (start, "sp") != 0)
1343 {
1344 *input_line_pointer = c;
1345 input_line_pointer = hold;
1346 str = hold;
1347 goto error;
1348 }
1349 *input_line_pointer = c;
1350 goto keep_going;
1351 }
1352 else if (operand->flags & MN10300_OPERAND_RREG)
1353 {
1354 if (!r_register_name (&ex))
1355 {
1356 input_line_pointer = hold;
1357 str = hold;
1358 goto error;
1359 }
1360 }
1361 else if (operand->flags & MN10300_OPERAND_XRREG)
1362 {
1363 if (!xr_register_name (&ex))
1364 {
1365 input_line_pointer = hold;
1366 str = hold;
1367 goto error;
1368 }
1369 }
1370 else if (operand->flags & MN10300_OPERAND_FSREG)
1371 {
1372 if (!float_register_name (&ex))
1373 {
1374 input_line_pointer = hold;
1375 str = hold;
1376 goto error;
1377 }
1378 }
1379 else if (operand->flags & MN10300_OPERAND_FDREG)
1380 {
1381 if (!double_register_name (&ex))
1382 {
1383 input_line_pointer = hold;
1384 str = hold;
1385 goto error;
1386 }
1387 }
1388 else if (operand->flags & MN10300_OPERAND_FPCR)
1389 {
1390 char *start = input_line_pointer;
1391 char c = get_symbol_end ();
1392
1393 if (strcasecmp (start, "fpcr") != 0)
1394 {
1395 *input_line_pointer = c;
1396 input_line_pointer = hold;
1397 str = hold;
1398 goto error;
1399 }
1400 *input_line_pointer = c;
1401 goto keep_going;
1402 }
1403 else if (operand->flags & MN10300_OPERAND_USP)
1404 {
1405 char *start = input_line_pointer;
1406 char c = get_symbol_end ();
1407
1408 if (strcasecmp (start, "usp") != 0)
1409 {
1410 *input_line_pointer = c;
1411 input_line_pointer = hold;
1412 str = hold;
1413 goto error;
1414 }
1415 *input_line_pointer = c;
1416 goto keep_going;
1417 }
1418 else if (operand->flags & MN10300_OPERAND_SSP)
1419 {
1420 char *start = input_line_pointer;
1421 char c = get_symbol_end ();
1422
1423 if (strcasecmp (start, "ssp") != 0)
1424 {
1425 *input_line_pointer = c;
1426 input_line_pointer = hold;
1427 str = hold;
1428 goto error;
1429 }
1430 *input_line_pointer = c;
1431 goto keep_going;
1432 }
1433 else if (operand->flags & MN10300_OPERAND_MSP)
1434 {
1435 char *start = input_line_pointer;
1436 char c = get_symbol_end ();
1437
1438 if (strcasecmp (start, "msp") != 0)
1439 {
1440 *input_line_pointer = c;
1441 input_line_pointer = hold;
1442 str = hold;
1443 goto error;
1444 }
1445 *input_line_pointer = c;
1446 goto keep_going;
1447 }
1448 else if (operand->flags & MN10300_OPERAND_PC)
1449 {
1450 char *start = input_line_pointer;
1451 char c = get_symbol_end ();
1452
1453 if (strcasecmp (start, "pc") != 0)
1454 {
1455 *input_line_pointer = c;
1456 input_line_pointer = hold;
1457 str = hold;
1458 goto error;
1459 }
1460 *input_line_pointer = c;
1461 goto keep_going;
1462 }
1463 else if (operand->flags & MN10300_OPERAND_EPSW)
1464 {
1465 char *start = input_line_pointer;
1466 char c = get_symbol_end ();
1467
1468 if (strcasecmp (start, "epsw") != 0)
1469 {
1470 *input_line_pointer = c;
1471 input_line_pointer = hold;
1472 str = hold;
1473 goto error;
1474 }
1475 *input_line_pointer = c;
1476 goto keep_going;
1477 }
1478 else if (operand->flags & MN10300_OPERAND_PLUS)
1479 {
1480 if (*input_line_pointer != '+')
1481 {
1482 input_line_pointer = hold;
1483 str = hold;
1484 goto error;
1485 }
1486 input_line_pointer++;
1487 goto keep_going;
1488 }
1489 else if (operand->flags & MN10300_OPERAND_PSW)
1490 {
1491 char *start = input_line_pointer;
1492 char c = get_symbol_end ();
1493
1494 if (strcasecmp (start, "psw") != 0)
1495 {
1496 *input_line_pointer = c;
1497 input_line_pointer = hold;
1498 str = hold;
1499 goto error;
1500 }
1501 *input_line_pointer = c;
1502 goto keep_going;
1503 }
1504 else if (operand->flags & MN10300_OPERAND_MDR)
1505 {
1506 char *start = input_line_pointer;
1507 char c = get_symbol_end ();
1508
1509 if (strcasecmp (start, "mdr") != 0)
1510 {
1511 *input_line_pointer = c;
1512 input_line_pointer = hold;
1513 str = hold;
1514 goto error;
1515 }
1516 *input_line_pointer = c;
1517 goto keep_going;
1518 }
1519 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1520 {
1521 unsigned int value = 0;
1522 if (*input_line_pointer != '[')
1523 {
1524 input_line_pointer = hold;
1525 str = hold;
1526 goto error;
1527 }
1528
1529 /* Eat the '['. */
1530 input_line_pointer++;
1531
1532 /* We used to reject a null register list here; however,
1533 we accept it now so the compiler can emit "call"
1534 instructions for all calls to named functions.
1535
1536 The linker can then fill in the appropriate bits for the
1537 register list and stack size or change the instruction
1538 into a "calls" if using "call" is not profitable. */
1539 while (*input_line_pointer != ']')
1540 {
1541 char *start;
1542 char c;
1543
1544 if (*input_line_pointer == ',')
1545 input_line_pointer++;
1546
1547 start = input_line_pointer;
1548 c = get_symbol_end ();
1549
1550 if (strcasecmp (start, "d2") == 0)
1551 {
1552 value |= 0x80;
1553 *input_line_pointer = c;
1554 }
1555 else if (strcasecmp (start, "d3") == 0)
1556 {
1557 value |= 0x40;
1558 *input_line_pointer = c;
1559 }
1560 else if (strcasecmp (start, "a2") == 0)
1561 {
1562 value |= 0x20;
1563 *input_line_pointer = c;
1564 }
1565 else if (strcasecmp (start, "a3") == 0)
1566 {
1567 value |= 0x10;
1568 *input_line_pointer = c;
1569 }
1570 else if (strcasecmp (start, "other") == 0)
1571 {
1572 value |= 0x08;
1573 *input_line_pointer = c;
1574 }
1575 else if (HAVE_AM33
1576 && strcasecmp (start, "exreg0") == 0)
1577 {
1578 value |= 0x04;
1579 *input_line_pointer = c;
1580 }
1581 else if (HAVE_AM33
1582 && strcasecmp (start, "exreg1") == 0)
1583 {
1584 value |= 0x02;
1585 *input_line_pointer = c;
1586 }
1587 else if (HAVE_AM33
1588 && strcasecmp (start, "exother") == 0)
1589 {
1590 value |= 0x01;
1591 *input_line_pointer = c;
1592 }
1593 else if (HAVE_AM33
1594 && strcasecmp (start, "all") == 0)
1595 {
1596 value |= 0xff;
1597 *input_line_pointer = c;
1598 }
1599 else
1600 {
1601 input_line_pointer = hold;
1602 str = hold;
1603 goto error;
1604 }
1605 }
1606 input_line_pointer++;
1607 mn10300_insert_operand (& insn, & extension, operand,
1608 value, NULL, 0, 0);
1609 goto keep_going;
1610
1611 }
1612 else if (data_register_name (&ex))
1613 {
1614 input_line_pointer = hold;
1615 str = hold;
1616 goto error;
1617 }
1618 else if (address_register_name (&ex))
1619 {
1620 input_line_pointer = hold;
1621 str = hold;
1622 goto error;
1623 }
1624 else if (other_register_name (&ex))
1625 {
1626 input_line_pointer = hold;
1627 str = hold;
1628 goto error;
1629 }
1630 else if (HAVE_AM33 && r_register_name (&ex))
1631 {
1632 input_line_pointer = hold;
1633 str = hold;
1634 goto error;
1635 }
1636 else if (HAVE_AM33 && xr_register_name (&ex))
1637 {
1638 input_line_pointer = hold;
1639 str = hold;
1640 goto error;
1641 }
1642 else if (HAVE_AM33_2 && float_register_name (&ex))
1643 {
1644 input_line_pointer = hold;
1645 str = hold;
1646 goto error;
1647 }
1648 else if (HAVE_AM33_2 && double_register_name (&ex))
1649 {
1650 input_line_pointer = hold;
1651 str = hold;
1652 goto error;
1653 }
1654 else if (*str == ')' || *str == '(')
1655 {
1656 input_line_pointer = hold;
1657 str = hold;
1658 goto error;
1659 }
1660 else
1661 {
1662 expression (&ex);
1663 }
1664
1665 switch (ex.X_op)
1666 {
1667 case O_illegal:
1668 errmsg = _("illegal operand");
1669 goto error;
1670 case O_absent:
1671 errmsg = _("missing operand");
1672 goto error;
1673 case O_register:
1674 {
1675 int mask;
1676
1677 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
1678 if (HAVE_AM33)
1679 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
1680 if (HAVE_AM33_2)
1681 mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG;
1682 if ((operand->flags & mask) == 0)
1683 {
1684 input_line_pointer = hold;
1685 str = hold;
1686 goto error;
1687 }
1688
1689 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1690 extra_shift = 8;
1691 else if (opcode->format == FMT_D2
1692 || opcode->format == FMT_D4
1693 || opcode->format == FMT_S2
1694 || opcode->format == FMT_S4
1695 || opcode->format == FMT_S6
1696 || opcode->format == FMT_D5)
1697 extra_shift = 16;
1698 else if (opcode->format == FMT_D7)
1699 extra_shift = 8;
1700 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1701 extra_shift = 8;
1702 else
1703 extra_shift = 0;
1704
1705 mn10300_insert_operand (& insn, & extension, operand,
1706 ex.X_add_number, NULL,
1707 0, extra_shift);
1708
1709 /* And note the register number in the register array. */
1710 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1711 break;
1712 }
1713
1714 case O_constant:
1715 /* If this operand can be promoted, and it doesn't
1716 fit into the allocated bitfield for this insn,
1717 then promote it (ie this opcode does not match). */
1718 if (operand->flags
1719 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
1720 && !check_operand (operand, ex.X_add_number))
1721 {
1722 input_line_pointer = hold;
1723 str = hold;
1724 goto error;
1725 }
1726
1727 mn10300_insert_operand (& insn, & extension, operand,
1728 ex.X_add_number, NULL, 0, 0);
1729 break;
1730
1731 default:
1732 /* If this operand can be promoted, then this opcode didn't
1733 match since we can't know if it needed promotion! */
1734 if (operand->flags & MN10300_OPERAND_PROMOTE)
1735 {
1736 input_line_pointer = hold;
1737 str = hold;
1738 goto error;
1739 }
1740
1741 /* We need to generate a fixup for this expression. */
1742 if (fc >= MAX_INSN_FIXUPS)
1743 as_fatal (_("too many fixups"));
1744 fixups[fc].exp = ex;
1745 fixups[fc].opindex = *opindex_ptr;
1746 fixups[fc].reloc = BFD_RELOC_UNUSED;
1747 if (mn10300_check_fixup (& fixups[fc]))
1748 goto error;
1749 ++fc;
1750 break;
1751 }
1752
1753 keep_going:
1754 str = input_line_pointer;
1755 input_line_pointer = hold;
1756
1757 while (*str == ' ' || *str == ',')
1758 ++str;
1759 }
1760
1761 /* Make sure we used all the operands! */
1762 if (*str != ',')
1763 match = 1;
1764
1765 /* If this instruction has registers that must not match, verify
1766 that they do indeed not match. */
1767 if (opcode->no_match_operands)
1768 {
1769 int i;
1770
1771 /* Look at each operand to see if it's marked. */
1772 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1773 {
1774 if ((1 << i) & opcode->no_match_operands)
1775 {
1776 int j;
1777
1778 /* operand I is marked. Check that it does not match any
1779 operands > I which are marked. */
1780 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1781 {
1782 if (((1 << j) & opcode->no_match_operands)
1783 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1784 {
1785 errmsg = _("Invalid register specification.");
1786 match = 0;
1787 goto error;
1788 }
1789 }
1790 }
1791 }
1792 }
1793
1794 error:
1795 if (match == 0)
1796 {
1797 next_opcode = opcode + 1;
1798 if (!strcmp (next_opcode->name, opcode->name))
1799 {
1800 opcode = next_opcode;
1801 continue;
1802 }
1803
1804 as_bad ("%s", errmsg);
1805 return;
1806 }
1807 break;
1808 }
1809
1810 while (ISSPACE (*str))
1811 ++str;
1812
1813 if (*str != '\0')
1814 as_bad (_("junk at end of line: `%s'"), str);
1815
1816 input_line_pointer = str;
1817
1818 /* Determine the size of the instruction. */
1819 if (opcode->format == FMT_S0)
1820 size = 1;
1821
1822 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1823 size = 2;
1824
1825 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1826 size = 3;
1827
1828 if (opcode->format == FMT_D6)
1829 size = 3;
1830
1831 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1832 size = 4;
1833
1834 if (opcode->format == FMT_D8)
1835 size = 6;
1836
1837 if (opcode->format == FMT_D9)
1838 size = 7;
1839
1840 if (opcode->format == FMT_S4)
1841 size = 5;
1842
1843 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1844 size = 7;
1845
1846 if (opcode->format == FMT_D2)
1847 size = 4;
1848
1849 if (opcode->format == FMT_D3)
1850 size = 5;
1851
1852 if (opcode->format == FMT_D4)
1853 size = 6;
1854
1855 if (relaxable && fc > 0)
1856 {
1857 /* On a 64-bit host the size of an 'int' is not the same
1858 as the size of a pointer, so we need a union to convert
1859 the opindex field of the fr_cgen structure into a char *
1860 so that it can be stored in the frag. We do not have
1861 to worry about loosing accuracy as we are not going to
1862 be even close to the 32bit limit of the int. */
1863 union
1864 {
1865 int opindex;
1866 char * ptr;
1867 }
1868 opindex_converter;
1869 int type;
1870
1871 /* We want to anchor the line info to the previous frag (if
1872 there isn't one, create it), so that, when the insn is
1873 resized, we still get the right address for the beginning of
1874 the region. */
1875 f = frag_more (0);
1876 dwarf2_emit_insn (0);
1877
1878 /* bCC */
1879 if (size == 2)
1880 {
1881 /* Handle bra specially. Basically treat it like jmp so
1882 that we automatically handle 8, 16 and 32 bit offsets
1883 correctly as well as jumps to an undefined address.
1884
1885 It is also important to not treat it like other bCC
1886 instructions since the long forms of bra is different
1887 from other bCC instructions. */
1888 if (opcode->opcode == 0xca00)
1889 type = 10;
1890 else
1891 type = 0;
1892 }
1893 /* call */
1894 else if (size == 5)
1895 type = 6;
1896 /* calls */
1897 else if (size == 4)
1898 type = 8;
1899 /* jmp */
1900 else if (size == 3 && opcode->opcode == 0xcc0000)
1901 type = 10;
1902 else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000)
1903 type = 13;
1904 /* bCC (uncommon cases) */
1905 else
1906 type = 3;
1907
1908 opindex_converter.opindex = fixups[0].opindex;
1909 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1910 fixups[0].exp.X_add_symbol,
1911 fixups[0].exp.X_add_number,
1912 opindex_converter.ptr);
1913
1914 /* This is pretty hokey. We basically just care about the
1915 opcode, so we have to write out the first word big endian.
1916
1917 The exception is "call", which has two operands that we
1918 care about.
1919
1920 The first operand (the register list) happens to be in the
1921 first instruction word, and will be in the right place if
1922 we output the first word in big endian mode.
1923
1924 The second operand (stack size) is in the extension word,
1925 and we want it to appear as the first character in the extension
1926 word (as it appears in memory). Luckily, writing the extension
1927 word in big endian format will do what we want. */
1928 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1929 if (size > 8)
1930 {
1931 number_to_chars_bigendian (f + 4, extension, 4);
1932 number_to_chars_bigendian (f + 8, 0, size - 8);
1933 }
1934 else if (size > 4)
1935 number_to_chars_bigendian (f + 4, extension, size - 4);
1936 }
1937 else
1938 {
1939 /* Allocate space for the instruction. */
1940 f = frag_more (size);
1941
1942 /* Fill in bytes for the instruction. Note that opcode fields
1943 are written big-endian, 16 & 32bit immediates are written
1944 little endian. Egad. */
1945 if (opcode->format == FMT_S0
1946 || opcode->format == FMT_S1
1947 || opcode->format == FMT_D0
1948 || opcode->format == FMT_D6
1949 || opcode->format == FMT_D7
1950 || opcode->format == FMT_D10
1951 || opcode->format == FMT_D1)
1952 {
1953 number_to_chars_bigendian (f, insn, size);
1954 }
1955 else if (opcode->format == FMT_S2
1956 && opcode->opcode != 0xdf0000
1957 && opcode->opcode != 0xde0000)
1958 {
1959 /* A format S2 instruction that is _not_ "ret" and "retf". */
1960 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1961 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1962 }
1963 else if (opcode->format == FMT_S2)
1964 {
1965 /* This must be a ret or retf, which is written entirely in
1966 big-endian format. */
1967 number_to_chars_bigendian (f, insn, 3);
1968 }
1969 else if (opcode->format == FMT_S4
1970 && opcode->opcode != 0xdc000000)
1971 {
1972 /* This must be a format S4 "call" instruction. What a pain. */
1973 unsigned long temp = (insn >> 8) & 0xffff;
1974 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1975 number_to_chars_littleendian (f + 1, temp, 2);
1976 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1977 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1978 }
1979 else if (opcode->format == FMT_S4)
1980 {
1981 /* This must be a format S4 "jmp" instruction. */
1982 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1983 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1984 number_to_chars_littleendian (f + 1, temp, 4);
1985 }
1986 else if (opcode->format == FMT_S6)
1987 {
1988 unsigned long temp = ((insn & 0xffffff) << 8)
1989 | ((extension >> 16) & 0xff);
1990 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1991 number_to_chars_littleendian (f + 1, temp, 4);
1992 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
1993 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1994 }
1995 else if (opcode->format == FMT_D2
1996 && opcode->opcode != 0xfaf80000
1997 && opcode->opcode != 0xfaf00000
1998 && opcode->opcode != 0xfaf40000)
1999 {
2000 /* A format D2 instruction where the 16bit immediate is
2001 really a single 16bit value, not two 8bit values. */
2002 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2003 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2004 }
2005 else if (opcode->format == FMT_D2)
2006 {
2007 /* A format D2 instruction where the 16bit immediate
2008 is really two 8bit immediates. */
2009 number_to_chars_bigendian (f, insn, 4);
2010 }
2011 else if (opcode->format == FMT_D3)
2012 {
2013 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2014 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2015 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2016 }
2017 else if (opcode->format == FMT_D4)
2018 {
2019 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
2020
2021 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2022 number_to_chars_littleendian (f + 2, temp, 4);
2023 }
2024 else if (opcode->format == FMT_D5)
2025 {
2026 unsigned long temp = (((insn & 0xffff) << 16)
2027 | ((extension >> 8) & 0xffff));
2028
2029 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2030 number_to_chars_littleendian (f + 2, temp, 4);
2031 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2032 }
2033 else if (opcode->format == FMT_D8)
2034 {
2035 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
2036
2037 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2038 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
2039 number_to_chars_littleendian (f + 4, temp >> 8, 2);
2040 }
2041 else if (opcode->format == FMT_D9)
2042 {
2043 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
2044
2045 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2046 number_to_chars_littleendian (f + 3, temp, 4);
2047 }
2048
2049 /* Create any fixups. */
2050 for (i = 0; i < fc; i++)
2051 {
2052 const struct mn10300_operand *operand;
2053
2054 operand = &mn10300_operands[fixups[i].opindex];
2055 if (fixups[i].reloc != BFD_RELOC_UNUSED
2056 && fixups[i].reloc != BFD_RELOC_32_GOT_PCREL
2057 && fixups[i].reloc != BFD_RELOC_32_GOTOFF
2058 && fixups[i].reloc != BFD_RELOC_32_PLT_PCREL
2059 && fixups[i].reloc != BFD_RELOC_MN10300_GOT32)
2060 {
2061 reloc_howto_type *reloc_howto;
2062 int size;
2063 int offset;
2064 fixS *fixP;
2065
2066 reloc_howto = bfd_reloc_type_lookup (stdoutput,
2067 fixups[i].reloc);
2068
2069 if (!reloc_howto)
2070 abort ();
2071
2072 size = bfd_get_reloc_size (reloc_howto);
2073
2074 if (size < 1 || size > 4)
2075 abort ();
2076
2077 offset = 4 - size;
2078 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2079 size, &fixups[i].exp,
2080 reloc_howto->pc_relative,
2081 fixups[i].reloc);
2082 }
2083 else
2084 {
2085 int reloc, pcrel, reloc_size, offset;
2086 fixS *fixP;
2087
2088 reloc = BFD_RELOC_NONE;
2089 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2090 reloc = fixups[i].reloc;
2091 /* How big is the reloc? Remember SPLIT relocs are
2092 implicitly 32bits. */
2093 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2094 reloc_size = 32;
2095 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2096 reloc_size = 24;
2097 else
2098 reloc_size = operand->bits;
2099
2100 /* Is the reloc pc-relative? */
2101 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
2102 if (reloc != BFD_RELOC_NONE)
2103 pcrel = bfd_reloc_type_lookup (stdoutput, reloc)->pc_relative;
2104
2105 offset = size - (reloc_size + operand->shift) / 8;
2106
2107 /* Choose a proper BFD relocation type. */
2108 if (reloc != BFD_RELOC_NONE)
2109 ;
2110 else if (pcrel)
2111 {
2112 if (reloc_size == 32)
2113 reloc = BFD_RELOC_32_PCREL;
2114 else if (reloc_size == 16)
2115 reloc = BFD_RELOC_16_PCREL;
2116 else if (reloc_size == 8)
2117 reloc = BFD_RELOC_8_PCREL;
2118 else
2119 abort ();
2120 }
2121 else
2122 {
2123 if (reloc_size == 32)
2124 reloc = BFD_RELOC_32;
2125 else if (reloc_size == 16)
2126 reloc = BFD_RELOC_16;
2127 else if (reloc_size == 8)
2128 reloc = BFD_RELOC_8;
2129 else
2130 abort ();
2131 }
2132
2133 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2134 reloc_size / 8, &fixups[i].exp, pcrel,
2135 ((bfd_reloc_code_real_type) reloc));
2136
2137 if (pcrel)
2138 fixP->fx_offset += offset;
2139 }
2140 }
2141
2142 dwarf2_emit_insn (size);
2143 }
2144
2145 /* Label this frag as one that contains instructions. */
2146 frag_now->tc_frag_data = TRUE;
2147 }
2148
2149 /* If while processing a fixup, a reloc really needs to be created
2150 then it is done here. */
2151
2152 arelent **
2153 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
2154 {
2155 static arelent * no_relocs = NULL;
2156 static arelent * relocs[MAX_RELOC_EXPANSION + 1];
2157 arelent *reloc;
2158
2159 reloc = xmalloc (sizeof (arelent));
2160
2161 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2162 if (reloc->howto == NULL)
2163 {
2164 as_bad_where (fixp->fx_file, fixp->fx_line,
2165 _("reloc %d not supported by object file format"),
2166 (int) fixp->fx_r_type);
2167 free (reloc);
2168 return & no_relocs;
2169 }
2170
2171 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2172 relocs[0] = reloc;
2173 relocs[1] = NULL;
2174
2175 if (fixp->fx_subsy
2176 && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2177 {
2178 fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy);
2179 fixp->fx_subsy = NULL;
2180 }
2181
2182 if (fixp->fx_addsy && fixp->fx_subsy)
2183 {
2184 asection *asec, *ssec;
2185
2186 asec = S_GET_SEGMENT (fixp->fx_addsy);
2187 ssec = S_GET_SEGMENT (fixp->fx_subsy);
2188
2189 reloc->sym_ptr_ptr = NULL;
2190
2191 /* If we have a difference between two (non-absolute) symbols we must
2192 generate two relocs (one for each symbol) and allow the linker to
2193 resolve them - relaxation may change the distances between symbols,
2194 even local symbols defined in the same section. */
2195 if (ssec != absolute_section || asec != absolute_section)
2196 {
2197 arelent * reloc2 = xmalloc (sizeof * reloc);
2198
2199 relocs[0] = reloc2;
2200 relocs[1] = reloc;
2201
2202 reloc2->address = reloc->address;
2203 reloc2->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_MN10300_SYM_DIFF);
2204 reloc2->addend = - S_GET_VALUE (fixp->fx_subsy);
2205 reloc2->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
2206 *reloc2->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
2207
2208 reloc->addend = fixp->fx_offset;
2209 if (asec == absolute_section)
2210 reloc->addend += S_GET_VALUE (fixp->fx_addsy);
2211
2212 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
2213 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2214
2215 fixp->fx_pcrel = 0;
2216 fixp->fx_done = 1;
2217 return relocs;
2218 }
2219 else
2220 {
2221 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
2222
2223 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
2224 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
2225
2226 switch (fixp->fx_r_type)
2227 {
2228 case BFD_RELOC_8:
2229 md_number_to_chars (fixpos, reloc->addend, 1);
2230 break;
2231
2232 case BFD_RELOC_16:
2233 md_number_to_chars (fixpos, reloc->addend, 2);
2234 break;
2235
2236 case BFD_RELOC_24:
2237 md_number_to_chars (fixpos, reloc->addend, 3);
2238 break;
2239
2240 case BFD_RELOC_32:
2241 md_number_to_chars (fixpos, reloc->addend, 4);
2242 break;
2243
2244 default:
2245 reloc->sym_ptr_ptr
2246 = (asymbol **) bfd_abs_section_ptr->symbol_ptr_ptr;
2247 return relocs;
2248 }
2249
2250 if (reloc->sym_ptr_ptr)
2251 free (reloc->sym_ptr_ptr);
2252 free (reloc);
2253 return & no_relocs;
2254 }
2255 }
2256 else
2257 {
2258 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
2259 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2260 reloc->addend = fixp->fx_offset;
2261 }
2262 return relocs;
2263 }
2264
2265 int
2266 md_estimate_size_before_relax (fragS *fragp, asection *seg)
2267 {
2268 if (fragp->fr_subtype == 6
2269 && (!S_IS_DEFINED (fragp->fr_symbol)
2270 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2271 fragp->fr_subtype = 7;
2272 else if (fragp->fr_subtype == 8
2273 && (!S_IS_DEFINED (fragp->fr_symbol)
2274 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2275 fragp->fr_subtype = 9;
2276 else if (fragp->fr_subtype == 10
2277 && (!S_IS_DEFINED (fragp->fr_symbol)
2278 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2279 fragp->fr_subtype = 12;
2280
2281 if (fragp->fr_subtype == 13)
2282 return 3;
2283 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2284 abort ();
2285
2286 return md_relax_table[fragp->fr_subtype].rlx_length;
2287 }
2288
2289 long
2290 md_pcrel_from (fixS *fixp)
2291 {
2292 if (fixp->fx_addsy != NULL && !S_IS_DEFINED (fixp->fx_addsy))
2293 {
2294 /* The symbol is undefined. Let the linker figure it out. */
2295 return 0;
2296 }
2297 return fixp->fx_frag->fr_address + fixp->fx_where;
2298 }
2299
2300 void
2301 md_apply_fix (fixS * fixP, valueT * valP, segT seg)
2302 {
2303 char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal;
2304 int size = 0;
2305 int value = (int) * valP;
2306
2307 assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
2308
2309 /* This should never happen. */
2310 if (seg->flags & SEC_ALLOC)
2311 abort ();
2312
2313 /* The value we are passed in *valuep includes the symbol values.
2314 If we are doing this relocation the code in write.c is going to
2315 call bfd_install_relocation, which is also going to use the symbol
2316 value. That means that if the reloc is fully resolved we want to
2317 use *valuep since bfd_install_relocation is not being used.
2318
2319 However, if the reloc is not fully resolved we do not want to use
2320 *valuep, and must use fx_offset instead. However, if the reloc
2321 is PC relative, we do want to use *valuep since it includes the
2322 result of md_pcrel_from. */
2323 if (fixP->fx_addsy != NULL && ! fixP->fx_pcrel)
2324 value = fixP->fx_offset;
2325
2326 /* If the fix is relative to a symbol which is not defined, or not
2327 in the same segment as the fix, we cannot resolve it here. */
2328 if (fixP->fx_addsy != NULL
2329 && (! S_IS_DEFINED (fixP->fx_addsy)
2330 || (S_GET_SEGMENT (fixP->fx_addsy) != seg)))
2331 {
2332 fixP->fx_done = 0;
2333 return;
2334 }
2335
2336 switch (fixP->fx_r_type)
2337 {
2338 case BFD_RELOC_8:
2339 case BFD_RELOC_8_PCREL:
2340 size = 1;
2341 break;
2342
2343 case BFD_RELOC_16:
2344 case BFD_RELOC_16_PCREL:
2345 size = 2;
2346 break;
2347
2348 case BFD_RELOC_32:
2349 case BFD_RELOC_32_PCREL:
2350 size = 4;
2351 break;
2352
2353 case BFD_RELOC_VTABLE_INHERIT:
2354 case BFD_RELOC_VTABLE_ENTRY:
2355 fixP->fx_done = 0;
2356 return;
2357
2358 case BFD_RELOC_MN10300_ALIGN:
2359 fixP->fx_done = 1;
2360 return;
2361
2362 case BFD_RELOC_NONE:
2363 default:
2364 as_bad_where (fixP->fx_file, fixP->fx_line,
2365 _("Bad relocation fixup type (%d)"), fixP->fx_r_type);
2366 }
2367
2368 md_number_to_chars (fixpos, value, size);
2369
2370 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
2371 if (fixP->fx_addsy == NULL)
2372 fixP->fx_done = 1;
2373 }
2374
2375 /* Return zero if the fixup in fixp should be left alone and not
2376 adjusted. */
2377
2378 bfd_boolean
2379 mn10300_fix_adjustable (struct fix *fixp)
2380 {
2381 if (fixp->fx_pcrel)
2382 {
2383 if (TC_FORCE_RELOCATION_LOCAL (fixp))
2384 return FALSE;
2385 }
2386 /* Non-relative relocs can (and must) be adjusted if they do
2387 not meet the criteria below, or the generic criteria. */
2388 else if (TC_FORCE_RELOCATION (fixp))
2389 return FALSE;
2390
2391 /* Do not adjust relocations involving symbols in code sections,
2392 because it breaks linker relaxations. This could be fixed in the
2393 linker, but this fix is simpler, and it pretty much only affects
2394 object size a little bit. */
2395 if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE)
2396 return FALSE;
2397
2398 /* Likewise, do not adjust symbols that won't be merged, or debug
2399 symbols, because they too break relaxation. We do want to adjust
2400 other mergable symbols, like .rodata, because code relaxations
2401 need section-relative symbols to properly relax them. */
2402 if (! (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE))
2403 return FALSE;
2404
2405 if (strncmp (S_GET_SEGMENT (fixp->fx_addsy)->name, ".debug", 6) == 0)
2406 return FALSE;
2407
2408 return TRUE;
2409 }
2410
2411 static void
2412 set_arch_mach (int mach)
2413 {
2414 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2415 as_warn (_("could not set architecture and machine"));
2416
2417 current_machine = mach;
2418 }
2419
2420 static inline char *
2421 mn10300_end_of_match (char *cont, char *what)
2422 {
2423 int len = strlen (what);
2424
2425 if (strncmp (cont, what, strlen (what)) == 0
2426 && ! is_part_of_name (cont[len]))
2427 return cont + len;
2428
2429 return NULL;
2430 }
2431
2432 int
2433 mn10300_parse_name (char const *name,
2434 expressionS *exprP,
2435 enum expr_mode mode,
2436 char *nextcharP)
2437 {
2438 char *next = input_line_pointer;
2439 char *next_end;
2440 int reloc_type;
2441 segT segment;
2442
2443 exprP->X_op_symbol = NULL;
2444
2445 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
2446 {
2447 if (! GOT_symbol)
2448 GOT_symbol = symbol_find_or_make (name);
2449
2450 exprP->X_add_symbol = GOT_symbol;
2451 no_suffix:
2452 /* If we have an absolute symbol or a reg,
2453 then we know its value now. */
2454 segment = S_GET_SEGMENT (exprP->X_add_symbol);
2455 if (mode != expr_defer && segment == absolute_section)
2456 {
2457 exprP->X_op = O_constant;
2458 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2459 exprP->X_add_symbol = NULL;
2460 }
2461 else if (mode != expr_defer && segment == reg_section)
2462 {
2463 exprP->X_op = O_register;
2464 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2465 exprP->X_add_symbol = NULL;
2466 }
2467 else
2468 {
2469 exprP->X_op = O_symbol;
2470 exprP->X_add_number = 0;
2471 }
2472
2473 return 1;
2474 }
2475
2476 exprP->X_add_symbol = symbol_find_or_make (name);
2477
2478 if (*nextcharP != '@')
2479 goto no_suffix;
2480 else if ((next_end = mn10300_end_of_match (next + 1, "GOTOFF")))
2481 reloc_type = BFD_RELOC_32_GOTOFF;
2482 else if ((next_end = mn10300_end_of_match (next + 1, "GOT")))
2483 reloc_type = BFD_RELOC_MN10300_GOT32;
2484 else if ((next_end = mn10300_end_of_match (next + 1, "PLT")))
2485 reloc_type = BFD_RELOC_32_PLT_PCREL;
2486 else
2487 goto no_suffix;
2488
2489 *input_line_pointer = *nextcharP;
2490 input_line_pointer = next_end;
2491 *nextcharP = *input_line_pointer;
2492 *input_line_pointer = '\0';
2493
2494 exprP->X_op = O_PIC_reloc;
2495 exprP->X_add_number = 0;
2496 exprP->X_md = reloc_type;
2497
2498 return 1;
2499 }
2500
2501 /* The target specific pseudo-ops which we support. */
2502 const pseudo_typeS md_pseudo_table[] =
2503 {
2504 { "am30", set_arch_mach, AM30 },
2505 { "am33", set_arch_mach, AM33 },
2506 { "am33_2", set_arch_mach, AM33_2 },
2507 { "mn10300", set_arch_mach, MN103 },
2508 {NULL, 0, 0}
2509 };
2510
2511 /* Returns FALSE if there is some mn10300 specific reason why the
2512 subtraction of two same-section symbols cannot be computed by
2513 the assembler. */
2514
2515 bfd_boolean
2516 mn10300_allow_local_subtract (expressionS * left, expressionS * right, segT section)
2517 {
2518 bfd_boolean result;
2519 fragS * left_frag;
2520 fragS * right_frag;
2521 fragS * frag;
2522
2523 /* If we are not performing linker relaxation then we have nothing
2524 to worry about. */
2525 if (linkrelax == 0)
2526 return TRUE;
2527
2528 /* If the symbols are not in a code section then they are OK. */
2529 if ((section->flags & SEC_CODE) == 0)
2530 return TRUE;
2531
2532 /* Otherwise we have to scan the fragments between the two symbols.
2533 If any instructions are found then we have to assume that linker
2534 relaxation may change their size and so we must delay resolving
2535 the subtraction until the final link. */
2536 left_frag = symbol_get_frag (left->X_add_symbol);
2537 right_frag = symbol_get_frag (right->X_add_symbol);
2538
2539 if (left_frag == right_frag)
2540 return ! left_frag->tc_frag_data;
2541
2542 result = TRUE;
2543 for (frag = left_frag; frag != NULL; frag = frag->fr_next)
2544 {
2545 if (frag->tc_frag_data)
2546 result = FALSE;
2547 if (frag == right_frag)
2548 break;
2549 }
2550
2551 if (frag == NULL)
2552 for (frag = right_frag; frag != NULL; frag = frag->fr_next)
2553 {
2554 if (frag->tc_frag_data)
2555 result = FALSE;
2556 if (frag == left_frag)
2557 break;
2558 }
2559
2560 if (frag == NULL)
2561 /* The two symbols are on disjoint fragment chains
2562 - we cannot possibly compute their difference. */
2563 return FALSE;
2564
2565 return result;
2566 }
2567
2568 /* When relaxing, we need to output a reloc for any .align directive
2569 that requests alignment to a two byte boundary or larger. */
2570
2571 void
2572 mn10300_handle_align (fragS *frag)
2573 {
2574 if (! linkrelax)
2575 return;
2576
2577 if ((frag->fr_type == rs_align
2578 || frag->fr_type == rs_align_code)
2579 && frag->fr_address + frag->fr_fix > 0
2580 && frag->fr_offset > 1
2581 && now_seg != bss_section
2582 /* Do not create relocs for the merging sections - such
2583 relocs will prevent the contents from being merged. */
2584 && (bfd_get_section_flags (now_seg->owner, now_seg) & SEC_MERGE) == 0)
2585 /* Create a new fixup to record the alignment request. The symbol is
2586 irrelevent but must be present so we use the absolute section symbol.
2587 The offset from the symbol is used to record the power-of-two alignment
2588 value. The size is set to 0 because the frag may already be aligned,
2589 thus causing cvt_frag_to_fill to reduce the size of the frag to zero. */
2590 fix_new (frag, frag->fr_fix, 0, & abs_symbol, frag->fr_offset, FALSE,
2591 BFD_RELOC_MN10300_ALIGN);
2592 }