1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2019 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian
;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian
= 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p
= TARGET_REG_NAMES_P
;
96 static void ppc_macro (char *, const struct powerpc_macro
*);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS
*, offsetT
);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars
[] = "#!";
162 static const char ppc_eabi_comment_chars
[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
167 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
170 const char comment_chars
[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars
[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars
[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS
[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS
[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars
[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment
;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length
;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit
= 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu
= 0;
205 ppc_cpu_t sticky
= 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion
= 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc
= 1,
214 has_small_toc_reloc
= 2
218 /* Warn on emitting data to code sections. */
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table
[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte
, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm
, 0 },
237 { "lcomm", ppc_comm
, 1 },
241 { "bi", ppc_biei
, 0 },
243 { "csect", ppc_csect
, 0 },
244 { "dwsect", ppc_dwsect
, 0 },
245 { "data", ppc_section
, 'd' },
249 { "ei", ppc_biei
, 1 },
251 { "extern", ppc_extern
, 0 },
252 { "function", ppc_function
, 0 },
253 { "lglobl", ppc_lglobl
, 0 },
254 { "ref", ppc_ref
, 0 },
255 { "rename", ppc_rename
, 0 },
256 { "section", ppc_named_section
, 0 },
257 { "stabx", ppc_stabx
, 0 },
258 { "text", ppc_section
, 't' },
259 { "toc", ppc_toc
, 0 },
260 { "long", ppc_xcoff_cons
, 2 },
261 { "llong", ppc_xcoff_cons
, 3 },
262 { "word", ppc_xcoff_cons
, 1 },
263 { "short", ppc_xcoff_cons
, 1 },
264 { "vbyte", ppc_vbyte
, 0 },
268 { "llong", cons
, 8 },
269 { "rdata", ppc_elf_rdata
, 0 },
270 { "rodata", ppc_elf_rdata
, 0 },
271 { "lcomm", ppc_elf_lcomm
, 0 },
272 { "localentry", ppc_elf_localentry
, 0 },
273 { "abiversion", ppc_elf_abiversion
, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous
, 0 },
280 { "pdata", ppc_pdata
, 0 },
281 { "ydata", ppc_ydata
, 0 },
282 { "reldata", ppc_reldata
, 0 },
283 { "rdata", ppc_rdata
, 0 },
284 { "ualong", ppc_ualong
, 0 },
285 { "znop", ppc_znop
, 0 },
286 { "comm", ppc_pe_comm
, 0 },
287 { "lcomm", ppc_pe_comm
, 1 },
288 { "section", ppc_pe_section
, 0 },
289 { "function", ppc_pe_function
,0 },
290 { "tocd", ppc_pe_tocd
, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine
, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value
;
311 unsigned short flags
;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers
[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG
},
351 { "cr.1", 1, PPC_OPERAND_CR_REG
},
352 { "cr.2", 2, PPC_OPERAND_CR_REG
},
353 { "cr.3", 3, PPC_OPERAND_CR_REG
},
354 { "cr.4", 4, PPC_OPERAND_CR_REG
},
355 { "cr.5", 5, PPC_OPERAND_CR_REG
},
356 { "cr.6", 6, PPC_OPERAND_CR_REG
},
357 { "cr.7", 7, PPC_OPERAND_CR_REG
},
359 { "cr0", 0, PPC_OPERAND_CR_REG
},
360 { "cr1", 1, PPC_OPERAND_CR_REG
},
361 { "cr2", 2, PPC_OPERAND_CR_REG
},
362 { "cr3", 3, PPC_OPERAND_CR_REG
},
363 { "cr4", 4, PPC_OPERAND_CR_REG
},
364 { "cr5", 5, PPC_OPERAND_CR_REG
},
365 { "cr6", 6, PPC_OPERAND_CR_REG
},
366 { "cr7", 7, PPC_OPERAND_CR_REG
},
368 { "ctr", 9, PPC_OPERAND_SPR
},
369 { "dar", 19, PPC_OPERAND_SPR
},
370 { "dec", 22, PPC_OPERAND_SPR
},
371 { "dsisr", 18, PPC_OPERAND_SPR
},
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR
},
375 { "f.1", 1, PPC_OPERAND_FPR
},
376 { "f.10", 10, PPC_OPERAND_FPR
},
377 { "f.11", 11, PPC_OPERAND_FPR
},
378 { "f.12", 12, PPC_OPERAND_FPR
},
379 { "f.13", 13, PPC_OPERAND_FPR
},
380 { "f.14", 14, PPC_OPERAND_FPR
},
381 { "f.15", 15, PPC_OPERAND_FPR
},
382 { "f.16", 16, PPC_OPERAND_FPR
},
383 { "f.17", 17, PPC_OPERAND_FPR
},
384 { "f.18", 18, PPC_OPERAND_FPR
},
385 { "f.19", 19, PPC_OPERAND_FPR
},
386 { "f.2", 2, PPC_OPERAND_FPR
},
387 { "f.20", 20, PPC_OPERAND_FPR
},
388 { "f.21", 21, PPC_OPERAND_FPR
},
389 { "f.22", 22, PPC_OPERAND_FPR
},
390 { "f.23", 23, PPC_OPERAND_FPR
},
391 { "f.24", 24, PPC_OPERAND_FPR
},
392 { "f.25", 25, PPC_OPERAND_FPR
},
393 { "f.26", 26, PPC_OPERAND_FPR
},
394 { "f.27", 27, PPC_OPERAND_FPR
},
395 { "f.28", 28, PPC_OPERAND_FPR
},
396 { "f.29", 29, PPC_OPERAND_FPR
},
397 { "f.3", 3, PPC_OPERAND_FPR
},
398 { "f.30", 30, PPC_OPERAND_FPR
},
399 { "f.31", 31, PPC_OPERAND_FPR
},
400 { "f.32", 32, PPC_OPERAND_VSR
},
401 { "f.33", 33, PPC_OPERAND_VSR
},
402 { "f.34", 34, PPC_OPERAND_VSR
},
403 { "f.35", 35, PPC_OPERAND_VSR
},
404 { "f.36", 36, PPC_OPERAND_VSR
},
405 { "f.37", 37, PPC_OPERAND_VSR
},
406 { "f.38", 38, PPC_OPERAND_VSR
},
407 { "f.39", 39, PPC_OPERAND_VSR
},
408 { "f.4", 4, PPC_OPERAND_FPR
},
409 { "f.40", 40, PPC_OPERAND_VSR
},
410 { "f.41", 41, PPC_OPERAND_VSR
},
411 { "f.42", 42, PPC_OPERAND_VSR
},
412 { "f.43", 43, PPC_OPERAND_VSR
},
413 { "f.44", 44, PPC_OPERAND_VSR
},
414 { "f.45", 45, PPC_OPERAND_VSR
},
415 { "f.46", 46, PPC_OPERAND_VSR
},
416 { "f.47", 47, PPC_OPERAND_VSR
},
417 { "f.48", 48, PPC_OPERAND_VSR
},
418 { "f.49", 49, PPC_OPERAND_VSR
},
419 { "f.5", 5, PPC_OPERAND_FPR
},
420 { "f.50", 50, PPC_OPERAND_VSR
},
421 { "f.51", 51, PPC_OPERAND_VSR
},
422 { "f.52", 52, PPC_OPERAND_VSR
},
423 { "f.53", 53, PPC_OPERAND_VSR
},
424 { "f.54", 54, PPC_OPERAND_VSR
},
425 { "f.55", 55, PPC_OPERAND_VSR
},
426 { "f.56", 56, PPC_OPERAND_VSR
},
427 { "f.57", 57, PPC_OPERAND_VSR
},
428 { "f.58", 58, PPC_OPERAND_VSR
},
429 { "f.59", 59, PPC_OPERAND_VSR
},
430 { "f.6", 6, PPC_OPERAND_FPR
},
431 { "f.60", 60, PPC_OPERAND_VSR
},
432 { "f.61", 61, PPC_OPERAND_VSR
},
433 { "f.62", 62, PPC_OPERAND_VSR
},
434 { "f.63", 63, PPC_OPERAND_VSR
},
435 { "f.7", 7, PPC_OPERAND_FPR
},
436 { "f.8", 8, PPC_OPERAND_FPR
},
437 { "f.9", 9, PPC_OPERAND_FPR
},
439 { "f0", 0, PPC_OPERAND_FPR
},
440 { "f1", 1, PPC_OPERAND_FPR
},
441 { "f10", 10, PPC_OPERAND_FPR
},
442 { "f11", 11, PPC_OPERAND_FPR
},
443 { "f12", 12, PPC_OPERAND_FPR
},
444 { "f13", 13, PPC_OPERAND_FPR
},
445 { "f14", 14, PPC_OPERAND_FPR
},
446 { "f15", 15, PPC_OPERAND_FPR
},
447 { "f16", 16, PPC_OPERAND_FPR
},
448 { "f17", 17, PPC_OPERAND_FPR
},
449 { "f18", 18, PPC_OPERAND_FPR
},
450 { "f19", 19, PPC_OPERAND_FPR
},
451 { "f2", 2, PPC_OPERAND_FPR
},
452 { "f20", 20, PPC_OPERAND_FPR
},
453 { "f21", 21, PPC_OPERAND_FPR
},
454 { "f22", 22, PPC_OPERAND_FPR
},
455 { "f23", 23, PPC_OPERAND_FPR
},
456 { "f24", 24, PPC_OPERAND_FPR
},
457 { "f25", 25, PPC_OPERAND_FPR
},
458 { "f26", 26, PPC_OPERAND_FPR
},
459 { "f27", 27, PPC_OPERAND_FPR
},
460 { "f28", 28, PPC_OPERAND_FPR
},
461 { "f29", 29, PPC_OPERAND_FPR
},
462 { "f3", 3, PPC_OPERAND_FPR
},
463 { "f30", 30, PPC_OPERAND_FPR
},
464 { "f31", 31, PPC_OPERAND_FPR
},
465 { "f32", 32, PPC_OPERAND_VSR
},
466 { "f33", 33, PPC_OPERAND_VSR
},
467 { "f34", 34, PPC_OPERAND_VSR
},
468 { "f35", 35, PPC_OPERAND_VSR
},
469 { "f36", 36, PPC_OPERAND_VSR
},
470 { "f37", 37, PPC_OPERAND_VSR
},
471 { "f38", 38, PPC_OPERAND_VSR
},
472 { "f39", 39, PPC_OPERAND_VSR
},
473 { "f4", 4, PPC_OPERAND_FPR
},
474 { "f40", 40, PPC_OPERAND_VSR
},
475 { "f41", 41, PPC_OPERAND_VSR
},
476 { "f42", 42, PPC_OPERAND_VSR
},
477 { "f43", 43, PPC_OPERAND_VSR
},
478 { "f44", 44, PPC_OPERAND_VSR
},
479 { "f45", 45, PPC_OPERAND_VSR
},
480 { "f46", 46, PPC_OPERAND_VSR
},
481 { "f47", 47, PPC_OPERAND_VSR
},
482 { "f48", 48, PPC_OPERAND_VSR
},
483 { "f49", 49, PPC_OPERAND_VSR
},
484 { "f5", 5, PPC_OPERAND_FPR
},
485 { "f50", 50, PPC_OPERAND_VSR
},
486 { "f51", 51, PPC_OPERAND_VSR
},
487 { "f52", 52, PPC_OPERAND_VSR
},
488 { "f53", 53, PPC_OPERAND_VSR
},
489 { "f54", 54, PPC_OPERAND_VSR
},
490 { "f55", 55, PPC_OPERAND_VSR
},
491 { "f56", 56, PPC_OPERAND_VSR
},
492 { "f57", 57, PPC_OPERAND_VSR
},
493 { "f58", 58, PPC_OPERAND_VSR
},
494 { "f59", 59, PPC_OPERAND_VSR
},
495 { "f6", 6, PPC_OPERAND_FPR
},
496 { "f60", 60, PPC_OPERAND_VSR
},
497 { "f61", 61, PPC_OPERAND_VSR
},
498 { "f62", 62, PPC_OPERAND_VSR
},
499 { "f63", 63, PPC_OPERAND_VSR
},
500 { "f7", 7, PPC_OPERAND_FPR
},
501 { "f8", 8, PPC_OPERAND_FPR
},
502 { "f9", 9, PPC_OPERAND_FPR
},
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR
},
506 { "gqr.1", 1, PPC_OPERAND_GQR
},
507 { "gqr.2", 2, PPC_OPERAND_GQR
},
508 { "gqr.3", 3, PPC_OPERAND_GQR
},
509 { "gqr.4", 4, PPC_OPERAND_GQR
},
510 { "gqr.5", 5, PPC_OPERAND_GQR
},
511 { "gqr.6", 6, PPC_OPERAND_GQR
},
512 { "gqr.7", 7, PPC_OPERAND_GQR
},
513 { "gqr0", 0, PPC_OPERAND_GQR
},
514 { "gqr1", 1, PPC_OPERAND_GQR
},
515 { "gqr2", 2, PPC_OPERAND_GQR
},
516 { "gqr3", 3, PPC_OPERAND_GQR
},
517 { "gqr4", 4, PPC_OPERAND_GQR
},
518 { "gqr5", 5, PPC_OPERAND_GQR
},
519 { "gqr6", 6, PPC_OPERAND_GQR
},
520 { "gqr7", 7, PPC_OPERAND_GQR
},
522 { "lr", 8, PPC_OPERAND_SPR
},
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR
},
526 { "r.1", 1, PPC_OPERAND_GPR
},
527 { "r.10", 10, PPC_OPERAND_GPR
},
528 { "r.11", 11, PPC_OPERAND_GPR
},
529 { "r.12", 12, PPC_OPERAND_GPR
},
530 { "r.13", 13, PPC_OPERAND_GPR
},
531 { "r.14", 14, PPC_OPERAND_GPR
},
532 { "r.15", 15, PPC_OPERAND_GPR
},
533 { "r.16", 16, PPC_OPERAND_GPR
},
534 { "r.17", 17, PPC_OPERAND_GPR
},
535 { "r.18", 18, PPC_OPERAND_GPR
},
536 { "r.19", 19, PPC_OPERAND_GPR
},
537 { "r.2", 2, PPC_OPERAND_GPR
},
538 { "r.20", 20, PPC_OPERAND_GPR
},
539 { "r.21", 21, PPC_OPERAND_GPR
},
540 { "r.22", 22, PPC_OPERAND_GPR
},
541 { "r.23", 23, PPC_OPERAND_GPR
},
542 { "r.24", 24, PPC_OPERAND_GPR
},
543 { "r.25", 25, PPC_OPERAND_GPR
},
544 { "r.26", 26, PPC_OPERAND_GPR
},
545 { "r.27", 27, PPC_OPERAND_GPR
},
546 { "r.28", 28, PPC_OPERAND_GPR
},
547 { "r.29", 29, PPC_OPERAND_GPR
},
548 { "r.3", 3, PPC_OPERAND_GPR
},
549 { "r.30", 30, PPC_OPERAND_GPR
},
550 { "r.31", 31, PPC_OPERAND_GPR
},
551 { "r.4", 4, PPC_OPERAND_GPR
},
552 { "r.5", 5, PPC_OPERAND_GPR
},
553 { "r.6", 6, PPC_OPERAND_GPR
},
554 { "r.7", 7, PPC_OPERAND_GPR
},
555 { "r.8", 8, PPC_OPERAND_GPR
},
556 { "r.9", 9, PPC_OPERAND_GPR
},
558 { "r.sp", 1, PPC_OPERAND_GPR
},
560 { "r.toc", 2, PPC_OPERAND_GPR
},
562 { "r0", 0, PPC_OPERAND_GPR
},
563 { "r1", 1, PPC_OPERAND_GPR
},
564 { "r10", 10, PPC_OPERAND_GPR
},
565 { "r11", 11, PPC_OPERAND_GPR
},
566 { "r12", 12, PPC_OPERAND_GPR
},
567 { "r13", 13, PPC_OPERAND_GPR
},
568 { "r14", 14, PPC_OPERAND_GPR
},
569 { "r15", 15, PPC_OPERAND_GPR
},
570 { "r16", 16, PPC_OPERAND_GPR
},
571 { "r17", 17, PPC_OPERAND_GPR
},
572 { "r18", 18, PPC_OPERAND_GPR
},
573 { "r19", 19, PPC_OPERAND_GPR
},
574 { "r2", 2, PPC_OPERAND_GPR
},
575 { "r20", 20, PPC_OPERAND_GPR
},
576 { "r21", 21, PPC_OPERAND_GPR
},
577 { "r22", 22, PPC_OPERAND_GPR
},
578 { "r23", 23, PPC_OPERAND_GPR
},
579 { "r24", 24, PPC_OPERAND_GPR
},
580 { "r25", 25, PPC_OPERAND_GPR
},
581 { "r26", 26, PPC_OPERAND_GPR
},
582 { "r27", 27, PPC_OPERAND_GPR
},
583 { "r28", 28, PPC_OPERAND_GPR
},
584 { "r29", 29, PPC_OPERAND_GPR
},
585 { "r3", 3, PPC_OPERAND_GPR
},
586 { "r30", 30, PPC_OPERAND_GPR
},
587 { "r31", 31, PPC_OPERAND_GPR
},
588 { "r4", 4, PPC_OPERAND_GPR
},
589 { "r5", 5, PPC_OPERAND_GPR
},
590 { "r6", 6, PPC_OPERAND_GPR
},
591 { "r7", 7, PPC_OPERAND_GPR
},
592 { "r8", 8, PPC_OPERAND_GPR
},
593 { "r9", 9, PPC_OPERAND_GPR
},
595 { "rtoc", 2, PPC_OPERAND_GPR
},
597 { "sdr1", 25, PPC_OPERAND_SPR
},
599 { "sp", 1, PPC_OPERAND_GPR
},
601 { "srr0", 26, PPC_OPERAND_SPR
},
602 { "srr1", 27, PPC_OPERAND_SPR
},
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR
},
606 { "v.1", 1, PPC_OPERAND_VR
},
607 { "v.10", 10, PPC_OPERAND_VR
},
608 { "v.11", 11, PPC_OPERAND_VR
},
609 { "v.12", 12, PPC_OPERAND_VR
},
610 { "v.13", 13, PPC_OPERAND_VR
},
611 { "v.14", 14, PPC_OPERAND_VR
},
612 { "v.15", 15, PPC_OPERAND_VR
},
613 { "v.16", 16, PPC_OPERAND_VR
},
614 { "v.17", 17, PPC_OPERAND_VR
},
615 { "v.18", 18, PPC_OPERAND_VR
},
616 { "v.19", 19, PPC_OPERAND_VR
},
617 { "v.2", 2, PPC_OPERAND_VR
},
618 { "v.20", 20, PPC_OPERAND_VR
},
619 { "v.21", 21, PPC_OPERAND_VR
},
620 { "v.22", 22, PPC_OPERAND_VR
},
621 { "v.23", 23, PPC_OPERAND_VR
},
622 { "v.24", 24, PPC_OPERAND_VR
},
623 { "v.25", 25, PPC_OPERAND_VR
},
624 { "v.26", 26, PPC_OPERAND_VR
},
625 { "v.27", 27, PPC_OPERAND_VR
},
626 { "v.28", 28, PPC_OPERAND_VR
},
627 { "v.29", 29, PPC_OPERAND_VR
},
628 { "v.3", 3, PPC_OPERAND_VR
},
629 { "v.30", 30, PPC_OPERAND_VR
},
630 { "v.31", 31, PPC_OPERAND_VR
},
631 { "v.4", 4, PPC_OPERAND_VR
},
632 { "v.5", 5, PPC_OPERAND_VR
},
633 { "v.6", 6, PPC_OPERAND_VR
},
634 { "v.7", 7, PPC_OPERAND_VR
},
635 { "v.8", 8, PPC_OPERAND_VR
},
636 { "v.9", 9, PPC_OPERAND_VR
},
638 { "v0", 0, PPC_OPERAND_VR
},
639 { "v1", 1, PPC_OPERAND_VR
},
640 { "v10", 10, PPC_OPERAND_VR
},
641 { "v11", 11, PPC_OPERAND_VR
},
642 { "v12", 12, PPC_OPERAND_VR
},
643 { "v13", 13, PPC_OPERAND_VR
},
644 { "v14", 14, PPC_OPERAND_VR
},
645 { "v15", 15, PPC_OPERAND_VR
},
646 { "v16", 16, PPC_OPERAND_VR
},
647 { "v17", 17, PPC_OPERAND_VR
},
648 { "v18", 18, PPC_OPERAND_VR
},
649 { "v19", 19, PPC_OPERAND_VR
},
650 { "v2", 2, PPC_OPERAND_VR
},
651 { "v20", 20, PPC_OPERAND_VR
},
652 { "v21", 21, PPC_OPERAND_VR
},
653 { "v22", 22, PPC_OPERAND_VR
},
654 { "v23", 23, PPC_OPERAND_VR
},
655 { "v24", 24, PPC_OPERAND_VR
},
656 { "v25", 25, PPC_OPERAND_VR
},
657 { "v26", 26, PPC_OPERAND_VR
},
658 { "v27", 27, PPC_OPERAND_VR
},
659 { "v28", 28, PPC_OPERAND_VR
},
660 { "v29", 29, PPC_OPERAND_VR
},
661 { "v3", 3, PPC_OPERAND_VR
},
662 { "v30", 30, PPC_OPERAND_VR
},
663 { "v31", 31, PPC_OPERAND_VR
},
664 { "v4", 4, PPC_OPERAND_VR
},
665 { "v5", 5, PPC_OPERAND_VR
},
666 { "v6", 6, PPC_OPERAND_VR
},
667 { "v7", 7, PPC_OPERAND_VR
},
668 { "v8", 8, PPC_OPERAND_VR
},
669 { "v9", 9, PPC_OPERAND_VR
},
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR
},
673 { "vs.1", 1, PPC_OPERAND_VSR
},
674 { "vs.10", 10, PPC_OPERAND_VSR
},
675 { "vs.11", 11, PPC_OPERAND_VSR
},
676 { "vs.12", 12, PPC_OPERAND_VSR
},
677 { "vs.13", 13, PPC_OPERAND_VSR
},
678 { "vs.14", 14, PPC_OPERAND_VSR
},
679 { "vs.15", 15, PPC_OPERAND_VSR
},
680 { "vs.16", 16, PPC_OPERAND_VSR
},
681 { "vs.17", 17, PPC_OPERAND_VSR
},
682 { "vs.18", 18, PPC_OPERAND_VSR
},
683 { "vs.19", 19, PPC_OPERAND_VSR
},
684 { "vs.2", 2, PPC_OPERAND_VSR
},
685 { "vs.20", 20, PPC_OPERAND_VSR
},
686 { "vs.21", 21, PPC_OPERAND_VSR
},
687 { "vs.22", 22, PPC_OPERAND_VSR
},
688 { "vs.23", 23, PPC_OPERAND_VSR
},
689 { "vs.24", 24, PPC_OPERAND_VSR
},
690 { "vs.25", 25, PPC_OPERAND_VSR
},
691 { "vs.26", 26, PPC_OPERAND_VSR
},
692 { "vs.27", 27, PPC_OPERAND_VSR
},
693 { "vs.28", 28, PPC_OPERAND_VSR
},
694 { "vs.29", 29, PPC_OPERAND_VSR
},
695 { "vs.3", 3, PPC_OPERAND_VSR
},
696 { "vs.30", 30, PPC_OPERAND_VSR
},
697 { "vs.31", 31, PPC_OPERAND_VSR
},
698 { "vs.32", 32, PPC_OPERAND_VSR
},
699 { "vs.33", 33, PPC_OPERAND_VSR
},
700 { "vs.34", 34, PPC_OPERAND_VSR
},
701 { "vs.35", 35, PPC_OPERAND_VSR
},
702 { "vs.36", 36, PPC_OPERAND_VSR
},
703 { "vs.37", 37, PPC_OPERAND_VSR
},
704 { "vs.38", 38, PPC_OPERAND_VSR
},
705 { "vs.39", 39, PPC_OPERAND_VSR
},
706 { "vs.4", 4, PPC_OPERAND_VSR
},
707 { "vs.40", 40, PPC_OPERAND_VSR
},
708 { "vs.41", 41, PPC_OPERAND_VSR
},
709 { "vs.42", 42, PPC_OPERAND_VSR
},
710 { "vs.43", 43, PPC_OPERAND_VSR
},
711 { "vs.44", 44, PPC_OPERAND_VSR
},
712 { "vs.45", 45, PPC_OPERAND_VSR
},
713 { "vs.46", 46, PPC_OPERAND_VSR
},
714 { "vs.47", 47, PPC_OPERAND_VSR
},
715 { "vs.48", 48, PPC_OPERAND_VSR
},
716 { "vs.49", 49, PPC_OPERAND_VSR
},
717 { "vs.5", 5, PPC_OPERAND_VSR
},
718 { "vs.50", 50, PPC_OPERAND_VSR
},
719 { "vs.51", 51, PPC_OPERAND_VSR
},
720 { "vs.52", 52, PPC_OPERAND_VSR
},
721 { "vs.53", 53, PPC_OPERAND_VSR
},
722 { "vs.54", 54, PPC_OPERAND_VSR
},
723 { "vs.55", 55, PPC_OPERAND_VSR
},
724 { "vs.56", 56, PPC_OPERAND_VSR
},
725 { "vs.57", 57, PPC_OPERAND_VSR
},
726 { "vs.58", 58, PPC_OPERAND_VSR
},
727 { "vs.59", 59, PPC_OPERAND_VSR
},
728 { "vs.6", 6, PPC_OPERAND_VSR
},
729 { "vs.60", 60, PPC_OPERAND_VSR
},
730 { "vs.61", 61, PPC_OPERAND_VSR
},
731 { "vs.62", 62, PPC_OPERAND_VSR
},
732 { "vs.63", 63, PPC_OPERAND_VSR
},
733 { "vs.7", 7, PPC_OPERAND_VSR
},
734 { "vs.8", 8, PPC_OPERAND_VSR
},
735 { "vs.9", 9, PPC_OPERAND_VSR
},
737 { "vs0", 0, PPC_OPERAND_VSR
},
738 { "vs1", 1, PPC_OPERAND_VSR
},
739 { "vs10", 10, PPC_OPERAND_VSR
},
740 { "vs11", 11, PPC_OPERAND_VSR
},
741 { "vs12", 12, PPC_OPERAND_VSR
},
742 { "vs13", 13, PPC_OPERAND_VSR
},
743 { "vs14", 14, PPC_OPERAND_VSR
},
744 { "vs15", 15, PPC_OPERAND_VSR
},
745 { "vs16", 16, PPC_OPERAND_VSR
},
746 { "vs17", 17, PPC_OPERAND_VSR
},
747 { "vs18", 18, PPC_OPERAND_VSR
},
748 { "vs19", 19, PPC_OPERAND_VSR
},
749 { "vs2", 2, PPC_OPERAND_VSR
},
750 { "vs20", 20, PPC_OPERAND_VSR
},
751 { "vs21", 21, PPC_OPERAND_VSR
},
752 { "vs22", 22, PPC_OPERAND_VSR
},
753 { "vs23", 23, PPC_OPERAND_VSR
},
754 { "vs24", 24, PPC_OPERAND_VSR
},
755 { "vs25", 25, PPC_OPERAND_VSR
},
756 { "vs26", 26, PPC_OPERAND_VSR
},
757 { "vs27", 27, PPC_OPERAND_VSR
},
758 { "vs28", 28, PPC_OPERAND_VSR
},
759 { "vs29", 29, PPC_OPERAND_VSR
},
760 { "vs3", 3, PPC_OPERAND_VSR
},
761 { "vs30", 30, PPC_OPERAND_VSR
},
762 { "vs31", 31, PPC_OPERAND_VSR
},
763 { "vs32", 32, PPC_OPERAND_VSR
},
764 { "vs33", 33, PPC_OPERAND_VSR
},
765 { "vs34", 34, PPC_OPERAND_VSR
},
766 { "vs35", 35, PPC_OPERAND_VSR
},
767 { "vs36", 36, PPC_OPERAND_VSR
},
768 { "vs37", 37, PPC_OPERAND_VSR
},
769 { "vs38", 38, PPC_OPERAND_VSR
},
770 { "vs39", 39, PPC_OPERAND_VSR
},
771 { "vs4", 4, PPC_OPERAND_VSR
},
772 { "vs40", 40, PPC_OPERAND_VSR
},
773 { "vs41", 41, PPC_OPERAND_VSR
},
774 { "vs42", 42, PPC_OPERAND_VSR
},
775 { "vs43", 43, PPC_OPERAND_VSR
},
776 { "vs44", 44, PPC_OPERAND_VSR
},
777 { "vs45", 45, PPC_OPERAND_VSR
},
778 { "vs46", 46, PPC_OPERAND_VSR
},
779 { "vs47", 47, PPC_OPERAND_VSR
},
780 { "vs48", 48, PPC_OPERAND_VSR
},
781 { "vs49", 49, PPC_OPERAND_VSR
},
782 { "vs5", 5, PPC_OPERAND_VSR
},
783 { "vs50", 50, PPC_OPERAND_VSR
},
784 { "vs51", 51, PPC_OPERAND_VSR
},
785 { "vs52", 52, PPC_OPERAND_VSR
},
786 { "vs53", 53, PPC_OPERAND_VSR
},
787 { "vs54", 54, PPC_OPERAND_VSR
},
788 { "vs55", 55, PPC_OPERAND_VSR
},
789 { "vs56", 56, PPC_OPERAND_VSR
},
790 { "vs57", 57, PPC_OPERAND_VSR
},
791 { "vs58", 58, PPC_OPERAND_VSR
},
792 { "vs59", 59, PPC_OPERAND_VSR
},
793 { "vs6", 6, PPC_OPERAND_VSR
},
794 { "vs60", 60, PPC_OPERAND_VSR
},
795 { "vs61", 61, PPC_OPERAND_VSR
},
796 { "vs62", 62, PPC_OPERAND_VSR
},
797 { "vs63", 63, PPC_OPERAND_VSR
},
798 { "vs7", 7, PPC_OPERAND_VSR
},
799 { "vs8", 8, PPC_OPERAND_VSR
},
800 { "vs9", 9, PPC_OPERAND_VSR
},
802 { "xer", 1, PPC_OPERAND_SPR
}
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg
*
811 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
813 int middle
, low
, high
;
821 middle
= (low
+ high
) / 2;
822 cmp
= strcasecmp (name
, regs
[middle
].name
);
828 return ®s
[middle
];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS
*expressionP
)
850 const struct pd_reg
*reg
;
855 /* Find the spelling of the operand. */
856 start
= name
= input_line_pointer
;
857 if (name
[0] == '%' && ISALPHA (name
[1]))
858 name
= ++input_line_pointer
;
860 else if (!reg_names_p
|| !ISALPHA (name
[0]))
863 c
= get_symbol_name (&name
);
864 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
866 /* Put back the delimiting char. */
867 *input_line_pointer
= c
;
869 /* Look to see if it's in the register table. */
872 expressionP
->X_op
= O_register
;
873 expressionP
->X_add_number
= reg
->value
;
874 expressionP
->X_md
= reg
->flags
;
876 /* Make the rest nice. */
877 expressionP
->X_add_symbol
= NULL
;
878 expressionP
->X_op_symbol
= NULL
;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer
= start
;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand
;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names
[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG
},
898 { "cr1", 1, PPC_OPERAND_CR_REG
},
899 { "cr2", 2, PPC_OPERAND_CR_REG
},
900 { "cr3", 3, PPC_OPERAND_CR_REG
},
901 { "cr4", 4, PPC_OPERAND_CR_REG
},
902 { "cr5", 5, PPC_OPERAND_CR_REG
},
903 { "cr6", 6, PPC_OPERAND_CR_REG
},
904 { "cr7", 7, PPC_OPERAND_CR_REG
},
905 { "eq", 2, PPC_OPERAND_CR_BIT
},
906 { "gt", 1, PPC_OPERAND_CR_BIT
},
907 { "lt", 0, PPC_OPERAND_CR_BIT
},
908 { "so", 3, PPC_OPERAND_CR_BIT
},
909 { "un", 3, PPC_OPERAND_CR_BIT
}
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name
, expressionS
*exp
)
918 const struct pd_reg
*reg
;
925 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
930 exp
->X_op
= O_register
;
931 exp
->X_add_number
= reg
->value
;
932 exp
->X_md
= reg
->flags
;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right
->X_op
== O_register
946 && right
->X_md
== PPC_OPERAND_CR_REG
947 && left
->X_op
== O_constant
948 && left
->X_add_number
== 4)
949 || (left
->X_op
== O_register
950 && left
->X_md
== PPC_OPERAND_CR_REG
951 && right
->X_op
== O_constant
952 && right
->X_add_number
== 4)))
954 left
->X_op
= O_register
;
955 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
956 left
->X_add_number
*= right
->X_add_number
;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right
->X_op
== O_register
962 && left
->X_op
== O_register
964 && ((right
->X_md
== PPC_OPERAND_CR_BIT
965 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
966 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
967 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
969 left
->X_md
= PPC_OPERAND_CR_BIT
;
970 right
->X_op
= O_constant
;
974 /* Accept reg +/- constant. */
975 if (left
->X_op
== O_register
976 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right
->X_op
== O_register
)
982 if (op
== O_add
&& left
->X_op
== O_constant
)
983 left
->X_md
= right
->X_md
;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
996 /* Opcode hash table. */
997 static struct hash_control
*ppc_hash
;
999 /* Macro hash table. */
1000 static struct hash_control
*ppc_macro_hash
;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags
= 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris
= SOLARIS_P
;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment
= 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS
*ppc_text_csects
;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment
= 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS
*ppc_data_csects
;
1039 /* The current csect. */
1040 static symbolS
*ppc_current_csect
;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS
*ppc_toc_csect
;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS
*ppc_toc_frag
;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS
*ppc_after_toc_frag
;
1056 /* The current static block. */
1057 static symbolS
*ppc_current_block
;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection
*ppc_coff_debug_section
;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection
{
1066 /* Subsections are simply linked. */
1067 struct dw_subsection
*link
;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp
;
1076 static struct dw_section
{
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection
*list_subseg
;
1083 /* The anonymous subsection. */
1084 struct dw_subsection
*anon_subseg
;
1085 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section
;
1092 static segT pdata_section
;
1093 static segT reldata_section
;
1094 static segT rdata_section
;
1095 static segT tocdata_section
;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section
;
1099 static segT ppc_current_section
;
1104 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list
;
1106 unsigned int ppc_apuinfo_num
;
1107 unsigned int ppc_apuinfo_num_alloc
;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1113 const char *const md_shortopts
= "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts
[] = {
1117 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1118 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1119 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1120 {NULL
, no_argument
, NULL
, 0}
1122 const size_t md_longopts_size
= sizeof (md_longopts
);
1125 md_parse_option (int c
, const char *arg
)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg
, "e") == 0)
1142 target_big_endian
= 0;
1143 set_target_endian
= 1;
1144 if (ppc_cpu
& PPC_OPCODE_VLE
)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg
, "e") == 0)
1155 target_big_endian
= 1;
1156 set_target_endian
= 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1168 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg
, "64") == 0)
1182 if (ppc_cpu
& PPC_OPCODE_VLE
)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg
, "32") == 0)
1195 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1200 if (strcmp (arg
, "vle") == 0)
1202 if (set_target_endian
&& target_big_endian
== 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1205 as_bad (_("the use of -mvle requires -a32."));
1209 else if (strcmp (arg
, "no-vle") == 0)
1211 sticky
&= ~PPC_OPCODE_VLE
;
1213 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1214 new_cpu
&= ~PPC_OPCODE_VLE
;
1219 else if (strcmp (arg
, "regnames") == 0)
1222 else if (strcmp (arg
, "no-regnames") == 0)
1223 reg_names_p
= FALSE
;
1226 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1227 that require relocation. */
1228 else if (strcmp (arg
, "relocatable") == 0)
1230 shlib
= SHLIB_MRELOCATABLE
;
1231 ppc_flags
|= EF_PPC_RELOCATABLE
;
1234 else if (strcmp (arg
, "relocatable-lib") == 0)
1236 shlib
= SHLIB_MRELOCATABLE
;
1237 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1240 /* -memb, set embedded bit. */
1241 else if (strcmp (arg
, "emb") == 0)
1242 ppc_flags
|= EF_PPC_EMB
;
1244 /* -mlittle/-mbig set the endianness. */
1245 else if (strcmp (arg
, "little") == 0
1246 || strcmp (arg
, "little-endian") == 0)
1248 target_big_endian
= 0;
1249 set_target_endian
= 1;
1250 if (ppc_cpu
& PPC_OPCODE_VLE
)
1251 as_bad (_("the use of -mvle requires big endian."));
1254 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1256 target_big_endian
= 1;
1257 set_target_endian
= 1;
1260 else if (strcmp (arg
, "solaris") == 0)
1263 ppc_comment_chars
= ppc_solaris_comment_chars
;
1266 else if (strcmp (arg
, "no-solaris") == 0)
1269 ppc_comment_chars
= ppc_eabi_comment_chars
;
1271 else if (strcmp (arg
, "spe2") == 0)
1273 ppc_cpu
|= PPC_OPCODE_SPE2
;
1278 as_bad (_("invalid switch -m%s"), arg
);
1284 /* -V: SVR4 argument to print version ID. */
1286 print_version_id ();
1289 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1290 should be emitted or not. FIXME: Not implemented. */
1294 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1295 rather than .stabs.excl, which is ignored by the linker.
1296 FIXME: Not implemented. */
1307 nop_limit
= strtoul (optarg
, &end
, 0);
1309 as_bad (_("--nops needs a numeric argument"));
1324 md_show_usage (FILE *stream
)
1326 fprintf (stream
, _("\
1328 -a32 generate ELF32/XCOFF32\n\
1329 -a64 generate ELF64/XCOFF64\n\
1331 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1332 -mpwr generate code for POWER (RIOS1)\n\
1333 -m601 generate code for PowerPC 601\n\
1334 -mppc, -mppc32, -m603, -m604\n\
1335 generate code for PowerPC 603/604\n\
1336 -m403 generate code for PowerPC 403\n\
1337 -m405 generate code for PowerPC 405\n\
1338 -m440 generate code for PowerPC 440\n\
1339 -m464 generate code for PowerPC 464\n\
1340 -m476 generate code for PowerPC 476\n\
1341 -m7400, -m7410, -m7450, -m7455\n\
1342 generate code for PowerPC 7400/7410/7450/7455\n\
1343 -m750cl, -mgekko, -mbroadway\n\
1344 generate code for PowerPC 750cl/Gekko/Broadway\n\
1345 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1346 fprintf (stream
, _("\
1347 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1348 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1349 -mbooke generate code for 32-bit PowerPC BookE\n\
1350 -ma2 generate code for A2 architecture\n\
1351 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1352 -mpower5, -mpwr5, -mpwr5x\n\
1353 generate code for Power5 architecture\n\
1354 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1355 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1356 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1357 -mpower9, -mpwr9 generate code for Power9 architecture\n\
1358 -mcell generate code for Cell Broadband Engine architecture\n\
1359 -mcom generate code for Power/PowerPC common instructions\n\
1360 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1361 fprintf (stream
, _("\
1362 -maltivec generate code for AltiVec\n\
1363 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1364 -me300 generate code for PowerPC e300 family\n\
1365 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1366 -me500mc, generate code for Freescale e500mc core complex\n\
1367 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1368 -me5500, generate code for Freescale e5500 core complex\n\
1369 -me6500, generate code for Freescale e6500 core complex\n\
1370 -mspe generate code for Motorola SPE instructions\n\
1371 -mspe2 generate code for Freescale SPE2 instructions\n\
1372 -mvle generate code for Freescale VLE instructions\n\
1373 -mtitan generate code for AppliedMicro Titan core complex\n\
1374 -mregnames Allow symbolic names for registers\n\
1375 -mno-regnames Do not allow symbolic names for registers\n"));
1377 fprintf (stream
, _("\
1378 -mrelocatable support for GCC's -mrelocatble option\n\
1379 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1380 -memb set PPC_EMB bit in ELF flags\n\
1381 -mlittle, -mlittle-endian, -le\n\
1382 generate code for a little endian machine\n\
1383 -mbig, -mbig-endian, -be\n\
1384 generate code for a big endian machine\n\
1385 -msolaris generate code for Solaris\n\
1386 -mno-solaris do not generate code for Solaris\n\
1387 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1388 -V print assembler version number\n\
1389 -Qy, -Qn ignored\n"));
1391 fprintf (stream
, _("\
1392 -nops=count when aligning, more than COUNT nops uses a branch\n\
1393 -ppc476-workaround warn if emitting data to code sections\n"));
1396 /* Set ppc_cpu if it is not already set. */
1401 const char *default_os
= TARGET_OS
;
1402 const char *default_cpu
= TARGET_CPU
;
1404 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1407 if (target_big_endian
)
1408 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1410 /* The minimum supported cpu for 64-bit little-endian is power8. */
1411 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1412 else if (strncmp (default_os
, "aix", 3) == 0
1413 && default_os
[3] >= '4' && default_os
[3] <= '9')
1414 ppc_cpu
|= PPC_OPCODE_COMMON
;
1415 else if (strncmp (default_os
, "aix3", 4) == 0)
1416 ppc_cpu
|= PPC_OPCODE_POWER
;
1417 else if (strcmp (default_cpu
, "rs6000") == 0)
1418 ppc_cpu
|= PPC_OPCODE_POWER
;
1419 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1420 ppc_cpu
|= PPC_OPCODE_PPC
;
1422 as_fatal (_("unknown default cpu = %s, os = %s"),
1423 default_cpu
, default_os
);
1427 /* Figure out the BFD architecture to use. This function and ppc_mach
1428 are called well before md_begin, when the output file is opened. */
1430 enum bfd_architecture
1433 const char *default_cpu
= TARGET_CPU
;
1436 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1437 return bfd_arch_powerpc
;
1438 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1439 return bfd_arch_powerpc
;
1440 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1441 return bfd_arch_rs6000
;
1442 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1444 if (strcmp (default_cpu
, "rs6000") == 0)
1445 return bfd_arch_rs6000
;
1446 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1447 return bfd_arch_powerpc
;
1450 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1451 return bfd_arch_unknown
;
1458 return bfd_mach_ppc64
;
1459 else if (ppc_arch () == bfd_arch_rs6000
)
1460 return bfd_mach_rs6k
;
1461 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1462 return bfd_mach_ppc_titan
;
1463 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1464 return bfd_mach_ppc_vle
;
1466 return bfd_mach_ppc
;
1470 ppc_target_format (void)
1474 return target_big_endian
? "pe-powerpc" : "pe-powerpcle";
1476 return "xcoff-powermac";
1479 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1481 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1487 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1488 # elif defined (TE_VXWORKS)
1489 return "elf32-powerpc-vxworks";
1491 return (target_big_endian
1492 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1493 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1498 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1499 Return TRUE if there's a problem, otherwise FALSE. */
1502 insn_validate (const struct powerpc_opcode
*op
)
1504 const unsigned char *o
;
1505 uint64_t omask
= op
->mask
;
1507 /* The mask had better not trim off opcode bits. */
1508 if ((op
->opcode
& omask
) != op
->opcode
)
1510 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1514 /* The operands must not overlap the opcode or each other. */
1515 for (o
= op
->operands
; *o
; ++o
)
1517 bfd_boolean optional
= FALSE
;
1518 if (*o
>= num_powerpc_operands
)
1520 as_bad (_("operand index error for %s"), op
->name
);
1526 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1527 if (operand
->shift
== (int) PPC_OPSHIFT_INV
)
1534 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1536 else if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1538 mask
= (*operand
->insert
) (0, val
, ppc_cpu
, &errmsg
);
1540 else if (operand
->shift
>= 0)
1541 mask
= operand
->bitm
<< operand
->shift
;
1543 mask
= operand
->bitm
>> -operand
->shift
;
1546 as_bad (_("operand %d overlap in %s"),
1547 (int) (o
- op
->operands
), op
->name
);
1551 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
1555 as_bad (_("non-optional operand %d follows optional operand in %s"),
1556 (int) (o
- op
->operands
), op
->name
);
1564 /* Insert opcodes and macros into hash tables. Called at startup and
1565 for .machine pseudo. */
1568 ppc_setup_opcodes (void)
1570 const struct powerpc_opcode
*op
;
1571 const struct powerpc_opcode
*op_end
;
1572 const struct powerpc_macro
*macro
;
1573 const struct powerpc_macro
*macro_end
;
1574 bfd_boolean bad_insn
= FALSE
;
1576 if (ppc_hash
!= NULL
)
1577 hash_die (ppc_hash
);
1578 if (ppc_macro_hash
!= NULL
)
1579 hash_die (ppc_macro_hash
);
1581 /* Insert the opcodes into a hash table. */
1582 ppc_hash
= hash_new ();
1584 if (ENABLE_CHECKING
)
1588 /* An index into powerpc_operands is stored in struct fix
1589 fx_pcrel_adjust which is 8 bits wide. */
1590 gas_assert (num_powerpc_operands
< 256);
1592 /* Check operand masks. Code here and in the disassembler assumes
1593 all the 1's in the mask are contiguous. */
1594 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1596 uint64_t mask
= powerpc_operands
[i
].bitm
;
1600 right_bit
= mask
& -mask
;
1602 right_bit
= mask
& -mask
;
1603 if (mask
!= right_bit
)
1605 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1608 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1609 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1610 sizeof (powerpc_operands
[0])) == 0)
1612 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1619 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1620 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1622 if (ENABLE_CHECKING
)
1624 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1626 #ifdef PRINT_OPCODE_TABLE
1627 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1628 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1629 new_opcode
, (unsigned long long) op
->opcode
,
1630 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1633 /* The major opcodes had better be sorted. Code in the disassembler
1634 assumes the insns are sorted according to major opcode. */
1635 if (op
!= powerpc_opcodes
1636 && new_opcode
< PPC_OP (op
[-1].opcode
))
1638 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1642 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1644 as_bad (_("%s is enabled by vle flag"), op
->name
);
1647 if (PPC_OP (op
->opcode
) != 4
1648 && PPC_OP (op
->opcode
) != 31
1649 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1651 as_bad (_("%s not disabled by vle flag"), op
->name
);
1654 bad_insn
|= insn_validate (op
);
1657 if ((ppc_cpu
& op
->flags
) != 0
1658 && !(ppc_cpu
& op
->deprecated
))
1662 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1665 as_bad (_("duplicate instruction %s"),
1672 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1673 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1674 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1676 op_end
= prefix_opcodes
+ prefix_num_opcodes
;
1677 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1679 if (ENABLE_CHECKING
)
1681 unsigned int new_opcode
= PPC_PREFIX_SEG (op
[0].opcode
);
1683 #ifdef PRINT_OPCODE_TABLE
1684 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1685 op
->name
, (unsigned int) (op
- prefix_opcodes
),
1686 new_opcode
, (unsigned long long) op
->opcode
,
1687 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1690 /* The major opcodes had better be sorted. Code in the disassembler
1691 assumes the insns are sorted according to major opcode. */
1692 if (op
!= prefix_opcodes
1693 && new_opcode
< PPC_PREFIX_SEG (op
[-1].opcode
))
1695 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1698 bad_insn
|= insn_validate (op
);
1701 if ((ppc_cpu
& op
->flags
) != 0
1702 && !(ppc_cpu
& op
->deprecated
))
1706 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1709 as_bad (_("duplicate instruction %s"),
1716 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1717 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1718 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1720 op_end
= vle_opcodes
+ vle_num_opcodes
;
1721 for (op
= vle_opcodes
; op
< op_end
; op
++)
1723 if (ENABLE_CHECKING
)
1725 unsigned new_seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1727 #ifdef PRINT_OPCODE_TABLE
1728 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1729 op
->name
, (unsigned int) (op
- vle_opcodes
),
1730 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1731 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1734 /* The major opcodes had better be sorted. Code in the disassembler
1735 assumes the insns are sorted according to major opcode. */
1736 if (op
!= vle_opcodes
1737 && new_seg
< VLE_OP_TO_SEG (VLE_OP (op
[-1].opcode
, op
[-1].mask
)))
1739 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1743 bad_insn
|= insn_validate (op
);
1746 if ((ppc_cpu
& op
->flags
) != 0
1747 && !(ppc_cpu
& op
->deprecated
))
1751 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1754 as_bad (_("duplicate instruction %s"),
1761 /* SPE2 instructions */
1762 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1764 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1765 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1767 if (ENABLE_CHECKING
)
1769 if (op
!= spe2_opcodes
)
1771 unsigned old_seg
, new_seg
;
1773 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1774 old_seg
= VLE_OP_TO_SEG (old_seg
);
1775 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1776 new_seg
= VLE_OP_TO_SEG (new_seg
);
1778 /* The major opcodes had better be sorted. Code in the
1779 disassembler assumes the insns are sorted according to
1781 if (new_seg
< old_seg
)
1783 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1788 bad_insn
|= insn_validate (op
);
1791 if ((ppc_cpu
& op
->flags
) != 0 && !(ppc_cpu
& op
->deprecated
))
1795 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1798 as_bad (_("duplicate instruction %s"),
1805 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1806 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1809 /* Insert the macros into a hash table. */
1810 ppc_macro_hash
= hash_new ();
1812 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1813 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1815 if ((macro
->flags
& ppc_cpu
) != 0 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1819 retval
= hash_insert (ppc_macro_hash
, macro
->name
, (void *) macro
);
1820 if (retval
!= (const char *) NULL
)
1822 as_bad (_("duplicate macro %s"), macro
->name
);
1832 /* This function is called when the assembler starts up. It is called
1833 after the options have been parsed and the output file has been
1841 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1842 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1845 /* Set the ELF flags if desired. */
1846 if (ppc_flags
&& !msolaris
)
1847 bfd_set_private_flags (stdoutput
, ppc_flags
);
1850 ppc_setup_opcodes ();
1852 /* Tell the main code what the endianness is if it is not overridden
1854 if (!set_target_endian
)
1856 set_target_endian
= 1;
1857 target_big_endian
= PPC_BIG_ENDIAN
;
1861 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1863 /* Create dummy symbols to serve as initial csects. This forces the
1864 text csects to precede the data csects. These symbols will not
1866 ppc_text_csects
= symbol_make ("dummy\001");
1867 symbol_get_tc (ppc_text_csects
)->within
= ppc_text_csects
;
1868 ppc_data_csects
= symbol_make ("dummy\001");
1869 symbol_get_tc (ppc_data_csects
)->within
= ppc_data_csects
;
1874 ppc_current_section
= text_section
;
1875 ppc_previous_section
= 0;
1884 if (ppc_apuinfo_list
== NULL
)
1887 /* Ok, so write the section info out. We have this layout:
1891 0 8 length of "APUinfo\0"
1892 4 (n*4) number of APU's (4 bytes each)
1895 20 APU#1 first APU's info
1896 24 APU#2 second APU's info
1901 asection
*seg
= now_seg
;
1902 subsegT subseg
= now_subseg
;
1903 asection
*apuinfo_secp
= (asection
*) NULL
;
1906 /* Create the .PPC.EMB.apuinfo section. */
1907 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1908 bfd_set_section_flags (stdoutput
,
1910 SEC_HAS_CONTENTS
| SEC_READONLY
);
1913 md_number_to_chars (p
, (valueT
) 8, 4);
1916 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1919 md_number_to_chars (p
, (valueT
) 2, 4);
1922 strcpy (p
, APUINFO_LABEL
);
1924 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1927 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1930 frag_align (2, 0, 0);
1932 /* We probably can't restore the current segment, for there likely
1935 subseg_set (seg
, subseg
);
1940 /* Insert an operand value into an instruction. */
1943 ppc_insert_operand (uint64_t insn
,
1944 const struct powerpc_operand
*operand
,
1950 int64_t min
, max
, right
;
1952 max
= operand
->bitm
;
1956 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
1958 /* Extend the allowed range for addis to [-32768, 65535].
1959 Similarly for cmpli and some VLE high part insns. For 64-bit
1960 it would be good to disable this for signed fields since the
1961 value is sign extended into the high 32 bits of the register.
1962 If the value is, say, an address, then we might care about
1963 the high bits. However, gcc as of 2014-06 uses unsigned
1964 values when loading the high part of 64-bit constants using
1966 min
= ~(max
>> 1) & -right
;
1968 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
1970 max
= (max
>> 1) & -right
;
1971 min
= ~max
& -right
;
1974 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1977 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1986 /* Some people write constants with the sign extension done by
1987 hand but only up to 32 bits. This shouldn't really be valid,
1988 but, to permit this code to assemble on a 64-bit host, we
1989 sign extend the 32-bit value to 64 bits if so doing makes the
1990 value valid. We only do this for operands that are 32-bits or
1993 && (operand
->bitm
& ~0xffffffffULL
) == 0
1994 && (val
- (1LL << 32)) >= min
1995 && (val
- (1LL << 32)) <= max
1996 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
1997 val
= val
- (1LL << 32);
1999 /* Similarly, people write expressions like ~(1<<15), and expect
2000 this to be OK for a 32-bit unsigned value. */
2002 && (operand
->bitm
& ~0xffffffffULL
) == 0
2003 && (val
+ (1LL << 32)) >= min
2004 && (val
+ (1LL << 32)) <= max
2005 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
2006 val
= val
+ (1LL << 32);
2010 || (val
& (right
- 1)) != 0)
2011 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
2014 if (operand
->insert
)
2019 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
2020 if (errmsg
!= (const char *) NULL
)
2021 as_bad_where (file
, line
, "%s", errmsg
);
2023 else if (operand
->shift
>= 0)
2024 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2026 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2033 /* Parse @got, etc. and return the desired relocation. */
2034 static bfd_reloc_code_real_type
2035 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
2039 unsigned int length
: 8;
2040 unsigned int valid32
: 1;
2041 unsigned int valid64
: 1;
2050 const struct map_bfd
*ptr
;
2052 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2053 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2054 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2056 static const struct map_bfd mapping
[] = {
2057 MAP ("l", BFD_RELOC_LO16
),
2058 MAP ("h", BFD_RELOC_HI16
),
2059 MAP ("ha", BFD_RELOC_HI16_S
),
2060 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2061 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2062 MAP ("got", BFD_RELOC_16_GOTOFF
),
2063 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2064 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2065 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2066 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2067 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2068 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2069 MAP ("copy", BFD_RELOC_PPC_COPY
),
2070 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2071 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2072 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2073 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2074 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2075 MAP ("tls", BFD_RELOC_PPC_TLS
),
2076 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2077 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2078 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2079 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2080 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2081 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2082 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2083 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2084 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2085 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2086 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2087 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2088 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2089 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2090 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2091 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2092 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2093 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2094 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2095 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2096 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2097 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2098 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2099 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2100 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2101 MAP32 ("fixup", BFD_RELOC_CTOR
),
2102 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2103 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2104 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2105 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2106 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2107 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2108 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2109 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2110 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2111 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2112 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2113 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2114 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2115 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2116 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2117 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2118 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2119 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2120 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2121 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2122 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2123 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2124 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2125 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2126 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2127 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2128 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2129 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2130 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2131 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2132 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2133 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2134 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2135 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2136 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2137 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2138 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2139 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2140 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2141 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2142 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2143 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2144 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2145 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2146 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2147 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2148 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2149 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2150 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2151 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2152 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2153 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC
),
2154 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2158 return BFD_RELOC_NONE
;
2160 for (ch
= *str
, str2
= ident
;
2161 (str2
< ident
+ sizeof (ident
) - 1
2162 && (ISALNUM (ch
) || ch
== '@'));
2165 *str2
++ = TOLOWER (ch
);
2172 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2173 if (ch
== ptr
->string
[0]
2174 && len
== ptr
->length
2175 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2176 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2178 int reloc
= ptr
->reloc
;
2180 if (!ppc_obj64
&& exp_p
->X_add_number
!= 0)
2184 case BFD_RELOC_16_GOTOFF
:
2185 case BFD_RELOC_LO16_GOTOFF
:
2186 case BFD_RELOC_HI16_GOTOFF
:
2187 case BFD_RELOC_HI16_S_GOTOFF
:
2188 as_warn (_("identifier+constant@got means "
2189 "identifier@got+constant"));
2192 case BFD_RELOC_PPC_GOT_TLSGD16
:
2193 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2194 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2195 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2196 case BFD_RELOC_PPC_GOT_TLSLD16
:
2197 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2198 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2199 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2200 case BFD_RELOC_PPC_GOT_DTPREL16
:
2201 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2202 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2203 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2204 case BFD_RELOC_PPC_GOT_TPREL16
:
2205 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2206 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2207 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2208 as_bad (_("symbol+offset not supported for got tls"));
2213 /* Now check for identifier@suffix+constant. */
2214 if (*str
== '-' || *str
== '+')
2216 char *orig_line
= input_line_pointer
;
2217 expressionS new_exp
;
2219 input_line_pointer
= str
;
2220 expression (&new_exp
);
2221 if (new_exp
.X_op
== O_constant
)
2223 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2224 str
= input_line_pointer
;
2227 if (&input_line_pointer
!= str_p
)
2228 input_line_pointer
= orig_line
;
2232 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2233 && exp_p
->X_op
== O_symbol
2234 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2236 /* Change the symbol so that the dummy .TOC. symbol can be
2237 omitted from the object file. */
2238 exp_p
->X_add_symbol
= &abs_symbol
;
2241 return (bfd_reloc_code_real_type
) reloc
;
2244 return BFD_RELOC_NONE
;
2247 /* Support @got, etc. on constants emitted via .short, .int etc. */
2249 bfd_reloc_code_real_type
2250 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2253 if (nbytes
>= 2 && *input_line_pointer
== '@')
2254 return ppc_elf_suffix (&input_line_pointer
, exp
);
2255 return BFD_RELOC_NONE
;
2258 /* Warn when emitting data to code sections, unless we are emitting
2259 a relocation that ld --ppc476-workaround uses to recognise data
2260 *and* there was an unconditional branch prior to the data. */
2263 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2264 unsigned int nbytes
, fixS
*fix
)
2267 && (now_seg
->flags
& SEC_CODE
) != 0
2270 || !(fix
->fx_r_type
== BFD_RELOC_32
2271 || fix
->fx_r_type
== BFD_RELOC_CTOR
2272 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2273 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2274 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2275 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2276 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2277 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2278 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2279 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2281 /* Flag that we've warned. */
2285 as_warn (_("data in executable section"));
2289 /* Solaris pseduo op to change to the .rodata section. */
2291 ppc_elf_rdata (int xxx
)
2293 char *save_line
= input_line_pointer
;
2294 static char section
[] = ".rodata\n";
2296 /* Just pretend this is .section .rodata */
2297 input_line_pointer
= section
;
2298 obj_elf_section (xxx
);
2300 input_line_pointer
= save_line
;
2303 /* Pseudo op to make file scope bss items. */
2305 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2318 c
= get_symbol_name (&name
);
2320 /* Just after name is now '\0'. */
2321 p
= input_line_pointer
;
2323 SKIP_WHITESPACE_AFTER_NAME ();
2324 if (*input_line_pointer
!= ',')
2326 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2327 ignore_rest_of_line ();
2331 input_line_pointer
++; /* skip ',' */
2332 if ((size
= get_absolute_expression ()) < 0)
2334 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2335 ignore_rest_of_line ();
2339 /* The third argument to .lcomm is the alignment. */
2340 if (*input_line_pointer
!= ',')
2344 ++input_line_pointer
;
2345 align
= get_absolute_expression ();
2348 as_warn (_("ignoring bad alignment"));
2354 symbolP
= symbol_find_or_make (name
);
2357 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2359 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2360 S_GET_NAME (symbolP
));
2361 ignore_rest_of_line ();
2365 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2367 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2368 S_GET_NAME (symbolP
),
2369 (long) S_GET_VALUE (symbolP
),
2372 ignore_rest_of_line ();
2378 old_subsec
= now_subseg
;
2381 /* Convert to a power of 2 alignment. */
2382 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2385 as_bad (_("common alignment not a power of 2"));
2386 ignore_rest_of_line ();
2393 record_alignment (bss_section
, align2
);
2394 subseg_set (bss_section
, 1);
2396 frag_align (align2
, 0, 0);
2397 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2398 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2399 symbol_set_frag (symbolP
, frag_now
);
2400 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2403 S_SET_SIZE (symbolP
, size
);
2404 S_SET_SEGMENT (symbolP
, bss_section
);
2405 subseg_set (old_sec
, old_subsec
);
2406 demand_empty_rest_of_line ();
2409 /* Pseudo op to set symbol local entry point. */
2411 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2414 char c
= get_symbol_name (&name
);
2419 elf_symbol_type
*elfsym
;
2421 p
= input_line_pointer
;
2423 SKIP_WHITESPACE_AFTER_NAME ();
2424 if (*input_line_pointer
!= ',')
2427 as_bad (_("expected comma after name `%s' in .localentry directive"),
2430 ignore_rest_of_line ();
2433 input_line_pointer
++;
2435 if (exp
.X_op
== O_absent
)
2437 as_bad (_("missing expression in .localentry directive"));
2438 exp
.X_op
= O_constant
;
2439 exp
.X_add_number
= 0;
2442 sym
= symbol_find_or_make (name
);
2445 if (resolve_expression (&exp
)
2446 && exp
.X_op
== O_constant
)
2448 unsigned int encoded
, ok
;
2451 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2452 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2455 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2456 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2458 as_bad (_(".localentry expression for `%s' "
2459 "is not a valid power of 2"), S_GET_NAME (sym
));
2465 bfdsym
= symbol_get_bfdsym (sym
);
2466 elfsym
= elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
2467 gas_assert (elfsym
);
2468 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2469 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2470 if (ppc_abiversion
== 0)
2475 as_bad (_(".localentry expression for `%s' "
2476 "does not evaluate to a constant"), S_GET_NAME (sym
));
2478 demand_empty_rest_of_line ();
2481 /* Pseudo op to set ABI version. */
2483 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2488 if (exp
.X_op
== O_absent
)
2490 as_bad (_("missing expression in .abiversion directive"));
2491 exp
.X_op
= O_constant
;
2492 exp
.X_add_number
= 0;
2495 if (resolve_expression (&exp
)
2496 && exp
.X_op
== O_constant
)
2497 ppc_abiversion
= exp
.X_add_number
;
2499 as_bad (_(".abiversion expression does not evaluate to a constant"));
2500 demand_empty_rest_of_line ();
2503 /* Parse a .gnu_attribute directive. */
2505 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2507 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2509 /* Check validity of defined powerpc tags. */
2510 if (tag
== Tag_GNU_Power_ABI_FP
2511 || tag
== Tag_GNU_Power_ABI_Vector
2512 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2516 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2518 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2519 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2520 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2521 as_warn (_("unknown .gnu_attribute value"));
2525 /* Set ABI version in output file. */
2529 if (ppc_obj64
&& ppc_abiversion
!= 0)
2531 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2532 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2536 /* Validate any relocations emitted for -mrelocatable, possibly adding
2537 fixups for word relocations in writable segments, so we can adjust
2540 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2542 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2551 case SHLIB_MRELOCATABLE
:
2552 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2553 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2554 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2555 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2556 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2557 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2558 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2559 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2560 && (seg
->flags
& SEC_LOAD
) != 0
2561 && strcmp (segment_name (seg
), ".got2") != 0
2562 && strcmp (segment_name (seg
), ".dtors") != 0
2563 && strcmp (segment_name (seg
), ".ctors") != 0
2564 && strcmp (segment_name (seg
), ".fixup") != 0
2565 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2566 && strcmp (segment_name (seg
), ".eh_frame") != 0
2567 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2569 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2570 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2572 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2573 _("relocation cannot be done when using -mrelocatable"));
2580 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2581 function descriptor sym if the corresponding code sym is used. */
2584 ppc_frob_file_before_adjust (void)
2592 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2598 name
= S_GET_NAME (symp
);
2602 if (! S_IS_WEAK (symp
)
2603 || S_IS_DEFINED (symp
))
2606 dotname
= concat (".", name
, (char *) NULL
);
2607 dotsym
= symbol_find_noref (dotname
, 1);
2609 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2610 || symbol_used_in_reloc_p (dotsym
)))
2611 symbol_mark_used (symp
);
2615 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2617 && toc_reloc_types
!= has_large_toc_reloc
2618 && bfd_section_size (stdoutput
, toc
) > 0x10000)
2619 as_warn (_("TOC section size exceeds 64k"));
2622 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2623 emitted. Other uses of .TOC. will cause the symbol to be marked
2624 with BSF_KEEP in md_apply_fix. */
2627 ppc_elf_adjust_symtab (void)
2632 symp
= symbol_find (".TOC.");
2635 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2636 if ((bsym
->flags
& BSF_KEEP
) == 0)
2637 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2641 #endif /* OBJ_ELF */
2646 * Summary of parse_toc_entry.
2648 * in: Input_line_pointer points to the '[' in one of:
2650 * [toc] [tocv] [toc32] [toc64]
2652 * Anything else is an error of one kind or another.
2655 * return value: success or failure
2656 * toc_kind: kind of toc reference
2657 * input_line_pointer:
2658 * success: first char after the ']'
2659 * failure: unchanged
2663 * [toc] - rv == success, toc_kind = default_toc
2664 * [tocv] - rv == success, toc_kind = data_in_toc
2665 * [toc32] - rv == success, toc_kind = must_be_32
2666 * [toc64] - rv == success, toc_kind = must_be_64
2670 enum toc_size_qualifier
2672 default_toc
, /* The toc cell constructed should be the system default size */
2673 data_in_toc
, /* This is a direct reference to a toc cell */
2674 must_be_32
, /* The toc cell constructed must be 32 bits wide */
2675 must_be_64
/* The toc cell constructed must be 64 bits wide */
2679 parse_toc_entry (enum toc_size_qualifier
*toc_kind
)
2684 enum toc_size_qualifier t
;
2686 /* Save the input_line_pointer. */
2687 start
= input_line_pointer
;
2689 /* Skip over the '[' , and whitespace. */
2690 ++input_line_pointer
;
2693 /* Find the spelling of the operand. */
2694 c
= get_symbol_name (&toc_spec
);
2696 if (strcmp (toc_spec
, "toc") == 0)
2700 else if (strcmp (toc_spec
, "tocv") == 0)
2704 else if (strcmp (toc_spec
, "toc32") == 0)
2708 else if (strcmp (toc_spec
, "toc64") == 0)
2714 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec
);
2715 *input_line_pointer
= c
;
2716 input_line_pointer
= start
;
2720 /* Now find the ']'. */
2721 *input_line_pointer
= c
;
2723 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2724 c
= *input_line_pointer
++; /* input_line_pointer->past char in c. */
2728 as_bad (_("syntax error: expected `]', found `%c'"), c
);
2729 input_line_pointer
= start
;
2738 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2739 /* See whether a symbol is in the TOC section. */
2742 ppc_is_toc_sym (symbolS
*sym
)
2745 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2746 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2749 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2751 return strcmp (sname
, ".toc") == 0;
2753 return strcmp (sname
, ".got") == 0;
2756 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2760 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2762 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2766 /* Check we don't already exist. */
2767 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2768 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2771 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2773 if (ppc_apuinfo_num_alloc
== 0)
2775 ppc_apuinfo_num_alloc
= 4;
2776 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2780 ppc_apuinfo_num_alloc
+= 4;
2781 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2782 ppc_apuinfo_num_alloc
);
2785 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2790 /* Various frobbings of labels and their addresses. */
2792 /* Symbols labelling the current insn. */
2793 struct insn_label_list
2795 struct insn_label_list
*next
;
2799 static struct insn_label_list
*insn_labels
;
2800 static struct insn_label_list
*free_insn_labels
;
2803 ppc_record_label (symbolS
*sym
)
2805 struct insn_label_list
*l
;
2807 if (free_insn_labels
== NULL
)
2808 l
= XNEW (struct insn_label_list
);
2811 l
= free_insn_labels
;
2812 free_insn_labels
= l
->next
;
2816 l
->next
= insn_labels
;
2821 ppc_clear_labels (void)
2823 while (insn_labels
!= NULL
)
2825 struct insn_label_list
*l
= insn_labels
;
2826 insn_labels
= l
->next
;
2827 l
->next
= free_insn_labels
;
2828 free_insn_labels
= l
;
2833 ppc_start_line_hook (void)
2835 ppc_clear_labels ();
2839 ppc_new_dot_label (symbolS
*sym
)
2841 ppc_record_label (sym
);
2843 /* Anchor this label to the current csect for relocations. */
2844 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2849 ppc_frob_label (symbolS
*sym
)
2851 ppc_record_label (sym
);
2854 /* Set the class of a label based on where it is defined. This handles
2855 symbols without suffixes. Also, move the symbol so that it follows
2856 the csect symbol. */
2857 if (ppc_current_csect
!= (symbolS
*) NULL
)
2859 if (symbol_get_tc (sym
)->symbol_class
== -1)
2860 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
2862 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
2863 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
2864 &symbol_rootP
, &symbol_lastP
);
2865 symbol_get_tc (ppc_current_csect
)->within
= sym
;
2866 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2871 dwarf2_emit_label (sym
);
2875 /* We need to keep a list of fixups. We can't simply generate them as
2876 we go, because that would require us to first create the frag, and
2877 that would screw up references to ``.''. */
2883 bfd_reloc_code_real_type reloc
;
2886 #define MAX_INSN_FIXUPS (5)
2888 /* Return the field size operated on by RELOC, and whether it is
2889 pc-relative in PC_RELATIVE. */
2892 fixup_size (bfd_reloc_code_real_type reloc
, bfd_boolean
*pc_relative
)
2894 unsigned int size
= 0;
2895 bfd_boolean pcrel
= FALSE
;
2899 /* This switch statement must handle all BFD_RELOC values
2900 possible in instruction fixups. As is, it handles all
2901 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
2902 bfd/coff-ppc, bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
2903 Overkill since data and marker relocs need not be handled
2904 here, but this way we can be sure a needed fixup reloc isn't
2905 accidentally omitted. */
2906 case BFD_RELOC_PPC_EMB_MRKREF
:
2907 case BFD_RELOC_VTABLE_ENTRY
:
2908 case BFD_RELOC_VTABLE_INHERIT
:
2916 case BFD_RELOC_16_BASEREL
:
2917 case BFD_RELOC_16_GOTOFF
:
2918 case BFD_RELOC_GPREL16
:
2919 case BFD_RELOC_HI16
:
2920 case BFD_RELOC_HI16_BASEREL
:
2921 case BFD_RELOC_HI16_GOTOFF
:
2922 case BFD_RELOC_HI16_PLTOFF
:
2923 case BFD_RELOC_HI16_S
:
2924 case BFD_RELOC_HI16_S_BASEREL
:
2925 case BFD_RELOC_HI16_S_GOTOFF
:
2926 case BFD_RELOC_HI16_S_PLTOFF
:
2927 case BFD_RELOC_LO16
:
2928 case BFD_RELOC_LO16_BASEREL
:
2929 case BFD_RELOC_LO16_GOTOFF
:
2930 case BFD_RELOC_LO16_PLTOFF
:
2931 case BFD_RELOC_PPC64_ADDR16_DS
:
2932 case BFD_RELOC_PPC64_ADDR16_HIGH
:
2933 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
2934 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
2935 case BFD_RELOC_PPC64_DTPREL16_DS
:
2936 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
2937 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
2938 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
2939 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
2940 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
2941 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
2942 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
2943 case BFD_RELOC_PPC64_GOT16_DS
:
2944 case BFD_RELOC_PPC64_GOT16_LO_DS
:
2945 case BFD_RELOC_PPC64_HIGHER
:
2946 case BFD_RELOC_PPC64_HIGHER_S
:
2947 case BFD_RELOC_PPC64_HIGHEST
:
2948 case BFD_RELOC_PPC64_HIGHEST_S
:
2949 case BFD_RELOC_PPC64_PLT16_LO_DS
:
2950 case BFD_RELOC_PPC64_PLTGOT16
:
2951 case BFD_RELOC_PPC64_PLTGOT16_DS
:
2952 case BFD_RELOC_PPC64_PLTGOT16_HA
:
2953 case BFD_RELOC_PPC64_PLTGOT16_HI
:
2954 case BFD_RELOC_PPC64_PLTGOT16_LO
:
2955 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
2956 case BFD_RELOC_PPC64_SECTOFF_DS
:
2957 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
2958 case BFD_RELOC_PPC64_TOC16_DS
:
2959 case BFD_RELOC_PPC64_TOC16_HA
:
2960 case BFD_RELOC_PPC64_TOC16_HI
:
2961 case BFD_RELOC_PPC64_TOC16_LO
:
2962 case BFD_RELOC_PPC64_TOC16_LO_DS
:
2963 case BFD_RELOC_PPC64_TPREL16_DS
:
2964 case BFD_RELOC_PPC64_TPREL16_HIGH
:
2965 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
2966 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
2967 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
2968 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
2969 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
2970 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
2972 case BFD_RELOC_PPC_BA16
:
2974 case BFD_RELOC_PPC_DTPREL16
:
2975 case BFD_RELOC_PPC_DTPREL16_HA
:
2976 case BFD_RELOC_PPC_DTPREL16_HI
:
2977 case BFD_RELOC_PPC_DTPREL16_LO
:
2978 case BFD_RELOC_PPC_EMB_NADDR16
:
2979 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
2980 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
2981 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
2982 case BFD_RELOC_PPC_EMB_RELSDA
:
2983 case BFD_RELOC_PPC_EMB_RELSEC16
:
2984 case BFD_RELOC_PPC_EMB_RELST_LO
:
2985 case BFD_RELOC_PPC_EMB_RELST_HI
:
2986 case BFD_RELOC_PPC_EMB_RELST_HA
:
2987 case BFD_RELOC_PPC_EMB_SDA2I16
:
2988 case BFD_RELOC_PPC_EMB_SDA2REL
:
2989 case BFD_RELOC_PPC_EMB_SDAI16
:
2990 case BFD_RELOC_PPC_GOT_DTPREL16
:
2991 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2992 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2993 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2994 case BFD_RELOC_PPC_GOT_TLSGD16
:
2995 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2996 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2997 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2998 case BFD_RELOC_PPC_GOT_TLSLD16
:
2999 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
3000 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
3001 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
3002 case BFD_RELOC_PPC_GOT_TPREL16
:
3003 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
3004 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
3005 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3006 case BFD_RELOC_PPC_TOC16
:
3007 case BFD_RELOC_PPC_TPREL16
:
3008 case BFD_RELOC_PPC_TPREL16_HA
:
3009 case BFD_RELOC_PPC_TPREL16_HI
:
3010 case BFD_RELOC_PPC_TPREL16_LO
:
3014 case BFD_RELOC_16_PCREL
:
3015 case BFD_RELOC_HI16_PCREL
:
3016 case BFD_RELOC_HI16_S_PCREL
:
3017 case BFD_RELOC_LO16_PCREL
:
3018 case BFD_RELOC_PPC64_REL16_HIGH
:
3019 case BFD_RELOC_PPC64_REL16_HIGHA
:
3020 case BFD_RELOC_PPC64_REL16_HIGHER
:
3021 case BFD_RELOC_PPC64_REL16_HIGHERA
:
3022 case BFD_RELOC_PPC64_REL16_HIGHEST
:
3023 case BFD_RELOC_PPC64_REL16_HIGHESTA
:
3025 case BFD_RELOC_PPC_B16
:
3027 case BFD_RELOC_PPC_VLE_REL8
:
3032 case BFD_RELOC_16_GOT_PCREL
: /* coff reloc, bad name re size. */
3034 case BFD_RELOC_32_GOTOFF
:
3035 case BFD_RELOC_32_PLTOFF
:
3037 case BFD_RELOC_CTOR
:
3039 case BFD_RELOC_PPC64_ENTRY
:
3040 case BFD_RELOC_PPC_16DX_HA
:
3042 case BFD_RELOC_PPC_BA16
:
3044 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
3045 case BFD_RELOC_PPC_BA16_BRTAKEN
:
3046 case BFD_RELOC_PPC_BA26
:
3047 case BFD_RELOC_PPC_EMB_BIT_FLD
:
3048 case BFD_RELOC_PPC_EMB_NADDR32
:
3049 case BFD_RELOC_PPC_EMB_SDA21
:
3050 case BFD_RELOC_PPC_TLS
:
3051 case BFD_RELOC_PPC_TLSGD
:
3052 case BFD_RELOC_PPC_TLSLD
:
3053 case BFD_RELOC_PPC_VLE_HA16A
:
3054 case BFD_RELOC_PPC_VLE_HA16D
:
3055 case BFD_RELOC_PPC_VLE_HI16A
:
3056 case BFD_RELOC_PPC_VLE_HI16D
:
3057 case BFD_RELOC_PPC_VLE_LO16A
:
3058 case BFD_RELOC_PPC_VLE_LO16D
:
3059 case BFD_RELOC_PPC_VLE_SDA21
:
3060 case BFD_RELOC_PPC_VLE_SDA21_LO
:
3061 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3062 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
3063 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3064 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
3065 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3066 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
3071 case BFD_RELOC_24_PLT_PCREL
:
3072 case BFD_RELOC_32_PCREL
:
3073 case BFD_RELOC_32_PLT_PCREL
:
3074 case BFD_RELOC_PPC64_REL24_NOTOC
:
3076 case BFD_RELOC_PPC_B16
:
3078 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3079 case BFD_RELOC_PPC_B16_BRTAKEN
:
3080 case BFD_RELOC_PPC_B26
:
3081 case BFD_RELOC_PPC_LOCAL24PC
:
3082 case BFD_RELOC_PPC_REL16DX_HA
:
3083 case BFD_RELOC_PPC_VLE_REL15
:
3084 case BFD_RELOC_PPC_VLE_REL24
:
3090 case BFD_RELOC_CTOR
:
3092 case BFD_RELOC_PPC_COPY
:
3093 case BFD_RELOC_PPC_DTPMOD
:
3094 case BFD_RELOC_PPC_DTPREL
:
3095 case BFD_RELOC_PPC_GLOB_DAT
:
3096 case BFD_RELOC_PPC_TPREL
:
3097 size
= ppc_obj64
? 8 : 4;
3101 case BFD_RELOC_64_PLTOFF
:
3102 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
3103 case BFD_RELOC_PPC64_TOC
:
3107 case BFD_RELOC_64_PCREL
:
3108 case BFD_RELOC_64_PLT_PCREL
:
3117 if (ENABLE_CHECKING
)
3119 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
3120 if (reloc_howto
!= NULL
3121 && (size
!= bfd_get_reloc_size (reloc_howto
)
3122 || pcrel
!= reloc_howto
->pc_relative
))
3124 as_bad (_("%s howto doesn't match size/pcrel in gas"),
3129 *pc_relative
= pcrel
;
3134 /* If we have parsed a call to __tls_get_addr, parse an argument like
3135 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg
3136 is successfully parsed, *STR is updated past the trailing
3137 parenthesis and trailing white space, and *TLS_FIX contains the
3138 reloc and arg expression. */
3141 parse_tls_arg (char **str
, const expressionS
*exp
, struct ppc_fixup
*tls_fix
)
3143 const char *sym_name
= S_GET_NAME (exp
->X_add_symbol
);
3144 if (sym_name
[0] == '.')
3147 tls_fix
->reloc
= BFD_RELOC_NONE
;
3148 if (strcasecmp (sym_name
, "__tls_get_addr") == 0)
3150 char *hold
= input_line_pointer
;
3151 input_line_pointer
= *str
+ 1;
3152 expression (&tls_fix
->exp
);
3153 if (tls_fix
->exp
.X_op
== O_symbol
)
3155 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3156 tls_fix
->reloc
= BFD_RELOC_PPC_TLSGD
;
3157 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3158 tls_fix
->reloc
= BFD_RELOC_PPC_TLSLD
;
3159 if (tls_fix
->reloc
!= BFD_RELOC_NONE
)
3161 input_line_pointer
+= 7;
3163 *str
= input_line_pointer
;
3166 input_line_pointer
= hold
;
3168 return tls_fix
->reloc
!= BFD_RELOC_NONE
;
3172 /* This routine is called for each instruction to be assembled. */
3175 md_assemble (char *str
)
3178 const struct powerpc_opcode
*opcode
;
3180 const unsigned char *opindex_ptr
;
3183 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
3188 unsigned int insn_length
;
3190 /* Get the opcode. */
3191 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
3196 /* Look up the opcode in the hash table. */
3197 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, str
);
3198 if (opcode
== (const struct powerpc_opcode
*) NULL
)
3200 const struct powerpc_macro
*macro
;
3202 macro
= (const struct powerpc_macro
*) hash_find (ppc_macro_hash
, str
);
3203 if (macro
== (const struct powerpc_macro
*) NULL
)
3204 as_bad (_("unrecognized opcode: `%s'"), str
);
3206 ppc_macro (s
, macro
);
3208 ppc_clear_labels ();
3212 insn
= opcode
->opcode
;
3215 while (ISSPACE (*str
))
3218 /* PowerPC operands are just expressions. The only real issue is
3219 that a few operand types are optional. If an instruction has
3220 multiple optional operands and one is omitted, then all optional
3221 operands past the first omitted one must also be omitted. */
3222 int num_optional_operands
= 0;
3223 int num_optional_provided
= 0;
3225 /* Gather the operands. */
3229 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
3231 const struct powerpc_operand
*operand
;
3237 if (next_opindex
== 0)
3238 operand
= &powerpc_operands
[*opindex_ptr
];
3241 operand
= &powerpc_operands
[next_opindex
];
3246 /* If this is an optional operand, and we are skipping it, just
3247 insert the default value, usually a zero. */
3248 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3249 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
3251 if (num_optional_operands
== 0)
3253 const unsigned char *optr
;
3259 for (optr
= opindex_ptr
; *optr
!= 0; optr
++)
3261 const struct powerpc_operand
*op
;
3262 op
= &powerpc_operands
[*optr
];
3266 if ((op
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3267 && !((op
->flags
& PPC_OPERAND_OPTIONAL32
) != 0
3269 ++num_optional_operands
;
3271 if (s
!= NULL
&& *s
!= '\0')
3275 /* Look for the start of the next operand. */
3276 if ((op
->flags
& PPC_OPERAND_PARENS
) != 0)
3277 s
= strpbrk (s
, "(,");
3279 s
= strchr (s
, ',');
3285 omitted
= total
- provided
;
3286 num_optional_provided
= num_optional_operands
- omitted
;
3288 if (--num_optional_provided
< 0)
3290 int64_t val
= ppc_optional_operand_value (operand
, insn
, ppc_cpu
,
3291 num_optional_provided
);
3292 if (operand
->insert
)
3294 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
3295 if (errmsg
!= (const char *) NULL
)
3296 as_bad ("%s", errmsg
);
3298 else if (operand
->shift
>= 0)
3299 insn
|= (val
& operand
->bitm
) << operand
->shift
;
3301 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
3303 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
3304 next_opindex
= *opindex_ptr
+ 1;
3309 /* Gather the operand. */
3310 hold
= input_line_pointer
;
3311 input_line_pointer
= str
;
3314 if (*input_line_pointer
== '[')
3316 /* We are expecting something like the second argument here:
3318 * lwz r4,[toc].GS.0.static_int(rtoc)
3319 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
3320 * The argument following the `]' must be a symbol name, and the
3321 * register must be the toc register: 'rtoc' or '2'
3323 * The effect is to 0 as the displacement field
3324 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
3325 * the appropriate variation) reloc against it based on the symbol.
3326 * The linker will build the toc, and insert the resolved toc offset.
3329 * o The size of the toc entry is currently assumed to be
3330 * 32 bits. This should not be assumed to be a hard coded
3332 * o In an effort to cope with a change from 32 to 64 bits,
3333 * there are also toc entries that are specified to be
3334 * either 32 or 64 bits:
3335 * lwz r4,[toc32].GS.0.static_int(rtoc)
3336 * lwz r4,[toc64].GS.0.static_int(rtoc)
3337 * These demand toc entries of the specified size, and the
3338 * instruction probably requires it.
3342 enum toc_size_qualifier toc_kind
;
3343 bfd_reloc_code_real_type toc_reloc
;
3345 /* Go parse off the [tocXX] part. */
3346 valid_toc
= parse_toc_entry (&toc_kind
);
3350 ignore_rest_of_line ();
3354 /* Now get the symbol following the ']'. */
3360 /* In this case, we may not have seen the symbol yet,
3361 since it is allowed to appear on a .extern or .globl
3362 or just be a label in the .data section. */
3363 toc_reloc
= BFD_RELOC_PPC_TOC16
;
3366 /* 1. The symbol must be defined and either in the toc
3367 section, or a global.
3368 2. The reloc generated must have the TOCDEFN flag set
3369 in upper bit mess of the reloc type.
3370 FIXME: It's a little confusing what the tocv
3371 qualifier can be used for. At the very least, I've
3372 seen three uses, only one of which I'm sure I can
3374 if (ex
.X_op
== O_symbol
)
3376 gas_assert (ex
.X_add_symbol
!= NULL
);
3377 if (symbol_get_bfdsym (ex
.X_add_symbol
)->section
3380 as_bad (_("[tocv] symbol is not a toc symbol"));
3384 toc_reloc
= BFD_RELOC_PPC_TOC16
;
3387 /* FIXME: these next two specifically specify 32/64 bit
3388 toc entries. We don't support them today. Is this
3389 the right way to say that? */
3390 toc_reloc
= BFD_RELOC_NONE
;
3391 as_bad (_("unimplemented toc32 expression modifier"));
3394 /* FIXME: see above. */
3395 toc_reloc
= BFD_RELOC_NONE
;
3396 as_bad (_("unimplemented toc64 expression modifier"));
3400 _("Unexpected return value [%d] from parse_toc_entry!\n"),
3406 /* We need to generate a fixup for this expression. */
3407 if (fc
>= MAX_INSN_FIXUPS
)
3408 as_fatal (_("too many fixups"));
3410 fixups
[fc
].reloc
= toc_reloc
;
3411 fixups
[fc
].exp
= ex
;
3412 fixups
[fc
].opindex
= *opindex_ptr
;
3415 /* Ok. We've set up the fixup for the instruction. Now make it
3416 look like the constant 0 was found here. */
3418 ex
.X_op
= O_constant
;
3419 ex
.X_add_number
= 0;
3420 ex
.X_add_symbol
= NULL
;
3421 ex
.X_op_symbol
= NULL
;
3428 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3429 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3430 || !register_name (&ex
))
3432 char save_lex
= lex_type
['%'];
3434 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3435 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3438 lex_type
['%'] |= LEX_BEGIN_NAME
;
3442 lex_type
['%'] = save_lex
;
3446 str
= input_line_pointer
;
3447 input_line_pointer
= hold
;
3449 if (ex
.X_op
== O_illegal
)
3450 as_bad (_("illegal operand"));
3451 else if (ex
.X_op
== O_absent
)
3452 as_bad (_("missing operand"));
3453 else if (ex
.X_op
== O_register
)
3457 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3458 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3459 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
)) != 0
3460 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3461 && ex
.X_add_number
!= 0
3462 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3463 as_warn (_("invalid register expression"));
3464 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3465 ppc_cpu
, (char *) NULL
, 0);
3467 else if (ex
.X_op
== O_constant
)
3470 /* Allow @HA, @L, @H on constants. */
3471 bfd_reloc_code_real_type reloc
;
3472 char *orig_str
= str
;
3474 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3481 case BFD_RELOC_LO16
:
3482 ex
.X_add_number
&= 0xffff;
3483 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3484 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3487 case BFD_RELOC_HI16
:
3488 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3490 /* PowerPC64 @h is tested for overflow. */
3491 ex
.X_add_number
= (addressT
) ex
.X_add_number
>> 16;
3492 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3494 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3496 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3502 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3503 ex
.X_add_number
= PPC_HI (ex
.X_add_number
);
3504 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3505 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3508 case BFD_RELOC_HI16_S
:
3509 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3511 /* PowerPC64 @ha is tested for overflow. */
3513 = ((addressT
) ex
.X_add_number
+ 0x8000) >> 16;
3514 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3516 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3518 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3524 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3525 ex
.X_add_number
= PPC_HA (ex
.X_add_number
);
3526 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3527 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3530 case BFD_RELOC_PPC64_HIGHER
:
3531 ex
.X_add_number
= PPC_HIGHER (ex
.X_add_number
);
3532 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3533 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3536 case BFD_RELOC_PPC64_HIGHER_S
:
3537 ex
.X_add_number
= PPC_HIGHERA (ex
.X_add_number
);
3538 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3539 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3542 case BFD_RELOC_PPC64_HIGHEST
:
3543 ex
.X_add_number
= PPC_HIGHEST (ex
.X_add_number
);
3544 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3545 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3548 case BFD_RELOC_PPC64_HIGHEST_S
:
3549 ex
.X_add_number
= PPC_HIGHESTA (ex
.X_add_number
);
3550 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3551 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3554 #endif /* OBJ_ELF */
3555 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3556 ppc_cpu
, (char *) NULL
, 0);
3560 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3562 /* Look for a __tls_get_addr arg using the insane old syntax. */
3563 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3564 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3566 fixups
[fc
].opindex
= *opindex_ptr
;
3570 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3572 /* If VLE-mode convert LO/HI/HA relocations. */
3573 if (opcode
->flags
& PPC_OPCODE_VLE
)
3575 uint64_t tmp_insn
= insn
& opcode
->mask
;
3577 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3578 || tmp_insn
== E_AND2I_DOT_INSN
3579 || tmp_insn
== E_OR2IS_INSN
3580 || tmp_insn
== E_LI_INSN
3581 || tmp_insn
== E_LIS_INSN
3582 || tmp_insn
== E_AND2IS_DOT_INSN
);
3585 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3586 || tmp_insn
== E_ADD2IS_INSN
3587 || tmp_insn
== E_CMP16I_INSN
3588 || tmp_insn
== E_MULL2I_INSN
3589 || tmp_insn
== E_CMPL16I_INSN
3590 || tmp_insn
== E_CMPH16I_INSN
3591 || tmp_insn
== E_CMPHL16I_INSN
);
3598 case BFD_RELOC_PPC_EMB_SDA21
:
3599 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3602 case BFD_RELOC_LO16
:
3604 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3605 else if (use_a_reloc
)
3606 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3609 case BFD_RELOC_HI16
:
3611 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3612 else if (use_a_reloc
)
3613 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3616 case BFD_RELOC_HI16_S
:
3618 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3619 else if (use_a_reloc
)
3620 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3623 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3625 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3628 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3630 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3633 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3635 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3640 /* TLS and other tweaks. */
3646 case BFD_RELOC_PPC_TLS
:
3647 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3648 as_bad (_("@tls may not be used with \"%s\" operands"),
3650 else if (operand
->shift
!= 11)
3651 as_bad (_("@tls may only be used in last operand"));
3653 insn
= ppc_insert_operand (insn
, operand
,
3655 ppc_cpu
, (char *) NULL
, 0);
3658 /* We'll only use the 32 (or 64) bit form of these relocations
3659 in constants. Instructions get the 16 bit form. */
3660 case BFD_RELOC_PPC_DTPREL
:
3661 reloc
= BFD_RELOC_PPC_DTPREL16
;
3664 case BFD_RELOC_PPC_TPREL
:
3665 reloc
= BFD_RELOC_PPC_TPREL16
;
3668 case BFD_RELOC_LO16
:
3669 if ((operand
->bitm
| 0xf) != 0xffff
3670 || operand
->shift
!= 0
3671 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3672 as_warn (_("%s unsupported on this instruction"), "@l");
3675 case BFD_RELOC_HI16
:
3676 if (operand
->bitm
!= 0xffff
3677 || operand
->shift
!= 0
3678 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3679 as_warn (_("%s unsupported on this instruction"), "@h");
3682 case BFD_RELOC_HI16_S
:
3683 if (operand
->bitm
== 0xffff
3684 && operand
->shift
== (int) PPC_OPSHIFT_INV
3685 && opcode
->opcode
== (19 << 26) + (2 << 1))
3687 reloc
= BFD_RELOC_PPC_16DX_HA
;
3688 else if (operand
->bitm
!= 0xffff
3689 || operand
->shift
!= 0
3690 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3691 as_warn (_("%s unsupported on this instruction"), "@ha");
3694 #endif /* OBJ_ELF */
3696 if (reloc
!= BFD_RELOC_NONE
)
3698 /* Determine a BFD reloc value based on the operand information.
3699 We are only prepared to turn a few of the operands into
3701 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3702 | PPC_OPERAND_ABSOLUTE
)) != 0
3703 && operand
->bitm
== 0x3fffffc
3704 && operand
->shift
== 0)
3705 reloc
= BFD_RELOC_PPC_B26
;
3706 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3707 | PPC_OPERAND_ABSOLUTE
)) != 0
3708 && operand
->bitm
== 0xfffc
3709 && operand
->shift
== 0)
3710 reloc
= BFD_RELOC_PPC_B16
;
3711 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3712 && operand
->bitm
== 0x1fe
3713 && operand
->shift
== -1)
3714 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3715 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3716 && operand
->bitm
== 0xfffe
3717 && operand
->shift
== 0)
3718 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3719 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3720 && operand
->bitm
== 0x1fffffe
3721 && operand
->shift
== 0)
3722 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3723 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3724 && (operand
->bitm
& 0xfff0) == 0xfff0
3725 && operand
->shift
== 0)
3727 reloc
= BFD_RELOC_16
;
3728 #if defined OBJ_XCOFF || defined OBJ_ELF
3729 /* Note: the symbol may be not yet defined. */
3730 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3731 && ppc_is_toc_sym (ex
.X_add_symbol
))
3733 reloc
= BFD_RELOC_PPC_TOC16
;
3735 as_warn (_("assuming %s on symbol"),
3736 ppc_obj64
? "@toc" : "@xgot");
3742 /* For the absolute forms of branches, convert the PC
3743 relative form back into the absolute. */
3744 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3748 case BFD_RELOC_PPC_B26
:
3749 reloc
= BFD_RELOC_PPC_BA26
;
3751 case BFD_RELOC_PPC_B16
:
3752 reloc
= BFD_RELOC_PPC_BA16
;
3755 case BFD_RELOC_PPC_B16_BRTAKEN
:
3756 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3758 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3759 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3770 case BFD_RELOC_PPC_TOC16
:
3771 toc_reloc_types
|= has_small_toc_reloc
;
3773 case BFD_RELOC_PPC64_TOC16_LO
:
3774 case BFD_RELOC_PPC64_TOC16_HI
:
3775 case BFD_RELOC_PPC64_TOC16_HA
:
3776 toc_reloc_types
|= has_large_toc_reloc
;
3783 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3788 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3790 case BFD_RELOC_LO16
:
3791 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3793 case BFD_RELOC_16_GOTOFF
:
3794 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3796 case BFD_RELOC_LO16_GOTOFF
:
3797 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3799 case BFD_RELOC_LO16_PLTOFF
:
3800 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3802 case BFD_RELOC_16_BASEREL
:
3803 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3805 case BFD_RELOC_LO16_BASEREL
:
3806 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3808 case BFD_RELOC_PPC_TOC16
:
3809 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3811 case BFD_RELOC_PPC64_TOC16_LO
:
3812 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3814 case BFD_RELOC_PPC64_PLTGOT16
:
3815 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3817 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3818 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3820 case BFD_RELOC_PPC_DTPREL16
:
3821 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3823 case BFD_RELOC_PPC_DTPREL16_LO
:
3824 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3826 case BFD_RELOC_PPC_TPREL16
:
3827 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3829 case BFD_RELOC_PPC_TPREL16_LO
:
3830 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3832 case BFD_RELOC_PPC_GOT_DTPREL16
:
3833 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3834 case BFD_RELOC_PPC_GOT_TPREL16
:
3835 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3838 as_bad (_("unsupported relocation for DS offset field"));
3843 /* Look for a __tls_get_addr arg after any __tls_get_addr
3844 modifiers like @plt. This fixup must be emitted before
3845 the usual call fixup. */
3846 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3847 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3849 fixups
[fc
].opindex
= *opindex_ptr
;
3854 /* We need to generate a fixup for this expression. */
3855 if (fc
>= MAX_INSN_FIXUPS
)
3856 as_fatal (_("too many fixups"));
3857 fixups
[fc
].exp
= ex
;
3858 fixups
[fc
].opindex
= *opindex_ptr
;
3859 fixups
[fc
].reloc
= reloc
;
3867 /* If expecting more operands, then we want to see "),". */
3868 if (*str
== endc
&& opindex_ptr
[1] != 0)
3872 while (ISSPACE (*str
));
3876 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3881 /* The call to expression should have advanced str past any
3889 else if (*str
!= '\0')
3891 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3894 else if (endc
== ')')
3896 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
3901 while (ISSPACE (*str
))
3905 as_bad (_("junk at end of line: `%s'"), str
);
3908 /* Do we need/want an APUinfo section? */
3909 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
3912 /* These are all version "1". */
3913 if (opcode
->flags
& PPC_OPCODE_SPE
)
3914 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
3915 if (opcode
->flags
& PPC_OPCODE_ISEL
)
3916 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
3917 if (opcode
->flags
& PPC_OPCODE_EFS
)
3918 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
3919 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
3920 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
3921 if (opcode
->flags
& PPC_OPCODE_PMR
)
3922 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
3923 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
3924 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
3925 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
3926 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
3927 /* Only set the VLE flag if the instruction has been pulled via
3928 the VLE instruction set. This way the flag is guaranteed to
3929 be set for VLE-only instructions or for VLE-only processors,
3930 however it'll remain clear for dual-mode instructions on
3931 dual-mode and, more importantly, standard-mode processors. */
3932 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
3934 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
3935 if (elf_section_data (now_seg
) != NULL
)
3936 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
3941 /* Write out the instruction. */
3944 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
3945 /* All instructions can start on a 2 byte boundary for VLE. */
3948 if (frag_now
->insn_addr
!= addr_mask
)
3950 /* Don't emit instructions to a frag started for data, or for a
3951 CPU differing in VLE mode. Data is allowed to be misaligned,
3952 and it's possible to start a new frag in the middle of
3954 frag_wane (frag_now
);
3958 /* Check that insns within the frag are aligned. ppc_frag_check
3959 will ensure that the frag start address is aligned. */
3960 if ((frag_now_fix () & addr_mask
) != 0)
3961 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
3963 /* Differentiate between two, four, and eight byte insns. */
3965 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
3967 else if ((opcode
->flags
& PPC_OPCODE_POWERXX
) != 0
3968 && PPC_PREFIX_P (insn
))
3970 struct insn_label_list
*l
;
3974 /* 8-byte prefix instructions are not allowed to cross 64-byte
3976 frag_align_code (6, 4);
3977 record_alignment (now_seg
, 6);
3979 /* Update "dot" in any expressions used by this instruction, and
3980 a label attached to the instruction. By "attached" we mean
3981 on the same source line as the instruction and without any
3982 intervening semicolons. */
3983 dot_value
= frag_now_fix ();
3984 dot_frag
= frag_now
;
3985 for (l
= insn_labels
; l
!= NULL
; l
= l
->next
)
3987 symbol_set_frag (l
->label
, dot_frag
);
3988 S_SET_VALUE (l
->label
, dot_value
);
3992 ppc_clear_labels ();
3994 f
= frag_more (insn_length
);
3995 frag_now
->insn_addr
= addr_mask
;
3997 /* The prefix part of an 8-byte instruction always occupies the lower
3998 addressed word in a doubleword, regardless of endianness. */
3999 if (!target_big_endian
&& insn_length
== 8)
4001 md_number_to_chars (f
, PPC_GET_PREFIX (insn
), 4);
4002 md_number_to_chars (f
+ 4, PPC_GET_SUFFIX (insn
), 4);
4005 md_number_to_chars (f
, insn
, insn_length
);
4009 last_subseg
= now_subseg
;
4012 dwarf2_emit_insn (insn_length
);
4015 /* Create any fixups. */
4016 for (i
= 0; i
< fc
; i
++)
4019 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
4022 unsigned int size
= fixup_size (fixups
[i
].reloc
, &pcrel
);
4023 int offset
= target_big_endian
? (insn_length
- size
) : 0;
4025 fixP
= fix_new_exp (frag_now
,
4026 f
- frag_now
->fr_literal
+ offset
,
4034 const struct powerpc_operand
*operand
;
4036 operand
= &powerpc_operands
[fixups
[i
].opindex
];
4037 fixP
= fix_new_exp (frag_now
,
4038 f
- frag_now
->fr_literal
,
4041 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
4044 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
4048 /* Handle a macro. Gather all the operands, transform them as
4049 described by the macro, and call md_assemble recursively. All the
4050 operands are separated by commas; we don't accept parentheses
4051 around operands here. */
4054 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
4065 /* Gather the users operands into the operands array. */
4070 if (count
>= sizeof operands
/ sizeof operands
[0])
4072 operands
[count
++] = s
;
4073 s
= strchr (s
, ',');
4074 if (s
== (char *) NULL
)
4079 if (count
!= macro
->operands
)
4081 as_bad (_("wrong number of operands"));
4085 /* Work out how large the string must be (the size is unbounded
4086 because it includes user input). */
4088 format
= macro
->format
;
4089 while (*format
!= '\0')
4098 arg
= strtol (format
+ 1, &send
, 10);
4099 know (send
!= format
&& arg
< count
);
4100 len
+= strlen (operands
[arg
]);
4105 /* Put the string together. */
4106 complete
= s
= XNEWVEC (char, len
+ 1);
4107 format
= macro
->format
;
4108 while (*format
!= '\0')
4114 arg
= strtol (format
+ 1, &send
, 10);
4115 strcpy (s
, operands
[arg
]);
4122 /* Assemble the constructed instruction. */
4123 md_assemble (complete
);
4128 /* For ELF, add support for SHT_ORDERED. */
4131 ppc_section_type (char *str
, size_t len
)
4133 if (len
== 7 && strncmp (str
, "ordered", 7) == 0)
4140 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
4142 if (type
== SHT_ORDERED
)
4143 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
4149 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
4154 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
4157 #endif /* OBJ_ELF */
4160 /* Pseudo-op handling. */
4162 /* The .byte pseudo-op. This is similar to the normal .byte
4163 pseudo-op, but it can also take a single ASCII string. */
4166 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
4170 if (*input_line_pointer
!= '\"')
4176 /* Gather characters. A real double quote is doubled. Unusual
4177 characters are not permitted. */
4178 ++input_line_pointer
;
4183 c
= *input_line_pointer
++;
4187 if (*input_line_pointer
!= '\"')
4189 ++input_line_pointer
;
4192 FRAG_APPEND_1_CHAR (c
);
4196 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
4197 as_warn (_("data in executable section"));
4198 demand_empty_rest_of_line ();
4203 /* XCOFF specific pseudo-op handling. */
4205 /* This is set if we are creating a .stabx symbol, since we don't want
4206 to handle symbol suffixes for such symbols. */
4207 static bfd_boolean ppc_stab_symbol
;
4209 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
4210 symbols in the .bss segment as though they were local common
4211 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
4212 aligns .comm and .lcomm to 4 bytes. */
4215 ppc_comm (int lcomm
)
4217 asection
*current_seg
= now_seg
;
4218 subsegT current_subseg
= now_subseg
;
4224 symbolS
*lcomm_sym
= NULL
;
4228 endc
= get_symbol_name (&name
);
4229 end_name
= input_line_pointer
;
4230 (void) restore_line_pointer (endc
);
4232 if (*input_line_pointer
!= ',')
4234 as_bad (_("missing size"));
4235 ignore_rest_of_line ();
4238 ++input_line_pointer
;
4240 size
= get_absolute_expression ();
4243 as_bad (_("negative size"));
4244 ignore_rest_of_line ();
4250 /* The third argument to .comm is the alignment. */
4251 if (*input_line_pointer
!= ',')
4255 ++input_line_pointer
;
4256 align
= get_absolute_expression ();
4259 as_warn (_("ignoring bad alignment"));
4269 /* The third argument to .lcomm appears to be the real local
4270 common symbol to create. References to the symbol named in
4271 the first argument are turned into references to the third
4273 if (*input_line_pointer
!= ',')
4275 as_bad (_("missing real symbol name"));
4276 ignore_rest_of_line ();
4279 ++input_line_pointer
;
4281 lcomm_endc
= get_symbol_name (&lcomm_name
);
4283 lcomm_sym
= symbol_find_or_make (lcomm_name
);
4285 (void) restore_line_pointer (lcomm_endc
);
4287 /* The fourth argument to .lcomm is the alignment. */
4288 if (*input_line_pointer
!= ',')
4297 ++input_line_pointer
;
4298 align
= get_absolute_expression ();
4301 as_warn (_("ignoring bad alignment"));
4308 sym
= symbol_find_or_make (name
);
4311 if (S_IS_DEFINED (sym
)
4312 || S_GET_VALUE (sym
) != 0)
4314 as_bad (_("attempt to redefine symbol"));
4315 ignore_rest_of_line ();
4319 record_alignment (bss_section
, align
);
4322 || ! S_IS_DEFINED (lcomm_sym
))
4331 S_SET_EXTERNAL (sym
);
4335 symbol_get_tc (lcomm_sym
)->output
= 1;
4336 def_sym
= lcomm_sym
;
4340 subseg_set (bss_section
, 1);
4341 frag_align (align
, 0, 0);
4343 symbol_set_frag (def_sym
, frag_now
);
4344 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
4345 def_size
, (char *) NULL
);
4347 S_SET_SEGMENT (def_sym
, bss_section
);
4348 symbol_get_tc (def_sym
)->align
= align
;
4352 /* Align the size of lcomm_sym. */
4353 symbol_get_frag (lcomm_sym
)->fr_offset
=
4354 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
4355 &~ ((1 << align
) - 1));
4356 if (align
> symbol_get_tc (lcomm_sym
)->align
)
4357 symbol_get_tc (lcomm_sym
)->align
= align
;
4362 /* Make sym an offset from lcomm_sym. */
4363 S_SET_SEGMENT (sym
, bss_section
);
4364 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
4365 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
4366 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
4369 subseg_set (current_seg
, current_subseg
);
4371 demand_empty_rest_of_line ();
4374 /* The .csect pseudo-op. This switches us into a different
4375 subsegment. The first argument is a symbol whose value is the
4376 start of the .csect. In COFF, csect symbols get special aux
4377 entries defined by the x_csect field of union internal_auxent. The
4378 optional second argument is the alignment (the default is 2). */
4381 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
4388 endc
= get_symbol_name (&name
);
4390 sym
= symbol_find_or_make (name
);
4392 (void) restore_line_pointer (endc
);
4394 if (S_GET_NAME (sym
)[0] == '\0')
4396 /* An unnamed csect is assumed to be [PR]. */
4397 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
4401 if (*input_line_pointer
== ',')
4403 ++input_line_pointer
;
4404 align
= get_absolute_expression ();
4407 ppc_change_csect (sym
, align
);
4409 demand_empty_rest_of_line ();
4412 /* Change to a different csect. */
4415 ppc_change_csect (symbolS
*sym
, offsetT align
)
4417 if (S_IS_DEFINED (sym
))
4418 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
4428 /* This is a new csect. We need to look at the symbol class to
4429 figure out whether it should go in the text section or the
4433 switch (symbol_get_tc (sym
)->symbol_class
)
4443 S_SET_SEGMENT (sym
, text_section
);
4444 symbol_get_tc (sym
)->subseg
= ppc_text_subsegment
;
4445 ++ppc_text_subsegment
;
4446 list_ptr
= &ppc_text_csects
;
4456 if (ppc_toc_csect
!= NULL
4457 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4458 == ppc_data_subsegment
))
4460 S_SET_SEGMENT (sym
, data_section
);
4461 symbol_get_tc (sym
)->subseg
= ppc_data_subsegment
;
4462 ++ppc_data_subsegment
;
4463 list_ptr
= &ppc_data_csects
;
4469 /* We set the obstack chunk size to a small value before
4470 changing subsegments, so that we don't use a lot of memory
4471 space for what may be a small section. */
4472 hold_chunksize
= chunksize
;
4475 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4476 symbol_get_tc (sym
)->subseg
);
4478 chunksize
= hold_chunksize
;
4481 ppc_after_toc_frag
= frag_now
;
4483 record_alignment (sec
, align
);
4485 frag_align_code (align
, 0);
4487 frag_align (align
, 0, 0);
4489 symbol_set_frag (sym
, frag_now
);
4490 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4492 symbol_get_tc (sym
)->align
= align
;
4493 symbol_get_tc (sym
)->output
= 1;
4494 symbol_get_tc (sym
)->within
= sym
;
4496 for (list
= *list_ptr
;
4497 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4498 list
= symbol_get_tc (list
)->next
)
4500 symbol_get_tc (list
)->next
= sym
;
4502 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4503 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4507 ppc_current_csect
= sym
;
4511 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4515 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4517 sec
= subseg_new (dw
->name
, subseg
);
4518 oldflags
= bfd_get_section_flags (stdoutput
, sec
);
4519 if (oldflags
== SEC_NO_FLAGS
)
4521 /* Just created section. */
4522 gas_assert (dw_sections
[idx
].sect
== NULL
);
4524 bfd_set_section_flags (stdoutput
, sec
, SEC_DEBUGGING
);
4525 bfd_set_section_alignment (stdoutput
, sec
, 0);
4526 dw_sections
[idx
].sect
= sec
;
4529 /* Not anymore in a csect. */
4530 ppc_current_csect
= NULL
;
4533 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4534 .dwsect flag [, opt-label ]
4538 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4542 const struct xcoff_dwsect_name
*dw
;
4543 struct dw_subsection
*subseg
;
4544 struct dw_section
*dws
;
4548 flag
= get_absolute_expression ();
4550 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4551 if (xcoff_dwsect_names
[i
].flag
== flag
)
4553 dw
= &xcoff_dwsect_names
[i
];
4557 /* Parse opt-label. */
4558 if (*input_line_pointer
== ',')
4563 ++input_line_pointer
;
4565 c
= get_symbol_name (&label
);
4566 opt_label
= symbol_find_or_make (label
);
4567 (void) restore_line_pointer (c
);
4572 demand_empty_rest_of_line ();
4574 /* Return now in case of unknown subsection. */
4577 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4582 /* Find the subsection. */
4583 dws
= &dw_sections
[i
];
4585 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4587 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4588 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4590 as_bad (_("label %s was not defined in this dwarf section"),
4591 S_GET_NAME (opt_label
));
4592 subseg
= dws
->anon_subseg
;
4596 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4601 /* Switch to the subsection. */
4602 ppc_change_debug_section (i
, subseg
->subseg
);
4606 /* Create a new dw subsection. */
4607 subseg
= XNEW (struct dw_subsection
);
4609 if (opt_label
== NULL
)
4611 /* The anonymous one. */
4613 subseg
->link
= NULL
;
4614 dws
->anon_subseg
= subseg
;
4619 if (dws
->list_subseg
!= NULL
)
4620 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4624 subseg
->link
= dws
->list_subseg
;
4625 dws
->list_subseg
= subseg
;
4626 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4629 ppc_change_debug_section (i
, subseg
->subseg
);
4633 /* Add the length field. */
4634 expressionS
*exp
= &subseg
->end_exp
;
4637 if (opt_label
!= NULL
)
4638 symbol_set_value_now (opt_label
);
4640 /* Add the length field. Note that according to the AIX assembler
4641 manual, the size of the length field is 4 for powerpc32 but
4642 12 for powerpc64. */
4645 /* Write the 64bit marker. */
4646 md_number_to_chars (frag_more (4), -1, 4);
4649 exp
->X_op
= O_subtract
;
4650 exp
->X_op_symbol
= symbol_temp_new_now ();
4651 exp
->X_add_symbol
= symbol_temp_make ();
4653 sz
= ppc_obj64
? 8 : 4;
4654 exp
->X_add_number
= -sz
;
4655 emit_expr (exp
, sz
);
4660 /* This function handles the .text and .data pseudo-ops. These
4661 pseudo-ops aren't really used by XCOFF; we implement them for the
4662 convenience of people who aren't used to XCOFF. */
4665 ppc_section (int type
)
4672 else if (type
== 'd')
4677 sym
= symbol_find_or_make (name
);
4679 ppc_change_csect (sym
, 2);
4681 demand_empty_rest_of_line ();
4684 /* This function handles the .section pseudo-op. This is mostly to
4685 give an error, since XCOFF only supports .text, .data and .bss, but
4686 we do permit the user to name the text or data section. */
4689 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4692 const char *real_name
;
4696 c
= get_symbol_name (&user_name
);
4698 if (strcmp (user_name
, ".text") == 0)
4699 real_name
= ".text[PR]";
4700 else if (strcmp (user_name
, ".data") == 0)
4701 real_name
= ".data[RW]";
4704 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4705 (void) restore_line_pointer (c
);
4706 ignore_rest_of_line ();
4710 (void) restore_line_pointer (c
);
4712 sym
= symbol_find_or_make (real_name
);
4714 ppc_change_csect (sym
, 2);
4716 demand_empty_rest_of_line ();
4719 /* The .extern pseudo-op. We create an undefined symbol. */
4722 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4727 endc
= get_symbol_name (&name
);
4729 (void) symbol_find_or_make (name
);
4731 (void) restore_line_pointer (endc
);
4733 demand_empty_rest_of_line ();
4736 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4739 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4745 endc
= get_symbol_name (&name
);
4747 sym
= symbol_find_or_make (name
);
4749 (void) restore_line_pointer (endc
);
4751 symbol_get_tc (sym
)->output
= 1;
4753 demand_empty_rest_of_line ();
4756 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4757 relocations at the beginning of the current csect.
4759 (In principle, there's no reason why the relocations _have_ to be at
4760 the beginning. Anywhere in the csect would do. However, inserting
4761 at the beginning is what the native assembler does, and it helps to
4762 deal with cases where the .ref statements follow the section contents.)
4764 ??? .refs don't work for empty .csects. However, the native assembler
4765 doesn't report an error in this case, and neither yet do we. */
4768 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4773 if (ppc_current_csect
== NULL
)
4775 as_bad (_(".ref outside .csect"));
4776 ignore_rest_of_line ();
4782 c
= get_symbol_name (&name
);
4784 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4785 symbol_find_or_make (name
), 0, FALSE
, BFD_RELOC_NONE
);
4787 *input_line_pointer
= c
;
4788 SKIP_WHITESPACE_AFTER_NAME ();
4789 c
= *input_line_pointer
;
4792 input_line_pointer
++;
4794 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4796 as_bad (_("missing symbol name"));
4797 ignore_rest_of_line ();
4804 demand_empty_rest_of_line ();
4807 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4808 although I don't know why it bothers. */
4811 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4818 endc
= get_symbol_name (&name
);
4820 sym
= symbol_find_or_make (name
);
4822 (void) restore_line_pointer (endc
);
4824 if (*input_line_pointer
!= ',')
4826 as_bad (_("missing rename string"));
4827 ignore_rest_of_line ();
4830 ++input_line_pointer
;
4832 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
4834 demand_empty_rest_of_line ();
4837 /* The .stabx pseudo-op. This is similar to a normal .stabs
4838 pseudo-op, but slightly different. A sample is
4839 .stabx "main:F-1",.main,142,0
4840 The first argument is the symbol name to create. The second is the
4841 value, and the third is the storage class. The fourth seems to be
4842 always zero, and I am assuming it is the type. */
4845 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
4852 name
= demand_copy_C_string (&len
);
4854 if (*input_line_pointer
!= ',')
4856 as_bad (_("missing value"));
4859 ++input_line_pointer
;
4861 ppc_stab_symbol
= TRUE
;
4862 sym
= symbol_make (name
);
4863 ppc_stab_symbol
= FALSE
;
4865 symbol_get_tc (sym
)->real_name
= name
;
4867 (void) expression (&exp
);
4874 as_bad (_("illegal .stabx expression; zero assumed"));
4875 exp
.X_add_number
= 0;
4878 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
4879 symbol_set_frag (sym
, &zero_address_frag
);
4883 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
4884 symbol_set_value_expression (sym
, &exp
);
4888 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
4889 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
4894 /* The value is some complex expression. This will probably
4895 fail at some later point, but this is probably the right
4896 thing to do here. */
4897 symbol_set_value_expression (sym
, &exp
);
4901 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4902 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4904 if (*input_line_pointer
!= ',')
4906 as_bad (_("missing class"));
4909 ++input_line_pointer
;
4911 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
4913 if (*input_line_pointer
!= ',')
4915 as_bad (_("missing type"));
4918 ++input_line_pointer
;
4920 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
4922 symbol_get_tc (sym
)->output
= 1;
4924 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
4929 .stabx "z",arrays_,133,0
4932 .comm arrays_,13768,3
4934 resolve_symbol_value will copy the exp's "within" into sym's when the
4935 offset is 0. Since this seems to be corner case problem,
4936 only do the correction for storage class C_STSYM. A better solution
4937 would be to have the tc field updated in ppc_symbol_new_hook. */
4939 if (exp
.X_op
== O_symbol
)
4941 if (ppc_current_block
== NULL
)
4942 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4944 symbol_get_tc (sym
)->within
= ppc_current_block
;
4945 symbol_get_tc (exp
.X_add_symbol
)->within
= ppc_current_block
;
4949 if (exp
.X_op
!= O_symbol
4950 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
4951 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
4952 ppc_frob_label (sym
);
4955 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4956 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
4957 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
4958 symbol_get_tc (ppc_current_csect
)->within
= sym
;
4961 demand_empty_rest_of_line ();
4964 /* The .function pseudo-op. This takes several arguments. The first
4965 argument seems to be the external name of the symbol. The second
4966 argument seems to be the label for the start of the function. gcc
4967 uses the same name for both. I have no idea what the third and
4968 fourth arguments are meant to be. The optional fifth argument is
4969 an expression for the size of the function. In COFF this symbol
4970 gets an aux entry like that used for a csect. */
4973 ppc_function (int ignore ATTRIBUTE_UNUSED
)
4981 endc
= get_symbol_name (&name
);
4983 /* Ignore any [PR] suffix. */
4984 name
= ppc_canonicalize_symbol_name (name
);
4985 s
= strchr (name
, '[');
4986 if (s
!= (char *) NULL
4987 && strcmp (s
+ 1, "PR]") == 0)
4990 ext_sym
= symbol_find_or_make (name
);
4992 (void) restore_line_pointer (endc
);
4994 if (*input_line_pointer
!= ',')
4996 as_bad (_("missing symbol name"));
4997 ignore_rest_of_line ();
5000 ++input_line_pointer
;
5002 endc
= get_symbol_name (&name
);
5004 lab_sym
= symbol_find_or_make (name
);
5006 (void) restore_line_pointer (endc
);
5008 if (ext_sym
!= lab_sym
)
5012 exp
.X_op
= O_symbol
;
5013 exp
.X_add_symbol
= lab_sym
;
5014 exp
.X_op_symbol
= NULL
;
5015 exp
.X_add_number
= 0;
5017 symbol_set_value_expression (ext_sym
, &exp
);
5020 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
5021 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
5022 symbol_get_tc (ext_sym
)->output
= 1;
5024 if (*input_line_pointer
== ',')
5028 /* Ignore the third argument. */
5029 ++input_line_pointer
;
5031 if (*input_line_pointer
== ',')
5033 /* Ignore the fourth argument. */
5034 ++input_line_pointer
;
5036 if (*input_line_pointer
== ',')
5038 /* The fifth argument is the function size. */
5039 ++input_line_pointer
;
5040 symbol_get_tc (ext_sym
)->u
.size
= symbol_new
5041 ("L0\001", absolute_section
,(valueT
) 0, &zero_address_frag
);
5042 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
5047 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5048 SF_SET_FUNCTION (ext_sym
);
5049 SF_SET_PROCESS (ext_sym
);
5050 coff_add_linesym (ext_sym
);
5052 demand_empty_rest_of_line ();
5055 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
5056 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
5057 with the correct line number */
5059 static symbolS
*saved_bi_sym
= 0;
5062 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
5066 sym
= symbol_make (".bf");
5067 S_SET_SEGMENT (sym
, text_section
);
5068 symbol_set_frag (sym
, frag_now
);
5069 S_SET_VALUE (sym
, frag_now_fix ());
5070 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5072 coff_line_base
= get_absolute_expression ();
5074 S_SET_NUMBER_AUXILIARY (sym
, 1);
5075 SA_SET_SYM_LNNO (sym
, coff_line_base
);
5077 /* Line number for bi. */
5080 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
5085 symbol_get_tc (sym
)->output
= 1;
5087 ppc_frob_label (sym
);
5089 demand_empty_rest_of_line ();
5092 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
5093 ".ef", except that the line number is absolute, not relative to the
5094 most recent ".bf" symbol. */
5097 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
5101 sym
= symbol_make (".ef");
5102 S_SET_SEGMENT (sym
, text_section
);
5103 symbol_set_frag (sym
, frag_now
);
5104 S_SET_VALUE (sym
, frag_now_fix ());
5105 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5106 S_SET_NUMBER_AUXILIARY (sym
, 1);
5107 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5108 symbol_get_tc (sym
)->output
= 1;
5110 ppc_frob_label (sym
);
5112 demand_empty_rest_of_line ();
5115 /* The .bi and .ei pseudo-ops. These take a string argument and
5116 generates a C_BINCL or C_EINCL symbol, which goes at the start of
5117 the symbol list. The value of .bi will be know when the next .bf
5123 static symbolS
*last_biei
;
5130 name
= demand_copy_C_string (&len
);
5132 /* The value of these symbols is actually file offset. Here we set
5133 the value to the index into the line number entries. In
5134 ppc_frob_symbols we set the fix_line field, which will cause BFD
5135 to do the right thing. */
5137 sym
= symbol_make (name
);
5138 /* obj-coff.c currently only handles line numbers correctly in the
5140 S_SET_SEGMENT (sym
, text_section
);
5141 S_SET_VALUE (sym
, coff_n_line_nos
);
5142 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5144 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
5145 symbol_get_tc (sym
)->output
= 1;
5153 for (look
= last_biei
? last_biei
: symbol_rootP
;
5154 (look
!= (symbolS
*) NULL
5155 && (S_GET_STORAGE_CLASS (look
) == C_FILE
5156 || S_GET_STORAGE_CLASS (look
) == C_BINCL
5157 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
5158 look
= symbol_next (look
))
5160 if (look
!= (symbolS
*) NULL
)
5162 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5163 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
5167 demand_empty_rest_of_line ();
5170 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
5171 There is one argument, which is a csect symbol. The value of the
5172 .bs symbol is the index of this csect symbol. */
5175 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
5182 if (ppc_current_block
!= NULL
)
5183 as_bad (_("nested .bs blocks"));
5185 endc
= get_symbol_name (&name
);
5187 csect
= symbol_find_or_make (name
);
5189 (void) restore_line_pointer (endc
);
5191 sym
= symbol_make (".bs");
5192 S_SET_SEGMENT (sym
, now_seg
);
5193 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
5194 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5195 symbol_get_tc (sym
)->output
= 1;
5197 symbol_get_tc (sym
)->within
= csect
;
5199 ppc_frob_label (sym
);
5201 ppc_current_block
= sym
;
5203 demand_empty_rest_of_line ();
5206 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
5209 ppc_es (int ignore ATTRIBUTE_UNUSED
)
5213 if (ppc_current_block
== NULL
)
5214 as_bad (_(".es without preceding .bs"));
5216 sym
= symbol_make (".es");
5217 S_SET_SEGMENT (sym
, now_seg
);
5218 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
5219 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5220 symbol_get_tc (sym
)->output
= 1;
5222 ppc_frob_label (sym
);
5224 ppc_current_block
= NULL
;
5226 demand_empty_rest_of_line ();
5229 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
5233 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
5237 sym
= symbol_make (".bb");
5238 S_SET_SEGMENT (sym
, text_section
);
5239 symbol_set_frag (sym
, frag_now
);
5240 S_SET_VALUE (sym
, frag_now_fix ());
5241 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5243 S_SET_NUMBER_AUXILIARY (sym
, 1);
5244 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5246 symbol_get_tc (sym
)->output
= 1;
5248 SF_SET_PROCESS (sym
);
5250 ppc_frob_label (sym
);
5252 demand_empty_rest_of_line ();
5255 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
5259 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
5263 sym
= symbol_make (".eb");
5264 S_SET_SEGMENT (sym
, text_section
);
5265 symbol_set_frag (sym
, frag_now
);
5266 S_SET_VALUE (sym
, frag_now_fix ());
5267 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5268 S_SET_NUMBER_AUXILIARY (sym
, 1);
5269 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5270 symbol_get_tc (sym
)->output
= 1;
5272 SF_SET_PROCESS (sym
);
5274 ppc_frob_label (sym
);
5276 demand_empty_rest_of_line ();
5279 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
5283 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
5289 name
= demand_copy_C_string (&len
);
5290 sym
= symbol_make (name
);
5291 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5292 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5293 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
5294 S_SET_VALUE (sym
, 0);
5295 symbol_get_tc (sym
)->output
= 1;
5297 ppc_frob_label (sym
);
5299 demand_empty_rest_of_line ();
5302 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
5305 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
5309 sym
= symbol_make (".ec");
5310 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5311 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5312 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
5313 S_SET_VALUE (sym
, 0);
5314 symbol_get_tc (sym
)->output
= 1;
5316 ppc_frob_label (sym
);
5318 demand_empty_rest_of_line ();
5321 /* The .toc pseudo-op. Switch to the .toc subsegment. */
5324 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
5326 if (ppc_toc_csect
!= (symbolS
*) NULL
)
5327 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
5334 subseg
= ppc_data_subsegment
;
5335 ++ppc_data_subsegment
;
5337 subseg_new (segment_name (data_section
), subseg
);
5338 ppc_toc_frag
= frag_now
;
5340 sym
= symbol_find_or_make ("TOC[TC0]");
5341 symbol_set_frag (sym
, frag_now
);
5342 S_SET_SEGMENT (sym
, data_section
);
5343 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5344 symbol_get_tc (sym
)->subseg
= subseg
;
5345 symbol_get_tc (sym
)->output
= 1;
5346 symbol_get_tc (sym
)->within
= sym
;
5348 ppc_toc_csect
= sym
;
5350 for (list
= ppc_data_csects
;
5351 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
5352 list
= symbol_get_tc (list
)->next
)
5354 symbol_get_tc (list
)->next
= sym
;
5356 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5357 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
5361 ppc_current_csect
= ppc_toc_csect
;
5363 demand_empty_rest_of_line ();
5366 /* The AIX assembler automatically aligns the operands of a .long or
5367 .short pseudo-op, and we want to be compatible. */
5370 ppc_xcoff_cons (int log_size
)
5372 frag_align (log_size
, 0, 0);
5373 record_alignment (now_seg
, log_size
);
5374 cons (1 << log_size
);
5378 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
5383 (void) expression (&exp
);
5385 if (exp
.X_op
!= O_constant
)
5387 as_bad (_("non-constant byte count"));
5391 byte_count
= exp
.X_add_number
;
5393 if (*input_line_pointer
!= ',')
5395 as_bad (_("missing value"));
5399 ++input_line_pointer
;
5404 ppc_xcoff_end (void)
5408 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
5410 struct dw_section
*dws
= &dw_sections
[i
];
5411 struct dw_subsection
*dwss
;
5413 if (dws
->anon_subseg
)
5415 dwss
= dws
->anon_subseg
;
5416 dwss
->link
= dws
->list_subseg
;
5419 dwss
= dws
->list_subseg
;
5421 for (; dwss
!= NULL
; dwss
= dwss
->link
)
5422 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
5424 subseg_set (dws
->sect
, dwss
->subseg
);
5425 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
5430 #endif /* OBJ_XCOFF */
5431 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5433 /* The .tc pseudo-op. This is used when generating either XCOFF or
5434 ELF. This takes two or more arguments.
5436 When generating XCOFF output, the first argument is the name to
5437 give to this location in the toc; this will be a symbol with class
5438 TC. The rest of the arguments are N-byte values to actually put at
5439 this location in the TOC; often there is just one more argument, a
5440 relocatable symbol reference. The size of the value to store
5441 depends on target word size. A 32-bit target uses 4-byte values, a
5442 64-bit target uses 8-byte values.
5444 When not generating XCOFF output, the arguments are the same, but
5445 the first argument is simply ignored. */
5448 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5452 /* Define the TOC symbol name. */
5458 if (ppc_toc_csect
== (symbolS
*) NULL
5459 || ppc_toc_csect
!= ppc_current_csect
)
5461 as_bad (_(".tc not in .toc section"));
5462 ignore_rest_of_line ();
5466 endc
= get_symbol_name (&name
);
5468 sym
= symbol_find_or_make (name
);
5470 (void) restore_line_pointer (endc
);
5472 if (S_IS_DEFINED (sym
))
5476 label
= symbol_get_tc (ppc_current_csect
)->within
;
5477 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5479 as_bad (_(".tc with no label"));
5480 ignore_rest_of_line ();
5484 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5485 symbol_set_frag (label
, symbol_get_frag (sym
));
5486 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5488 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5489 ++input_line_pointer
;
5494 S_SET_SEGMENT (sym
, now_seg
);
5495 symbol_set_frag (sym
, frag_now
);
5496 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5497 symbol_get_tc (sym
)->symbol_class
= XMC_TC
;
5498 symbol_get_tc (sym
)->output
= 1;
5500 ppc_frob_label (sym
);
5503 #endif /* OBJ_XCOFF */
5507 /* Skip the TOC symbol name. */
5508 while (is_part_of_name (*input_line_pointer
)
5509 || *input_line_pointer
== ' '
5510 || *input_line_pointer
== '['
5511 || *input_line_pointer
== ']'
5512 || *input_line_pointer
== '{'
5513 || *input_line_pointer
== '}')
5514 ++input_line_pointer
;
5516 /* Align to a four/eight byte boundary. */
5517 align
= ppc_obj64
? 3 : 2;
5518 frag_align (align
, 0, 0);
5519 record_alignment (now_seg
, align
);
5520 #endif /* OBJ_ELF */
5522 if (*input_line_pointer
!= ',')
5523 demand_empty_rest_of_line ();
5526 ++input_line_pointer
;
5527 cons (ppc_obj64
? 8 : 4);
5531 /* Pseudo-op .machine. */
5534 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5538 #define MAX_HISTORY 100
5539 static ppc_cpu_t
*cpu_history
;
5540 static int curr_hist
;
5544 c
= get_symbol_name (&cpu_string
);
5545 cpu_string
= xstrdup (cpu_string
);
5546 (void) restore_line_pointer (c
);
5548 if (cpu_string
!= NULL
)
5550 ppc_cpu_t old_cpu
= ppc_cpu
;
5554 for (p
= cpu_string
; *p
!= 0; p
++)
5557 if (strcmp (cpu_string
, "push") == 0)
5559 if (cpu_history
== NULL
)
5560 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5562 if (curr_hist
>= MAX_HISTORY
)
5563 as_bad (_(".machine stack overflow"));
5565 cpu_history
[curr_hist
++] = ppc_cpu
;
5567 else if (strcmp (cpu_string
, "pop") == 0)
5570 as_bad (_(".machine stack underflow"));
5572 ppc_cpu
= cpu_history
[--curr_hist
];
5574 else if ((new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, cpu_string
)) != 0)
5577 as_bad (_("invalid machine `%s'"), cpu_string
);
5579 if (ppc_cpu
!= old_cpu
)
5580 ppc_setup_opcodes ();
5583 demand_empty_rest_of_line ();
5585 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5589 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5591 /* Set the current section. */
5593 ppc_set_current_section (segT
new)
5595 ppc_previous_section
= ppc_current_section
;
5596 ppc_current_section
= new;
5599 /* pseudo-op: .previous
5600 behaviour: toggles the current section with the previous section.
5602 warnings: "No previous section" */
5605 ppc_previous (int ignore ATTRIBUTE_UNUSED
)
5607 if (ppc_previous_section
== NULL
)
5609 as_warn (_("no previous section to return to, ignored."));
5613 subseg_set (ppc_previous_section
, 0);
5615 ppc_set_current_section (ppc_previous_section
);
5618 /* pseudo-op: .pdata
5619 behaviour: predefined read only data section
5623 initial: .section .pdata "adr3"
5624 a - don't know -- maybe a misprint
5625 d - initialized data
5627 3 - double word aligned (that would be 4 byte boundary)
5630 Tag index tables (also known as the function table) for exception
5631 handling, debugging, etc. */
5634 ppc_pdata (int ignore ATTRIBUTE_UNUSED
)
5636 if (pdata_section
== 0)
5638 pdata_section
= subseg_new (".pdata", 0);
5640 bfd_set_section_flags (stdoutput
, pdata_section
,
5641 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5642 | SEC_READONLY
| SEC_DATA
));
5644 bfd_set_section_alignment (stdoutput
, pdata_section
, 2);
5648 pdata_section
= subseg_new (".pdata", 0);
5650 ppc_set_current_section (pdata_section
);
5653 /* pseudo-op: .ydata
5654 behaviour: predefined read only data section
5658 initial: .section .ydata "drw3"
5659 a - don't know -- maybe a misprint
5660 d - initialized data
5662 3 - double word aligned (that would be 4 byte boundary)
5664 Tag tables (also known as the scope table) for exception handling,
5668 ppc_ydata (int ignore ATTRIBUTE_UNUSED
)
5670 if (ydata_section
== 0)
5672 ydata_section
= subseg_new (".ydata", 0);
5673 bfd_set_section_flags (stdoutput
, ydata_section
,
5674 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5675 | SEC_READONLY
| SEC_DATA
));
5677 bfd_set_section_alignment (stdoutput
, ydata_section
, 3);
5681 ydata_section
= subseg_new (".ydata", 0);
5683 ppc_set_current_section (ydata_section
);
5686 /* pseudo-op: .reldata
5687 behaviour: predefined read write data section
5688 double word aligned (4-byte)
5689 FIXME: relocation is applied to it
5690 FIXME: what's the difference between this and .data?
5693 initial: .section .reldata "drw3"
5694 d - initialized data
5697 3 - double word aligned (that would be 8 byte boundary)
5700 Like .data, but intended to hold data subject to relocation, such as
5701 function descriptors, etc. */
5704 ppc_reldata (int ignore ATTRIBUTE_UNUSED
)
5706 if (reldata_section
== 0)
5708 reldata_section
= subseg_new (".reldata", 0);
5710 bfd_set_section_flags (stdoutput
, reldata_section
,
5711 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5714 bfd_set_section_alignment (stdoutput
, reldata_section
, 2);
5718 reldata_section
= subseg_new (".reldata", 0);
5720 ppc_set_current_section (reldata_section
);
5723 /* pseudo-op: .rdata
5724 behaviour: predefined read only data section
5728 initial: .section .rdata "dr3"
5729 d - initialized data
5731 3 - double word aligned (that would be 4 byte boundary) */
5734 ppc_rdata (int ignore ATTRIBUTE_UNUSED
)
5736 if (rdata_section
== 0)
5738 rdata_section
= subseg_new (".rdata", 0);
5739 bfd_set_section_flags (stdoutput
, rdata_section
,
5740 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5741 | SEC_READONLY
| SEC_DATA
));
5743 bfd_set_section_alignment (stdoutput
, rdata_section
, 2);
5747 rdata_section
= subseg_new (".rdata", 0);
5749 ppc_set_current_section (rdata_section
);
5752 /* pseudo-op: .ualong
5753 behaviour: much like .int, with the exception that no alignment is
5755 FIXME: test the alignment statement
5760 ppc_ualong (int ignore ATTRIBUTE_UNUSED
)
5766 /* pseudo-op: .znop <symbol name>
5767 behaviour: Issue a nop instruction
5768 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5769 the supplied symbol name.
5771 warnings: Missing symbol name */
5774 ppc_znop (int ignore ATTRIBUTE_UNUSED
)
5777 const struct powerpc_opcode
*opcode
;
5784 /* Strip out the symbol name. */
5785 c
= get_symbol_name (&symbol_name
);
5787 name
= xstrdup (symbol_name
);
5789 sym
= symbol_find_or_make (name
);
5791 *input_line_pointer
= c
;
5793 SKIP_WHITESPACE_AFTER_NAME ();
5795 /* Look up the opcode in the hash table. */
5796 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, "nop");
5798 /* Stick in the nop. */
5799 insn
= opcode
->opcode
;
5801 /* Write out the instruction. */
5803 md_number_to_chars (f
, insn
, 4);
5805 f
- frag_now
->fr_literal
,
5810 BFD_RELOC_16_GOT_PCREL
);
5820 ppc_pe_comm (int lcomm
)
5829 c
= get_symbol_name (&name
);
5831 /* just after name is now '\0'. */
5832 p
= input_line_pointer
;
5834 SKIP_WHITESPACE_AFTER_NAME ();
5835 if (*input_line_pointer
!= ',')
5837 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5838 ignore_rest_of_line ();
5842 input_line_pointer
++; /* skip ',' */
5843 if ((temp
= get_absolute_expression ()) < 0)
5845 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
5846 ignore_rest_of_line ();
5852 /* The third argument to .comm is the alignment. */
5853 if (*input_line_pointer
!= ',')
5857 ++input_line_pointer
;
5858 align
= get_absolute_expression ();
5861 as_warn (_("ignoring bad alignment"));
5868 symbolP
= symbol_find_or_make (name
);
5871 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
5873 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5874 S_GET_NAME (symbolP
));
5875 ignore_rest_of_line ();
5879 if (S_GET_VALUE (symbolP
))
5881 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
5882 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5883 S_GET_NAME (symbolP
),
5884 (long) S_GET_VALUE (symbolP
),
5889 S_SET_VALUE (symbolP
, (valueT
) temp
);
5890 S_SET_EXTERNAL (symbolP
);
5891 S_SET_SEGMENT (symbolP
, bfd_com_section_ptr
);
5894 demand_empty_rest_of_line ();
5898 * implement the .section pseudo op:
5899 * .section name {, "flags"}
5901 * | +--- optional flags: 'b' for bss
5903 * +-- section name 'l' for lib
5907 * 'd' (apparently m88k for data)
5909 * But if the argument is not a quoted string, treat it as a
5910 * subsegment number.
5912 * FIXME: this is a copy of the section processing from obj-coff.c, with
5913 * additions/changes for the moto-pas assembler support. There are three
5916 * FIXME: I just noticed this. This doesn't work at all really. It it
5917 * setting bits that bfd probably neither understands or uses. The
5918 * correct approach (?) will have to incorporate extra fields attached
5919 * to the section to hold the system specific stuff. (krk)
5922 * 'a' - unknown - referred to in documentation, but no definition supplied
5923 * 'c' - section has code
5924 * 'd' - section has initialized data
5925 * 'u' - section has uninitialized data
5926 * 'i' - section contains directives (info)
5927 * 'n' - section can be discarded
5928 * 'R' - remove section at link time
5930 * Section Protection:
5931 * 'r' - section is readable
5932 * 'w' - section is writable
5933 * 'x' - section is executable
5934 * 's' - section is sharable
5936 * Section Alignment:
5937 * '0' - align to byte boundary
5938 * '1' - align to halfword boundary
5939 * '2' - align to word boundary
5940 * '3' - align to doubleword boundary
5941 * '4' - align to quadword boundary
5942 * '5' - align to 32 byte boundary
5943 * '6' - align to 64 byte boundary
5948 ppc_pe_section (int ignore ATTRIBUTE_UNUSED
)
5950 /* Strip out the section name. */
5959 c
= get_symbol_name (§ion_name
);
5961 name
= xstrdup (section_name
);
5963 *input_line_pointer
= c
;
5965 SKIP_WHITESPACE_AFTER_NAME ();
5968 flags
= SEC_NO_FLAGS
;
5970 if (strcmp (name
, ".idata$2") == 0)
5974 else if (strcmp (name
, ".idata$3") == 0)
5978 else if (strcmp (name
, ".idata$4") == 0)
5982 else if (strcmp (name
, ".idata$5") == 0)
5986 else if (strcmp (name
, ".idata$6") == 0)
5991 /* Default alignment to 16 byte boundary. */
5994 if (*input_line_pointer
== ',')
5996 ++input_line_pointer
;
5998 if (*input_line_pointer
!= '"')
5999 exp
= get_absolute_expression ();
6002 ++input_line_pointer
;
6003 while (*input_line_pointer
!= '"'
6004 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
6006 switch (*input_line_pointer
)
6008 /* Section Contents */
6009 case 'a': /* unknown */
6010 as_bad (_("unsupported section attribute -- 'a'"));
6012 case 'c': /* code section */
6015 case 'd': /* section has initialized data */
6018 case 'u': /* section has uninitialized data */
6019 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
6023 case 'i': /* section contains directives (info) */
6024 /* FIXME: This is IMAGE_SCN_LNK_INFO
6026 flags
|= SEC_HAS_CONTENTS
;
6028 case 'n': /* section can be discarded */
6031 case 'R': /* Remove section at link time */
6032 flags
|= SEC_NEVER_LOAD
;
6034 #if IFLICT_BRAIN_DAMAGE
6035 /* Section Protection */
6036 case 'r': /* section is readable */
6037 flags
|= IMAGE_SCN_MEM_READ
;
6039 case 'w': /* section is writable */
6040 flags
|= IMAGE_SCN_MEM_WRITE
;
6042 case 'x': /* section is executable */
6043 flags
|= IMAGE_SCN_MEM_EXECUTE
;
6045 case 's': /* section is sharable */
6046 flags
|= IMAGE_SCN_MEM_SHARED
;
6049 /* Section Alignment */
6050 case '0': /* align to byte boundary */
6051 flags
|= IMAGE_SCN_ALIGN_1BYTES
;
6054 case '1': /* align to halfword boundary */
6055 flags
|= IMAGE_SCN_ALIGN_2BYTES
;
6058 case '2': /* align to word boundary */
6059 flags
|= IMAGE_SCN_ALIGN_4BYTES
;
6062 case '3': /* align to doubleword boundary */
6063 flags
|= IMAGE_SCN_ALIGN_8BYTES
;
6066 case '4': /* align to quadword boundary */
6067 flags
|= IMAGE_SCN_ALIGN_16BYTES
;
6070 case '5': /* align to 32 byte boundary */
6071 flags
|= IMAGE_SCN_ALIGN_32BYTES
;
6074 case '6': /* align to 64 byte boundary */
6075 flags
|= IMAGE_SCN_ALIGN_64BYTES
;
6080 as_bad (_("unknown section attribute '%c'"),
6081 *input_line_pointer
);
6084 ++input_line_pointer
;
6086 if (*input_line_pointer
== '"')
6087 ++input_line_pointer
;
6091 sec
= subseg_new (name
, (subsegT
) exp
);
6093 ppc_set_current_section (sec
);
6095 if (flags
!= SEC_NO_FLAGS
)
6097 if (! bfd_set_section_flags (stdoutput
, sec
, flags
))
6098 as_bad (_("error setting flags for \"%s\": %s"),
6099 bfd_section_name (stdoutput
, sec
),
6100 bfd_errmsg (bfd_get_error ()));
6103 bfd_set_section_alignment (stdoutput
, sec
, align
);
6107 ppc_pe_function (int ignore ATTRIBUTE_UNUSED
)
6113 endc
= get_symbol_name (&name
);
6115 ext_sym
= symbol_find_or_make (name
);
6117 (void) restore_line_pointer (endc
);
6119 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
6120 SF_SET_FUNCTION (ext_sym
);
6121 SF_SET_PROCESS (ext_sym
);
6122 coff_add_linesym (ext_sym
);
6124 demand_empty_rest_of_line ();
6128 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED
)
6130 if (tocdata_section
== 0)
6132 tocdata_section
= subseg_new (".tocd", 0);
6133 /* FIXME: section flags won't work. */
6134 bfd_set_section_flags (stdoutput
, tocdata_section
,
6135 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
6136 | SEC_READONLY
| SEC_DATA
));
6138 bfd_set_section_alignment (stdoutput
, tocdata_section
, 2);
6142 rdata_section
= subseg_new (".tocd", 0);
6145 ppc_set_current_section (tocdata_section
);
6147 demand_empty_rest_of_line ();
6150 /* Don't adjust TOC relocs to use the section symbol. */
6153 ppc_pe_fix_adjustable (fixS
*fix
)
6155 return fix
->fx_r_type
!= BFD_RELOC_PPC_TOC16
;
6162 /* XCOFF specific symbol and file handling. */
6164 /* Canonicalize the symbol name. We use the to force the suffix, if
6165 any, to use square brackets, and to be in upper case. */
6168 ppc_canonicalize_symbol_name (char *name
)
6172 if (ppc_stab_symbol
)
6175 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
6189 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
6192 if (*s
== '\0' || s
[1] != '\0')
6193 as_bad (_("bad symbol suffix"));
6201 /* Set the class of a symbol based on the suffix, if any. This is
6202 called whenever a new symbol is created. */
6205 ppc_symbol_new_hook (symbolS
*sym
)
6207 struct ppc_tc_sy
*tc
;
6210 tc
= symbol_get_tc (sym
);
6213 tc
->symbol_class
= -1;
6214 tc
->real_name
= NULL
;
6221 if (ppc_stab_symbol
)
6224 s
= strchr (S_GET_NAME (sym
), '[');
6225 if (s
== (const char *) NULL
)
6227 /* There is no suffix. */
6236 if (strcmp (s
, "BS]") == 0)
6237 tc
->symbol_class
= XMC_BS
;
6240 if (strcmp (s
, "DB]") == 0)
6241 tc
->symbol_class
= XMC_DB
;
6242 else if (strcmp (s
, "DS]") == 0)
6243 tc
->symbol_class
= XMC_DS
;
6246 if (strcmp (s
, "GL]") == 0)
6247 tc
->symbol_class
= XMC_GL
;
6250 if (strcmp (s
, "PR]") == 0)
6251 tc
->symbol_class
= XMC_PR
;
6254 if (strcmp (s
, "RO]") == 0)
6255 tc
->symbol_class
= XMC_RO
;
6256 else if (strcmp (s
, "RW]") == 0)
6257 tc
->symbol_class
= XMC_RW
;
6260 if (strcmp (s
, "SV]") == 0)
6261 tc
->symbol_class
= XMC_SV
;
6264 if (strcmp (s
, "TC]") == 0)
6265 tc
->symbol_class
= XMC_TC
;
6266 else if (strcmp (s
, "TI]") == 0)
6267 tc
->symbol_class
= XMC_TI
;
6268 else if (strcmp (s
, "TB]") == 0)
6269 tc
->symbol_class
= XMC_TB
;
6270 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
6271 tc
->symbol_class
= XMC_TC0
;
6274 if (strcmp (s
, "UA]") == 0)
6275 tc
->symbol_class
= XMC_UA
;
6276 else if (strcmp (s
, "UC]") == 0)
6277 tc
->symbol_class
= XMC_UC
;
6280 if (strcmp (s
, "XO]") == 0)
6281 tc
->symbol_class
= XMC_XO
;
6285 if (tc
->symbol_class
== -1)
6286 as_bad (_("unrecognized symbol suffix"));
6289 /* This variable is set by ppc_frob_symbol if any absolute symbols are
6290 seen. It tells ppc_adjust_symtab whether it needs to look through
6293 static bfd_boolean ppc_saw_abs
;
6295 /* Change the name of a symbol just before writing it out. Set the
6296 real name if the .rename pseudo-op was used. Otherwise, remove any
6297 class suffix. Return 1 if the symbol should not be included in the
6301 ppc_frob_symbol (symbolS
*sym
)
6303 static symbolS
*ppc_last_function
;
6304 static symbolS
*set_end
;
6306 /* Discard symbols that should not be included in the output symbol
6308 if (! symbol_used_in_reloc_p (sym
)
6309 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
6310 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6311 && ! symbol_get_tc (sym
)->output
6312 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
6315 /* This one will disappear anyway. Don't make a csect sym for it. */
6316 if (sym
== abs_section_sym
)
6319 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
6320 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
6326 name
= S_GET_NAME (sym
);
6327 s
= strchr (name
, '[');
6328 if (s
!= (char *) NULL
)
6334 snew
= xstrndup (name
, len
);
6336 S_SET_NAME (sym
, snew
);
6340 if (set_end
!= (symbolS
*) NULL
)
6342 SA_SET_SYM_ENDNDX (set_end
, sym
);
6346 if (SF_GET_FUNCTION (sym
))
6348 if (ppc_last_function
!= (symbolS
*) NULL
)
6349 as_bad (_("two .function pseudo-ops with no intervening .ef"));
6350 ppc_last_function
= sym
;
6351 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
6353 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
6354 SA_SET_SYM_FSIZE (sym
,
6355 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
6358 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
6359 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
6361 if (ppc_last_function
== (symbolS
*) NULL
)
6362 as_bad (_(".ef with no preceding .function"));
6365 set_end
= ppc_last_function
;
6366 ppc_last_function
= NULL
;
6368 /* We don't have a C_EFCN symbol, but we need to force the
6369 COFF backend to believe that it has seen one. */
6370 coff_last_function
= NULL
;
6374 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6375 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
6376 && S_GET_STORAGE_CLASS (sym
) != C_FILE
6377 && S_GET_STORAGE_CLASS (sym
) != C_FCN
6378 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
6379 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
6380 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
6381 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
6382 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
6383 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
6384 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
6386 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
6387 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
6388 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
6391 union internal_auxent
*a
;
6393 /* Create a csect aux. */
6394 i
= S_GET_NUMBER_AUXILIARY (sym
);
6395 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
6396 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
6397 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
6399 /* This is the TOC table. */
6400 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
6401 a
->x_csect
.x_scnlen
.l
= 0;
6402 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6404 else if (symbol_get_tc (sym
)->subseg
!= 0)
6406 /* This is a csect symbol. x_scnlen is the size of the
6408 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
6409 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6410 S_GET_SEGMENT (sym
))
6411 - S_GET_VALUE (sym
));
6414 resolve_symbol_value (symbol_get_tc (sym
)->next
);
6415 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
6416 - S_GET_VALUE (sym
));
6418 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
6420 else if (S_GET_SEGMENT (sym
) == bss_section
)
6422 /* This is a common symbol. */
6423 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6424 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6425 if (S_IS_EXTERNAL (sym
))
6426 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6428 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6430 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6432 /* This is an absolute symbol. The csect will be created by
6433 ppc_adjust_symtab. */
6435 a
->x_csect
.x_smtyp
= XTY_LD
;
6436 if (symbol_get_tc (sym
)->symbol_class
== -1)
6437 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6439 else if (! S_IS_DEFINED (sym
))
6441 /* This is an external symbol. */
6442 a
->x_csect
.x_scnlen
.l
= 0;
6443 a
->x_csect
.x_smtyp
= XTY_ER
;
6445 else if (symbol_get_tc (sym
)->symbol_class
== XMC_TC
)
6449 /* This is a TOC definition. x_scnlen is the size of the
6451 next
= symbol_next (sym
);
6452 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6453 next
= symbol_next (next
);
6454 if (next
== (symbolS
*) NULL
6455 || symbol_get_tc (next
)->symbol_class
!= XMC_TC
)
6457 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6458 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6460 - S_GET_VALUE (sym
));
6462 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6463 - S_GET_VALUE (sym
));
6467 resolve_symbol_value (next
);
6468 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6469 - S_GET_VALUE (sym
));
6471 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6477 /* This is a normal symbol definition. x_scnlen is the
6478 symbol index of the containing csect. */
6479 if (S_GET_SEGMENT (sym
) == text_section
)
6480 csect
= ppc_text_csects
;
6481 else if (S_GET_SEGMENT (sym
) == data_section
)
6482 csect
= ppc_data_csects
;
6486 /* Skip the initial dummy symbol. */
6487 csect
= symbol_get_tc (csect
)->next
;
6489 if (csect
== (symbolS
*) NULL
)
6491 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6492 a
->x_csect
.x_scnlen
.l
= 0;
6496 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6498 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6499 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6500 > S_GET_VALUE (sym
))
6502 csect
= symbol_get_tc (csect
)->next
;
6505 a
->x_csect
.x_scnlen
.p
=
6506 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6507 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6510 a
->x_csect
.x_smtyp
= XTY_LD
;
6513 a
->x_csect
.x_parmhash
= 0;
6514 a
->x_csect
.x_snhash
= 0;
6515 if (symbol_get_tc (sym
)->symbol_class
== -1)
6516 a
->x_csect
.x_smclas
= XMC_PR
;
6518 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6519 a
->x_csect
.x_stab
= 0;
6520 a
->x_csect
.x_snstab
= 0;
6522 /* Don't let the COFF backend resort these symbols. */
6523 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6525 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6527 /* We want the value to be the symbol index of the referenced
6528 csect symbol. BFD will do that for us if we set the right
6530 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6531 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6533 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6534 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6536 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6541 block
= symbol_get_tc (sym
)->within
;
6544 /* The value is the offset from the enclosing csect. */
6547 csect
= symbol_get_tc (block
)->within
;
6548 resolve_symbol_value (csect
);
6549 base
= S_GET_VALUE (csect
);
6554 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6556 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6557 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6559 /* We want the value to be a file offset into the line numbers.
6560 BFD will do that for us if we set the right flags. We have
6561 already set the value correctly. */
6562 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6568 /* Adjust the symbol table. This creates csect symbols for all
6569 absolute symbols. */
6572 ppc_adjust_symtab (void)
6579 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6583 union internal_auxent
*a
;
6585 if (S_GET_SEGMENT (sym
) != absolute_section
)
6588 csect
= symbol_create (".abs[XO]", absolute_section
,
6589 S_GET_VALUE (sym
), &zero_address_frag
);
6590 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6591 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6592 i
= S_GET_NUMBER_AUXILIARY (csect
);
6593 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6594 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6595 a
->x_csect
.x_scnlen
.l
= 0;
6596 a
->x_csect
.x_smtyp
= XTY_SD
;
6597 a
->x_csect
.x_parmhash
= 0;
6598 a
->x_csect
.x_snhash
= 0;
6599 a
->x_csect
.x_smclas
= XMC_XO
;
6600 a
->x_csect
.x_stab
= 0;
6601 a
->x_csect
.x_snstab
= 0;
6603 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6605 i
= S_GET_NUMBER_AUXILIARY (sym
);
6606 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6607 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6608 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6611 ppc_saw_abs
= FALSE
;
6614 /* Set the VMA for a section. This is called on all the sections in
6618 ppc_frob_section (asection
*sec
)
6620 static bfd_vma vma
= 0;
6622 /* Dwarf sections start at 0. */
6623 if (bfd_get_section_flags (NULL
, sec
) & SEC_DEBUGGING
)
6626 vma
= md_section_align (sec
, vma
);
6627 bfd_set_section_vma (stdoutput
, sec
, vma
);
6628 vma
+= bfd_section_size (stdoutput
, sec
);
6631 #endif /* OBJ_XCOFF */
6634 md_atof (int type
, char *litp
, int *sizep
)
6636 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6639 /* Write a value out to the object file, using the appropriate
6643 md_number_to_chars (char *buf
, valueT val
, int n
)
6645 if (target_big_endian
)
6646 number_to_chars_bigendian (buf
, val
, n
);
6648 number_to_chars_littleendian (buf
, val
, n
);
6651 /* Align a section (I don't know why this is machine dependent). */
6654 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6659 int align
= bfd_get_section_alignment (stdoutput
, seg
);
6661 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6665 /* We don't have any form of relaxing. */
6668 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6669 asection
*seg ATTRIBUTE_UNUSED
)
6675 /* Convert a machine dependent frag. We never generate these. */
6678 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6679 asection
*sec ATTRIBUTE_UNUSED
,
6680 fragS
*fragp ATTRIBUTE_UNUSED
)
6685 /* We have no need to default values of symbols. */
6688 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6693 /* Functions concerning relocs. */
6695 /* The location from which a PC relative jump should be calculated,
6696 given a PC relative reloc. */
6699 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6701 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6706 /* This is called to see whether a fixup should be adjusted to use a
6707 section symbol. We take the opportunity to change a fixup against
6708 a symbol in the TOC subsegment into a reloc against the
6709 corresponding .tc symbol. */
6712 ppc_fix_adjustable (fixS
*fix
)
6714 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6715 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6716 TC_SYMFIELD_TYPE
*tc
;
6718 if (symseg
== absolute_section
)
6721 /* Always adjust symbols in debugging sections. */
6722 if (bfd_get_section_flags (stdoutput
, symseg
) & SEC_DEBUGGING
)
6725 if (ppc_toc_csect
!= (symbolS
*) NULL
6726 && fix
->fx_addsy
!= ppc_toc_csect
6727 && symseg
== data_section
6728 && val
>= ppc_toc_frag
->fr_address
6729 && (ppc_after_toc_frag
== (fragS
*) NULL
6730 || val
< ppc_after_toc_frag
->fr_address
))
6734 for (sy
= symbol_next (ppc_toc_csect
);
6735 sy
!= (symbolS
*) NULL
;
6736 sy
= symbol_next (sy
))
6738 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6740 if (sy_tc
->symbol_class
== XMC_TC0
)
6742 if (sy_tc
->symbol_class
!= XMC_TC
)
6744 if (val
== resolve_symbol_value (sy
))
6747 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6752 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6753 _("symbol in .toc does not match any .tc"));
6756 /* Possibly adjust the reloc to be against the csect. */
6757 tc
= symbol_get_tc (fix
->fx_addsy
);
6759 && tc
->symbol_class
!= XMC_TC0
6760 && tc
->symbol_class
!= XMC_TC
6761 && symseg
!= bss_section
6762 /* Don't adjust if this is a reloc in the toc section. */
6763 && (symseg
!= data_section
6764 || ppc_toc_csect
== NULL
6765 || val
< ppc_toc_frag
->fr_address
6766 || (ppc_after_toc_frag
!= NULL
6767 && val
>= ppc_after_toc_frag
->fr_address
)))
6769 symbolS
*csect
= tc
->within
;
6771 /* If the symbol was not declared by a label (eg: a section symbol),
6772 use the section instead of the csect. This doesn't happen in
6773 normal AIX assembly code. */
6775 csect
= seg_info (symseg
)->sym
;
6777 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6778 fix
->fx_addsy
= csect
;
6783 /* Adjust a reloc against a .lcomm symbol to be against the base
6785 if (symseg
== bss_section
6786 && ! S_IS_EXTERNAL (fix
->fx_addsy
))
6788 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6790 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6797 /* A reloc from one csect to another must be kept. The assembler
6798 will, of course, keep relocs between sections, and it will keep
6799 absolute relocs, but we need to force it to keep PC relative relocs
6800 between two csects in the same section. */
6803 ppc_force_relocation (fixS
*fix
)
6805 /* At this point fix->fx_addsy should already have been converted to
6806 a csect symbol. If the csect does not include the fragment, then
6807 we need to force the relocation. */
6809 && fix
->fx_addsy
!= NULL
6810 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6811 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6812 > fix
->fx_frag
->fr_address
)
6813 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6814 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6815 <= fix
->fx_frag
->fr_address
))))
6818 return generic_force_reloc (fix
);
6820 #endif /* OBJ_XCOFF */
6823 /* If this function returns non-zero, it guarantees that a relocation
6824 will be emitted for a fixup. */
6827 ppc_force_relocation (fixS
*fix
)
6829 /* Branch prediction relocations must force a relocation, as must
6830 the vtable description relocs. */
6831 switch (fix
->fx_r_type
)
6833 case BFD_RELOC_PPC_B16_BRTAKEN
:
6834 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6835 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6836 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6837 case BFD_RELOC_24_PLT_PCREL
:
6838 case BFD_RELOC_PPC64_TOC
:
6840 case BFD_RELOC_PPC_B26
:
6841 case BFD_RELOC_PPC_BA26
:
6842 case BFD_RELOC_PPC_B16
:
6843 case BFD_RELOC_PPC_BA16
:
6844 case BFD_RELOC_PPC64_REL24_NOTOC
:
6845 /* All branch fixups targeting a localentry symbol must
6846 force a relocation. */
6849 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6850 elf_symbol_type
*elfsym
6851 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6852 gas_assert (elfsym
);
6853 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6861 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6862 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
)
6865 return generic_force_reloc (fix
);
6869 ppc_fix_adjustable (fixS
*fix
)
6871 switch (fix
->fx_r_type
)
6873 /* All branch fixups targeting a localentry symbol must
6874 continue using the symbol. */
6875 case BFD_RELOC_PPC_B26
:
6876 case BFD_RELOC_PPC_BA26
:
6877 case BFD_RELOC_PPC_B16
:
6878 case BFD_RELOC_PPC_BA16
:
6879 case BFD_RELOC_PPC_B16_BRTAKEN
:
6880 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6881 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6882 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6883 case BFD_RELOC_PPC64_REL24_NOTOC
:
6886 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6887 elf_symbol_type
*elfsym
6888 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6889 gas_assert (elfsym
);
6890 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6898 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6899 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6900 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6901 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6902 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6903 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6904 && fix
->fx_r_type
!= BFD_RELOC_16_GOT_PCREL
6905 && fix
->fx_r_type
!= BFD_RELOC_32_GOTOFF
6906 && fix
->fx_r_type
!= BFD_RELOC_24_PLT_PCREL
6907 && fix
->fx_r_type
!= BFD_RELOC_32_PLTOFF
6908 && fix
->fx_r_type
!= BFD_RELOC_32_PLT_PCREL
6909 && fix
->fx_r_type
!= BFD_RELOC_LO16_PLTOFF
6910 && fix
->fx_r_type
!= BFD_RELOC_HI16_PLTOFF
6911 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_PLTOFF
6912 && fix
->fx_r_type
!= BFD_RELOC_64_PLTOFF
6913 && fix
->fx_r_type
!= BFD_RELOC_64_PLT_PCREL
6914 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT16_LO_DS
6915 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16
6916 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO
6917 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HI
6918 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HA
6919 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_DS
6920 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO_DS
6921 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6922 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_LO16A
6923 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HI16A
6924 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HA16A
6925 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6926 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6927 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6928 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
));
6933 ppc_frag_check (struct frag
*fragP
)
6935 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
6936 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6937 _("instruction address is not a multiple of %d"),
6938 fragP
->insn_addr
+ 1);
6941 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6942 rs_align_code frag. */
6945 ppc_handle_align (struct frag
*fragP
)
6947 valueT count
= (fragP
->fr_next
->fr_address
6948 - (fragP
->fr_address
+ fragP
->fr_fix
));
6950 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && count
!= 0 && (count
& 1) == 0)
6952 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6955 md_number_to_chars (dest
, 0x4400, 2);
6957 else if (count
!= 0 && (count
& 3) == 0)
6959 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6963 if (count
> 4 * nop_limit
&& count
< 0x2000000)
6967 /* Make a branch, then follow with nops. Insert another
6968 frag to handle the nops. */
6969 md_number_to_chars (dest
, 0x48000000 + count
, 4);
6974 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6975 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
6976 fragP
->fr_next
= rest
;
6978 rest
->fr_address
+= rest
->fr_fix
+ 4;
6980 /* If we leave the next frag as rs_align_code we'll come here
6981 again, resulting in a bunch of branches rather than a
6982 branch followed by nops. */
6983 rest
->fr_type
= rs_align
;
6984 dest
= rest
->fr_literal
;
6987 md_number_to_chars (dest
, 0x60000000, 4);
6989 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0
6990 && (ppc_cpu
& PPC_OPCODE_POWER9
) == 0)
6992 /* For power6, power7, and power8, we want the last nop to
6993 be a group terminating one. Do this by inserting an
6994 rs_fill frag immediately after this one, with its address
6995 set to the last nop location. This will automatically
6996 reduce the number of nops in the current frag by one. */
6999 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
7001 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
7002 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
7003 group_nop
->fr_fix
= 0;
7004 group_nop
->fr_offset
= 1;
7005 group_nop
->fr_type
= rs_fill
;
7006 fragP
->fr_next
= group_nop
;
7007 dest
= group_nop
->fr_literal
;
7010 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
7012 if (ppc_cpu
& PPC_OPCODE_E500MC
)
7013 /* e500mc group terminating nop: "ori 0,0,0". */
7014 md_number_to_chars (dest
, 0x60000000, 4);
7016 /* power7/power8 group terminating nop: "ori 2,2,0". */
7017 md_number_to_chars (dest
, 0x60420000, 4);
7020 /* power6 group terminating nop: "ori 1,1,0". */
7021 md_number_to_chars (dest
, 0x60210000, 4);
7026 /* Apply a fixup to the object code. This is called for all the
7027 fixups we generated by the calls to fix_new_exp, above. */
7030 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
7032 valueT value
= * valP
;
7034 const struct powerpc_operand
*operand
;
7037 if (fixP
->fx_addsy
!= NULL
)
7039 /* Hack around bfd_install_relocation brain damage. */
7041 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
7043 if (fixP
->fx_addsy
== abs_section_sym
)
7049 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7050 the symbol values. If we are doing this relocation the code in
7051 write.c is going to call bfd_install_relocation, which is also
7052 going to use the symbol value. That means that if the reloc is
7053 fully resolved we want to use *valP since bfd_install_relocation is
7055 However, if the reloc is not fully resolved we do not want to
7056 use *valP, and must use fx_offset instead. If the relocation
7057 is PC-relative, we then need to re-apply md_pcrel_from_section
7058 to this new relocation value. */
7059 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
7064 value
= fixP
->fx_offset
;
7066 value
-= md_pcrel_from_section (fixP
, seg
);
7070 /* We are only able to convert some relocs to pc-relative. */
7073 switch (fixP
->fx_r_type
)
7076 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
7080 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
7084 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
7087 case BFD_RELOC_LO16
:
7088 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
7091 case BFD_RELOC_HI16
:
7092 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
7095 case BFD_RELOC_HI16_S
:
7096 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
7099 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7100 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGH
;
7103 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7104 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHA
;
7107 case BFD_RELOC_PPC64_HIGHER
:
7108 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER
;
7111 case BFD_RELOC_PPC64_HIGHER_S
:
7112 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA
;
7115 case BFD_RELOC_PPC64_HIGHEST
:
7116 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST
;
7119 case BFD_RELOC_PPC64_HIGHEST_S
:
7120 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA
;
7123 case BFD_RELOC_PPC_16DX_HA
:
7124 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7131 else if (!fixP
->fx_done
7132 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
7134 /* addpcis is relative to next insn address. */
7136 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7141 if (fixP
->fx_pcrel_adjust
!= 0)
7143 /* This is a fixup on an instruction. */
7144 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
7146 operand
= &powerpc_operands
[opindex
];
7148 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
7149 does not generate a reloc. It uses the offset of `sym' within its
7150 csect. Other usages, such as `.long sym', generate relocs. This
7151 is the documented behaviour of non-TOC symbols. */
7152 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
7153 && (operand
->bitm
& 0xfff0) == 0xfff0
7154 && operand
->shift
== 0
7155 && (operand
->insert
== NULL
|| ppc_obj64
)
7156 && fixP
->fx_addsy
!= NULL
7157 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
7158 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
7159 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC0
7160 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
7162 value
= fixP
->fx_offset
;
7166 /* During parsing of instructions, a TOC16 reloc is generated for
7167 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
7168 in the toc. But at parse time, SYM may be not yet defined, so
7169 check again here. */
7170 if (fixP
->fx_r_type
== BFD_RELOC_16
7171 && fixP
->fx_addsy
!= NULL
7172 && ppc_is_toc_sym (fixP
->fx_addsy
))
7173 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
7177 /* Calculate value to be stored in field. */
7179 switch (fixP
->fx_r_type
)
7182 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
7183 case BFD_RELOC_PPC_VLE_LO16A
:
7184 case BFD_RELOC_PPC_VLE_LO16D
:
7186 case BFD_RELOC_LO16
:
7187 case BFD_RELOC_LO16_PCREL
:
7188 fieldval
= value
& 0xffff;
7190 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7191 fieldval
= SEX16 (fieldval
);
7192 fixP
->fx_no_overflow
= 1;
7195 case BFD_RELOC_HI16
:
7196 case BFD_RELOC_HI16_PCREL
:
7198 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7200 fieldval
= value
>> 16;
7201 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7203 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7204 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7210 case BFD_RELOC_PPC_VLE_HI16A
:
7211 case BFD_RELOC_PPC_VLE_HI16D
:
7212 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7214 fieldval
= PPC_HI (value
);
7215 goto sign_extend_16
;
7217 case BFD_RELOC_HI16_S
:
7218 case BFD_RELOC_HI16_S_PCREL
:
7219 case BFD_RELOC_PPC_16DX_HA
:
7220 case BFD_RELOC_PPC_REL16DX_HA
:
7222 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7224 fieldval
= (value
+ 0x8000) >> 16;
7225 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7227 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7228 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7234 case BFD_RELOC_PPC_VLE_HA16A
:
7235 case BFD_RELOC_PPC_VLE_HA16D
:
7236 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7238 fieldval
= PPC_HA (value
);
7239 goto sign_extend_16
;
7242 case BFD_RELOC_PPC64_HIGHER
:
7243 fieldval
= PPC_HIGHER (value
);
7244 goto sign_extend_16
;
7246 case BFD_RELOC_PPC64_HIGHER_S
:
7247 fieldval
= PPC_HIGHERA (value
);
7248 goto sign_extend_16
;
7250 case BFD_RELOC_PPC64_HIGHEST
:
7251 fieldval
= PPC_HIGHEST (value
);
7252 goto sign_extend_16
;
7254 case BFD_RELOC_PPC64_HIGHEST_S
:
7255 fieldval
= PPC_HIGHESTA (value
);
7256 goto sign_extend_16
;
7263 if (operand
!= NULL
)
7265 /* Handle relocs in an insn. */
7266 switch (fixP
->fx_r_type
)
7269 /* The following relocs can't be calculated by the assembler.
7270 Leave the field zero. */
7271 case BFD_RELOC_PPC_TPREL16
:
7272 case BFD_RELOC_PPC_TPREL16_LO
:
7273 case BFD_RELOC_PPC_TPREL16_HI
:
7274 case BFD_RELOC_PPC_TPREL16_HA
:
7275 case BFD_RELOC_PPC_DTPREL16
:
7276 case BFD_RELOC_PPC_DTPREL16_LO
:
7277 case BFD_RELOC_PPC_DTPREL16_HI
:
7278 case BFD_RELOC_PPC_DTPREL16_HA
:
7279 case BFD_RELOC_PPC_GOT_TLSGD16
:
7280 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7281 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7282 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7283 case BFD_RELOC_PPC_GOT_TLSLD16
:
7284 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7285 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7286 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7287 case BFD_RELOC_PPC_GOT_TPREL16
:
7288 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7289 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7290 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7291 case BFD_RELOC_PPC_GOT_DTPREL16
:
7292 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7293 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7294 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7295 case BFD_RELOC_PPC64_TPREL16_DS
:
7296 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
7297 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7298 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7299 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7300 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7301 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7302 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7303 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7304 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7305 case BFD_RELOC_PPC64_DTPREL16_DS
:
7306 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
7307 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7308 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7309 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7310 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7311 gas_assert (fixP
->fx_addsy
!= NULL
);
7312 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7316 /* These also should leave the field zero for the same
7317 reason. Note that older versions of gas wrote values
7318 here. If we want to go back to the old behaviour, then
7319 all _LO and _LO_DS cases will need to be treated like
7320 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
7321 case BFD_RELOC_16_GOTOFF
:
7322 case BFD_RELOC_LO16_GOTOFF
:
7323 case BFD_RELOC_HI16_GOTOFF
:
7324 case BFD_RELOC_HI16_S_GOTOFF
:
7325 case BFD_RELOC_LO16_PLTOFF
:
7326 case BFD_RELOC_HI16_PLTOFF
:
7327 case BFD_RELOC_HI16_S_PLTOFF
:
7328 case BFD_RELOC_GPREL16
:
7329 case BFD_RELOC_16_BASEREL
:
7330 case BFD_RELOC_LO16_BASEREL
:
7331 case BFD_RELOC_HI16_BASEREL
:
7332 case BFD_RELOC_HI16_S_BASEREL
:
7333 case BFD_RELOC_PPC_TOC16
:
7334 case BFD_RELOC_PPC64_TOC16_LO
:
7335 case BFD_RELOC_PPC64_TOC16_HI
:
7336 case BFD_RELOC_PPC64_TOC16_HA
:
7337 case BFD_RELOC_PPC64_PLTGOT16
:
7338 case BFD_RELOC_PPC64_PLTGOT16_LO
:
7339 case BFD_RELOC_PPC64_PLTGOT16_HI
:
7340 case BFD_RELOC_PPC64_PLTGOT16_HA
:
7341 case BFD_RELOC_PPC64_GOT16_DS
:
7342 case BFD_RELOC_PPC64_GOT16_LO_DS
:
7343 case BFD_RELOC_PPC64_PLT16_LO_DS
:
7344 case BFD_RELOC_PPC64_SECTOFF_DS
:
7345 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
7346 case BFD_RELOC_PPC64_TOC16_DS
:
7347 case BFD_RELOC_PPC64_TOC16_LO_DS
:
7348 case BFD_RELOC_PPC64_PLTGOT16_DS
:
7349 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
7350 case BFD_RELOC_PPC_EMB_NADDR16
:
7351 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7352 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7353 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7354 case BFD_RELOC_PPC_EMB_SDAI16
:
7355 case BFD_RELOC_PPC_EMB_SDA2I16
:
7356 case BFD_RELOC_PPC_EMB_SDA2REL
:
7357 case BFD_RELOC_PPC_EMB_SDA21
:
7358 case BFD_RELOC_PPC_EMB_MRKREF
:
7359 case BFD_RELOC_PPC_EMB_RELSEC16
:
7360 case BFD_RELOC_PPC_EMB_RELST_LO
:
7361 case BFD_RELOC_PPC_EMB_RELST_HI
:
7362 case BFD_RELOC_PPC_EMB_RELST_HA
:
7363 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7364 case BFD_RELOC_PPC_EMB_RELSDA
:
7365 case BFD_RELOC_PPC_VLE_SDA21
:
7366 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7367 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7368 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
7369 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7370 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
7371 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7372 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
7373 gas_assert (fixP
->fx_addsy
!= NULL
);
7376 case BFD_RELOC_PPC_TLS
:
7377 case BFD_RELOC_PPC_TLSGD
:
7378 case BFD_RELOC_PPC_TLSLD
:
7384 case BFD_RELOC_PPC_B16
:
7385 /* Adjust the offset to the instruction boundary. */
7390 case BFD_RELOC_VTABLE_INHERIT
:
7391 case BFD_RELOC_VTABLE_ENTRY
:
7392 case BFD_RELOC_PPC_DTPMOD
:
7393 case BFD_RELOC_PPC_TPREL
:
7394 case BFD_RELOC_PPC_DTPREL
:
7395 case BFD_RELOC_PPC_COPY
:
7396 case BFD_RELOC_PPC_GLOB_DAT
:
7397 case BFD_RELOC_32_PLT_PCREL
:
7398 case BFD_RELOC_PPC_EMB_NADDR32
:
7399 case BFD_RELOC_PPC64_TOC
:
7400 case BFD_RELOC_CTOR
:
7402 case BFD_RELOC_32_PCREL
:
7405 case BFD_RELOC_64_PCREL
:
7406 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7407 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7408 _("%s unsupported as instruction fixup"),
7409 bfd_get_reloc_code_name (fixP
->fx_r_type
));
7418 /* powerpc uses RELA style relocs, so if emitting a reloc the field
7419 contents can stay at zero. */
7420 #define APPLY_RELOC fixP->fx_done
7422 #define APPLY_RELOC 1
7424 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
7427 unsigned char *where
;
7429 /* Fetch the instruction, insert the fully resolved operand
7430 value, and stuff the instruction back again. */
7431 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
7432 if (target_big_endian
)
7434 if (fixP
->fx_size
== 4)
7435 insn
= bfd_getb32 (where
);
7437 insn
= bfd_getb16 (where
);
7441 if (fixP
->fx_size
== 4)
7442 insn
= bfd_getl32 (where
);
7444 insn
= bfd_getl16 (where
);
7446 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
7447 fixP
->tc_fix_data
.ppc_cpu
,
7448 fixP
->fx_file
, fixP
->fx_line
);
7449 if (target_big_endian
)
7451 if (fixP
->fx_size
== 4)
7452 bfd_putb32 (insn
, where
);
7454 bfd_putb16 (insn
, where
);
7458 if (fixP
->fx_size
== 4)
7459 bfd_putl32 (insn
, where
);
7461 bfd_putl16 (insn
, where
);
7466 /* Nothing else to do here. */
7469 gas_assert (fixP
->fx_addsy
!= NULL
);
7470 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7475 /* Use expr_symbol_where to see if this is an expression
7477 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7478 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7479 _("unresolved expression that must be resolved"));
7481 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7482 _("unsupported relocation against %s"),
7483 S_GET_NAME (fixP
->fx_addsy
));
7490 /* Handle relocs in data. */
7491 switch (fixP
->fx_r_type
)
7493 case BFD_RELOC_VTABLE_INHERIT
:
7495 && !S_IS_DEFINED (fixP
->fx_addsy
)
7496 && !S_IS_WEAK (fixP
->fx_addsy
))
7497 S_SET_WEAK (fixP
->fx_addsy
);
7500 case BFD_RELOC_VTABLE_ENTRY
:
7505 /* These can appear with @l etc. in data. */
7506 case BFD_RELOC_LO16
:
7507 case BFD_RELOC_LO16_PCREL
:
7508 case BFD_RELOC_HI16
:
7509 case BFD_RELOC_HI16_PCREL
:
7510 case BFD_RELOC_HI16_S
:
7511 case BFD_RELOC_HI16_S_PCREL
:
7512 case BFD_RELOC_PPC64_HIGHER
:
7513 case BFD_RELOC_PPC64_HIGHER_S
:
7514 case BFD_RELOC_PPC64_HIGHEST
:
7515 case BFD_RELOC_PPC64_HIGHEST_S
:
7516 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7517 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7518 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7521 case BFD_RELOC_PPC_DTPMOD
:
7522 case BFD_RELOC_PPC_TPREL
:
7523 case BFD_RELOC_PPC_DTPREL
:
7524 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7527 /* Just punt all of these to the linker. */
7528 case BFD_RELOC_PPC_B16_BRTAKEN
:
7529 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7530 case BFD_RELOC_16_GOTOFF
:
7531 case BFD_RELOC_LO16_GOTOFF
:
7532 case BFD_RELOC_HI16_GOTOFF
:
7533 case BFD_RELOC_HI16_S_GOTOFF
:
7534 case BFD_RELOC_LO16_PLTOFF
:
7535 case BFD_RELOC_HI16_PLTOFF
:
7536 case BFD_RELOC_HI16_S_PLTOFF
:
7537 case BFD_RELOC_PPC_COPY
:
7538 case BFD_RELOC_PPC_GLOB_DAT
:
7539 case BFD_RELOC_16_BASEREL
:
7540 case BFD_RELOC_LO16_BASEREL
:
7541 case BFD_RELOC_HI16_BASEREL
:
7542 case BFD_RELOC_HI16_S_BASEREL
:
7543 case BFD_RELOC_PPC_TLS
:
7544 case BFD_RELOC_PPC_DTPREL16_LO
:
7545 case BFD_RELOC_PPC_DTPREL16_HI
:
7546 case BFD_RELOC_PPC_DTPREL16_HA
:
7547 case BFD_RELOC_PPC_TPREL16_LO
:
7548 case BFD_RELOC_PPC_TPREL16_HI
:
7549 case BFD_RELOC_PPC_TPREL16_HA
:
7550 case BFD_RELOC_PPC_GOT_TLSGD16
:
7551 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7552 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7553 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7554 case BFD_RELOC_PPC_GOT_TLSLD16
:
7555 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7556 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7557 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7558 case BFD_RELOC_PPC_GOT_DTPREL16
:
7559 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7560 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7561 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7562 case BFD_RELOC_PPC_GOT_TPREL16
:
7563 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7564 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7565 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7566 case BFD_RELOC_24_PLT_PCREL
:
7567 case BFD_RELOC_PPC_LOCAL24PC
:
7568 case BFD_RELOC_32_PLT_PCREL
:
7569 case BFD_RELOC_GPREL16
:
7570 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7571 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7572 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7573 case BFD_RELOC_PPC_EMB_NADDR32
:
7574 case BFD_RELOC_PPC_EMB_NADDR16
:
7575 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7576 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7577 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7578 case BFD_RELOC_PPC_EMB_SDAI16
:
7579 case BFD_RELOC_PPC_EMB_SDA2REL
:
7580 case BFD_RELOC_PPC_EMB_SDA2I16
:
7581 case BFD_RELOC_PPC_EMB_SDA21
:
7582 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7583 case BFD_RELOC_PPC_EMB_MRKREF
:
7584 case BFD_RELOC_PPC_EMB_RELSEC16
:
7585 case BFD_RELOC_PPC_EMB_RELST_LO
:
7586 case BFD_RELOC_PPC_EMB_RELST_HI
:
7587 case BFD_RELOC_PPC_EMB_RELST_HA
:
7588 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7589 case BFD_RELOC_PPC_EMB_RELSDA
:
7590 case BFD_RELOC_PPC64_TOC
:
7591 case BFD_RELOC_PPC_TOC16
:
7592 case BFD_RELOC_PPC64_TOC16_LO
:
7593 case BFD_RELOC_PPC64_TOC16_HI
:
7594 case BFD_RELOC_PPC64_TOC16_HA
:
7595 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7596 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7597 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7598 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7599 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7600 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7601 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7602 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7603 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7604 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7605 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7606 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7612 case BFD_RELOC_NONE
:
7614 case BFD_RELOC_CTOR
:
7616 case BFD_RELOC_32_PCREL
:
7619 case BFD_RELOC_64_PCREL
:
7621 case BFD_RELOC_16_PCREL
:
7627 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7632 if (fixP
->fx_size
&& APPLY_RELOC
)
7633 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7634 fieldval
, fixP
->fx_size
);
7636 && (seg
->flags
& SEC_CODE
) != 0
7637 && fixP
->fx_size
== 4
7640 && (fixP
->fx_r_type
== BFD_RELOC_32
7641 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7642 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7643 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7644 _("data in executable section"));
7648 ppc_elf_validate_fix (fixP
, seg
);
7649 fixP
->fx_addnumber
= value
;
7651 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7652 from the section contents. If we are going to be emitting a reloc
7653 then the section contents are immaterial, so don't warn if they
7654 happen to overflow. Leave such warnings to ld. */
7657 fixP
->fx_no_overflow
= 1;
7659 /* Arrange to emit .TOC. as a normal symbol if used in anything
7660 but .TOC.@tocbase. */
7662 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7663 && fixP
->fx_addsy
!= NULL
7664 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7665 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7668 if (fixP
->fx_r_type
!= BFD_RELOC_PPC_TOC16
)
7669 fixP
->fx_addnumber
= 0;
7673 fixP
->fx_addnumber
= 0;
7675 /* We want to use the offset within the toc, not the actual VMA
7677 fixP
->fx_addnumber
=
7678 - bfd_get_section_vma (stdoutput
, S_GET_SEGMENT (fixP
->fx_addsy
))
7679 - S_GET_VALUE (ppc_toc_csect
);
7680 /* Set *valP to avoid errors. */
7687 /* Generate a reloc for a fixup. */
7690 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7694 reloc
= XNEW (arelent
);
7696 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7697 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7698 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7699 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7700 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7702 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7703 _("reloc %d not supported by object file format"),
7704 (int) fixp
->fx_r_type
);
7707 reloc
->addend
= fixp
->fx_addnumber
;
7713 ppc_cfi_frame_initial_instructions (void)
7715 cfi_add_CFA_def_cfa (1, 0);
7719 tc_ppc_regname_to_dw2regnum (char *regname
)
7721 unsigned int regnum
= -1;
7725 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7727 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7728 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7729 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7730 { "spe_acc", 111 }, { "spefscr", 112 }
7733 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7734 if (strcmp (regnames
[i
].name
, regname
) == 0)
7735 return regnames
[i
].dw2regnum
;
7737 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7739 p
= regname
+ 1 + (regname
[1] == '.');
7740 regnum
= strtoul (p
, &q
, 10);
7741 if (p
== q
|| *q
|| regnum
>= 32)
7743 if (regname
[0] == 'f')
7745 else if (regname
[0] == 'v')
7748 else if (regname
[0] == 'c' && regname
[1] == 'r')
7750 p
= regname
+ 2 + (regname
[2] == '.');
7751 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7753 regnum
= p
[0] - '0' + 68;