1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2022 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
35 #include "coff/xcoff.h"
39 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
41 /* Tell the main code what the endianness is. */
42 extern int target_big_endian
;
44 /* Whether or not, we've set target_big_endian. */
45 static int set_target_endian
= 0;
47 /* Whether to use user friendly register names. */
48 #ifndef TARGET_REG_NAMES_P
49 #define TARGET_REG_NAMES_P false
52 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
55 /* #lo(value) denotes the least significant 16 bits of the indicated. */
56 #define PPC_LO(v) ((v) & 0xffff)
58 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
59 #define PPC_HI(v) (((v) >> 16) & 0xffff)
61 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
62 the indicated value, compensating for #lo() being treated as a
64 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
66 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
67 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
69 /* #highera(value) denotes bits 32 through 47 of the indicated value,
70 compensating for #lo() being treated as a signed number. */
71 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
73 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
74 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
76 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
77 compensating for #lo being treated as a signed number. */
78 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
80 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
82 /* For the time being on ppc64, don't report overflow on @h and @ha
83 applied to constants. */
84 #define REPORT_OVERFLOW_HI 0
86 static bool reg_names_p
= TARGET_REG_NAMES_P
;
88 static void ppc_macro (char *, const struct powerpc_macro
*);
89 static void ppc_byte (int);
91 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
92 static void ppc_tc (int);
93 static void ppc_machine (int);
97 static void ppc_comm (int);
98 static void ppc_bb (int);
99 static void ppc_bc (int);
100 static void ppc_bf (int);
101 static void ppc_biei (int);
102 static void ppc_bs (int);
103 static void ppc_eb (int);
104 static void ppc_ec (int);
105 static void ppc_ef (int);
106 static void ppc_es (int);
107 static void ppc_csect (int);
108 static void ppc_dwsect (int);
109 static void ppc_change_csect (symbolS
*, offsetT
);
110 static void ppc_file (int);
111 static void ppc_function (int);
112 static void ppc_extern (int);
113 static void ppc_globl (int);
114 static void ppc_lglobl (int);
115 static void ppc_ref (int);
116 static void ppc_section (int);
117 static void ppc_named_section (int);
118 static void ppc_stabx (int);
119 static void ppc_rename (int);
120 static void ppc_toc (int);
121 static void ppc_xcoff_cons (int);
122 static void ppc_vbyte (int);
123 static void ppc_weak (int);
124 static void ppc_GNU_visibility (int);
128 static void ppc_elf_rdata (int);
129 static void ppc_elf_lcomm (int);
130 static void ppc_elf_localentry (int);
131 static void ppc_elf_abiversion (int);
132 static void ppc_elf_gnu_attribute (int);
135 /* Generic assembler global variables which must be defined by all
139 /* This string holds the chars that always start a comment. If the
140 pre-processor is disabled, these aren't very useful. The macro
141 tc_comment_chars points to this. We use this, rather than the
142 usual comment_chars, so that we can switch for Solaris conventions. */
143 static const char ppc_solaris_comment_chars
[] = "#!";
144 static const char ppc_eabi_comment_chars
[] = "#";
146 #ifdef TARGET_SOLARIS_COMMENT
147 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
149 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
152 const char comment_chars
[] = "#";
155 /* Characters which start a comment at the beginning of a line. */
156 const char line_comment_chars
[] = "#";
158 /* Characters which may be used to separate multiple commands on a
160 const char line_separator_chars
[] = ";";
162 /* Characters which are used to indicate an exponent in a floating
164 const char EXP_CHARS
[] = "eE";
166 /* Characters which mean that a number is a floating point constant,
168 const char FLT_CHARS
[] = "dD";
170 /* Anything that can start an operand needs to be mentioned here,
171 to stop the input scrubber eating whitespace. */
172 const char ppc_symbol_chars
[] = "%[";
174 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
175 int ppc_cie_data_alignment
;
177 /* The dwarf2 minimum instruction length. */
178 int ppc_dwarf2_line_min_insn_length
;
180 /* More than this number of nops in an alignment op gets a branch
182 unsigned long nop_limit
= 4;
184 /* The type of processor we are assembling for. This is one or more
185 of the PPC_OPCODE flags defined in opcode/ppc.h. */
186 ppc_cpu_t ppc_cpu
= 0;
187 ppc_cpu_t sticky
= 0;
189 /* Value for ELF e_flags EF_PPC64_ABI. */
190 unsigned int ppc_abiversion
= 0;
193 /* Flags set on encountering toc relocs. */
195 has_large_toc_reloc
= 1,
196 has_small_toc_reloc
= 2
200 /* Warn on emitting data to code sections. */
206 /* The target specific pseudo-ops which we support. */
208 const pseudo_typeS md_pseudo_table
[] =
210 /* Pseudo-ops which must be overridden. */
211 { "byte", ppc_byte
, 0 },
214 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
215 legitimately belong in the obj-*.c file. However, XCOFF is based
216 on COFF, and is only implemented for the RS/6000. We just use
217 obj-coff.c, and add what we need here. */
218 { "comm", ppc_comm
, 0 },
219 { "lcomm", ppc_comm
, 1 },
223 { "bi", ppc_biei
, 0 },
225 { "csect", ppc_csect
, 0 },
226 { "dwsect", ppc_dwsect
, 0 },
227 { "data", ppc_section
, 'd' },
231 { "ei", ppc_biei
, 1 },
233 { "extern", ppc_extern
, 0 },
234 { "file", ppc_file
, 0 },
235 { "function", ppc_function
, 0 },
236 { "globl", ppc_globl
, 0 },
237 { "lglobl", ppc_lglobl
, 0 },
238 { "ref", ppc_ref
, 0 },
239 { "rename", ppc_rename
, 0 },
240 { "section", ppc_named_section
, 0 },
241 { "stabx", ppc_stabx
, 0 },
242 { "text", ppc_section
, 't' },
243 { "toc", ppc_toc
, 0 },
244 { "long", ppc_xcoff_cons
, 2 },
245 { "llong", ppc_xcoff_cons
, 3 },
246 { "word", ppc_xcoff_cons
, 1 },
247 { "short", ppc_xcoff_cons
, 1 },
248 { "vbyte", ppc_vbyte
, 0 },
249 { "weak", ppc_weak
, 0 },
251 /* Enable GNU syntax for symbol visibility. */
252 {"internal", ppc_GNU_visibility
, SYM_V_INTERNAL
},
253 {"hidden", ppc_GNU_visibility
, SYM_V_HIDDEN
},
254 {"protected", ppc_GNU_visibility
, SYM_V_PROTECTED
},
258 { "llong", cons
, 8 },
259 { "rdata", ppc_elf_rdata
, 0 },
260 { "rodata", ppc_elf_rdata
, 0 },
261 { "lcomm", ppc_elf_lcomm
, 0 },
262 { "localentry", ppc_elf_localentry
, 0 },
263 { "abiversion", ppc_elf_abiversion
, 0 },
264 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
267 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
269 { "machine", ppc_machine
, 0 },
276 /* Predefined register names if -mregnames (or default for Windows NT).
277 In general, there are lots of them, in an attempt to be compatible
278 with a number of other Windows NT assemblers. */
280 /* Structure to hold information about predefined registers. */
284 unsigned short value
;
285 unsigned short flags
;
288 /* List of registers that are pre-defined:
290 Each general register has predefined names of the form:
291 1. r<reg_num> which has the value <reg_num>.
292 2. r.<reg_num> which has the value <reg_num>.
294 Each floating point register has predefined names of the form:
295 1. f<reg_num> which has the value <reg_num>.
296 2. f.<reg_num> which has the value <reg_num>.
298 Each vector unit register has predefined names of the form:
299 1. v<reg_num> which has the value <reg_num>.
300 2. v.<reg_num> which has the value <reg_num>.
302 Each condition register has predefined names of the form:
303 1. cr<reg_num> which has the value <reg_num>.
304 2. cr.<reg_num> which has the value <reg_num>.
306 There are individual registers as well:
307 sp or r.sp has the value 1
308 rtoc or r.toc has the value 2
313 dsisr has the value 18
315 sdr1 has the value 25
316 srr0 has the value 26
317 srr1 has the value 27
319 The table is sorted. Suitable for searching by a binary search. */
321 static const struct pd_reg pre_defined_registers
[] =
323 /* VSX accumulators. */
324 { "a0", 0, PPC_OPERAND_ACC
},
325 { "a1", 1, PPC_OPERAND_ACC
},
326 { "a2", 2, PPC_OPERAND_ACC
},
327 { "a3", 3, PPC_OPERAND_ACC
},
328 { "a4", 4, PPC_OPERAND_ACC
},
329 { "a5", 5, PPC_OPERAND_ACC
},
330 { "a6", 6, PPC_OPERAND_ACC
},
331 { "a7", 7, PPC_OPERAND_ACC
},
333 /* Condition Registers */
334 { "cr.0", 0, PPC_OPERAND_CR_REG
},
335 { "cr.1", 1, PPC_OPERAND_CR_REG
},
336 { "cr.2", 2, PPC_OPERAND_CR_REG
},
337 { "cr.3", 3, PPC_OPERAND_CR_REG
},
338 { "cr.4", 4, PPC_OPERAND_CR_REG
},
339 { "cr.5", 5, PPC_OPERAND_CR_REG
},
340 { "cr.6", 6, PPC_OPERAND_CR_REG
},
341 { "cr.7", 7, PPC_OPERAND_CR_REG
},
343 { "cr0", 0, PPC_OPERAND_CR_REG
},
344 { "cr1", 1, PPC_OPERAND_CR_REG
},
345 { "cr2", 2, PPC_OPERAND_CR_REG
},
346 { "cr3", 3, PPC_OPERAND_CR_REG
},
347 { "cr4", 4, PPC_OPERAND_CR_REG
},
348 { "cr5", 5, PPC_OPERAND_CR_REG
},
349 { "cr6", 6, PPC_OPERAND_CR_REG
},
350 { "cr7", 7, PPC_OPERAND_CR_REG
},
352 { "ctr", 9, PPC_OPERAND_SPR
},
353 { "dar", 19, PPC_OPERAND_SPR
},
354 { "dec", 22, PPC_OPERAND_SPR
},
355 { "dsisr", 18, PPC_OPERAND_SPR
},
357 /* Floating point registers */
358 { "f.0", 0, PPC_OPERAND_FPR
},
359 { "f.1", 1, PPC_OPERAND_FPR
},
360 { "f.10", 10, PPC_OPERAND_FPR
},
361 { "f.11", 11, PPC_OPERAND_FPR
},
362 { "f.12", 12, PPC_OPERAND_FPR
},
363 { "f.13", 13, PPC_OPERAND_FPR
},
364 { "f.14", 14, PPC_OPERAND_FPR
},
365 { "f.15", 15, PPC_OPERAND_FPR
},
366 { "f.16", 16, PPC_OPERAND_FPR
},
367 { "f.17", 17, PPC_OPERAND_FPR
},
368 { "f.18", 18, PPC_OPERAND_FPR
},
369 { "f.19", 19, PPC_OPERAND_FPR
},
370 { "f.2", 2, PPC_OPERAND_FPR
},
371 { "f.20", 20, PPC_OPERAND_FPR
},
372 { "f.21", 21, PPC_OPERAND_FPR
},
373 { "f.22", 22, PPC_OPERAND_FPR
},
374 { "f.23", 23, PPC_OPERAND_FPR
},
375 { "f.24", 24, PPC_OPERAND_FPR
},
376 { "f.25", 25, PPC_OPERAND_FPR
},
377 { "f.26", 26, PPC_OPERAND_FPR
},
378 { "f.27", 27, PPC_OPERAND_FPR
},
379 { "f.28", 28, PPC_OPERAND_FPR
},
380 { "f.29", 29, PPC_OPERAND_FPR
},
381 { "f.3", 3, PPC_OPERAND_FPR
},
382 { "f.30", 30, PPC_OPERAND_FPR
},
383 { "f.31", 31, PPC_OPERAND_FPR
},
384 { "f.32", 32, PPC_OPERAND_VSR
},
385 { "f.33", 33, PPC_OPERAND_VSR
},
386 { "f.34", 34, PPC_OPERAND_VSR
},
387 { "f.35", 35, PPC_OPERAND_VSR
},
388 { "f.36", 36, PPC_OPERAND_VSR
},
389 { "f.37", 37, PPC_OPERAND_VSR
},
390 { "f.38", 38, PPC_OPERAND_VSR
},
391 { "f.39", 39, PPC_OPERAND_VSR
},
392 { "f.4", 4, PPC_OPERAND_FPR
},
393 { "f.40", 40, PPC_OPERAND_VSR
},
394 { "f.41", 41, PPC_OPERAND_VSR
},
395 { "f.42", 42, PPC_OPERAND_VSR
},
396 { "f.43", 43, PPC_OPERAND_VSR
},
397 { "f.44", 44, PPC_OPERAND_VSR
},
398 { "f.45", 45, PPC_OPERAND_VSR
},
399 { "f.46", 46, PPC_OPERAND_VSR
},
400 { "f.47", 47, PPC_OPERAND_VSR
},
401 { "f.48", 48, PPC_OPERAND_VSR
},
402 { "f.49", 49, PPC_OPERAND_VSR
},
403 { "f.5", 5, PPC_OPERAND_FPR
},
404 { "f.50", 50, PPC_OPERAND_VSR
},
405 { "f.51", 51, PPC_OPERAND_VSR
},
406 { "f.52", 52, PPC_OPERAND_VSR
},
407 { "f.53", 53, PPC_OPERAND_VSR
},
408 { "f.54", 54, PPC_OPERAND_VSR
},
409 { "f.55", 55, PPC_OPERAND_VSR
},
410 { "f.56", 56, PPC_OPERAND_VSR
},
411 { "f.57", 57, PPC_OPERAND_VSR
},
412 { "f.58", 58, PPC_OPERAND_VSR
},
413 { "f.59", 59, PPC_OPERAND_VSR
},
414 { "f.6", 6, PPC_OPERAND_FPR
},
415 { "f.60", 60, PPC_OPERAND_VSR
},
416 { "f.61", 61, PPC_OPERAND_VSR
},
417 { "f.62", 62, PPC_OPERAND_VSR
},
418 { "f.63", 63, PPC_OPERAND_VSR
},
419 { "f.7", 7, PPC_OPERAND_FPR
},
420 { "f.8", 8, PPC_OPERAND_FPR
},
421 { "f.9", 9, PPC_OPERAND_FPR
},
423 { "f0", 0, PPC_OPERAND_FPR
},
424 { "f1", 1, PPC_OPERAND_FPR
},
425 { "f10", 10, PPC_OPERAND_FPR
},
426 { "f11", 11, PPC_OPERAND_FPR
},
427 { "f12", 12, PPC_OPERAND_FPR
},
428 { "f13", 13, PPC_OPERAND_FPR
},
429 { "f14", 14, PPC_OPERAND_FPR
},
430 { "f15", 15, PPC_OPERAND_FPR
},
431 { "f16", 16, PPC_OPERAND_FPR
},
432 { "f17", 17, PPC_OPERAND_FPR
},
433 { "f18", 18, PPC_OPERAND_FPR
},
434 { "f19", 19, PPC_OPERAND_FPR
},
435 { "f2", 2, PPC_OPERAND_FPR
},
436 { "f20", 20, PPC_OPERAND_FPR
},
437 { "f21", 21, PPC_OPERAND_FPR
},
438 { "f22", 22, PPC_OPERAND_FPR
},
439 { "f23", 23, PPC_OPERAND_FPR
},
440 { "f24", 24, PPC_OPERAND_FPR
},
441 { "f25", 25, PPC_OPERAND_FPR
},
442 { "f26", 26, PPC_OPERAND_FPR
},
443 { "f27", 27, PPC_OPERAND_FPR
},
444 { "f28", 28, PPC_OPERAND_FPR
},
445 { "f29", 29, PPC_OPERAND_FPR
},
446 { "f3", 3, PPC_OPERAND_FPR
},
447 { "f30", 30, PPC_OPERAND_FPR
},
448 { "f31", 31, PPC_OPERAND_FPR
},
449 { "f32", 32, PPC_OPERAND_VSR
},
450 { "f33", 33, PPC_OPERAND_VSR
},
451 { "f34", 34, PPC_OPERAND_VSR
},
452 { "f35", 35, PPC_OPERAND_VSR
},
453 { "f36", 36, PPC_OPERAND_VSR
},
454 { "f37", 37, PPC_OPERAND_VSR
},
455 { "f38", 38, PPC_OPERAND_VSR
},
456 { "f39", 39, PPC_OPERAND_VSR
},
457 { "f4", 4, PPC_OPERAND_FPR
},
458 { "f40", 40, PPC_OPERAND_VSR
},
459 { "f41", 41, PPC_OPERAND_VSR
},
460 { "f42", 42, PPC_OPERAND_VSR
},
461 { "f43", 43, PPC_OPERAND_VSR
},
462 { "f44", 44, PPC_OPERAND_VSR
},
463 { "f45", 45, PPC_OPERAND_VSR
},
464 { "f46", 46, PPC_OPERAND_VSR
},
465 { "f47", 47, PPC_OPERAND_VSR
},
466 { "f48", 48, PPC_OPERAND_VSR
},
467 { "f49", 49, PPC_OPERAND_VSR
},
468 { "f5", 5, PPC_OPERAND_FPR
},
469 { "f50", 50, PPC_OPERAND_VSR
},
470 { "f51", 51, PPC_OPERAND_VSR
},
471 { "f52", 52, PPC_OPERAND_VSR
},
472 { "f53", 53, PPC_OPERAND_VSR
},
473 { "f54", 54, PPC_OPERAND_VSR
},
474 { "f55", 55, PPC_OPERAND_VSR
},
475 { "f56", 56, PPC_OPERAND_VSR
},
476 { "f57", 57, PPC_OPERAND_VSR
},
477 { "f58", 58, PPC_OPERAND_VSR
},
478 { "f59", 59, PPC_OPERAND_VSR
},
479 { "f6", 6, PPC_OPERAND_FPR
},
480 { "f60", 60, PPC_OPERAND_VSR
},
481 { "f61", 61, PPC_OPERAND_VSR
},
482 { "f62", 62, PPC_OPERAND_VSR
},
483 { "f63", 63, PPC_OPERAND_VSR
},
484 { "f7", 7, PPC_OPERAND_FPR
},
485 { "f8", 8, PPC_OPERAND_FPR
},
486 { "f9", 9, PPC_OPERAND_FPR
},
488 /* Quantization registers used with pair single instructions. */
489 { "gqr.0", 0, PPC_OPERAND_GQR
},
490 { "gqr.1", 1, PPC_OPERAND_GQR
},
491 { "gqr.2", 2, PPC_OPERAND_GQR
},
492 { "gqr.3", 3, PPC_OPERAND_GQR
},
493 { "gqr.4", 4, PPC_OPERAND_GQR
},
494 { "gqr.5", 5, PPC_OPERAND_GQR
},
495 { "gqr.6", 6, PPC_OPERAND_GQR
},
496 { "gqr.7", 7, PPC_OPERAND_GQR
},
497 { "gqr0", 0, PPC_OPERAND_GQR
},
498 { "gqr1", 1, PPC_OPERAND_GQR
},
499 { "gqr2", 2, PPC_OPERAND_GQR
},
500 { "gqr3", 3, PPC_OPERAND_GQR
},
501 { "gqr4", 4, PPC_OPERAND_GQR
},
502 { "gqr5", 5, PPC_OPERAND_GQR
},
503 { "gqr6", 6, PPC_OPERAND_GQR
},
504 { "gqr7", 7, PPC_OPERAND_GQR
},
506 { "lr", 8, PPC_OPERAND_SPR
},
508 /* General Purpose Registers */
509 { "r.0", 0, PPC_OPERAND_GPR
},
510 { "r.1", 1, PPC_OPERAND_GPR
},
511 { "r.10", 10, PPC_OPERAND_GPR
},
512 { "r.11", 11, PPC_OPERAND_GPR
},
513 { "r.12", 12, PPC_OPERAND_GPR
},
514 { "r.13", 13, PPC_OPERAND_GPR
},
515 { "r.14", 14, PPC_OPERAND_GPR
},
516 { "r.15", 15, PPC_OPERAND_GPR
},
517 { "r.16", 16, PPC_OPERAND_GPR
},
518 { "r.17", 17, PPC_OPERAND_GPR
},
519 { "r.18", 18, PPC_OPERAND_GPR
},
520 { "r.19", 19, PPC_OPERAND_GPR
},
521 { "r.2", 2, PPC_OPERAND_GPR
},
522 { "r.20", 20, PPC_OPERAND_GPR
},
523 { "r.21", 21, PPC_OPERAND_GPR
},
524 { "r.22", 22, PPC_OPERAND_GPR
},
525 { "r.23", 23, PPC_OPERAND_GPR
},
526 { "r.24", 24, PPC_OPERAND_GPR
},
527 { "r.25", 25, PPC_OPERAND_GPR
},
528 { "r.26", 26, PPC_OPERAND_GPR
},
529 { "r.27", 27, PPC_OPERAND_GPR
},
530 { "r.28", 28, PPC_OPERAND_GPR
},
531 { "r.29", 29, PPC_OPERAND_GPR
},
532 { "r.3", 3, PPC_OPERAND_GPR
},
533 { "r.30", 30, PPC_OPERAND_GPR
},
534 { "r.31", 31, PPC_OPERAND_GPR
},
535 { "r.4", 4, PPC_OPERAND_GPR
},
536 { "r.5", 5, PPC_OPERAND_GPR
},
537 { "r.6", 6, PPC_OPERAND_GPR
},
538 { "r.7", 7, PPC_OPERAND_GPR
},
539 { "r.8", 8, PPC_OPERAND_GPR
},
540 { "r.9", 9, PPC_OPERAND_GPR
},
542 { "r.sp", 1, PPC_OPERAND_GPR
},
544 { "r.toc", 2, PPC_OPERAND_GPR
},
546 { "r0", 0, PPC_OPERAND_GPR
},
547 { "r1", 1, PPC_OPERAND_GPR
},
548 { "r10", 10, PPC_OPERAND_GPR
},
549 { "r11", 11, PPC_OPERAND_GPR
},
550 { "r12", 12, PPC_OPERAND_GPR
},
551 { "r13", 13, PPC_OPERAND_GPR
},
552 { "r14", 14, PPC_OPERAND_GPR
},
553 { "r15", 15, PPC_OPERAND_GPR
},
554 { "r16", 16, PPC_OPERAND_GPR
},
555 { "r17", 17, PPC_OPERAND_GPR
},
556 { "r18", 18, PPC_OPERAND_GPR
},
557 { "r19", 19, PPC_OPERAND_GPR
},
558 { "r2", 2, PPC_OPERAND_GPR
},
559 { "r20", 20, PPC_OPERAND_GPR
},
560 { "r21", 21, PPC_OPERAND_GPR
},
561 { "r22", 22, PPC_OPERAND_GPR
},
562 { "r23", 23, PPC_OPERAND_GPR
},
563 { "r24", 24, PPC_OPERAND_GPR
},
564 { "r25", 25, PPC_OPERAND_GPR
},
565 { "r26", 26, PPC_OPERAND_GPR
},
566 { "r27", 27, PPC_OPERAND_GPR
},
567 { "r28", 28, PPC_OPERAND_GPR
},
568 { "r29", 29, PPC_OPERAND_GPR
},
569 { "r3", 3, PPC_OPERAND_GPR
},
570 { "r30", 30, PPC_OPERAND_GPR
},
571 { "r31", 31, PPC_OPERAND_GPR
},
572 { "r4", 4, PPC_OPERAND_GPR
},
573 { "r5", 5, PPC_OPERAND_GPR
},
574 { "r6", 6, PPC_OPERAND_GPR
},
575 { "r7", 7, PPC_OPERAND_GPR
},
576 { "r8", 8, PPC_OPERAND_GPR
},
577 { "r9", 9, PPC_OPERAND_GPR
},
579 { "rtoc", 2, PPC_OPERAND_GPR
},
581 { "sdr1", 25, PPC_OPERAND_SPR
},
583 { "sp", 1, PPC_OPERAND_GPR
},
585 { "srr0", 26, PPC_OPERAND_SPR
},
586 { "srr1", 27, PPC_OPERAND_SPR
},
588 /* Vector (Altivec/VMX) registers */
589 { "v.0", 0, PPC_OPERAND_VR
},
590 { "v.1", 1, PPC_OPERAND_VR
},
591 { "v.10", 10, PPC_OPERAND_VR
},
592 { "v.11", 11, PPC_OPERAND_VR
},
593 { "v.12", 12, PPC_OPERAND_VR
},
594 { "v.13", 13, PPC_OPERAND_VR
},
595 { "v.14", 14, PPC_OPERAND_VR
},
596 { "v.15", 15, PPC_OPERAND_VR
},
597 { "v.16", 16, PPC_OPERAND_VR
},
598 { "v.17", 17, PPC_OPERAND_VR
},
599 { "v.18", 18, PPC_OPERAND_VR
},
600 { "v.19", 19, PPC_OPERAND_VR
},
601 { "v.2", 2, PPC_OPERAND_VR
},
602 { "v.20", 20, PPC_OPERAND_VR
},
603 { "v.21", 21, PPC_OPERAND_VR
},
604 { "v.22", 22, PPC_OPERAND_VR
},
605 { "v.23", 23, PPC_OPERAND_VR
},
606 { "v.24", 24, PPC_OPERAND_VR
},
607 { "v.25", 25, PPC_OPERAND_VR
},
608 { "v.26", 26, PPC_OPERAND_VR
},
609 { "v.27", 27, PPC_OPERAND_VR
},
610 { "v.28", 28, PPC_OPERAND_VR
},
611 { "v.29", 29, PPC_OPERAND_VR
},
612 { "v.3", 3, PPC_OPERAND_VR
},
613 { "v.30", 30, PPC_OPERAND_VR
},
614 { "v.31", 31, PPC_OPERAND_VR
},
615 { "v.4", 4, PPC_OPERAND_VR
},
616 { "v.5", 5, PPC_OPERAND_VR
},
617 { "v.6", 6, PPC_OPERAND_VR
},
618 { "v.7", 7, PPC_OPERAND_VR
},
619 { "v.8", 8, PPC_OPERAND_VR
},
620 { "v.9", 9, PPC_OPERAND_VR
},
622 { "v0", 0, PPC_OPERAND_VR
},
623 { "v1", 1, PPC_OPERAND_VR
},
624 { "v10", 10, PPC_OPERAND_VR
},
625 { "v11", 11, PPC_OPERAND_VR
},
626 { "v12", 12, PPC_OPERAND_VR
},
627 { "v13", 13, PPC_OPERAND_VR
},
628 { "v14", 14, PPC_OPERAND_VR
},
629 { "v15", 15, PPC_OPERAND_VR
},
630 { "v16", 16, PPC_OPERAND_VR
},
631 { "v17", 17, PPC_OPERAND_VR
},
632 { "v18", 18, PPC_OPERAND_VR
},
633 { "v19", 19, PPC_OPERAND_VR
},
634 { "v2", 2, PPC_OPERAND_VR
},
635 { "v20", 20, PPC_OPERAND_VR
},
636 { "v21", 21, PPC_OPERAND_VR
},
637 { "v22", 22, PPC_OPERAND_VR
},
638 { "v23", 23, PPC_OPERAND_VR
},
639 { "v24", 24, PPC_OPERAND_VR
},
640 { "v25", 25, PPC_OPERAND_VR
},
641 { "v26", 26, PPC_OPERAND_VR
},
642 { "v27", 27, PPC_OPERAND_VR
},
643 { "v28", 28, PPC_OPERAND_VR
},
644 { "v29", 29, PPC_OPERAND_VR
},
645 { "v3", 3, PPC_OPERAND_VR
},
646 { "v30", 30, PPC_OPERAND_VR
},
647 { "v31", 31, PPC_OPERAND_VR
},
648 { "v4", 4, PPC_OPERAND_VR
},
649 { "v5", 5, PPC_OPERAND_VR
},
650 { "v6", 6, PPC_OPERAND_VR
},
651 { "v7", 7, PPC_OPERAND_VR
},
652 { "v8", 8, PPC_OPERAND_VR
},
653 { "v9", 9, PPC_OPERAND_VR
},
655 /* Vector Scalar (VSX) registers (ISA 2.06). */
656 { "vs.0", 0, PPC_OPERAND_VSR
},
657 { "vs.1", 1, PPC_OPERAND_VSR
},
658 { "vs.10", 10, PPC_OPERAND_VSR
},
659 { "vs.11", 11, PPC_OPERAND_VSR
},
660 { "vs.12", 12, PPC_OPERAND_VSR
},
661 { "vs.13", 13, PPC_OPERAND_VSR
},
662 { "vs.14", 14, PPC_OPERAND_VSR
},
663 { "vs.15", 15, PPC_OPERAND_VSR
},
664 { "vs.16", 16, PPC_OPERAND_VSR
},
665 { "vs.17", 17, PPC_OPERAND_VSR
},
666 { "vs.18", 18, PPC_OPERAND_VSR
},
667 { "vs.19", 19, PPC_OPERAND_VSR
},
668 { "vs.2", 2, PPC_OPERAND_VSR
},
669 { "vs.20", 20, PPC_OPERAND_VSR
},
670 { "vs.21", 21, PPC_OPERAND_VSR
},
671 { "vs.22", 22, PPC_OPERAND_VSR
},
672 { "vs.23", 23, PPC_OPERAND_VSR
},
673 { "vs.24", 24, PPC_OPERAND_VSR
},
674 { "vs.25", 25, PPC_OPERAND_VSR
},
675 { "vs.26", 26, PPC_OPERAND_VSR
},
676 { "vs.27", 27, PPC_OPERAND_VSR
},
677 { "vs.28", 28, PPC_OPERAND_VSR
},
678 { "vs.29", 29, PPC_OPERAND_VSR
},
679 { "vs.3", 3, PPC_OPERAND_VSR
},
680 { "vs.30", 30, PPC_OPERAND_VSR
},
681 { "vs.31", 31, PPC_OPERAND_VSR
},
682 { "vs.32", 32, PPC_OPERAND_VSR
},
683 { "vs.33", 33, PPC_OPERAND_VSR
},
684 { "vs.34", 34, PPC_OPERAND_VSR
},
685 { "vs.35", 35, PPC_OPERAND_VSR
},
686 { "vs.36", 36, PPC_OPERAND_VSR
},
687 { "vs.37", 37, PPC_OPERAND_VSR
},
688 { "vs.38", 38, PPC_OPERAND_VSR
},
689 { "vs.39", 39, PPC_OPERAND_VSR
},
690 { "vs.4", 4, PPC_OPERAND_VSR
},
691 { "vs.40", 40, PPC_OPERAND_VSR
},
692 { "vs.41", 41, PPC_OPERAND_VSR
},
693 { "vs.42", 42, PPC_OPERAND_VSR
},
694 { "vs.43", 43, PPC_OPERAND_VSR
},
695 { "vs.44", 44, PPC_OPERAND_VSR
},
696 { "vs.45", 45, PPC_OPERAND_VSR
},
697 { "vs.46", 46, PPC_OPERAND_VSR
},
698 { "vs.47", 47, PPC_OPERAND_VSR
},
699 { "vs.48", 48, PPC_OPERAND_VSR
},
700 { "vs.49", 49, PPC_OPERAND_VSR
},
701 { "vs.5", 5, PPC_OPERAND_VSR
},
702 { "vs.50", 50, PPC_OPERAND_VSR
},
703 { "vs.51", 51, PPC_OPERAND_VSR
},
704 { "vs.52", 52, PPC_OPERAND_VSR
},
705 { "vs.53", 53, PPC_OPERAND_VSR
},
706 { "vs.54", 54, PPC_OPERAND_VSR
},
707 { "vs.55", 55, PPC_OPERAND_VSR
},
708 { "vs.56", 56, PPC_OPERAND_VSR
},
709 { "vs.57", 57, PPC_OPERAND_VSR
},
710 { "vs.58", 58, PPC_OPERAND_VSR
},
711 { "vs.59", 59, PPC_OPERAND_VSR
},
712 { "vs.6", 6, PPC_OPERAND_VSR
},
713 { "vs.60", 60, PPC_OPERAND_VSR
},
714 { "vs.61", 61, PPC_OPERAND_VSR
},
715 { "vs.62", 62, PPC_OPERAND_VSR
},
716 { "vs.63", 63, PPC_OPERAND_VSR
},
717 { "vs.7", 7, PPC_OPERAND_VSR
},
718 { "vs.8", 8, PPC_OPERAND_VSR
},
719 { "vs.9", 9, PPC_OPERAND_VSR
},
721 { "vs0", 0, PPC_OPERAND_VSR
},
722 { "vs1", 1, PPC_OPERAND_VSR
},
723 { "vs10", 10, PPC_OPERAND_VSR
},
724 { "vs11", 11, PPC_OPERAND_VSR
},
725 { "vs12", 12, PPC_OPERAND_VSR
},
726 { "vs13", 13, PPC_OPERAND_VSR
},
727 { "vs14", 14, PPC_OPERAND_VSR
},
728 { "vs15", 15, PPC_OPERAND_VSR
},
729 { "vs16", 16, PPC_OPERAND_VSR
},
730 { "vs17", 17, PPC_OPERAND_VSR
},
731 { "vs18", 18, PPC_OPERAND_VSR
},
732 { "vs19", 19, PPC_OPERAND_VSR
},
733 { "vs2", 2, PPC_OPERAND_VSR
},
734 { "vs20", 20, PPC_OPERAND_VSR
},
735 { "vs21", 21, PPC_OPERAND_VSR
},
736 { "vs22", 22, PPC_OPERAND_VSR
},
737 { "vs23", 23, PPC_OPERAND_VSR
},
738 { "vs24", 24, PPC_OPERAND_VSR
},
739 { "vs25", 25, PPC_OPERAND_VSR
},
740 { "vs26", 26, PPC_OPERAND_VSR
},
741 { "vs27", 27, PPC_OPERAND_VSR
},
742 { "vs28", 28, PPC_OPERAND_VSR
},
743 { "vs29", 29, PPC_OPERAND_VSR
},
744 { "vs3", 3, PPC_OPERAND_VSR
},
745 { "vs30", 30, PPC_OPERAND_VSR
},
746 { "vs31", 31, PPC_OPERAND_VSR
},
747 { "vs32", 32, PPC_OPERAND_VSR
},
748 { "vs33", 33, PPC_OPERAND_VSR
},
749 { "vs34", 34, PPC_OPERAND_VSR
},
750 { "vs35", 35, PPC_OPERAND_VSR
},
751 { "vs36", 36, PPC_OPERAND_VSR
},
752 { "vs37", 37, PPC_OPERAND_VSR
},
753 { "vs38", 38, PPC_OPERAND_VSR
},
754 { "vs39", 39, PPC_OPERAND_VSR
},
755 { "vs4", 4, PPC_OPERAND_VSR
},
756 { "vs40", 40, PPC_OPERAND_VSR
},
757 { "vs41", 41, PPC_OPERAND_VSR
},
758 { "vs42", 42, PPC_OPERAND_VSR
},
759 { "vs43", 43, PPC_OPERAND_VSR
},
760 { "vs44", 44, PPC_OPERAND_VSR
},
761 { "vs45", 45, PPC_OPERAND_VSR
},
762 { "vs46", 46, PPC_OPERAND_VSR
},
763 { "vs47", 47, PPC_OPERAND_VSR
},
764 { "vs48", 48, PPC_OPERAND_VSR
},
765 { "vs49", 49, PPC_OPERAND_VSR
},
766 { "vs5", 5, PPC_OPERAND_VSR
},
767 { "vs50", 50, PPC_OPERAND_VSR
},
768 { "vs51", 51, PPC_OPERAND_VSR
},
769 { "vs52", 52, PPC_OPERAND_VSR
},
770 { "vs53", 53, PPC_OPERAND_VSR
},
771 { "vs54", 54, PPC_OPERAND_VSR
},
772 { "vs55", 55, PPC_OPERAND_VSR
},
773 { "vs56", 56, PPC_OPERAND_VSR
},
774 { "vs57", 57, PPC_OPERAND_VSR
},
775 { "vs58", 58, PPC_OPERAND_VSR
},
776 { "vs59", 59, PPC_OPERAND_VSR
},
777 { "vs6", 6, PPC_OPERAND_VSR
},
778 { "vs60", 60, PPC_OPERAND_VSR
},
779 { "vs61", 61, PPC_OPERAND_VSR
},
780 { "vs62", 62, PPC_OPERAND_VSR
},
781 { "vs63", 63, PPC_OPERAND_VSR
},
782 { "vs7", 7, PPC_OPERAND_VSR
},
783 { "vs8", 8, PPC_OPERAND_VSR
},
784 { "vs9", 9, PPC_OPERAND_VSR
},
786 { "xer", 1, PPC_OPERAND_SPR
}
789 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
791 /* Given NAME, find the register number associated with that name, return
792 the integer value associated with the given name or -1 on failure. */
794 static const struct pd_reg
*
795 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
797 int middle
, low
, high
;
805 middle
= (low
+ high
) / 2;
806 cmp
= strcasecmp (name
, regs
[middle
].name
);
812 return ®s
[middle
];
820 * Summary of register_name.
822 * in: Input_line_pointer points to 1st char of operand.
824 * out: A expressionS.
825 * The operand may have been a register: in this case, X_op == O_register,
826 * X_add_number is set to the register number, and truth is returned.
827 * Input_line_pointer->(next non-blank) char after operand, or is in its
832 register_name (expressionS
*expressionP
)
834 const struct pd_reg
*reg
;
839 /* Find the spelling of the operand. */
840 start
= name
= input_line_pointer
;
841 if (name
[0] == '%' && ISALPHA (name
[1]))
842 name
= ++input_line_pointer
;
844 else if (!reg_names_p
|| !ISALPHA (name
[0]))
847 c
= get_symbol_name (&name
);
848 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
850 /* Put back the delimiting char. */
851 *input_line_pointer
= c
;
853 /* Look to see if it's in the register table. */
856 expressionP
->X_op
= O_register
;
857 expressionP
->X_add_number
= reg
->value
;
858 expressionP
->X_md
= reg
->flags
;
860 /* Make the rest nice. */
861 expressionP
->X_add_symbol
= NULL
;
862 expressionP
->X_op_symbol
= NULL
;
866 /* Reset the line as if we had not done anything. */
867 input_line_pointer
= start
;
871 /* This function is called for each symbol seen in an expression. It
872 handles the special parsing which PowerPC assemblers are supposed
873 to use for condition codes. */
875 /* Whether to do the special parsing. */
876 static bool cr_operand
;
878 /* Names to recognize in a condition code. This table is sorted. */
879 static const struct pd_reg cr_names
[] =
881 { "cr0", 0, PPC_OPERAND_CR_REG
},
882 { "cr1", 1, PPC_OPERAND_CR_REG
},
883 { "cr2", 2, PPC_OPERAND_CR_REG
},
884 { "cr3", 3, PPC_OPERAND_CR_REG
},
885 { "cr4", 4, PPC_OPERAND_CR_REG
},
886 { "cr5", 5, PPC_OPERAND_CR_REG
},
887 { "cr6", 6, PPC_OPERAND_CR_REG
},
888 { "cr7", 7, PPC_OPERAND_CR_REG
},
889 { "eq", 2, PPC_OPERAND_CR_BIT
},
890 { "gt", 1, PPC_OPERAND_CR_BIT
},
891 { "lt", 0, PPC_OPERAND_CR_BIT
},
892 { "so", 3, PPC_OPERAND_CR_BIT
},
893 { "un", 3, PPC_OPERAND_CR_BIT
}
896 /* Parsing function. This returns non-zero if it recognized an
900 ppc_parse_name (const char *name
, expressionS
*exp
)
902 const struct pd_reg
*reg
;
909 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
914 exp
->X_op
= O_register
;
915 exp
->X_add_number
= reg
->value
;
916 exp
->X_md
= reg
->flags
;
921 /* Propagate X_md and check register expressions. This is to support
922 condition codes like 4*cr5+eq. */
925 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
927 /* Accept 4*cr<n> and cr<n>*4. */
929 && ((right
->X_op
== O_register
930 && right
->X_md
== PPC_OPERAND_CR_REG
931 && left
->X_op
== O_constant
932 && left
->X_add_number
== 4)
933 || (left
->X_op
== O_register
934 && left
->X_md
== PPC_OPERAND_CR_REG
935 && right
->X_op
== O_constant
936 && right
->X_add_number
== 4)))
938 left
->X_op
= O_register
;
939 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
940 left
->X_add_number
*= right
->X_add_number
;
944 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
945 if (right
->X_op
== O_register
946 && left
->X_op
== O_register
948 && ((right
->X_md
== PPC_OPERAND_CR_BIT
949 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
950 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
951 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
953 left
->X_md
= PPC_OPERAND_CR_BIT
;
954 right
->X_op
= O_constant
;
958 /* Accept reg +/- constant. */
959 if (left
->X_op
== O_register
960 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
961 as_warn (_("invalid register expression"));
963 /* Accept constant + reg. */
964 if (right
->X_op
== O_register
)
966 if (op
== O_add
&& left
->X_op
== O_constant
)
967 left
->X_md
= right
->X_md
;
969 as_warn (_("invalid register expression"));
975 /* Local variables. */
977 /* Whether to target xcoff64/elf64. */
978 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
980 /* Opcode hash table. */
981 static htab_t ppc_hash
;
983 /* Macro hash table. */
984 static htab_t ppc_macro_hash
;
987 /* What type of shared library support to use. */
988 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
990 /* Flags to set in the elf header. */
991 static flagword ppc_flags
= 0;
993 /* Whether this is Solaris or not. */
994 #ifdef TARGET_SOLARIS_COMMENT
995 #define SOLARIS_P true
997 #define SOLARIS_P false
1000 static bool msolaris
= SOLARIS_P
;
1005 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1006 using a bunch of different sections. These assembler sections,
1007 however, are all encompassed within the .text, .data or .bss sections
1008 of the final output file. We handle this by using different
1009 subsegments within these main segments.
1010 .tdata and .tbss sections only have one type of csects for now,
1011 but it's better to follow the same construction like the others. */
1013 struct ppc_xcoff_section ppc_xcoff_text_section
;
1014 struct ppc_xcoff_section ppc_xcoff_data_section
;
1015 struct ppc_xcoff_section ppc_xcoff_bss_section
;
1016 struct ppc_xcoff_section ppc_xcoff_tdata_section
;
1017 struct ppc_xcoff_section ppc_xcoff_tbss_section
;
1019 /* Return true if the ppc_xcoff_section structure is already
1022 ppc_xcoff_section_is_initialized (struct ppc_xcoff_section
*section
)
1024 return section
->segment
!= NULL
;
1027 /* Initialize a ppc_xcoff_section.
1028 Dummy symbols are used to ensure the position of .text over .data
1029 and .tdata. Moreover, they allow all algorithms here to be sure that
1030 csects isn't NULL. These symbols won't be output. */
1032 ppc_init_xcoff_section (struct ppc_xcoff_section
*s
, segT seg
)
1035 s
->next_subsegment
= 2;
1036 s
->csects
= symbol_make ("dummy\001");
1037 symbol_get_tc (s
->csects
)->within
= s
->csects
;
1040 /* The current csect. */
1041 static symbolS
*ppc_current_csect
;
1043 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1044 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1045 A special relocation is used when accessing TOC entries. We handle
1046 the TOC as a subsegment within the .data segment. We set it up if
1047 we see a .toc pseudo-op, and save the csect symbol here. */
1048 static symbolS
*ppc_toc_csect
;
1050 /* The first frag in the TOC subsegment. */
1051 static fragS
*ppc_toc_frag
;
1053 /* The first frag in the first subsegment after the TOC in the .data
1054 segment. NULL if there are no subsegments after the TOC. */
1055 static fragS
*ppc_after_toc_frag
;
1057 /* The current static block. */
1058 static symbolS
*ppc_current_block
;
1060 /* The COFF debugging section; set by md_begin. This is not the
1061 .debug section, but is instead the secret BFD section which will
1062 cause BFD to set the section number of a symbol to N_DEBUG. */
1063 static asection
*ppc_coff_debug_section
;
1065 /* Structure to set the length field of the dwarf sections. */
1066 struct dw_subsection
{
1067 /* Subsections are simply linked. */
1068 struct dw_subsection
*link
;
1070 /* The subsection number. */
1073 /* Expression to compute the length of the section. */
1074 expressionS end_exp
;
1077 static struct dw_section
{
1078 /* Corresponding section. */
1081 /* Simply linked list of subsections with a label. */
1082 struct dw_subsection
*list_subseg
;
1084 /* The anonymous subsection. */
1085 struct dw_subsection
*anon_subseg
;
1086 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1087 #endif /* OBJ_XCOFF */
1090 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1091 unsigned long *ppc_apuinfo_list
;
1092 unsigned int ppc_apuinfo_num
;
1093 unsigned int ppc_apuinfo_num_alloc
;
1094 #endif /* OBJ_ELF */
1097 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1099 const char *const md_shortopts
= "um:";
1101 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1102 const struct option md_longopts
[] = {
1103 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1104 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1105 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1106 {NULL
, no_argument
, NULL
, 0}
1108 const size_t md_longopts_size
= sizeof (md_longopts
);
1111 md_parse_option (int c
, const char *arg
)
1118 /* -u means that any undefined symbols should be treated as
1119 external, which is the default for gas anyhow. */
1124 /* Solaris as takes -le (presumably for little endian). For completeness
1125 sake, recognize -be also. */
1126 if (strcmp (arg
, "e") == 0)
1128 target_big_endian
= 0;
1129 set_target_endian
= 1;
1130 if (ppc_cpu
& PPC_OPCODE_VLE
)
1131 as_bad (_("the use of -mvle requires big endian."));
1139 if (strcmp (arg
, "e") == 0)
1141 target_big_endian
= 1;
1142 set_target_endian
= 1;
1150 /* Recognize -K PIC. */
1151 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1154 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1162 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1164 if (strcmp (arg
, "64") == 0)
1168 if (ppc_cpu
& PPC_OPCODE_VLE
)
1169 as_bad (_("the use of -mvle requires -a32."));
1171 as_fatal (_("%s unsupported"), "-a64");
1174 else if (strcmp (arg
, "32") == 0)
1181 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1182 /* "raw" is only valid for the disassembler. */
1183 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1186 if (strcmp (arg
, "vle") == 0)
1188 if (set_target_endian
&& target_big_endian
== 0)
1189 as_bad (_("the use of -mvle requires big endian."));
1191 as_bad (_("the use of -mvle requires -a32."));
1195 else if (strcmp (arg
, "no-vle") == 0)
1197 sticky
&= ~PPC_OPCODE_VLE
;
1199 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1200 new_cpu
&= ~PPC_OPCODE_VLE
;
1205 else if (strcmp (arg
, "regnames") == 0)
1208 else if (strcmp (arg
, "no-regnames") == 0)
1209 reg_names_p
= false;
1212 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1213 that require relocation. */
1214 else if (strcmp (arg
, "relocatable") == 0)
1216 shlib
= SHLIB_MRELOCATABLE
;
1217 ppc_flags
|= EF_PPC_RELOCATABLE
;
1220 else if (strcmp (arg
, "relocatable-lib") == 0)
1222 shlib
= SHLIB_MRELOCATABLE
;
1223 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1226 /* -memb, set embedded bit. */
1227 else if (strcmp (arg
, "emb") == 0)
1228 ppc_flags
|= EF_PPC_EMB
;
1230 /* -mlittle/-mbig set the endianness. */
1231 else if (strcmp (arg
, "little") == 0
1232 || strcmp (arg
, "little-endian") == 0)
1234 target_big_endian
= 0;
1235 set_target_endian
= 1;
1236 if (ppc_cpu
& PPC_OPCODE_VLE
)
1237 as_bad (_("the use of -mvle requires big endian."));
1240 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1242 target_big_endian
= 1;
1243 set_target_endian
= 1;
1246 else if (strcmp (arg
, "solaris") == 0)
1249 ppc_comment_chars
= ppc_solaris_comment_chars
;
1252 else if (strcmp (arg
, "no-solaris") == 0)
1255 ppc_comment_chars
= ppc_eabi_comment_chars
;
1257 else if (strcmp (arg
, "spe2") == 0)
1259 ppc_cpu
|= PPC_OPCODE_SPE2
;
1264 as_bad (_("invalid switch -m%s"), arg
);
1270 /* -V: SVR4 argument to print version ID. */
1272 print_version_id ();
1275 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1276 should be emitted or not. FIXME: Not implemented. */
1280 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1281 rather than .stabs.excl, which is ignored by the linker.
1282 FIXME: Not implemented. */
1293 nop_limit
= strtoul (optarg
, &end
, 0);
1295 as_bad (_("--nops needs a numeric argument"));
1310 is_ppc64_target (const bfd_target
*targ
, void *data ATTRIBUTE_UNUSED
)
1312 switch (targ
->flavour
)
1315 case bfd_target_elf_flavour
:
1316 return startswith (targ
->name
, "elf64-powerpc");
1319 case bfd_target_xcoff_flavour
:
1320 return (strcmp (targ
->name
, "aixcoff64-rs6000") == 0
1321 || strcmp (targ
->name
, "aix5coff64-rs6000") == 0);
1329 md_show_usage (FILE *stream
)
1331 fprintf (stream
, _("\
1332 PowerPC options:\n"));
1333 fprintf (stream
, _("\
1334 -a32 generate ELF32/XCOFF32\n"));
1335 if (bfd_iterate_over_targets (is_ppc64_target
, NULL
))
1336 fprintf (stream
, _("\
1337 -a64 generate ELF64/XCOFF64\n"));
1338 fprintf (stream
, _("\
1340 fprintf (stream
, _("\
1341 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n"));
1342 fprintf (stream
, _("\
1343 -mpwr generate code for POWER (RIOS1)\n"));
1344 fprintf (stream
, _("\
1345 -m601 generate code for PowerPC 601\n"));
1346 fprintf (stream
, _("\
1347 -mppc, -mppc32, -m603, -m604\n\
1348 generate code for PowerPC 603/604\n"));
1349 fprintf (stream
, _("\
1350 -m403 generate code for PowerPC 403\n"));
1351 fprintf (stream
, _("\
1352 -m405 generate code for PowerPC 405\n"));
1353 fprintf (stream
, _("\
1354 -m440 generate code for PowerPC 440\n"));
1355 fprintf (stream
, _("\
1356 -m464 generate code for PowerPC 464\n"));
1357 fprintf (stream
, _("\
1358 -m476 generate code for PowerPC 476\n"));
1359 fprintf (stream
, _("\
1360 -m7400, -m7410, -m7450, -m7455\n\
1361 generate code for PowerPC 7400/7410/7450/7455\n"));
1362 fprintf (stream
, _("\
1363 -m750cl, -mgekko, -mbroadway\n\
1364 generate code for PowerPC 750cl/Gekko/Broadway\n"));
1365 fprintf (stream
, _("\
1366 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1367 fprintf (stream
, _("\
1368 -mppc64, -m620 generate code for PowerPC 620/625/630\n"));
1369 fprintf (stream
, _("\
1370 -mppc64bridge generate code for PowerPC 64, including bridge insns\n"));
1371 fprintf (stream
, _("\
1372 -mbooke generate code for 32-bit PowerPC BookE\n"));
1373 fprintf (stream
, _("\
1374 -ma2 generate code for A2 architecture\n"));
1375 fprintf (stream
, _("\
1376 -mpower4, -mpwr4 generate code for Power4 architecture\n"));
1377 fprintf (stream
, _("\
1378 -mpower5, -mpwr5, -mpwr5x\n\
1379 generate code for Power5 architecture\n"));
1380 fprintf (stream
, _("\
1381 -mpower6, -mpwr6 generate code for Power6 architecture\n"));
1382 fprintf (stream
, _("\
1383 -mpower7, -mpwr7 generate code for Power7 architecture\n"));
1384 fprintf (stream
, _("\
1385 -mpower8, -mpwr8 generate code for Power8 architecture\n"));
1386 fprintf (stream
, _("\
1387 -mpower9, -mpwr9 generate code for Power9 architecture\n"));
1388 fprintf (stream
, _("\
1389 -mpower10, -mpwr10 generate code for Power10 architecture\n"));
1390 fprintf (stream
, _("\
1391 -mcell generate code for Cell Broadband Engine architecture\n"));
1392 fprintf (stream
, _("\
1393 -mcom generate code for Power/PowerPC common instructions\n"));
1394 fprintf (stream
, _("\
1395 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1396 fprintf (stream
, _("\
1397 -maltivec generate code for AltiVec\n"));
1398 fprintf (stream
, _("\
1399 -mvsx generate code for Vector-Scalar (VSX) instructions\n"));
1400 fprintf (stream
, _("\
1401 -me300 generate code for PowerPC e300 family\n"));
1402 fprintf (stream
, _("\
1403 -me500, -me500x2 generate code for Motorola e500 core complex\n"));
1404 fprintf (stream
, _("\
1405 -me500mc, generate code for Freescale e500mc core complex\n"));
1406 fprintf (stream
, _("\
1407 -me500mc64, generate code for Freescale e500mc64 core complex\n"));
1408 fprintf (stream
, _("\
1409 -me5500, generate code for Freescale e5500 core complex\n"));
1410 fprintf (stream
, _("\
1411 -me6500, generate code for Freescale e6500 core complex\n"));
1412 fprintf (stream
, _("\
1413 -mspe generate code for Motorola SPE instructions\n"));
1414 fprintf (stream
, _("\
1415 -mspe2 generate code for Freescale SPE2 instructions\n"));
1416 fprintf (stream
, _("\
1417 -mvle generate code for Freescale VLE instructions\n"));
1418 fprintf (stream
, _("\
1419 -mtitan generate code for AppliedMicro Titan core complex\n"));
1420 fprintf (stream
, _("\
1421 -mregnames Allow symbolic names for registers\n"));
1422 fprintf (stream
, _("\
1423 -mno-regnames Do not allow symbolic names for registers\n"));
1425 fprintf (stream
, _("\
1426 -mrelocatable support for GCC's -mrelocatble option\n"));
1427 fprintf (stream
, _("\
1428 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n"));
1429 fprintf (stream
, _("\
1430 -memb set PPC_EMB bit in ELF flags\n"));
1431 fprintf (stream
, _("\
1432 -mlittle, -mlittle-endian, -le\n\
1433 generate code for a little endian machine\n"));
1434 fprintf (stream
, _("\
1435 -mbig, -mbig-endian, -be\n\
1436 generate code for a big endian machine\n"));
1437 fprintf (stream
, _("\
1438 -msolaris generate code for Solaris\n"));
1439 fprintf (stream
, _("\
1440 -mno-solaris do not generate code for Solaris\n"));
1441 fprintf (stream
, _("\
1442 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n"));
1443 fprintf (stream
, _("\
1444 -V print assembler version number\n"));
1445 fprintf (stream
, _("\
1446 -Qy, -Qn ignored\n"));
1448 fprintf (stream
, _("\
1449 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1450 fprintf (stream
, _("\
1451 -ppc476-workaround warn if emitting data to code sections\n"));
1454 /* Set ppc_cpu if it is not already set. */
1459 const char *default_os
= TARGET_OS
;
1460 const char *default_cpu
= TARGET_CPU
;
1462 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1465 if (target_big_endian
)
1466 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1468 /* The minimum supported cpu for 64-bit little-endian is power8. */
1469 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1470 else if (startswith (default_os
, "aix")
1471 && default_os
[3] >= '4' && default_os
[3] <= '9')
1472 ppc_cpu
|= PPC_OPCODE_COMMON
;
1473 else if (startswith (default_os
, "aix3"))
1474 ppc_cpu
|= PPC_OPCODE_POWER
;
1475 else if (strcmp (default_cpu
, "rs6000") == 0)
1476 ppc_cpu
|= PPC_OPCODE_POWER
;
1477 else if (startswith (default_cpu
, "powerpc"))
1478 ppc_cpu
|= PPC_OPCODE_PPC
;
1480 as_fatal (_("unknown default cpu = %s, os = %s"),
1481 default_cpu
, default_os
);
1485 /* Figure out the BFD architecture to use. This function and ppc_mach
1486 are called well before md_begin, when the output file is opened. */
1488 enum bfd_architecture
1491 const char *default_cpu
= TARGET_CPU
;
1494 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1495 return bfd_arch_powerpc
;
1496 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1497 return bfd_arch_powerpc
;
1498 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1499 return bfd_arch_rs6000
;
1500 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1502 if (strcmp (default_cpu
, "rs6000") == 0)
1503 return bfd_arch_rs6000
;
1504 else if (startswith (default_cpu
, "powerpc"))
1505 return bfd_arch_powerpc
;
1508 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1509 return bfd_arch_unknown
;
1516 return bfd_mach_ppc64
;
1517 else if (ppc_arch () == bfd_arch_rs6000
)
1518 return bfd_mach_rs6k
;
1519 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1520 return bfd_mach_ppc_titan
;
1521 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1522 return bfd_mach_ppc_vle
;
1524 return bfd_mach_ppc
;
1528 ppc_target_format (void)
1532 return "xcoff-powermac";
1535 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1537 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1543 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1544 # elif defined (TE_VXWORKS)
1545 return "elf32-powerpc-vxworks";
1547 return (target_big_endian
1548 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1549 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1554 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1555 Return TRUE if there's a problem, otherwise FALSE. */
1558 insn_validate (const struct powerpc_opcode
*op
)
1560 const unsigned char *o
;
1561 uint64_t omask
= op
->mask
;
1563 /* The mask had better not trim off opcode bits. */
1564 if ((op
->opcode
& omask
) != op
->opcode
)
1566 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1570 /* The operands must not overlap the opcode or each other. */
1571 for (o
= op
->operands
; *o
; ++o
)
1573 bool optional
= false;
1574 if (*o
>= num_powerpc_operands
)
1576 as_bad (_("operand index error for %s"), op
->name
);
1582 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1583 if (operand
->shift
== (int) PPC_OPSHIFT_INV
)
1590 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1592 else if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1594 mask
= (*operand
->insert
) (0, val
, ppc_cpu
, &errmsg
);
1596 else if (operand
->shift
>= 0)
1597 mask
= operand
->bitm
<< operand
->shift
;
1599 mask
= operand
->bitm
>> -operand
->shift
;
1602 as_bad (_("operand %d overlap in %s"),
1603 (int) (o
- op
->operands
), op
->name
);
1607 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
1611 as_bad (_("non-optional operand %d follows optional operand in %s"),
1612 (int) (o
- op
->operands
), op
->name
);
1620 /* Insert opcodes and macros into hash tables. Called at startup and
1621 for .machine pseudo. */
1624 ppc_setup_opcodes (void)
1626 const struct powerpc_opcode
*op
;
1627 const struct powerpc_opcode
*op_end
;
1628 const struct powerpc_macro
*macro
;
1629 const struct powerpc_macro
*macro_end
;
1630 bool bad_insn
= false;
1632 if (ppc_hash
!= NULL
)
1633 htab_delete (ppc_hash
);
1634 if (ppc_macro_hash
!= NULL
)
1635 htab_delete (ppc_macro_hash
);
1637 /* Insert the opcodes into a hash table. */
1638 ppc_hash
= str_htab_create ();
1640 if (ENABLE_CHECKING
)
1644 /* An index into powerpc_operands is stored in struct fix
1645 fx_pcrel_adjust which is 8 bits wide. */
1646 gas_assert (num_powerpc_operands
< 256);
1648 /* Check operand masks. Code here and in the disassembler assumes
1649 all the 1's in the mask are contiguous. */
1650 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1652 uint64_t mask
= powerpc_operands
[i
].bitm
;
1656 right_bit
= mask
& -mask
;
1658 right_bit
= mask
& -mask
;
1659 if (mask
!= right_bit
)
1661 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1664 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1665 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1666 sizeof (powerpc_operands
[0])) == 0)
1668 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1675 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1676 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1678 if (ENABLE_CHECKING
)
1680 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1682 #ifdef PRINT_OPCODE_TABLE
1683 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1684 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1685 new_opcode
, (unsigned long long) op
->opcode
,
1686 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1689 /* The major opcodes had better be sorted. Code in the disassembler
1690 assumes the insns are sorted according to major opcode. */
1691 if (op
!= powerpc_opcodes
1692 && new_opcode
< PPC_OP (op
[-1].opcode
))
1694 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1698 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1700 as_bad (_("%s is enabled by vle flag"), op
->name
);
1703 if (PPC_OP (op
->opcode
) != 4
1704 && PPC_OP (op
->opcode
) != 31
1705 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1707 as_bad (_("%s not disabled by vle flag"), op
->name
);
1710 bad_insn
|= insn_validate (op
);
1713 if ((ppc_cpu
& op
->flags
) != 0
1714 && !(ppc_cpu
& op
->deprecated
)
1715 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1717 as_bad (_("duplicate %s"), op
->name
);
1722 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1723 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1724 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1726 op_end
= prefix_opcodes
+ prefix_num_opcodes
;
1727 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1729 if (ENABLE_CHECKING
)
1731 unsigned int new_opcode
= PPC_PREFIX_SEG (op
[0].opcode
);
1733 #ifdef PRINT_OPCODE_TABLE
1734 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1735 op
->name
, (unsigned int) (op
- prefix_opcodes
),
1736 new_opcode
, (unsigned long long) op
->opcode
,
1737 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1740 /* The major opcodes had better be sorted. Code in the disassembler
1741 assumes the insns are sorted according to major opcode. */
1742 if (op
!= prefix_opcodes
1743 && new_opcode
< PPC_PREFIX_SEG (op
[-1].opcode
))
1745 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1748 bad_insn
|= insn_validate (op
);
1751 if ((ppc_cpu
& op
->flags
) != 0
1752 && !(ppc_cpu
& op
->deprecated
)
1753 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1755 as_bad (_("duplicate %s"), op
->name
);
1760 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1761 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1762 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1764 op_end
= vle_opcodes
+ vle_num_opcodes
;
1765 for (op
= vle_opcodes
; op
< op_end
; op
++)
1767 if (ENABLE_CHECKING
)
1769 unsigned new_seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1771 #ifdef PRINT_OPCODE_TABLE
1772 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1773 op
->name
, (unsigned int) (op
- vle_opcodes
),
1774 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1775 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1778 /* The major opcodes had better be sorted. Code in the disassembler
1779 assumes the insns are sorted according to major opcode. */
1780 if (op
!= vle_opcodes
1781 && new_seg
< VLE_OP_TO_SEG (VLE_OP (op
[-1].opcode
, op
[-1].mask
)))
1783 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1787 bad_insn
|= insn_validate (op
);
1790 if ((ppc_cpu
& op
->flags
) != 0
1791 && !(ppc_cpu
& op
->deprecated
)
1792 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1794 as_bad (_("duplicate %s"), op
->name
);
1799 /* SPE2 instructions */
1800 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1802 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1803 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1805 if (ENABLE_CHECKING
)
1807 if (op
!= spe2_opcodes
)
1809 unsigned old_seg
, new_seg
;
1811 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1812 old_seg
= VLE_OP_TO_SEG (old_seg
);
1813 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1814 new_seg
= VLE_OP_TO_SEG (new_seg
);
1816 /* The major opcodes had better be sorted. Code in the
1817 disassembler assumes the insns are sorted according to
1819 if (new_seg
< old_seg
)
1821 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1826 bad_insn
|= insn_validate (op
);
1829 if ((ppc_cpu
& op
->flags
) != 0
1830 && !(ppc_cpu
& op
->deprecated
)
1831 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1833 as_bad (_("duplicate %s"), op
->name
);
1838 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1839 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1842 /* Insert the macros into a hash table. */
1843 ppc_macro_hash
= str_htab_create ();
1845 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1846 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1847 if (((macro
->flags
& ppc_cpu
) != 0
1848 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1849 && str_hash_insert (ppc_macro_hash
, macro
->name
, macro
, 0) != NULL
)
1851 as_bad (_("duplicate %s"), macro
->name
);
1859 /* This function is called when the assembler starts up. It is called
1860 after the options have been parsed and the output file has been
1868 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1869 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1872 /* Set the ELF flags if desired. */
1873 if (ppc_flags
&& !msolaris
)
1874 bfd_set_private_flags (stdoutput
, ppc_flags
);
1877 ppc_setup_opcodes ();
1879 /* Tell the main code what the endianness is if it is not overridden
1881 if (!set_target_endian
)
1883 set_target_endian
= 1;
1884 target_big_endian
= PPC_BIG_ENDIAN
;
1888 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1890 /* Create XCOFF sections with .text in first, as it's creating dummy symbols
1891 to serve as initial csects. This forces the text csects to precede the
1892 data csects. These symbols will not be output. */
1893 ppc_init_xcoff_section (&ppc_xcoff_text_section
, text_section
);
1894 ppc_init_xcoff_section (&ppc_xcoff_data_section
, data_section
);
1895 ppc_init_xcoff_section (&ppc_xcoff_bss_section
, bss_section
);
1903 if (ppc_apuinfo_list
== NULL
)
1906 /* Ok, so write the section info out. We have this layout:
1910 0 8 length of "APUinfo\0"
1911 4 (n*4) number of APU's (4 bytes each)
1914 20 APU#1 first APU's info
1915 24 APU#2 second APU's info
1920 asection
*seg
= now_seg
;
1921 subsegT subseg
= now_subseg
;
1922 asection
*apuinfo_secp
= (asection
*) NULL
;
1925 /* Create the .PPC.EMB.apuinfo section. */
1926 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1927 bfd_set_section_flags (apuinfo_secp
, SEC_HAS_CONTENTS
| SEC_READONLY
);
1930 md_number_to_chars (p
, (valueT
) 8, 4);
1933 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1936 md_number_to_chars (p
, (valueT
) 2, 4);
1939 strcpy (p
, APUINFO_LABEL
);
1941 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1944 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1947 frag_align (2, 0, 0);
1949 /* We probably can't restore the current segment, for there likely
1952 subseg_set (seg
, subseg
);
1957 /* Insert an operand value into an instruction. */
1960 ppc_insert_operand (uint64_t insn
,
1961 const struct powerpc_operand
*operand
,
1967 int64_t min
, max
, right
;
1969 max
= operand
->bitm
;
1973 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
1975 /* Extend the allowed range for addis to [-32768, 65535].
1976 Similarly for cmpli and some VLE high part insns. For 64-bit
1977 it would be good to disable this for signed fields since the
1978 value is sign extended into the high 32 bits of the register.
1979 If the value is, say, an address, then we might care about
1980 the high bits. However, gcc as of 2014-06 uses unsigned
1981 values when loading the high part of 64-bit constants using
1983 min
= ~(max
>> 1) & -right
;
1985 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
1987 max
= (max
>> 1) & -right
;
1988 min
= ~max
& -right
;
1991 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1994 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
2003 /* Some people write constants with the sign extension done by
2004 hand but only up to 32 bits. This shouldn't really be valid,
2005 but, to permit this code to assemble on a 64-bit host, we
2006 sign extend the 32-bit value to 64 bits if so doing makes the
2007 value valid. We only do this for operands that are 32-bits or
2010 && (operand
->bitm
& ~0xffffffffULL
) == 0
2011 && (val
- (1LL << 32)) >= min
2012 && (val
- (1LL << 32)) <= max
2013 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
2014 val
= val
- (1LL << 32);
2016 /* Similarly, people write expressions like ~(1<<15), and expect
2017 this to be OK for a 32-bit unsigned value. */
2019 && (operand
->bitm
& ~0xffffffffULL
) == 0
2020 && (val
+ (1LL << 32)) >= min
2021 && (val
+ (1LL << 32)) <= max
2022 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
2023 val
= val
+ (1LL << 32);
2027 || (val
& (right
- 1)) != 0)
2028 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
2031 if (operand
->insert
)
2036 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
2037 if (errmsg
!= (const char *) NULL
)
2038 as_bad_where (file
, line
, "%s", errmsg
);
2040 else if (operand
->shift
>= 0)
2041 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2043 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2050 /* Parse @got, etc. and return the desired relocation. */
2051 static bfd_reloc_code_real_type
2052 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
2056 unsigned int length
: 8;
2057 unsigned int valid32
: 1;
2058 unsigned int valid64
: 1;
2067 const struct map_bfd
*ptr
;
2069 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2070 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2071 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2073 static const struct map_bfd mapping
[] = {
2074 MAP ("l", BFD_RELOC_LO16
),
2075 MAP ("h", BFD_RELOC_HI16
),
2076 MAP ("ha", BFD_RELOC_HI16_S
),
2077 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2078 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2079 MAP ("got", BFD_RELOC_16_GOTOFF
),
2080 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2081 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2082 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2083 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2084 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2085 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2086 MAP ("copy", BFD_RELOC_PPC_COPY
),
2087 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2088 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2089 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2090 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2091 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2092 MAP ("tls", BFD_RELOC_PPC_TLS
),
2093 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2094 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2095 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2096 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2097 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2098 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2099 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2100 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2101 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2102 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2103 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2104 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2105 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2106 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2107 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2108 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2109 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2110 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2111 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2112 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2113 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2114 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2115 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2116 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2117 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2118 MAP32 ("fixup", BFD_RELOC_CTOR
),
2119 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2120 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2121 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2122 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2123 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2124 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2125 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2126 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2127 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2128 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2129 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2130 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2131 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2132 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2133 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2134 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2135 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2136 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2137 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2138 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2139 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2140 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2141 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2142 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2143 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2144 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2145 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2146 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2147 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2148 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2149 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2150 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2151 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2152 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2153 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2154 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2155 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2156 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2157 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2158 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2159 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2160 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2161 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2162 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2163 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2164 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2165 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2166 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2167 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2168 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2169 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2170 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC
),
2171 MAP64 ("pcrel", BFD_RELOC_PPC64_PCREL34
),
2172 MAP64 ("got@pcrel", BFD_RELOC_PPC64_GOT_PCREL34
),
2173 MAP64 ("plt@pcrel", BFD_RELOC_PPC64_PLT_PCREL34
),
2174 MAP64 ("tls@pcrel", BFD_RELOC_PPC64_TLS_PCREL
),
2175 MAP64 ("got@tlsgd@pcrel", BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
),
2176 MAP64 ("got@tlsld@pcrel", BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
),
2177 MAP64 ("got@tprel@pcrel", BFD_RELOC_PPC64_GOT_TPREL_PCREL34
),
2178 MAP64 ("got@dtprel@pcrel", BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
),
2179 MAP64 ("higher34", BFD_RELOC_PPC64_ADDR16_HIGHER34
),
2180 MAP64 ("highera34", BFD_RELOC_PPC64_ADDR16_HIGHERA34
),
2181 MAP64 ("highest34", BFD_RELOC_PPC64_ADDR16_HIGHEST34
),
2182 MAP64 ("highesta34", BFD_RELOC_PPC64_ADDR16_HIGHESTA34
),
2183 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2187 return BFD_RELOC_NONE
;
2189 for (ch
= *str
, str2
= ident
;
2190 (str2
< ident
+ sizeof (ident
) - 1
2191 && (ISALNUM (ch
) || ch
== '@'));
2194 *str2
++ = TOLOWER (ch
);
2201 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2202 if (ch
== ptr
->string
[0]
2203 && len
== ptr
->length
2204 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2205 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2207 int reloc
= ptr
->reloc
;
2209 if (!ppc_obj64
&& (exp_p
->X_op
== O_big
|| exp_p
->X_add_number
!= 0))
2213 case BFD_RELOC_16_GOTOFF
:
2214 case BFD_RELOC_LO16_GOTOFF
:
2215 case BFD_RELOC_HI16_GOTOFF
:
2216 case BFD_RELOC_HI16_S_GOTOFF
:
2217 as_warn (_("symbol+offset@%s means symbol@%s+offset"),
2218 ptr
->string
, ptr
->string
);
2221 case BFD_RELOC_PPC_GOT_TLSGD16
:
2222 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2223 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2224 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2225 case BFD_RELOC_PPC_GOT_TLSLD16
:
2226 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2227 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2228 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2229 case BFD_RELOC_PPC_GOT_DTPREL16
:
2230 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2231 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2232 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2233 case BFD_RELOC_PPC_GOT_TPREL16
:
2234 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2235 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2236 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2237 as_bad (_("symbol+offset@%s not supported"), ptr
->string
);
2242 /* Now check for identifier@suffix+constant. */
2243 if (*str
== '-' || *str
== '+')
2245 char *orig_line
= input_line_pointer
;
2246 expressionS new_exp
;
2248 input_line_pointer
= str
;
2249 expression (&new_exp
);
2250 if (new_exp
.X_op
== O_constant
&& exp_p
->X_op
!= O_big
)
2252 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2253 str
= input_line_pointer
;
2255 input_line_pointer
= orig_line
;
2259 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2260 && exp_p
->X_op
== O_symbol
2261 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2263 /* Change the symbol so that the dummy .TOC. symbol can be
2264 omitted from the object file. */
2265 exp_p
->X_add_symbol
= &abs_symbol
;
2268 if (reloc
== BFD_RELOC_PPC64_REL24_NOTOC
2269 && (ppc_cpu
& PPC_OPCODE_POWER10
) == 0)
2270 reloc
= BFD_RELOC_PPC64_REL24_P9NOTOC
;
2272 return (bfd_reloc_code_real_type
) reloc
;
2275 return BFD_RELOC_NONE
;
2278 /* Support @got, etc. on constants emitted via .short, .int etc. */
2280 bfd_reloc_code_real_type
2281 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2284 if (nbytes
>= 2 && *input_line_pointer
== '@')
2285 return ppc_elf_suffix (&input_line_pointer
, exp
);
2286 return BFD_RELOC_NONE
;
2289 /* Warn when emitting data to code sections, unless we are emitting
2290 a relocation that ld --ppc476-workaround uses to recognise data
2291 *and* there was an unconditional branch prior to the data. */
2294 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2295 unsigned int nbytes
, fixS
*fix
)
2298 && (now_seg
->flags
& SEC_CODE
) != 0
2301 || !(fix
->fx_r_type
== BFD_RELOC_32
2302 || fix
->fx_r_type
== BFD_RELOC_CTOR
2303 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2304 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2305 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2306 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2307 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2308 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2309 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2310 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2312 /* Flag that we've warned. */
2316 as_warn (_("data in executable section"));
2320 /* Solaris pseduo op to change to the .rodata section. */
2322 ppc_elf_rdata (int xxx
)
2324 char *save_line
= input_line_pointer
;
2325 static char section
[] = ".rodata\n";
2327 /* Just pretend this is .section .rodata */
2328 input_line_pointer
= section
;
2329 obj_elf_section (xxx
);
2331 input_line_pointer
= save_line
;
2334 /* Pseudo op to make file scope bss items. */
2336 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2349 c
= get_symbol_name (&name
);
2351 /* Just after name is now '\0'. */
2352 p
= input_line_pointer
;
2354 SKIP_WHITESPACE_AFTER_NAME ();
2355 if (*input_line_pointer
!= ',')
2357 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2358 ignore_rest_of_line ();
2362 input_line_pointer
++; /* skip ',' */
2363 if ((size
= get_absolute_expression ()) < 0)
2365 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2366 ignore_rest_of_line ();
2370 /* The third argument to .lcomm is the alignment. */
2371 if (*input_line_pointer
!= ',')
2375 ++input_line_pointer
;
2376 align
= get_absolute_expression ();
2379 as_warn (_("ignoring bad alignment"));
2385 symbolP
= symbol_find_or_make (name
);
2388 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2390 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2391 S_GET_NAME (symbolP
));
2392 ignore_rest_of_line ();
2396 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2398 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2399 S_GET_NAME (symbolP
),
2400 (long) S_GET_VALUE (symbolP
),
2403 ignore_rest_of_line ();
2409 old_subsec
= now_subseg
;
2412 /* Convert to a power of 2 alignment. */
2413 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2416 as_bad (_("common alignment not a power of 2"));
2417 ignore_rest_of_line ();
2424 record_alignment (bss_section
, align2
);
2425 subseg_set (bss_section
, 1);
2427 frag_align (align2
, 0, 0);
2428 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2429 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2430 symbol_set_frag (symbolP
, frag_now
);
2431 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2434 S_SET_SIZE (symbolP
, size
);
2435 S_SET_SEGMENT (symbolP
, bss_section
);
2436 subseg_set (old_sec
, old_subsec
);
2437 demand_empty_rest_of_line ();
2440 /* Pseudo op to set symbol local entry point. */
2442 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2445 char c
= get_symbol_name (&name
);
2450 elf_symbol_type
*elfsym
;
2452 p
= input_line_pointer
;
2454 SKIP_WHITESPACE_AFTER_NAME ();
2455 if (*input_line_pointer
!= ',')
2458 as_bad (_("expected comma after name `%s' in .localentry directive"),
2461 ignore_rest_of_line ();
2464 input_line_pointer
++;
2466 if (exp
.X_op
== O_absent
)
2468 as_bad (_("missing expression in .localentry directive"));
2469 exp
.X_op
= O_constant
;
2470 exp
.X_add_number
= 0;
2473 sym
= symbol_find_or_make (name
);
2476 if (resolve_expression (&exp
)
2477 && exp
.X_op
== O_constant
)
2479 unsigned int encoded
, ok
;
2482 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2483 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2486 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2487 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2489 as_bad (_(".localentry expression for `%s' "
2490 "is not a valid power of 2"), S_GET_NAME (sym
));
2496 bfdsym
= symbol_get_bfdsym (sym
);
2497 elfsym
= elf_symbol_from (bfdsym
);
2498 gas_assert (elfsym
);
2499 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2500 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2501 if (ppc_abiversion
== 0)
2506 as_bad (_(".localentry expression for `%s' "
2507 "does not evaluate to a constant"), S_GET_NAME (sym
));
2509 demand_empty_rest_of_line ();
2512 /* Pseudo op to set ABI version. */
2514 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2519 if (exp
.X_op
== O_absent
)
2521 as_bad (_("missing expression in .abiversion directive"));
2522 exp
.X_op
= O_constant
;
2523 exp
.X_add_number
= 0;
2526 if (resolve_expression (&exp
)
2527 && exp
.X_op
== O_constant
)
2528 ppc_abiversion
= exp
.X_add_number
;
2530 as_bad (_(".abiversion expression does not evaluate to a constant"));
2531 demand_empty_rest_of_line ();
2534 /* Parse a .gnu_attribute directive. */
2536 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2538 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2540 /* Check validity of defined powerpc tags. */
2541 if (tag
== Tag_GNU_Power_ABI_FP
2542 || tag
== Tag_GNU_Power_ABI_Vector
2543 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2547 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2549 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2550 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2551 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2552 as_warn (_("unknown .gnu_attribute value"));
2556 /* Set ABI version in output file. */
2560 if (ppc_obj64
&& ppc_abiversion
!= 0)
2562 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2563 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2565 /* Any selection of opcodes based on ppc_cpu after gas has finished
2566 parsing the file is invalid. md_apply_fix and ppc_handle_align
2567 must select opcodes based on the machine in force at the point
2568 where the fixup or alignment frag was created, not the machine in
2569 force at the end of file. */
2573 /* Validate any relocations emitted for -mrelocatable, possibly adding
2574 fixups for word relocations in writable segments, so we can adjust
2577 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2579 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2588 case SHLIB_MRELOCATABLE
:
2589 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2590 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2591 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2592 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2593 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2594 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2595 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2596 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2597 && (seg
->flags
& SEC_LOAD
) != 0
2598 && strcmp (segment_name (seg
), ".got2") != 0
2599 && strcmp (segment_name (seg
), ".dtors") != 0
2600 && strcmp (segment_name (seg
), ".ctors") != 0
2601 && strcmp (segment_name (seg
), ".fixup") != 0
2602 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2603 && strcmp (segment_name (seg
), ".eh_frame") != 0
2604 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2606 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2607 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2609 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2610 _("relocation cannot be done when using -mrelocatable"));
2617 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2618 function descriptor sym if the corresponding code sym is used. */
2621 ppc_frob_file_before_adjust (void)
2629 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2635 name
= S_GET_NAME (symp
);
2639 if (! S_IS_WEAK (symp
)
2640 || S_IS_DEFINED (symp
))
2643 dotname
= concat (".", name
, (char *) NULL
);
2644 dotsym
= symbol_find_noref (dotname
, 1);
2646 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2647 || symbol_used_in_reloc_p (dotsym
)))
2648 symbol_mark_used (symp
);
2652 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2654 && toc_reloc_types
!= has_large_toc_reloc
2655 && bfd_section_size (toc
) > 0x10000)
2656 as_warn (_("TOC section size exceeds 64k"));
2659 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2660 emitted. Other uses of .TOC. will cause the symbol to be marked
2661 with BSF_KEEP in md_apply_fix. */
2664 ppc_elf_adjust_symtab (void)
2669 symp
= symbol_find (".TOC.");
2672 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2673 if ((bsym
->flags
& BSF_KEEP
) == 0)
2674 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2678 #endif /* OBJ_ELF */
2681 /* Parse XCOFF relocations. */
2682 static bfd_reloc_code_real_type
2683 ppc_xcoff_suffix (char **str_p
)
2687 unsigned int length
: 8;
2688 unsigned int valid32
: 1;
2689 unsigned int valid64
: 1;
2698 const struct map_bfd
*ptr
;
2700 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2701 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2702 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2704 static const struct map_bfd mapping
[] = {
2705 MAP ("l", BFD_RELOC_PPC_TOC16_LO
),
2706 MAP ("u", BFD_RELOC_PPC_TOC16_HI
),
2707 MAP32 ("ie", BFD_RELOC_PPC_TLSIE
),
2708 MAP32 ("ld", BFD_RELOC_PPC_TLSLD
),
2709 MAP32 ("le", BFD_RELOC_PPC_TLSLE
),
2710 MAP32 ("m", BFD_RELOC_PPC_TLSM
),
2711 MAP32 ("ml", BFD_RELOC_PPC_TLSML
),
2712 MAP64 ("ie", BFD_RELOC_PPC64_TLSIE
),
2713 MAP64 ("ld", BFD_RELOC_PPC64_TLSLD
),
2714 MAP64 ("le", BFD_RELOC_PPC64_TLSLE
),
2715 MAP64 ("m", BFD_RELOC_PPC64_TLSM
),
2716 MAP64 ("ml", BFD_RELOC_PPC64_TLSML
),
2720 return BFD_RELOC_NONE
;
2722 for (ch
= *str
, str2
= ident
;
2723 (str2
< ident
+ sizeof (ident
) - 1
2724 && (ISALNUM (ch
) || ch
== '@'));
2727 *str2
++ = TOLOWER (ch
);
2734 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2735 if (ch
== ptr
->string
[0]
2736 && len
== ptr
->length
2737 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2738 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2741 return (bfd_reloc_code_real_type
) ptr
->reloc
;
2744 return BFD_RELOC_NONE
;
2747 /* Restore XCOFF addis instruction to ELF format.
2748 AIX often generates addis instructions using "addis RT,D(RA)"
2749 format instead of the ELF "addis RT,RA,SI" one.
2750 On entry RT_E is at the comma after RT, D_E is at the open
2751 parenthesis after D, and RA_E is at the close parenthesis after RA. */
2753 ppc_xcoff_fixup_addis (char *rt_e
, char *d_e
, char *ra_e
)
2755 size_t ra_size
= ra_e
- d_e
- 1;
2756 char *save_ra
= xmalloc (ra_size
);
2759 memcpy (save_ra
, d_e
+ 1, ra_size
);
2760 /* Shuffle D to make room for RA, copying the comma too. */
2761 memmove (rt_e
+ ra_size
+ 1, rt_e
, d_e
- rt_e
);
2762 /* Erase the trailing ')', keeping any rubbish for potential errors. */
2763 memmove (ra_e
, ra_e
+ 1, strlen (ra_e
));
2764 /* Write RA back. */
2765 memcpy (rt_e
+ 1, save_ra
, ra_size
);
2769 /* Support @ie, etc. on constants emitted via .short, .int etc. */
2771 bfd_reloc_code_real_type
2772 ppc_xcoff_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2775 if (nbytes
>= 2 && *input_line_pointer
== '@')
2776 return ppc_xcoff_suffix (&input_line_pointer
);
2778 /* There isn't any @ symbol for default TLS relocations (R_TLS). */
2779 if (exp
->X_add_symbol
!= NULL
2780 && (symbol_get_tc (exp
->X_add_symbol
)->symbol_class
== XMC_TL
2781 || symbol_get_tc (exp
->X_add_symbol
)->symbol_class
== XMC_UL
))
2782 return (ppc_obj64
? BFD_RELOC_PPC64_TLSGD
: BFD_RELOC_PPC_TLSGD
);
2784 return BFD_RELOC_NONE
;
2787 #endif /* OBJ_XCOFF */
2789 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2790 /* See whether a symbol is in the TOC section. */
2793 ppc_is_toc_sym (symbolS
*sym
)
2796 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2797 || symbol_get_tc (sym
)->symbol_class
== XMC_TE
2798 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2801 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2803 return strcmp (sname
, ".toc") == 0;
2805 return strcmp (sname
, ".got") == 0;
2808 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2812 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2814 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2818 /* Check we don't already exist. */
2819 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2820 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2823 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2825 if (ppc_apuinfo_num_alloc
== 0)
2827 ppc_apuinfo_num_alloc
= 4;
2828 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2832 ppc_apuinfo_num_alloc
+= 4;
2833 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2834 ppc_apuinfo_num_alloc
);
2837 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2842 /* Various frobbings of labels and their addresses. */
2844 /* Symbols labelling the current insn. */
2845 struct insn_label_list
2847 struct insn_label_list
*next
;
2851 static struct insn_label_list
*insn_labels
;
2852 static struct insn_label_list
*free_insn_labels
;
2855 ppc_record_label (symbolS
*sym
)
2857 struct insn_label_list
*l
;
2859 if (free_insn_labels
== NULL
)
2860 l
= XNEW (struct insn_label_list
);
2863 l
= free_insn_labels
;
2864 free_insn_labels
= l
->next
;
2868 l
->next
= insn_labels
;
2873 ppc_clear_labels (void)
2875 while (insn_labels
!= NULL
)
2877 struct insn_label_list
*l
= insn_labels
;
2878 insn_labels
= l
->next
;
2879 l
->next
= free_insn_labels
;
2880 free_insn_labels
= l
;
2885 ppc_start_line_hook (void)
2887 ppc_clear_labels ();
2891 ppc_new_dot_label (symbolS
*sym
)
2893 ppc_record_label (sym
);
2895 /* Anchor this label to the current csect for relocations. */
2896 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2901 ppc_frob_label (symbolS
*sym
)
2903 ppc_record_label (sym
);
2906 /* Set the class of a label based on where it is defined. This handles
2907 symbols without suffixes. Also, move the symbol so that it follows
2908 the csect symbol. */
2909 if (ppc_current_csect
!= (symbolS
*) NULL
)
2911 if (symbol_get_tc (sym
)->symbol_class
== -1)
2912 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
2914 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
2915 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
2916 &symbol_rootP
, &symbol_lastP
);
2917 /* Update last csect symbol. */
2918 symbol_get_tc (ppc_current_csect
)->within
= sym
;
2920 /* Some labels like .bs are using within differently.
2921 So avoid changing it, if it's already set. */
2922 if (symbol_get_tc (sym
)->within
== NULL
)
2923 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2928 dwarf2_emit_label (sym
);
2932 /* We need to keep a list of fixups. We can't simply generate them as
2933 we go, because that would require us to first create the frag, and
2934 that would screw up references to ``.''. */
2940 bfd_reloc_code_real_type reloc
;
2943 #define MAX_INSN_FIXUPS (5)
2945 /* Return the field size operated on by RELOC, and whether it is
2946 pc-relative in PC_RELATIVE. */
2949 fixup_size (bfd_reloc_code_real_type reloc
, bool *pc_relative
)
2951 unsigned int size
= 0;
2956 /* This switch statement must handle all BFD_RELOC values
2957 possible in instruction fixups. As is, it handles all
2958 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
2959 bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
2960 Overkill since data and marker relocs need not be handled
2961 here, but this way we can be sure a needed fixup reloc isn't
2962 accidentally omitted. */
2963 case BFD_RELOC_PPC_EMB_MRKREF
:
2964 case BFD_RELOC_VTABLE_ENTRY
:
2965 case BFD_RELOC_VTABLE_INHERIT
:
2973 case BFD_RELOC_16_BASEREL
:
2974 case BFD_RELOC_16_GOTOFF
:
2975 case BFD_RELOC_GPREL16
:
2976 case BFD_RELOC_HI16
:
2977 case BFD_RELOC_HI16_BASEREL
:
2978 case BFD_RELOC_HI16_GOTOFF
:
2979 case BFD_RELOC_HI16_PLTOFF
:
2980 case BFD_RELOC_HI16_S
:
2981 case BFD_RELOC_HI16_S_BASEREL
:
2982 case BFD_RELOC_HI16_S_GOTOFF
:
2983 case BFD_RELOC_HI16_S_PLTOFF
:
2984 case BFD_RELOC_LO16
:
2985 case BFD_RELOC_LO16_BASEREL
:
2986 case BFD_RELOC_LO16_GOTOFF
:
2987 case BFD_RELOC_LO16_PLTOFF
:
2988 case BFD_RELOC_PPC64_ADDR16_DS
:
2989 case BFD_RELOC_PPC64_ADDR16_HIGH
:
2990 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
2991 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
2992 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
2993 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
2994 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
2995 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
2996 case BFD_RELOC_PPC64_DTPREL16_DS
:
2997 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
2998 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
2999 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
3000 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
3001 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
3002 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
3003 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
3004 case BFD_RELOC_PPC64_GOT16_DS
:
3005 case BFD_RELOC_PPC64_GOT16_LO_DS
:
3006 case BFD_RELOC_PPC64_HIGHER
:
3007 case BFD_RELOC_PPC64_HIGHER_S
:
3008 case BFD_RELOC_PPC64_HIGHEST
:
3009 case BFD_RELOC_PPC64_HIGHEST_S
:
3010 case BFD_RELOC_PPC64_PLT16_LO_DS
:
3011 case BFD_RELOC_PPC64_PLTGOT16
:
3012 case BFD_RELOC_PPC64_PLTGOT16_DS
:
3013 case BFD_RELOC_PPC64_PLTGOT16_HA
:
3014 case BFD_RELOC_PPC64_PLTGOT16_HI
:
3015 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3016 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
3017 case BFD_RELOC_PPC64_SECTOFF_DS
:
3018 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
3019 case BFD_RELOC_PPC64_TOC16_DS
:
3020 case BFD_RELOC_PPC64_TOC16_HA
:
3021 case BFD_RELOC_PPC64_TOC16_HI
:
3022 case BFD_RELOC_PPC64_TOC16_LO
:
3023 case BFD_RELOC_PPC64_TOC16_LO_DS
:
3024 case BFD_RELOC_PPC64_TPREL16_DS
:
3025 case BFD_RELOC_PPC64_TPREL16_HIGH
:
3026 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
3027 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
3028 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
3029 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
3030 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
3031 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
3033 case BFD_RELOC_PPC_BA16
:
3035 case BFD_RELOC_PPC_DTPREL16
:
3036 case BFD_RELOC_PPC_DTPREL16_HA
:
3037 case BFD_RELOC_PPC_DTPREL16_HI
:
3038 case BFD_RELOC_PPC_DTPREL16_LO
:
3039 case BFD_RELOC_PPC_EMB_NADDR16
:
3040 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
3041 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
3042 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
3043 case BFD_RELOC_PPC_EMB_RELSDA
:
3044 case BFD_RELOC_PPC_EMB_RELSEC16
:
3045 case BFD_RELOC_PPC_EMB_RELST_LO
:
3046 case BFD_RELOC_PPC_EMB_RELST_HI
:
3047 case BFD_RELOC_PPC_EMB_RELST_HA
:
3048 case BFD_RELOC_PPC_EMB_SDA2I16
:
3049 case BFD_RELOC_PPC_EMB_SDA2REL
:
3050 case BFD_RELOC_PPC_EMB_SDAI16
:
3051 case BFD_RELOC_PPC_GOT_DTPREL16
:
3052 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
3053 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
3054 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3055 case BFD_RELOC_PPC_GOT_TLSGD16
:
3056 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
3057 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
3058 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
3059 case BFD_RELOC_PPC_GOT_TLSLD16
:
3060 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
3061 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
3062 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
3063 case BFD_RELOC_PPC_GOT_TPREL16
:
3064 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
3065 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
3066 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3067 case BFD_RELOC_PPC_TOC16
:
3068 case BFD_RELOC_PPC_TOC16_HI
:
3069 case BFD_RELOC_PPC_TOC16_LO
:
3070 case BFD_RELOC_PPC_TPREL16
:
3071 case BFD_RELOC_PPC_TPREL16_HA
:
3072 case BFD_RELOC_PPC_TPREL16_HI
:
3073 case BFD_RELOC_PPC_TPREL16_LO
:
3077 case BFD_RELOC_16_PCREL
:
3078 case BFD_RELOC_HI16_PCREL
:
3079 case BFD_RELOC_HI16_S_PCREL
:
3080 case BFD_RELOC_LO16_PCREL
:
3081 case BFD_RELOC_PPC64_REL16_HIGH
:
3082 case BFD_RELOC_PPC64_REL16_HIGHA
:
3083 case BFD_RELOC_PPC64_REL16_HIGHER
:
3084 case BFD_RELOC_PPC64_REL16_HIGHER34
:
3085 case BFD_RELOC_PPC64_REL16_HIGHERA
:
3086 case BFD_RELOC_PPC64_REL16_HIGHERA34
:
3087 case BFD_RELOC_PPC64_REL16_HIGHEST
:
3088 case BFD_RELOC_PPC64_REL16_HIGHEST34
:
3089 case BFD_RELOC_PPC64_REL16_HIGHESTA
:
3090 case BFD_RELOC_PPC64_REL16_HIGHESTA34
:
3092 case BFD_RELOC_PPC_B16
:
3094 case BFD_RELOC_PPC_VLE_REL8
:
3100 case BFD_RELOC_32_PLTOFF
:
3102 case BFD_RELOC_CTOR
:
3104 case BFD_RELOC_PPC64_ENTRY
:
3105 case BFD_RELOC_PPC_16DX_HA
:
3107 case BFD_RELOC_PPC_BA16
:
3109 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
3110 case BFD_RELOC_PPC_BA16_BRTAKEN
:
3111 case BFD_RELOC_PPC_BA26
:
3112 case BFD_RELOC_PPC_EMB_BIT_FLD
:
3113 case BFD_RELOC_PPC_EMB_NADDR32
:
3114 case BFD_RELOC_PPC_EMB_SDA21
:
3115 case BFD_RELOC_PPC_TLS
:
3116 case BFD_RELOC_PPC_TLSGD
:
3117 case BFD_RELOC_PPC_TLSLD
:
3118 case BFD_RELOC_PPC_TLSLE
:
3119 case BFD_RELOC_PPC_TLSIE
:
3120 case BFD_RELOC_PPC_TLSM
:
3121 case BFD_RELOC_PPC_TLSML
:
3122 case BFD_RELOC_PPC_VLE_HA16A
:
3123 case BFD_RELOC_PPC_VLE_HA16D
:
3124 case BFD_RELOC_PPC_VLE_HI16A
:
3125 case BFD_RELOC_PPC_VLE_HI16D
:
3126 case BFD_RELOC_PPC_VLE_LO16A
:
3127 case BFD_RELOC_PPC_VLE_LO16D
:
3128 case BFD_RELOC_PPC_VLE_SDA21
:
3129 case BFD_RELOC_PPC_VLE_SDA21_LO
:
3130 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3131 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
3132 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3133 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
3134 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3135 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
3136 case BFD_RELOC_PPC64_TLS_PCREL
:
3141 case BFD_RELOC_24_PLT_PCREL
:
3142 case BFD_RELOC_32_PCREL
:
3143 case BFD_RELOC_32_PLT_PCREL
:
3144 case BFD_RELOC_PPC64_REL24_NOTOC
:
3145 case BFD_RELOC_PPC64_REL24_P9NOTOC
:
3147 case BFD_RELOC_PPC_B16
:
3149 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3150 case BFD_RELOC_PPC_B16_BRTAKEN
:
3151 case BFD_RELOC_PPC_B26
:
3152 case BFD_RELOC_PPC_LOCAL24PC
:
3153 case BFD_RELOC_PPC_REL16DX_HA
:
3154 case BFD_RELOC_PPC_VLE_REL15
:
3155 case BFD_RELOC_PPC_VLE_REL24
:
3161 case BFD_RELOC_CTOR
:
3163 case BFD_RELOC_PPC_COPY
:
3164 case BFD_RELOC_PPC_DTPMOD
:
3165 case BFD_RELOC_PPC_DTPREL
:
3166 case BFD_RELOC_PPC_GLOB_DAT
:
3167 case BFD_RELOC_PPC_TPREL
:
3168 size
= ppc_obj64
? 8 : 4;
3172 case BFD_RELOC_64_PLTOFF
:
3173 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
3174 case BFD_RELOC_PPC64_D28
:
3175 case BFD_RELOC_PPC64_D34
:
3176 case BFD_RELOC_PPC64_D34_LO
:
3177 case BFD_RELOC_PPC64_D34_HI30
:
3178 case BFD_RELOC_PPC64_D34_HA30
:
3179 case BFD_RELOC_PPC64_TPREL34
:
3180 case BFD_RELOC_PPC64_DTPREL34
:
3181 case BFD_RELOC_PPC64_TOC
:
3182 case BFD_RELOC_PPC64_TLSGD
:
3183 case BFD_RELOC_PPC64_TLSLD
:
3184 case BFD_RELOC_PPC64_TLSLE
:
3185 case BFD_RELOC_PPC64_TLSIE
:
3186 case BFD_RELOC_PPC64_TLSM
:
3187 case BFD_RELOC_PPC64_TLSML
:
3191 case BFD_RELOC_64_PCREL
:
3192 case BFD_RELOC_64_PLT_PCREL
:
3193 case BFD_RELOC_PPC64_GOT_PCREL34
:
3194 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
3195 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
3196 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
3197 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
3198 case BFD_RELOC_PPC64_PCREL28
:
3199 case BFD_RELOC_PPC64_PCREL34
:
3200 case BFD_RELOC_PPC64_PLT_PCREL34
:
3209 if (ENABLE_CHECKING
)
3211 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
3212 if (reloc_howto
!= NULL
3213 && (size
!= bfd_get_reloc_size (reloc_howto
)
3214 || pcrel
!= reloc_howto
->pc_relative
))
3216 as_bad (_("%s howto doesn't match size/pcrel in gas"),
3221 *pc_relative
= pcrel
;
3226 /* If we have parsed a call to __tls_get_addr, parse an argument like
3227 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg
3228 is successfully parsed, *STR is updated past the trailing
3229 parenthesis and trailing white space, and *TLS_FIX contains the
3230 reloc and arg expression. */
3233 parse_tls_arg (char **str
, const expressionS
*exp
, struct ppc_fixup
*tls_fix
)
3235 const char *sym_name
= S_GET_NAME (exp
->X_add_symbol
);
3236 if (sym_name
[0] == '.')
3239 tls_fix
->reloc
= BFD_RELOC_NONE
;
3240 if (strncasecmp (sym_name
, "__tls_get_addr", 14) == 0
3241 && (sym_name
[14] == 0
3242 || strcasecmp (sym_name
+ 14, "_desc") == 0
3243 || strcasecmp (sym_name
+ 14, "_opt") == 0))
3245 char *hold
= input_line_pointer
;
3246 input_line_pointer
= *str
+ 1;
3247 expression (&tls_fix
->exp
);
3248 if (tls_fix
->exp
.X_op
== O_symbol
)
3250 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3251 tls_fix
->reloc
= BFD_RELOC_PPC_TLSGD
;
3252 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3253 tls_fix
->reloc
= BFD_RELOC_PPC_TLSLD
;
3254 if (tls_fix
->reloc
!= BFD_RELOC_NONE
)
3256 input_line_pointer
+= 7;
3258 *str
= input_line_pointer
;
3261 input_line_pointer
= hold
;
3263 return tls_fix
->reloc
!= BFD_RELOC_NONE
;
3267 /* This routine is called for each instruction to be assembled. */
3270 md_assemble (char *str
)
3273 const struct powerpc_opcode
*opcode
;
3275 const unsigned char *opindex_ptr
;
3278 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
3283 unsigned int insn_length
;
3285 /* Get the opcode. */
3286 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
3291 /* Look up the opcode in the hash table. */
3292 opcode
= (const struct powerpc_opcode
*) str_hash_find (ppc_hash
, str
);
3293 if (opcode
== (const struct powerpc_opcode
*) NULL
)
3295 const struct powerpc_macro
*macro
;
3297 macro
= (const struct powerpc_macro
*) str_hash_find (ppc_macro_hash
,
3299 if (macro
== (const struct powerpc_macro
*) NULL
)
3300 as_bad (_("unrecognized opcode: `%s'"), str
);
3302 ppc_macro (s
, macro
);
3304 ppc_clear_labels ();
3308 insn
= opcode
->opcode
;
3309 if (!target_big_endian
3310 && ((insn
& ~(1 << 26)) == 46u << 26
3311 || (insn
& ~(0xc0 << 1)) == (31u << 26 | 533 << 1)))
3313 /* lmw, stmw, lswi, lswx, stswi, stswx */
3314 as_bad (_("`%s' invalid when little-endian"), str
);
3315 ppc_clear_labels ();
3320 while (ISSPACE (*str
))
3324 /* AIX often generates addis instructions using "addis RT, D(RA)"
3325 format instead of the classic "addis RT, RA, SI" one.
3326 Restore it to the default format as it's the one encoded
3328 if (!strcmp (opcode
->name
, "addis"))
3330 char *rt_e
= strchr (str
, ',');
3332 && strchr (rt_e
+ 1, ',') == NULL
)
3334 char *d_e
= strchr (rt_e
+ 1, '(');
3335 if (d_e
!= NULL
&& d_e
!= rt_e
+ 1)
3337 char *ra_e
= strrchr (d_e
+ 1, ')');
3338 if (ra_e
!= NULL
&& ra_e
!= d_e
+ 1)
3339 ppc_xcoff_fixup_addis (rt_e
, d_e
, ra_e
);
3345 /* PowerPC operands are just expressions. The only real issue is
3346 that a few operand types are optional. If an instruction has
3347 multiple optional operands and one is omitted, then all optional
3348 operands past the first omitted one must also be omitted. */
3349 int num_optional_operands
= 0;
3350 int num_optional_provided
= 0;
3352 /* Gather the operands. */
3356 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
3358 const struct powerpc_operand
*operand
;
3364 if (next_opindex
== 0)
3365 operand
= &powerpc_operands
[*opindex_ptr
];
3368 operand
= &powerpc_operands
[next_opindex
];
3373 /* If this is an optional operand, and we are skipping it, just
3374 insert the default value, usually a zero. */
3375 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3376 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
3378 if (num_optional_operands
== 0)
3380 const unsigned char *optr
;
3386 for (optr
= opindex_ptr
; *optr
!= 0; optr
++)
3388 const struct powerpc_operand
*op
;
3389 op
= &powerpc_operands
[*optr
];
3393 if ((op
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3394 && !((op
->flags
& PPC_OPERAND_OPTIONAL32
) != 0
3396 ++num_optional_operands
;
3398 if (s
!= NULL
&& *s
!= '\0')
3402 /* Look for the start of the next operand. */
3403 if ((op
->flags
& PPC_OPERAND_PARENS
) != 0)
3404 s
= strpbrk (s
, "(,");
3406 s
= strchr (s
, ',');
3412 omitted
= total
- provided
;
3413 num_optional_provided
= num_optional_operands
- omitted
;
3415 if (--num_optional_provided
< 0)
3417 uint64_t val
= ppc_optional_operand_value (operand
, insn
, ppc_cpu
,
3418 num_optional_provided
);
3419 if (operand
->insert
)
3421 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
3422 if (errmsg
!= (const char *) NULL
)
3423 as_bad ("%s", errmsg
);
3425 else if (operand
->shift
>= 0)
3426 insn
|= (val
& operand
->bitm
) << operand
->shift
;
3428 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
3430 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
3431 next_opindex
= *opindex_ptr
+ 1;
3436 /* Gather the operand. */
3437 hold
= input_line_pointer
;
3438 input_line_pointer
= str
;
3441 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3442 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3443 || !register_name (&ex
))
3445 char save_lex
= lex_type
['%'];
3447 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3448 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3451 lex_type
['%'] |= LEX_BEGIN_NAME
;
3455 lex_type
['%'] = save_lex
;
3458 str
= input_line_pointer
;
3459 input_line_pointer
= hold
;
3461 if (ex
.X_op
== O_illegal
)
3462 as_bad (_("illegal operand"));
3463 else if (ex
.X_op
== O_absent
)
3464 as_bad (_("missing operand"));
3465 else if (ex
.X_op
== O_register
)
3469 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3470 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3471 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
| PPC_OPERAND_ACC
)) != 0
3472 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3473 && ex
.X_add_number
!= 0
3474 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3475 as_warn (_("invalid register expression"));
3476 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3477 ppc_cpu
, (char *) NULL
, 0);
3479 else if (ex
.X_op
== O_constant
3480 || (ex
.X_op
== O_big
&& ex
.X_add_number
> 0))
3483 if (ex
.X_op
== O_constant
)
3485 val
= ex
.X_add_number
;
3486 if (sizeof (ex
.X_add_number
) < sizeof (val
)
3487 && (ex
.X_add_number
< 0) != ex
.X_extrabit
)
3488 val
= val
^ ((addressT
) -1 ^ (uint64_t) -1);
3491 val
= generic_bignum_to_int64 ();
3493 /* Allow @HA, @L, @H on constants. */
3494 char *orig_str
= str
;
3495 bfd_reloc_code_real_type reloc
= ppc_elf_suffix (&str
, &ex
);
3497 if (ex
.X_op
== O_constant
)
3499 val
= ex
.X_add_number
;
3500 if (sizeof (ex
.X_add_number
) < sizeof (val
)
3501 && (ex
.X_add_number
< 0) != ex
.X_extrabit
)
3502 val
= val
^ ((addressT
) -1 ^ (uint64_t) -1);
3504 if (reloc
!= BFD_RELOC_NONE
)
3511 case BFD_RELOC_LO16
:
3513 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3517 case BFD_RELOC_HI16
:
3518 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3520 /* PowerPC64 @h is tested for overflow. */
3522 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3524 uint64_t sign
= (((uint64_t) -1 >> 16) + 1) >> 1;
3525 val
= (val
^ sign
) - sign
;
3531 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3533 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3537 case BFD_RELOC_HI16_S
:
3538 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3540 /* PowerPC64 @ha is tested for overflow. */
3541 val
= (val
+ 0x8000) >> 16;
3542 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3544 uint64_t sign
= (((uint64_t) -1 >> 16) + 1) >> 1;
3545 val
= (val
^ sign
) - sign
;
3551 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3553 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3557 case BFD_RELOC_PPC64_HIGHER
:
3558 val
= PPC_HIGHER (val
);
3559 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3563 case BFD_RELOC_PPC64_HIGHER_S
:
3564 val
= PPC_HIGHERA (val
);
3565 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3569 case BFD_RELOC_PPC64_HIGHEST
:
3570 val
= PPC_HIGHEST (val
);
3571 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3575 case BFD_RELOC_PPC64_HIGHEST_S
:
3576 val
= PPC_HIGHESTA (val
);
3577 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3581 #endif /* OBJ_ELF */
3582 insn
= ppc_insert_operand (insn
, operand
, val
, ppc_cpu
, NULL
, 0);
3586 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3588 /* Look for a __tls_get_addr arg using the insane old syntax. */
3589 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3590 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3592 fixups
[fc
].opindex
= *opindex_ptr
;
3596 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3598 /* If VLE-mode convert LO/HI/HA relocations. */
3599 if (opcode
->flags
& PPC_OPCODE_VLE
)
3601 uint64_t tmp_insn
= insn
& opcode
->mask
;
3603 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3604 || tmp_insn
== E_AND2I_DOT_INSN
3605 || tmp_insn
== E_OR2IS_INSN
3606 || tmp_insn
== E_LI_INSN
3607 || tmp_insn
== E_LIS_INSN
3608 || tmp_insn
== E_AND2IS_DOT_INSN
);
3611 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3612 || tmp_insn
== E_ADD2IS_INSN
3613 || tmp_insn
== E_CMP16I_INSN
3614 || tmp_insn
== E_MULL2I_INSN
3615 || tmp_insn
== E_CMPL16I_INSN
3616 || tmp_insn
== E_CMPH16I_INSN
3617 || tmp_insn
== E_CMPHL16I_INSN
);
3624 case BFD_RELOC_PPC_EMB_SDA21
:
3625 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3628 case BFD_RELOC_LO16
:
3630 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3631 else if (use_a_reloc
)
3632 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3635 case BFD_RELOC_HI16
:
3637 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3638 else if (use_a_reloc
)
3639 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3642 case BFD_RELOC_HI16_S
:
3644 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3645 else if (use_a_reloc
)
3646 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3649 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3651 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3654 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3656 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3659 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3661 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3666 /* TLS and other tweaks. */
3672 case BFD_RELOC_PPC_TLS
:
3673 case BFD_RELOC_PPC64_TLS_PCREL
:
3674 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3675 as_bad (_("@tls may not be used with \"%s\" operands"),
3677 else if (operand
->shift
!= 11)
3678 as_bad (_("@tls may only be used in last operand"));
3680 insn
= ppc_insert_operand (insn
, operand
,
3682 ppc_cpu
, (char *) NULL
, 0);
3685 /* We'll only use the 32 (or 64) bit form of these relocations
3686 in constants. Instructions get the 16 or 34 bit form. */
3687 case BFD_RELOC_PPC_DTPREL
:
3688 if (operand
->bitm
== 0x3ffffffffULL
)
3689 reloc
= BFD_RELOC_PPC64_DTPREL34
;
3691 reloc
= BFD_RELOC_PPC_DTPREL16
;
3694 case BFD_RELOC_PPC_TPREL
:
3695 if (operand
->bitm
== 0x3ffffffffULL
)
3696 reloc
= BFD_RELOC_PPC64_TPREL34
;
3698 reloc
= BFD_RELOC_PPC_TPREL16
;
3701 case BFD_RELOC_PPC64_PCREL34
:
3702 if (operand
->bitm
== 0xfffffffULL
)
3704 reloc
= BFD_RELOC_PPC64_PCREL28
;
3708 case BFD_RELOC_PPC64_GOT_PCREL34
:
3709 case BFD_RELOC_PPC64_PLT_PCREL34
:
3710 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
3711 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
3712 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
3713 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
3714 if (operand
->bitm
!= 0x3ffffffffULL
3715 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3716 as_warn (_("%s unsupported on this instruction"), "@pcrel");
3719 case BFD_RELOC_LO16
:
3720 if (operand
->bitm
== 0x3ffffffffULL
3721 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3722 reloc
= BFD_RELOC_PPC64_D34_LO
;
3723 else if ((operand
->bitm
| 0xf) != 0xffff
3724 || operand
->shift
!= 0
3725 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3726 as_warn (_("%s unsupported on this instruction"), "@l");
3729 case BFD_RELOC_HI16
:
3730 if (operand
->bitm
== 0x3ffffffffULL
3731 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3732 reloc
= BFD_RELOC_PPC64_D34_HI30
;
3733 else if (operand
->bitm
!= 0xffff
3734 || operand
->shift
!= 0
3735 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3736 as_warn (_("%s unsupported on this instruction"), "@h");
3739 case BFD_RELOC_HI16_S
:
3740 if (operand
->bitm
== 0x3ffffffffULL
3741 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3742 reloc
= BFD_RELOC_PPC64_D34_HA30
;
3743 else if (operand
->bitm
== 0xffff
3744 && operand
->shift
== (int) PPC_OPSHIFT_INV
3745 && opcode
->opcode
== (19 << 26) + (2 << 1))
3747 reloc
= BFD_RELOC_PPC_16DX_HA
;
3748 else if (operand
->bitm
!= 0xffff
3749 || operand
->shift
!= 0
3750 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3751 as_warn (_("%s unsupported on this instruction"), "@ha");
3754 #endif /* OBJ_ELF */
3756 reloc
= ppc_xcoff_suffix (&str
);
3757 #endif /* OBJ_XCOFF */
3759 if (reloc
!= BFD_RELOC_NONE
)
3761 /* Determine a BFD reloc value based on the operand information.
3762 We are only prepared to turn a few of the operands into
3764 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3765 | PPC_OPERAND_ABSOLUTE
)) != 0
3766 && operand
->bitm
== 0x3fffffc
3767 && operand
->shift
== 0)
3768 reloc
= BFD_RELOC_PPC_B26
;
3769 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3770 | PPC_OPERAND_ABSOLUTE
)) != 0
3771 && operand
->bitm
== 0xfffc
3772 && operand
->shift
== 0)
3773 reloc
= BFD_RELOC_PPC_B16
;
3774 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3775 && operand
->bitm
== 0x1fe
3776 && operand
->shift
== -1)
3777 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3778 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3779 && operand
->bitm
== 0xfffe
3780 && operand
->shift
== 0)
3781 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3782 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3783 && operand
->bitm
== 0x1fffffe
3784 && operand
->shift
== 0)
3785 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3786 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3787 && (operand
->bitm
& 0xfff0) == 0xfff0
3788 && operand
->shift
== 0)
3790 reloc
= BFD_RELOC_16
;
3791 #if defined OBJ_XCOFF || defined OBJ_ELF
3792 /* Note: the symbol may be not yet defined. */
3793 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3794 && ppc_is_toc_sym (ex
.X_add_symbol
))
3796 reloc
= BFD_RELOC_PPC_TOC16
;
3798 as_warn (_("assuming %s on symbol"),
3799 ppc_obj64
? "@toc" : "@xgot");
3804 else if (operand
->bitm
== 0x3ffffffffULL
)
3805 reloc
= BFD_RELOC_PPC64_D34
;
3806 else if (operand
->bitm
== 0xfffffffULL
)
3807 reloc
= BFD_RELOC_PPC64_D28
;
3809 /* For the absolute forms of branches, convert the PC
3810 relative form back into the absolute. */
3811 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3815 case BFD_RELOC_PPC_B26
:
3816 reloc
= BFD_RELOC_PPC_BA26
;
3818 case BFD_RELOC_PPC_B16
:
3819 reloc
= BFD_RELOC_PPC_BA16
;
3822 case BFD_RELOC_PPC_B16_BRTAKEN
:
3823 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3825 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3826 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3837 case BFD_RELOC_PPC_TOC16
:
3838 toc_reloc_types
|= has_small_toc_reloc
;
3840 case BFD_RELOC_PPC64_TOC16_LO
:
3841 case BFD_RELOC_PPC64_TOC16_HI
:
3842 case BFD_RELOC_PPC64_TOC16_HA
:
3843 toc_reloc_types
|= has_large_toc_reloc
;
3850 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3855 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3858 case BFD_RELOC_LO16
:
3859 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3862 case BFD_RELOC_16_GOTOFF
:
3863 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3866 case BFD_RELOC_LO16_GOTOFF
:
3867 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3870 case BFD_RELOC_LO16_PLTOFF
:
3871 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3874 case BFD_RELOC_16_BASEREL
:
3875 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3878 case BFD_RELOC_LO16_BASEREL
:
3879 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3882 case BFD_RELOC_PPC_TOC16
:
3883 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3886 case BFD_RELOC_PPC64_TOC16_LO
:
3887 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3890 case BFD_RELOC_PPC64_PLTGOT16
:
3891 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3894 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3895 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3898 case BFD_RELOC_PPC_DTPREL16
:
3899 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3902 case BFD_RELOC_PPC_DTPREL16_LO
:
3903 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3906 case BFD_RELOC_PPC_TPREL16
:
3907 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3910 case BFD_RELOC_PPC_TPREL16_LO
:
3911 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3914 case BFD_RELOC_PPC_GOT_DTPREL16
:
3915 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3916 case BFD_RELOC_PPC_GOT_TPREL16
:
3917 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3921 as_bad (_("unsupported relocation for DS offset field"));
3926 /* Look for a __tls_get_addr arg after any __tls_get_addr
3927 modifiers like @plt. This fixup must be emitted before
3928 the usual call fixup. */
3929 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3930 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3932 fixups
[fc
].opindex
= *opindex_ptr
;
3937 /* We need to generate a fixup for this expression. */
3938 if (fc
>= MAX_INSN_FIXUPS
)
3939 as_fatal (_("too many fixups"));
3940 fixups
[fc
].exp
= ex
;
3941 fixups
[fc
].opindex
= *opindex_ptr
;
3942 fixups
[fc
].reloc
= reloc
;
3950 /* If expecting more operands, then we want to see "),". */
3951 if (*str
== endc
&& opindex_ptr
[1] != 0)
3955 while (ISSPACE (*str
));
3959 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3964 /* The call to expression should have advanced str past any
3972 else if (*str
!= '\0')
3974 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3977 else if (endc
== ')')
3979 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
3984 while (ISSPACE (*str
))
3988 as_bad (_("junk at end of line: `%s'"), str
);
3991 /* Do we need/want an APUinfo section? */
3992 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
3995 /* These are all version "1". */
3996 if (opcode
->flags
& PPC_OPCODE_SPE
)
3997 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
3998 if (opcode
->flags
& PPC_OPCODE_ISEL
)
3999 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
4000 if (opcode
->flags
& PPC_OPCODE_EFS
)
4001 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
4002 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
4003 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
4004 if (opcode
->flags
& PPC_OPCODE_PMR
)
4005 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
4006 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
4007 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
4008 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
4009 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
4010 /* Only set the VLE flag if the instruction has been pulled via
4011 the VLE instruction set. This way the flag is guaranteed to
4012 be set for VLE-only instructions or for VLE-only processors,
4013 however it'll remain clear for dual-mode instructions on
4014 dual-mode and, more importantly, standard-mode processors. */
4015 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
4017 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
4018 if (elf_section_data (now_seg
) != NULL
)
4019 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
4024 /* Write out the instruction. */
4027 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
4028 /* All instructions can start on a 2 byte boundary for VLE. */
4031 if (frag_now
->insn_addr
!= addr_mask
)
4033 /* Don't emit instructions to a frag started for data, or for a
4034 CPU differing in VLE mode. Data is allowed to be misaligned,
4035 and it's possible to start a new frag in the middle of
4037 frag_wane (frag_now
);
4041 /* Check that insns within the frag are aligned. ppc_frag_check
4042 will ensure that the frag start address is aligned. */
4043 if ((frag_now_fix () & addr_mask
) != 0)
4044 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
4046 /* Differentiate between two, four, and eight byte insns. */
4048 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
4050 else if ((opcode
->flags
& PPC_OPCODE_POWER10
) != 0
4051 && PPC_PREFIX_P (insn
))
4053 struct insn_label_list
*l
;
4057 /* 8-byte prefix instructions are not allowed to cross 64-byte
4059 frag_align_code (6, 4);
4060 record_alignment (now_seg
, 6);
4062 /* Update alignment of the containing csect. */
4063 if (symbol_get_tc (ppc_current_csect
)->align
< 6)
4064 symbol_get_tc (ppc_current_csect
)->align
= 6;
4067 /* Update "dot" in any expressions used by this instruction, and
4068 a label attached to the instruction. By "attached" we mean
4069 on the same source line as the instruction and without any
4070 intervening semicolons. */
4071 dot_value
= frag_now_fix ();
4072 dot_frag
= frag_now
;
4073 for (l
= insn_labels
; l
!= NULL
; l
= l
->next
)
4075 symbol_set_frag (l
->label
, dot_frag
);
4076 S_SET_VALUE (l
->label
, dot_value
);
4080 ppc_clear_labels ();
4082 f
= frag_more (insn_length
);
4083 frag_now
->insn_addr
= addr_mask
;
4085 /* The prefix part of an 8-byte instruction always occupies the lower
4086 addressed word in a doubleword, regardless of endianness. */
4087 if (insn_length
== 8
4088 && (sizeof (insn
) > sizeof (valueT
) || !target_big_endian
))
4090 md_number_to_chars (f
, PPC_GET_PREFIX (insn
), 4);
4091 md_number_to_chars (f
+ 4, PPC_GET_SUFFIX (insn
), 4);
4094 md_number_to_chars (f
, insn
, insn_length
);
4098 last_subseg
= now_subseg
;
4101 dwarf2_emit_insn (insn_length
);
4104 /* Create any fixups. */
4105 for (i
= 0; i
< fc
; i
++)
4108 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
4111 unsigned int size
= fixup_size (fixups
[i
].reloc
, &pcrel
);
4112 int offset
= target_big_endian
? (insn_length
- size
) : 0;
4114 fixP
= fix_new_exp (frag_now
,
4115 f
- frag_now
->fr_literal
+ offset
,
4123 const struct powerpc_operand
*operand
;
4125 operand
= &powerpc_operands
[fixups
[i
].opindex
];
4126 fixP
= fix_new_exp (frag_now
,
4127 f
- frag_now
->fr_literal
,
4130 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
4133 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
4137 /* Handle a macro. Gather all the operands, transform them as
4138 described by the macro, and call md_assemble recursively. All the
4139 operands are separated by commas; we don't accept parentheses
4140 around operands here. */
4143 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
4154 /* Gather the users operands into the operands array. */
4159 if (count
>= sizeof operands
/ sizeof operands
[0])
4161 operands
[count
++] = s
;
4162 s
= strchr (s
, ',');
4163 if (s
== (char *) NULL
)
4168 if (count
!= macro
->operands
)
4170 as_bad (_("wrong number of operands"));
4174 /* Work out how large the string must be (the size is unbounded
4175 because it includes user input). */
4177 format
= macro
->format
;
4178 while (*format
!= '\0')
4187 arg
= strtol (format
+ 1, &send
, 10);
4188 know (send
!= format
&& arg
< count
);
4189 len
+= strlen (operands
[arg
]);
4194 /* Put the string together. */
4195 complete
= s
= XNEWVEC (char, len
+ 1);
4196 format
= macro
->format
;
4197 while (*format
!= '\0')
4203 arg
= strtol (format
+ 1, &send
, 10);
4204 strcpy (s
, operands
[arg
]);
4211 /* Assemble the constructed instruction. */
4212 md_assemble (complete
);
4217 /* For ELF, add support for SHT_ORDERED. */
4220 ppc_section_type (char *str
, size_t len
)
4222 if (len
== 7 && startswith (str
, "ordered"))
4229 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
4231 if (type
== SHT_ORDERED
)
4232 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
4238 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
4243 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
4246 #endif /* OBJ_ELF */
4249 /* Pseudo-op handling. */
4251 /* The .byte pseudo-op. This is similar to the normal .byte
4252 pseudo-op, but it can also take a single ASCII string. */
4255 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
4259 if (*input_line_pointer
!= '\"')
4265 /* Gather characters. A real double quote is doubled. Unusual
4266 characters are not permitted. */
4267 ++input_line_pointer
;
4272 c
= *input_line_pointer
++;
4276 if (*input_line_pointer
!= '\"')
4278 ++input_line_pointer
;
4281 FRAG_APPEND_1_CHAR (c
);
4285 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
4286 as_warn (_("data in executable section"));
4287 demand_empty_rest_of_line ();
4292 /* XCOFF specific pseudo-op handling. */
4294 /* This is set if we are creating a .stabx symbol, since we don't want
4295 to handle symbol suffixes for such symbols. */
4296 static bool ppc_stab_symbol
;
4298 /* Retrieve the visiblity input for pseudo-ops having ones. */
4299 static unsigned short
4300 ppc_xcoff_get_visibility (void) {
4303 if (startswith (input_line_pointer
, "exported"))
4305 input_line_pointer
+= 8;
4306 return SYM_V_EXPORTED
;
4309 if (startswith (input_line_pointer
, "hidden"))
4311 input_line_pointer
+= 6;
4312 return SYM_V_HIDDEN
;
4315 if (startswith (input_line_pointer
, "internal"))
4317 input_line_pointer
+= 8;
4318 return SYM_V_INTERNAL
;
4321 if (startswith (input_line_pointer
, "protected"))
4323 input_line_pointer
+= 9;
4324 return SYM_V_PROTECTED
;
4330 /* Retrieve visiblity using GNU syntax. */
4331 static void ppc_GNU_visibility (int visibility
) {
4335 coff_symbol_type
*coffsym
;
4339 if ((name
= read_symbol_name ()) == NULL
)
4341 symbolP
= symbol_find_or_make (name
);
4342 coffsym
= coffsymbol (symbol_get_bfdsym (symbolP
));
4344 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4345 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4347 c
= *input_line_pointer
;
4350 input_line_pointer
++;
4354 if (*input_line_pointer
== '\n')
4360 demand_empty_rest_of_line ();
4363 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
4364 symbols in the .bss segment as though they were local common
4365 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
4366 aligns .comm and .lcomm to 4 bytes.
4367 Symbols having a XMC_UL storage class are uninialized thread-local
4371 ppc_comm (int lcomm
)
4373 asection
*current_seg
= now_seg
;
4374 subsegT current_subseg
= now_subseg
;
4380 symbolS
*lcomm_sym
= NULL
;
4383 unsigned short visibility
;
4384 struct ppc_xcoff_section
*section
;
4386 endc
= get_symbol_name (&name
);
4387 end_name
= input_line_pointer
;
4388 (void) restore_line_pointer (endc
);
4390 if (*input_line_pointer
!= ',')
4392 as_bad (_("missing size"));
4393 ignore_rest_of_line ();
4396 ++input_line_pointer
;
4398 size
= get_absolute_expression ();
4401 as_bad (_("negative size"));
4402 ignore_rest_of_line ();
4408 /* The third argument to .comm is the alignment. */
4409 if (*input_line_pointer
!= ',')
4413 ++input_line_pointer
;
4414 align
= get_absolute_expression ();
4417 as_warn (_("ignoring bad alignment"));
4421 /* The fourth argument to .comm is the visibility. */
4422 if (*input_line_pointer
== ',')
4424 input_line_pointer
++;
4425 visibility
= ppc_xcoff_get_visibility ();
4428 as_bad (_("Unknown visibility field in .comm"));
4429 ignore_rest_of_line ();
4440 /* The third argument to .lcomm appears to be the real local
4441 common symbol to create. References to the symbol named in
4442 the first argument are turned into references to the third
4444 if (*input_line_pointer
!= ',')
4446 as_bad (_("missing real symbol name"));
4447 ignore_rest_of_line ();
4450 ++input_line_pointer
;
4452 lcomm_endc
= get_symbol_name (&lcomm_name
);
4454 lcomm_sym
= symbol_find_or_make (lcomm_name
);
4456 (void) restore_line_pointer (lcomm_endc
);
4458 /* The fourth argument to .lcomm is the alignment. */
4459 if (*input_line_pointer
!= ',')
4468 ++input_line_pointer
;
4469 align
= get_absolute_expression ();
4472 as_warn (_("ignoring bad alignment"));
4479 sym
= symbol_find_or_make (name
);
4482 if (S_IS_DEFINED (sym
)
4483 || S_GET_VALUE (sym
) != 0)
4485 as_bad (_("attempt to redefine symbol"));
4486 ignore_rest_of_line ();
4490 if (symbol_get_tc (sym
)->symbol_class
== XMC_UL
4491 || (lcomm
&& symbol_get_tc (lcomm_sym
)->symbol_class
== XMC_UL
))
4493 section
= &ppc_xcoff_tbss_section
;
4494 if (!ppc_xcoff_section_is_initialized (section
))
4496 ppc_init_xcoff_section (section
, subseg_new (".tbss", 0));
4497 bfd_set_section_flags (section
->segment
,
4498 SEC_ALLOC
| SEC_THREAD_LOCAL
);
4499 seg_info (section
->segment
)->bss
= 1;
4503 section
= &ppc_xcoff_bss_section
;
4505 record_alignment (section
->segment
, align
);
4508 || ! S_IS_DEFINED (lcomm_sym
))
4517 S_SET_EXTERNAL (sym
);
4521 symbol_get_tc (lcomm_sym
)->output
= 1;
4522 def_sym
= lcomm_sym
;
4526 subseg_set (section
->segment
, 1);
4527 frag_align (align
, 0, 0);
4529 symbol_set_frag (def_sym
, frag_now
);
4530 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
4531 def_size
, (char *) NULL
);
4533 S_SET_SEGMENT (def_sym
, section
->segment
);
4534 symbol_get_tc (def_sym
)->align
= align
;
4538 /* Align the size of lcomm_sym. */
4539 symbol_get_frag (lcomm_sym
)->fr_offset
=
4540 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
4541 &~ ((1 << align
) - 1));
4542 if (align
> symbol_get_tc (lcomm_sym
)->align
)
4543 symbol_get_tc (lcomm_sym
)->align
= align
;
4548 /* Make sym an offset from lcomm_sym. */
4549 S_SET_SEGMENT (sym
, section
->segment
);
4550 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
4551 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
4552 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
4555 if (!lcomm
&& visibility
)
4557 /* Add visibility to .comm symbol. */
4558 coff_symbol_type
*coffsym
= coffsymbol (symbol_get_bfdsym (sym
));
4559 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4560 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4563 subseg_set (current_seg
, current_subseg
);
4565 demand_empty_rest_of_line ();
4568 /* The .csect pseudo-op. This switches us into a different
4569 subsegment. The first argument is a symbol whose value is the
4570 start of the .csect. In COFF, csect symbols get special aux
4571 entries defined by the x_csect field of union internal_auxent. The
4572 optional second argument is the alignment (the default is 2). */
4575 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
4582 endc
= get_symbol_name (&name
);
4584 sym
= symbol_find_or_make (name
);
4586 (void) restore_line_pointer (endc
);
4588 if (S_GET_NAME (sym
)[0] == '\0')
4590 /* An unnamed csect is assumed to be [PR]. */
4591 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
4595 if (*input_line_pointer
== ',')
4597 ++input_line_pointer
;
4598 align
= get_absolute_expression ();
4601 ppc_change_csect (sym
, align
);
4603 demand_empty_rest_of_line ();
4606 /* Change to a different csect. */
4609 ppc_change_csect (symbolS
*sym
, offsetT align
)
4611 if (S_IS_DEFINED (sym
))
4612 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
4615 struct ppc_xcoff_section
*section
;
4622 /* This is a new csect. We need to look at the symbol class to
4623 figure out whether it should go in the text section or the
4627 switch (symbol_get_tc (sym
)->symbol_class
)
4637 section
= &ppc_xcoff_text_section
;
4647 section
= &ppc_xcoff_data_section
;
4648 if (ppc_toc_csect
!= NULL
4649 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4650 == section
->next_subsegment
))
4654 section
= &ppc_xcoff_bss_section
;
4657 section
= &ppc_xcoff_tdata_section
;
4658 /* Create .tdata section if not yet done. */
4659 if (!ppc_xcoff_section_is_initialized (section
))
4661 ppc_init_xcoff_section (section
, subseg_new (".tdata", 0));
4662 bfd_set_section_flags (section
->segment
, SEC_ALLOC
4663 | SEC_LOAD
| SEC_RELOC
| SEC_DATA
4664 | SEC_THREAD_LOCAL
);
4668 section
= &ppc_xcoff_tbss_section
;
4669 /* Create .tbss section if not yet done. */
4670 if (!ppc_xcoff_section_is_initialized (section
))
4672 ppc_init_xcoff_section (section
, subseg_new (".tbss", 0));
4673 bfd_set_section_flags (section
->segment
, SEC_ALLOC
|
4675 seg_info (section
->segment
)->bss
= 1;
4682 S_SET_SEGMENT (sym
, section
->segment
);
4683 symbol_get_tc (sym
)->subseg
= section
->next_subsegment
;
4684 ++section
->next_subsegment
;
4686 /* We set the obstack chunk size to a small value before
4687 changing subsegments, so that we don't use a lot of memory
4688 space for what may be a small section. */
4689 hold_chunksize
= chunksize
;
4692 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4693 symbol_get_tc (sym
)->subseg
);
4695 chunksize
= hold_chunksize
;
4698 ppc_after_toc_frag
= frag_now
;
4700 record_alignment (sec
, align
);
4702 frag_align_code (align
, 0);
4704 frag_align (align
, 0, 0);
4706 symbol_set_frag (sym
, frag_now
);
4707 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4709 symbol_get_tc (sym
)->align
= align
;
4710 symbol_get_tc (sym
)->output
= 1;
4711 symbol_get_tc (sym
)->within
= sym
;
4713 for (list
= section
->csects
;
4714 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4715 list
= symbol_get_tc (list
)->next
)
4717 symbol_get_tc (list
)->next
= sym
;
4719 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4720 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4724 ppc_current_csect
= sym
;
4728 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4732 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4734 sec
= subseg_new (dw
->xcoff_name
, subseg
);
4735 oldflags
= bfd_section_flags (sec
);
4736 if (oldflags
== SEC_NO_FLAGS
)
4738 /* Just created section. */
4739 gas_assert (dw_sections
[idx
].sect
== NULL
);
4741 bfd_set_section_flags (sec
, SEC_DEBUGGING
);
4742 bfd_set_section_alignment (sec
, 0);
4743 dw_sections
[idx
].sect
= sec
;
4746 /* Not anymore in a csect. */
4747 ppc_current_csect
= NULL
;
4750 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4751 .dwsect flag [, opt-label ]
4755 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4759 const struct xcoff_dwsect_name
*dw
;
4760 struct dw_subsection
*subseg
;
4761 struct dw_section
*dws
;
4765 flag
= get_absolute_expression ();
4767 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4768 if (xcoff_dwsect_names
[i
].flag
== flag
)
4770 dw
= &xcoff_dwsect_names
[i
];
4774 /* Parse opt-label. */
4775 if (*input_line_pointer
== ',')
4780 ++input_line_pointer
;
4782 c
= get_symbol_name (&label
);
4783 opt_label
= symbol_find_or_make (label
);
4784 (void) restore_line_pointer (c
);
4789 demand_empty_rest_of_line ();
4791 /* Return now in case of unknown subsection. */
4794 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4799 /* Find the subsection. */
4800 dws
= &dw_sections
[i
];
4802 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4804 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4805 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4807 as_bad (_("label %s was not defined in this dwarf section"),
4808 S_GET_NAME (opt_label
));
4809 subseg
= dws
->anon_subseg
;
4813 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4818 /* Switch to the subsection. */
4819 ppc_change_debug_section (i
, subseg
->subseg
);
4823 /* Create a new dw subsection. */
4824 subseg
= XCNEW (struct dw_subsection
);
4826 if (opt_label
== NULL
)
4828 /* The anonymous one. */
4830 subseg
->link
= NULL
;
4831 dws
->anon_subseg
= subseg
;
4836 if (dws
->list_subseg
!= NULL
)
4837 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4841 subseg
->link
= dws
->list_subseg
;
4842 dws
->list_subseg
= subseg
;
4843 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4846 ppc_change_debug_section (i
, subseg
->subseg
);
4850 /* Add the length field. */
4851 expressionS
*exp
= &subseg
->end_exp
;
4854 if (opt_label
!= NULL
)
4855 symbol_set_value_now (opt_label
);
4857 /* Add the length field. Note that according to the AIX assembler
4858 manual, the size of the length field is 4 for powerpc32 but
4859 12 for powerpc64. */
4862 /* Write the 64bit marker. */
4863 md_number_to_chars (frag_more (4), -1, 4);
4866 exp
->X_op
= O_subtract
;
4867 exp
->X_op_symbol
= symbol_temp_new_now ();
4868 exp
->X_add_symbol
= symbol_temp_make ();
4870 sz
= ppc_obj64
? 8 : 4;
4871 exp
->X_add_number
= -sz
;
4872 emit_expr (exp
, sz
);
4877 /* This function handles the .text and .data pseudo-ops. These
4878 pseudo-ops aren't really used by XCOFF; we implement them for the
4879 convenience of people who aren't used to XCOFF. */
4882 ppc_section (int type
)
4889 else if (type
== 'd')
4894 sym
= symbol_find_or_make (name
);
4896 ppc_change_csect (sym
, 2);
4898 demand_empty_rest_of_line ();
4901 /* This function handles the .section pseudo-op. This is mostly to
4902 give an error, since XCOFF only supports .text, .data and .bss, but
4903 we do permit the user to name the text or data section. */
4906 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4909 const char *real_name
;
4913 c
= get_symbol_name (&user_name
);
4915 if (strcmp (user_name
, ".text") == 0)
4916 real_name
= ".text[PR]";
4917 else if (strcmp (user_name
, ".data") == 0)
4918 real_name
= ".data[RW]";
4921 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4922 (void) restore_line_pointer (c
);
4923 ignore_rest_of_line ();
4927 (void) restore_line_pointer (c
);
4929 sym
= symbol_find_or_make (real_name
);
4931 ppc_change_csect (sym
, 2);
4933 demand_empty_rest_of_line ();
4936 /* The .extern pseudo-op. We create an undefined symbol. */
4939 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4944 if ((name
= read_symbol_name ()) == NULL
)
4947 sym
= symbol_find_or_make (name
);
4949 if (*input_line_pointer
== ',')
4951 unsigned short visibility
;
4952 coff_symbol_type
*coffsym
= coffsymbol (symbol_get_bfdsym (sym
));
4954 input_line_pointer
++;
4955 visibility
= ppc_xcoff_get_visibility ();
4958 as_bad (_("Unknown visibility field in .extern"));
4959 ignore_rest_of_line ();
4963 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4964 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4967 demand_empty_rest_of_line ();
4970 /* XCOFF semantic for .globl says that the second parameter is
4971 the symbol visibility. */
4974 ppc_globl (int ignore ATTRIBUTE_UNUSED
)
4979 if ((name
= read_symbol_name ()) == NULL
)
4982 sym
= symbol_find_or_make (name
);
4983 S_SET_EXTERNAL (sym
);
4985 if (*input_line_pointer
== ',')
4987 unsigned short visibility
;
4988 coff_symbol_type
*coffsym
= coffsymbol (symbol_get_bfdsym (sym
));
4990 input_line_pointer
++;
4991 visibility
= ppc_xcoff_get_visibility ();
4994 as_bad (_("Unknown visibility field in .globl"));
4995 ignore_rest_of_line ();
4999 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
5000 coffsym
->native
->u
.syment
.n_type
|= visibility
;
5003 demand_empty_rest_of_line ();
5006 /* XCOFF semantic for .weak says that the second parameter is
5007 the symbol visibility. */
5010 ppc_weak (int ignore ATTRIBUTE_UNUSED
)
5015 if ((name
= read_symbol_name ()) == NULL
)
5018 sym
= symbol_find_or_make (name
);
5021 if (*input_line_pointer
== ',')
5023 unsigned short visibility
;
5024 coff_symbol_type
*coffsym
= coffsymbol (symbol_get_bfdsym (sym
));
5026 input_line_pointer
++;
5027 visibility
= ppc_xcoff_get_visibility ();
5030 as_bad (_("Unknown visibility field in .weak"));
5031 ignore_rest_of_line ();
5035 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
5036 coffsym
->native
->u
.syment
.n_type
|= visibility
;
5039 demand_empty_rest_of_line ();
5042 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
5045 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
5051 endc
= get_symbol_name (&name
);
5053 sym
= symbol_find_or_make (name
);
5055 (void) restore_line_pointer (endc
);
5057 symbol_get_tc (sym
)->output
= 1;
5059 demand_empty_rest_of_line ();
5062 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
5063 relocations at the beginning of the current csect.
5065 (In principle, there's no reason why the relocations _have_ to be at
5066 the beginning. Anywhere in the csect would do. However, inserting
5067 at the beginning is what the native assembler does, and it helps to
5068 deal with cases where the .ref statements follow the section contents.)
5070 ??? .refs don't work for empty .csects. However, the native assembler
5071 doesn't report an error in this case, and neither yet do we. */
5074 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
5079 if (ppc_current_csect
== NULL
)
5081 as_bad (_(".ref outside .csect"));
5082 ignore_rest_of_line ();
5088 c
= get_symbol_name (&name
);
5090 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
5091 symbol_find_or_make (name
), 0, false, BFD_RELOC_NONE
);
5093 *input_line_pointer
= c
;
5094 SKIP_WHITESPACE_AFTER_NAME ();
5095 c
= *input_line_pointer
;
5098 input_line_pointer
++;
5100 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
5102 as_bad (_("missing symbol name"));
5103 ignore_rest_of_line ();
5110 demand_empty_rest_of_line ();
5113 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
5114 although I don't know why it bothers. */
5117 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
5124 endc
= get_symbol_name (&name
);
5126 sym
= symbol_find_or_make (name
);
5128 (void) restore_line_pointer (endc
);
5130 if (*input_line_pointer
!= ',')
5132 as_bad (_("missing rename string"));
5133 ignore_rest_of_line ();
5136 ++input_line_pointer
;
5138 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
5140 demand_empty_rest_of_line ();
5143 /* The .stabx pseudo-op. This is similar to a normal .stabs
5144 pseudo-op, but slightly different. A sample is
5145 .stabx "main:F-1",.main,142,0
5146 The first argument is the symbol name to create. The second is the
5147 value, and the third is the storage class. The fourth seems to be
5148 always zero, and I am assuming it is the type. */
5151 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
5158 name
= demand_copy_C_string (&len
);
5160 if (*input_line_pointer
!= ',')
5162 as_bad (_("missing value"));
5165 ++input_line_pointer
;
5167 ppc_stab_symbol
= true;
5168 sym
= symbol_make (name
);
5169 ppc_stab_symbol
= false;
5171 symbol_get_tc (sym
)->real_name
= name
;
5173 (void) expression (&exp
);
5180 as_bad (_("illegal .stabx expression; zero assumed"));
5181 exp
.X_add_number
= 0;
5184 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
5185 symbol_set_frag (sym
, &zero_address_frag
);
5189 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
5190 symbol_set_value_expression (sym
, &exp
);
5194 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
5195 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
5200 /* The value is some complex expression. This will probably
5201 fail at some later point, but this is probably the right
5202 thing to do here. */
5203 symbol_set_value_expression (sym
, &exp
);
5207 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5208 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5210 if (*input_line_pointer
!= ',')
5212 as_bad (_("missing class"));
5215 ++input_line_pointer
;
5217 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
5219 if (*input_line_pointer
!= ',')
5221 as_bad (_("missing type"));
5224 ++input_line_pointer
;
5226 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
5228 symbol_get_tc (sym
)->output
= 1;
5230 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
5235 .stabx "z",arrays_,133,0
5238 .comm arrays_,13768,3
5240 resolve_symbol_value will copy the exp's "within" into sym's when the
5241 offset is 0. Since this seems to be corner case problem,
5242 only do the correction for storage class C_STSYM. A better solution
5243 would be to have the tc field updated in ppc_symbol_new_hook. */
5245 if (exp
.X_op
== O_symbol
)
5247 if (ppc_current_block
== NULL
)
5248 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
5250 symbol_get_tc (sym
)->within
= ppc_current_block
;
5254 if (exp
.X_op
!= O_symbol
5255 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
5256 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
5257 ppc_frob_label (sym
);
5260 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5261 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
5262 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
5263 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5266 demand_empty_rest_of_line ();
5269 /* The .file pseudo-op. On XCOFF, .file can have several parameters
5270 which are being added to the symbol table to provide additional
5274 ppc_file (int ignore ATTRIBUTE_UNUSED
)
5276 char *sfname
, *s1
= NULL
, *s2
= NULL
, *s3
= NULL
;
5277 int length
, auxnb
= 1;
5279 /* Some assemblers tolerate immediately following '"'. */
5280 if ((sfname
= demand_copy_string (&length
)) != 0)
5282 coff_symbol_type
*coffsym
;
5283 if (*input_line_pointer
== ',')
5285 ++input_line_pointer
;
5286 s1
= demand_copy_string (&length
);
5289 if (*input_line_pointer
== ',')
5291 ++input_line_pointer
;
5292 s2
= demand_copy_string (&length
);
5295 if (*input_line_pointer
== ',')
5297 ++input_line_pointer
;
5298 s3
= demand_copy_string (&length
);
5304 /* Use coff dot_file creation and adjust auxiliary entries. */
5305 c_dot_file_symbol (sfname
, 0);
5306 S_SET_NUMBER_AUXILIARY (symbol_rootP
, auxnb
);
5307 coffsym
= coffsymbol (symbol_get_bfdsym (symbol_rootP
));
5308 coffsym
->native
[1].u
.auxent
.x_file
.x_ftype
= XFT_FN
;
5312 coffsym
->native
[2].u
.auxent
.x_file
.x_ftype
= XFT_CT
;
5313 coffsym
->native
[2].extrap
= s1
;
5317 coffsym
->native
[3].u
.auxent
.x_file
.x_ftype
= XFT_CV
;
5318 coffsym
->native
[3].extrap
= s2
;
5322 coffsym
->native
[4].u
.auxent
.x_file
.x_ftype
= XFT_CD
;
5323 coffsym
->native
[4].extrap
= s3
;
5326 demand_empty_rest_of_line ();
5330 /* The .function pseudo-op. This takes several arguments. The first
5331 argument seems to be the external name of the symbol. The second
5332 argument seems to be the label for the start of the function. gcc
5333 uses the same name for both. I have no idea what the third and
5334 fourth arguments are meant to be. The optional fifth argument is
5335 an expression for the size of the function. In COFF this symbol
5336 gets an aux entry like that used for a csect. */
5339 ppc_function (int ignore ATTRIBUTE_UNUSED
)
5347 endc
= get_symbol_name (&name
);
5349 /* Ignore any [PR] suffix. */
5350 name
= ppc_canonicalize_symbol_name (name
);
5351 s
= strchr (name
, '[');
5352 if (s
!= (char *) NULL
5353 && strcmp (s
+ 1, "PR]") == 0)
5356 ext_sym
= symbol_find_or_make (name
);
5358 (void) restore_line_pointer (endc
);
5360 if (*input_line_pointer
!= ',')
5362 as_bad (_("missing symbol name"));
5363 ignore_rest_of_line ();
5366 ++input_line_pointer
;
5368 endc
= get_symbol_name (&name
);
5370 lab_sym
= symbol_find_or_make (name
);
5372 (void) restore_line_pointer (endc
);
5374 if (ext_sym
!= lab_sym
)
5378 exp
.X_op
= O_symbol
;
5379 exp
.X_add_symbol
= lab_sym
;
5380 exp
.X_op_symbol
= NULL
;
5381 exp
.X_add_number
= 0;
5383 symbol_set_value_expression (ext_sym
, &exp
);
5386 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
5387 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
5388 symbol_get_tc (ext_sym
)->output
= 1;
5390 if (*input_line_pointer
== ',')
5394 /* Ignore the third argument. */
5395 ++input_line_pointer
;
5397 if (*input_line_pointer
== ',')
5399 /* Ignore the fourth argument. */
5400 ++input_line_pointer
;
5402 if (*input_line_pointer
== ',')
5404 /* The fifth argument is the function size.
5405 If it's omitted, the size will be the containing csect.
5406 This will be donce during ppc_frob_symtab. */
5407 ++input_line_pointer
;
5408 symbol_get_tc (ext_sym
)->u
.size
5409 = symbol_new ("L0\001", absolute_section
,
5410 &zero_address_frag
, 0);
5411 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
5416 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5417 SF_SET_FUNCTION (ext_sym
);
5418 SF_SET_PROCESS (ext_sym
);
5419 coff_add_linesym (ext_sym
);
5421 demand_empty_rest_of_line ();
5424 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
5425 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
5426 with the correct line number */
5428 static symbolS
*saved_bi_sym
= 0;
5431 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
5435 sym
= symbol_make (".bf");
5436 S_SET_SEGMENT (sym
, text_section
);
5437 symbol_set_frag (sym
, frag_now
);
5438 S_SET_VALUE (sym
, frag_now_fix ());
5439 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5441 coff_line_base
= get_absolute_expression ();
5443 S_SET_NUMBER_AUXILIARY (sym
, 1);
5444 SA_SET_SYM_LNNO (sym
, coff_line_base
);
5446 /* Line number for bi. */
5449 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
5454 symbol_get_tc (sym
)->output
= 1;
5456 ppc_frob_label (sym
);
5458 demand_empty_rest_of_line ();
5461 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
5462 ".ef", except that the line number is absolute, not relative to the
5463 most recent ".bf" symbol. */
5466 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
5470 sym
= symbol_make (".ef");
5471 S_SET_SEGMENT (sym
, text_section
);
5472 symbol_set_frag (sym
, frag_now
);
5473 S_SET_VALUE (sym
, frag_now_fix ());
5474 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5475 S_SET_NUMBER_AUXILIARY (sym
, 1);
5476 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5477 symbol_get_tc (sym
)->output
= 1;
5479 ppc_frob_label (sym
);
5481 demand_empty_rest_of_line ();
5484 /* The .bi and .ei pseudo-ops. These take a string argument and
5485 generates a C_BINCL or C_EINCL symbol, which goes at the start of
5486 the symbol list. The value of .bi will be know when the next .bf
5492 static symbolS
*last_biei
;
5499 name
= demand_copy_C_string (&len
);
5501 /* The value of these symbols is actually file offset. Here we set
5502 the value to the index into the line number entries. In
5503 ppc_frob_symbols we set the fix_line field, which will cause BFD
5504 to do the right thing. */
5506 sym
= symbol_make (name
);
5507 /* obj-coff.c currently only handles line numbers correctly in the
5509 S_SET_SEGMENT (sym
, text_section
);
5510 S_SET_VALUE (sym
, coff_n_line_nos
);
5511 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5513 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
5514 symbol_get_tc (sym
)->output
= 1;
5522 for (look
= last_biei
? last_biei
: symbol_rootP
;
5523 (look
!= (symbolS
*) NULL
5524 && (S_GET_STORAGE_CLASS (look
) == C_FILE
5525 || S_GET_STORAGE_CLASS (look
) == C_BINCL
5526 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
5527 look
= symbol_next (look
))
5529 if (look
!= (symbolS
*) NULL
)
5531 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5532 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
5536 demand_empty_rest_of_line ();
5539 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
5540 There is one argument, which is a csect symbol. The value of the
5541 .bs symbol is the index of this csect symbol. */
5544 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
5551 if (ppc_current_block
!= NULL
)
5552 as_bad (_("nested .bs blocks"));
5554 endc
= get_symbol_name (&name
);
5556 csect
= symbol_find_or_make (name
);
5558 (void) restore_line_pointer (endc
);
5560 sym
= symbol_make (".bs");
5561 S_SET_SEGMENT (sym
, now_seg
);
5562 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
5563 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5564 symbol_get_tc (sym
)->output
= 1;
5566 symbol_get_tc (sym
)->within
= csect
;
5568 ppc_frob_label (sym
);
5570 ppc_current_block
= sym
;
5572 demand_empty_rest_of_line ();
5575 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
5578 ppc_es (int ignore ATTRIBUTE_UNUSED
)
5582 if (ppc_current_block
== NULL
)
5583 as_bad (_(".es without preceding .bs"));
5585 sym
= symbol_make (".es");
5586 S_SET_SEGMENT (sym
, now_seg
);
5587 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
5588 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5589 symbol_get_tc (sym
)->output
= 1;
5591 ppc_frob_label (sym
);
5593 ppc_current_block
= NULL
;
5595 demand_empty_rest_of_line ();
5598 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
5602 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
5606 sym
= symbol_make (".bb");
5607 S_SET_SEGMENT (sym
, text_section
);
5608 symbol_set_frag (sym
, frag_now
);
5609 S_SET_VALUE (sym
, frag_now_fix ());
5610 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5612 S_SET_NUMBER_AUXILIARY (sym
, 1);
5613 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5615 symbol_get_tc (sym
)->output
= 1;
5617 SF_SET_PROCESS (sym
);
5619 ppc_frob_label (sym
);
5621 demand_empty_rest_of_line ();
5624 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
5628 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
5632 sym
= symbol_make (".eb");
5633 S_SET_SEGMENT (sym
, text_section
);
5634 symbol_set_frag (sym
, frag_now
);
5635 S_SET_VALUE (sym
, frag_now_fix ());
5636 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5637 S_SET_NUMBER_AUXILIARY (sym
, 1);
5638 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5639 symbol_get_tc (sym
)->output
= 1;
5641 SF_SET_PROCESS (sym
);
5643 ppc_frob_label (sym
);
5645 demand_empty_rest_of_line ();
5648 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
5652 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
5658 name
= demand_copy_C_string (&len
);
5659 sym
= symbol_make (name
);
5660 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5661 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5662 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
5663 S_SET_VALUE (sym
, 0);
5664 symbol_get_tc (sym
)->output
= 1;
5666 ppc_frob_label (sym
);
5668 demand_empty_rest_of_line ();
5671 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
5674 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
5678 sym
= symbol_make (".ec");
5679 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5680 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5681 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
5682 S_SET_VALUE (sym
, 0);
5683 symbol_get_tc (sym
)->output
= 1;
5685 ppc_frob_label (sym
);
5687 demand_empty_rest_of_line ();
5690 /* The .toc pseudo-op. Switch to the .toc subsegment. */
5693 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
5695 if (ppc_toc_csect
!= (symbolS
*) NULL
)
5696 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
5703 subseg
= ppc_xcoff_data_section
.next_subsegment
;
5704 ++ppc_xcoff_data_section
.next_subsegment
;
5706 subseg_new (segment_name (data_section
), subseg
);
5707 ppc_toc_frag
= frag_now
;
5709 sym
= symbol_find_or_make ("TOC[TC0]");
5710 symbol_set_frag (sym
, frag_now
);
5711 S_SET_SEGMENT (sym
, data_section
);
5712 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5713 symbol_get_tc (sym
)->subseg
= subseg
;
5714 symbol_get_tc (sym
)->output
= 1;
5715 symbol_get_tc (sym
)->within
= sym
;
5717 ppc_toc_csect
= sym
;
5719 for (list
= ppc_xcoff_data_section
.csects
;
5720 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
5721 list
= symbol_get_tc (list
)->next
)
5723 symbol_get_tc (list
)->next
= sym
;
5725 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5726 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
5730 ppc_current_csect
= ppc_toc_csect
;
5732 demand_empty_rest_of_line ();
5735 /* The AIX assembler automatically aligns the operands of a .long or
5736 .short pseudo-op, and we want to be compatible. */
5739 ppc_xcoff_cons (int log_size
)
5741 frag_align (log_size
, 0, 0);
5742 record_alignment (now_seg
, log_size
);
5743 cons (1 << log_size
);
5747 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
5752 (void) expression (&exp
);
5754 if (exp
.X_op
!= O_constant
)
5756 as_bad (_("non-constant byte count"));
5760 byte_count
= exp
.X_add_number
;
5762 if (*input_line_pointer
!= ',')
5764 as_bad (_("missing value"));
5768 ++input_line_pointer
;
5773 ppc_xcoff_end (void)
5777 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
5779 struct dw_section
*dws
= &dw_sections
[i
];
5780 struct dw_subsection
*dwss
;
5782 if (dws
->anon_subseg
)
5784 dwss
= dws
->anon_subseg
;
5785 dwss
->link
= dws
->list_subseg
;
5788 dwss
= dws
->list_subseg
;
5790 for (; dwss
!= NULL
; dwss
= dwss
->link
)
5791 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
5793 subseg_set (dws
->sect
, dwss
->subseg
);
5794 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
5800 #endif /* OBJ_XCOFF */
5801 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5803 /* The .tc pseudo-op. This is used when generating either XCOFF or
5804 ELF. This takes two or more arguments.
5806 When generating XCOFF output, the first argument is the name to
5807 give to this location in the toc; this will be a symbol with class
5808 TC. The rest of the arguments are N-byte values to actually put at
5809 this location in the TOC; often there is just one more argument, a
5810 relocatable symbol reference. The size of the value to store
5811 depends on target word size. A 32-bit target uses 4-byte values, a
5812 64-bit target uses 8-byte values.
5814 When not generating XCOFF output, the arguments are the same, but
5815 the first argument is simply ignored. */
5818 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5822 /* Define the TOC symbol name. */
5828 if (ppc_toc_csect
== (symbolS
*) NULL
5829 || ppc_toc_csect
!= ppc_current_csect
)
5831 as_bad (_(".tc not in .toc section"));
5832 ignore_rest_of_line ();
5836 endc
= get_symbol_name (&name
);
5838 sym
= symbol_find_or_make (name
);
5840 (void) restore_line_pointer (endc
);
5842 if (S_IS_DEFINED (sym
))
5846 label
= symbol_get_tc (ppc_current_csect
)->within
;
5847 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5849 as_bad (_(".tc with no label"));
5850 ignore_rest_of_line ();
5854 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5855 symbol_set_frag (label
, symbol_get_frag (sym
));
5856 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5858 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5859 ++input_line_pointer
;
5864 S_SET_SEGMENT (sym
, now_seg
);
5865 symbol_set_frag (sym
, frag_now
);
5866 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5868 /* AIX assembler seems to allow any storage class to be set in .tc.
5869 But for now, only XMC_TC and XMC_TE are supported by us. */
5870 switch (symbol_get_tc (sym
)->symbol_class
)
5877 as_bad (_(".tc with storage class %d not yet supported"),
5878 symbol_get_tc (sym
)->symbol_class
);
5879 ignore_rest_of_line ();
5882 symbol_get_tc (sym
)->output
= 1;
5884 ppc_frob_label (sym
);
5887 #endif /* OBJ_XCOFF */
5891 /* Skip the TOC symbol name. */
5892 while (is_part_of_name (*input_line_pointer
)
5893 || *input_line_pointer
== ' '
5894 || *input_line_pointer
== '['
5895 || *input_line_pointer
== ']'
5896 || *input_line_pointer
== '{'
5897 || *input_line_pointer
== '}')
5898 ++input_line_pointer
;
5900 /* Align to a four/eight byte boundary. */
5901 align
= ppc_obj64
? 3 : 2;
5902 frag_align (align
, 0, 0);
5903 record_alignment (now_seg
, align
);
5904 #endif /* OBJ_ELF */
5906 if (*input_line_pointer
!= ',')
5907 demand_empty_rest_of_line ();
5910 ++input_line_pointer
;
5911 cons (ppc_obj64
? 8 : 4);
5915 /* Pseudo-op .machine. */
5918 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5922 #define MAX_HISTORY 100
5923 static ppc_cpu_t
*cpu_history
;
5924 static int curr_hist
;
5928 c
= get_symbol_name (&cpu_string
);
5929 cpu_string
= xstrdup (cpu_string
);
5930 (void) restore_line_pointer (c
);
5932 if (cpu_string
!= NULL
)
5934 ppc_cpu_t old_cpu
= ppc_cpu
;
5937 for (p
= cpu_string
; *p
!= 0; p
++)
5940 if (strcmp (cpu_string
, "push") == 0)
5942 if (cpu_history
== NULL
)
5943 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5945 if (curr_hist
>= MAX_HISTORY
)
5946 as_bad (_(".machine stack overflow"));
5948 cpu_history
[curr_hist
++] = ppc_cpu
;
5950 else if (strcmp (cpu_string
, "pop") == 0)
5953 as_bad (_(".machine stack underflow"));
5955 ppc_cpu
= cpu_history
[--curr_hist
];
5960 /* Not using the global "sticky" variable here results in
5961 none of the extra functional unit command line options,
5962 -many, -maltivec, -mspe, -mspe2, -mvle, -mvsx, being in
5963 force after selecting a new cpu with .machine.
5964 ".machine altivec" and other extra functional unit
5965 options do not count as a new machine, instead they add
5966 to currently selected opcodes. */
5967 ppc_cpu_t machine_sticky
= 0;
5968 new_cpu
= ppc_parse_cpu (ppc_cpu
, &machine_sticky
, cpu_string
);
5972 as_bad (_("invalid machine `%s'"), cpu_string
);
5975 if (ppc_cpu
!= old_cpu
)
5976 ppc_setup_opcodes ();
5979 demand_empty_rest_of_line ();
5981 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5985 /* XCOFF specific symbol and file handling. */
5987 /* Canonicalize the symbol name. We use the to force the suffix, if
5988 any, to use square brackets, and to be in upper case. */
5991 ppc_canonicalize_symbol_name (char *name
)
5995 if (ppc_stab_symbol
)
5998 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
6012 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
6015 if (*s
== '\0' || s
[1] != '\0')
6016 as_bad (_("bad symbol suffix"));
6024 /* Set the class of a symbol based on the suffix, if any. This is
6025 called whenever a new symbol is created. */
6028 ppc_symbol_new_hook (symbolS
*sym
)
6030 struct ppc_tc_sy
*tc
;
6033 tc
= symbol_get_tc (sym
);
6036 tc
->symbol_class
= -1;
6037 tc
->real_name
= NULL
;
6044 if (ppc_stab_symbol
)
6047 s
= strchr (S_GET_NAME (sym
), '[');
6048 if (s
== (const char *) NULL
)
6050 /* There is no suffix. */
6059 if (strcmp (s
, "BS]") == 0)
6060 tc
->symbol_class
= XMC_BS
;
6063 if (strcmp (s
, "DB]") == 0)
6064 tc
->symbol_class
= XMC_DB
;
6065 else if (strcmp (s
, "DS]") == 0)
6066 tc
->symbol_class
= XMC_DS
;
6069 if (strcmp (s
, "GL]") == 0)
6070 tc
->symbol_class
= XMC_GL
;
6073 if (strcmp (s
, "PR]") == 0)
6074 tc
->symbol_class
= XMC_PR
;
6077 if (strcmp (s
, "RO]") == 0)
6078 tc
->symbol_class
= XMC_RO
;
6079 else if (strcmp (s
, "RW]") == 0)
6080 tc
->symbol_class
= XMC_RW
;
6083 if (strcmp (s
, "SV]") == 0)
6084 tc
->symbol_class
= XMC_SV
;
6087 if (strcmp (s
, "TC]") == 0)
6088 tc
->symbol_class
= XMC_TC
;
6089 else if (strcmp (s
, "TI]") == 0)
6090 tc
->symbol_class
= XMC_TI
;
6091 else if (strcmp (s
, "TB]") == 0)
6092 tc
->symbol_class
= XMC_TB
;
6093 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
6094 tc
->symbol_class
= XMC_TC0
;
6095 else if (strcmp (s
, "TE]") == 0)
6096 tc
->symbol_class
= XMC_TE
;
6097 else if (strcmp (s
, "TL]") == 0)
6098 tc
->symbol_class
= XMC_TL
;
6101 if (strcmp (s
, "UA]") == 0)
6102 tc
->symbol_class
= XMC_UA
;
6103 else if (strcmp (s
, "UC]") == 0)
6104 tc
->symbol_class
= XMC_UC
;
6105 else if (strcmp (s
, "UL]") == 0)
6106 tc
->symbol_class
= XMC_UL
;
6109 if (strcmp (s
, "XO]") == 0)
6110 tc
->symbol_class
= XMC_XO
;
6114 if (tc
->symbol_class
== -1)
6115 as_bad (_("unrecognized symbol suffix"));
6118 /* This variable is set by ppc_frob_symbol if any absolute symbols are
6119 seen. It tells ppc_adjust_symtab whether it needs to look through
6122 static bool ppc_saw_abs
;
6124 /* Change the name of a symbol just before writing it out. Set the
6125 real name if the .rename pseudo-op was used. Otherwise, remove any
6126 class suffix. Return 1 if the symbol should not be included in the
6130 ppc_frob_symbol (symbolS
*sym
)
6132 static symbolS
*ppc_last_function
;
6133 static symbolS
*set_end
;
6135 /* Discard symbols that should not be included in the output symbol
6137 if (! symbol_used_in_reloc_p (sym
)
6138 && S_GET_STORAGE_CLASS (sym
) != C_DWARF
6139 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
6140 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6141 && ! symbol_get_tc (sym
)->output
6142 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
6145 /* This one will disappear anyway. Don't make a csect sym for it. */
6146 if (sym
== abs_section_sym
)
6149 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
6150 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
6156 name
= S_GET_NAME (sym
);
6157 s
= strchr (name
, '[');
6158 if (s
!= (char *) NULL
)
6164 snew
= xstrndup (name
, len
);
6166 S_SET_NAME (sym
, snew
);
6170 if (set_end
!= (symbolS
*) NULL
)
6172 SA_SET_SYM_ENDNDX (set_end
, sym
);
6176 if (SF_GET_FUNCTION (sym
))
6178 /* Make sure coff_last_function is reset. Otherwise, we won't create
6179 the auxent for the next function. */
6180 coff_last_function
= 0;
6181 ppc_last_function
= sym
;
6182 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
6184 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
6185 SA_SET_SYM_FSIZE (sym
,
6186 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
6190 /* Size of containing csect. */
6191 symbolS
* within
= symbol_get_tc (sym
)->within
;
6192 union internal_auxent
*csectaux
;
6193 csectaux
= &coffsymbol (symbol_get_bfdsym (within
))
6194 ->native
[S_GET_NUMBER_AUXILIARY(within
)].u
.auxent
;
6196 SA_SET_SYM_FSIZE (sym
, csectaux
->x_csect
.x_scnlen
.l
);
6199 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
6200 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
6202 if (ppc_last_function
== (symbolS
*) NULL
)
6203 as_bad (_(".ef with no preceding .function"));
6206 set_end
= ppc_last_function
;
6207 ppc_last_function
= NULL
;
6209 /* We don't have a C_EFCN symbol, but we need to force the
6210 COFF backend to believe that it has seen one. */
6211 coff_last_function
= NULL
;
6215 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6216 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
6217 && S_GET_STORAGE_CLASS (sym
) != C_FILE
6218 && S_GET_STORAGE_CLASS (sym
) != C_FCN
6219 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
6220 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
6221 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
6222 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
6223 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
6224 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
6225 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
6227 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
6228 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
6229 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
6232 union internal_auxent
*a
;
6234 /* Create a csect aux. */
6235 i
= S_GET_NUMBER_AUXILIARY (sym
);
6236 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
6237 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
6238 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
6240 /* This is the TOC table. */
6241 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
6242 a
->x_csect
.x_scnlen
.l
= 0;
6243 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6245 else if (symbol_get_tc (sym
)->subseg
!= 0)
6247 /* This is a csect symbol. x_scnlen is the size of the
6249 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
6250 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (S_GET_SEGMENT (sym
))
6251 - S_GET_VALUE (sym
));
6254 resolve_symbol_value (symbol_get_tc (sym
)->next
);
6255 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
6256 - S_GET_VALUE (sym
));
6258 if (symbol_get_tc (sym
)->symbol_class
== XMC_BS
6259 || symbol_get_tc (sym
)->symbol_class
== XMC_UL
)
6260 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6262 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
6264 else if (S_GET_SEGMENT (sym
) == bss_section
6265 || S_GET_SEGMENT (sym
) == ppc_xcoff_tbss_section
.segment
)
6267 /* This is a common symbol. */
6268 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6269 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6270 if (S_GET_SEGMENT (sym
) == ppc_xcoff_tbss_section
.segment
)
6271 symbol_get_tc (sym
)->symbol_class
= XMC_UL
;
6272 else if (S_IS_EXTERNAL (sym
))
6273 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6275 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6277 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6279 /* This is an absolute symbol. The csect will be created by
6280 ppc_adjust_symtab. */
6282 a
->x_csect
.x_smtyp
= XTY_LD
;
6283 if (symbol_get_tc (sym
)->symbol_class
== -1)
6284 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6286 else if (! S_IS_DEFINED (sym
))
6288 /* This is an external symbol. */
6289 a
->x_csect
.x_scnlen
.l
= 0;
6290 a
->x_csect
.x_smtyp
= XTY_ER
;
6292 else if (ppc_is_toc_sym (sym
))
6296 /* This is a TOC definition. x_scnlen is the size of the
6298 next
= symbol_next (sym
);
6299 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6300 next
= symbol_next (next
);
6301 if (next
== (symbolS
*) NULL
6302 || (!ppc_is_toc_sym (next
)))
6304 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6305 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (data_section
)
6306 - S_GET_VALUE (sym
));
6308 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6309 - S_GET_VALUE (sym
));
6313 resolve_symbol_value (next
);
6314 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6315 - S_GET_VALUE (sym
));
6317 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6323 /* This is a normal symbol definition. x_scnlen is the
6324 symbol index of the containing csect. */
6325 if (S_GET_SEGMENT (sym
) == text_section
)
6326 csect
= ppc_xcoff_text_section
.csects
;
6327 else if (S_GET_SEGMENT (sym
) == data_section
)
6328 csect
= ppc_xcoff_data_section
.csects
;
6329 else if (S_GET_SEGMENT (sym
) == ppc_xcoff_tdata_section
.segment
)
6330 csect
= ppc_xcoff_tdata_section
.csects
;
6334 /* Skip the initial dummy symbol. */
6335 csect
= symbol_get_tc (csect
)->next
;
6337 if (csect
== (symbolS
*) NULL
)
6339 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6340 a
->x_csect
.x_scnlen
.l
= 0;
6344 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6346 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6347 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6348 > S_GET_VALUE (sym
))
6350 csect
= symbol_get_tc (csect
)->next
;
6353 a
->x_csect
.x_scnlen
.p
=
6354 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6355 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6358 a
->x_csect
.x_smtyp
= XTY_LD
;
6361 a
->x_csect
.x_parmhash
= 0;
6362 a
->x_csect
.x_snhash
= 0;
6363 if (symbol_get_tc (sym
)->symbol_class
== -1)
6364 a
->x_csect
.x_smclas
= XMC_PR
;
6366 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6367 a
->x_csect
.x_stab
= 0;
6368 a
->x_csect
.x_snstab
= 0;
6370 /* Don't let the COFF backend resort these symbols. */
6371 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6373 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6375 /* We want the value to be the symbol index of the referenced
6376 csect symbol. BFD will do that for us if we set the right
6378 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6379 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6381 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6382 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6384 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6389 block
= symbol_get_tc (sym
)->within
;
6392 /* The value is the offset from the enclosing csect. */
6395 csect
= symbol_get_tc (block
)->within
;
6396 resolve_symbol_value (csect
);
6397 base
= S_GET_VALUE (csect
);
6402 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6404 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6405 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6407 /* We want the value to be a file offset into the line numbers.
6408 BFD will do that for us if we set the right flags. We have
6409 already set the value correctly. */
6410 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6416 /* Adjust the symbol table. */
6419 ppc_adjust_symtab (void)
6424 /* Make sure C_DWARF symbols come right after C_FILE.
6425 As the C_FILE might not be defined yet and as C_DWARF
6426 might already be ordered, we insert them before the
6427 first symbol which isn't a C_FILE or a C_DWARF. */
6428 for (anchorSym
= symbol_rootP
; anchorSym
!= NULL
;
6429 anchorSym
= symbol_next (anchorSym
))
6431 if (S_GET_STORAGE_CLASS (anchorSym
) != C_FILE
6432 && S_GET_STORAGE_CLASS (anchorSym
) != C_DWARF
)
6439 if (S_GET_STORAGE_CLASS (sym
) != C_DWARF
)
6441 sym
= symbol_next (sym
);
6445 symbolS
* tsym
= sym
;
6446 sym
= symbol_next (sym
);
6448 symbol_remove (tsym
, &symbol_rootP
, &symbol_lastP
);
6449 symbol_insert (tsym
, anchorSym
, &symbol_rootP
, &symbol_lastP
);
6452 /* Create csect symbols for all absolute symbols. */
6457 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6461 union internal_auxent
*a
;
6463 if (S_GET_SEGMENT (sym
) != absolute_section
)
6466 csect
= symbol_create (".abs[XO]", absolute_section
,
6467 &zero_address_frag
, S_GET_VALUE (sym
));
6468 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6469 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6470 i
= S_GET_NUMBER_AUXILIARY (csect
);
6471 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6472 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6473 a
->x_csect
.x_scnlen
.l
= 0;
6474 a
->x_csect
.x_smtyp
= XTY_SD
;
6475 a
->x_csect
.x_parmhash
= 0;
6476 a
->x_csect
.x_snhash
= 0;
6477 a
->x_csect
.x_smclas
= XMC_XO
;
6478 a
->x_csect
.x_stab
= 0;
6479 a
->x_csect
.x_snstab
= 0;
6481 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6483 i
= S_GET_NUMBER_AUXILIARY (sym
);
6484 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6485 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6486 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6489 ppc_saw_abs
= false;
6492 /* Set the VMA for a section. This is called on all the sections in
6496 ppc_frob_section (asection
*sec
)
6498 static bfd_vma vma
= 0;
6500 /* Dwarf sections start at 0. */
6501 if (bfd_section_flags (sec
) & SEC_DEBUGGING
)
6504 vma
= md_section_align (sec
, vma
);
6505 bfd_set_section_vma (sec
, vma
);
6506 vma
+= bfd_section_size (sec
);
6509 #endif /* OBJ_XCOFF */
6512 md_atof (int type
, char *litp
, int *sizep
)
6514 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6517 /* Write a value out to the object file, using the appropriate
6521 md_number_to_chars (char *buf
, valueT val
, int n
)
6523 if (target_big_endian
)
6524 number_to_chars_bigendian (buf
, val
, n
);
6526 number_to_chars_littleendian (buf
, val
, n
);
6529 /* Align a section (I don't know why this is machine dependent). */
6532 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6537 int align
= bfd_section_alignment (seg
);
6539 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6543 /* We don't have any form of relaxing. */
6546 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6547 asection
*seg ATTRIBUTE_UNUSED
)
6553 /* Convert a machine dependent frag. We never generate these. */
6556 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6557 asection
*sec ATTRIBUTE_UNUSED
,
6558 fragS
*fragp ATTRIBUTE_UNUSED
)
6563 /* We have no need to default values of symbols. */
6566 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6571 /* Functions concerning relocs. */
6573 /* The location from which a PC relative jump should be calculated,
6574 given a PC relative reloc. */
6577 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6579 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6584 /* Return the surrending csect for sym when possible. */
6587 ppc_get_csect_to_adjust (symbolS
*sym
)
6592 valueT val
= resolve_symbol_value (sym
);
6593 TC_SYMFIELD_TYPE
*tc
= symbol_get_tc (sym
);
6594 segT symseg
= S_GET_SEGMENT (sym
);
6597 && tc
->symbol_class
!= XMC_TC0
6598 && tc
->symbol_class
!= XMC_TC
6599 && tc
->symbol_class
!= XMC_TE
6600 && symseg
!= bss_section
6601 && symseg
!= ppc_xcoff_tbss_section
.segment
6602 /* Don't adjust if this is a reloc in the toc section. */
6603 && (symseg
!= data_section
6604 || ppc_toc_csect
== NULL
6605 || val
< ppc_toc_frag
->fr_address
6606 || (ppc_after_toc_frag
!= NULL
6607 && val
>= ppc_after_toc_frag
->fr_address
)))
6609 symbolS
* csect
= tc
->within
;
6611 /* If the symbol was not declared by a label (eg: a section symbol),
6612 use the section instead of the csect. This doesn't happen in
6613 normal AIX assembly code. */
6615 csect
= seg_info (symseg
)->sym
;
6623 /* This is called to see whether a fixup should be adjusted to use a
6624 section symbol. We take the opportunity to change a fixup against
6625 a symbol in the TOC subsegment into a reloc against the
6626 corresponding .tc symbol. */
6629 ppc_fix_adjustable (fixS
*fix
)
6631 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6632 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6635 if (symseg
== absolute_section
)
6638 /* Always adjust symbols in debugging sections. */
6639 if (bfd_section_flags (symseg
) & SEC_DEBUGGING
)
6642 if (ppc_toc_csect
!= (symbolS
*) NULL
6643 && fix
->fx_addsy
!= ppc_toc_csect
6644 && symseg
== data_section
6645 && val
>= ppc_toc_frag
->fr_address
6646 && (ppc_after_toc_frag
== (fragS
*) NULL
6647 || val
< ppc_after_toc_frag
->fr_address
))
6651 for (sy
= symbol_next (ppc_toc_csect
);
6652 sy
!= (symbolS
*) NULL
;
6653 sy
= symbol_next (sy
))
6655 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6657 if (sy_tc
->symbol_class
== XMC_TC0
)
6659 if (sy_tc
->symbol_class
!= XMC_TC
6660 && sy_tc
->symbol_class
!= XMC_TE
)
6662 if (val
== resolve_symbol_value (sy
))
6665 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6670 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6671 _("symbol in .toc does not match any .tc"));
6674 /* Possibly adjust the reloc to be against the csect. */
6675 if ((csect
= ppc_get_csect_to_adjust (fix
->fx_addsy
)) != NULL
)
6677 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6678 fix
->fx_addsy
= csect
;
6681 if ((csect
= ppc_get_csect_to_adjust (fix
->fx_subsy
)) != NULL
)
6683 fix
->fx_offset
-= resolve_symbol_value (fix
->fx_subsy
)
6684 - symbol_get_frag (csect
)->fr_address
;
6685 fix
->fx_subsy
= csect
;
6688 /* Adjust a reloc against a .lcomm symbol to be against the base
6690 if (symseg
== bss_section
6691 && ! S_IS_EXTERNAL (fix
->fx_addsy
)
6692 && symbol_get_tc (fix
->fx_addsy
)->subseg
== 0)
6694 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6696 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6703 /* A reloc from one csect to another must be kept. The assembler
6704 will, of course, keep relocs between sections, and it will keep
6705 absolute relocs, but we need to force it to keep PC relative relocs
6706 between two csects in the same section. */
6709 ppc_force_relocation (fixS
*fix
)
6711 /* At this point fix->fx_addsy should already have been converted to
6712 a csect symbol. If the csect does not include the fragment, then
6713 we need to force the relocation. */
6715 && fix
->fx_addsy
!= NULL
6716 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6717 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6718 > fix
->fx_frag
->fr_address
)
6719 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6720 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6721 <= fix
->fx_frag
->fr_address
))))
6724 return generic_force_reloc (fix
);
6726 #endif /* OBJ_XCOFF */
6729 /* If this function returns non-zero, it guarantees that a relocation
6730 will be emitted for a fixup. */
6733 ppc_force_relocation (fixS
*fix
)
6735 /* Branch prediction relocations must force a relocation, as must
6736 the vtable description relocs. */
6737 switch (fix
->fx_r_type
)
6739 case BFD_RELOC_PPC_B16_BRTAKEN
:
6740 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6741 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6742 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6743 case BFD_RELOC_24_PLT_PCREL
:
6744 case BFD_RELOC_PPC64_TOC
:
6746 case BFD_RELOC_PPC_B26
:
6747 case BFD_RELOC_PPC_BA26
:
6748 case BFD_RELOC_PPC_B16
:
6749 case BFD_RELOC_PPC_BA16
:
6750 case BFD_RELOC_PPC64_REL24_NOTOC
:
6751 case BFD_RELOC_PPC64_REL24_P9NOTOC
:
6752 /* All branch fixups targeting a localentry symbol must
6753 force a relocation. */
6756 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6757 elf_symbol_type
*elfsym
= elf_symbol_from (bfdsym
);
6758 gas_assert (elfsym
);
6759 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6767 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6768 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
)
6771 return generic_force_reloc (fix
);
6775 ppc_fix_adjustable (fixS
*fix
)
6777 switch (fix
->fx_r_type
)
6779 /* All branch fixups targeting a localentry symbol must
6780 continue using the symbol. */
6781 case BFD_RELOC_PPC_B26
:
6782 case BFD_RELOC_PPC_BA26
:
6783 case BFD_RELOC_PPC_B16
:
6784 case BFD_RELOC_PPC_BA16
:
6785 case BFD_RELOC_PPC_B16_BRTAKEN
:
6786 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6787 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6788 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6789 case BFD_RELOC_PPC64_REL24_NOTOC
:
6790 case BFD_RELOC_PPC64_REL24_P9NOTOC
:
6793 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6794 elf_symbol_type
*elfsym
= elf_symbol_from (bfdsym
);
6795 gas_assert (elfsym
);
6796 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6804 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6805 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6806 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6807 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6808 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6809 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6810 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT_PCREL34
6811 && fix
->fx_r_type
!= BFD_RELOC_24_PLT_PCREL
6812 && fix
->fx_r_type
!= BFD_RELOC_32_PLTOFF
6813 && fix
->fx_r_type
!= BFD_RELOC_32_PLT_PCREL
6814 && fix
->fx_r_type
!= BFD_RELOC_LO16_PLTOFF
6815 && fix
->fx_r_type
!= BFD_RELOC_HI16_PLTOFF
6816 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_PLTOFF
6817 && fix
->fx_r_type
!= BFD_RELOC_64_PLTOFF
6818 && fix
->fx_r_type
!= BFD_RELOC_64_PLT_PCREL
6819 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT16_LO_DS
6820 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT_PCREL34
6821 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16
6822 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO
6823 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HI
6824 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HA
6825 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_DS
6826 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO_DS
6827 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6828 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_LO16A
6829 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HI16A
6830 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HA16A
6831 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6832 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6833 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6834 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
));
6839 ppc_frag_check (struct frag
*fragP
)
6841 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
6842 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6843 _("instruction address is not a multiple of %d"),
6844 fragP
->insn_addr
+ 1);
6847 /* rs_align_code frag handling. */
6849 enum ppc_nop_encoding_for_rs_align_code
6858 ppc_nop_select (void)
6860 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
6862 if ((ppc_cpu
& (PPC_OPCODE_POWER9
| PPC_OPCODE_E500MC
)) == 0)
6864 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
6865 return PPC_NOP_GROUP_P7
;
6866 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0)
6867 return PPC_NOP_GROUP_P6
;
6869 return PPC_NOP_VANILLA
;
6873 ppc_handle_align (struct frag
*fragP
)
6875 valueT count
= (fragP
->fr_next
->fr_address
6876 - (fragP
->fr_address
+ fragP
->fr_fix
));
6877 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6878 enum ppc_nop_encoding_for_rs_align_code nop_select
= *dest
& 0xff;
6880 /* Pad with zeros if not inserting a whole number of instructions.
6881 We could pad with zeros up to an instruction boundary then follow
6882 with nops but odd counts indicate data in an executable section
6883 so padding with zeros is most appropriate. */
6885 || (nop_select
== PPC_NOP_VLE
? (count
& 1) != 0 : (count
& 3) != 0))
6891 if (nop_select
== PPC_NOP_VLE
)
6895 md_number_to_chars (dest
, 0x4400, 2);
6901 if (count
> 4 * nop_limit
&& count
< 0x2000000)
6905 /* Make a branch, then follow with nops. Insert another
6906 frag to handle the nops. */
6907 md_number_to_chars (dest
, 0x48000000 + count
, 4);
6912 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6913 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
6914 fragP
->fr_next
= rest
;
6916 rest
->fr_address
+= rest
->fr_fix
+ 4;
6918 /* If we leave the next frag as rs_align_code we'll come here
6919 again, resulting in a bunch of branches rather than a
6920 branch followed by nops. */
6921 rest
->fr_type
= rs_align
;
6922 dest
= rest
->fr_literal
;
6925 md_number_to_chars (dest
, 0x60000000, 4);
6927 if (nop_select
>= PPC_NOP_GROUP_P6
)
6929 /* For power6, power7, and power8, we want the last nop to
6930 be a group terminating one. Do this by inserting an
6931 rs_fill frag immediately after this one, with its address
6932 set to the last nop location. This will automatically
6933 reduce the number of nops in the current frag by one. */
6936 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6938 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
6939 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
6940 group_nop
->fr_fix
= 0;
6941 group_nop
->fr_offset
= 1;
6942 group_nop
->fr_type
= rs_fill
;
6943 fragP
->fr_next
= group_nop
;
6944 dest
= group_nop
->fr_literal
;
6947 if (nop_select
== PPC_NOP_GROUP_P6
)
6948 /* power6 group terminating nop: "ori 1,1,0". */
6949 md_number_to_chars (dest
, 0x60210000, 4);
6951 /* power7/power8 group terminating nop: "ori 2,2,0". */
6952 md_number_to_chars (dest
, 0x60420000, 4);
6957 /* Apply a fixup to the object code. This is called for all the
6958 fixups we generated by the calls to fix_new_exp, above. */
6961 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
6963 valueT value
= * valP
;
6965 const struct powerpc_operand
*operand
;
6968 if (fixP
->fx_addsy
!= NULL
)
6970 /* Hack around bfd_install_relocation brain damage. */
6972 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
6974 if (fixP
->fx_addsy
== abs_section_sym
)
6980 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6981 the symbol values. If we are doing this relocation the code in
6982 write.c is going to call bfd_install_relocation, which is also
6983 going to use the symbol value. That means that if the reloc is
6984 fully resolved we want to use *valP since bfd_install_relocation is
6986 However, if the reloc is not fully resolved we do not want to
6987 use *valP, and must use fx_offset instead. If the relocation
6988 is PC-relative, we then need to re-apply md_pcrel_from_section
6989 to this new relocation value. */
6990 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
6995 value
= fixP
->fx_offset
;
6997 value
-= md_pcrel_from_section (fixP
, seg
);
7001 /* We are only able to convert some relocs to pc-relative. */
7004 switch (fixP
->fx_r_type
)
7007 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
7011 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
7015 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
7018 case BFD_RELOC_LO16
:
7019 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
7022 case BFD_RELOC_HI16
:
7023 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
7026 case BFD_RELOC_HI16_S
:
7027 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
7030 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7031 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGH
;
7034 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7035 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHA
;
7038 case BFD_RELOC_PPC64_HIGHER
:
7039 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER
;
7042 case BFD_RELOC_PPC64_HIGHER_S
:
7043 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA
;
7046 case BFD_RELOC_PPC64_HIGHEST
:
7047 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST
;
7050 case BFD_RELOC_PPC64_HIGHEST_S
:
7051 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA
;
7054 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
7055 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER34
;
7058 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
7059 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA34
;
7062 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
7063 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST34
;
7066 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
7067 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA34
;
7070 case BFD_RELOC_PPC_16DX_HA
:
7071 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7074 case BFD_RELOC_PPC64_D34
:
7075 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL34
;
7078 case BFD_RELOC_PPC64_D28
:
7079 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL28
;
7086 else if (!fixP
->fx_done
7087 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
7089 /* addpcis is relative to next insn address. */
7091 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7096 if (fixP
->fx_pcrel_adjust
!= 0)
7098 /* This is a fixup on an instruction. */
7099 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
7101 operand
= &powerpc_operands
[opindex
];
7103 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
7104 does not generate a reloc. It uses the offset of `sym' within its
7105 csect. Other usages, such as `.long sym', generate relocs. This
7106 is the documented behaviour of non-TOC symbols. */
7107 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
7108 && (operand
->bitm
& 0xfff0) == 0xfff0
7109 && operand
->shift
== 0
7110 && (operand
->insert
== NULL
|| ppc_obj64
)
7111 && fixP
->fx_addsy
!= NULL
7112 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
7113 && !ppc_is_toc_sym (fixP
->fx_addsy
)
7114 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
7116 value
= fixP
->fx_offset
;
7120 /* During parsing of instructions, a TOC16 reloc is generated for
7121 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
7122 in the toc. But at parse time, SYM may be not yet defined, so
7123 check again here. */
7124 if (fixP
->fx_r_type
== BFD_RELOC_16
7125 && fixP
->fx_addsy
!= NULL
7126 && ppc_is_toc_sym (fixP
->fx_addsy
))
7127 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
7131 /* Calculate value to be stored in field. */
7133 switch (fixP
->fx_r_type
)
7136 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
7137 case BFD_RELOC_PPC_VLE_LO16A
:
7138 case BFD_RELOC_PPC_VLE_LO16D
:
7140 case BFD_RELOC_LO16
:
7141 case BFD_RELOC_LO16_PCREL
:
7142 fieldval
= value
& 0xffff;
7144 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7145 fieldval
= SEX16 (fieldval
);
7146 fixP
->fx_no_overflow
= 1;
7149 case BFD_RELOC_HI16
:
7150 case BFD_RELOC_HI16_PCREL
:
7152 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7154 fieldval
= value
>> 16;
7155 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7157 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7158 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7164 case BFD_RELOC_PPC_VLE_HI16A
:
7165 case BFD_RELOC_PPC_VLE_HI16D
:
7166 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7168 fieldval
= PPC_HI (value
);
7169 goto sign_extend_16
;
7171 case BFD_RELOC_HI16_S
:
7172 case BFD_RELOC_HI16_S_PCREL
:
7173 case BFD_RELOC_PPC_16DX_HA
:
7174 case BFD_RELOC_PPC_REL16DX_HA
:
7176 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7178 fieldval
= (value
+ 0x8000) >> 16;
7179 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7181 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7182 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7188 case BFD_RELOC_PPC_VLE_HA16A
:
7189 case BFD_RELOC_PPC_VLE_HA16D
:
7190 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7192 fieldval
= PPC_HA (value
);
7193 goto sign_extend_16
;
7196 case BFD_RELOC_PPC64_HIGHER
:
7197 fieldval
= PPC_HIGHER (value
);
7198 goto sign_extend_16
;
7200 case BFD_RELOC_PPC64_HIGHER_S
:
7201 fieldval
= PPC_HIGHERA (value
);
7202 goto sign_extend_16
;
7204 case BFD_RELOC_PPC64_HIGHEST
:
7205 fieldval
= PPC_HIGHEST (value
);
7206 goto sign_extend_16
;
7208 case BFD_RELOC_PPC64_HIGHEST_S
:
7209 fieldval
= PPC_HIGHESTA (value
);
7210 goto sign_extend_16
;
7217 if (operand
!= NULL
)
7219 /* Handle relocs in an insn. */
7220 switch (fixP
->fx_r_type
)
7223 /* The following relocs can't be calculated by the assembler.
7224 Leave the field zero. */
7225 case BFD_RELOC_PPC_TPREL16
:
7226 case BFD_RELOC_PPC_TPREL16_LO
:
7227 case BFD_RELOC_PPC_TPREL16_HI
:
7228 case BFD_RELOC_PPC_TPREL16_HA
:
7229 case BFD_RELOC_PPC_DTPREL16
:
7230 case BFD_RELOC_PPC_DTPREL16_LO
:
7231 case BFD_RELOC_PPC_DTPREL16_HI
:
7232 case BFD_RELOC_PPC_DTPREL16_HA
:
7233 case BFD_RELOC_PPC_GOT_TLSGD16
:
7234 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7235 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7236 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7237 case BFD_RELOC_PPC_GOT_TLSLD16
:
7238 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7239 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7240 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7241 case BFD_RELOC_PPC_GOT_TPREL16
:
7242 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7243 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7244 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7245 case BFD_RELOC_PPC_GOT_DTPREL16
:
7246 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7247 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7248 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7249 case BFD_RELOC_PPC64_TPREL16_DS
:
7250 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
7251 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7252 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7253 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7254 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7255 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7256 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7257 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7258 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7259 case BFD_RELOC_PPC64_DTPREL16_DS
:
7260 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
7261 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7262 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7263 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7264 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7265 case BFD_RELOC_PPC64_TPREL34
:
7266 case BFD_RELOC_PPC64_DTPREL34
:
7267 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
7268 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
7269 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
7270 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
7271 gas_assert (fixP
->fx_addsy
!= NULL
);
7272 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7276 /* These also should leave the field zero for the same
7277 reason. Note that older versions of gas wrote values
7278 here. If we want to go back to the old behaviour, then
7279 all _LO and _LO_DS cases will need to be treated like
7280 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
7281 case BFD_RELOC_16_GOTOFF
:
7282 case BFD_RELOC_LO16_GOTOFF
:
7283 case BFD_RELOC_HI16_GOTOFF
:
7284 case BFD_RELOC_HI16_S_GOTOFF
:
7285 case BFD_RELOC_LO16_PLTOFF
:
7286 case BFD_RELOC_HI16_PLTOFF
:
7287 case BFD_RELOC_HI16_S_PLTOFF
:
7288 case BFD_RELOC_GPREL16
:
7289 case BFD_RELOC_16_BASEREL
:
7290 case BFD_RELOC_LO16_BASEREL
:
7291 case BFD_RELOC_HI16_BASEREL
:
7292 case BFD_RELOC_HI16_S_BASEREL
:
7293 case BFD_RELOC_PPC_TOC16
:
7294 case BFD_RELOC_PPC64_TOC16_LO
:
7295 case BFD_RELOC_PPC64_TOC16_HI
:
7296 case BFD_RELOC_PPC64_TOC16_HA
:
7297 case BFD_RELOC_PPC64_PLTGOT16
:
7298 case BFD_RELOC_PPC64_PLTGOT16_LO
:
7299 case BFD_RELOC_PPC64_PLTGOT16_HI
:
7300 case BFD_RELOC_PPC64_PLTGOT16_HA
:
7301 case BFD_RELOC_PPC64_GOT16_DS
:
7302 case BFD_RELOC_PPC64_GOT16_LO_DS
:
7303 case BFD_RELOC_PPC64_PLT16_LO_DS
:
7304 case BFD_RELOC_PPC64_SECTOFF_DS
:
7305 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
7306 case BFD_RELOC_PPC64_TOC16_DS
:
7307 case BFD_RELOC_PPC64_TOC16_LO_DS
:
7308 case BFD_RELOC_PPC64_PLTGOT16_DS
:
7309 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
7310 case BFD_RELOC_PPC_EMB_NADDR16
:
7311 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7312 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7313 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7314 case BFD_RELOC_PPC_EMB_SDAI16
:
7315 case BFD_RELOC_PPC_EMB_SDA2I16
:
7316 case BFD_RELOC_PPC_EMB_SDA2REL
:
7317 case BFD_RELOC_PPC_EMB_SDA21
:
7318 case BFD_RELOC_PPC_EMB_MRKREF
:
7319 case BFD_RELOC_PPC_EMB_RELSEC16
:
7320 case BFD_RELOC_PPC_EMB_RELST_LO
:
7321 case BFD_RELOC_PPC_EMB_RELST_HI
:
7322 case BFD_RELOC_PPC_EMB_RELST_HA
:
7323 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7324 case BFD_RELOC_PPC_EMB_RELSDA
:
7325 case BFD_RELOC_PPC_VLE_SDA21
:
7326 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7327 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7328 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
7329 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7330 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
7331 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7332 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
7333 case BFD_RELOC_PPC64_GOT_PCREL34
:
7334 case BFD_RELOC_PPC64_PLT_PCREL34
:
7335 gas_assert (fixP
->fx_addsy
!= NULL
);
7338 case BFD_RELOC_PPC_TLS
:
7339 case BFD_RELOC_PPC_TLSGD
:
7340 case BFD_RELOC_PPC_TLSLD
:
7341 case BFD_RELOC_PPC64_TLS_PCREL
:
7347 case BFD_RELOC_PPC_B16
:
7348 /* Adjust the offset to the instruction boundary. */
7353 case BFD_RELOC_VTABLE_INHERIT
:
7354 case BFD_RELOC_VTABLE_ENTRY
:
7355 case BFD_RELOC_PPC_DTPMOD
:
7356 case BFD_RELOC_PPC_TPREL
:
7357 case BFD_RELOC_PPC_DTPREL
:
7358 case BFD_RELOC_PPC_COPY
:
7359 case BFD_RELOC_PPC_GLOB_DAT
:
7360 case BFD_RELOC_32_PLT_PCREL
:
7361 case BFD_RELOC_PPC_EMB_NADDR32
:
7362 case BFD_RELOC_PPC64_TOC
:
7363 case BFD_RELOC_CTOR
:
7365 case BFD_RELOC_32_PCREL
:
7368 case BFD_RELOC_64_PCREL
:
7369 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7370 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7371 _("%s unsupported as instruction fixup"),
7372 bfd_get_reloc_code_name (fixP
->fx_r_type
));
7381 /* powerpc uses RELA style relocs, so if emitting a reloc the field
7382 contents can stay at zero. */
7383 #define APPLY_RELOC fixP->fx_done
7385 #define APPLY_RELOC 1
7387 /* We need to call the insert function even when fieldval is
7388 zero if the insert function would translate that zero to a
7389 bit pattern other than all zeros. */
7390 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
7393 unsigned char *where
;
7395 /* Fetch the instruction, insert the fully resolved operand
7396 value, and stuff the instruction back again. */
7397 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
7398 if (target_big_endian
)
7400 if (fixP
->fx_size
< 4)
7401 insn
= bfd_getb16 (where
);
7404 insn
= bfd_getb32 (where
);
7405 if (fixP
->fx_size
> 4)
7406 insn
= insn
<< 32 | bfd_getb32 (where
+ 4);
7411 if (fixP
->fx_size
< 4)
7412 insn
= bfd_getl16 (where
);
7415 insn
= bfd_getl32 (where
);
7416 if (fixP
->fx_size
> 4)
7417 insn
= insn
<< 32 | bfd_getl32 (where
+ 4);
7420 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
7421 fixP
->tc_fix_data
.ppc_cpu
,
7422 fixP
->fx_file
, fixP
->fx_line
);
7423 if (target_big_endian
)
7425 if (fixP
->fx_size
< 4)
7426 bfd_putb16 (insn
, where
);
7429 if (fixP
->fx_size
> 4)
7431 bfd_putb32 (insn
, where
+ 4);
7434 bfd_putb32 (insn
, where
);
7439 if (fixP
->fx_size
< 4)
7440 bfd_putl16 (insn
, where
);
7443 if (fixP
->fx_size
> 4)
7445 bfd_putl32 (insn
, where
+ 4);
7448 bfd_putl32 (insn
, where
);
7454 /* Nothing else to do here. */
7457 gas_assert (fixP
->fx_addsy
!= NULL
);
7458 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7463 /* Use expr_symbol_where to see if this is an expression
7465 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7466 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7467 _("unresolved expression that must be resolved"));
7469 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7470 _("unsupported relocation against %s"),
7471 S_GET_NAME (fixP
->fx_addsy
));
7478 /* Handle relocs in data. */
7479 switch (fixP
->fx_r_type
)
7481 case BFD_RELOC_VTABLE_INHERIT
:
7483 && !S_IS_DEFINED (fixP
->fx_addsy
)
7484 && !S_IS_WEAK (fixP
->fx_addsy
))
7485 S_SET_WEAK (fixP
->fx_addsy
);
7488 case BFD_RELOC_VTABLE_ENTRY
:
7493 /* These can appear with @l etc. in data. */
7494 case BFD_RELOC_LO16
:
7495 case BFD_RELOC_LO16_PCREL
:
7496 case BFD_RELOC_HI16
:
7497 case BFD_RELOC_HI16_PCREL
:
7498 case BFD_RELOC_HI16_S
:
7499 case BFD_RELOC_HI16_S_PCREL
:
7500 case BFD_RELOC_PPC64_HIGHER
:
7501 case BFD_RELOC_PPC64_HIGHER_S
:
7502 case BFD_RELOC_PPC64_HIGHEST
:
7503 case BFD_RELOC_PPC64_HIGHEST_S
:
7504 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7505 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7506 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7509 case BFD_RELOC_PPC_DTPMOD
:
7510 case BFD_RELOC_PPC_TPREL
:
7511 case BFD_RELOC_PPC_DTPREL
:
7512 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7515 /* Just punt all of these to the linker. */
7516 case BFD_RELOC_PPC_B16_BRTAKEN
:
7517 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7518 case BFD_RELOC_16_GOTOFF
:
7519 case BFD_RELOC_LO16_GOTOFF
:
7520 case BFD_RELOC_HI16_GOTOFF
:
7521 case BFD_RELOC_HI16_S_GOTOFF
:
7522 case BFD_RELOC_LO16_PLTOFF
:
7523 case BFD_RELOC_HI16_PLTOFF
:
7524 case BFD_RELOC_HI16_S_PLTOFF
:
7525 case BFD_RELOC_PPC_COPY
:
7526 case BFD_RELOC_PPC_GLOB_DAT
:
7527 case BFD_RELOC_16_BASEREL
:
7528 case BFD_RELOC_LO16_BASEREL
:
7529 case BFD_RELOC_HI16_BASEREL
:
7530 case BFD_RELOC_HI16_S_BASEREL
:
7531 case BFD_RELOC_PPC_TLS
:
7532 case BFD_RELOC_PPC_DTPREL16_LO
:
7533 case BFD_RELOC_PPC_DTPREL16_HI
:
7534 case BFD_RELOC_PPC_DTPREL16_HA
:
7535 case BFD_RELOC_PPC_TPREL16_LO
:
7536 case BFD_RELOC_PPC_TPREL16_HI
:
7537 case BFD_RELOC_PPC_TPREL16_HA
:
7538 case BFD_RELOC_PPC_GOT_TLSGD16
:
7539 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7540 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7541 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7542 case BFD_RELOC_PPC_GOT_TLSLD16
:
7543 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7544 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7545 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7546 case BFD_RELOC_PPC_GOT_DTPREL16
:
7547 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7548 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7549 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7550 case BFD_RELOC_PPC_GOT_TPREL16
:
7551 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7552 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7553 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7554 case BFD_RELOC_24_PLT_PCREL
:
7555 case BFD_RELOC_PPC_LOCAL24PC
:
7556 case BFD_RELOC_32_PLT_PCREL
:
7557 case BFD_RELOC_GPREL16
:
7558 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7559 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7560 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7561 case BFD_RELOC_PPC_EMB_NADDR32
:
7562 case BFD_RELOC_PPC_EMB_NADDR16
:
7563 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7564 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7565 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7566 case BFD_RELOC_PPC_EMB_SDAI16
:
7567 case BFD_RELOC_PPC_EMB_SDA2REL
:
7568 case BFD_RELOC_PPC_EMB_SDA2I16
:
7569 case BFD_RELOC_PPC_EMB_SDA21
:
7570 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7571 case BFD_RELOC_PPC_EMB_MRKREF
:
7572 case BFD_RELOC_PPC_EMB_RELSEC16
:
7573 case BFD_RELOC_PPC_EMB_RELST_LO
:
7574 case BFD_RELOC_PPC_EMB_RELST_HI
:
7575 case BFD_RELOC_PPC_EMB_RELST_HA
:
7576 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7577 case BFD_RELOC_PPC_EMB_RELSDA
:
7578 case BFD_RELOC_PPC64_TOC
:
7579 case BFD_RELOC_PPC_TOC16
:
7580 case BFD_RELOC_PPC_TOC16_LO
:
7581 case BFD_RELOC_PPC_TOC16_HI
:
7582 case BFD_RELOC_PPC64_TOC16_LO
:
7583 case BFD_RELOC_PPC64_TOC16_HI
:
7584 case BFD_RELOC_PPC64_TOC16_HA
:
7585 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7586 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7587 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7588 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7589 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7590 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7591 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7592 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7593 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7594 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7595 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7596 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7597 case BFD_RELOC_PPC64_TLS_PCREL
:
7603 case BFD_RELOC_PPC_TLSGD
:
7604 case BFD_RELOC_PPC_TLSLD
:
7605 case BFD_RELOC_PPC_TLSLE
:
7606 case BFD_RELOC_PPC_TLSIE
:
7607 case BFD_RELOC_PPC_TLSM
:
7608 case BFD_RELOC_PPC64_TLSGD
:
7609 case BFD_RELOC_PPC64_TLSLD
:
7610 case BFD_RELOC_PPC64_TLSLE
:
7611 case BFD_RELOC_PPC64_TLSIE
:
7612 case BFD_RELOC_PPC64_TLSM
:
7613 gas_assert (fixP
->fx_addsy
!= NULL
);
7614 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7617 /* Officially, R_TLSML relocations must be from a TOC entry
7618 targeting itself. In practice, this TOC entry is always
7619 named (or .rename) "_$TLSML".
7620 Thus, as it doesn't seem possible to retrieve the symbol
7621 being relocated here, we simply check that the symbol
7622 targeted by R_TLSML is indeed a TOC entry named "_$TLSML".
7623 FIXME: Find a way to correctly check R_TLSML relocations
7624 as described above. */
7625 case BFD_RELOC_PPC_TLSML
:
7626 case BFD_RELOC_PPC64_TLSML
:
7627 gas_assert (fixP
->fx_addsy
!= NULL
);
7628 if ((symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
7629 || symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TE
)
7630 && strcmp (symbol_get_tc (fixP
->fx_addsy
)->real_name
, "_$TLSML") != 0)
7631 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7632 _("R_TLSML relocation doesn't target a "
7633 "TOC entry named \"_$TLSML\": %s"), S_GET_NAME(fixP
->fx_addsy
));
7637 case BFD_RELOC_NONE
:
7639 case BFD_RELOC_CTOR
:
7641 case BFD_RELOC_32_PCREL
:
7644 case BFD_RELOC_64_PCREL
:
7646 case BFD_RELOC_16_PCREL
:
7652 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7657 if (fixP
->fx_size
&& APPLY_RELOC
)
7658 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7659 fieldval
, fixP
->fx_size
);
7661 && (seg
->flags
& SEC_CODE
) != 0
7662 && fixP
->fx_size
== 4
7665 && (fixP
->fx_r_type
== BFD_RELOC_32
7666 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7667 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7668 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7669 _("data in executable section"));
7673 ppc_elf_validate_fix (fixP
, seg
);
7674 fixP
->fx_addnumber
= value
;
7676 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7677 from the section contents. If we are going to be emitting a reloc
7678 then the section contents are immaterial, so don't warn if they
7679 happen to overflow. Leave such warnings to ld. */
7682 fixP
->fx_no_overflow
= 1;
7684 /* Arrange to emit .TOC. as a normal symbol if used in anything
7685 but .TOC.@tocbase. */
7687 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7688 && fixP
->fx_addsy
!= NULL
7689 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7690 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7693 if (fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16
7694 || fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_HI
7695 || fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_LO
)
7697 /* We want to use the offset within the toc, not the actual VMA
7699 fixP
->fx_addnumber
= (- bfd_section_vma (S_GET_SEGMENT (fixP
->fx_addsy
))
7700 - S_GET_VALUE (ppc_toc_csect
));
7702 /* The high bits must be adjusted for the low bits being signed. */
7703 if (fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_HI
) {
7704 fixP
->fx_addnumber
+= 0x8000;
7707 /* Set *valP to avoid errors. */
7710 else if (fixP
->fx_r_type
== BFD_RELOC_PPC_TLSM
7711 || fixP
->fx_r_type
== BFD_RELOC_PPC64_TLSM
7712 || fixP
->fx_r_type
== BFD_RELOC_PPC_TLSML
7713 || fixP
->fx_r_type
== BFD_RELOC_PPC64_TLSML
)
7714 /* AIX ld expects the section contents for these relocations
7715 to be zero. Arrange for that to occur when
7716 bfd_install_relocation is called. */
7717 fixP
->fx_addnumber
= (- bfd_section_vma (S_GET_SEGMENT (fixP
->fx_addsy
))
7718 - S_GET_VALUE (fixP
->fx_addsy
)
7721 fixP
->fx_addnumber
= 0;
7725 /* Generate a reloc for a fixup. */
7728 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7730 static arelent
*relocs
[3];
7733 relocs
[0] = reloc
= XNEW (arelent
);
7736 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7737 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7738 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7739 /* BFD_RELOC_PPC64_TLS_PCREL generates R_PPC64_TLS with an odd r_offset. */
7740 if (fixp
->fx_r_type
== BFD_RELOC_PPC64_TLS_PCREL
)
7742 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7743 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7745 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7746 _("reloc %d not supported by object file format"),
7747 (int) fixp
->fx_r_type
);
7750 reloc
->addend
= fixp
->fx_addnumber
;
7752 if (fixp
->fx_subsy
!= NULL
)
7754 relocs
[1] = reloc
= XNEW (arelent
);
7757 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7758 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
7759 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7761 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_PPC_NEG
);
7762 reloc
->addend
= fixp
->fx_addnumber
;
7764 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7766 as_bad_subtract (fixp
);
7767 free (relocs
[1]->sym_ptr_ptr
);
7769 free (relocs
[0]->sym_ptr_ptr
);
7780 ppc_cfi_frame_initial_instructions (void)
7782 cfi_add_CFA_def_cfa (1, 0);
7786 tc_ppc_regname_to_dw2regnum (char *regname
)
7788 unsigned int regnum
= -1;
7792 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7794 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7795 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7796 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7797 { "spe_acc", 111 }, { "spefscr", 112 }
7800 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7801 if (strcmp (regnames
[i
].name
, regname
) == 0)
7802 return regnames
[i
].dw2regnum
;
7804 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7806 p
= regname
+ 1 + (regname
[1] == '.');
7807 regnum
= strtoul (p
, &q
, 10);
7808 if (p
== q
|| *q
|| regnum
>= 32)
7810 if (regname
[0] == 'f')
7812 else if (regname
[0] == 'v')
7815 else if (regname
[0] == 'c' && regname
[1] == 'r')
7817 p
= regname
+ 2 + (regname
[2] == '.');
7818 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7820 regnum
= p
[0] - '0' + 68;