1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2021 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
35 #include "coff/xcoff.h"
39 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
41 /* Tell the main code what the endianness is. */
42 extern int target_big_endian
;
44 /* Whether or not, we've set target_big_endian. */
45 static int set_target_endian
= 0;
47 /* Whether to use user friendly register names. */
48 #ifndef TARGET_REG_NAMES_P
49 #define TARGET_REG_NAMES_P false
52 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
55 /* #lo(value) denotes the least significant 16 bits of the indicated. */
56 #define PPC_LO(v) ((v) & 0xffff)
58 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
59 #define PPC_HI(v) (((v) >> 16) & 0xffff)
61 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
62 the indicated value, compensating for #lo() being treated as a
64 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
66 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
67 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
69 /* #highera(value) denotes bits 32 through 47 of the indicated value,
70 compensating for #lo() being treated as a signed number. */
71 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
73 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
74 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
76 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
77 compensating for #lo being treated as a signed number. */
78 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
80 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
82 /* For the time being on ppc64, don't report overflow on @h and @ha
83 applied to constants. */
84 #define REPORT_OVERFLOW_HI 0
86 static bool reg_names_p
= TARGET_REG_NAMES_P
;
88 static void ppc_macro (char *, const struct powerpc_macro
*);
89 static void ppc_byte (int);
91 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
92 static void ppc_tc (int);
93 static void ppc_machine (int);
97 static void ppc_comm (int);
98 static void ppc_bb (int);
99 static void ppc_bc (int);
100 static void ppc_bf (int);
101 static void ppc_biei (int);
102 static void ppc_bs (int);
103 static void ppc_eb (int);
104 static void ppc_ec (int);
105 static void ppc_ef (int);
106 static void ppc_es (int);
107 static void ppc_csect (int);
108 static void ppc_dwsect (int);
109 static void ppc_change_csect (symbolS
*, offsetT
);
110 static void ppc_function (int);
111 static void ppc_extern (int);
112 static void ppc_lglobl (int);
113 static void ppc_ref (int);
114 static void ppc_section (int);
115 static void ppc_named_section (int);
116 static void ppc_stabx (int);
117 static void ppc_rename (int);
118 static void ppc_toc (int);
119 static void ppc_xcoff_cons (int);
120 static void ppc_vbyte (int);
124 static void ppc_elf_rdata (int);
125 static void ppc_elf_lcomm (int);
126 static void ppc_elf_localentry (int);
127 static void ppc_elf_abiversion (int);
128 static void ppc_elf_gnu_attribute (int);
131 /* Generic assembler global variables which must be defined by all
135 /* This string holds the chars that always start a comment. If the
136 pre-processor is disabled, these aren't very useful. The macro
137 tc_comment_chars points to this. We use this, rather than the
138 usual comment_chars, so that we can switch for Solaris conventions. */
139 static const char ppc_solaris_comment_chars
[] = "#!";
140 static const char ppc_eabi_comment_chars
[] = "#";
142 #ifdef TARGET_SOLARIS_COMMENT
143 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
145 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
148 const char comment_chars
[] = "#";
151 /* Characters which start a comment at the beginning of a line. */
152 const char line_comment_chars
[] = "#";
154 /* Characters which may be used to separate multiple commands on a
156 const char line_separator_chars
[] = ";";
158 /* Characters which are used to indicate an exponent in a floating
160 const char EXP_CHARS
[] = "eE";
162 /* Characters which mean that a number is a floating point constant,
164 const char FLT_CHARS
[] = "dD";
166 /* Anything that can start an operand needs to be mentioned here,
167 to stop the input scrubber eating whitespace. */
168 const char ppc_symbol_chars
[] = "%[";
170 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
171 int ppc_cie_data_alignment
;
173 /* The dwarf2 minimum instruction length. */
174 int ppc_dwarf2_line_min_insn_length
;
176 /* More than this number of nops in an alignment op gets a branch
178 unsigned long nop_limit
= 4;
180 /* The type of processor we are assembling for. This is one or more
181 of the PPC_OPCODE flags defined in opcode/ppc.h. */
182 ppc_cpu_t ppc_cpu
= 0;
183 ppc_cpu_t sticky
= 0;
185 /* Value for ELF e_flags EF_PPC64_ABI. */
186 unsigned int ppc_abiversion
= 0;
189 /* Flags set on encountering toc relocs. */
191 has_large_toc_reloc
= 1,
192 has_small_toc_reloc
= 2
196 /* Warn on emitting data to code sections. */
202 /* The target specific pseudo-ops which we support. */
204 const pseudo_typeS md_pseudo_table
[] =
206 /* Pseudo-ops which must be overridden. */
207 { "byte", ppc_byte
, 0 },
210 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
211 legitimately belong in the obj-*.c file. However, XCOFF is based
212 on COFF, and is only implemented for the RS/6000. We just use
213 obj-coff.c, and add what we need here. */
214 { "comm", ppc_comm
, 0 },
215 { "lcomm", ppc_comm
, 1 },
219 { "bi", ppc_biei
, 0 },
221 { "csect", ppc_csect
, 0 },
222 { "dwsect", ppc_dwsect
, 0 },
223 { "data", ppc_section
, 'd' },
227 { "ei", ppc_biei
, 1 },
229 { "extern", ppc_extern
, 0 },
230 { "function", ppc_function
, 0 },
231 { "lglobl", ppc_lglobl
, 0 },
232 { "ref", ppc_ref
, 0 },
233 { "rename", ppc_rename
, 0 },
234 { "section", ppc_named_section
, 0 },
235 { "stabx", ppc_stabx
, 0 },
236 { "text", ppc_section
, 't' },
237 { "toc", ppc_toc
, 0 },
238 { "long", ppc_xcoff_cons
, 2 },
239 { "llong", ppc_xcoff_cons
, 3 },
240 { "word", ppc_xcoff_cons
, 1 },
241 { "short", ppc_xcoff_cons
, 1 },
242 { "vbyte", ppc_vbyte
, 0 },
246 { "llong", cons
, 8 },
247 { "rdata", ppc_elf_rdata
, 0 },
248 { "rodata", ppc_elf_rdata
, 0 },
249 { "lcomm", ppc_elf_lcomm
, 0 },
250 { "localentry", ppc_elf_localentry
, 0 },
251 { "abiversion", ppc_elf_abiversion
, 0 },
252 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
255 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
257 { "machine", ppc_machine
, 0 },
264 /* Predefined register names if -mregnames (or default for Windows NT).
265 In general, there are lots of them, in an attempt to be compatible
266 with a number of other Windows NT assemblers. */
268 /* Structure to hold information about predefined registers. */
272 unsigned short value
;
273 unsigned short flags
;
276 /* List of registers that are pre-defined:
278 Each general register has predefined names of the form:
279 1. r<reg_num> which has the value <reg_num>.
280 2. r.<reg_num> which has the value <reg_num>.
282 Each floating point register has predefined names of the form:
283 1. f<reg_num> which has the value <reg_num>.
284 2. f.<reg_num> which has the value <reg_num>.
286 Each vector unit register has predefined names of the form:
287 1. v<reg_num> which has the value <reg_num>.
288 2. v.<reg_num> which has the value <reg_num>.
290 Each condition register has predefined names of the form:
291 1. cr<reg_num> which has the value <reg_num>.
292 2. cr.<reg_num> which has the value <reg_num>.
294 There are individual registers as well:
295 sp or r.sp has the value 1
296 rtoc or r.toc has the value 2
301 dsisr has the value 18
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
307 The table is sorted. Suitable for searching by a binary search. */
309 static const struct pd_reg pre_defined_registers
[] =
311 /* VSX accumulators. */
312 { "a0", 0, PPC_OPERAND_ACC
},
313 { "a1", 1, PPC_OPERAND_ACC
},
314 { "a2", 2, PPC_OPERAND_ACC
},
315 { "a3", 3, PPC_OPERAND_ACC
},
316 { "a4", 4, PPC_OPERAND_ACC
},
317 { "a5", 5, PPC_OPERAND_ACC
},
318 { "a6", 6, PPC_OPERAND_ACC
},
319 { "a7", 7, PPC_OPERAND_ACC
},
321 /* Condition Registers */
322 { "cr.0", 0, PPC_OPERAND_CR_REG
},
323 { "cr.1", 1, PPC_OPERAND_CR_REG
},
324 { "cr.2", 2, PPC_OPERAND_CR_REG
},
325 { "cr.3", 3, PPC_OPERAND_CR_REG
},
326 { "cr.4", 4, PPC_OPERAND_CR_REG
},
327 { "cr.5", 5, PPC_OPERAND_CR_REG
},
328 { "cr.6", 6, PPC_OPERAND_CR_REG
},
329 { "cr.7", 7, PPC_OPERAND_CR_REG
},
331 { "cr0", 0, PPC_OPERAND_CR_REG
},
332 { "cr1", 1, PPC_OPERAND_CR_REG
},
333 { "cr2", 2, PPC_OPERAND_CR_REG
},
334 { "cr3", 3, PPC_OPERAND_CR_REG
},
335 { "cr4", 4, PPC_OPERAND_CR_REG
},
336 { "cr5", 5, PPC_OPERAND_CR_REG
},
337 { "cr6", 6, PPC_OPERAND_CR_REG
},
338 { "cr7", 7, PPC_OPERAND_CR_REG
},
340 { "ctr", 9, PPC_OPERAND_SPR
},
341 { "dar", 19, PPC_OPERAND_SPR
},
342 { "dec", 22, PPC_OPERAND_SPR
},
343 { "dsisr", 18, PPC_OPERAND_SPR
},
345 /* Floating point registers */
346 { "f.0", 0, PPC_OPERAND_FPR
},
347 { "f.1", 1, PPC_OPERAND_FPR
},
348 { "f.10", 10, PPC_OPERAND_FPR
},
349 { "f.11", 11, PPC_OPERAND_FPR
},
350 { "f.12", 12, PPC_OPERAND_FPR
},
351 { "f.13", 13, PPC_OPERAND_FPR
},
352 { "f.14", 14, PPC_OPERAND_FPR
},
353 { "f.15", 15, PPC_OPERAND_FPR
},
354 { "f.16", 16, PPC_OPERAND_FPR
},
355 { "f.17", 17, PPC_OPERAND_FPR
},
356 { "f.18", 18, PPC_OPERAND_FPR
},
357 { "f.19", 19, PPC_OPERAND_FPR
},
358 { "f.2", 2, PPC_OPERAND_FPR
},
359 { "f.20", 20, PPC_OPERAND_FPR
},
360 { "f.21", 21, PPC_OPERAND_FPR
},
361 { "f.22", 22, PPC_OPERAND_FPR
},
362 { "f.23", 23, PPC_OPERAND_FPR
},
363 { "f.24", 24, PPC_OPERAND_FPR
},
364 { "f.25", 25, PPC_OPERAND_FPR
},
365 { "f.26", 26, PPC_OPERAND_FPR
},
366 { "f.27", 27, PPC_OPERAND_FPR
},
367 { "f.28", 28, PPC_OPERAND_FPR
},
368 { "f.29", 29, PPC_OPERAND_FPR
},
369 { "f.3", 3, PPC_OPERAND_FPR
},
370 { "f.30", 30, PPC_OPERAND_FPR
},
371 { "f.31", 31, PPC_OPERAND_FPR
},
372 { "f.32", 32, PPC_OPERAND_VSR
},
373 { "f.33", 33, PPC_OPERAND_VSR
},
374 { "f.34", 34, PPC_OPERAND_VSR
},
375 { "f.35", 35, PPC_OPERAND_VSR
},
376 { "f.36", 36, PPC_OPERAND_VSR
},
377 { "f.37", 37, PPC_OPERAND_VSR
},
378 { "f.38", 38, PPC_OPERAND_VSR
},
379 { "f.39", 39, PPC_OPERAND_VSR
},
380 { "f.4", 4, PPC_OPERAND_FPR
},
381 { "f.40", 40, PPC_OPERAND_VSR
},
382 { "f.41", 41, PPC_OPERAND_VSR
},
383 { "f.42", 42, PPC_OPERAND_VSR
},
384 { "f.43", 43, PPC_OPERAND_VSR
},
385 { "f.44", 44, PPC_OPERAND_VSR
},
386 { "f.45", 45, PPC_OPERAND_VSR
},
387 { "f.46", 46, PPC_OPERAND_VSR
},
388 { "f.47", 47, PPC_OPERAND_VSR
},
389 { "f.48", 48, PPC_OPERAND_VSR
},
390 { "f.49", 49, PPC_OPERAND_VSR
},
391 { "f.5", 5, PPC_OPERAND_FPR
},
392 { "f.50", 50, PPC_OPERAND_VSR
},
393 { "f.51", 51, PPC_OPERAND_VSR
},
394 { "f.52", 52, PPC_OPERAND_VSR
},
395 { "f.53", 53, PPC_OPERAND_VSR
},
396 { "f.54", 54, PPC_OPERAND_VSR
},
397 { "f.55", 55, PPC_OPERAND_VSR
},
398 { "f.56", 56, PPC_OPERAND_VSR
},
399 { "f.57", 57, PPC_OPERAND_VSR
},
400 { "f.58", 58, PPC_OPERAND_VSR
},
401 { "f.59", 59, PPC_OPERAND_VSR
},
402 { "f.6", 6, PPC_OPERAND_FPR
},
403 { "f.60", 60, PPC_OPERAND_VSR
},
404 { "f.61", 61, PPC_OPERAND_VSR
},
405 { "f.62", 62, PPC_OPERAND_VSR
},
406 { "f.63", 63, PPC_OPERAND_VSR
},
407 { "f.7", 7, PPC_OPERAND_FPR
},
408 { "f.8", 8, PPC_OPERAND_FPR
},
409 { "f.9", 9, PPC_OPERAND_FPR
},
411 { "f0", 0, PPC_OPERAND_FPR
},
412 { "f1", 1, PPC_OPERAND_FPR
},
413 { "f10", 10, PPC_OPERAND_FPR
},
414 { "f11", 11, PPC_OPERAND_FPR
},
415 { "f12", 12, PPC_OPERAND_FPR
},
416 { "f13", 13, PPC_OPERAND_FPR
},
417 { "f14", 14, PPC_OPERAND_FPR
},
418 { "f15", 15, PPC_OPERAND_FPR
},
419 { "f16", 16, PPC_OPERAND_FPR
},
420 { "f17", 17, PPC_OPERAND_FPR
},
421 { "f18", 18, PPC_OPERAND_FPR
},
422 { "f19", 19, PPC_OPERAND_FPR
},
423 { "f2", 2, PPC_OPERAND_FPR
},
424 { "f20", 20, PPC_OPERAND_FPR
},
425 { "f21", 21, PPC_OPERAND_FPR
},
426 { "f22", 22, PPC_OPERAND_FPR
},
427 { "f23", 23, PPC_OPERAND_FPR
},
428 { "f24", 24, PPC_OPERAND_FPR
},
429 { "f25", 25, PPC_OPERAND_FPR
},
430 { "f26", 26, PPC_OPERAND_FPR
},
431 { "f27", 27, PPC_OPERAND_FPR
},
432 { "f28", 28, PPC_OPERAND_FPR
},
433 { "f29", 29, PPC_OPERAND_FPR
},
434 { "f3", 3, PPC_OPERAND_FPR
},
435 { "f30", 30, PPC_OPERAND_FPR
},
436 { "f31", 31, PPC_OPERAND_FPR
},
437 { "f32", 32, PPC_OPERAND_VSR
},
438 { "f33", 33, PPC_OPERAND_VSR
},
439 { "f34", 34, PPC_OPERAND_VSR
},
440 { "f35", 35, PPC_OPERAND_VSR
},
441 { "f36", 36, PPC_OPERAND_VSR
},
442 { "f37", 37, PPC_OPERAND_VSR
},
443 { "f38", 38, PPC_OPERAND_VSR
},
444 { "f39", 39, PPC_OPERAND_VSR
},
445 { "f4", 4, PPC_OPERAND_FPR
},
446 { "f40", 40, PPC_OPERAND_VSR
},
447 { "f41", 41, PPC_OPERAND_VSR
},
448 { "f42", 42, PPC_OPERAND_VSR
},
449 { "f43", 43, PPC_OPERAND_VSR
},
450 { "f44", 44, PPC_OPERAND_VSR
},
451 { "f45", 45, PPC_OPERAND_VSR
},
452 { "f46", 46, PPC_OPERAND_VSR
},
453 { "f47", 47, PPC_OPERAND_VSR
},
454 { "f48", 48, PPC_OPERAND_VSR
},
455 { "f49", 49, PPC_OPERAND_VSR
},
456 { "f5", 5, PPC_OPERAND_FPR
},
457 { "f50", 50, PPC_OPERAND_VSR
},
458 { "f51", 51, PPC_OPERAND_VSR
},
459 { "f52", 52, PPC_OPERAND_VSR
},
460 { "f53", 53, PPC_OPERAND_VSR
},
461 { "f54", 54, PPC_OPERAND_VSR
},
462 { "f55", 55, PPC_OPERAND_VSR
},
463 { "f56", 56, PPC_OPERAND_VSR
},
464 { "f57", 57, PPC_OPERAND_VSR
},
465 { "f58", 58, PPC_OPERAND_VSR
},
466 { "f59", 59, PPC_OPERAND_VSR
},
467 { "f6", 6, PPC_OPERAND_FPR
},
468 { "f60", 60, PPC_OPERAND_VSR
},
469 { "f61", 61, PPC_OPERAND_VSR
},
470 { "f62", 62, PPC_OPERAND_VSR
},
471 { "f63", 63, PPC_OPERAND_VSR
},
472 { "f7", 7, PPC_OPERAND_FPR
},
473 { "f8", 8, PPC_OPERAND_FPR
},
474 { "f9", 9, PPC_OPERAND_FPR
},
476 /* Quantization registers used with pair single instructions. */
477 { "gqr.0", 0, PPC_OPERAND_GQR
},
478 { "gqr.1", 1, PPC_OPERAND_GQR
},
479 { "gqr.2", 2, PPC_OPERAND_GQR
},
480 { "gqr.3", 3, PPC_OPERAND_GQR
},
481 { "gqr.4", 4, PPC_OPERAND_GQR
},
482 { "gqr.5", 5, PPC_OPERAND_GQR
},
483 { "gqr.6", 6, PPC_OPERAND_GQR
},
484 { "gqr.7", 7, PPC_OPERAND_GQR
},
485 { "gqr0", 0, PPC_OPERAND_GQR
},
486 { "gqr1", 1, PPC_OPERAND_GQR
},
487 { "gqr2", 2, PPC_OPERAND_GQR
},
488 { "gqr3", 3, PPC_OPERAND_GQR
},
489 { "gqr4", 4, PPC_OPERAND_GQR
},
490 { "gqr5", 5, PPC_OPERAND_GQR
},
491 { "gqr6", 6, PPC_OPERAND_GQR
},
492 { "gqr7", 7, PPC_OPERAND_GQR
},
494 { "lr", 8, PPC_OPERAND_SPR
},
496 /* General Purpose Registers */
497 { "r.0", 0, PPC_OPERAND_GPR
},
498 { "r.1", 1, PPC_OPERAND_GPR
},
499 { "r.10", 10, PPC_OPERAND_GPR
},
500 { "r.11", 11, PPC_OPERAND_GPR
},
501 { "r.12", 12, PPC_OPERAND_GPR
},
502 { "r.13", 13, PPC_OPERAND_GPR
},
503 { "r.14", 14, PPC_OPERAND_GPR
},
504 { "r.15", 15, PPC_OPERAND_GPR
},
505 { "r.16", 16, PPC_OPERAND_GPR
},
506 { "r.17", 17, PPC_OPERAND_GPR
},
507 { "r.18", 18, PPC_OPERAND_GPR
},
508 { "r.19", 19, PPC_OPERAND_GPR
},
509 { "r.2", 2, PPC_OPERAND_GPR
},
510 { "r.20", 20, PPC_OPERAND_GPR
},
511 { "r.21", 21, PPC_OPERAND_GPR
},
512 { "r.22", 22, PPC_OPERAND_GPR
},
513 { "r.23", 23, PPC_OPERAND_GPR
},
514 { "r.24", 24, PPC_OPERAND_GPR
},
515 { "r.25", 25, PPC_OPERAND_GPR
},
516 { "r.26", 26, PPC_OPERAND_GPR
},
517 { "r.27", 27, PPC_OPERAND_GPR
},
518 { "r.28", 28, PPC_OPERAND_GPR
},
519 { "r.29", 29, PPC_OPERAND_GPR
},
520 { "r.3", 3, PPC_OPERAND_GPR
},
521 { "r.30", 30, PPC_OPERAND_GPR
},
522 { "r.31", 31, PPC_OPERAND_GPR
},
523 { "r.4", 4, PPC_OPERAND_GPR
},
524 { "r.5", 5, PPC_OPERAND_GPR
},
525 { "r.6", 6, PPC_OPERAND_GPR
},
526 { "r.7", 7, PPC_OPERAND_GPR
},
527 { "r.8", 8, PPC_OPERAND_GPR
},
528 { "r.9", 9, PPC_OPERAND_GPR
},
530 { "r.sp", 1, PPC_OPERAND_GPR
},
532 { "r.toc", 2, PPC_OPERAND_GPR
},
534 { "r0", 0, PPC_OPERAND_GPR
},
535 { "r1", 1, PPC_OPERAND_GPR
},
536 { "r10", 10, PPC_OPERAND_GPR
},
537 { "r11", 11, PPC_OPERAND_GPR
},
538 { "r12", 12, PPC_OPERAND_GPR
},
539 { "r13", 13, PPC_OPERAND_GPR
},
540 { "r14", 14, PPC_OPERAND_GPR
},
541 { "r15", 15, PPC_OPERAND_GPR
},
542 { "r16", 16, PPC_OPERAND_GPR
},
543 { "r17", 17, PPC_OPERAND_GPR
},
544 { "r18", 18, PPC_OPERAND_GPR
},
545 { "r19", 19, PPC_OPERAND_GPR
},
546 { "r2", 2, PPC_OPERAND_GPR
},
547 { "r20", 20, PPC_OPERAND_GPR
},
548 { "r21", 21, PPC_OPERAND_GPR
},
549 { "r22", 22, PPC_OPERAND_GPR
},
550 { "r23", 23, PPC_OPERAND_GPR
},
551 { "r24", 24, PPC_OPERAND_GPR
},
552 { "r25", 25, PPC_OPERAND_GPR
},
553 { "r26", 26, PPC_OPERAND_GPR
},
554 { "r27", 27, PPC_OPERAND_GPR
},
555 { "r28", 28, PPC_OPERAND_GPR
},
556 { "r29", 29, PPC_OPERAND_GPR
},
557 { "r3", 3, PPC_OPERAND_GPR
},
558 { "r30", 30, PPC_OPERAND_GPR
},
559 { "r31", 31, PPC_OPERAND_GPR
},
560 { "r4", 4, PPC_OPERAND_GPR
},
561 { "r5", 5, PPC_OPERAND_GPR
},
562 { "r6", 6, PPC_OPERAND_GPR
},
563 { "r7", 7, PPC_OPERAND_GPR
},
564 { "r8", 8, PPC_OPERAND_GPR
},
565 { "r9", 9, PPC_OPERAND_GPR
},
567 { "rtoc", 2, PPC_OPERAND_GPR
},
569 { "sdr1", 25, PPC_OPERAND_SPR
},
571 { "sp", 1, PPC_OPERAND_GPR
},
573 { "srr0", 26, PPC_OPERAND_SPR
},
574 { "srr1", 27, PPC_OPERAND_SPR
},
576 /* Vector (Altivec/VMX) registers */
577 { "v.0", 0, PPC_OPERAND_VR
},
578 { "v.1", 1, PPC_OPERAND_VR
},
579 { "v.10", 10, PPC_OPERAND_VR
},
580 { "v.11", 11, PPC_OPERAND_VR
},
581 { "v.12", 12, PPC_OPERAND_VR
},
582 { "v.13", 13, PPC_OPERAND_VR
},
583 { "v.14", 14, PPC_OPERAND_VR
},
584 { "v.15", 15, PPC_OPERAND_VR
},
585 { "v.16", 16, PPC_OPERAND_VR
},
586 { "v.17", 17, PPC_OPERAND_VR
},
587 { "v.18", 18, PPC_OPERAND_VR
},
588 { "v.19", 19, PPC_OPERAND_VR
},
589 { "v.2", 2, PPC_OPERAND_VR
},
590 { "v.20", 20, PPC_OPERAND_VR
},
591 { "v.21", 21, PPC_OPERAND_VR
},
592 { "v.22", 22, PPC_OPERAND_VR
},
593 { "v.23", 23, PPC_OPERAND_VR
},
594 { "v.24", 24, PPC_OPERAND_VR
},
595 { "v.25", 25, PPC_OPERAND_VR
},
596 { "v.26", 26, PPC_OPERAND_VR
},
597 { "v.27", 27, PPC_OPERAND_VR
},
598 { "v.28", 28, PPC_OPERAND_VR
},
599 { "v.29", 29, PPC_OPERAND_VR
},
600 { "v.3", 3, PPC_OPERAND_VR
},
601 { "v.30", 30, PPC_OPERAND_VR
},
602 { "v.31", 31, PPC_OPERAND_VR
},
603 { "v.4", 4, PPC_OPERAND_VR
},
604 { "v.5", 5, PPC_OPERAND_VR
},
605 { "v.6", 6, PPC_OPERAND_VR
},
606 { "v.7", 7, PPC_OPERAND_VR
},
607 { "v.8", 8, PPC_OPERAND_VR
},
608 { "v.9", 9, PPC_OPERAND_VR
},
610 { "v0", 0, PPC_OPERAND_VR
},
611 { "v1", 1, PPC_OPERAND_VR
},
612 { "v10", 10, PPC_OPERAND_VR
},
613 { "v11", 11, PPC_OPERAND_VR
},
614 { "v12", 12, PPC_OPERAND_VR
},
615 { "v13", 13, PPC_OPERAND_VR
},
616 { "v14", 14, PPC_OPERAND_VR
},
617 { "v15", 15, PPC_OPERAND_VR
},
618 { "v16", 16, PPC_OPERAND_VR
},
619 { "v17", 17, PPC_OPERAND_VR
},
620 { "v18", 18, PPC_OPERAND_VR
},
621 { "v19", 19, PPC_OPERAND_VR
},
622 { "v2", 2, PPC_OPERAND_VR
},
623 { "v20", 20, PPC_OPERAND_VR
},
624 { "v21", 21, PPC_OPERAND_VR
},
625 { "v22", 22, PPC_OPERAND_VR
},
626 { "v23", 23, PPC_OPERAND_VR
},
627 { "v24", 24, PPC_OPERAND_VR
},
628 { "v25", 25, PPC_OPERAND_VR
},
629 { "v26", 26, PPC_OPERAND_VR
},
630 { "v27", 27, PPC_OPERAND_VR
},
631 { "v28", 28, PPC_OPERAND_VR
},
632 { "v29", 29, PPC_OPERAND_VR
},
633 { "v3", 3, PPC_OPERAND_VR
},
634 { "v30", 30, PPC_OPERAND_VR
},
635 { "v31", 31, PPC_OPERAND_VR
},
636 { "v4", 4, PPC_OPERAND_VR
},
637 { "v5", 5, PPC_OPERAND_VR
},
638 { "v6", 6, PPC_OPERAND_VR
},
639 { "v7", 7, PPC_OPERAND_VR
},
640 { "v8", 8, PPC_OPERAND_VR
},
641 { "v9", 9, PPC_OPERAND_VR
},
643 /* Vector Scalar (VSX) registers (ISA 2.06). */
644 { "vs.0", 0, PPC_OPERAND_VSR
},
645 { "vs.1", 1, PPC_OPERAND_VSR
},
646 { "vs.10", 10, PPC_OPERAND_VSR
},
647 { "vs.11", 11, PPC_OPERAND_VSR
},
648 { "vs.12", 12, PPC_OPERAND_VSR
},
649 { "vs.13", 13, PPC_OPERAND_VSR
},
650 { "vs.14", 14, PPC_OPERAND_VSR
},
651 { "vs.15", 15, PPC_OPERAND_VSR
},
652 { "vs.16", 16, PPC_OPERAND_VSR
},
653 { "vs.17", 17, PPC_OPERAND_VSR
},
654 { "vs.18", 18, PPC_OPERAND_VSR
},
655 { "vs.19", 19, PPC_OPERAND_VSR
},
656 { "vs.2", 2, PPC_OPERAND_VSR
},
657 { "vs.20", 20, PPC_OPERAND_VSR
},
658 { "vs.21", 21, PPC_OPERAND_VSR
},
659 { "vs.22", 22, PPC_OPERAND_VSR
},
660 { "vs.23", 23, PPC_OPERAND_VSR
},
661 { "vs.24", 24, PPC_OPERAND_VSR
},
662 { "vs.25", 25, PPC_OPERAND_VSR
},
663 { "vs.26", 26, PPC_OPERAND_VSR
},
664 { "vs.27", 27, PPC_OPERAND_VSR
},
665 { "vs.28", 28, PPC_OPERAND_VSR
},
666 { "vs.29", 29, PPC_OPERAND_VSR
},
667 { "vs.3", 3, PPC_OPERAND_VSR
},
668 { "vs.30", 30, PPC_OPERAND_VSR
},
669 { "vs.31", 31, PPC_OPERAND_VSR
},
670 { "vs.32", 32, PPC_OPERAND_VSR
},
671 { "vs.33", 33, PPC_OPERAND_VSR
},
672 { "vs.34", 34, PPC_OPERAND_VSR
},
673 { "vs.35", 35, PPC_OPERAND_VSR
},
674 { "vs.36", 36, PPC_OPERAND_VSR
},
675 { "vs.37", 37, PPC_OPERAND_VSR
},
676 { "vs.38", 38, PPC_OPERAND_VSR
},
677 { "vs.39", 39, PPC_OPERAND_VSR
},
678 { "vs.4", 4, PPC_OPERAND_VSR
},
679 { "vs.40", 40, PPC_OPERAND_VSR
},
680 { "vs.41", 41, PPC_OPERAND_VSR
},
681 { "vs.42", 42, PPC_OPERAND_VSR
},
682 { "vs.43", 43, PPC_OPERAND_VSR
},
683 { "vs.44", 44, PPC_OPERAND_VSR
},
684 { "vs.45", 45, PPC_OPERAND_VSR
},
685 { "vs.46", 46, PPC_OPERAND_VSR
},
686 { "vs.47", 47, PPC_OPERAND_VSR
},
687 { "vs.48", 48, PPC_OPERAND_VSR
},
688 { "vs.49", 49, PPC_OPERAND_VSR
},
689 { "vs.5", 5, PPC_OPERAND_VSR
},
690 { "vs.50", 50, PPC_OPERAND_VSR
},
691 { "vs.51", 51, PPC_OPERAND_VSR
},
692 { "vs.52", 52, PPC_OPERAND_VSR
},
693 { "vs.53", 53, PPC_OPERAND_VSR
},
694 { "vs.54", 54, PPC_OPERAND_VSR
},
695 { "vs.55", 55, PPC_OPERAND_VSR
},
696 { "vs.56", 56, PPC_OPERAND_VSR
},
697 { "vs.57", 57, PPC_OPERAND_VSR
},
698 { "vs.58", 58, PPC_OPERAND_VSR
},
699 { "vs.59", 59, PPC_OPERAND_VSR
},
700 { "vs.6", 6, PPC_OPERAND_VSR
},
701 { "vs.60", 60, PPC_OPERAND_VSR
},
702 { "vs.61", 61, PPC_OPERAND_VSR
},
703 { "vs.62", 62, PPC_OPERAND_VSR
},
704 { "vs.63", 63, PPC_OPERAND_VSR
},
705 { "vs.7", 7, PPC_OPERAND_VSR
},
706 { "vs.8", 8, PPC_OPERAND_VSR
},
707 { "vs.9", 9, PPC_OPERAND_VSR
},
709 { "vs0", 0, PPC_OPERAND_VSR
},
710 { "vs1", 1, PPC_OPERAND_VSR
},
711 { "vs10", 10, PPC_OPERAND_VSR
},
712 { "vs11", 11, PPC_OPERAND_VSR
},
713 { "vs12", 12, PPC_OPERAND_VSR
},
714 { "vs13", 13, PPC_OPERAND_VSR
},
715 { "vs14", 14, PPC_OPERAND_VSR
},
716 { "vs15", 15, PPC_OPERAND_VSR
},
717 { "vs16", 16, PPC_OPERAND_VSR
},
718 { "vs17", 17, PPC_OPERAND_VSR
},
719 { "vs18", 18, PPC_OPERAND_VSR
},
720 { "vs19", 19, PPC_OPERAND_VSR
},
721 { "vs2", 2, PPC_OPERAND_VSR
},
722 { "vs20", 20, PPC_OPERAND_VSR
},
723 { "vs21", 21, PPC_OPERAND_VSR
},
724 { "vs22", 22, PPC_OPERAND_VSR
},
725 { "vs23", 23, PPC_OPERAND_VSR
},
726 { "vs24", 24, PPC_OPERAND_VSR
},
727 { "vs25", 25, PPC_OPERAND_VSR
},
728 { "vs26", 26, PPC_OPERAND_VSR
},
729 { "vs27", 27, PPC_OPERAND_VSR
},
730 { "vs28", 28, PPC_OPERAND_VSR
},
731 { "vs29", 29, PPC_OPERAND_VSR
},
732 { "vs3", 3, PPC_OPERAND_VSR
},
733 { "vs30", 30, PPC_OPERAND_VSR
},
734 { "vs31", 31, PPC_OPERAND_VSR
},
735 { "vs32", 32, PPC_OPERAND_VSR
},
736 { "vs33", 33, PPC_OPERAND_VSR
},
737 { "vs34", 34, PPC_OPERAND_VSR
},
738 { "vs35", 35, PPC_OPERAND_VSR
},
739 { "vs36", 36, PPC_OPERAND_VSR
},
740 { "vs37", 37, PPC_OPERAND_VSR
},
741 { "vs38", 38, PPC_OPERAND_VSR
},
742 { "vs39", 39, PPC_OPERAND_VSR
},
743 { "vs4", 4, PPC_OPERAND_VSR
},
744 { "vs40", 40, PPC_OPERAND_VSR
},
745 { "vs41", 41, PPC_OPERAND_VSR
},
746 { "vs42", 42, PPC_OPERAND_VSR
},
747 { "vs43", 43, PPC_OPERAND_VSR
},
748 { "vs44", 44, PPC_OPERAND_VSR
},
749 { "vs45", 45, PPC_OPERAND_VSR
},
750 { "vs46", 46, PPC_OPERAND_VSR
},
751 { "vs47", 47, PPC_OPERAND_VSR
},
752 { "vs48", 48, PPC_OPERAND_VSR
},
753 { "vs49", 49, PPC_OPERAND_VSR
},
754 { "vs5", 5, PPC_OPERAND_VSR
},
755 { "vs50", 50, PPC_OPERAND_VSR
},
756 { "vs51", 51, PPC_OPERAND_VSR
},
757 { "vs52", 52, PPC_OPERAND_VSR
},
758 { "vs53", 53, PPC_OPERAND_VSR
},
759 { "vs54", 54, PPC_OPERAND_VSR
},
760 { "vs55", 55, PPC_OPERAND_VSR
},
761 { "vs56", 56, PPC_OPERAND_VSR
},
762 { "vs57", 57, PPC_OPERAND_VSR
},
763 { "vs58", 58, PPC_OPERAND_VSR
},
764 { "vs59", 59, PPC_OPERAND_VSR
},
765 { "vs6", 6, PPC_OPERAND_VSR
},
766 { "vs60", 60, PPC_OPERAND_VSR
},
767 { "vs61", 61, PPC_OPERAND_VSR
},
768 { "vs62", 62, PPC_OPERAND_VSR
},
769 { "vs63", 63, PPC_OPERAND_VSR
},
770 { "vs7", 7, PPC_OPERAND_VSR
},
771 { "vs8", 8, PPC_OPERAND_VSR
},
772 { "vs9", 9, PPC_OPERAND_VSR
},
774 { "xer", 1, PPC_OPERAND_SPR
}
777 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
779 /* Given NAME, find the register number associated with that name, return
780 the integer value associated with the given name or -1 on failure. */
782 static const struct pd_reg
*
783 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
785 int middle
, low
, high
;
793 middle
= (low
+ high
) / 2;
794 cmp
= strcasecmp (name
, regs
[middle
].name
);
800 return ®s
[middle
];
808 * Summary of register_name.
810 * in: Input_line_pointer points to 1st char of operand.
812 * out: A expressionS.
813 * The operand may have been a register: in this case, X_op == O_register,
814 * X_add_number is set to the register number, and truth is returned.
815 * Input_line_pointer->(next non-blank) char after operand, or is in its
820 register_name (expressionS
*expressionP
)
822 const struct pd_reg
*reg
;
827 /* Find the spelling of the operand. */
828 start
= name
= input_line_pointer
;
829 if (name
[0] == '%' && ISALPHA (name
[1]))
830 name
= ++input_line_pointer
;
832 else if (!reg_names_p
|| !ISALPHA (name
[0]))
835 c
= get_symbol_name (&name
);
836 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
838 /* Put back the delimiting char. */
839 *input_line_pointer
= c
;
841 /* Look to see if it's in the register table. */
844 expressionP
->X_op
= O_register
;
845 expressionP
->X_add_number
= reg
->value
;
846 expressionP
->X_md
= reg
->flags
;
848 /* Make the rest nice. */
849 expressionP
->X_add_symbol
= NULL
;
850 expressionP
->X_op_symbol
= NULL
;
854 /* Reset the line as if we had not done anything. */
855 input_line_pointer
= start
;
859 /* This function is called for each symbol seen in an expression. It
860 handles the special parsing which PowerPC assemblers are supposed
861 to use for condition codes. */
863 /* Whether to do the special parsing. */
864 static bool cr_operand
;
866 /* Names to recognize in a condition code. This table is sorted. */
867 static const struct pd_reg cr_names
[] =
869 { "cr0", 0, PPC_OPERAND_CR_REG
},
870 { "cr1", 1, PPC_OPERAND_CR_REG
},
871 { "cr2", 2, PPC_OPERAND_CR_REG
},
872 { "cr3", 3, PPC_OPERAND_CR_REG
},
873 { "cr4", 4, PPC_OPERAND_CR_REG
},
874 { "cr5", 5, PPC_OPERAND_CR_REG
},
875 { "cr6", 6, PPC_OPERAND_CR_REG
},
876 { "cr7", 7, PPC_OPERAND_CR_REG
},
877 { "eq", 2, PPC_OPERAND_CR_BIT
},
878 { "gt", 1, PPC_OPERAND_CR_BIT
},
879 { "lt", 0, PPC_OPERAND_CR_BIT
},
880 { "so", 3, PPC_OPERAND_CR_BIT
},
881 { "un", 3, PPC_OPERAND_CR_BIT
}
884 /* Parsing function. This returns non-zero if it recognized an
888 ppc_parse_name (const char *name
, expressionS
*exp
)
890 const struct pd_reg
*reg
;
897 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
902 exp
->X_op
= O_register
;
903 exp
->X_add_number
= reg
->value
;
904 exp
->X_md
= reg
->flags
;
909 /* Propagate X_md and check register expressions. This is to support
910 condition codes like 4*cr5+eq. */
913 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
915 /* Accept 4*cr<n> and cr<n>*4. */
917 && ((right
->X_op
== O_register
918 && right
->X_md
== PPC_OPERAND_CR_REG
919 && left
->X_op
== O_constant
920 && left
->X_add_number
== 4)
921 || (left
->X_op
== O_register
922 && left
->X_md
== PPC_OPERAND_CR_REG
923 && right
->X_op
== O_constant
924 && right
->X_add_number
== 4)))
926 left
->X_op
= O_register
;
927 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
928 left
->X_add_number
*= right
->X_add_number
;
932 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
933 if (right
->X_op
== O_register
934 && left
->X_op
== O_register
936 && ((right
->X_md
== PPC_OPERAND_CR_BIT
937 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
938 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
939 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
941 left
->X_md
= PPC_OPERAND_CR_BIT
;
942 right
->X_op
= O_constant
;
946 /* Accept reg +/- constant. */
947 if (left
->X_op
== O_register
948 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
949 as_warn (_("invalid register expression"));
951 /* Accept constant + reg. */
952 if (right
->X_op
== O_register
)
954 if (op
== O_add
&& left
->X_op
== O_constant
)
955 left
->X_md
= right
->X_md
;
957 as_warn (_("invalid register expression"));
963 /* Local variables. */
965 /* Whether to target xcoff64/elf64. */
966 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
968 /* Opcode hash table. */
969 static htab_t ppc_hash
;
971 /* Macro hash table. */
972 static htab_t ppc_macro_hash
;
975 /* What type of shared library support to use. */
976 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
978 /* Flags to set in the elf header. */
979 static flagword ppc_flags
= 0;
981 /* Whether this is Solaris or not. */
982 #ifdef TARGET_SOLARIS_COMMENT
983 #define SOLARIS_P true
985 #define SOLARIS_P false
988 static bool msolaris
= SOLARIS_P
;
993 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
994 using a bunch of different sections. These assembler sections,
995 however, are all encompassed within the .text, .data or .bss sections
996 of the final output file. We handle this by using different
997 subsegments within these main segments.
998 .tdata and .tbss sections only have one type of csects for now,
999 but it's better to follow the same construction like the others. */
1001 struct ppc_xcoff_section ppc_xcoff_text_section
;
1002 struct ppc_xcoff_section ppc_xcoff_data_section
;
1003 struct ppc_xcoff_section ppc_xcoff_bss_section
;
1004 struct ppc_xcoff_section ppc_xcoff_tdata_section
;
1005 struct ppc_xcoff_section ppc_xcoff_tbss_section
;
1007 /* Return true if the ppc_xcoff_section structure is already
1010 ppc_xcoff_section_is_initialized (struct ppc_xcoff_section
*section
)
1012 return section
->segment
!= NULL
;
1015 /* Initialize a ppc_xcoff_section.
1016 Dummy symbols are used to ensure the position of .text over .data
1017 and .tdata. These symbols won't be output. */
1019 ppc_init_xcoff_section (struct ppc_xcoff_section
*s
, segT seg
,
1023 s
->next_subsegment
= 2;
1026 s
->csects
= symbol_make ("dummy\001");
1027 symbol_get_tc (s
->csects
)->within
= s
->csects
;
1031 /* The current csect. */
1032 static symbolS
*ppc_current_csect
;
1034 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1035 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1036 A special relocation is used when accessing TOC entries. We handle
1037 the TOC as a subsegment within the .data segment. We set it up if
1038 we see a .toc pseudo-op, and save the csect symbol here. */
1039 static symbolS
*ppc_toc_csect
;
1041 /* The first frag in the TOC subsegment. */
1042 static fragS
*ppc_toc_frag
;
1044 /* The first frag in the first subsegment after the TOC in the .data
1045 segment. NULL if there are no subsegments after the TOC. */
1046 static fragS
*ppc_after_toc_frag
;
1048 /* The current static block. */
1049 static symbolS
*ppc_current_block
;
1051 /* The COFF debugging section; set by md_begin. This is not the
1052 .debug section, but is instead the secret BFD section which will
1053 cause BFD to set the section number of a symbol to N_DEBUG. */
1054 static asection
*ppc_coff_debug_section
;
1056 /* Structure to set the length field of the dwarf sections. */
1057 struct dw_subsection
{
1058 /* Subsections are simply linked. */
1059 struct dw_subsection
*link
;
1061 /* The subsection number. */
1064 /* Expression to compute the length of the section. */
1065 expressionS end_exp
;
1068 static struct dw_section
{
1069 /* Corresponding section. */
1072 /* Simply linked list of subsections with a label. */
1073 struct dw_subsection
*list_subseg
;
1075 /* The anonymous subsection. */
1076 struct dw_subsection
*anon_subseg
;
1077 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1078 #endif /* OBJ_XCOFF */
1081 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1082 unsigned long *ppc_apuinfo_list
;
1083 unsigned int ppc_apuinfo_num
;
1084 unsigned int ppc_apuinfo_num_alloc
;
1085 #endif /* OBJ_ELF */
1088 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1090 const char *const md_shortopts
= "um:";
1092 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1093 const struct option md_longopts
[] = {
1094 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1095 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1096 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1097 {NULL
, no_argument
, NULL
, 0}
1099 const size_t md_longopts_size
= sizeof (md_longopts
);
1102 md_parse_option (int c
, const char *arg
)
1109 /* -u means that any undefined symbols should be treated as
1110 external, which is the default for gas anyhow. */
1115 /* Solaris as takes -le (presumably for little endian). For completeness
1116 sake, recognize -be also. */
1117 if (strcmp (arg
, "e") == 0)
1119 target_big_endian
= 0;
1120 set_target_endian
= 1;
1121 if (ppc_cpu
& PPC_OPCODE_VLE
)
1122 as_bad (_("the use of -mvle requires big endian."));
1130 if (strcmp (arg
, "e") == 0)
1132 target_big_endian
= 1;
1133 set_target_endian
= 1;
1141 /* Recognize -K PIC. */
1142 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1145 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1153 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1155 if (strcmp (arg
, "64") == 0)
1159 if (ppc_cpu
& PPC_OPCODE_VLE
)
1160 as_bad (_("the use of -mvle requires -a32."));
1162 as_fatal (_("%s unsupported"), "-a64");
1165 else if (strcmp (arg
, "32") == 0)
1172 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1173 /* "raw" is only valid for the disassembler. */
1174 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1177 if (strcmp (arg
, "vle") == 0)
1179 if (set_target_endian
&& target_big_endian
== 0)
1180 as_bad (_("the use of -mvle requires big endian."));
1182 as_bad (_("the use of -mvle requires -a32."));
1186 else if (strcmp (arg
, "no-vle") == 0)
1188 sticky
&= ~PPC_OPCODE_VLE
;
1190 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1191 new_cpu
&= ~PPC_OPCODE_VLE
;
1196 else if (strcmp (arg
, "regnames") == 0)
1199 else if (strcmp (arg
, "no-regnames") == 0)
1200 reg_names_p
= false;
1203 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1204 that require relocation. */
1205 else if (strcmp (arg
, "relocatable") == 0)
1207 shlib
= SHLIB_MRELOCATABLE
;
1208 ppc_flags
|= EF_PPC_RELOCATABLE
;
1211 else if (strcmp (arg
, "relocatable-lib") == 0)
1213 shlib
= SHLIB_MRELOCATABLE
;
1214 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1217 /* -memb, set embedded bit. */
1218 else if (strcmp (arg
, "emb") == 0)
1219 ppc_flags
|= EF_PPC_EMB
;
1221 /* -mlittle/-mbig set the endianness. */
1222 else if (strcmp (arg
, "little") == 0
1223 || strcmp (arg
, "little-endian") == 0)
1225 target_big_endian
= 0;
1226 set_target_endian
= 1;
1227 if (ppc_cpu
& PPC_OPCODE_VLE
)
1228 as_bad (_("the use of -mvle requires big endian."));
1231 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1233 target_big_endian
= 1;
1234 set_target_endian
= 1;
1237 else if (strcmp (arg
, "solaris") == 0)
1240 ppc_comment_chars
= ppc_solaris_comment_chars
;
1243 else if (strcmp (arg
, "no-solaris") == 0)
1246 ppc_comment_chars
= ppc_eabi_comment_chars
;
1248 else if (strcmp (arg
, "spe2") == 0)
1250 ppc_cpu
|= PPC_OPCODE_SPE2
;
1255 as_bad (_("invalid switch -m%s"), arg
);
1261 /* -V: SVR4 argument to print version ID. */
1263 print_version_id ();
1266 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1267 should be emitted or not. FIXME: Not implemented. */
1271 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1272 rather than .stabs.excl, which is ignored by the linker.
1273 FIXME: Not implemented. */
1284 nop_limit
= strtoul (optarg
, &end
, 0);
1286 as_bad (_("--nops needs a numeric argument"));
1301 is_ppc64_target (const bfd_target
*targ
, void *data ATTRIBUTE_UNUSED
)
1303 switch (targ
->flavour
)
1306 case bfd_target_elf_flavour
:
1307 return startswith (targ
->name
, "elf64-powerpc");
1310 case bfd_target_xcoff_flavour
:
1311 return (strcmp (targ
->name
, "aixcoff64-rs6000") == 0
1312 || strcmp (targ
->name
, "aix5coff64-rs6000") == 0);
1320 md_show_usage (FILE *stream
)
1322 fprintf (stream
, _("\
1323 PowerPC options:\n"));
1324 fprintf (stream
, _("\
1325 -a32 generate ELF32/XCOFF32\n"));
1326 if (bfd_iterate_over_targets (is_ppc64_target
, NULL
))
1327 fprintf (stream
, _("\
1328 -a64 generate ELF64/XCOFF64\n"));
1329 fprintf (stream
, _("\
1331 fprintf (stream
, _("\
1332 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n"));
1333 fprintf (stream
, _("\
1334 -mpwr generate code for POWER (RIOS1)\n"));
1335 fprintf (stream
, _("\
1336 -m601 generate code for PowerPC 601\n"));
1337 fprintf (stream
, _("\
1338 -mppc, -mppc32, -m603, -m604\n\
1339 generate code for PowerPC 603/604\n"));
1340 fprintf (stream
, _("\
1341 -m403 generate code for PowerPC 403\n"));
1342 fprintf (stream
, _("\
1343 -m405 generate code for PowerPC 405\n"));
1344 fprintf (stream
, _("\
1345 -m440 generate code for PowerPC 440\n"));
1346 fprintf (stream
, _("\
1347 -m464 generate code for PowerPC 464\n"));
1348 fprintf (stream
, _("\
1349 -m476 generate code for PowerPC 476\n"));
1350 fprintf (stream
, _("\
1351 -m7400, -m7410, -m7450, -m7455\n\
1352 generate code for PowerPC 7400/7410/7450/7455\n"));
1353 fprintf (stream
, _("\
1354 -m750cl, -mgekko, -mbroadway\n\
1355 generate code for PowerPC 750cl/Gekko/Broadway\n"));
1356 fprintf (stream
, _("\
1357 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1358 fprintf (stream
, _("\
1359 -mppc64, -m620 generate code for PowerPC 620/625/630\n"));
1360 fprintf (stream
, _("\
1361 -mppc64bridge generate code for PowerPC 64, including bridge insns\n"));
1362 fprintf (stream
, _("\
1363 -mbooke generate code for 32-bit PowerPC BookE\n"));
1364 fprintf (stream
, _("\
1365 -ma2 generate code for A2 architecture\n"));
1366 fprintf (stream
, _("\
1367 -mpower4, -mpwr4 generate code for Power4 architecture\n"));
1368 fprintf (stream
, _("\
1369 -mpower5, -mpwr5, -mpwr5x\n\
1370 generate code for Power5 architecture\n"));
1371 fprintf (stream
, _("\
1372 -mpower6, -mpwr6 generate code for Power6 architecture\n"));
1373 fprintf (stream
, _("\
1374 -mpower7, -mpwr7 generate code for Power7 architecture\n"));
1375 fprintf (stream
, _("\
1376 -mpower8, -mpwr8 generate code for Power8 architecture\n"));
1377 fprintf (stream
, _("\
1378 -mpower9, -mpwr9 generate code for Power9 architecture\n"));
1379 fprintf (stream
, _("\
1380 -mpower10, -mpwr10 generate code for Power10 architecture\n"));
1381 fprintf (stream
, _("\
1382 -mcell generate code for Cell Broadband Engine architecture\n"));
1383 fprintf (stream
, _("\
1384 -mcom generate code for Power/PowerPC common instructions\n"));
1385 fprintf (stream
, _("\
1386 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1387 fprintf (stream
, _("\
1388 -maltivec generate code for AltiVec\n"));
1389 fprintf (stream
, _("\
1390 -mvsx generate code for Vector-Scalar (VSX) instructions\n"));
1391 fprintf (stream
, _("\
1392 -me300 generate code for PowerPC e300 family\n"));
1393 fprintf (stream
, _("\
1394 -me500, -me500x2 generate code for Motorola e500 core complex\n"));
1395 fprintf (stream
, _("\
1396 -me500mc, generate code for Freescale e500mc core complex\n"));
1397 fprintf (stream
, _("\
1398 -me500mc64, generate code for Freescale e500mc64 core complex\n"));
1399 fprintf (stream
, _("\
1400 -me5500, generate code for Freescale e5500 core complex\n"));
1401 fprintf (stream
, _("\
1402 -me6500, generate code for Freescale e6500 core complex\n"));
1403 fprintf (stream
, _("\
1404 -mspe generate code for Motorola SPE instructions\n"));
1405 fprintf (stream
, _("\
1406 -mspe2 generate code for Freescale SPE2 instructions\n"));
1407 fprintf (stream
, _("\
1408 -mvle generate code for Freescale VLE instructions\n"));
1409 fprintf (stream
, _("\
1410 -mtitan generate code for AppliedMicro Titan core complex\n"));
1411 fprintf (stream
, _("\
1412 -mregnames Allow symbolic names for registers\n"));
1413 fprintf (stream
, _("\
1414 -mno-regnames Do not allow symbolic names for registers\n"));
1416 fprintf (stream
, _("\
1417 -mrelocatable support for GCC's -mrelocatble option\n"));
1418 fprintf (stream
, _("\
1419 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n"));
1420 fprintf (stream
, _("\
1421 -memb set PPC_EMB bit in ELF flags\n"));
1422 fprintf (stream
, _("\
1423 -mlittle, -mlittle-endian, -le\n\
1424 generate code for a little endian machine\n"));
1425 fprintf (stream
, _("\
1426 -mbig, -mbig-endian, -be\n\
1427 generate code for a big endian machine\n"));
1428 fprintf (stream
, _("\
1429 -msolaris generate code for Solaris\n"));
1430 fprintf (stream
, _("\
1431 -mno-solaris do not generate code for Solaris\n"));
1432 fprintf (stream
, _("\
1433 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n"));
1434 fprintf (stream
, _("\
1435 -V print assembler version number\n"));
1436 fprintf (stream
, _("\
1437 -Qy, -Qn ignored\n"));
1439 fprintf (stream
, _("\
1440 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1441 fprintf (stream
, _("\
1442 -ppc476-workaround warn if emitting data to code sections\n"));
1445 /* Set ppc_cpu if it is not already set. */
1450 const char *default_os
= TARGET_OS
;
1451 const char *default_cpu
= TARGET_CPU
;
1453 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1456 if (target_big_endian
)
1457 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1459 /* The minimum supported cpu for 64-bit little-endian is power8. */
1460 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1461 else if (startswith (default_os
, "aix")
1462 && default_os
[3] >= '4' && default_os
[3] <= '9')
1463 ppc_cpu
|= PPC_OPCODE_COMMON
;
1464 else if (startswith (default_os
, "aix3"))
1465 ppc_cpu
|= PPC_OPCODE_POWER
;
1466 else if (strcmp (default_cpu
, "rs6000") == 0)
1467 ppc_cpu
|= PPC_OPCODE_POWER
;
1468 else if (startswith (default_cpu
, "powerpc"))
1469 ppc_cpu
|= PPC_OPCODE_PPC
;
1471 as_fatal (_("unknown default cpu = %s, os = %s"),
1472 default_cpu
, default_os
);
1476 /* Figure out the BFD architecture to use. This function and ppc_mach
1477 are called well before md_begin, when the output file is opened. */
1479 enum bfd_architecture
1482 const char *default_cpu
= TARGET_CPU
;
1485 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1486 return bfd_arch_powerpc
;
1487 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1488 return bfd_arch_powerpc
;
1489 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1490 return bfd_arch_rs6000
;
1491 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1493 if (strcmp (default_cpu
, "rs6000") == 0)
1494 return bfd_arch_rs6000
;
1495 else if (startswith (default_cpu
, "powerpc"))
1496 return bfd_arch_powerpc
;
1499 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1500 return bfd_arch_unknown
;
1507 return bfd_mach_ppc64
;
1508 else if (ppc_arch () == bfd_arch_rs6000
)
1509 return bfd_mach_rs6k
;
1510 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1511 return bfd_mach_ppc_titan
;
1512 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1513 return bfd_mach_ppc_vle
;
1515 return bfd_mach_ppc
;
1519 ppc_target_format (void)
1523 return "xcoff-powermac";
1526 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1528 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1534 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1535 # elif defined (TE_VXWORKS)
1536 return "elf32-powerpc-vxworks";
1538 return (target_big_endian
1539 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1540 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1545 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1546 Return TRUE if there's a problem, otherwise FALSE. */
1549 insn_validate (const struct powerpc_opcode
*op
)
1551 const unsigned char *o
;
1552 uint64_t omask
= op
->mask
;
1554 /* The mask had better not trim off opcode bits. */
1555 if ((op
->opcode
& omask
) != op
->opcode
)
1557 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1561 /* The operands must not overlap the opcode or each other. */
1562 for (o
= op
->operands
; *o
; ++o
)
1564 bool optional
= false;
1565 if (*o
>= num_powerpc_operands
)
1567 as_bad (_("operand index error for %s"), op
->name
);
1573 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1574 if (operand
->shift
== (int) PPC_OPSHIFT_INV
)
1581 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1583 else if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1585 mask
= (*operand
->insert
) (0, val
, ppc_cpu
, &errmsg
);
1587 else if (operand
->shift
>= 0)
1588 mask
= operand
->bitm
<< operand
->shift
;
1590 mask
= operand
->bitm
>> -operand
->shift
;
1593 as_bad (_("operand %d overlap in %s"),
1594 (int) (o
- op
->operands
), op
->name
);
1598 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
1602 as_bad (_("non-optional operand %d follows optional operand in %s"),
1603 (int) (o
- op
->operands
), op
->name
);
1611 /* Insert opcodes and macros into hash tables. Called at startup and
1612 for .machine pseudo. */
1615 ppc_setup_opcodes (void)
1617 const struct powerpc_opcode
*op
;
1618 const struct powerpc_opcode
*op_end
;
1619 const struct powerpc_macro
*macro
;
1620 const struct powerpc_macro
*macro_end
;
1621 bool bad_insn
= false;
1623 if (ppc_hash
!= NULL
)
1624 htab_delete (ppc_hash
);
1625 if (ppc_macro_hash
!= NULL
)
1626 htab_delete (ppc_macro_hash
);
1628 /* Insert the opcodes into a hash table. */
1629 ppc_hash
= str_htab_create ();
1631 if (ENABLE_CHECKING
)
1635 /* An index into powerpc_operands is stored in struct fix
1636 fx_pcrel_adjust which is 8 bits wide. */
1637 gas_assert (num_powerpc_operands
< 256);
1639 /* Check operand masks. Code here and in the disassembler assumes
1640 all the 1's in the mask are contiguous. */
1641 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1643 uint64_t mask
= powerpc_operands
[i
].bitm
;
1647 right_bit
= mask
& -mask
;
1649 right_bit
= mask
& -mask
;
1650 if (mask
!= right_bit
)
1652 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1655 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1656 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1657 sizeof (powerpc_operands
[0])) == 0)
1659 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1666 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1667 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1669 if (ENABLE_CHECKING
)
1671 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1673 #ifdef PRINT_OPCODE_TABLE
1674 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1675 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1676 new_opcode
, (unsigned long long) op
->opcode
,
1677 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1680 /* The major opcodes had better be sorted. Code in the disassembler
1681 assumes the insns are sorted according to major opcode. */
1682 if (op
!= powerpc_opcodes
1683 && new_opcode
< PPC_OP (op
[-1].opcode
))
1685 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1689 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1691 as_bad (_("%s is enabled by vle flag"), op
->name
);
1694 if (PPC_OP (op
->opcode
) != 4
1695 && PPC_OP (op
->opcode
) != 31
1696 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1698 as_bad (_("%s not disabled by vle flag"), op
->name
);
1701 bad_insn
|= insn_validate (op
);
1704 if ((ppc_cpu
& op
->flags
) != 0
1705 && !(ppc_cpu
& op
->deprecated
)
1706 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1708 as_bad (_("duplicate %s"), op
->name
);
1713 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1714 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1715 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1717 op_end
= prefix_opcodes
+ prefix_num_opcodes
;
1718 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1720 if (ENABLE_CHECKING
)
1722 unsigned int new_opcode
= PPC_PREFIX_SEG (op
[0].opcode
);
1724 #ifdef PRINT_OPCODE_TABLE
1725 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1726 op
->name
, (unsigned int) (op
- prefix_opcodes
),
1727 new_opcode
, (unsigned long long) op
->opcode
,
1728 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1731 /* The major opcodes had better be sorted. Code in the disassembler
1732 assumes the insns are sorted according to major opcode. */
1733 if (op
!= prefix_opcodes
1734 && new_opcode
< PPC_PREFIX_SEG (op
[-1].opcode
))
1736 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1739 bad_insn
|= insn_validate (op
);
1742 if ((ppc_cpu
& op
->flags
) != 0
1743 && !(ppc_cpu
& op
->deprecated
)
1744 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1746 as_bad (_("duplicate %s"), op
->name
);
1751 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1752 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1753 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1755 op_end
= vle_opcodes
+ vle_num_opcodes
;
1756 for (op
= vle_opcodes
; op
< op_end
; op
++)
1758 if (ENABLE_CHECKING
)
1760 unsigned new_seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1762 #ifdef PRINT_OPCODE_TABLE
1763 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1764 op
->name
, (unsigned int) (op
- vle_opcodes
),
1765 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1766 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1769 /* The major opcodes had better be sorted. Code in the disassembler
1770 assumes the insns are sorted according to major opcode. */
1771 if (op
!= vle_opcodes
1772 && new_seg
< VLE_OP_TO_SEG (VLE_OP (op
[-1].opcode
, op
[-1].mask
)))
1774 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1778 bad_insn
|= insn_validate (op
);
1781 if ((ppc_cpu
& op
->flags
) != 0
1782 && !(ppc_cpu
& op
->deprecated
)
1783 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1785 as_bad (_("duplicate %s"), op
->name
);
1790 /* SPE2 instructions */
1791 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1793 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1794 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1796 if (ENABLE_CHECKING
)
1798 if (op
!= spe2_opcodes
)
1800 unsigned old_seg
, new_seg
;
1802 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1803 old_seg
= VLE_OP_TO_SEG (old_seg
);
1804 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1805 new_seg
= VLE_OP_TO_SEG (new_seg
);
1807 /* The major opcodes had better be sorted. Code in the
1808 disassembler assumes the insns are sorted according to
1810 if (new_seg
< old_seg
)
1812 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1817 bad_insn
|= insn_validate (op
);
1820 if ((ppc_cpu
& op
->flags
) != 0
1821 && !(ppc_cpu
& op
->deprecated
)
1822 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1824 as_bad (_("duplicate %s"), op
->name
);
1829 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1830 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1833 /* Insert the macros into a hash table. */
1834 ppc_macro_hash
= str_htab_create ();
1836 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1837 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1838 if (((macro
->flags
& ppc_cpu
) != 0
1839 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1840 && str_hash_insert (ppc_macro_hash
, macro
->name
, macro
, 0) != NULL
)
1842 as_bad (_("duplicate %s"), macro
->name
);
1850 /* This function is called when the assembler starts up. It is called
1851 after the options have been parsed and the output file has been
1859 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1860 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1863 /* Set the ELF flags if desired. */
1864 if (ppc_flags
&& !msolaris
)
1865 bfd_set_private_flags (stdoutput
, ppc_flags
);
1868 ppc_setup_opcodes ();
1870 /* Tell the main code what the endianness is if it is not overridden
1872 if (!set_target_endian
)
1874 set_target_endian
= 1;
1875 target_big_endian
= PPC_BIG_ENDIAN
;
1879 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1881 /* Create XCOFF sections with .text in first, as it's creating dummy symbols
1882 to serve as initial csects. This forces the text csects to precede the
1883 data csects. These symbols will not be output. */
1884 ppc_init_xcoff_section (&ppc_xcoff_text_section
, text_section
, true);
1885 ppc_init_xcoff_section (&ppc_xcoff_data_section
, data_section
, true);
1886 ppc_init_xcoff_section (&ppc_xcoff_bss_section
, bss_section
, true);
1894 if (ppc_apuinfo_list
== NULL
)
1897 /* Ok, so write the section info out. We have this layout:
1901 0 8 length of "APUinfo\0"
1902 4 (n*4) number of APU's (4 bytes each)
1905 20 APU#1 first APU's info
1906 24 APU#2 second APU's info
1911 asection
*seg
= now_seg
;
1912 subsegT subseg
= now_subseg
;
1913 asection
*apuinfo_secp
= (asection
*) NULL
;
1916 /* Create the .PPC.EMB.apuinfo section. */
1917 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1918 bfd_set_section_flags (apuinfo_secp
, SEC_HAS_CONTENTS
| SEC_READONLY
);
1921 md_number_to_chars (p
, (valueT
) 8, 4);
1924 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1927 md_number_to_chars (p
, (valueT
) 2, 4);
1930 strcpy (p
, APUINFO_LABEL
);
1932 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1935 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1938 frag_align (2, 0, 0);
1940 /* We probably can't restore the current segment, for there likely
1943 subseg_set (seg
, subseg
);
1948 /* Insert an operand value into an instruction. */
1951 ppc_insert_operand (uint64_t insn
,
1952 const struct powerpc_operand
*operand
,
1958 int64_t min
, max
, right
;
1960 max
= operand
->bitm
;
1964 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
1966 /* Extend the allowed range for addis to [-32768, 65535].
1967 Similarly for cmpli and some VLE high part insns. For 64-bit
1968 it would be good to disable this for signed fields since the
1969 value is sign extended into the high 32 bits of the register.
1970 If the value is, say, an address, then we might care about
1971 the high bits. However, gcc as of 2014-06 uses unsigned
1972 values when loading the high part of 64-bit constants using
1974 min
= ~(max
>> 1) & -right
;
1976 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
1978 max
= (max
>> 1) & -right
;
1979 min
= ~max
& -right
;
1982 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1985 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1994 /* Some people write constants with the sign extension done by
1995 hand but only up to 32 bits. This shouldn't really be valid,
1996 but, to permit this code to assemble on a 64-bit host, we
1997 sign extend the 32-bit value to 64 bits if so doing makes the
1998 value valid. We only do this for operands that are 32-bits or
2001 && (operand
->bitm
& ~0xffffffffULL
) == 0
2002 && (val
- (1LL << 32)) >= min
2003 && (val
- (1LL << 32)) <= max
2004 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
2005 val
= val
- (1LL << 32);
2007 /* Similarly, people write expressions like ~(1<<15), and expect
2008 this to be OK for a 32-bit unsigned value. */
2010 && (operand
->bitm
& ~0xffffffffULL
) == 0
2011 && (val
+ (1LL << 32)) >= min
2012 && (val
+ (1LL << 32)) <= max
2013 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
2014 val
= val
+ (1LL << 32);
2018 || (val
& (right
- 1)) != 0)
2019 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
2022 if (operand
->insert
)
2027 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
2028 if (errmsg
!= (const char *) NULL
)
2029 as_bad_where (file
, line
, "%s", errmsg
);
2031 else if (operand
->shift
>= 0)
2032 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2034 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2041 /* Parse @got, etc. and return the desired relocation. */
2042 static bfd_reloc_code_real_type
2043 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
2047 unsigned int length
: 8;
2048 unsigned int valid32
: 1;
2049 unsigned int valid64
: 1;
2058 const struct map_bfd
*ptr
;
2060 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2061 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2062 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2064 static const struct map_bfd mapping
[] = {
2065 MAP ("l", BFD_RELOC_LO16
),
2066 MAP ("h", BFD_RELOC_HI16
),
2067 MAP ("ha", BFD_RELOC_HI16_S
),
2068 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2069 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2070 MAP ("got", BFD_RELOC_16_GOTOFF
),
2071 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2072 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2073 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2074 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2075 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2076 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2077 MAP ("copy", BFD_RELOC_PPC_COPY
),
2078 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2079 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2080 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2081 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2082 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2083 MAP ("tls", BFD_RELOC_PPC_TLS
),
2084 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2085 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2086 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2087 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2088 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2089 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2090 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2091 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2092 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2093 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2094 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2095 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2096 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2097 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2098 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2099 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2100 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2101 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2102 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2103 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2104 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2105 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2106 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2107 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2108 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2109 MAP32 ("fixup", BFD_RELOC_CTOR
),
2110 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2111 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2112 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2113 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2114 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2115 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2116 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2117 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2118 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2119 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2120 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2121 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2122 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2123 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2124 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2125 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2126 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2127 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2128 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2129 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2130 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2131 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2132 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2133 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2134 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2135 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2136 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2137 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2138 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2139 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2140 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2141 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2142 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2143 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2144 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2145 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2146 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2147 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2148 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2149 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2150 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2151 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2152 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2153 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2154 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2155 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2156 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2157 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2158 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2159 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2160 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2161 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC
),
2162 MAP64 ("pcrel", BFD_RELOC_PPC64_PCREL34
),
2163 MAP64 ("got@pcrel", BFD_RELOC_PPC64_GOT_PCREL34
),
2164 MAP64 ("plt@pcrel", BFD_RELOC_PPC64_PLT_PCREL34
),
2165 MAP64 ("tls@pcrel", BFD_RELOC_PPC64_TLS_PCREL
),
2166 MAP64 ("got@tlsgd@pcrel", BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
),
2167 MAP64 ("got@tlsld@pcrel", BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
),
2168 MAP64 ("got@tprel@pcrel", BFD_RELOC_PPC64_GOT_TPREL_PCREL34
),
2169 MAP64 ("got@dtprel@pcrel", BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
),
2170 MAP64 ("higher34", BFD_RELOC_PPC64_ADDR16_HIGHER34
),
2171 MAP64 ("highera34", BFD_RELOC_PPC64_ADDR16_HIGHERA34
),
2172 MAP64 ("highest34", BFD_RELOC_PPC64_ADDR16_HIGHEST34
),
2173 MAP64 ("highesta34", BFD_RELOC_PPC64_ADDR16_HIGHESTA34
),
2174 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2178 return BFD_RELOC_NONE
;
2180 for (ch
= *str
, str2
= ident
;
2181 (str2
< ident
+ sizeof (ident
) - 1
2182 && (ISALNUM (ch
) || ch
== '@'));
2185 *str2
++ = TOLOWER (ch
);
2192 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2193 if (ch
== ptr
->string
[0]
2194 && len
== ptr
->length
2195 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2196 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2198 int reloc
= ptr
->reloc
;
2200 if (!ppc_obj64
&& (exp_p
->X_op
== O_big
|| exp_p
->X_add_number
!= 0))
2204 case BFD_RELOC_16_GOTOFF
:
2205 case BFD_RELOC_LO16_GOTOFF
:
2206 case BFD_RELOC_HI16_GOTOFF
:
2207 case BFD_RELOC_HI16_S_GOTOFF
:
2208 as_warn (_("symbol+offset@%s means symbol@%s+offset"),
2209 ptr
->string
, ptr
->string
);
2212 case BFD_RELOC_PPC_GOT_TLSGD16
:
2213 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2214 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2215 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2216 case BFD_RELOC_PPC_GOT_TLSLD16
:
2217 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2218 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2219 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2220 case BFD_RELOC_PPC_GOT_DTPREL16
:
2221 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2222 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2223 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2224 case BFD_RELOC_PPC_GOT_TPREL16
:
2225 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2226 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2227 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2228 as_bad (_("symbol+offset@%s not supported"), ptr
->string
);
2233 /* Now check for identifier@suffix+constant. */
2234 if (*str
== '-' || *str
== '+')
2236 char *orig_line
= input_line_pointer
;
2237 expressionS new_exp
;
2239 input_line_pointer
= str
;
2240 expression (&new_exp
);
2241 if (new_exp
.X_op
== O_constant
&& exp_p
->X_op
!= O_big
)
2243 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2244 str
= input_line_pointer
;
2246 input_line_pointer
= orig_line
;
2250 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2251 && exp_p
->X_op
== O_symbol
2252 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2254 /* Change the symbol so that the dummy .TOC. symbol can be
2255 omitted from the object file. */
2256 exp_p
->X_add_symbol
= &abs_symbol
;
2259 return (bfd_reloc_code_real_type
) reloc
;
2262 return BFD_RELOC_NONE
;
2265 /* Support @got, etc. on constants emitted via .short, .int etc. */
2267 bfd_reloc_code_real_type
2268 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2271 if (nbytes
>= 2 && *input_line_pointer
== '@')
2272 return ppc_elf_suffix (&input_line_pointer
, exp
);
2273 return BFD_RELOC_NONE
;
2276 /* Warn when emitting data to code sections, unless we are emitting
2277 a relocation that ld --ppc476-workaround uses to recognise data
2278 *and* there was an unconditional branch prior to the data. */
2281 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2282 unsigned int nbytes
, fixS
*fix
)
2285 && (now_seg
->flags
& SEC_CODE
) != 0
2288 || !(fix
->fx_r_type
== BFD_RELOC_32
2289 || fix
->fx_r_type
== BFD_RELOC_CTOR
2290 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2291 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2292 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2293 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2294 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2295 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2296 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2297 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2299 /* Flag that we've warned. */
2303 as_warn (_("data in executable section"));
2307 /* Solaris pseduo op to change to the .rodata section. */
2309 ppc_elf_rdata (int xxx
)
2311 char *save_line
= input_line_pointer
;
2312 static char section
[] = ".rodata\n";
2314 /* Just pretend this is .section .rodata */
2315 input_line_pointer
= section
;
2316 obj_elf_section (xxx
);
2318 input_line_pointer
= save_line
;
2321 /* Pseudo op to make file scope bss items. */
2323 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2336 c
= get_symbol_name (&name
);
2338 /* Just after name is now '\0'. */
2339 p
= input_line_pointer
;
2341 SKIP_WHITESPACE_AFTER_NAME ();
2342 if (*input_line_pointer
!= ',')
2344 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2345 ignore_rest_of_line ();
2349 input_line_pointer
++; /* skip ',' */
2350 if ((size
= get_absolute_expression ()) < 0)
2352 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2353 ignore_rest_of_line ();
2357 /* The third argument to .lcomm is the alignment. */
2358 if (*input_line_pointer
!= ',')
2362 ++input_line_pointer
;
2363 align
= get_absolute_expression ();
2366 as_warn (_("ignoring bad alignment"));
2372 symbolP
= symbol_find_or_make (name
);
2375 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2377 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2378 S_GET_NAME (symbolP
));
2379 ignore_rest_of_line ();
2383 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2385 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2386 S_GET_NAME (symbolP
),
2387 (long) S_GET_VALUE (symbolP
),
2390 ignore_rest_of_line ();
2396 old_subsec
= now_subseg
;
2399 /* Convert to a power of 2 alignment. */
2400 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2403 as_bad (_("common alignment not a power of 2"));
2404 ignore_rest_of_line ();
2411 record_alignment (bss_section
, align2
);
2412 subseg_set (bss_section
, 1);
2414 frag_align (align2
, 0, 0);
2415 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2416 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2417 symbol_set_frag (symbolP
, frag_now
);
2418 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2421 S_SET_SIZE (symbolP
, size
);
2422 S_SET_SEGMENT (symbolP
, bss_section
);
2423 subseg_set (old_sec
, old_subsec
);
2424 demand_empty_rest_of_line ();
2427 /* Pseudo op to set symbol local entry point. */
2429 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2432 char c
= get_symbol_name (&name
);
2437 elf_symbol_type
*elfsym
;
2439 p
= input_line_pointer
;
2441 SKIP_WHITESPACE_AFTER_NAME ();
2442 if (*input_line_pointer
!= ',')
2445 as_bad (_("expected comma after name `%s' in .localentry directive"),
2448 ignore_rest_of_line ();
2451 input_line_pointer
++;
2453 if (exp
.X_op
== O_absent
)
2455 as_bad (_("missing expression in .localentry directive"));
2456 exp
.X_op
= O_constant
;
2457 exp
.X_add_number
= 0;
2460 sym
= symbol_find_or_make (name
);
2463 if (resolve_expression (&exp
)
2464 && exp
.X_op
== O_constant
)
2466 unsigned int encoded
, ok
;
2469 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2470 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2473 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2474 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2476 as_bad (_(".localentry expression for `%s' "
2477 "is not a valid power of 2"), S_GET_NAME (sym
));
2483 bfdsym
= symbol_get_bfdsym (sym
);
2484 elfsym
= elf_symbol_from (bfdsym
);
2485 gas_assert (elfsym
);
2486 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2487 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2488 if (ppc_abiversion
== 0)
2493 as_bad (_(".localentry expression for `%s' "
2494 "does not evaluate to a constant"), S_GET_NAME (sym
));
2496 demand_empty_rest_of_line ();
2499 /* Pseudo op to set ABI version. */
2501 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2506 if (exp
.X_op
== O_absent
)
2508 as_bad (_("missing expression in .abiversion directive"));
2509 exp
.X_op
= O_constant
;
2510 exp
.X_add_number
= 0;
2513 if (resolve_expression (&exp
)
2514 && exp
.X_op
== O_constant
)
2515 ppc_abiversion
= exp
.X_add_number
;
2517 as_bad (_(".abiversion expression does not evaluate to a constant"));
2518 demand_empty_rest_of_line ();
2521 /* Parse a .gnu_attribute directive. */
2523 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2525 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2527 /* Check validity of defined powerpc tags. */
2528 if (tag
== Tag_GNU_Power_ABI_FP
2529 || tag
== Tag_GNU_Power_ABI_Vector
2530 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2534 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2536 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2537 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2538 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2539 as_warn (_("unknown .gnu_attribute value"));
2543 /* Set ABI version in output file. */
2547 if (ppc_obj64
&& ppc_abiversion
!= 0)
2549 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2550 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2552 /* Any selection of opcodes based on ppc_cpu after gas has finished
2553 parsing the file is invalid. md_apply_fix and ppc_handle_align
2554 must select opcodes based on the machine in force at the point
2555 where the fixup or alignment frag was created, not the machine in
2556 force at the end of file. */
2560 /* Validate any relocations emitted for -mrelocatable, possibly adding
2561 fixups for word relocations in writable segments, so we can adjust
2564 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2566 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2575 case SHLIB_MRELOCATABLE
:
2576 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2577 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2578 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2579 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2580 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2581 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2582 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2583 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2584 && (seg
->flags
& SEC_LOAD
) != 0
2585 && strcmp (segment_name (seg
), ".got2") != 0
2586 && strcmp (segment_name (seg
), ".dtors") != 0
2587 && strcmp (segment_name (seg
), ".ctors") != 0
2588 && strcmp (segment_name (seg
), ".fixup") != 0
2589 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2590 && strcmp (segment_name (seg
), ".eh_frame") != 0
2591 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2593 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2594 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2596 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2597 _("relocation cannot be done when using -mrelocatable"));
2604 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2605 function descriptor sym if the corresponding code sym is used. */
2608 ppc_frob_file_before_adjust (void)
2616 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2622 name
= S_GET_NAME (symp
);
2626 if (! S_IS_WEAK (symp
)
2627 || S_IS_DEFINED (symp
))
2630 dotname
= concat (".", name
, (char *) NULL
);
2631 dotsym
= symbol_find_noref (dotname
, 1);
2633 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2634 || symbol_used_in_reloc_p (dotsym
)))
2635 symbol_mark_used (symp
);
2639 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2641 && toc_reloc_types
!= has_large_toc_reloc
2642 && bfd_section_size (toc
) > 0x10000)
2643 as_warn (_("TOC section size exceeds 64k"));
2646 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2647 emitted. Other uses of .TOC. will cause the symbol to be marked
2648 with BSF_KEEP in md_apply_fix. */
2651 ppc_elf_adjust_symtab (void)
2656 symp
= symbol_find (".TOC.");
2659 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2660 if ((bsym
->flags
& BSF_KEEP
) == 0)
2661 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2665 #endif /* OBJ_ELF */
2668 /* Parse XCOFF relocations. */
2669 static bfd_reloc_code_real_type
2670 ppc_xcoff_suffix (char **str_p
)
2674 unsigned int length
: 8;
2675 unsigned int valid32
: 1;
2676 unsigned int valid64
: 1;
2685 const struct map_bfd
*ptr
;
2687 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2688 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2689 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2691 static const struct map_bfd mapping
[] = {
2692 MAP ("l", BFD_RELOC_PPC_TOC16_LO
),
2693 MAP ("u", BFD_RELOC_PPC_TOC16_HI
),
2694 MAP32 ("ie", BFD_RELOC_PPC_TLSIE
),
2695 MAP32 ("ld", BFD_RELOC_PPC_TLSLD
),
2696 MAP32 ("le", BFD_RELOC_PPC_TLSLE
),
2697 MAP32 ("m", BFD_RELOC_PPC_TLSM
),
2698 MAP32 ("ml", BFD_RELOC_PPC_TLSML
),
2699 MAP64 ("ie", BFD_RELOC_PPC64_TLSIE
),
2700 MAP64 ("ld", BFD_RELOC_PPC64_TLSLD
),
2701 MAP64 ("le", BFD_RELOC_PPC64_TLSLE
),
2702 MAP64 ("m", BFD_RELOC_PPC64_TLSM
),
2703 MAP64 ("ml", BFD_RELOC_PPC64_TLSML
),
2707 return BFD_RELOC_NONE
;
2709 for (ch
= *str
, str2
= ident
;
2710 (str2
< ident
+ sizeof (ident
) - 1
2711 && (ISALNUM (ch
) || ch
== '@'));
2714 *str2
++ = TOLOWER (ch
);
2721 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2722 if (ch
== ptr
->string
[0]
2723 && len
== ptr
->length
2724 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2725 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2728 return (bfd_reloc_code_real_type
) ptr
->reloc
;
2731 return BFD_RELOC_NONE
;
2734 /* Restore XCOFF addis instruction to ELF format.
2735 AIX often generates addis instructions using "addis RT,D(RA)"
2736 format instead of the ELF "addis RT,RA,SI" one.
2737 On entry RT_E is at the comma after RT, D_E is at the open
2738 parenthesis after D, and RA_E is at the close parenthesis after RA. */
2740 ppc_xcoff_fixup_addis (char *rt_e
, char *d_e
, char *ra_e
)
2742 size_t ra_size
= ra_e
- d_e
- 1;
2743 char *save_ra
= xmalloc (ra_size
);
2746 memcpy (save_ra
, d_e
+ 1, ra_size
);
2747 /* Shuffle D to make room for RA, copying the comma too. */
2748 memmove (rt_e
+ ra_size
+ 1, rt_e
, d_e
- rt_e
);
2749 /* Erase the trailing ')', keeping any rubbish for potential errors. */
2750 memmove (ra_e
, ra_e
+ 1, strlen (ra_e
));
2751 /* Write RA back. */
2752 memcpy (rt_e
+ 1, save_ra
, ra_size
);
2756 /* Support @ie, etc. on constants emitted via .short, .int etc. */
2758 bfd_reloc_code_real_type
2759 ppc_xcoff_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2762 if (nbytes
>= 2 && *input_line_pointer
== '@')
2763 return ppc_xcoff_suffix (&input_line_pointer
);
2765 /* There isn't any @ symbol for default TLS relocations (R_TLS). */
2766 if (exp
->X_add_symbol
!= NULL
2767 && (symbol_get_tc (exp
->X_add_symbol
)->symbol_class
== XMC_TL
2768 || symbol_get_tc (exp
->X_add_symbol
)->symbol_class
== XMC_UL
))
2769 return (ppc_obj64
? BFD_RELOC_PPC64_TLSGD
: BFD_RELOC_PPC_TLSGD
);
2771 return BFD_RELOC_NONE
;
2774 #endif /* OBJ_XCOFF */
2776 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2777 /* See whether a symbol is in the TOC section. */
2780 ppc_is_toc_sym (symbolS
*sym
)
2783 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2784 || symbol_get_tc (sym
)->symbol_class
== XMC_TE
2785 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2788 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2790 return strcmp (sname
, ".toc") == 0;
2792 return strcmp (sname
, ".got") == 0;
2795 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2799 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2801 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2805 /* Check we don't already exist. */
2806 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2807 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2810 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2812 if (ppc_apuinfo_num_alloc
== 0)
2814 ppc_apuinfo_num_alloc
= 4;
2815 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2819 ppc_apuinfo_num_alloc
+= 4;
2820 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2821 ppc_apuinfo_num_alloc
);
2824 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2829 /* Various frobbings of labels and their addresses. */
2831 /* Symbols labelling the current insn. */
2832 struct insn_label_list
2834 struct insn_label_list
*next
;
2838 static struct insn_label_list
*insn_labels
;
2839 static struct insn_label_list
*free_insn_labels
;
2842 ppc_record_label (symbolS
*sym
)
2844 struct insn_label_list
*l
;
2846 if (free_insn_labels
== NULL
)
2847 l
= XNEW (struct insn_label_list
);
2850 l
= free_insn_labels
;
2851 free_insn_labels
= l
->next
;
2855 l
->next
= insn_labels
;
2860 ppc_clear_labels (void)
2862 while (insn_labels
!= NULL
)
2864 struct insn_label_list
*l
= insn_labels
;
2865 insn_labels
= l
->next
;
2866 l
->next
= free_insn_labels
;
2867 free_insn_labels
= l
;
2872 ppc_start_line_hook (void)
2874 ppc_clear_labels ();
2878 ppc_new_dot_label (symbolS
*sym
)
2880 ppc_record_label (sym
);
2882 /* Anchor this label to the current csect for relocations. */
2883 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2888 ppc_frob_label (symbolS
*sym
)
2890 ppc_record_label (sym
);
2893 /* Set the class of a label based on where it is defined. This handles
2894 symbols without suffixes. Also, move the symbol so that it follows
2895 the csect symbol. */
2896 if (ppc_current_csect
!= (symbolS
*) NULL
)
2898 if (symbol_get_tc (sym
)->symbol_class
== -1)
2899 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
2901 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
2902 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
2903 &symbol_rootP
, &symbol_lastP
);
2904 symbol_get_tc (ppc_current_csect
)->within
= sym
;
2905 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2910 dwarf2_emit_label (sym
);
2914 /* We need to keep a list of fixups. We can't simply generate them as
2915 we go, because that would require us to first create the frag, and
2916 that would screw up references to ``.''. */
2922 bfd_reloc_code_real_type reloc
;
2925 #define MAX_INSN_FIXUPS (5)
2927 /* Return the field size operated on by RELOC, and whether it is
2928 pc-relative in PC_RELATIVE. */
2931 fixup_size (bfd_reloc_code_real_type reloc
, bool *pc_relative
)
2933 unsigned int size
= 0;
2938 /* This switch statement must handle all BFD_RELOC values
2939 possible in instruction fixups. As is, it handles all
2940 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
2941 bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
2942 Overkill since data and marker relocs need not be handled
2943 here, but this way we can be sure a needed fixup reloc isn't
2944 accidentally omitted. */
2945 case BFD_RELOC_PPC_EMB_MRKREF
:
2946 case BFD_RELOC_VTABLE_ENTRY
:
2947 case BFD_RELOC_VTABLE_INHERIT
:
2955 case BFD_RELOC_16_BASEREL
:
2956 case BFD_RELOC_16_GOTOFF
:
2957 case BFD_RELOC_GPREL16
:
2958 case BFD_RELOC_HI16
:
2959 case BFD_RELOC_HI16_BASEREL
:
2960 case BFD_RELOC_HI16_GOTOFF
:
2961 case BFD_RELOC_HI16_PLTOFF
:
2962 case BFD_RELOC_HI16_S
:
2963 case BFD_RELOC_HI16_S_BASEREL
:
2964 case BFD_RELOC_HI16_S_GOTOFF
:
2965 case BFD_RELOC_HI16_S_PLTOFF
:
2966 case BFD_RELOC_LO16
:
2967 case BFD_RELOC_LO16_BASEREL
:
2968 case BFD_RELOC_LO16_GOTOFF
:
2969 case BFD_RELOC_LO16_PLTOFF
:
2970 case BFD_RELOC_PPC64_ADDR16_DS
:
2971 case BFD_RELOC_PPC64_ADDR16_HIGH
:
2972 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
2973 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
2974 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
2975 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
2976 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
2977 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
2978 case BFD_RELOC_PPC64_DTPREL16_DS
:
2979 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
2980 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
2981 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
2982 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
2983 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
2984 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
2985 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
2986 case BFD_RELOC_PPC64_GOT16_DS
:
2987 case BFD_RELOC_PPC64_GOT16_LO_DS
:
2988 case BFD_RELOC_PPC64_HIGHER
:
2989 case BFD_RELOC_PPC64_HIGHER_S
:
2990 case BFD_RELOC_PPC64_HIGHEST
:
2991 case BFD_RELOC_PPC64_HIGHEST_S
:
2992 case BFD_RELOC_PPC64_PLT16_LO_DS
:
2993 case BFD_RELOC_PPC64_PLTGOT16
:
2994 case BFD_RELOC_PPC64_PLTGOT16_DS
:
2995 case BFD_RELOC_PPC64_PLTGOT16_HA
:
2996 case BFD_RELOC_PPC64_PLTGOT16_HI
:
2997 case BFD_RELOC_PPC64_PLTGOT16_LO
:
2998 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
2999 case BFD_RELOC_PPC64_SECTOFF_DS
:
3000 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
3001 case BFD_RELOC_PPC64_TOC16_DS
:
3002 case BFD_RELOC_PPC64_TOC16_HA
:
3003 case BFD_RELOC_PPC64_TOC16_HI
:
3004 case BFD_RELOC_PPC64_TOC16_LO
:
3005 case BFD_RELOC_PPC64_TOC16_LO_DS
:
3006 case BFD_RELOC_PPC64_TPREL16_DS
:
3007 case BFD_RELOC_PPC64_TPREL16_HIGH
:
3008 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
3009 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
3010 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
3011 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
3012 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
3013 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
3015 case BFD_RELOC_PPC_BA16
:
3017 case BFD_RELOC_PPC_DTPREL16
:
3018 case BFD_RELOC_PPC_DTPREL16_HA
:
3019 case BFD_RELOC_PPC_DTPREL16_HI
:
3020 case BFD_RELOC_PPC_DTPREL16_LO
:
3021 case BFD_RELOC_PPC_EMB_NADDR16
:
3022 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
3023 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
3024 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
3025 case BFD_RELOC_PPC_EMB_RELSDA
:
3026 case BFD_RELOC_PPC_EMB_RELSEC16
:
3027 case BFD_RELOC_PPC_EMB_RELST_LO
:
3028 case BFD_RELOC_PPC_EMB_RELST_HI
:
3029 case BFD_RELOC_PPC_EMB_RELST_HA
:
3030 case BFD_RELOC_PPC_EMB_SDA2I16
:
3031 case BFD_RELOC_PPC_EMB_SDA2REL
:
3032 case BFD_RELOC_PPC_EMB_SDAI16
:
3033 case BFD_RELOC_PPC_GOT_DTPREL16
:
3034 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
3035 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
3036 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3037 case BFD_RELOC_PPC_GOT_TLSGD16
:
3038 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
3039 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
3040 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
3041 case BFD_RELOC_PPC_GOT_TLSLD16
:
3042 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
3043 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
3044 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
3045 case BFD_RELOC_PPC_GOT_TPREL16
:
3046 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
3047 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
3048 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3049 case BFD_RELOC_PPC_TOC16
:
3050 case BFD_RELOC_PPC_TOC16_HI
:
3051 case BFD_RELOC_PPC_TOC16_LO
:
3052 case BFD_RELOC_PPC_TPREL16
:
3053 case BFD_RELOC_PPC_TPREL16_HA
:
3054 case BFD_RELOC_PPC_TPREL16_HI
:
3055 case BFD_RELOC_PPC_TPREL16_LO
:
3059 case BFD_RELOC_16_PCREL
:
3060 case BFD_RELOC_HI16_PCREL
:
3061 case BFD_RELOC_HI16_S_PCREL
:
3062 case BFD_RELOC_LO16_PCREL
:
3063 case BFD_RELOC_PPC64_REL16_HIGH
:
3064 case BFD_RELOC_PPC64_REL16_HIGHA
:
3065 case BFD_RELOC_PPC64_REL16_HIGHER
:
3066 case BFD_RELOC_PPC64_REL16_HIGHER34
:
3067 case BFD_RELOC_PPC64_REL16_HIGHERA
:
3068 case BFD_RELOC_PPC64_REL16_HIGHERA34
:
3069 case BFD_RELOC_PPC64_REL16_HIGHEST
:
3070 case BFD_RELOC_PPC64_REL16_HIGHEST34
:
3071 case BFD_RELOC_PPC64_REL16_HIGHESTA
:
3072 case BFD_RELOC_PPC64_REL16_HIGHESTA34
:
3074 case BFD_RELOC_PPC_B16
:
3076 case BFD_RELOC_PPC_VLE_REL8
:
3082 case BFD_RELOC_32_PLTOFF
:
3084 case BFD_RELOC_CTOR
:
3086 case BFD_RELOC_PPC64_ENTRY
:
3087 case BFD_RELOC_PPC_16DX_HA
:
3089 case BFD_RELOC_PPC_BA16
:
3091 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
3092 case BFD_RELOC_PPC_BA16_BRTAKEN
:
3093 case BFD_RELOC_PPC_BA26
:
3094 case BFD_RELOC_PPC_EMB_BIT_FLD
:
3095 case BFD_RELOC_PPC_EMB_NADDR32
:
3096 case BFD_RELOC_PPC_EMB_SDA21
:
3097 case BFD_RELOC_PPC_TLS
:
3098 case BFD_RELOC_PPC_TLSGD
:
3099 case BFD_RELOC_PPC_TLSLD
:
3100 case BFD_RELOC_PPC_TLSLE
:
3101 case BFD_RELOC_PPC_TLSIE
:
3102 case BFD_RELOC_PPC_TLSM
:
3103 case BFD_RELOC_PPC_TLSML
:
3104 case BFD_RELOC_PPC_VLE_HA16A
:
3105 case BFD_RELOC_PPC_VLE_HA16D
:
3106 case BFD_RELOC_PPC_VLE_HI16A
:
3107 case BFD_RELOC_PPC_VLE_HI16D
:
3108 case BFD_RELOC_PPC_VLE_LO16A
:
3109 case BFD_RELOC_PPC_VLE_LO16D
:
3110 case BFD_RELOC_PPC_VLE_SDA21
:
3111 case BFD_RELOC_PPC_VLE_SDA21_LO
:
3112 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3113 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
3114 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3115 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
3116 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3117 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
3118 case BFD_RELOC_PPC64_TLS_PCREL
:
3123 case BFD_RELOC_24_PLT_PCREL
:
3124 case BFD_RELOC_32_PCREL
:
3125 case BFD_RELOC_32_PLT_PCREL
:
3126 case BFD_RELOC_PPC64_REL24_NOTOC
:
3128 case BFD_RELOC_PPC_B16
:
3130 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3131 case BFD_RELOC_PPC_B16_BRTAKEN
:
3132 case BFD_RELOC_PPC_B26
:
3133 case BFD_RELOC_PPC_LOCAL24PC
:
3134 case BFD_RELOC_PPC_REL16DX_HA
:
3135 case BFD_RELOC_PPC_VLE_REL15
:
3136 case BFD_RELOC_PPC_VLE_REL24
:
3142 case BFD_RELOC_CTOR
:
3144 case BFD_RELOC_PPC_COPY
:
3145 case BFD_RELOC_PPC_DTPMOD
:
3146 case BFD_RELOC_PPC_DTPREL
:
3147 case BFD_RELOC_PPC_GLOB_DAT
:
3148 case BFD_RELOC_PPC_TPREL
:
3149 size
= ppc_obj64
? 8 : 4;
3153 case BFD_RELOC_64_PLTOFF
:
3154 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
3155 case BFD_RELOC_PPC64_D28
:
3156 case BFD_RELOC_PPC64_D34
:
3157 case BFD_RELOC_PPC64_D34_LO
:
3158 case BFD_RELOC_PPC64_D34_HI30
:
3159 case BFD_RELOC_PPC64_D34_HA30
:
3160 case BFD_RELOC_PPC64_TPREL34
:
3161 case BFD_RELOC_PPC64_DTPREL34
:
3162 case BFD_RELOC_PPC64_TOC
:
3163 case BFD_RELOC_PPC64_TLSGD
:
3164 case BFD_RELOC_PPC64_TLSLD
:
3165 case BFD_RELOC_PPC64_TLSLE
:
3166 case BFD_RELOC_PPC64_TLSIE
:
3167 case BFD_RELOC_PPC64_TLSM
:
3168 case BFD_RELOC_PPC64_TLSML
:
3172 case BFD_RELOC_64_PCREL
:
3173 case BFD_RELOC_64_PLT_PCREL
:
3174 case BFD_RELOC_PPC64_GOT_PCREL34
:
3175 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
3176 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
3177 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
3178 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
3179 case BFD_RELOC_PPC64_PCREL28
:
3180 case BFD_RELOC_PPC64_PCREL34
:
3181 case BFD_RELOC_PPC64_PLT_PCREL34
:
3190 if (ENABLE_CHECKING
)
3192 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
3193 if (reloc_howto
!= NULL
3194 && (size
!= bfd_get_reloc_size (reloc_howto
)
3195 || pcrel
!= reloc_howto
->pc_relative
))
3197 as_bad (_("%s howto doesn't match size/pcrel in gas"),
3202 *pc_relative
= pcrel
;
3207 /* If we have parsed a call to __tls_get_addr, parse an argument like
3208 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg
3209 is successfully parsed, *STR is updated past the trailing
3210 parenthesis and trailing white space, and *TLS_FIX contains the
3211 reloc and arg expression. */
3214 parse_tls_arg (char **str
, const expressionS
*exp
, struct ppc_fixup
*tls_fix
)
3216 const char *sym_name
= S_GET_NAME (exp
->X_add_symbol
);
3217 if (sym_name
[0] == '.')
3220 tls_fix
->reloc
= BFD_RELOC_NONE
;
3221 if (strncasecmp (sym_name
, "__tls_get_addr", 14) == 0
3222 && (sym_name
[14] == 0
3223 || strcasecmp (sym_name
+ 14, "_desc") == 0
3224 || strcasecmp (sym_name
+ 14, "_opt") == 0))
3226 char *hold
= input_line_pointer
;
3227 input_line_pointer
= *str
+ 1;
3228 expression (&tls_fix
->exp
);
3229 if (tls_fix
->exp
.X_op
== O_symbol
)
3231 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3232 tls_fix
->reloc
= BFD_RELOC_PPC_TLSGD
;
3233 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3234 tls_fix
->reloc
= BFD_RELOC_PPC_TLSLD
;
3235 if (tls_fix
->reloc
!= BFD_RELOC_NONE
)
3237 input_line_pointer
+= 7;
3239 *str
= input_line_pointer
;
3242 input_line_pointer
= hold
;
3244 return tls_fix
->reloc
!= BFD_RELOC_NONE
;
3248 /* This routine is called for each instruction to be assembled. */
3251 md_assemble (char *str
)
3254 const struct powerpc_opcode
*opcode
;
3256 const unsigned char *opindex_ptr
;
3259 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
3264 unsigned int insn_length
;
3266 /* Get the opcode. */
3267 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
3272 /* Look up the opcode in the hash table. */
3273 opcode
= (const struct powerpc_opcode
*) str_hash_find (ppc_hash
, str
);
3274 if (opcode
== (const struct powerpc_opcode
*) NULL
)
3276 const struct powerpc_macro
*macro
;
3278 macro
= (const struct powerpc_macro
*) str_hash_find (ppc_macro_hash
,
3280 if (macro
== (const struct powerpc_macro
*) NULL
)
3281 as_bad (_("unrecognized opcode: `%s'"), str
);
3283 ppc_macro (s
, macro
);
3285 ppc_clear_labels ();
3289 insn
= opcode
->opcode
;
3290 if (!target_big_endian
3291 && ((insn
& ~(1 << 26)) == 46u << 26
3292 || (insn
& ~(0xc0 << 1)) == (31u << 26 | 533 << 1)))
3294 /* lmw, stmw, lswi, lswx, stswi, stswx */
3295 as_bad (_("`%s' invalid when little-endian"), str
);
3296 ppc_clear_labels ();
3301 while (ISSPACE (*str
))
3305 /* AIX often generates addis instructions using "addis RT, D(RA)"
3306 format instead of the classic "addis RT, RA, SI" one.
3307 Restore it to the default format as it's the one encoded
3309 if (!strcmp (opcode
->name
, "addis"))
3311 char *rt_e
= strchr (str
, ',');
3313 && strchr (rt_e
+ 1, ',') == NULL
)
3315 char *d_e
= strchr (rt_e
+ 1, '(');
3316 if (d_e
!= NULL
&& d_e
!= rt_e
+ 1)
3318 char *ra_e
= strrchr (d_e
+ 1, ')');
3319 if (ra_e
!= NULL
&& ra_e
!= d_e
+ 1)
3320 ppc_xcoff_fixup_addis (rt_e
, d_e
, ra_e
);
3326 /* PowerPC operands are just expressions. The only real issue is
3327 that a few operand types are optional. If an instruction has
3328 multiple optional operands and one is omitted, then all optional
3329 operands past the first omitted one must also be omitted. */
3330 int num_optional_operands
= 0;
3331 int num_optional_provided
= 0;
3333 /* Gather the operands. */
3337 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
3339 const struct powerpc_operand
*operand
;
3345 if (next_opindex
== 0)
3346 operand
= &powerpc_operands
[*opindex_ptr
];
3349 operand
= &powerpc_operands
[next_opindex
];
3354 /* If this is an optional operand, and we are skipping it, just
3355 insert the default value, usually a zero. */
3356 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3357 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
3359 if (num_optional_operands
== 0)
3361 const unsigned char *optr
;
3367 for (optr
= opindex_ptr
; *optr
!= 0; optr
++)
3369 const struct powerpc_operand
*op
;
3370 op
= &powerpc_operands
[*optr
];
3374 if ((op
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3375 && !((op
->flags
& PPC_OPERAND_OPTIONAL32
) != 0
3377 ++num_optional_operands
;
3379 if (s
!= NULL
&& *s
!= '\0')
3383 /* Look for the start of the next operand. */
3384 if ((op
->flags
& PPC_OPERAND_PARENS
) != 0)
3385 s
= strpbrk (s
, "(,");
3387 s
= strchr (s
, ',');
3393 omitted
= total
- provided
;
3394 num_optional_provided
= num_optional_operands
- omitted
;
3396 if (--num_optional_provided
< 0)
3398 uint64_t val
= ppc_optional_operand_value (operand
, insn
, ppc_cpu
,
3399 num_optional_provided
);
3400 if (operand
->insert
)
3402 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
3403 if (errmsg
!= (const char *) NULL
)
3404 as_bad ("%s", errmsg
);
3406 else if (operand
->shift
>= 0)
3407 insn
|= (val
& operand
->bitm
) << operand
->shift
;
3409 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
3411 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
3412 next_opindex
= *opindex_ptr
+ 1;
3417 /* Gather the operand. */
3418 hold
= input_line_pointer
;
3419 input_line_pointer
= str
;
3422 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3423 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3424 || !register_name (&ex
))
3426 char save_lex
= lex_type
['%'];
3428 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3429 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3432 lex_type
['%'] |= LEX_BEGIN_NAME
;
3436 lex_type
['%'] = save_lex
;
3439 str
= input_line_pointer
;
3440 input_line_pointer
= hold
;
3442 if (ex
.X_op
== O_illegal
)
3443 as_bad (_("illegal operand"));
3444 else if (ex
.X_op
== O_absent
)
3445 as_bad (_("missing operand"));
3446 else if (ex
.X_op
== O_register
)
3450 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3451 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3452 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
| PPC_OPERAND_ACC
)) != 0
3453 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3454 && ex
.X_add_number
!= 0
3455 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3456 as_warn (_("invalid register expression"));
3457 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3458 ppc_cpu
, (char *) NULL
, 0);
3460 else if (ex
.X_op
== O_constant
3461 || (ex
.X_op
== O_big
&& ex
.X_add_number
> 0))
3464 if (ex
.X_op
== O_constant
)
3466 val
= ex
.X_add_number
;
3467 if (sizeof (ex
.X_add_number
) < sizeof (val
)
3468 && (ex
.X_add_number
< 0) != ex
.X_extrabit
)
3469 val
= val
^ ((addressT
) -1 ^ (uint64_t) -1);
3472 val
= generic_bignum_to_int64 ();
3474 /* Allow @HA, @L, @H on constants. */
3475 char *orig_str
= str
;
3476 bfd_reloc_code_real_type reloc
= ppc_elf_suffix (&str
, &ex
);
3478 if (ex
.X_op
== O_constant
)
3480 val
= ex
.X_add_number
;
3481 if (sizeof (ex
.X_add_number
) < sizeof (val
)
3482 && (ex
.X_add_number
< 0) != ex
.X_extrabit
)
3483 val
= val
^ ((addressT
) -1 ^ (uint64_t) -1);
3485 if (reloc
!= BFD_RELOC_NONE
)
3492 case BFD_RELOC_LO16
:
3494 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3498 case BFD_RELOC_HI16
:
3499 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3501 /* PowerPC64 @h is tested for overflow. */
3503 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3505 uint64_t sign
= (((uint64_t) -1 >> 16) + 1) >> 1;
3506 val
= (val
^ sign
) - sign
;
3512 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3514 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3518 case BFD_RELOC_HI16_S
:
3519 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3521 /* PowerPC64 @ha is tested for overflow. */
3522 val
= (val
+ 0x8000) >> 16;
3523 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3525 uint64_t sign
= (((uint64_t) -1 >> 16) + 1) >> 1;
3526 val
= (val
^ sign
) - sign
;
3532 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3534 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3538 case BFD_RELOC_PPC64_HIGHER
:
3539 val
= PPC_HIGHER (val
);
3540 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3544 case BFD_RELOC_PPC64_HIGHER_S
:
3545 val
= PPC_HIGHERA (val
);
3546 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3550 case BFD_RELOC_PPC64_HIGHEST
:
3551 val
= PPC_HIGHEST (val
);
3552 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3556 case BFD_RELOC_PPC64_HIGHEST_S
:
3557 val
= PPC_HIGHESTA (val
);
3558 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3562 #endif /* OBJ_ELF */
3563 insn
= ppc_insert_operand (insn
, operand
, val
, ppc_cpu
, NULL
, 0);
3567 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3569 /* Look for a __tls_get_addr arg using the insane old syntax. */
3570 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3571 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3573 fixups
[fc
].opindex
= *opindex_ptr
;
3577 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3579 /* If VLE-mode convert LO/HI/HA relocations. */
3580 if (opcode
->flags
& PPC_OPCODE_VLE
)
3582 uint64_t tmp_insn
= insn
& opcode
->mask
;
3584 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3585 || tmp_insn
== E_AND2I_DOT_INSN
3586 || tmp_insn
== E_OR2IS_INSN
3587 || tmp_insn
== E_LI_INSN
3588 || tmp_insn
== E_LIS_INSN
3589 || tmp_insn
== E_AND2IS_DOT_INSN
);
3592 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3593 || tmp_insn
== E_ADD2IS_INSN
3594 || tmp_insn
== E_CMP16I_INSN
3595 || tmp_insn
== E_MULL2I_INSN
3596 || tmp_insn
== E_CMPL16I_INSN
3597 || tmp_insn
== E_CMPH16I_INSN
3598 || tmp_insn
== E_CMPHL16I_INSN
);
3605 case BFD_RELOC_PPC_EMB_SDA21
:
3606 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3609 case BFD_RELOC_LO16
:
3611 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3612 else if (use_a_reloc
)
3613 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3616 case BFD_RELOC_HI16
:
3618 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3619 else if (use_a_reloc
)
3620 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3623 case BFD_RELOC_HI16_S
:
3625 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3626 else if (use_a_reloc
)
3627 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3630 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3632 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3635 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3637 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3640 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3642 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3647 /* TLS and other tweaks. */
3653 case BFD_RELOC_PPC_TLS
:
3654 case BFD_RELOC_PPC64_TLS_PCREL
:
3655 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3656 as_bad (_("@tls may not be used with \"%s\" operands"),
3658 else if (operand
->shift
!= 11)
3659 as_bad (_("@tls may only be used in last operand"));
3661 insn
= ppc_insert_operand (insn
, operand
,
3663 ppc_cpu
, (char *) NULL
, 0);
3666 /* We'll only use the 32 (or 64) bit form of these relocations
3667 in constants. Instructions get the 16 or 34 bit form. */
3668 case BFD_RELOC_PPC_DTPREL
:
3669 if (operand
->bitm
== 0x3ffffffffULL
)
3670 reloc
= BFD_RELOC_PPC64_DTPREL34
;
3672 reloc
= BFD_RELOC_PPC_DTPREL16
;
3675 case BFD_RELOC_PPC_TPREL
:
3676 if (operand
->bitm
== 0x3ffffffffULL
)
3677 reloc
= BFD_RELOC_PPC64_TPREL34
;
3679 reloc
= BFD_RELOC_PPC_TPREL16
;
3682 case BFD_RELOC_PPC64_PCREL34
:
3683 if (operand
->bitm
== 0xfffffffULL
)
3685 reloc
= BFD_RELOC_PPC64_PCREL28
;
3689 case BFD_RELOC_PPC64_GOT_PCREL34
:
3690 case BFD_RELOC_PPC64_PLT_PCREL34
:
3691 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
3692 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
3693 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
3694 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
3695 if (operand
->bitm
!= 0x3ffffffffULL
3696 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3697 as_warn (_("%s unsupported on this instruction"), "@pcrel");
3700 case BFD_RELOC_LO16
:
3701 if (operand
->bitm
== 0x3ffffffffULL
3702 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3703 reloc
= BFD_RELOC_PPC64_D34_LO
;
3704 else if ((operand
->bitm
| 0xf) != 0xffff
3705 || operand
->shift
!= 0
3706 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3707 as_warn (_("%s unsupported on this instruction"), "@l");
3710 case BFD_RELOC_HI16
:
3711 if (operand
->bitm
== 0x3ffffffffULL
3712 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3713 reloc
= BFD_RELOC_PPC64_D34_HI30
;
3714 else if (operand
->bitm
!= 0xffff
3715 || operand
->shift
!= 0
3716 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3717 as_warn (_("%s unsupported on this instruction"), "@h");
3720 case BFD_RELOC_HI16_S
:
3721 if (operand
->bitm
== 0x3ffffffffULL
3722 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3723 reloc
= BFD_RELOC_PPC64_D34_HA30
;
3724 else if (operand
->bitm
== 0xffff
3725 && operand
->shift
== (int) PPC_OPSHIFT_INV
3726 && opcode
->opcode
== (19 << 26) + (2 << 1))
3728 reloc
= BFD_RELOC_PPC_16DX_HA
;
3729 else if (operand
->bitm
!= 0xffff
3730 || operand
->shift
!= 0
3731 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3732 as_warn (_("%s unsupported on this instruction"), "@ha");
3735 #endif /* OBJ_ELF */
3737 reloc
= ppc_xcoff_suffix (&str
);
3738 #endif /* OBJ_XCOFF */
3740 if (reloc
!= BFD_RELOC_NONE
)
3742 /* Determine a BFD reloc value based on the operand information.
3743 We are only prepared to turn a few of the operands into
3745 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3746 | PPC_OPERAND_ABSOLUTE
)) != 0
3747 && operand
->bitm
== 0x3fffffc
3748 && operand
->shift
== 0)
3749 reloc
= BFD_RELOC_PPC_B26
;
3750 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3751 | PPC_OPERAND_ABSOLUTE
)) != 0
3752 && operand
->bitm
== 0xfffc
3753 && operand
->shift
== 0)
3754 reloc
= BFD_RELOC_PPC_B16
;
3755 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3756 && operand
->bitm
== 0x1fe
3757 && operand
->shift
== -1)
3758 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3759 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3760 && operand
->bitm
== 0xfffe
3761 && operand
->shift
== 0)
3762 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3763 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3764 && operand
->bitm
== 0x1fffffe
3765 && operand
->shift
== 0)
3766 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3767 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3768 && (operand
->bitm
& 0xfff0) == 0xfff0
3769 && operand
->shift
== 0)
3771 reloc
= BFD_RELOC_16
;
3772 #if defined OBJ_XCOFF || defined OBJ_ELF
3773 /* Note: the symbol may be not yet defined. */
3774 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3775 && ppc_is_toc_sym (ex
.X_add_symbol
))
3777 reloc
= BFD_RELOC_PPC_TOC16
;
3779 as_warn (_("assuming %s on symbol"),
3780 ppc_obj64
? "@toc" : "@xgot");
3785 else if (operand
->bitm
== 0x3ffffffffULL
)
3786 reloc
= BFD_RELOC_PPC64_D34
;
3787 else if (operand
->bitm
== 0xfffffffULL
)
3788 reloc
= BFD_RELOC_PPC64_D28
;
3790 /* For the absolute forms of branches, convert the PC
3791 relative form back into the absolute. */
3792 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3796 case BFD_RELOC_PPC_B26
:
3797 reloc
= BFD_RELOC_PPC_BA26
;
3799 case BFD_RELOC_PPC_B16
:
3800 reloc
= BFD_RELOC_PPC_BA16
;
3803 case BFD_RELOC_PPC_B16_BRTAKEN
:
3804 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3806 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3807 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3818 case BFD_RELOC_PPC_TOC16
:
3819 toc_reloc_types
|= has_small_toc_reloc
;
3821 case BFD_RELOC_PPC64_TOC16_LO
:
3822 case BFD_RELOC_PPC64_TOC16_HI
:
3823 case BFD_RELOC_PPC64_TOC16_HA
:
3824 toc_reloc_types
|= has_large_toc_reloc
;
3831 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3836 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3839 case BFD_RELOC_LO16
:
3840 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3843 case BFD_RELOC_16_GOTOFF
:
3844 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3847 case BFD_RELOC_LO16_GOTOFF
:
3848 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3851 case BFD_RELOC_LO16_PLTOFF
:
3852 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3855 case BFD_RELOC_16_BASEREL
:
3856 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3859 case BFD_RELOC_LO16_BASEREL
:
3860 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3863 case BFD_RELOC_PPC_TOC16
:
3864 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3867 case BFD_RELOC_PPC64_TOC16_LO
:
3868 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3871 case BFD_RELOC_PPC64_PLTGOT16
:
3872 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3875 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3876 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3879 case BFD_RELOC_PPC_DTPREL16
:
3880 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3883 case BFD_RELOC_PPC_DTPREL16_LO
:
3884 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3887 case BFD_RELOC_PPC_TPREL16
:
3888 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3891 case BFD_RELOC_PPC_TPREL16_LO
:
3892 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3895 case BFD_RELOC_PPC_GOT_DTPREL16
:
3896 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3897 case BFD_RELOC_PPC_GOT_TPREL16
:
3898 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3902 as_bad (_("unsupported relocation for DS offset field"));
3907 /* Look for a __tls_get_addr arg after any __tls_get_addr
3908 modifiers like @plt. This fixup must be emitted before
3909 the usual call fixup. */
3910 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3911 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3913 fixups
[fc
].opindex
= *opindex_ptr
;
3918 /* We need to generate a fixup for this expression. */
3919 if (fc
>= MAX_INSN_FIXUPS
)
3920 as_fatal (_("too many fixups"));
3921 fixups
[fc
].exp
= ex
;
3922 fixups
[fc
].opindex
= *opindex_ptr
;
3923 fixups
[fc
].reloc
= reloc
;
3931 /* If expecting more operands, then we want to see "),". */
3932 if (*str
== endc
&& opindex_ptr
[1] != 0)
3936 while (ISSPACE (*str
));
3940 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3945 /* The call to expression should have advanced str past any
3953 else if (*str
!= '\0')
3955 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3958 else if (endc
== ')')
3960 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
3965 while (ISSPACE (*str
))
3969 as_bad (_("junk at end of line: `%s'"), str
);
3972 /* Do we need/want an APUinfo section? */
3973 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
3976 /* These are all version "1". */
3977 if (opcode
->flags
& PPC_OPCODE_SPE
)
3978 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
3979 if (opcode
->flags
& PPC_OPCODE_ISEL
)
3980 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
3981 if (opcode
->flags
& PPC_OPCODE_EFS
)
3982 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
3983 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
3984 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
3985 if (opcode
->flags
& PPC_OPCODE_PMR
)
3986 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
3987 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
3988 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
3989 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
3990 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
3991 /* Only set the VLE flag if the instruction has been pulled via
3992 the VLE instruction set. This way the flag is guaranteed to
3993 be set for VLE-only instructions or for VLE-only processors,
3994 however it'll remain clear for dual-mode instructions on
3995 dual-mode and, more importantly, standard-mode processors. */
3996 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
3998 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
3999 if (elf_section_data (now_seg
) != NULL
)
4000 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
4005 /* Write out the instruction. */
4008 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
4009 /* All instructions can start on a 2 byte boundary for VLE. */
4012 if (frag_now
->insn_addr
!= addr_mask
)
4014 /* Don't emit instructions to a frag started for data, or for a
4015 CPU differing in VLE mode. Data is allowed to be misaligned,
4016 and it's possible to start a new frag in the middle of
4018 frag_wane (frag_now
);
4022 /* Check that insns within the frag are aligned. ppc_frag_check
4023 will ensure that the frag start address is aligned. */
4024 if ((frag_now_fix () & addr_mask
) != 0)
4025 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
4027 /* Differentiate between two, four, and eight byte insns. */
4029 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
4031 else if ((opcode
->flags
& PPC_OPCODE_POWER10
) != 0
4032 && PPC_PREFIX_P (insn
))
4034 struct insn_label_list
*l
;
4038 /* 8-byte prefix instructions are not allowed to cross 64-byte
4040 frag_align_code (6, 4);
4041 record_alignment (now_seg
, 6);
4043 /* Update alignment of the containing csect. */
4044 if (symbol_get_tc (ppc_current_csect
)->align
< 6)
4045 symbol_get_tc (ppc_current_csect
)->align
= 6;
4048 /* Update "dot" in any expressions used by this instruction, and
4049 a label attached to the instruction. By "attached" we mean
4050 on the same source line as the instruction and without any
4051 intervening semicolons. */
4052 dot_value
= frag_now_fix ();
4053 dot_frag
= frag_now
;
4054 for (l
= insn_labels
; l
!= NULL
; l
= l
->next
)
4056 symbol_set_frag (l
->label
, dot_frag
);
4057 S_SET_VALUE (l
->label
, dot_value
);
4061 ppc_clear_labels ();
4063 f
= frag_more (insn_length
);
4064 frag_now
->insn_addr
= addr_mask
;
4066 /* The prefix part of an 8-byte instruction always occupies the lower
4067 addressed word in a doubleword, regardless of endianness. */
4068 if (insn_length
== 8
4069 && (sizeof (insn
) > sizeof (valueT
) || !target_big_endian
))
4071 md_number_to_chars (f
, PPC_GET_PREFIX (insn
), 4);
4072 md_number_to_chars (f
+ 4, PPC_GET_SUFFIX (insn
), 4);
4075 md_number_to_chars (f
, insn
, insn_length
);
4079 last_subseg
= now_subseg
;
4082 dwarf2_emit_insn (insn_length
);
4085 /* Create any fixups. */
4086 for (i
= 0; i
< fc
; i
++)
4089 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
4092 unsigned int size
= fixup_size (fixups
[i
].reloc
, &pcrel
);
4093 int offset
= target_big_endian
? (insn_length
- size
) : 0;
4095 fixP
= fix_new_exp (frag_now
,
4096 f
- frag_now
->fr_literal
+ offset
,
4104 const struct powerpc_operand
*operand
;
4106 operand
= &powerpc_operands
[fixups
[i
].opindex
];
4107 fixP
= fix_new_exp (frag_now
,
4108 f
- frag_now
->fr_literal
,
4111 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
4114 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
4118 /* Handle a macro. Gather all the operands, transform them as
4119 described by the macro, and call md_assemble recursively. All the
4120 operands are separated by commas; we don't accept parentheses
4121 around operands here. */
4124 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
4135 /* Gather the users operands into the operands array. */
4140 if (count
>= sizeof operands
/ sizeof operands
[0])
4142 operands
[count
++] = s
;
4143 s
= strchr (s
, ',');
4144 if (s
== (char *) NULL
)
4149 if (count
!= macro
->operands
)
4151 as_bad (_("wrong number of operands"));
4155 /* Work out how large the string must be (the size is unbounded
4156 because it includes user input). */
4158 format
= macro
->format
;
4159 while (*format
!= '\0')
4168 arg
= strtol (format
+ 1, &send
, 10);
4169 know (send
!= format
&& arg
< count
);
4170 len
+= strlen (operands
[arg
]);
4175 /* Put the string together. */
4176 complete
= s
= XNEWVEC (char, len
+ 1);
4177 format
= macro
->format
;
4178 while (*format
!= '\0')
4184 arg
= strtol (format
+ 1, &send
, 10);
4185 strcpy (s
, operands
[arg
]);
4192 /* Assemble the constructed instruction. */
4193 md_assemble (complete
);
4198 /* For ELF, add support for SHT_ORDERED. */
4201 ppc_section_type (char *str
, size_t len
)
4203 if (len
== 7 && startswith (str
, "ordered"))
4210 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
4212 if (type
== SHT_ORDERED
)
4213 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
4219 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
4224 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
4227 #endif /* OBJ_ELF */
4230 /* Pseudo-op handling. */
4232 /* The .byte pseudo-op. This is similar to the normal .byte
4233 pseudo-op, but it can also take a single ASCII string. */
4236 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
4240 if (*input_line_pointer
!= '\"')
4246 /* Gather characters. A real double quote is doubled. Unusual
4247 characters are not permitted. */
4248 ++input_line_pointer
;
4253 c
= *input_line_pointer
++;
4257 if (*input_line_pointer
!= '\"')
4259 ++input_line_pointer
;
4262 FRAG_APPEND_1_CHAR (c
);
4266 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
4267 as_warn (_("data in executable section"));
4268 demand_empty_rest_of_line ();
4273 /* XCOFF specific pseudo-op handling. */
4275 /* This is set if we are creating a .stabx symbol, since we don't want
4276 to handle symbol suffixes for such symbols. */
4277 static bool ppc_stab_symbol
;
4279 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
4280 symbols in the .bss segment as though they were local common
4281 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
4282 aligns .comm and .lcomm to 4 bytes.
4283 Symbols having a XMC_UL storage class are uninialized thread-local
4287 ppc_comm (int lcomm
)
4289 asection
*current_seg
= now_seg
;
4290 subsegT current_subseg
= now_subseg
;
4296 symbolS
*lcomm_sym
= NULL
;
4299 struct ppc_xcoff_section
*section
;
4301 endc
= get_symbol_name (&name
);
4302 end_name
= input_line_pointer
;
4303 (void) restore_line_pointer (endc
);
4305 if (*input_line_pointer
!= ',')
4307 as_bad (_("missing size"));
4308 ignore_rest_of_line ();
4311 ++input_line_pointer
;
4313 size
= get_absolute_expression ();
4316 as_bad (_("negative size"));
4317 ignore_rest_of_line ();
4323 /* The third argument to .comm is the alignment. */
4324 if (*input_line_pointer
!= ',')
4328 ++input_line_pointer
;
4329 align
= get_absolute_expression ();
4332 as_warn (_("ignoring bad alignment"));
4342 /* The third argument to .lcomm appears to be the real local
4343 common symbol to create. References to the symbol named in
4344 the first argument are turned into references to the third
4346 if (*input_line_pointer
!= ',')
4348 as_bad (_("missing real symbol name"));
4349 ignore_rest_of_line ();
4352 ++input_line_pointer
;
4354 lcomm_endc
= get_symbol_name (&lcomm_name
);
4356 lcomm_sym
= symbol_find_or_make (lcomm_name
);
4358 (void) restore_line_pointer (lcomm_endc
);
4360 /* The fourth argument to .lcomm is the alignment. */
4361 if (*input_line_pointer
!= ',')
4370 ++input_line_pointer
;
4371 align
= get_absolute_expression ();
4374 as_warn (_("ignoring bad alignment"));
4381 sym
= symbol_find_or_make (name
);
4384 if (S_IS_DEFINED (sym
)
4385 || S_GET_VALUE (sym
) != 0)
4387 as_bad (_("attempt to redefine symbol"));
4388 ignore_rest_of_line ();
4392 if (symbol_get_tc (sym
)->symbol_class
== XMC_UL
4393 || (lcomm
&& symbol_get_tc (lcomm_sym
)->symbol_class
== XMC_UL
))
4395 section
= &ppc_xcoff_tbss_section
;
4396 if (!ppc_xcoff_section_is_initialized (section
))
4398 ppc_init_xcoff_section (section
,
4399 subseg_new (".tbss", 0), false);
4400 bfd_set_section_flags (section
->segment
,
4401 SEC_ALLOC
| SEC_THREAD_LOCAL
);
4402 seg_info (section
->segment
)->bss
= 1;
4406 section
= &ppc_xcoff_bss_section
;
4408 record_alignment (section
->segment
, align
);
4411 || ! S_IS_DEFINED (lcomm_sym
))
4420 S_SET_EXTERNAL (sym
);
4424 symbol_get_tc (lcomm_sym
)->output
= 1;
4425 def_sym
= lcomm_sym
;
4429 subseg_set (section
->segment
, 1);
4430 frag_align (align
, 0, 0);
4432 symbol_set_frag (def_sym
, frag_now
);
4433 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
4434 def_size
, (char *) NULL
);
4436 S_SET_SEGMENT (def_sym
, section
->segment
);
4437 symbol_get_tc (def_sym
)->align
= align
;
4441 /* Align the size of lcomm_sym. */
4442 symbol_get_frag (lcomm_sym
)->fr_offset
=
4443 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
4444 &~ ((1 << align
) - 1));
4445 if (align
> symbol_get_tc (lcomm_sym
)->align
)
4446 symbol_get_tc (lcomm_sym
)->align
= align
;
4451 /* Make sym an offset from lcomm_sym. */
4452 S_SET_SEGMENT (sym
, section
->segment
);
4453 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
4454 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
4455 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
4458 subseg_set (current_seg
, current_subseg
);
4460 demand_empty_rest_of_line ();
4463 /* The .csect pseudo-op. This switches us into a different
4464 subsegment. The first argument is a symbol whose value is the
4465 start of the .csect. In COFF, csect symbols get special aux
4466 entries defined by the x_csect field of union internal_auxent. The
4467 optional second argument is the alignment (the default is 2). */
4470 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
4477 endc
= get_symbol_name (&name
);
4479 sym
= symbol_find_or_make (name
);
4481 (void) restore_line_pointer (endc
);
4483 if (S_GET_NAME (sym
)[0] == '\0')
4485 /* An unnamed csect is assumed to be [PR]. */
4486 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
4490 if (*input_line_pointer
== ',')
4492 ++input_line_pointer
;
4493 align
= get_absolute_expression ();
4496 ppc_change_csect (sym
, align
);
4498 demand_empty_rest_of_line ();
4501 /* Change to a different csect. */
4504 ppc_change_csect (symbolS
*sym
, offsetT align
)
4506 if (S_IS_DEFINED (sym
))
4507 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
4510 struct ppc_xcoff_section
*section
;
4517 /* This is a new csect. We need to look at the symbol class to
4518 figure out whether it should go in the text section or the
4522 switch (symbol_get_tc (sym
)->symbol_class
)
4532 section
= &ppc_xcoff_text_section
;
4542 section
= &ppc_xcoff_data_section
;
4543 if (ppc_toc_csect
!= NULL
4544 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4545 == section
->next_subsegment
))
4549 section
= &ppc_xcoff_bss_section
;
4552 section
= &ppc_xcoff_tdata_section
;
4553 /* Create .tdata section if not yet done. */
4554 if (!ppc_xcoff_section_is_initialized (section
))
4556 ppc_init_xcoff_section (section
, subseg_new (".tdata", 0),
4558 bfd_set_section_flags (section
->segment
, SEC_ALLOC
4559 | SEC_LOAD
| SEC_RELOC
| SEC_DATA
4560 | SEC_THREAD_LOCAL
);
4564 section
= &ppc_xcoff_tbss_section
;
4565 /* Create .tbss section if not yet done. */
4566 if (!ppc_xcoff_section_is_initialized (section
))
4568 ppc_init_xcoff_section (section
, subseg_new (".tbss", 0),
4570 bfd_set_section_flags (section
->segment
, SEC_ALLOC
|
4572 seg_info (section
->segment
)->bss
= 1;
4579 S_SET_SEGMENT (sym
, section
->segment
);
4580 symbol_get_tc (sym
)->subseg
= section
->next_subsegment
;
4581 ++section
->next_subsegment
;
4583 /* We set the obstack chunk size to a small value before
4584 changing subsegments, so that we don't use a lot of memory
4585 space for what may be a small section. */
4586 hold_chunksize
= chunksize
;
4589 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4590 symbol_get_tc (sym
)->subseg
);
4592 chunksize
= hold_chunksize
;
4595 ppc_after_toc_frag
= frag_now
;
4597 record_alignment (sec
, align
);
4599 frag_align_code (align
, 0);
4601 frag_align (align
, 0, 0);
4603 symbol_set_frag (sym
, frag_now
);
4604 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4606 symbol_get_tc (sym
)->align
= align
;
4607 symbol_get_tc (sym
)->output
= 1;
4608 symbol_get_tc (sym
)->within
= sym
;
4610 for (list
= section
->csects
;
4611 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4612 list
= symbol_get_tc (list
)->next
)
4614 symbol_get_tc (list
)->next
= sym
;
4616 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4617 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4621 ppc_current_csect
= sym
;
4625 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4629 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4631 sec
= subseg_new (dw
->xcoff_name
, subseg
);
4632 oldflags
= bfd_section_flags (sec
);
4633 if (oldflags
== SEC_NO_FLAGS
)
4635 /* Just created section. */
4636 gas_assert (dw_sections
[idx
].sect
== NULL
);
4638 bfd_set_section_flags (sec
, SEC_DEBUGGING
);
4639 bfd_set_section_alignment (sec
, 0);
4640 dw_sections
[idx
].sect
= sec
;
4643 /* Not anymore in a csect. */
4644 ppc_current_csect
= NULL
;
4647 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4648 .dwsect flag [, opt-label ]
4652 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4656 const struct xcoff_dwsect_name
*dw
;
4657 struct dw_subsection
*subseg
;
4658 struct dw_section
*dws
;
4662 flag
= get_absolute_expression ();
4664 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4665 if (xcoff_dwsect_names
[i
].flag
== flag
)
4667 dw
= &xcoff_dwsect_names
[i
];
4671 /* Parse opt-label. */
4672 if (*input_line_pointer
== ',')
4677 ++input_line_pointer
;
4679 c
= get_symbol_name (&label
);
4680 opt_label
= symbol_find_or_make (label
);
4681 (void) restore_line_pointer (c
);
4686 demand_empty_rest_of_line ();
4688 /* Return now in case of unknown subsection. */
4691 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4696 /* Find the subsection. */
4697 dws
= &dw_sections
[i
];
4699 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4701 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4702 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4704 as_bad (_("label %s was not defined in this dwarf section"),
4705 S_GET_NAME (opt_label
));
4706 subseg
= dws
->anon_subseg
;
4710 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4715 /* Switch to the subsection. */
4716 ppc_change_debug_section (i
, subseg
->subseg
);
4720 /* Create a new dw subsection. */
4721 subseg
= XNEW (struct dw_subsection
);
4723 if (opt_label
== NULL
)
4725 /* The anonymous one. */
4727 subseg
->link
= NULL
;
4728 dws
->anon_subseg
= subseg
;
4733 if (dws
->list_subseg
!= NULL
)
4734 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4738 subseg
->link
= dws
->list_subseg
;
4739 dws
->list_subseg
= subseg
;
4740 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4743 ppc_change_debug_section (i
, subseg
->subseg
);
4747 /* Add the length field. */
4748 expressionS
*exp
= &subseg
->end_exp
;
4751 if (opt_label
!= NULL
)
4752 symbol_set_value_now (opt_label
);
4754 /* Add the length field. Note that according to the AIX assembler
4755 manual, the size of the length field is 4 for powerpc32 but
4756 12 for powerpc64. */
4759 /* Write the 64bit marker. */
4760 md_number_to_chars (frag_more (4), -1, 4);
4763 exp
->X_op
= O_subtract
;
4764 exp
->X_op_symbol
= symbol_temp_new_now ();
4765 exp
->X_add_symbol
= symbol_temp_make ();
4767 sz
= ppc_obj64
? 8 : 4;
4768 exp
->X_add_number
= -sz
;
4769 emit_expr (exp
, sz
);
4774 /* This function handles the .text and .data pseudo-ops. These
4775 pseudo-ops aren't really used by XCOFF; we implement them for the
4776 convenience of people who aren't used to XCOFF. */
4779 ppc_section (int type
)
4786 else if (type
== 'd')
4791 sym
= symbol_find_or_make (name
);
4793 ppc_change_csect (sym
, 2);
4795 demand_empty_rest_of_line ();
4798 /* This function handles the .section pseudo-op. This is mostly to
4799 give an error, since XCOFF only supports .text, .data and .bss, but
4800 we do permit the user to name the text or data section. */
4803 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4806 const char *real_name
;
4810 c
= get_symbol_name (&user_name
);
4812 if (strcmp (user_name
, ".text") == 0)
4813 real_name
= ".text[PR]";
4814 else if (strcmp (user_name
, ".data") == 0)
4815 real_name
= ".data[RW]";
4818 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4819 (void) restore_line_pointer (c
);
4820 ignore_rest_of_line ();
4824 (void) restore_line_pointer (c
);
4826 sym
= symbol_find_or_make (real_name
);
4828 ppc_change_csect (sym
, 2);
4830 demand_empty_rest_of_line ();
4833 /* The .extern pseudo-op. We create an undefined symbol. */
4836 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4841 endc
= get_symbol_name (&name
);
4843 (void) symbol_find_or_make (name
);
4845 (void) restore_line_pointer (endc
);
4847 demand_empty_rest_of_line ();
4850 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4853 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4859 endc
= get_symbol_name (&name
);
4861 sym
= symbol_find_or_make (name
);
4863 (void) restore_line_pointer (endc
);
4865 symbol_get_tc (sym
)->output
= 1;
4867 demand_empty_rest_of_line ();
4870 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4871 relocations at the beginning of the current csect.
4873 (In principle, there's no reason why the relocations _have_ to be at
4874 the beginning. Anywhere in the csect would do. However, inserting
4875 at the beginning is what the native assembler does, and it helps to
4876 deal with cases where the .ref statements follow the section contents.)
4878 ??? .refs don't work for empty .csects. However, the native assembler
4879 doesn't report an error in this case, and neither yet do we. */
4882 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4887 if (ppc_current_csect
== NULL
)
4889 as_bad (_(".ref outside .csect"));
4890 ignore_rest_of_line ();
4896 c
= get_symbol_name (&name
);
4898 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4899 symbol_find_or_make (name
), 0, false, BFD_RELOC_NONE
);
4901 *input_line_pointer
= c
;
4902 SKIP_WHITESPACE_AFTER_NAME ();
4903 c
= *input_line_pointer
;
4906 input_line_pointer
++;
4908 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4910 as_bad (_("missing symbol name"));
4911 ignore_rest_of_line ();
4918 demand_empty_rest_of_line ();
4921 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4922 although I don't know why it bothers. */
4925 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4932 endc
= get_symbol_name (&name
);
4934 sym
= symbol_find_or_make (name
);
4936 (void) restore_line_pointer (endc
);
4938 if (*input_line_pointer
!= ',')
4940 as_bad (_("missing rename string"));
4941 ignore_rest_of_line ();
4944 ++input_line_pointer
;
4946 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
4948 demand_empty_rest_of_line ();
4951 /* The .stabx pseudo-op. This is similar to a normal .stabs
4952 pseudo-op, but slightly different. A sample is
4953 .stabx "main:F-1",.main,142,0
4954 The first argument is the symbol name to create. The second is the
4955 value, and the third is the storage class. The fourth seems to be
4956 always zero, and I am assuming it is the type. */
4959 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
4966 name
= demand_copy_C_string (&len
);
4968 if (*input_line_pointer
!= ',')
4970 as_bad (_("missing value"));
4973 ++input_line_pointer
;
4975 ppc_stab_symbol
= true;
4976 sym
= symbol_make (name
);
4977 ppc_stab_symbol
= false;
4979 symbol_get_tc (sym
)->real_name
= name
;
4981 (void) expression (&exp
);
4988 as_bad (_("illegal .stabx expression; zero assumed"));
4989 exp
.X_add_number
= 0;
4992 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
4993 symbol_set_frag (sym
, &zero_address_frag
);
4997 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
4998 symbol_set_value_expression (sym
, &exp
);
5002 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
5003 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
5008 /* The value is some complex expression. This will probably
5009 fail at some later point, but this is probably the right
5010 thing to do here. */
5011 symbol_set_value_expression (sym
, &exp
);
5015 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5016 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5018 if (*input_line_pointer
!= ',')
5020 as_bad (_("missing class"));
5023 ++input_line_pointer
;
5025 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
5027 if (*input_line_pointer
!= ',')
5029 as_bad (_("missing type"));
5032 ++input_line_pointer
;
5034 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
5036 symbol_get_tc (sym
)->output
= 1;
5038 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
5043 .stabx "z",arrays_,133,0
5046 .comm arrays_,13768,3
5048 resolve_symbol_value will copy the exp's "within" into sym's when the
5049 offset is 0. Since this seems to be corner case problem,
5050 only do the correction for storage class C_STSYM. A better solution
5051 would be to have the tc field updated in ppc_symbol_new_hook. */
5053 if (exp
.X_op
== O_symbol
)
5055 if (ppc_current_block
== NULL
)
5056 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
5058 symbol_get_tc (sym
)->within
= ppc_current_block
;
5059 symbol_get_tc (exp
.X_add_symbol
)->within
= ppc_current_block
;
5063 if (exp
.X_op
!= O_symbol
5064 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
5065 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
5066 ppc_frob_label (sym
);
5069 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5070 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
5071 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
5072 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5075 demand_empty_rest_of_line ();
5078 /* The .function pseudo-op. This takes several arguments. The first
5079 argument seems to be the external name of the symbol. The second
5080 argument seems to be the label for the start of the function. gcc
5081 uses the same name for both. I have no idea what the third and
5082 fourth arguments are meant to be. The optional fifth argument is
5083 an expression for the size of the function. In COFF this symbol
5084 gets an aux entry like that used for a csect. */
5087 ppc_function (int ignore ATTRIBUTE_UNUSED
)
5095 endc
= get_symbol_name (&name
);
5097 /* Ignore any [PR] suffix. */
5098 name
= ppc_canonicalize_symbol_name (name
);
5099 s
= strchr (name
, '[');
5100 if (s
!= (char *) NULL
5101 && strcmp (s
+ 1, "PR]") == 0)
5104 ext_sym
= symbol_find_or_make (name
);
5106 (void) restore_line_pointer (endc
);
5108 if (*input_line_pointer
!= ',')
5110 as_bad (_("missing symbol name"));
5111 ignore_rest_of_line ();
5114 ++input_line_pointer
;
5116 endc
= get_symbol_name (&name
);
5118 lab_sym
= symbol_find_or_make (name
);
5120 (void) restore_line_pointer (endc
);
5122 if (ext_sym
!= lab_sym
)
5126 exp
.X_op
= O_symbol
;
5127 exp
.X_add_symbol
= lab_sym
;
5128 exp
.X_op_symbol
= NULL
;
5129 exp
.X_add_number
= 0;
5131 symbol_set_value_expression (ext_sym
, &exp
);
5134 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
5135 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
5136 symbol_get_tc (ext_sym
)->output
= 1;
5138 if (*input_line_pointer
== ',')
5142 /* Ignore the third argument. */
5143 ++input_line_pointer
;
5145 if (*input_line_pointer
== ',')
5147 /* Ignore the fourth argument. */
5148 ++input_line_pointer
;
5150 if (*input_line_pointer
== ',')
5152 /* The fifth argument is the function size.
5153 If it's omitted, the size will be the containing csect.
5154 This will be donce during ppc_frob_symtab. */
5155 ++input_line_pointer
;
5156 symbol_get_tc (ext_sym
)->u
.size
5157 = symbol_new ("L0\001", absolute_section
,
5158 &zero_address_frag
, 0);
5159 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
5164 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5165 SF_SET_FUNCTION (ext_sym
);
5166 SF_SET_PROCESS (ext_sym
);
5167 coff_add_linesym (ext_sym
);
5169 demand_empty_rest_of_line ();
5172 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
5173 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
5174 with the correct line number */
5176 static symbolS
*saved_bi_sym
= 0;
5179 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
5183 sym
= symbol_make (".bf");
5184 S_SET_SEGMENT (sym
, text_section
);
5185 symbol_set_frag (sym
, frag_now
);
5186 S_SET_VALUE (sym
, frag_now_fix ());
5187 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5189 coff_line_base
= get_absolute_expression ();
5191 S_SET_NUMBER_AUXILIARY (sym
, 1);
5192 SA_SET_SYM_LNNO (sym
, coff_line_base
);
5194 /* Line number for bi. */
5197 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
5202 symbol_get_tc (sym
)->output
= 1;
5204 ppc_frob_label (sym
);
5206 demand_empty_rest_of_line ();
5209 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
5210 ".ef", except that the line number is absolute, not relative to the
5211 most recent ".bf" symbol. */
5214 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
5218 sym
= symbol_make (".ef");
5219 S_SET_SEGMENT (sym
, text_section
);
5220 symbol_set_frag (sym
, frag_now
);
5221 S_SET_VALUE (sym
, frag_now_fix ());
5222 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5223 S_SET_NUMBER_AUXILIARY (sym
, 1);
5224 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5225 symbol_get_tc (sym
)->output
= 1;
5227 ppc_frob_label (sym
);
5229 demand_empty_rest_of_line ();
5232 /* The .bi and .ei pseudo-ops. These take a string argument and
5233 generates a C_BINCL or C_EINCL symbol, which goes at the start of
5234 the symbol list. The value of .bi will be know when the next .bf
5240 static symbolS
*last_biei
;
5247 name
= demand_copy_C_string (&len
);
5249 /* The value of these symbols is actually file offset. Here we set
5250 the value to the index into the line number entries. In
5251 ppc_frob_symbols we set the fix_line field, which will cause BFD
5252 to do the right thing. */
5254 sym
= symbol_make (name
);
5255 /* obj-coff.c currently only handles line numbers correctly in the
5257 S_SET_SEGMENT (sym
, text_section
);
5258 S_SET_VALUE (sym
, coff_n_line_nos
);
5259 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5261 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
5262 symbol_get_tc (sym
)->output
= 1;
5270 for (look
= last_biei
? last_biei
: symbol_rootP
;
5271 (look
!= (symbolS
*) NULL
5272 && (S_GET_STORAGE_CLASS (look
) == C_FILE
5273 || S_GET_STORAGE_CLASS (look
) == C_BINCL
5274 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
5275 look
= symbol_next (look
))
5277 if (look
!= (symbolS
*) NULL
)
5279 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5280 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
5284 demand_empty_rest_of_line ();
5287 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
5288 There is one argument, which is a csect symbol. The value of the
5289 .bs symbol is the index of this csect symbol. */
5292 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
5299 if (ppc_current_block
!= NULL
)
5300 as_bad (_("nested .bs blocks"));
5302 endc
= get_symbol_name (&name
);
5304 csect
= symbol_find_or_make (name
);
5306 (void) restore_line_pointer (endc
);
5308 sym
= symbol_make (".bs");
5309 S_SET_SEGMENT (sym
, now_seg
);
5310 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
5311 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5312 symbol_get_tc (sym
)->output
= 1;
5314 symbol_get_tc (sym
)->within
= csect
;
5316 ppc_frob_label (sym
);
5318 ppc_current_block
= sym
;
5320 demand_empty_rest_of_line ();
5323 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
5326 ppc_es (int ignore ATTRIBUTE_UNUSED
)
5330 if (ppc_current_block
== NULL
)
5331 as_bad (_(".es without preceding .bs"));
5333 sym
= symbol_make (".es");
5334 S_SET_SEGMENT (sym
, now_seg
);
5335 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
5336 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5337 symbol_get_tc (sym
)->output
= 1;
5339 ppc_frob_label (sym
);
5341 ppc_current_block
= NULL
;
5343 demand_empty_rest_of_line ();
5346 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
5350 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
5354 sym
= symbol_make (".bb");
5355 S_SET_SEGMENT (sym
, text_section
);
5356 symbol_set_frag (sym
, frag_now
);
5357 S_SET_VALUE (sym
, frag_now_fix ());
5358 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5360 S_SET_NUMBER_AUXILIARY (sym
, 1);
5361 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5363 symbol_get_tc (sym
)->output
= 1;
5365 SF_SET_PROCESS (sym
);
5367 ppc_frob_label (sym
);
5369 demand_empty_rest_of_line ();
5372 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
5376 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
5380 sym
= symbol_make (".eb");
5381 S_SET_SEGMENT (sym
, text_section
);
5382 symbol_set_frag (sym
, frag_now
);
5383 S_SET_VALUE (sym
, frag_now_fix ());
5384 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5385 S_SET_NUMBER_AUXILIARY (sym
, 1);
5386 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5387 symbol_get_tc (sym
)->output
= 1;
5389 SF_SET_PROCESS (sym
);
5391 ppc_frob_label (sym
);
5393 demand_empty_rest_of_line ();
5396 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
5400 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
5406 name
= demand_copy_C_string (&len
);
5407 sym
= symbol_make (name
);
5408 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5409 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5410 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
5411 S_SET_VALUE (sym
, 0);
5412 symbol_get_tc (sym
)->output
= 1;
5414 ppc_frob_label (sym
);
5416 demand_empty_rest_of_line ();
5419 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
5422 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
5426 sym
= symbol_make (".ec");
5427 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5428 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5429 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
5430 S_SET_VALUE (sym
, 0);
5431 symbol_get_tc (sym
)->output
= 1;
5433 ppc_frob_label (sym
);
5435 demand_empty_rest_of_line ();
5438 /* The .toc pseudo-op. Switch to the .toc subsegment. */
5441 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
5443 if (ppc_toc_csect
!= (symbolS
*) NULL
)
5444 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
5451 subseg
= ppc_xcoff_data_section
.next_subsegment
;
5452 ++ppc_xcoff_data_section
.next_subsegment
;
5454 subseg_new (segment_name (data_section
), subseg
);
5455 ppc_toc_frag
= frag_now
;
5457 sym
= symbol_find_or_make ("TOC[TC0]");
5458 symbol_set_frag (sym
, frag_now
);
5459 S_SET_SEGMENT (sym
, data_section
);
5460 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5461 symbol_get_tc (sym
)->subseg
= subseg
;
5462 symbol_get_tc (sym
)->output
= 1;
5463 symbol_get_tc (sym
)->within
= sym
;
5465 ppc_toc_csect
= sym
;
5467 for (list
= ppc_xcoff_data_section
.csects
;
5468 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
5469 list
= symbol_get_tc (list
)->next
)
5471 symbol_get_tc (list
)->next
= sym
;
5473 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5474 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
5478 ppc_current_csect
= ppc_toc_csect
;
5480 demand_empty_rest_of_line ();
5483 /* The AIX assembler automatically aligns the operands of a .long or
5484 .short pseudo-op, and we want to be compatible. */
5487 ppc_xcoff_cons (int log_size
)
5489 frag_align (log_size
, 0, 0);
5490 record_alignment (now_seg
, log_size
);
5491 cons (1 << log_size
);
5495 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
5500 (void) expression (&exp
);
5502 if (exp
.X_op
!= O_constant
)
5504 as_bad (_("non-constant byte count"));
5508 byte_count
= exp
.X_add_number
;
5510 if (*input_line_pointer
!= ',')
5512 as_bad (_("missing value"));
5516 ++input_line_pointer
;
5521 ppc_xcoff_end (void)
5525 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
5527 struct dw_section
*dws
= &dw_sections
[i
];
5528 struct dw_subsection
*dwss
;
5530 if (dws
->anon_subseg
)
5532 dwss
= dws
->anon_subseg
;
5533 dwss
->link
= dws
->list_subseg
;
5536 dwss
= dws
->list_subseg
;
5538 for (; dwss
!= NULL
; dwss
= dwss
->link
)
5539 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
5541 subseg_set (dws
->sect
, dwss
->subseg
);
5542 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
5548 #endif /* OBJ_XCOFF */
5549 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5551 /* The .tc pseudo-op. This is used when generating either XCOFF or
5552 ELF. This takes two or more arguments.
5554 When generating XCOFF output, the first argument is the name to
5555 give to this location in the toc; this will be a symbol with class
5556 TC. The rest of the arguments are N-byte values to actually put at
5557 this location in the TOC; often there is just one more argument, a
5558 relocatable symbol reference. The size of the value to store
5559 depends on target word size. A 32-bit target uses 4-byte values, a
5560 64-bit target uses 8-byte values.
5562 When not generating XCOFF output, the arguments are the same, but
5563 the first argument is simply ignored. */
5566 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5570 /* Define the TOC symbol name. */
5576 if (ppc_toc_csect
== (symbolS
*) NULL
5577 || ppc_toc_csect
!= ppc_current_csect
)
5579 as_bad (_(".tc not in .toc section"));
5580 ignore_rest_of_line ();
5584 endc
= get_symbol_name (&name
);
5586 sym
= symbol_find_or_make (name
);
5588 (void) restore_line_pointer (endc
);
5590 if (S_IS_DEFINED (sym
))
5594 label
= symbol_get_tc (ppc_current_csect
)->within
;
5595 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5597 as_bad (_(".tc with no label"));
5598 ignore_rest_of_line ();
5602 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5603 symbol_set_frag (label
, symbol_get_frag (sym
));
5604 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5606 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5607 ++input_line_pointer
;
5612 S_SET_SEGMENT (sym
, now_seg
);
5613 symbol_set_frag (sym
, frag_now
);
5614 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5616 /* AIX assembler seems to allow any storage class to be set in .tc.
5617 But for now, only XMC_TC and XMC_TE are supported by us. */
5618 switch (symbol_get_tc (sym
)->symbol_class
)
5625 as_bad (_(".tc with storage class %d not yet supported"),
5626 symbol_get_tc (sym
)->symbol_class
);
5627 ignore_rest_of_line ();
5630 symbol_get_tc (sym
)->output
= 1;
5632 ppc_frob_label (sym
);
5635 #endif /* OBJ_XCOFF */
5639 /* Skip the TOC symbol name. */
5640 while (is_part_of_name (*input_line_pointer
)
5641 || *input_line_pointer
== ' '
5642 || *input_line_pointer
== '['
5643 || *input_line_pointer
== ']'
5644 || *input_line_pointer
== '{'
5645 || *input_line_pointer
== '}')
5646 ++input_line_pointer
;
5648 /* Align to a four/eight byte boundary. */
5649 align
= ppc_obj64
? 3 : 2;
5650 frag_align (align
, 0, 0);
5651 record_alignment (now_seg
, align
);
5652 #endif /* OBJ_ELF */
5654 if (*input_line_pointer
!= ',')
5655 demand_empty_rest_of_line ();
5658 ++input_line_pointer
;
5659 cons (ppc_obj64
? 8 : 4);
5663 /* Pseudo-op .machine. */
5666 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5670 #define MAX_HISTORY 100
5671 static ppc_cpu_t
*cpu_history
;
5672 static int curr_hist
;
5676 c
= get_symbol_name (&cpu_string
);
5677 cpu_string
= xstrdup (cpu_string
);
5678 (void) restore_line_pointer (c
);
5680 if (cpu_string
!= NULL
)
5682 ppc_cpu_t old_cpu
= ppc_cpu
;
5686 for (p
= cpu_string
; *p
!= 0; p
++)
5689 if (strcmp (cpu_string
, "push") == 0)
5691 if (cpu_history
== NULL
)
5692 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5694 if (curr_hist
>= MAX_HISTORY
)
5695 as_bad (_(".machine stack overflow"));
5697 cpu_history
[curr_hist
++] = ppc_cpu
;
5699 else if (strcmp (cpu_string
, "pop") == 0)
5702 as_bad (_(".machine stack underflow"));
5704 ppc_cpu
= cpu_history
[--curr_hist
];
5706 else if ((new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, cpu_string
)) != 0)
5709 as_bad (_("invalid machine `%s'"), cpu_string
);
5711 if (ppc_cpu
!= old_cpu
)
5712 ppc_setup_opcodes ();
5715 demand_empty_rest_of_line ();
5717 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5721 /* XCOFF specific symbol and file handling. */
5723 /* Canonicalize the symbol name. We use the to force the suffix, if
5724 any, to use square brackets, and to be in upper case. */
5727 ppc_canonicalize_symbol_name (char *name
)
5731 if (ppc_stab_symbol
)
5734 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
5748 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
5751 if (*s
== '\0' || s
[1] != '\0')
5752 as_bad (_("bad symbol suffix"));
5760 /* Set the class of a symbol based on the suffix, if any. This is
5761 called whenever a new symbol is created. */
5764 ppc_symbol_new_hook (symbolS
*sym
)
5766 struct ppc_tc_sy
*tc
;
5769 tc
= symbol_get_tc (sym
);
5772 tc
->symbol_class
= -1;
5773 tc
->real_name
= NULL
;
5780 if (ppc_stab_symbol
)
5783 s
= strchr (S_GET_NAME (sym
), '[');
5784 if (s
== (const char *) NULL
)
5786 /* There is no suffix. */
5795 if (strcmp (s
, "BS]") == 0)
5796 tc
->symbol_class
= XMC_BS
;
5799 if (strcmp (s
, "DB]") == 0)
5800 tc
->symbol_class
= XMC_DB
;
5801 else if (strcmp (s
, "DS]") == 0)
5802 tc
->symbol_class
= XMC_DS
;
5805 if (strcmp (s
, "GL]") == 0)
5806 tc
->symbol_class
= XMC_GL
;
5809 if (strcmp (s
, "PR]") == 0)
5810 tc
->symbol_class
= XMC_PR
;
5813 if (strcmp (s
, "RO]") == 0)
5814 tc
->symbol_class
= XMC_RO
;
5815 else if (strcmp (s
, "RW]") == 0)
5816 tc
->symbol_class
= XMC_RW
;
5819 if (strcmp (s
, "SV]") == 0)
5820 tc
->symbol_class
= XMC_SV
;
5823 if (strcmp (s
, "TC]") == 0)
5824 tc
->symbol_class
= XMC_TC
;
5825 else if (strcmp (s
, "TI]") == 0)
5826 tc
->symbol_class
= XMC_TI
;
5827 else if (strcmp (s
, "TB]") == 0)
5828 tc
->symbol_class
= XMC_TB
;
5829 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
5830 tc
->symbol_class
= XMC_TC0
;
5831 else if (strcmp (s
, "TE]") == 0)
5832 tc
->symbol_class
= XMC_TE
;
5833 else if (strcmp (s
, "TL]") == 0)
5834 tc
->symbol_class
= XMC_TL
;
5837 if (strcmp (s
, "UA]") == 0)
5838 tc
->symbol_class
= XMC_UA
;
5839 else if (strcmp (s
, "UC]") == 0)
5840 tc
->symbol_class
= XMC_UC
;
5841 else if (strcmp (s
, "UL]") == 0)
5842 tc
->symbol_class
= XMC_UL
;
5845 if (strcmp (s
, "XO]") == 0)
5846 tc
->symbol_class
= XMC_XO
;
5850 if (tc
->symbol_class
== -1)
5851 as_bad (_("unrecognized symbol suffix"));
5854 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5855 seen. It tells ppc_adjust_symtab whether it needs to look through
5858 static bool ppc_saw_abs
;
5860 /* Change the name of a symbol just before writing it out. Set the
5861 real name if the .rename pseudo-op was used. Otherwise, remove any
5862 class suffix. Return 1 if the symbol should not be included in the
5866 ppc_frob_symbol (symbolS
*sym
)
5868 static symbolS
*ppc_last_function
;
5869 static symbolS
*set_end
;
5871 /* Discard symbols that should not be included in the output symbol
5873 if (! symbol_used_in_reloc_p (sym
)
5874 && S_GET_STORAGE_CLASS (sym
) != C_DWARF
5875 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
5876 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5877 && ! symbol_get_tc (sym
)->output
5878 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
5881 /* This one will disappear anyway. Don't make a csect sym for it. */
5882 if (sym
== abs_section_sym
)
5885 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
5886 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
5892 name
= S_GET_NAME (sym
);
5893 s
= strchr (name
, '[');
5894 if (s
!= (char *) NULL
)
5900 snew
= xstrndup (name
, len
);
5902 S_SET_NAME (sym
, snew
);
5906 if (set_end
!= (symbolS
*) NULL
)
5908 SA_SET_SYM_ENDNDX (set_end
, sym
);
5912 if (SF_GET_FUNCTION (sym
))
5914 /* Make sure coff_last_function is reset. Otherwise, we won't create
5915 the auxent for the next function. */
5916 coff_last_function
= 0;
5917 ppc_last_function
= sym
;
5918 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
5920 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
5921 SA_SET_SYM_FSIZE (sym
,
5922 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
5926 /* Size of containing csect. */
5927 symbolS
* within
= symbol_get_tc (sym
)->within
;
5928 union internal_auxent
*csectaux
;
5929 csectaux
= &coffsymbol (symbol_get_bfdsym (within
))
5930 ->native
[S_GET_NUMBER_AUXILIARY(within
)].u
.auxent
;
5932 SA_SET_SYM_FSIZE (sym
, csectaux
->x_csect
.x_scnlen
.l
);
5935 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
5936 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
5938 if (ppc_last_function
== (symbolS
*) NULL
)
5939 as_bad (_(".ef with no preceding .function"));
5942 set_end
= ppc_last_function
;
5943 ppc_last_function
= NULL
;
5945 /* We don't have a C_EFCN symbol, but we need to force the
5946 COFF backend to believe that it has seen one. */
5947 coff_last_function
= NULL
;
5951 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5952 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
5953 && S_GET_STORAGE_CLASS (sym
) != C_FILE
5954 && S_GET_STORAGE_CLASS (sym
) != C_FCN
5955 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
5956 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
5957 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
5958 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
5959 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
5960 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
5961 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
5963 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
5964 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
5965 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
5968 union internal_auxent
*a
;
5970 /* Create a csect aux. */
5971 i
= S_GET_NUMBER_AUXILIARY (sym
);
5972 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
5973 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
5974 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
5976 /* This is the TOC table. */
5977 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
5978 a
->x_csect
.x_scnlen
.l
= 0;
5979 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
5981 else if (symbol_get_tc (sym
)->subseg
!= 0)
5983 /* This is a csect symbol. x_scnlen is the size of the
5985 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
5986 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (S_GET_SEGMENT (sym
))
5987 - S_GET_VALUE (sym
));
5990 resolve_symbol_value (symbol_get_tc (sym
)->next
);
5991 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
5992 - S_GET_VALUE (sym
));
5994 if (symbol_get_tc (sym
)->symbol_class
== XMC_BS
)
5995 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
5997 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
5999 else if (S_GET_SEGMENT (sym
) == bss_section
6000 || S_GET_SEGMENT (sym
) == ppc_xcoff_tbss_section
.segment
)
6002 /* This is a common symbol. */
6003 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6004 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6005 if (S_GET_SEGMENT (sym
) == ppc_xcoff_tbss_section
.segment
)
6006 symbol_get_tc (sym
)->symbol_class
= XMC_UL
;
6007 else if (S_IS_EXTERNAL (sym
))
6008 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6010 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6012 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6014 /* This is an absolute symbol. The csect will be created by
6015 ppc_adjust_symtab. */
6017 a
->x_csect
.x_smtyp
= XTY_LD
;
6018 if (symbol_get_tc (sym
)->symbol_class
== -1)
6019 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6021 else if (! S_IS_DEFINED (sym
))
6023 /* This is an external symbol. */
6024 a
->x_csect
.x_scnlen
.l
= 0;
6025 a
->x_csect
.x_smtyp
= XTY_ER
;
6027 else if (ppc_is_toc_sym (sym
))
6031 /* This is a TOC definition. x_scnlen is the size of the
6033 next
= symbol_next (sym
);
6034 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6035 next
= symbol_next (next
);
6036 if (next
== (symbolS
*) NULL
6037 || (!ppc_is_toc_sym (next
)))
6039 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6040 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (data_section
)
6041 - S_GET_VALUE (sym
));
6043 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6044 - S_GET_VALUE (sym
));
6048 resolve_symbol_value (next
);
6049 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6050 - S_GET_VALUE (sym
));
6052 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6058 /* This is a normal symbol definition. x_scnlen is the
6059 symbol index of the containing csect. */
6060 if (S_GET_SEGMENT (sym
) == text_section
)
6061 csect
= ppc_xcoff_text_section
.csects
;
6062 else if (S_GET_SEGMENT (sym
) == data_section
)
6063 csect
= ppc_xcoff_data_section
.csects
;
6064 else if (S_GET_SEGMENT (sym
) == ppc_xcoff_tdata_section
.segment
)
6065 csect
= ppc_xcoff_tdata_section
.csects
;
6069 /* Skip the initial dummy symbol. */
6070 csect
= symbol_get_tc (csect
)->next
;
6072 if (csect
== (symbolS
*) NULL
)
6074 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6075 a
->x_csect
.x_scnlen
.l
= 0;
6079 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6081 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6082 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6083 > S_GET_VALUE (sym
))
6085 csect
= symbol_get_tc (csect
)->next
;
6088 a
->x_csect
.x_scnlen
.p
=
6089 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6090 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6093 a
->x_csect
.x_smtyp
= XTY_LD
;
6096 a
->x_csect
.x_parmhash
= 0;
6097 a
->x_csect
.x_snhash
= 0;
6098 if (symbol_get_tc (sym
)->symbol_class
== -1)
6099 a
->x_csect
.x_smclas
= XMC_PR
;
6101 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6102 a
->x_csect
.x_stab
= 0;
6103 a
->x_csect
.x_snstab
= 0;
6105 /* Don't let the COFF backend resort these symbols. */
6106 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6108 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6110 /* We want the value to be the symbol index of the referenced
6111 csect symbol. BFD will do that for us if we set the right
6113 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6114 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6116 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6117 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6119 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6124 block
= symbol_get_tc (sym
)->within
;
6127 /* The value is the offset from the enclosing csect. */
6130 csect
= symbol_get_tc (block
)->within
;
6131 resolve_symbol_value (csect
);
6132 base
= S_GET_VALUE (csect
);
6137 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6139 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6140 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6142 /* We want the value to be a file offset into the line numbers.
6143 BFD will do that for us if we set the right flags. We have
6144 already set the value correctly. */
6145 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6151 /* Adjust the symbol table. */
6154 ppc_adjust_symtab (void)
6159 /* Make sure C_DWARF symbols come right after C_FILE.
6160 As the C_FILE might not be defined yet and as C_DWARF
6161 might already be ordered, we insert them before the
6162 first symbol which isn't a C_FILE or a C_DWARF. */
6163 for (anchorSym
= symbol_rootP
; anchorSym
!= NULL
;
6164 anchorSym
= symbol_next (anchorSym
))
6166 if (S_GET_STORAGE_CLASS (anchorSym
) != C_FILE
6167 && S_GET_STORAGE_CLASS (anchorSym
) != C_DWARF
)
6174 if (S_GET_STORAGE_CLASS (sym
) != C_DWARF
)
6176 sym
= symbol_next (sym
);
6180 symbolS
* tsym
= sym
;
6181 sym
= symbol_next (sym
);
6183 symbol_remove (tsym
, &symbol_rootP
, &symbol_lastP
);
6184 symbol_insert (tsym
, anchorSym
, &symbol_rootP
, &symbol_lastP
);
6187 /* Create csect symbols for all absolute symbols. */
6192 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6196 union internal_auxent
*a
;
6198 if (S_GET_SEGMENT (sym
) != absolute_section
)
6201 csect
= symbol_create (".abs[XO]", absolute_section
,
6202 &zero_address_frag
, S_GET_VALUE (sym
));
6203 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6204 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6205 i
= S_GET_NUMBER_AUXILIARY (csect
);
6206 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6207 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6208 a
->x_csect
.x_scnlen
.l
= 0;
6209 a
->x_csect
.x_smtyp
= XTY_SD
;
6210 a
->x_csect
.x_parmhash
= 0;
6211 a
->x_csect
.x_snhash
= 0;
6212 a
->x_csect
.x_smclas
= XMC_XO
;
6213 a
->x_csect
.x_stab
= 0;
6214 a
->x_csect
.x_snstab
= 0;
6216 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6218 i
= S_GET_NUMBER_AUXILIARY (sym
);
6219 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6220 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6221 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6224 ppc_saw_abs
= false;
6227 /* Set the VMA for a section. This is called on all the sections in
6231 ppc_frob_section (asection
*sec
)
6233 static bfd_vma vma
= 0;
6235 /* Dwarf sections start at 0. */
6236 if (bfd_section_flags (sec
) & SEC_DEBUGGING
)
6239 vma
= md_section_align (sec
, vma
);
6240 bfd_set_section_vma (sec
, vma
);
6241 vma
+= bfd_section_size (sec
);
6244 #endif /* OBJ_XCOFF */
6247 md_atof (int type
, char *litp
, int *sizep
)
6249 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6252 /* Write a value out to the object file, using the appropriate
6256 md_number_to_chars (char *buf
, valueT val
, int n
)
6258 if (target_big_endian
)
6259 number_to_chars_bigendian (buf
, val
, n
);
6261 number_to_chars_littleendian (buf
, val
, n
);
6264 /* Align a section (I don't know why this is machine dependent). */
6267 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6272 int align
= bfd_section_alignment (seg
);
6274 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6278 /* We don't have any form of relaxing. */
6281 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6282 asection
*seg ATTRIBUTE_UNUSED
)
6288 /* Convert a machine dependent frag. We never generate these. */
6291 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6292 asection
*sec ATTRIBUTE_UNUSED
,
6293 fragS
*fragp ATTRIBUTE_UNUSED
)
6298 /* We have no need to default values of symbols. */
6301 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6306 /* Functions concerning relocs. */
6308 /* The location from which a PC relative jump should be calculated,
6309 given a PC relative reloc. */
6312 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6314 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6319 /* Return the surrending csect for sym when possible. */
6322 ppc_get_csect_to_adjust (symbolS
*sym
)
6327 valueT val
= resolve_symbol_value (sym
);
6328 TC_SYMFIELD_TYPE
*tc
= symbol_get_tc (sym
);
6329 segT symseg
= S_GET_SEGMENT (sym
);
6332 && tc
->symbol_class
!= XMC_TC0
6333 && tc
->symbol_class
!= XMC_TC
6334 && tc
->symbol_class
!= XMC_TE
6335 && symseg
!= bss_section
6336 && symseg
!= ppc_xcoff_tbss_section
.segment
6337 /* Don't adjust if this is a reloc in the toc section. */
6338 && (symseg
!= data_section
6339 || ppc_toc_csect
== NULL
6340 || val
< ppc_toc_frag
->fr_address
6341 || (ppc_after_toc_frag
!= NULL
6342 && val
>= ppc_after_toc_frag
->fr_address
)))
6344 symbolS
* csect
= tc
->within
;
6346 /* If the symbol was not declared by a label (eg: a section symbol),
6347 use the section instead of the csect. This doesn't happen in
6348 normal AIX assembly code. */
6350 csect
= seg_info (symseg
)->sym
;
6358 /* This is called to see whether a fixup should be adjusted to use a
6359 section symbol. We take the opportunity to change a fixup against
6360 a symbol in the TOC subsegment into a reloc against the
6361 corresponding .tc symbol. */
6364 ppc_fix_adjustable (fixS
*fix
)
6366 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6367 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6370 if (symseg
== absolute_section
)
6373 /* Always adjust symbols in debugging sections. */
6374 if (bfd_section_flags (symseg
) & SEC_DEBUGGING
)
6377 if (ppc_toc_csect
!= (symbolS
*) NULL
6378 && fix
->fx_addsy
!= ppc_toc_csect
6379 && symseg
== data_section
6380 && val
>= ppc_toc_frag
->fr_address
6381 && (ppc_after_toc_frag
== (fragS
*) NULL
6382 || val
< ppc_after_toc_frag
->fr_address
))
6386 for (sy
= symbol_next (ppc_toc_csect
);
6387 sy
!= (symbolS
*) NULL
;
6388 sy
= symbol_next (sy
))
6390 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6392 if (sy_tc
->symbol_class
== XMC_TC0
)
6394 if (sy_tc
->symbol_class
!= XMC_TC
6395 && sy_tc
->symbol_class
!= XMC_TE
)
6397 if (val
== resolve_symbol_value (sy
))
6400 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6405 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6406 _("symbol in .toc does not match any .tc"));
6409 /* Possibly adjust the reloc to be against the csect. */
6410 if ((csect
= ppc_get_csect_to_adjust (fix
->fx_addsy
)) != NULL
)
6412 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6413 fix
->fx_addsy
= csect
;
6416 if ((csect
= ppc_get_csect_to_adjust (fix
->fx_subsy
)) != NULL
)
6418 fix
->fx_offset
-= resolve_symbol_value (fix
->fx_subsy
)
6419 - symbol_get_frag (csect
)->fr_address
;
6420 fix
->fx_subsy
= csect
;
6423 /* Adjust a reloc against a .lcomm symbol to be against the base
6425 if (symseg
== bss_section
6426 && ! S_IS_EXTERNAL (fix
->fx_addsy
)
6427 && symbol_get_tc (fix
->fx_addsy
)->subseg
== 0)
6429 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6431 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6438 /* A reloc from one csect to another must be kept. The assembler
6439 will, of course, keep relocs between sections, and it will keep
6440 absolute relocs, but we need to force it to keep PC relative relocs
6441 between two csects in the same section. */
6444 ppc_force_relocation (fixS
*fix
)
6446 /* At this point fix->fx_addsy should already have been converted to
6447 a csect symbol. If the csect does not include the fragment, then
6448 we need to force the relocation. */
6450 && fix
->fx_addsy
!= NULL
6451 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6452 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6453 > fix
->fx_frag
->fr_address
)
6454 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6455 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6456 <= fix
->fx_frag
->fr_address
))))
6459 return generic_force_reloc (fix
);
6461 #endif /* OBJ_XCOFF */
6464 /* If this function returns non-zero, it guarantees that a relocation
6465 will be emitted for a fixup. */
6468 ppc_force_relocation (fixS
*fix
)
6470 /* Branch prediction relocations must force a relocation, as must
6471 the vtable description relocs. */
6472 switch (fix
->fx_r_type
)
6474 case BFD_RELOC_PPC_B16_BRTAKEN
:
6475 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6476 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6477 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6478 case BFD_RELOC_24_PLT_PCREL
:
6479 case BFD_RELOC_PPC64_TOC
:
6481 case BFD_RELOC_PPC_B26
:
6482 case BFD_RELOC_PPC_BA26
:
6483 case BFD_RELOC_PPC_B16
:
6484 case BFD_RELOC_PPC_BA16
:
6485 case BFD_RELOC_PPC64_REL24_NOTOC
:
6486 /* All branch fixups targeting a localentry symbol must
6487 force a relocation. */
6490 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6491 elf_symbol_type
*elfsym
= elf_symbol_from (bfdsym
);
6492 gas_assert (elfsym
);
6493 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6501 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6502 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
)
6505 return generic_force_reloc (fix
);
6509 ppc_fix_adjustable (fixS
*fix
)
6511 switch (fix
->fx_r_type
)
6513 /* All branch fixups targeting a localentry symbol must
6514 continue using the symbol. */
6515 case BFD_RELOC_PPC_B26
:
6516 case BFD_RELOC_PPC_BA26
:
6517 case BFD_RELOC_PPC_B16
:
6518 case BFD_RELOC_PPC_BA16
:
6519 case BFD_RELOC_PPC_B16_BRTAKEN
:
6520 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6521 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6522 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6523 case BFD_RELOC_PPC64_REL24_NOTOC
:
6526 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6527 elf_symbol_type
*elfsym
= elf_symbol_from (bfdsym
);
6528 gas_assert (elfsym
);
6529 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6537 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6538 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6539 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6540 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6541 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6542 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6543 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT_PCREL34
6544 && fix
->fx_r_type
!= BFD_RELOC_24_PLT_PCREL
6545 && fix
->fx_r_type
!= BFD_RELOC_32_PLTOFF
6546 && fix
->fx_r_type
!= BFD_RELOC_32_PLT_PCREL
6547 && fix
->fx_r_type
!= BFD_RELOC_LO16_PLTOFF
6548 && fix
->fx_r_type
!= BFD_RELOC_HI16_PLTOFF
6549 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_PLTOFF
6550 && fix
->fx_r_type
!= BFD_RELOC_64_PLTOFF
6551 && fix
->fx_r_type
!= BFD_RELOC_64_PLT_PCREL
6552 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT16_LO_DS
6553 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT_PCREL34
6554 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16
6555 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO
6556 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HI
6557 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HA
6558 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_DS
6559 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO_DS
6560 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6561 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_LO16A
6562 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HI16A
6563 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HA16A
6564 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6565 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6566 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6567 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
));
6572 ppc_frag_check (struct frag
*fragP
)
6574 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
6575 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6576 _("instruction address is not a multiple of %d"),
6577 fragP
->insn_addr
+ 1);
6580 /* rs_align_code frag handling. */
6582 enum ppc_nop_encoding_for_rs_align_code
6591 ppc_nop_select (void)
6593 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
6595 if ((ppc_cpu
& (PPC_OPCODE_POWER9
| PPC_OPCODE_E500MC
)) == 0)
6597 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
6598 return PPC_NOP_GROUP_P7
;
6599 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0)
6600 return PPC_NOP_GROUP_P6
;
6602 return PPC_NOP_VANILLA
;
6606 ppc_handle_align (struct frag
*fragP
)
6608 valueT count
= (fragP
->fr_next
->fr_address
6609 - (fragP
->fr_address
+ fragP
->fr_fix
));
6610 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6611 enum ppc_nop_encoding_for_rs_align_code nop_select
= *dest
& 0xff;
6613 /* Pad with zeros if not inserting a whole number of instructions.
6614 We could pad with zeros up to an instruction boundary then follow
6615 with nops but odd counts indicate data in an executable section
6616 so padding with zeros is most appropriate. */
6618 || (nop_select
== PPC_NOP_VLE
? (count
& 1) != 0 : (count
& 3) != 0))
6624 if (nop_select
== PPC_NOP_VLE
)
6628 md_number_to_chars (dest
, 0x4400, 2);
6634 if (count
> 4 * nop_limit
&& count
< 0x2000000)
6638 /* Make a branch, then follow with nops. Insert another
6639 frag to handle the nops. */
6640 md_number_to_chars (dest
, 0x48000000 + count
, 4);
6645 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6646 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
6647 fragP
->fr_next
= rest
;
6649 rest
->fr_address
+= rest
->fr_fix
+ 4;
6651 /* If we leave the next frag as rs_align_code we'll come here
6652 again, resulting in a bunch of branches rather than a
6653 branch followed by nops. */
6654 rest
->fr_type
= rs_align
;
6655 dest
= rest
->fr_literal
;
6658 md_number_to_chars (dest
, 0x60000000, 4);
6660 if (nop_select
>= PPC_NOP_GROUP_P6
)
6662 /* For power6, power7, and power8, we want the last nop to
6663 be a group terminating one. Do this by inserting an
6664 rs_fill frag immediately after this one, with its address
6665 set to the last nop location. This will automatically
6666 reduce the number of nops in the current frag by one. */
6669 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6671 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
6672 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
6673 group_nop
->fr_fix
= 0;
6674 group_nop
->fr_offset
= 1;
6675 group_nop
->fr_type
= rs_fill
;
6676 fragP
->fr_next
= group_nop
;
6677 dest
= group_nop
->fr_literal
;
6680 if (nop_select
== PPC_NOP_GROUP_P6
)
6681 /* power6 group terminating nop: "ori 1,1,0". */
6682 md_number_to_chars (dest
, 0x60210000, 4);
6684 /* power7/power8 group terminating nop: "ori 2,2,0". */
6685 md_number_to_chars (dest
, 0x60420000, 4);
6690 /* Apply a fixup to the object code. This is called for all the
6691 fixups we generated by the calls to fix_new_exp, above. */
6694 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
6696 valueT value
= * valP
;
6698 const struct powerpc_operand
*operand
;
6701 if (fixP
->fx_addsy
!= NULL
)
6703 /* Hack around bfd_install_relocation brain damage. */
6705 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
6707 if (fixP
->fx_addsy
== abs_section_sym
)
6713 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6714 the symbol values. If we are doing this relocation the code in
6715 write.c is going to call bfd_install_relocation, which is also
6716 going to use the symbol value. That means that if the reloc is
6717 fully resolved we want to use *valP since bfd_install_relocation is
6719 However, if the reloc is not fully resolved we do not want to
6720 use *valP, and must use fx_offset instead. If the relocation
6721 is PC-relative, we then need to re-apply md_pcrel_from_section
6722 to this new relocation value. */
6723 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
6728 value
= fixP
->fx_offset
;
6730 value
-= md_pcrel_from_section (fixP
, seg
);
6734 /* We are only able to convert some relocs to pc-relative. */
6737 switch (fixP
->fx_r_type
)
6740 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
6744 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
6748 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
6751 case BFD_RELOC_LO16
:
6752 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
6755 case BFD_RELOC_HI16
:
6756 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
6759 case BFD_RELOC_HI16_S
:
6760 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
6763 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6764 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGH
;
6767 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6768 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHA
;
6771 case BFD_RELOC_PPC64_HIGHER
:
6772 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER
;
6775 case BFD_RELOC_PPC64_HIGHER_S
:
6776 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA
;
6779 case BFD_RELOC_PPC64_HIGHEST
:
6780 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST
;
6783 case BFD_RELOC_PPC64_HIGHEST_S
:
6784 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA
;
6787 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
6788 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER34
;
6791 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
6792 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA34
;
6795 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
6796 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST34
;
6799 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
6800 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA34
;
6803 case BFD_RELOC_PPC_16DX_HA
:
6804 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6807 case BFD_RELOC_PPC64_D34
:
6808 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL34
;
6811 case BFD_RELOC_PPC64_D28
:
6812 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL28
;
6819 else if (!fixP
->fx_done
6820 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
6822 /* addpcis is relative to next insn address. */
6824 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6829 if (fixP
->fx_pcrel_adjust
!= 0)
6831 /* This is a fixup on an instruction. */
6832 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
6834 operand
= &powerpc_operands
[opindex
];
6836 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6837 does not generate a reloc. It uses the offset of `sym' within its
6838 csect. Other usages, such as `.long sym', generate relocs. This
6839 is the documented behaviour of non-TOC symbols. */
6840 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
6841 && (operand
->bitm
& 0xfff0) == 0xfff0
6842 && operand
->shift
== 0
6843 && (operand
->insert
== NULL
|| ppc_obj64
)
6844 && fixP
->fx_addsy
!= NULL
6845 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
6846 && !ppc_is_toc_sym (fixP
->fx_addsy
)
6847 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
6849 value
= fixP
->fx_offset
;
6853 /* During parsing of instructions, a TOC16 reloc is generated for
6854 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6855 in the toc. But at parse time, SYM may be not yet defined, so
6856 check again here. */
6857 if (fixP
->fx_r_type
== BFD_RELOC_16
6858 && fixP
->fx_addsy
!= NULL
6859 && ppc_is_toc_sym (fixP
->fx_addsy
))
6860 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
6864 /* Calculate value to be stored in field. */
6866 switch (fixP
->fx_r_type
)
6869 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
6870 case BFD_RELOC_PPC_VLE_LO16A
:
6871 case BFD_RELOC_PPC_VLE_LO16D
:
6873 case BFD_RELOC_LO16
:
6874 case BFD_RELOC_LO16_PCREL
:
6875 fieldval
= value
& 0xffff;
6877 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6878 fieldval
= SEX16 (fieldval
);
6879 fixP
->fx_no_overflow
= 1;
6882 case BFD_RELOC_HI16
:
6883 case BFD_RELOC_HI16_PCREL
:
6885 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6887 fieldval
= value
>> 16;
6888 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6890 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6891 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6897 case BFD_RELOC_PPC_VLE_HI16A
:
6898 case BFD_RELOC_PPC_VLE_HI16D
:
6899 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6901 fieldval
= PPC_HI (value
);
6902 goto sign_extend_16
;
6904 case BFD_RELOC_HI16_S
:
6905 case BFD_RELOC_HI16_S_PCREL
:
6906 case BFD_RELOC_PPC_16DX_HA
:
6907 case BFD_RELOC_PPC_REL16DX_HA
:
6909 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6911 fieldval
= (value
+ 0x8000) >> 16;
6912 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6914 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6915 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6921 case BFD_RELOC_PPC_VLE_HA16A
:
6922 case BFD_RELOC_PPC_VLE_HA16D
:
6923 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6925 fieldval
= PPC_HA (value
);
6926 goto sign_extend_16
;
6929 case BFD_RELOC_PPC64_HIGHER
:
6930 fieldval
= PPC_HIGHER (value
);
6931 goto sign_extend_16
;
6933 case BFD_RELOC_PPC64_HIGHER_S
:
6934 fieldval
= PPC_HIGHERA (value
);
6935 goto sign_extend_16
;
6937 case BFD_RELOC_PPC64_HIGHEST
:
6938 fieldval
= PPC_HIGHEST (value
);
6939 goto sign_extend_16
;
6941 case BFD_RELOC_PPC64_HIGHEST_S
:
6942 fieldval
= PPC_HIGHESTA (value
);
6943 goto sign_extend_16
;
6950 if (operand
!= NULL
)
6952 /* Handle relocs in an insn. */
6953 switch (fixP
->fx_r_type
)
6956 /* The following relocs can't be calculated by the assembler.
6957 Leave the field zero. */
6958 case BFD_RELOC_PPC_TPREL16
:
6959 case BFD_RELOC_PPC_TPREL16_LO
:
6960 case BFD_RELOC_PPC_TPREL16_HI
:
6961 case BFD_RELOC_PPC_TPREL16_HA
:
6962 case BFD_RELOC_PPC_DTPREL16
:
6963 case BFD_RELOC_PPC_DTPREL16_LO
:
6964 case BFD_RELOC_PPC_DTPREL16_HI
:
6965 case BFD_RELOC_PPC_DTPREL16_HA
:
6966 case BFD_RELOC_PPC_GOT_TLSGD16
:
6967 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
6968 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
6969 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
6970 case BFD_RELOC_PPC_GOT_TLSLD16
:
6971 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
6972 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
6973 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
6974 case BFD_RELOC_PPC_GOT_TPREL16
:
6975 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
6976 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
6977 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
6978 case BFD_RELOC_PPC_GOT_DTPREL16
:
6979 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
6980 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
6981 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
6982 case BFD_RELOC_PPC64_TPREL16_DS
:
6983 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
6984 case BFD_RELOC_PPC64_TPREL16_HIGH
:
6985 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
6986 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
6987 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
6988 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
6989 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
6990 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
6991 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
6992 case BFD_RELOC_PPC64_DTPREL16_DS
:
6993 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
6994 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
6995 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
6996 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
6997 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
6998 case BFD_RELOC_PPC64_TPREL34
:
6999 case BFD_RELOC_PPC64_DTPREL34
:
7000 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
7001 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
7002 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
7003 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
7004 gas_assert (fixP
->fx_addsy
!= NULL
);
7005 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7009 /* These also should leave the field zero for the same
7010 reason. Note that older versions of gas wrote values
7011 here. If we want to go back to the old behaviour, then
7012 all _LO and _LO_DS cases will need to be treated like
7013 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
7014 case BFD_RELOC_16_GOTOFF
:
7015 case BFD_RELOC_LO16_GOTOFF
:
7016 case BFD_RELOC_HI16_GOTOFF
:
7017 case BFD_RELOC_HI16_S_GOTOFF
:
7018 case BFD_RELOC_LO16_PLTOFF
:
7019 case BFD_RELOC_HI16_PLTOFF
:
7020 case BFD_RELOC_HI16_S_PLTOFF
:
7021 case BFD_RELOC_GPREL16
:
7022 case BFD_RELOC_16_BASEREL
:
7023 case BFD_RELOC_LO16_BASEREL
:
7024 case BFD_RELOC_HI16_BASEREL
:
7025 case BFD_RELOC_HI16_S_BASEREL
:
7026 case BFD_RELOC_PPC_TOC16
:
7027 case BFD_RELOC_PPC64_TOC16_LO
:
7028 case BFD_RELOC_PPC64_TOC16_HI
:
7029 case BFD_RELOC_PPC64_TOC16_HA
:
7030 case BFD_RELOC_PPC64_PLTGOT16
:
7031 case BFD_RELOC_PPC64_PLTGOT16_LO
:
7032 case BFD_RELOC_PPC64_PLTGOT16_HI
:
7033 case BFD_RELOC_PPC64_PLTGOT16_HA
:
7034 case BFD_RELOC_PPC64_GOT16_DS
:
7035 case BFD_RELOC_PPC64_GOT16_LO_DS
:
7036 case BFD_RELOC_PPC64_PLT16_LO_DS
:
7037 case BFD_RELOC_PPC64_SECTOFF_DS
:
7038 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
7039 case BFD_RELOC_PPC64_TOC16_DS
:
7040 case BFD_RELOC_PPC64_TOC16_LO_DS
:
7041 case BFD_RELOC_PPC64_PLTGOT16_DS
:
7042 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
7043 case BFD_RELOC_PPC_EMB_NADDR16
:
7044 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7045 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7046 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7047 case BFD_RELOC_PPC_EMB_SDAI16
:
7048 case BFD_RELOC_PPC_EMB_SDA2I16
:
7049 case BFD_RELOC_PPC_EMB_SDA2REL
:
7050 case BFD_RELOC_PPC_EMB_SDA21
:
7051 case BFD_RELOC_PPC_EMB_MRKREF
:
7052 case BFD_RELOC_PPC_EMB_RELSEC16
:
7053 case BFD_RELOC_PPC_EMB_RELST_LO
:
7054 case BFD_RELOC_PPC_EMB_RELST_HI
:
7055 case BFD_RELOC_PPC_EMB_RELST_HA
:
7056 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7057 case BFD_RELOC_PPC_EMB_RELSDA
:
7058 case BFD_RELOC_PPC_VLE_SDA21
:
7059 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7060 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7061 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
7062 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7063 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
7064 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7065 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
7066 case BFD_RELOC_PPC64_GOT_PCREL34
:
7067 case BFD_RELOC_PPC64_PLT_PCREL34
:
7068 gas_assert (fixP
->fx_addsy
!= NULL
);
7071 case BFD_RELOC_PPC_TLS
:
7072 case BFD_RELOC_PPC_TLSGD
:
7073 case BFD_RELOC_PPC_TLSLD
:
7074 case BFD_RELOC_PPC64_TLS_PCREL
:
7080 case BFD_RELOC_PPC_B16
:
7081 /* Adjust the offset to the instruction boundary. */
7086 case BFD_RELOC_VTABLE_INHERIT
:
7087 case BFD_RELOC_VTABLE_ENTRY
:
7088 case BFD_RELOC_PPC_DTPMOD
:
7089 case BFD_RELOC_PPC_TPREL
:
7090 case BFD_RELOC_PPC_DTPREL
:
7091 case BFD_RELOC_PPC_COPY
:
7092 case BFD_RELOC_PPC_GLOB_DAT
:
7093 case BFD_RELOC_32_PLT_PCREL
:
7094 case BFD_RELOC_PPC_EMB_NADDR32
:
7095 case BFD_RELOC_PPC64_TOC
:
7096 case BFD_RELOC_CTOR
:
7098 case BFD_RELOC_32_PCREL
:
7101 case BFD_RELOC_64_PCREL
:
7102 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7103 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7104 _("%s unsupported as instruction fixup"),
7105 bfd_get_reloc_code_name (fixP
->fx_r_type
));
7114 /* powerpc uses RELA style relocs, so if emitting a reloc the field
7115 contents can stay at zero. */
7116 #define APPLY_RELOC fixP->fx_done
7118 #define APPLY_RELOC 1
7120 /* We need to call the insert function even when fieldval is
7121 zero if the insert function would translate that zero to a
7122 bit pattern other than all zeros. */
7123 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
7126 unsigned char *where
;
7128 /* Fetch the instruction, insert the fully resolved operand
7129 value, and stuff the instruction back again. */
7130 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
7131 if (target_big_endian
)
7133 if (fixP
->fx_size
< 4)
7134 insn
= bfd_getb16 (where
);
7137 insn
= bfd_getb32 (where
);
7138 if (fixP
->fx_size
> 4)
7139 insn
= insn
<< 32 | bfd_getb32 (where
+ 4);
7144 if (fixP
->fx_size
< 4)
7145 insn
= bfd_getl16 (where
);
7148 insn
= bfd_getl32 (where
);
7149 if (fixP
->fx_size
> 4)
7150 insn
= insn
<< 32 | bfd_getl32 (where
+ 4);
7153 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
7154 fixP
->tc_fix_data
.ppc_cpu
,
7155 fixP
->fx_file
, fixP
->fx_line
);
7156 if (target_big_endian
)
7158 if (fixP
->fx_size
< 4)
7159 bfd_putb16 (insn
, where
);
7162 if (fixP
->fx_size
> 4)
7164 bfd_putb32 (insn
, where
+ 4);
7167 bfd_putb32 (insn
, where
);
7172 if (fixP
->fx_size
< 4)
7173 bfd_putl16 (insn
, where
);
7176 if (fixP
->fx_size
> 4)
7178 bfd_putl32 (insn
, where
+ 4);
7181 bfd_putl32 (insn
, where
);
7187 /* Nothing else to do here. */
7190 gas_assert (fixP
->fx_addsy
!= NULL
);
7191 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7196 /* Use expr_symbol_where to see if this is an expression
7198 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7199 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7200 _("unresolved expression that must be resolved"));
7202 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7203 _("unsupported relocation against %s"),
7204 S_GET_NAME (fixP
->fx_addsy
));
7211 /* Handle relocs in data. */
7212 switch (fixP
->fx_r_type
)
7214 case BFD_RELOC_VTABLE_INHERIT
:
7216 && !S_IS_DEFINED (fixP
->fx_addsy
)
7217 && !S_IS_WEAK (fixP
->fx_addsy
))
7218 S_SET_WEAK (fixP
->fx_addsy
);
7221 case BFD_RELOC_VTABLE_ENTRY
:
7226 /* These can appear with @l etc. in data. */
7227 case BFD_RELOC_LO16
:
7228 case BFD_RELOC_LO16_PCREL
:
7229 case BFD_RELOC_HI16
:
7230 case BFD_RELOC_HI16_PCREL
:
7231 case BFD_RELOC_HI16_S
:
7232 case BFD_RELOC_HI16_S_PCREL
:
7233 case BFD_RELOC_PPC64_HIGHER
:
7234 case BFD_RELOC_PPC64_HIGHER_S
:
7235 case BFD_RELOC_PPC64_HIGHEST
:
7236 case BFD_RELOC_PPC64_HIGHEST_S
:
7237 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7238 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7239 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7242 case BFD_RELOC_PPC_DTPMOD
:
7243 case BFD_RELOC_PPC_TPREL
:
7244 case BFD_RELOC_PPC_DTPREL
:
7245 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7248 /* Just punt all of these to the linker. */
7249 case BFD_RELOC_PPC_B16_BRTAKEN
:
7250 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7251 case BFD_RELOC_16_GOTOFF
:
7252 case BFD_RELOC_LO16_GOTOFF
:
7253 case BFD_RELOC_HI16_GOTOFF
:
7254 case BFD_RELOC_HI16_S_GOTOFF
:
7255 case BFD_RELOC_LO16_PLTOFF
:
7256 case BFD_RELOC_HI16_PLTOFF
:
7257 case BFD_RELOC_HI16_S_PLTOFF
:
7258 case BFD_RELOC_PPC_COPY
:
7259 case BFD_RELOC_PPC_GLOB_DAT
:
7260 case BFD_RELOC_16_BASEREL
:
7261 case BFD_RELOC_LO16_BASEREL
:
7262 case BFD_RELOC_HI16_BASEREL
:
7263 case BFD_RELOC_HI16_S_BASEREL
:
7264 case BFD_RELOC_PPC_TLS
:
7265 case BFD_RELOC_PPC_DTPREL16_LO
:
7266 case BFD_RELOC_PPC_DTPREL16_HI
:
7267 case BFD_RELOC_PPC_DTPREL16_HA
:
7268 case BFD_RELOC_PPC_TPREL16_LO
:
7269 case BFD_RELOC_PPC_TPREL16_HI
:
7270 case BFD_RELOC_PPC_TPREL16_HA
:
7271 case BFD_RELOC_PPC_GOT_TLSGD16
:
7272 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7273 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7274 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7275 case BFD_RELOC_PPC_GOT_TLSLD16
:
7276 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7277 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7278 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7279 case BFD_RELOC_PPC_GOT_DTPREL16
:
7280 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7281 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7282 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7283 case BFD_RELOC_PPC_GOT_TPREL16
:
7284 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7285 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7286 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7287 case BFD_RELOC_24_PLT_PCREL
:
7288 case BFD_RELOC_PPC_LOCAL24PC
:
7289 case BFD_RELOC_32_PLT_PCREL
:
7290 case BFD_RELOC_GPREL16
:
7291 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7292 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7293 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7294 case BFD_RELOC_PPC_EMB_NADDR32
:
7295 case BFD_RELOC_PPC_EMB_NADDR16
:
7296 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7297 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7298 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7299 case BFD_RELOC_PPC_EMB_SDAI16
:
7300 case BFD_RELOC_PPC_EMB_SDA2REL
:
7301 case BFD_RELOC_PPC_EMB_SDA2I16
:
7302 case BFD_RELOC_PPC_EMB_SDA21
:
7303 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7304 case BFD_RELOC_PPC_EMB_MRKREF
:
7305 case BFD_RELOC_PPC_EMB_RELSEC16
:
7306 case BFD_RELOC_PPC_EMB_RELST_LO
:
7307 case BFD_RELOC_PPC_EMB_RELST_HI
:
7308 case BFD_RELOC_PPC_EMB_RELST_HA
:
7309 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7310 case BFD_RELOC_PPC_EMB_RELSDA
:
7311 case BFD_RELOC_PPC64_TOC
:
7312 case BFD_RELOC_PPC_TOC16
:
7313 case BFD_RELOC_PPC_TOC16_LO
:
7314 case BFD_RELOC_PPC_TOC16_HI
:
7315 case BFD_RELOC_PPC64_TOC16_LO
:
7316 case BFD_RELOC_PPC64_TOC16_HI
:
7317 case BFD_RELOC_PPC64_TOC16_HA
:
7318 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7319 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7320 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7321 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7322 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7323 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7324 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7325 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7326 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7327 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7328 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7329 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7330 case BFD_RELOC_PPC64_TLS_PCREL
:
7336 case BFD_RELOC_PPC_TLSGD
:
7337 case BFD_RELOC_PPC_TLSLD
:
7338 case BFD_RELOC_PPC_TLSLE
:
7339 case BFD_RELOC_PPC_TLSIE
:
7340 case BFD_RELOC_PPC_TLSM
:
7341 case BFD_RELOC_PPC64_TLSGD
:
7342 case BFD_RELOC_PPC64_TLSLD
:
7343 case BFD_RELOC_PPC64_TLSLE
:
7344 case BFD_RELOC_PPC64_TLSIE
:
7345 case BFD_RELOC_PPC64_TLSM
:
7346 gas_assert (fixP
->fx_addsy
!= NULL
);
7347 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7351 /* TLSML relocations are targeting a XMC_TC symbol named
7352 "_$TLSML". We can't check earlier because the relocation
7353 can target any symbol name which will be latter .rename
7355 case BFD_RELOC_PPC_TLSML
:
7356 case BFD_RELOC_PPC64_TLSML
:
7357 gas_assert (fixP
->fx_addsy
!= NULL
);
7358 if (strcmp (symbol_get_tc (fixP
->fx_addsy
)->real_name
, "_$TLSML") != 0)
7360 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7361 _("R_TLSML relocation doesn't target a "
7362 "symbol named \"_$TLSML\". %s"), S_GET_NAME(fixP
->fx_addsy
));
7367 case BFD_RELOC_NONE
:
7369 case BFD_RELOC_CTOR
:
7371 case BFD_RELOC_32_PCREL
:
7374 case BFD_RELOC_64_PCREL
:
7376 case BFD_RELOC_16_PCREL
:
7382 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7387 if (fixP
->fx_size
&& APPLY_RELOC
)
7388 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7389 fieldval
, fixP
->fx_size
);
7391 && (seg
->flags
& SEC_CODE
) != 0
7392 && fixP
->fx_size
== 4
7395 && (fixP
->fx_r_type
== BFD_RELOC_32
7396 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7397 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7398 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7399 _("data in executable section"));
7403 ppc_elf_validate_fix (fixP
, seg
);
7404 fixP
->fx_addnumber
= value
;
7406 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7407 from the section contents. If we are going to be emitting a reloc
7408 then the section contents are immaterial, so don't warn if they
7409 happen to overflow. Leave such warnings to ld. */
7412 fixP
->fx_no_overflow
= 1;
7414 /* Arrange to emit .TOC. as a normal symbol if used in anything
7415 but .TOC.@tocbase. */
7417 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7418 && fixP
->fx_addsy
!= NULL
7419 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7420 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7423 if (fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16
7424 || fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_HI
7425 || fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_LO
)
7427 /* We want to use the offset within the toc, not the actual VMA
7429 fixP
->fx_addnumber
= (- bfd_section_vma (S_GET_SEGMENT (fixP
->fx_addsy
))
7430 - S_GET_VALUE (ppc_toc_csect
));
7432 /* The high bits must be adjusted for the low bits being signed. */
7433 if (fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_HI
) {
7434 fixP
->fx_addnumber
+= 0x8000;
7437 /* Set *valP to avoid errors. */
7440 else if (fixP
->fx_r_type
== BFD_RELOC_PPC_TLSM
7441 || fixP
->fx_r_type
== BFD_RELOC_PPC64_TLSM
)
7442 /* AIX ld expects the section contents for these relocations
7443 to be zero. Arrange for that to occur when
7444 bfd_install_relocation is called. */
7445 fixP
->fx_addnumber
= (- bfd_section_vma (S_GET_SEGMENT (fixP
->fx_addsy
))
7446 - S_GET_VALUE (fixP
->fx_addsy
));
7448 fixP
->fx_addnumber
= 0;
7452 /* Generate a reloc for a fixup. */
7455 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7457 static arelent
*relocs
[3];
7460 relocs
[0] = reloc
= XNEW (arelent
);
7463 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7464 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7465 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7466 /* BFD_RELOC_PPC64_TLS_PCREL generates R_PPC64_TLS with an odd r_offset. */
7467 if (fixp
->fx_r_type
== BFD_RELOC_PPC64_TLS_PCREL
)
7469 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7470 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7472 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7473 _("reloc %d not supported by object file format"),
7474 (int) fixp
->fx_r_type
);
7477 reloc
->addend
= fixp
->fx_addnumber
;
7479 if (fixp
->fx_subsy
&& fixp
->fx_addsy
)
7481 relocs
[1] = reloc
= XNEW (arelent
);
7484 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7485 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
7486 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7488 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_PPC_NEG
);
7489 reloc
->addend
= fixp
->fx_addnumber
;
7491 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7493 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7494 _("reloc %d not supported by object file format"),
7505 ppc_cfi_frame_initial_instructions (void)
7507 cfi_add_CFA_def_cfa (1, 0);
7511 tc_ppc_regname_to_dw2regnum (char *regname
)
7513 unsigned int regnum
= -1;
7517 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7519 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7520 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7521 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7522 { "spe_acc", 111 }, { "spefscr", 112 }
7525 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7526 if (strcmp (regnames
[i
].name
, regname
) == 0)
7527 return regnames
[i
].dw2regnum
;
7529 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7531 p
= regname
+ 1 + (regname
[1] == '.');
7532 regnum
= strtoul (p
, &q
, 10);
7533 if (p
== q
|| *q
|| regnum
>= 32)
7535 if (regname
[0] == 'f')
7537 else if (regname
[0] == 'v')
7540 else if (regname
[0] == 'c' && regname
[1] == 'r')
7542 p
= regname
+ 2 + (regname
[2] == '.');
7543 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7545 regnum
= p
[0] - '0' + 68;