1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2022 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
35 #include "coff/xcoff.h"
39 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
41 /* Tell the main code what the endianness is. */
42 extern int target_big_endian
;
44 /* Whether or not, we've set target_big_endian. */
45 static int set_target_endian
= 0;
47 /* Whether to use user friendly register names. */
48 #ifndef TARGET_REG_NAMES_P
49 #define TARGET_REG_NAMES_P false
52 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
55 /* #lo(value) denotes the least significant 16 bits of the indicated. */
56 #define PPC_LO(v) ((v) & 0xffff)
58 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
59 #define PPC_HI(v) (((v) >> 16) & 0xffff)
61 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
62 the indicated value, compensating for #lo() being treated as a
64 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
66 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
67 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
69 /* #highera(value) denotes bits 32 through 47 of the indicated value,
70 compensating for #lo() being treated as a signed number. */
71 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
73 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
74 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
76 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
77 compensating for #lo being treated as a signed number. */
78 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
80 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
82 /* For the time being on ppc64, don't report overflow on @h and @ha
83 applied to constants. */
84 #define REPORT_OVERFLOW_HI 0
86 static bool reg_names_p
= TARGET_REG_NAMES_P
;
88 static void ppc_byte (int);
90 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
91 static void ppc_tc (int);
92 static void ppc_machine (int);
96 static void ppc_comm (int);
97 static void ppc_bb (int);
98 static void ppc_bc (int);
99 static void ppc_bf (int);
100 static void ppc_biei (int);
101 static void ppc_bs (int);
102 static void ppc_eb (int);
103 static void ppc_ec (int);
104 static void ppc_ef (int);
105 static void ppc_es (int);
106 static void ppc_csect (int);
107 static void ppc_dwsect (int);
108 static void ppc_change_csect (symbolS
*, offsetT
);
109 static void ppc_file (int);
110 static void ppc_function (int);
111 static void ppc_extern (int);
112 static void ppc_globl (int);
113 static void ppc_lglobl (int);
114 static void ppc_ref (int);
115 static void ppc_section (int);
116 static void ppc_named_section (int);
117 static void ppc_stabx (int);
118 static void ppc_rename (int);
119 static void ppc_toc (int);
120 static void ppc_xcoff_cons (int);
121 static void ppc_vbyte (int);
122 static void ppc_weak (int);
123 static void ppc_GNU_visibility (int);
127 static void ppc_elf_rdata (int);
128 static void ppc_elf_lcomm (int);
129 static void ppc_elf_localentry (int);
130 static void ppc_elf_abiversion (int);
131 static void ppc_elf_gnu_attribute (int);
134 /* Generic assembler global variables which must be defined by all
138 /* This string holds the chars that always start a comment. If the
139 pre-processor is disabled, these aren't very useful. The macro
140 tc_comment_chars points to this. We use this, rather than the
141 usual comment_chars, so that we can switch for Solaris conventions. */
142 static const char ppc_solaris_comment_chars
[] = "#!";
143 static const char ppc_eabi_comment_chars
[] = "#";
145 #ifdef TARGET_SOLARIS_COMMENT
146 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
148 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
151 const char comment_chars
[] = "#";
154 /* Characters which start a comment at the beginning of a line. */
155 const char line_comment_chars
[] = "#";
157 /* Characters which may be used to separate multiple commands on a
159 const char line_separator_chars
[] = ";";
161 /* Characters which are used to indicate an exponent in a floating
163 const char EXP_CHARS
[] = "eE";
165 /* Characters which mean that a number is a floating point constant,
167 const char FLT_CHARS
[] = "dD";
169 /* Anything that can start an operand needs to be mentioned here,
170 to stop the input scrubber eating whitespace. */
171 const char ppc_symbol_chars
[] = "%[";
173 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
174 int ppc_cie_data_alignment
;
176 /* The dwarf2 minimum instruction length. */
177 int ppc_dwarf2_line_min_insn_length
;
179 /* More than this number of nops in an alignment op gets a branch
181 unsigned long nop_limit
= 4;
183 /* The type of processor we are assembling for. This is one or more
184 of the PPC_OPCODE flags defined in opcode/ppc.h. */
185 ppc_cpu_t ppc_cpu
= 0;
186 ppc_cpu_t sticky
= 0;
188 /* Value for ELF e_flags EF_PPC64_ABI. */
189 unsigned int ppc_abiversion
= 0;
192 /* Flags set on encountering toc relocs. */
194 has_large_toc_reloc
= 1,
195 has_small_toc_reloc
= 2
199 /* Warn on emitting data to code sections. */
205 /* The target specific pseudo-ops which we support. */
207 const pseudo_typeS md_pseudo_table
[] =
209 /* Pseudo-ops which must be overridden. */
210 { "byte", ppc_byte
, 0 },
213 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
214 legitimately belong in the obj-*.c file. However, XCOFF is based
215 on COFF, and is only implemented for the RS/6000. We just use
216 obj-coff.c, and add what we need here. */
217 { "comm", ppc_comm
, 0 },
218 { "lcomm", ppc_comm
, 1 },
222 { "bi", ppc_biei
, 0 },
224 { "csect", ppc_csect
, 0 },
225 { "dwsect", ppc_dwsect
, 0 },
226 { "data", ppc_section
, 'd' },
230 { "ei", ppc_biei
, 1 },
232 { "extern", ppc_extern
, 0 },
233 { "file", ppc_file
, 0 },
234 { "function", ppc_function
, 0 },
235 { "globl", ppc_globl
, 0 },
236 { "lglobl", ppc_lglobl
, 0 },
237 { "ref", ppc_ref
, 0 },
238 { "rename", ppc_rename
, 0 },
239 { "section", ppc_named_section
, 0 },
240 { "stabx", ppc_stabx
, 0 },
241 { "text", ppc_section
, 't' },
242 { "toc", ppc_toc
, 0 },
243 { "long", ppc_xcoff_cons
, 2 },
244 { "llong", ppc_xcoff_cons
, 3 },
245 { "word", ppc_xcoff_cons
, 1 },
246 { "short", ppc_xcoff_cons
, 1 },
247 { "vbyte", ppc_vbyte
, 0 },
248 { "weak", ppc_weak
, 0 },
250 /* Enable GNU syntax for symbol visibility. */
251 {"internal", ppc_GNU_visibility
, SYM_V_INTERNAL
},
252 {"hidden", ppc_GNU_visibility
, SYM_V_HIDDEN
},
253 {"protected", ppc_GNU_visibility
, SYM_V_PROTECTED
},
257 { "llong", cons
, 8 },
258 { "rdata", ppc_elf_rdata
, 0 },
259 { "rodata", ppc_elf_rdata
, 0 },
260 { "lcomm", ppc_elf_lcomm
, 0 },
261 { "localentry", ppc_elf_localentry
, 0 },
262 { "abiversion", ppc_elf_abiversion
, 0 },
263 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
266 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
268 { "machine", ppc_machine
, 0 },
275 /* Predefined register names if -mregnames (or default for Windows NT).
276 In general, there are lots of them, in an attempt to be compatible
277 with a number of other Windows NT assemblers. */
279 /* Structure to hold information about predefined registers. */
283 unsigned short value
;
284 unsigned short flags
;
287 /* List of registers that are pre-defined:
289 Each general register has predefined names of the form:
290 1. r<reg_num> which has the value <reg_num>.
291 2. r.<reg_num> which has the value <reg_num>.
293 Each floating point register has predefined names of the form:
294 1. f<reg_num> which has the value <reg_num>.
295 2. f.<reg_num> which has the value <reg_num>.
297 Each vector unit register has predefined names of the form:
298 1. v<reg_num> which has the value <reg_num>.
299 2. v.<reg_num> which has the value <reg_num>.
301 Each condition register has predefined names of the form:
302 1. cr<reg_num> which has the value <reg_num>.
303 2. cr.<reg_num> which has the value <reg_num>.
305 There are individual registers as well:
306 sp or r.sp has the value 1
307 rtoc or r.toc has the value 2
312 dsisr has the value 18
314 sdr1 has the value 25
315 srr0 has the value 26
316 srr1 has the value 27
318 The table is sorted. Suitable for searching by a binary search. */
320 static const struct pd_reg pre_defined_registers
[] =
322 /* VSX accumulators. */
323 { "a0", 0, PPC_OPERAND_ACC
},
324 { "a1", 1, PPC_OPERAND_ACC
},
325 { "a2", 2, PPC_OPERAND_ACC
},
326 { "a3", 3, PPC_OPERAND_ACC
},
327 { "a4", 4, PPC_OPERAND_ACC
},
328 { "a5", 5, PPC_OPERAND_ACC
},
329 { "a6", 6, PPC_OPERAND_ACC
},
330 { "a7", 7, PPC_OPERAND_ACC
},
332 /* Condition Registers */
333 { "cr.0", 0, PPC_OPERAND_CR_REG
},
334 { "cr.1", 1, PPC_OPERAND_CR_REG
},
335 { "cr.2", 2, PPC_OPERAND_CR_REG
},
336 { "cr.3", 3, PPC_OPERAND_CR_REG
},
337 { "cr.4", 4, PPC_OPERAND_CR_REG
},
338 { "cr.5", 5, PPC_OPERAND_CR_REG
},
339 { "cr.6", 6, PPC_OPERAND_CR_REG
},
340 { "cr.7", 7, PPC_OPERAND_CR_REG
},
342 { "cr0", 0, PPC_OPERAND_CR_REG
},
343 { "cr1", 1, PPC_OPERAND_CR_REG
},
344 { "cr2", 2, PPC_OPERAND_CR_REG
},
345 { "cr3", 3, PPC_OPERAND_CR_REG
},
346 { "cr4", 4, PPC_OPERAND_CR_REG
},
347 { "cr5", 5, PPC_OPERAND_CR_REG
},
348 { "cr6", 6, PPC_OPERAND_CR_REG
},
349 { "cr7", 7, PPC_OPERAND_CR_REG
},
351 { "ctr", 9, PPC_OPERAND_SPR
},
352 { "dar", 19, PPC_OPERAND_SPR
},
353 { "dec", 22, PPC_OPERAND_SPR
},
354 { "dsisr", 18, PPC_OPERAND_SPR
},
356 /* Dense Math Registers. */
357 { "dm0", 0, PPC_OPERAND_DMR
},
358 { "dm1", 1, PPC_OPERAND_DMR
},
359 { "dm2", 2, PPC_OPERAND_DMR
},
360 { "dm3", 3, PPC_OPERAND_DMR
},
361 { "dm4", 4, PPC_OPERAND_DMR
},
362 { "dm5", 5, PPC_OPERAND_DMR
},
363 { "dm6", 6, PPC_OPERAND_DMR
},
364 { "dm7", 7, PPC_OPERAND_DMR
},
366 /* Floating point registers */
367 { "f.0", 0, PPC_OPERAND_FPR
},
368 { "f.1", 1, PPC_OPERAND_FPR
},
369 { "f.10", 10, PPC_OPERAND_FPR
},
370 { "f.11", 11, PPC_OPERAND_FPR
},
371 { "f.12", 12, PPC_OPERAND_FPR
},
372 { "f.13", 13, PPC_OPERAND_FPR
},
373 { "f.14", 14, PPC_OPERAND_FPR
},
374 { "f.15", 15, PPC_OPERAND_FPR
},
375 { "f.16", 16, PPC_OPERAND_FPR
},
376 { "f.17", 17, PPC_OPERAND_FPR
},
377 { "f.18", 18, PPC_OPERAND_FPR
},
378 { "f.19", 19, PPC_OPERAND_FPR
},
379 { "f.2", 2, PPC_OPERAND_FPR
},
380 { "f.20", 20, PPC_OPERAND_FPR
},
381 { "f.21", 21, PPC_OPERAND_FPR
},
382 { "f.22", 22, PPC_OPERAND_FPR
},
383 { "f.23", 23, PPC_OPERAND_FPR
},
384 { "f.24", 24, PPC_OPERAND_FPR
},
385 { "f.25", 25, PPC_OPERAND_FPR
},
386 { "f.26", 26, PPC_OPERAND_FPR
},
387 { "f.27", 27, PPC_OPERAND_FPR
},
388 { "f.28", 28, PPC_OPERAND_FPR
},
389 { "f.29", 29, PPC_OPERAND_FPR
},
390 { "f.3", 3, PPC_OPERAND_FPR
},
391 { "f.30", 30, PPC_OPERAND_FPR
},
392 { "f.31", 31, PPC_OPERAND_FPR
},
393 { "f.32", 32, PPC_OPERAND_VSR
},
394 { "f.33", 33, PPC_OPERAND_VSR
},
395 { "f.34", 34, PPC_OPERAND_VSR
},
396 { "f.35", 35, PPC_OPERAND_VSR
},
397 { "f.36", 36, PPC_OPERAND_VSR
},
398 { "f.37", 37, PPC_OPERAND_VSR
},
399 { "f.38", 38, PPC_OPERAND_VSR
},
400 { "f.39", 39, PPC_OPERAND_VSR
},
401 { "f.4", 4, PPC_OPERAND_FPR
},
402 { "f.40", 40, PPC_OPERAND_VSR
},
403 { "f.41", 41, PPC_OPERAND_VSR
},
404 { "f.42", 42, PPC_OPERAND_VSR
},
405 { "f.43", 43, PPC_OPERAND_VSR
},
406 { "f.44", 44, PPC_OPERAND_VSR
},
407 { "f.45", 45, PPC_OPERAND_VSR
},
408 { "f.46", 46, PPC_OPERAND_VSR
},
409 { "f.47", 47, PPC_OPERAND_VSR
},
410 { "f.48", 48, PPC_OPERAND_VSR
},
411 { "f.49", 49, PPC_OPERAND_VSR
},
412 { "f.5", 5, PPC_OPERAND_FPR
},
413 { "f.50", 50, PPC_OPERAND_VSR
},
414 { "f.51", 51, PPC_OPERAND_VSR
},
415 { "f.52", 52, PPC_OPERAND_VSR
},
416 { "f.53", 53, PPC_OPERAND_VSR
},
417 { "f.54", 54, PPC_OPERAND_VSR
},
418 { "f.55", 55, PPC_OPERAND_VSR
},
419 { "f.56", 56, PPC_OPERAND_VSR
},
420 { "f.57", 57, PPC_OPERAND_VSR
},
421 { "f.58", 58, PPC_OPERAND_VSR
},
422 { "f.59", 59, PPC_OPERAND_VSR
},
423 { "f.6", 6, PPC_OPERAND_FPR
},
424 { "f.60", 60, PPC_OPERAND_VSR
},
425 { "f.61", 61, PPC_OPERAND_VSR
},
426 { "f.62", 62, PPC_OPERAND_VSR
},
427 { "f.63", 63, PPC_OPERAND_VSR
},
428 { "f.7", 7, PPC_OPERAND_FPR
},
429 { "f.8", 8, PPC_OPERAND_FPR
},
430 { "f.9", 9, PPC_OPERAND_FPR
},
432 { "f0", 0, PPC_OPERAND_FPR
},
433 { "f1", 1, PPC_OPERAND_FPR
},
434 { "f10", 10, PPC_OPERAND_FPR
},
435 { "f11", 11, PPC_OPERAND_FPR
},
436 { "f12", 12, PPC_OPERAND_FPR
},
437 { "f13", 13, PPC_OPERAND_FPR
},
438 { "f14", 14, PPC_OPERAND_FPR
},
439 { "f15", 15, PPC_OPERAND_FPR
},
440 { "f16", 16, PPC_OPERAND_FPR
},
441 { "f17", 17, PPC_OPERAND_FPR
},
442 { "f18", 18, PPC_OPERAND_FPR
},
443 { "f19", 19, PPC_OPERAND_FPR
},
444 { "f2", 2, PPC_OPERAND_FPR
},
445 { "f20", 20, PPC_OPERAND_FPR
},
446 { "f21", 21, PPC_OPERAND_FPR
},
447 { "f22", 22, PPC_OPERAND_FPR
},
448 { "f23", 23, PPC_OPERAND_FPR
},
449 { "f24", 24, PPC_OPERAND_FPR
},
450 { "f25", 25, PPC_OPERAND_FPR
},
451 { "f26", 26, PPC_OPERAND_FPR
},
452 { "f27", 27, PPC_OPERAND_FPR
},
453 { "f28", 28, PPC_OPERAND_FPR
},
454 { "f29", 29, PPC_OPERAND_FPR
},
455 { "f3", 3, PPC_OPERAND_FPR
},
456 { "f30", 30, PPC_OPERAND_FPR
},
457 { "f31", 31, PPC_OPERAND_FPR
},
458 { "f32", 32, PPC_OPERAND_VSR
},
459 { "f33", 33, PPC_OPERAND_VSR
},
460 { "f34", 34, PPC_OPERAND_VSR
},
461 { "f35", 35, PPC_OPERAND_VSR
},
462 { "f36", 36, PPC_OPERAND_VSR
},
463 { "f37", 37, PPC_OPERAND_VSR
},
464 { "f38", 38, PPC_OPERAND_VSR
},
465 { "f39", 39, PPC_OPERAND_VSR
},
466 { "f4", 4, PPC_OPERAND_FPR
},
467 { "f40", 40, PPC_OPERAND_VSR
},
468 { "f41", 41, PPC_OPERAND_VSR
},
469 { "f42", 42, PPC_OPERAND_VSR
},
470 { "f43", 43, PPC_OPERAND_VSR
},
471 { "f44", 44, PPC_OPERAND_VSR
},
472 { "f45", 45, PPC_OPERAND_VSR
},
473 { "f46", 46, PPC_OPERAND_VSR
},
474 { "f47", 47, PPC_OPERAND_VSR
},
475 { "f48", 48, PPC_OPERAND_VSR
},
476 { "f49", 49, PPC_OPERAND_VSR
},
477 { "f5", 5, PPC_OPERAND_FPR
},
478 { "f50", 50, PPC_OPERAND_VSR
},
479 { "f51", 51, PPC_OPERAND_VSR
},
480 { "f52", 52, PPC_OPERAND_VSR
},
481 { "f53", 53, PPC_OPERAND_VSR
},
482 { "f54", 54, PPC_OPERAND_VSR
},
483 { "f55", 55, PPC_OPERAND_VSR
},
484 { "f56", 56, PPC_OPERAND_VSR
},
485 { "f57", 57, PPC_OPERAND_VSR
},
486 { "f58", 58, PPC_OPERAND_VSR
},
487 { "f59", 59, PPC_OPERAND_VSR
},
488 { "f6", 6, PPC_OPERAND_FPR
},
489 { "f60", 60, PPC_OPERAND_VSR
},
490 { "f61", 61, PPC_OPERAND_VSR
},
491 { "f62", 62, PPC_OPERAND_VSR
},
492 { "f63", 63, PPC_OPERAND_VSR
},
493 { "f7", 7, PPC_OPERAND_FPR
},
494 { "f8", 8, PPC_OPERAND_FPR
},
495 { "f9", 9, PPC_OPERAND_FPR
},
497 /* Quantization registers used with pair single instructions. */
498 { "gqr.0", 0, PPC_OPERAND_GQR
},
499 { "gqr.1", 1, PPC_OPERAND_GQR
},
500 { "gqr.2", 2, PPC_OPERAND_GQR
},
501 { "gqr.3", 3, PPC_OPERAND_GQR
},
502 { "gqr.4", 4, PPC_OPERAND_GQR
},
503 { "gqr.5", 5, PPC_OPERAND_GQR
},
504 { "gqr.6", 6, PPC_OPERAND_GQR
},
505 { "gqr.7", 7, PPC_OPERAND_GQR
},
506 { "gqr0", 0, PPC_OPERAND_GQR
},
507 { "gqr1", 1, PPC_OPERAND_GQR
},
508 { "gqr2", 2, PPC_OPERAND_GQR
},
509 { "gqr3", 3, PPC_OPERAND_GQR
},
510 { "gqr4", 4, PPC_OPERAND_GQR
},
511 { "gqr5", 5, PPC_OPERAND_GQR
},
512 { "gqr6", 6, PPC_OPERAND_GQR
},
513 { "gqr7", 7, PPC_OPERAND_GQR
},
515 { "lr", 8, PPC_OPERAND_SPR
},
517 /* General Purpose Registers */
518 { "r.0", 0, PPC_OPERAND_GPR
},
519 { "r.1", 1, PPC_OPERAND_GPR
},
520 { "r.10", 10, PPC_OPERAND_GPR
},
521 { "r.11", 11, PPC_OPERAND_GPR
},
522 { "r.12", 12, PPC_OPERAND_GPR
},
523 { "r.13", 13, PPC_OPERAND_GPR
},
524 { "r.14", 14, PPC_OPERAND_GPR
},
525 { "r.15", 15, PPC_OPERAND_GPR
},
526 { "r.16", 16, PPC_OPERAND_GPR
},
527 { "r.17", 17, PPC_OPERAND_GPR
},
528 { "r.18", 18, PPC_OPERAND_GPR
},
529 { "r.19", 19, PPC_OPERAND_GPR
},
530 { "r.2", 2, PPC_OPERAND_GPR
},
531 { "r.20", 20, PPC_OPERAND_GPR
},
532 { "r.21", 21, PPC_OPERAND_GPR
},
533 { "r.22", 22, PPC_OPERAND_GPR
},
534 { "r.23", 23, PPC_OPERAND_GPR
},
535 { "r.24", 24, PPC_OPERAND_GPR
},
536 { "r.25", 25, PPC_OPERAND_GPR
},
537 { "r.26", 26, PPC_OPERAND_GPR
},
538 { "r.27", 27, PPC_OPERAND_GPR
},
539 { "r.28", 28, PPC_OPERAND_GPR
},
540 { "r.29", 29, PPC_OPERAND_GPR
},
541 { "r.3", 3, PPC_OPERAND_GPR
},
542 { "r.30", 30, PPC_OPERAND_GPR
},
543 { "r.31", 31, PPC_OPERAND_GPR
},
544 { "r.4", 4, PPC_OPERAND_GPR
},
545 { "r.5", 5, PPC_OPERAND_GPR
},
546 { "r.6", 6, PPC_OPERAND_GPR
},
547 { "r.7", 7, PPC_OPERAND_GPR
},
548 { "r.8", 8, PPC_OPERAND_GPR
},
549 { "r.9", 9, PPC_OPERAND_GPR
},
551 { "r.sp", 1, PPC_OPERAND_GPR
},
553 { "r.toc", 2, PPC_OPERAND_GPR
},
555 { "r0", 0, PPC_OPERAND_GPR
},
556 { "r1", 1, PPC_OPERAND_GPR
},
557 { "r10", 10, PPC_OPERAND_GPR
},
558 { "r11", 11, PPC_OPERAND_GPR
},
559 { "r12", 12, PPC_OPERAND_GPR
},
560 { "r13", 13, PPC_OPERAND_GPR
},
561 { "r14", 14, PPC_OPERAND_GPR
},
562 { "r15", 15, PPC_OPERAND_GPR
},
563 { "r16", 16, PPC_OPERAND_GPR
},
564 { "r17", 17, PPC_OPERAND_GPR
},
565 { "r18", 18, PPC_OPERAND_GPR
},
566 { "r19", 19, PPC_OPERAND_GPR
},
567 { "r2", 2, PPC_OPERAND_GPR
},
568 { "r20", 20, PPC_OPERAND_GPR
},
569 { "r21", 21, PPC_OPERAND_GPR
},
570 { "r22", 22, PPC_OPERAND_GPR
},
571 { "r23", 23, PPC_OPERAND_GPR
},
572 { "r24", 24, PPC_OPERAND_GPR
},
573 { "r25", 25, PPC_OPERAND_GPR
},
574 { "r26", 26, PPC_OPERAND_GPR
},
575 { "r27", 27, PPC_OPERAND_GPR
},
576 { "r28", 28, PPC_OPERAND_GPR
},
577 { "r29", 29, PPC_OPERAND_GPR
},
578 { "r3", 3, PPC_OPERAND_GPR
},
579 { "r30", 30, PPC_OPERAND_GPR
},
580 { "r31", 31, PPC_OPERAND_GPR
},
581 { "r4", 4, PPC_OPERAND_GPR
},
582 { "r5", 5, PPC_OPERAND_GPR
},
583 { "r6", 6, PPC_OPERAND_GPR
},
584 { "r7", 7, PPC_OPERAND_GPR
},
585 { "r8", 8, PPC_OPERAND_GPR
},
586 { "r9", 9, PPC_OPERAND_GPR
},
588 { "rtoc", 2, PPC_OPERAND_GPR
},
590 { "sdr1", 25, PPC_OPERAND_SPR
},
592 { "sp", 1, PPC_OPERAND_GPR
},
594 { "srr0", 26, PPC_OPERAND_SPR
},
595 { "srr1", 27, PPC_OPERAND_SPR
},
597 /* Vector (Altivec/VMX) registers */
598 { "v.0", 0, PPC_OPERAND_VR
},
599 { "v.1", 1, PPC_OPERAND_VR
},
600 { "v.10", 10, PPC_OPERAND_VR
},
601 { "v.11", 11, PPC_OPERAND_VR
},
602 { "v.12", 12, PPC_OPERAND_VR
},
603 { "v.13", 13, PPC_OPERAND_VR
},
604 { "v.14", 14, PPC_OPERAND_VR
},
605 { "v.15", 15, PPC_OPERAND_VR
},
606 { "v.16", 16, PPC_OPERAND_VR
},
607 { "v.17", 17, PPC_OPERAND_VR
},
608 { "v.18", 18, PPC_OPERAND_VR
},
609 { "v.19", 19, PPC_OPERAND_VR
},
610 { "v.2", 2, PPC_OPERAND_VR
},
611 { "v.20", 20, PPC_OPERAND_VR
},
612 { "v.21", 21, PPC_OPERAND_VR
},
613 { "v.22", 22, PPC_OPERAND_VR
},
614 { "v.23", 23, PPC_OPERAND_VR
},
615 { "v.24", 24, PPC_OPERAND_VR
},
616 { "v.25", 25, PPC_OPERAND_VR
},
617 { "v.26", 26, PPC_OPERAND_VR
},
618 { "v.27", 27, PPC_OPERAND_VR
},
619 { "v.28", 28, PPC_OPERAND_VR
},
620 { "v.29", 29, PPC_OPERAND_VR
},
621 { "v.3", 3, PPC_OPERAND_VR
},
622 { "v.30", 30, PPC_OPERAND_VR
},
623 { "v.31", 31, PPC_OPERAND_VR
},
624 { "v.4", 4, PPC_OPERAND_VR
},
625 { "v.5", 5, PPC_OPERAND_VR
},
626 { "v.6", 6, PPC_OPERAND_VR
},
627 { "v.7", 7, PPC_OPERAND_VR
},
628 { "v.8", 8, PPC_OPERAND_VR
},
629 { "v.9", 9, PPC_OPERAND_VR
},
631 { "v0", 0, PPC_OPERAND_VR
},
632 { "v1", 1, PPC_OPERAND_VR
},
633 { "v10", 10, PPC_OPERAND_VR
},
634 { "v11", 11, PPC_OPERAND_VR
},
635 { "v12", 12, PPC_OPERAND_VR
},
636 { "v13", 13, PPC_OPERAND_VR
},
637 { "v14", 14, PPC_OPERAND_VR
},
638 { "v15", 15, PPC_OPERAND_VR
},
639 { "v16", 16, PPC_OPERAND_VR
},
640 { "v17", 17, PPC_OPERAND_VR
},
641 { "v18", 18, PPC_OPERAND_VR
},
642 { "v19", 19, PPC_OPERAND_VR
},
643 { "v2", 2, PPC_OPERAND_VR
},
644 { "v20", 20, PPC_OPERAND_VR
},
645 { "v21", 21, PPC_OPERAND_VR
},
646 { "v22", 22, PPC_OPERAND_VR
},
647 { "v23", 23, PPC_OPERAND_VR
},
648 { "v24", 24, PPC_OPERAND_VR
},
649 { "v25", 25, PPC_OPERAND_VR
},
650 { "v26", 26, PPC_OPERAND_VR
},
651 { "v27", 27, PPC_OPERAND_VR
},
652 { "v28", 28, PPC_OPERAND_VR
},
653 { "v29", 29, PPC_OPERAND_VR
},
654 { "v3", 3, PPC_OPERAND_VR
},
655 { "v30", 30, PPC_OPERAND_VR
},
656 { "v31", 31, PPC_OPERAND_VR
},
657 { "v4", 4, PPC_OPERAND_VR
},
658 { "v5", 5, PPC_OPERAND_VR
},
659 { "v6", 6, PPC_OPERAND_VR
},
660 { "v7", 7, PPC_OPERAND_VR
},
661 { "v8", 8, PPC_OPERAND_VR
},
662 { "v9", 9, PPC_OPERAND_VR
},
664 /* Vector Scalar (VSX) registers (ISA 2.06). */
665 { "vs.0", 0, PPC_OPERAND_VSR
},
666 { "vs.1", 1, PPC_OPERAND_VSR
},
667 { "vs.10", 10, PPC_OPERAND_VSR
},
668 { "vs.11", 11, PPC_OPERAND_VSR
},
669 { "vs.12", 12, PPC_OPERAND_VSR
},
670 { "vs.13", 13, PPC_OPERAND_VSR
},
671 { "vs.14", 14, PPC_OPERAND_VSR
},
672 { "vs.15", 15, PPC_OPERAND_VSR
},
673 { "vs.16", 16, PPC_OPERAND_VSR
},
674 { "vs.17", 17, PPC_OPERAND_VSR
},
675 { "vs.18", 18, PPC_OPERAND_VSR
},
676 { "vs.19", 19, PPC_OPERAND_VSR
},
677 { "vs.2", 2, PPC_OPERAND_VSR
},
678 { "vs.20", 20, PPC_OPERAND_VSR
},
679 { "vs.21", 21, PPC_OPERAND_VSR
},
680 { "vs.22", 22, PPC_OPERAND_VSR
},
681 { "vs.23", 23, PPC_OPERAND_VSR
},
682 { "vs.24", 24, PPC_OPERAND_VSR
},
683 { "vs.25", 25, PPC_OPERAND_VSR
},
684 { "vs.26", 26, PPC_OPERAND_VSR
},
685 { "vs.27", 27, PPC_OPERAND_VSR
},
686 { "vs.28", 28, PPC_OPERAND_VSR
},
687 { "vs.29", 29, PPC_OPERAND_VSR
},
688 { "vs.3", 3, PPC_OPERAND_VSR
},
689 { "vs.30", 30, PPC_OPERAND_VSR
},
690 { "vs.31", 31, PPC_OPERAND_VSR
},
691 { "vs.32", 32, PPC_OPERAND_VSR
},
692 { "vs.33", 33, PPC_OPERAND_VSR
},
693 { "vs.34", 34, PPC_OPERAND_VSR
},
694 { "vs.35", 35, PPC_OPERAND_VSR
},
695 { "vs.36", 36, PPC_OPERAND_VSR
},
696 { "vs.37", 37, PPC_OPERAND_VSR
},
697 { "vs.38", 38, PPC_OPERAND_VSR
},
698 { "vs.39", 39, PPC_OPERAND_VSR
},
699 { "vs.4", 4, PPC_OPERAND_VSR
},
700 { "vs.40", 40, PPC_OPERAND_VSR
},
701 { "vs.41", 41, PPC_OPERAND_VSR
},
702 { "vs.42", 42, PPC_OPERAND_VSR
},
703 { "vs.43", 43, PPC_OPERAND_VSR
},
704 { "vs.44", 44, PPC_OPERAND_VSR
},
705 { "vs.45", 45, PPC_OPERAND_VSR
},
706 { "vs.46", 46, PPC_OPERAND_VSR
},
707 { "vs.47", 47, PPC_OPERAND_VSR
},
708 { "vs.48", 48, PPC_OPERAND_VSR
},
709 { "vs.49", 49, PPC_OPERAND_VSR
},
710 { "vs.5", 5, PPC_OPERAND_VSR
},
711 { "vs.50", 50, PPC_OPERAND_VSR
},
712 { "vs.51", 51, PPC_OPERAND_VSR
},
713 { "vs.52", 52, PPC_OPERAND_VSR
},
714 { "vs.53", 53, PPC_OPERAND_VSR
},
715 { "vs.54", 54, PPC_OPERAND_VSR
},
716 { "vs.55", 55, PPC_OPERAND_VSR
},
717 { "vs.56", 56, PPC_OPERAND_VSR
},
718 { "vs.57", 57, PPC_OPERAND_VSR
},
719 { "vs.58", 58, PPC_OPERAND_VSR
},
720 { "vs.59", 59, PPC_OPERAND_VSR
},
721 { "vs.6", 6, PPC_OPERAND_VSR
},
722 { "vs.60", 60, PPC_OPERAND_VSR
},
723 { "vs.61", 61, PPC_OPERAND_VSR
},
724 { "vs.62", 62, PPC_OPERAND_VSR
},
725 { "vs.63", 63, PPC_OPERAND_VSR
},
726 { "vs.7", 7, PPC_OPERAND_VSR
},
727 { "vs.8", 8, PPC_OPERAND_VSR
},
728 { "vs.9", 9, PPC_OPERAND_VSR
},
730 { "vs0", 0, PPC_OPERAND_VSR
},
731 { "vs1", 1, PPC_OPERAND_VSR
},
732 { "vs10", 10, PPC_OPERAND_VSR
},
733 { "vs11", 11, PPC_OPERAND_VSR
},
734 { "vs12", 12, PPC_OPERAND_VSR
},
735 { "vs13", 13, PPC_OPERAND_VSR
},
736 { "vs14", 14, PPC_OPERAND_VSR
},
737 { "vs15", 15, PPC_OPERAND_VSR
},
738 { "vs16", 16, PPC_OPERAND_VSR
},
739 { "vs17", 17, PPC_OPERAND_VSR
},
740 { "vs18", 18, PPC_OPERAND_VSR
},
741 { "vs19", 19, PPC_OPERAND_VSR
},
742 { "vs2", 2, PPC_OPERAND_VSR
},
743 { "vs20", 20, PPC_OPERAND_VSR
},
744 { "vs21", 21, PPC_OPERAND_VSR
},
745 { "vs22", 22, PPC_OPERAND_VSR
},
746 { "vs23", 23, PPC_OPERAND_VSR
},
747 { "vs24", 24, PPC_OPERAND_VSR
},
748 { "vs25", 25, PPC_OPERAND_VSR
},
749 { "vs26", 26, PPC_OPERAND_VSR
},
750 { "vs27", 27, PPC_OPERAND_VSR
},
751 { "vs28", 28, PPC_OPERAND_VSR
},
752 { "vs29", 29, PPC_OPERAND_VSR
},
753 { "vs3", 3, PPC_OPERAND_VSR
},
754 { "vs30", 30, PPC_OPERAND_VSR
},
755 { "vs31", 31, PPC_OPERAND_VSR
},
756 { "vs32", 32, PPC_OPERAND_VSR
},
757 { "vs33", 33, PPC_OPERAND_VSR
},
758 { "vs34", 34, PPC_OPERAND_VSR
},
759 { "vs35", 35, PPC_OPERAND_VSR
},
760 { "vs36", 36, PPC_OPERAND_VSR
},
761 { "vs37", 37, PPC_OPERAND_VSR
},
762 { "vs38", 38, PPC_OPERAND_VSR
},
763 { "vs39", 39, PPC_OPERAND_VSR
},
764 { "vs4", 4, PPC_OPERAND_VSR
},
765 { "vs40", 40, PPC_OPERAND_VSR
},
766 { "vs41", 41, PPC_OPERAND_VSR
},
767 { "vs42", 42, PPC_OPERAND_VSR
},
768 { "vs43", 43, PPC_OPERAND_VSR
},
769 { "vs44", 44, PPC_OPERAND_VSR
},
770 { "vs45", 45, PPC_OPERAND_VSR
},
771 { "vs46", 46, PPC_OPERAND_VSR
},
772 { "vs47", 47, PPC_OPERAND_VSR
},
773 { "vs48", 48, PPC_OPERAND_VSR
},
774 { "vs49", 49, PPC_OPERAND_VSR
},
775 { "vs5", 5, PPC_OPERAND_VSR
},
776 { "vs50", 50, PPC_OPERAND_VSR
},
777 { "vs51", 51, PPC_OPERAND_VSR
},
778 { "vs52", 52, PPC_OPERAND_VSR
},
779 { "vs53", 53, PPC_OPERAND_VSR
},
780 { "vs54", 54, PPC_OPERAND_VSR
},
781 { "vs55", 55, PPC_OPERAND_VSR
},
782 { "vs56", 56, PPC_OPERAND_VSR
},
783 { "vs57", 57, PPC_OPERAND_VSR
},
784 { "vs58", 58, PPC_OPERAND_VSR
},
785 { "vs59", 59, PPC_OPERAND_VSR
},
786 { "vs6", 6, PPC_OPERAND_VSR
},
787 { "vs60", 60, PPC_OPERAND_VSR
},
788 { "vs61", 61, PPC_OPERAND_VSR
},
789 { "vs62", 62, PPC_OPERAND_VSR
},
790 { "vs63", 63, PPC_OPERAND_VSR
},
791 { "vs7", 7, PPC_OPERAND_VSR
},
792 { "vs8", 8, PPC_OPERAND_VSR
},
793 { "vs9", 9, PPC_OPERAND_VSR
},
795 { "xer", 1, PPC_OPERAND_SPR
}
798 /* Given NAME, find the register number associated with that name, return
799 the integer value associated with the given name or -1 on failure. */
801 static const struct pd_reg
*
802 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
804 int middle
, low
, high
;
812 middle
= (low
+ high
) / 2;
813 cmp
= strcasecmp (name
, regs
[middle
].name
);
819 return ®s
[middle
];
826 /* Called for a non-symbol, non-number operand. Handles %reg. */
829 md_operand (expressionS
*expressionP
)
831 const struct pd_reg
*reg
;
836 if (input_line_pointer
[0] != '%' || !ISALPHA (input_line_pointer
[1]))
839 start
= input_line_pointer
;
840 ++input_line_pointer
;
842 c
= get_symbol_name (&name
);
843 reg
= reg_name_search (pre_defined_registers
,
844 ARRAY_SIZE (pre_defined_registers
), name
);
845 *input_line_pointer
= c
;
849 expressionP
->X_op
= O_register
;
850 expressionP
->X_add_number
= reg
->value
;
851 expressionP
->X_md
= reg
->flags
;
854 input_line_pointer
= start
;
857 /* Whether to do the special parsing. */
858 static bool cr_operand
;
860 /* Extra names to recognise in a condition code. This table is sorted. */
861 static const struct pd_reg cr_cond
[] =
863 { "eq", 2, PPC_OPERAND_CR_BIT
},
864 { "gt", 1, PPC_OPERAND_CR_BIT
},
865 { "lt", 0, PPC_OPERAND_CR_BIT
},
866 { "so", 3, PPC_OPERAND_CR_BIT
},
867 { "un", 3, PPC_OPERAND_CR_BIT
}
870 /* This function is called for each symbol seen in an expression. It
871 handles the special parsing which PowerPC assemblers are supposed
872 to use for condition codes, and recognises other registers when
876 ppc_parse_name (const char *name
, expressionS
*exp
, enum expr_mode mode
)
878 const struct pd_reg
*reg
= NULL
;
881 reg
= reg_name_search (cr_cond
, ARRAY_SIZE (cr_cond
), name
);
882 if (reg
== NULL
&& (cr_operand
|| reg_names_p
))
883 reg
= reg_name_search (pre_defined_registers
,
884 ARRAY_SIZE (pre_defined_registers
), name
);
887 exp
->X_op
= O_register
;
888 exp
->X_add_number
= reg
->value
;
889 exp
->X_md
= reg
->flags
;
893 /* The following replaces code in expr.c operand() after the
894 md_parse_name call. There is too much difference between targets
895 in the way X_md is used to move this code into expr.c. If you
896 do, you'll get failures on x86 due to uninitialised X_md fields,
897 failures on alpha and other targets due to creating register
898 symbols as O_constant rather than O_register, and failures on arc
899 and others due to expecting expr() to leave X_md alone. */
900 symbolS
*sym
= symbol_find_or_make (name
);
902 /* If we have an absolute symbol or a reg, then we know its value
903 now. Copy the symbol value expression to propagate X_md. */
905 if (mode
!= expr_defer
906 && !S_FORCE_RELOC (sym
, 0))
908 segT segment
= S_GET_SEGMENT (sym
);
909 if (segment
== absolute_section
|| segment
== reg_section
)
911 resolve_symbol_value (sym
);
912 *exp
= *symbol_get_value_expression (sym
);
918 exp
->X_op
= O_symbol
;
919 exp
->X_add_symbol
= sym
;
920 exp
->X_add_number
= 0;
924 /* Propagate X_md and check register expressions. This is to support
925 condition codes like 4*cr5+eq. */
928 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
930 /* Accept 4*cr<n> and cr<n>*4. */
932 && ((right
->X_op
== O_register
933 && right
->X_md
== PPC_OPERAND_CR_REG
934 && left
->X_op
== O_constant
935 && left
->X_add_number
== 4)
936 || (left
->X_op
== O_register
937 && left
->X_md
== PPC_OPERAND_CR_REG
938 && right
->X_op
== O_constant
939 && right
->X_add_number
== 4)))
941 left
->X_op
= O_register
;
942 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
943 left
->X_add_number
*= right
->X_add_number
;
947 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
948 if (right
->X_op
== O_register
949 && left
->X_op
== O_register
951 && ((right
->X_md
== PPC_OPERAND_CR_BIT
952 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
953 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
954 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
956 left
->X_md
= PPC_OPERAND_CR_BIT
;
957 right
->X_op
= O_constant
;
961 /* Accept reg +/- constant. */
962 if (left
->X_op
== O_register
963 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
964 as_warn (_("invalid register expression"));
966 /* Accept constant + reg. */
967 if (right
->X_op
== O_register
)
969 if (op
== O_add
&& left
->X_op
== O_constant
)
970 left
->X_md
= right
->X_md
;
972 as_warn (_("invalid register expression"));
978 /* Local variables. */
980 /* Whether to target xcoff64/elf64. */
981 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
983 /* A separate obstack for use by ppc_hash, so that we can quickly
984 throw away hash table memory . */
985 struct obstack insn_obstack
;
987 /* Opcode hash table. */
988 static htab_t ppc_hash
;
991 /* What type of shared library support to use. */
992 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
994 /* Flags to set in the elf header. */
995 static flagword ppc_flags
= 0;
997 /* Whether this is Solaris or not. */
998 #ifdef TARGET_SOLARIS_COMMENT
999 #define SOLARIS_P true
1001 #define SOLARIS_P false
1004 static bool msolaris
= SOLARIS_P
;
1009 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1010 using a bunch of different sections. These assembler sections,
1011 however, are all encompassed within the .text, .data or .bss sections
1012 of the final output file. We handle this by using different
1013 subsegments within these main segments.
1014 .tdata and .tbss sections only have one type of csects for now,
1015 but it's better to follow the same construction like the others. */
1017 struct ppc_xcoff_section ppc_xcoff_text_section
;
1018 struct ppc_xcoff_section ppc_xcoff_data_section
;
1019 struct ppc_xcoff_section ppc_xcoff_bss_section
;
1020 struct ppc_xcoff_section ppc_xcoff_tdata_section
;
1021 struct ppc_xcoff_section ppc_xcoff_tbss_section
;
1023 /* Return true if the ppc_xcoff_section structure is already
1026 ppc_xcoff_section_is_initialized (struct ppc_xcoff_section
*section
)
1028 return section
->segment
!= NULL
;
1031 /* Initialize a ppc_xcoff_section.
1032 Dummy symbols are used to ensure the position of .text over .data
1033 and .tdata. Moreover, they allow all algorithms here to be sure that
1034 csects isn't NULL. These symbols won't be output. */
1036 ppc_init_xcoff_section (struct ppc_xcoff_section
*s
, segT seg
)
1039 s
->next_subsegment
= 2;
1040 s
->csects
= symbol_make ("dummy\001");
1041 symbol_get_tc (s
->csects
)->within
= s
->csects
;
1044 /* The current csect. */
1045 static symbolS
*ppc_current_csect
;
1047 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1048 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1049 A special relocation is used when accessing TOC entries. We handle
1050 the TOC as a subsegment within the .data segment. We set it up if
1051 we see a .toc pseudo-op, and save the csect symbol here. */
1052 static symbolS
*ppc_toc_csect
;
1054 /* The first frag in the TOC subsegment. */
1055 static fragS
*ppc_toc_frag
;
1057 /* The first frag in the first subsegment after the TOC in the .data
1058 segment. NULL if there are no subsegments after the TOC. */
1059 static fragS
*ppc_after_toc_frag
;
1061 /* The current static block. */
1062 static symbolS
*ppc_current_block
;
1064 /* The COFF debugging section; set by md_begin. This is not the
1065 .debug section, but is instead the secret BFD section which will
1066 cause BFD to set the section number of a symbol to N_DEBUG. */
1067 static asection
*ppc_coff_debug_section
;
1069 /* Structure to set the length field of the dwarf sections. */
1070 struct dw_subsection
{
1071 /* Subsections are simply linked. */
1072 struct dw_subsection
*link
;
1074 /* The subsection number. */
1077 /* Expression to compute the length of the section. */
1078 expressionS end_exp
;
1081 static struct dw_section
{
1082 /* Corresponding section. */
1085 /* Simply linked list of subsections with a label. */
1086 struct dw_subsection
*list_subseg
;
1088 /* The anonymous subsection. */
1089 struct dw_subsection
*anon_subseg
;
1090 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1091 #endif /* OBJ_XCOFF */
1094 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1095 unsigned long *ppc_apuinfo_list
;
1096 unsigned int ppc_apuinfo_num
;
1097 unsigned int ppc_apuinfo_num_alloc
;
1098 #endif /* OBJ_ELF */
1101 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1103 const char *const md_shortopts
= "um:";
1105 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1106 const struct option md_longopts
[] = {
1107 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1108 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1109 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1110 {NULL
, no_argument
, NULL
, 0}
1112 const size_t md_longopts_size
= sizeof (md_longopts
);
1115 md_parse_option (int c
, const char *arg
)
1122 /* -u means that any undefined symbols should be treated as
1123 external, which is the default for gas anyhow. */
1128 /* Solaris as takes -le (presumably for little endian). For completeness
1129 sake, recognize -be also. */
1130 if (strcmp (arg
, "e") == 0)
1132 target_big_endian
= 0;
1133 set_target_endian
= 1;
1134 if (ppc_cpu
& PPC_OPCODE_VLE
)
1135 as_bad (_("the use of -mvle requires big endian."));
1143 if (strcmp (arg
, "e") == 0)
1145 target_big_endian
= 1;
1146 set_target_endian
= 1;
1154 /* Recognize -K PIC. */
1155 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1158 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1166 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1168 if (strcmp (arg
, "64") == 0)
1172 if (ppc_cpu
& PPC_OPCODE_VLE
)
1173 as_bad (_("the use of -mvle requires -a32."));
1175 as_fatal (_("%s unsupported"), "-a64");
1178 else if (strcmp (arg
, "32") == 0)
1185 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1186 /* "raw" is only valid for the disassembler. */
1187 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1190 if (strcmp (arg
, "vle") == 0)
1192 if (set_target_endian
&& target_big_endian
== 0)
1193 as_bad (_("the use of -mvle requires big endian."));
1195 as_bad (_("the use of -mvle requires -a32."));
1199 else if (strcmp (arg
, "no-vle") == 0)
1201 sticky
&= ~PPC_OPCODE_VLE
;
1203 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1204 new_cpu
&= ~PPC_OPCODE_VLE
;
1209 else if (strcmp (arg
, "regnames") == 0)
1212 else if (strcmp (arg
, "no-regnames") == 0)
1213 reg_names_p
= false;
1216 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1217 that require relocation. */
1218 else if (strcmp (arg
, "relocatable") == 0)
1220 shlib
= SHLIB_MRELOCATABLE
;
1221 ppc_flags
|= EF_PPC_RELOCATABLE
;
1224 else if (strcmp (arg
, "relocatable-lib") == 0)
1226 shlib
= SHLIB_MRELOCATABLE
;
1227 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1230 /* -memb, set embedded bit. */
1231 else if (strcmp (arg
, "emb") == 0)
1232 ppc_flags
|= EF_PPC_EMB
;
1234 /* -mlittle/-mbig set the endianness. */
1235 else if (strcmp (arg
, "little") == 0
1236 || strcmp (arg
, "little-endian") == 0)
1238 target_big_endian
= 0;
1239 set_target_endian
= 1;
1240 if (ppc_cpu
& PPC_OPCODE_VLE
)
1241 as_bad (_("the use of -mvle requires big endian."));
1244 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1246 target_big_endian
= 1;
1247 set_target_endian
= 1;
1250 else if (strcmp (arg
, "solaris") == 0)
1253 ppc_comment_chars
= ppc_solaris_comment_chars
;
1256 else if (strcmp (arg
, "no-solaris") == 0)
1259 ppc_comment_chars
= ppc_eabi_comment_chars
;
1261 else if (strcmp (arg
, "spe2") == 0)
1263 ppc_cpu
|= PPC_OPCODE_SPE2
;
1268 as_bad (_("invalid switch -m%s"), arg
);
1274 /* -V: SVR4 argument to print version ID. */
1276 print_version_id ();
1279 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1280 should be emitted or not. FIXME: Not implemented. */
1284 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1285 rather than .stabs.excl, which is ignored by the linker.
1286 FIXME: Not implemented. */
1297 nop_limit
= strtoul (optarg
, &end
, 0);
1299 as_bad (_("--nops needs a numeric argument"));
1314 is_ppc64_target (const bfd_target
*targ
, void *data ATTRIBUTE_UNUSED
)
1316 switch (targ
->flavour
)
1319 case bfd_target_elf_flavour
:
1320 return startswith (targ
->name
, "elf64-powerpc");
1323 case bfd_target_xcoff_flavour
:
1324 return (strcmp (targ
->name
, "aixcoff64-rs6000") == 0
1325 || strcmp (targ
->name
, "aix5coff64-rs6000") == 0);
1333 md_show_usage (FILE *stream
)
1335 fprintf (stream
, _("\
1336 PowerPC options:\n"));
1337 fprintf (stream
, _("\
1338 -a32 generate ELF32/XCOFF32\n"));
1339 if (bfd_iterate_over_targets (is_ppc64_target
, NULL
))
1340 fprintf (stream
, _("\
1341 -a64 generate ELF64/XCOFF64\n"));
1342 fprintf (stream
, _("\
1344 fprintf (stream
, _("\
1345 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n"));
1346 fprintf (stream
, _("\
1347 -mpwr generate code for POWER (RIOS1)\n"));
1348 fprintf (stream
, _("\
1349 -m601 generate code for PowerPC 601\n"));
1350 fprintf (stream
, _("\
1351 -mppc, -mppc32, -m603, -m604\n\
1352 generate code for PowerPC 603/604\n"));
1353 fprintf (stream
, _("\
1354 -m403 generate code for PowerPC 403\n"));
1355 fprintf (stream
, _("\
1356 -m405 generate code for PowerPC 405\n"));
1357 fprintf (stream
, _("\
1358 -m440 generate code for PowerPC 440\n"));
1359 fprintf (stream
, _("\
1360 -m464 generate code for PowerPC 464\n"));
1361 fprintf (stream
, _("\
1362 -m476 generate code for PowerPC 476\n"));
1363 fprintf (stream
, _("\
1364 -m7400, -m7410, -m7450, -m7455\n\
1365 generate code for PowerPC 7400/7410/7450/7455\n"));
1366 fprintf (stream
, _("\
1367 -m750cl, -mgekko, -mbroadway\n\
1368 generate code for PowerPC 750cl/Gekko/Broadway\n"));
1369 fprintf (stream
, _("\
1370 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1371 fprintf (stream
, _("\
1372 -mppc64, -m620 generate code for PowerPC 620/625/630\n"));
1373 fprintf (stream
, _("\
1374 -mppc64bridge generate code for PowerPC 64, including bridge insns\n"));
1375 fprintf (stream
, _("\
1376 -mbooke generate code for 32-bit PowerPC BookE\n"));
1377 fprintf (stream
, _("\
1378 -ma2 generate code for A2 architecture\n"));
1379 fprintf (stream
, _("\
1380 -mpower4, -mpwr4 generate code for Power4 architecture\n"));
1381 fprintf (stream
, _("\
1382 -mpower5, -mpwr5, -mpwr5x\n\
1383 generate code for Power5 architecture\n"));
1384 fprintf (stream
, _("\
1385 -mpower6, -mpwr6 generate code for Power6 architecture\n"));
1386 fprintf (stream
, _("\
1387 -mpower7, -mpwr7 generate code for Power7 architecture\n"));
1388 fprintf (stream
, _("\
1389 -mpower8, -mpwr8 generate code for Power8 architecture\n"));
1390 fprintf (stream
, _("\
1391 -mpower9, -mpwr9 generate code for Power9 architecture\n"));
1392 fprintf (stream
, _("\
1393 -mpower10, -mpwr10 generate code for Power10 architecture\n"));
1394 fprintf (stream
, _("\
1395 -mlibresoc generate code for Libre-SOC architecture\n"));
1396 fprintf (stream
, _("\
1397 -mfuture generate code for 'future' architecture\n"));
1398 fprintf (stream
, _("\
1399 -mcell generate code for Cell Broadband Engine architecture\n"));
1400 fprintf (stream
, _("\
1401 -mcom generate code for Power/PowerPC common instructions\n"));
1402 fprintf (stream
, _("\
1403 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1404 fprintf (stream
, _("\
1405 -maltivec generate code for AltiVec\n"));
1406 fprintf (stream
, _("\
1407 -mvsx generate code for Vector-Scalar (VSX) instructions\n"));
1408 fprintf (stream
, _("\
1409 -me300 generate code for PowerPC e300 family\n"));
1410 fprintf (stream
, _("\
1411 -me500, -me500x2 generate code for Motorola e500 core complex\n"));
1412 fprintf (stream
, _("\
1413 -me500mc, generate code for Freescale e500mc core complex\n"));
1414 fprintf (stream
, _("\
1415 -me500mc64, generate code for Freescale e500mc64 core complex\n"));
1416 fprintf (stream
, _("\
1417 -me5500, generate code for Freescale e5500 core complex\n"));
1418 fprintf (stream
, _("\
1419 -me6500, generate code for Freescale e6500 core complex\n"));
1420 fprintf (stream
, _("\
1421 -mspe generate code for Motorola SPE instructions\n"));
1422 fprintf (stream
, _("\
1423 -mspe2 generate code for Freescale SPE2 instructions\n"));
1424 fprintf (stream
, _("\
1425 -mvle generate code for Freescale VLE instructions\n"));
1426 fprintf (stream
, _("\
1427 -mtitan generate code for AppliedMicro Titan core complex\n"));
1428 fprintf (stream
, _("\
1429 -mregnames Allow symbolic names for registers\n"));
1430 fprintf (stream
, _("\
1431 -mno-regnames Do not allow symbolic names for registers\n"));
1433 fprintf (stream
, _("\
1434 -mrelocatable support for GCC's -mrelocatble option\n"));
1435 fprintf (stream
, _("\
1436 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n"));
1437 fprintf (stream
, _("\
1438 -memb set PPC_EMB bit in ELF flags\n"));
1439 fprintf (stream
, _("\
1440 -mlittle, -mlittle-endian, -le\n\
1441 generate code for a little endian machine\n"));
1442 fprintf (stream
, _("\
1443 -mbig, -mbig-endian, -be\n\
1444 generate code for a big endian machine\n"));
1445 fprintf (stream
, _("\
1446 -msolaris generate code for Solaris\n"));
1447 fprintf (stream
, _("\
1448 -mno-solaris do not generate code for Solaris\n"));
1449 fprintf (stream
, _("\
1450 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n"));
1451 fprintf (stream
, _("\
1452 -V print assembler version number\n"));
1453 fprintf (stream
, _("\
1454 -Qy, -Qn ignored\n"));
1456 fprintf (stream
, _("\
1457 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1458 fprintf (stream
, _("\
1459 -ppc476-workaround warn if emitting data to code sections\n"));
1462 /* Set ppc_cpu if it is not already set. */
1467 const char *default_os
= TARGET_OS
;
1468 const char *default_cpu
= TARGET_CPU
;
1470 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1473 if (target_big_endian
)
1474 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1476 /* The minimum supported cpu for 64-bit little-endian is power8. */
1477 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1478 else if (startswith (default_os
, "aix")
1479 && default_os
[3] >= '4' && default_os
[3] <= '9')
1480 ppc_cpu
|= PPC_OPCODE_COMMON
;
1481 else if (startswith (default_os
, "aix3"))
1482 ppc_cpu
|= PPC_OPCODE_POWER
;
1483 else if (strcmp (default_cpu
, "rs6000") == 0)
1484 ppc_cpu
|= PPC_OPCODE_POWER
;
1485 else if (startswith (default_cpu
, "powerpc"))
1486 ppc_cpu
|= PPC_OPCODE_PPC
;
1488 as_fatal (_("unknown default cpu = %s, os = %s"),
1489 default_cpu
, default_os
);
1493 /* Figure out the BFD architecture to use. This function and ppc_mach
1494 are called well before md_begin, when the output file is opened. */
1496 enum bfd_architecture
1499 const char *default_cpu
= TARGET_CPU
;
1502 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1503 return bfd_arch_powerpc
;
1504 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1505 return bfd_arch_powerpc
;
1506 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1507 return bfd_arch_rs6000
;
1508 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1510 if (strcmp (default_cpu
, "rs6000") == 0)
1511 return bfd_arch_rs6000
;
1512 else if (startswith (default_cpu
, "powerpc"))
1513 return bfd_arch_powerpc
;
1516 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1517 return bfd_arch_unknown
;
1524 return bfd_mach_ppc64
;
1525 else if (ppc_arch () == bfd_arch_rs6000
)
1526 return bfd_mach_rs6k
;
1527 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1528 return bfd_mach_ppc_titan
;
1529 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1530 return bfd_mach_ppc_vle
;
1532 return bfd_mach_ppc
;
1536 ppc_target_format (void)
1540 return "xcoff-powermac";
1543 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1545 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1551 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1552 # elif defined (TE_VXWORKS)
1553 return "elf32-powerpc-vxworks";
1555 return (target_big_endian
1556 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1557 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1562 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1563 Return TRUE if there's a problem, otherwise FALSE. */
1566 insn_validate (const struct powerpc_opcode
*op
)
1568 const ppc_opindex_t
*o
;
1569 uint64_t omask
= op
->mask
;
1571 /* The mask had better not trim off opcode bits. */
1572 if ((op
->opcode
& omask
) != op
->opcode
)
1574 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1578 /* The operands must not overlap the opcode or each other. */
1579 for (o
= op
->operands
; *o
; ++o
)
1581 bool optional
= false;
1582 if (*o
>= num_powerpc_operands
)
1584 as_bad (_("operand index error for %s"), op
->name
);
1590 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1591 if (operand
->shift
== (int) PPC_OPSHIFT_INV
)
1598 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1600 mask
= (*operand
->insert
) (0, val
, ppc_cpu
, &errmsg
);
1602 else if (operand
->shift
== (int) PPC_OPSHIFT_SH6
)
1603 mask
= (0x1f << 11) | 0x2;
1604 else if (operand
->shift
>= 0)
1605 mask
= operand
->bitm
<< operand
->shift
;
1607 mask
= operand
->bitm
>> -operand
->shift
;
1610 as_bad (_("operand %d overlap in %s"),
1611 (int) (o
- op
->operands
), op
->name
);
1615 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
1619 as_bad (_("non-optional operand %d follows optional operand in %s"),
1620 (int) (o
- op
->operands
), op
->name
);
1629 insn_calloc (size_t n
, size_t size
)
1631 size_t amt
= n
* size
;
1632 void *ret
= obstack_alloc (&insn_obstack
, amt
);
1633 memset (ret
, 0, amt
);
1637 /* Insert opcodes into hash tables. Called at startup and for
1641 ppc_setup_opcodes (void)
1643 const struct powerpc_opcode
*op
;
1644 const struct powerpc_opcode
*op_end
;
1645 bool bad_insn
= false;
1647 if (ppc_hash
!= NULL
)
1649 htab_delete (ppc_hash
);
1650 _obstack_free (&insn_obstack
, NULL
);
1653 obstack_begin (&insn_obstack
, chunksize
);
1655 /* Insert the opcodes into a hash table. */
1656 ppc_hash
= htab_create_alloc (5000, hash_string_tuple
, eq_string_tuple
,
1657 NULL
, insn_calloc
, NULL
);
1659 if (ENABLE_CHECKING
)
1663 /* An index into powerpc_operands is stored in struct fix
1664 fx_pcrel_adjust which is a 16 bit field. */
1665 gas_assert (num_powerpc_operands
<= PPC_OPINDEX_MAX
+ 1);
1667 /* Check operand masks. Code here and in the disassembler assumes
1668 all the 1's in the mask are contiguous. */
1669 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1671 uint64_t mask
= powerpc_operands
[i
].bitm
;
1672 unsigned long flags
= powerpc_operands
[i
].flags
;
1676 if ((flags
& PPC_OPERAND_PLUS1
) != 0
1677 && (flags
& PPC_OPERAND_NONZERO
) != 0)
1678 as_bad ("mutually exclusive operand flags");
1680 right_bit
= mask
& -mask
;
1682 right_bit
= mask
& -mask
;
1683 if (mask
!= right_bit
)
1685 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1688 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1689 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1690 sizeof (powerpc_operands
[0])) == 0)
1692 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1699 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1700 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1702 if (ENABLE_CHECKING
)
1704 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1706 #ifdef PRINT_OPCODE_TABLE
1707 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx"
1708 "\tmask: 0x%llx\tflags: 0x%llx\n",
1709 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1710 new_opcode
, (unsigned long long) op
->opcode
,
1711 (unsigned long long) op
->mask
,
1712 (unsigned long long) op
->flags
);
1715 /* The major opcodes had better be sorted. Code in the disassembler
1716 assumes the insns are sorted according to major opcode. */
1717 if (op
!= powerpc_opcodes
1718 && new_opcode
< PPC_OP (op
[-1].opcode
))
1720 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1724 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1726 as_bad (_("%s is enabled by vle flag"), op
->name
);
1729 if (PPC_OP (op
->opcode
) != 4
1730 && PPC_OP (op
->opcode
) != 31
1731 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1733 as_bad (_("%s not disabled by vle flag"), op
->name
);
1736 bad_insn
|= insn_validate (op
);
1739 if ((ppc_cpu
& op
->flags
) != 0
1740 && !(ppc_cpu
& op
->deprecated
)
1741 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1743 as_bad (_("duplicate %s"), op
->name
);
1748 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1749 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1750 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1752 op_end
= prefix_opcodes
+ prefix_num_opcodes
;
1753 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1755 if (ENABLE_CHECKING
)
1757 unsigned int new_opcode
= PPC_PREFIX_SEG (op
[0].opcode
);
1759 #ifdef PRINT_OPCODE_TABLE
1760 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx"
1761 "\tmask: 0x%llx\tflags: 0x%llx\n",
1762 op
->name
, (unsigned int) (op
- prefix_opcodes
),
1763 new_opcode
, (unsigned long long) op
->opcode
,
1764 (unsigned long long) op
->mask
,
1765 (unsigned long long) op
->flags
);
1768 /* The major opcodes had better be sorted. Code in the disassembler
1769 assumes the insns are sorted according to major opcode. */
1770 if (op
!= prefix_opcodes
1771 && new_opcode
< PPC_PREFIX_SEG (op
[-1].opcode
))
1773 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1776 bad_insn
|= insn_validate (op
);
1779 if ((ppc_cpu
& op
->flags
) != 0
1780 && !(ppc_cpu
& op
->deprecated
)
1781 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1783 as_bad (_("duplicate %s"), op
->name
);
1788 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1789 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1790 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1792 if ((ppc_cpu
& (PPC_OPCODE_VLE
| PPC_OPCODE_ANY
)) != 0)
1794 unsigned int prev_seg
= 0;
1797 op_end
= vle_opcodes
+ vle_num_opcodes
;
1798 for (op
= vle_opcodes
; op
< op_end
; op
++)
1800 if (ENABLE_CHECKING
)
1802 seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1804 #ifdef PRINT_OPCODE_TABLE
1805 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx"
1806 "\tmask: 0x%llx\tflags: 0x%llx\n",
1807 op
->name
, (unsigned int) (op
- vle_opcodes
),
1808 (unsigned int) seg
, (unsigned long long) op
->opcode
,
1809 (unsigned long long) op
->mask
,
1810 (unsigned long long) op
->flags
);
1815 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1819 bad_insn
|= insn_validate (op
);
1822 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1826 /* LSP instructions */
1827 if ((ppc_cpu
& (PPC_OPCODE_LSP
| PPC_OPCODE_ANY
)) != 0)
1829 unsigned int prev_seg
= 0;
1831 op_end
= lsp_opcodes
+ lsp_num_opcodes
;
1832 for (op
= lsp_opcodes
; op
< op_end
; op
++)
1834 if (ENABLE_CHECKING
)
1836 seg
= LSP_OP_TO_SEG (op
->opcode
);
1839 as_bad (_("opcode is not sorted for %s"), op
->name
);
1843 bad_insn
|= insn_validate (op
);
1846 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1850 /* SPE2 instructions */
1851 if ((ppc_cpu
& (PPC_OPCODE_SPE2
| PPC_OPCODE_ANY
)) != 0)
1853 unsigned int prev_seg
= 0;
1855 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1856 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1858 if (ENABLE_CHECKING
)
1860 seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1863 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1867 bad_insn
|= insn_validate (op
);
1870 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1878 /* This function is called when the assembler starts up. It is called
1879 after the options have been parsed and the output file has been
1887 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1888 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1891 /* Set the ELF flags if desired. */
1892 if (ppc_flags
&& !msolaris
)
1893 bfd_set_private_flags (stdoutput
, ppc_flags
);
1896 ppc_setup_opcodes ();
1898 /* Tell the main code what the endianness is if it is not overridden
1900 if (!set_target_endian
)
1902 set_target_endian
= 1;
1903 target_big_endian
= PPC_BIG_ENDIAN
;
1907 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1909 /* Create XCOFF sections with .text in first, as it's creating dummy symbols
1910 to serve as initial csects. This forces the text csects to precede the
1911 data csects. These symbols will not be output. */
1912 ppc_init_xcoff_section (&ppc_xcoff_text_section
, text_section
);
1913 ppc_init_xcoff_section (&ppc_xcoff_data_section
, data_section
);
1914 ppc_init_xcoff_section (&ppc_xcoff_bss_section
, bss_section
);
1923 htab_delete (ppc_hash
);
1924 _obstack_free (&insn_obstack
, NULL
);
1933 if (ppc_apuinfo_list
== NULL
)
1936 /* Ok, so write the section info out. We have this layout:
1940 0 8 length of "APUinfo\0"
1941 4 (n*4) number of APU's (4 bytes each)
1944 20 APU#1 first APU's info
1945 24 APU#2 second APU's info
1950 asection
*seg
= now_seg
;
1951 subsegT subseg
= now_subseg
;
1952 asection
*apuinfo_secp
= (asection
*) NULL
;
1955 /* Create the .PPC.EMB.apuinfo section. */
1956 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1957 bfd_set_section_flags (apuinfo_secp
, SEC_HAS_CONTENTS
| SEC_READONLY
);
1960 md_number_to_chars (p
, (valueT
) 8, 4);
1963 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1966 md_number_to_chars (p
, (valueT
) 2, 4);
1969 strcpy (p
, APUINFO_LABEL
);
1971 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1974 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1977 frag_align (2, 0, 0);
1979 /* We probably can't restore the current segment, for there likely
1982 subseg_set (seg
, subseg
);
1987 /* Insert an operand value into an instruction. */
1990 ppc_insert_operand (uint64_t insn
,
1991 const struct powerpc_operand
*operand
,
1997 int64_t min
, max
, right
;
1999 max
= operand
->bitm
;
2003 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
2005 /* Extend the allowed range for addis to [-32768, 65535].
2006 Similarly for cmpli and some VLE high part insns. For 64-bit
2007 it would be good to disable this for signed fields since the
2008 value is sign extended into the high 32 bits of the register.
2009 If the value is, say, an address, then we might care about
2010 the high bits. However, gcc as of 2014-06 uses unsigned
2011 values when loading the high part of 64-bit constants using
2013 min
= ~(max
>> 1) & -right
;
2015 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
2017 max
= (max
>> 1) & -right
;
2018 min
= ~max
& -right
;
2020 else if ((operand
->flags
& PPC_OPERAND_NONZERO
) != 0)
2026 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
2029 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
2038 /* Some people write constants with the sign extension done by
2039 hand but only up to 32 bits. This shouldn't really be valid,
2040 but, to permit this code to assemble on a 64-bit host, we
2041 sign extend the 32-bit value to 64 bits if so doing makes the
2042 value valid. We only do this for operands that are 32-bits or
2045 && (operand
->bitm
& ~0xffffffffULL
) == 0
2046 && (val
- (1LL << 32)) >= min
2047 && (val
- (1LL << 32)) <= max
2048 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
2049 val
= val
- (1LL << 32);
2051 /* Similarly, people write expressions like ~(1<<15), and expect
2052 this to be OK for a 32-bit unsigned value. */
2054 && (operand
->bitm
& ~0xffffffffULL
) == 0
2055 && (val
+ (1LL << 32)) >= min
2056 && (val
+ (1LL << 32)) <= max
2057 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
2058 val
= val
+ (1LL << 32);
2062 || (val
& (right
- 1)) != 0)
2063 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
2066 if (operand
->insert
)
2071 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
2072 if (errmsg
!= (const char *) NULL
)
2073 as_bad_where (file
, line
, "%s", errmsg
);
2077 if ((operand
->flags
& PPC_OPERAND_NONZERO
) != 0)
2079 if (operand
->shift
>= 0)
2080 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2082 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2090 /* Parse @got, etc. and return the desired relocation. */
2091 static bfd_reloc_code_real_type
2092 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
2096 unsigned int length
: 8;
2097 unsigned int valid32
: 1;
2098 unsigned int valid64
: 1;
2107 const struct map_bfd
*ptr
;
2109 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2110 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2111 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2113 static const struct map_bfd mapping
[] = {
2114 MAP ("l", BFD_RELOC_LO16
),
2115 MAP ("h", BFD_RELOC_HI16
),
2116 MAP ("ha", BFD_RELOC_HI16_S
),
2117 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2118 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2119 MAP ("got", BFD_RELOC_16_GOTOFF
),
2120 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2121 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2122 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2123 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2124 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2125 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2126 MAP ("copy", BFD_RELOC_PPC_COPY
),
2127 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2128 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2129 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2130 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2131 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2132 MAP ("tls", BFD_RELOC_PPC_TLS
),
2133 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2134 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2135 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2136 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2137 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2138 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2139 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2140 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2141 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2142 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2143 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2144 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2145 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2146 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2147 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2148 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2149 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2150 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2151 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2152 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2153 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2154 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2155 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2156 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2157 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2158 MAP32 ("fixup", BFD_RELOC_CTOR
),
2159 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2160 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2161 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2162 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2163 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2164 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2165 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2166 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2167 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2168 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2169 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2170 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2171 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2172 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2173 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2174 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2175 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2176 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2177 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2178 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2179 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2180 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2181 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2182 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2183 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2184 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2185 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2186 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2187 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2188 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2189 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2190 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2191 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2192 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2193 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2194 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2195 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2196 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2197 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2198 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2199 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2200 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2201 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2202 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2203 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2204 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2205 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2206 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2207 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2208 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2209 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2210 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC
),
2211 MAP64 ("pcrel", BFD_RELOC_PPC64_PCREL34
),
2212 MAP64 ("got@pcrel", BFD_RELOC_PPC64_GOT_PCREL34
),
2213 MAP64 ("plt@pcrel", BFD_RELOC_PPC64_PLT_PCREL34
),
2214 MAP64 ("tls@pcrel", BFD_RELOC_PPC64_TLS_PCREL
),
2215 MAP64 ("got@tlsgd@pcrel", BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
),
2216 MAP64 ("got@tlsld@pcrel", BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
),
2217 MAP64 ("got@tprel@pcrel", BFD_RELOC_PPC64_GOT_TPREL_PCREL34
),
2218 MAP64 ("got@dtprel@pcrel", BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
),
2219 MAP64 ("higher34", BFD_RELOC_PPC64_ADDR16_HIGHER34
),
2220 MAP64 ("highera34", BFD_RELOC_PPC64_ADDR16_HIGHERA34
),
2221 MAP64 ("highest34", BFD_RELOC_PPC64_ADDR16_HIGHEST34
),
2222 MAP64 ("highesta34", BFD_RELOC_PPC64_ADDR16_HIGHESTA34
),
2223 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2227 return BFD_RELOC_NONE
;
2229 for (ch
= *str
, str2
= ident
;
2230 (str2
< ident
+ sizeof (ident
) - 1
2231 && (ISALNUM (ch
) || ch
== '@'));
2234 *str2
++ = TOLOWER (ch
);
2241 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2242 if (ch
== ptr
->string
[0]
2243 && len
== ptr
->length
2244 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2245 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2247 int reloc
= ptr
->reloc
;
2249 if (!ppc_obj64
&& (exp_p
->X_op
== O_big
|| exp_p
->X_add_number
!= 0))
2253 case BFD_RELOC_16_GOTOFF
:
2254 case BFD_RELOC_LO16_GOTOFF
:
2255 case BFD_RELOC_HI16_GOTOFF
:
2256 case BFD_RELOC_HI16_S_GOTOFF
:
2257 as_warn (_("symbol+offset@%s means symbol@%s+offset"),
2258 ptr
->string
, ptr
->string
);
2261 case BFD_RELOC_PPC_GOT_TLSGD16
:
2262 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2263 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2264 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2265 case BFD_RELOC_PPC_GOT_TLSLD16
:
2266 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2267 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2268 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2269 case BFD_RELOC_PPC_GOT_DTPREL16
:
2270 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2271 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2272 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2273 case BFD_RELOC_PPC_GOT_TPREL16
:
2274 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2275 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2276 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2277 as_bad (_("symbol+offset@%s not supported"), ptr
->string
);
2282 /* Now check for identifier@suffix+constant. */
2283 if (*str
== '-' || *str
== '+')
2285 char *orig_line
= input_line_pointer
;
2286 expressionS new_exp
;
2288 input_line_pointer
= str
;
2289 expression (&new_exp
);
2290 if (new_exp
.X_op
== O_constant
&& exp_p
->X_op
!= O_big
)
2292 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2293 str
= input_line_pointer
;
2295 input_line_pointer
= orig_line
;
2299 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2300 && exp_p
->X_op
== O_symbol
2301 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2303 /* Change the symbol so that the dummy .TOC. symbol can be
2304 omitted from the object file. */
2305 exp_p
->X_add_symbol
= &abs_symbol
;
2308 if (reloc
== BFD_RELOC_PPC64_REL24_NOTOC
2309 && (ppc_cpu
& PPC_OPCODE_POWER10
) == 0)
2310 reloc
= BFD_RELOC_PPC64_REL24_P9NOTOC
;
2312 return (bfd_reloc_code_real_type
) reloc
;
2315 return BFD_RELOC_NONE
;
2318 /* Support @got, etc. on constants emitted via .short, .int etc. */
2320 bfd_reloc_code_real_type
2321 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2324 if (nbytes
>= 2 && *input_line_pointer
== '@')
2325 return ppc_elf_suffix (&input_line_pointer
, exp
);
2326 return BFD_RELOC_NONE
;
2329 /* Warn when emitting data to code sections, unless we are emitting
2330 a relocation that ld --ppc476-workaround uses to recognise data
2331 *and* there was an unconditional branch prior to the data. */
2334 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2335 unsigned int nbytes
, fixS
*fix
)
2338 && (now_seg
->flags
& SEC_CODE
) != 0
2341 || !(fix
->fx_r_type
== BFD_RELOC_32
2342 || fix
->fx_r_type
== BFD_RELOC_CTOR
2343 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2344 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2345 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2346 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2347 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2348 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2349 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2350 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2352 /* Flag that we've warned. */
2356 as_warn (_("data in executable section"));
2360 /* Solaris pseduo op to change to the .rodata section. */
2362 ppc_elf_rdata (int xxx
)
2364 char *save_line
= input_line_pointer
;
2365 static char section
[] = ".rodata\n";
2367 /* Just pretend this is .section .rodata */
2368 input_line_pointer
= section
;
2369 obj_elf_section (xxx
);
2371 input_line_pointer
= save_line
;
2374 /* Pseudo op to make file scope bss items. */
2376 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2389 c
= get_symbol_name (&name
);
2391 /* Just after name is now '\0'. */
2392 p
= input_line_pointer
;
2394 SKIP_WHITESPACE_AFTER_NAME ();
2395 if (*input_line_pointer
!= ',')
2397 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2398 ignore_rest_of_line ();
2402 input_line_pointer
++; /* skip ',' */
2403 if ((size
= get_absolute_expression ()) < 0)
2405 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2406 ignore_rest_of_line ();
2410 /* The third argument to .lcomm is the alignment. */
2411 if (*input_line_pointer
!= ',')
2415 ++input_line_pointer
;
2416 align
= get_absolute_expression ();
2419 as_warn (_("ignoring bad alignment"));
2425 symbolP
= symbol_find_or_make (name
);
2428 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2430 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2431 S_GET_NAME (symbolP
));
2432 ignore_rest_of_line ();
2436 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2438 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2439 S_GET_NAME (symbolP
),
2440 (long) S_GET_VALUE (symbolP
),
2443 ignore_rest_of_line ();
2449 old_subsec
= now_subseg
;
2452 /* Convert to a power of 2 alignment. */
2453 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2456 as_bad (_("common alignment not a power of 2"));
2457 ignore_rest_of_line ();
2464 record_alignment (bss_section
, align2
);
2465 subseg_set (bss_section
, 1);
2467 frag_align (align2
, 0, 0);
2468 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2469 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2470 symbol_set_frag (symbolP
, frag_now
);
2471 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2474 S_SET_SIZE (symbolP
, size
);
2475 S_SET_SEGMENT (symbolP
, bss_section
);
2476 subseg_set (old_sec
, old_subsec
);
2477 demand_empty_rest_of_line ();
2480 /* Pseudo op to set symbol local entry point. */
2482 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2485 char c
= get_symbol_name (&name
);
2490 elf_symbol_type
*elfsym
;
2492 p
= input_line_pointer
;
2494 SKIP_WHITESPACE_AFTER_NAME ();
2495 if (*input_line_pointer
!= ',')
2498 as_bad (_("expected comma after name `%s' in .localentry directive"),
2501 ignore_rest_of_line ();
2504 input_line_pointer
++;
2506 if (exp
.X_op
== O_absent
)
2508 as_bad (_("missing expression in .localentry directive"));
2509 exp
.X_op
= O_constant
;
2510 exp
.X_add_number
= 0;
2513 sym
= symbol_find_or_make (name
);
2516 if (resolve_expression (&exp
)
2517 && exp
.X_op
== O_constant
)
2519 unsigned int encoded
, ok
;
2522 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2523 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2526 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2527 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2529 as_bad (_(".localentry expression for `%s' "
2530 "is not a valid power of 2"), S_GET_NAME (sym
));
2536 bfdsym
= symbol_get_bfdsym (sym
);
2537 elfsym
= elf_symbol_from (bfdsym
);
2538 gas_assert (elfsym
);
2539 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2540 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2541 if (ppc_abiversion
== 0)
2546 as_bad (_(".localentry expression for `%s' "
2547 "does not evaluate to a constant"), S_GET_NAME (sym
));
2549 demand_empty_rest_of_line ();
2552 /* Pseudo op to set ABI version. */
2554 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2559 if (exp
.X_op
== O_absent
)
2561 as_bad (_("missing expression in .abiversion directive"));
2562 exp
.X_op
= O_constant
;
2563 exp
.X_add_number
= 0;
2566 if (resolve_expression (&exp
)
2567 && exp
.X_op
== O_constant
)
2568 ppc_abiversion
= exp
.X_add_number
;
2570 as_bad (_(".abiversion expression does not evaluate to a constant"));
2571 demand_empty_rest_of_line ();
2574 /* Parse a .gnu_attribute directive. */
2576 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2578 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2580 /* Check validity of defined powerpc tags. */
2581 if (tag
== Tag_GNU_Power_ABI_FP
2582 || tag
== Tag_GNU_Power_ABI_Vector
2583 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2587 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2589 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2590 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2591 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2592 as_warn (_("unknown .gnu_attribute value"));
2596 /* Set ABI version in output file. */
2598 ppc_elf_md_finish (void)
2600 if (ppc_obj64
&& ppc_abiversion
!= 0)
2602 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2603 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2605 /* Any selection of opcodes based on ppc_cpu after gas has finished
2606 parsing the file is invalid. md_apply_fix and ppc_handle_align
2607 must select opcodes based on the machine in force at the point
2608 where the fixup or alignment frag was created, not the machine in
2609 force at the end of file. */
2613 /* Validate any relocations emitted for -mrelocatable, possibly adding
2614 fixups for word relocations in writable segments, so we can adjust
2617 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2619 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2628 case SHLIB_MRELOCATABLE
:
2629 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2630 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2631 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2632 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2633 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2634 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2635 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2636 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2637 && (seg
->flags
& SEC_LOAD
) != 0
2638 && strcmp (segment_name (seg
), ".got2") != 0
2639 && strcmp (segment_name (seg
), ".dtors") != 0
2640 && strcmp (segment_name (seg
), ".ctors") != 0
2641 && strcmp (segment_name (seg
), ".fixup") != 0
2642 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2643 && strcmp (segment_name (seg
), ".eh_frame") != 0
2644 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2646 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2647 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2649 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2650 _("relocation cannot be done when using -mrelocatable"));
2657 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2658 function descriptor sym if the corresponding code sym is used. */
2661 ppc_frob_file_before_adjust (void)
2669 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2675 name
= S_GET_NAME (symp
);
2679 if (! S_IS_WEAK (symp
)
2680 || S_IS_DEFINED (symp
))
2683 dotname
= concat (".", name
, (char *) NULL
);
2684 dotsym
= symbol_find_noref (dotname
, 1);
2686 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2687 || symbol_used_in_reloc_p (dotsym
)))
2688 symbol_mark_used (symp
);
2692 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2694 && toc_reloc_types
!= has_large_toc_reloc
2695 && bfd_section_size (toc
) > 0x10000)
2696 as_warn (_("TOC section size exceeds 64k"));
2699 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2700 emitted. Other uses of .TOC. will cause the symbol to be marked
2701 with BSF_KEEP in md_apply_fix. */
2704 ppc_elf_adjust_symtab (void)
2709 symp
= symbol_find (".TOC.");
2712 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2713 if ((bsym
->flags
& BSF_KEEP
) == 0)
2714 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2718 #endif /* OBJ_ELF */
2721 /* Parse XCOFF relocations. */
2722 static bfd_reloc_code_real_type
2723 ppc_xcoff_suffix (char **str_p
)
2727 unsigned int length
: 8;
2728 unsigned int valid32
: 1;
2729 unsigned int valid64
: 1;
2738 const struct map_bfd
*ptr
;
2740 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2741 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2742 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2744 static const struct map_bfd mapping
[] = {
2745 MAP ("l", BFD_RELOC_PPC_TOC16_LO
),
2746 MAP ("u", BFD_RELOC_PPC_TOC16_HI
),
2747 MAP32 ("ie", BFD_RELOC_PPC_TLSIE
),
2748 MAP32 ("ld", BFD_RELOC_PPC_TLSLD
),
2749 MAP32 ("le", BFD_RELOC_PPC_TLSLE
),
2750 MAP32 ("m", BFD_RELOC_PPC_TLSM
),
2751 MAP32 ("ml", BFD_RELOC_PPC_TLSML
),
2752 MAP64 ("ie", BFD_RELOC_PPC64_TLSIE
),
2753 MAP64 ("ld", BFD_RELOC_PPC64_TLSLD
),
2754 MAP64 ("le", BFD_RELOC_PPC64_TLSLE
),
2755 MAP64 ("m", BFD_RELOC_PPC64_TLSM
),
2756 MAP64 ("ml", BFD_RELOC_PPC64_TLSML
),
2760 return BFD_RELOC_NONE
;
2762 for (ch
= *str
, str2
= ident
;
2763 (str2
< ident
+ sizeof (ident
) - 1
2764 && (ISALNUM (ch
) || ch
== '@'));
2767 *str2
++ = TOLOWER (ch
);
2774 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2775 if (ch
== ptr
->string
[0]
2776 && len
== ptr
->length
2777 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2778 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2781 return (bfd_reloc_code_real_type
) ptr
->reloc
;
2784 return BFD_RELOC_NONE
;
2787 /* Restore XCOFF addis instruction to ELF format.
2788 AIX often generates addis instructions using "addis RT,D(RA)"
2789 format instead of the ELF "addis RT,RA,SI" one.
2790 On entry RT_E is at the comma after RT, D_E is at the open
2791 parenthesis after D, and RA_E is at the close parenthesis after RA. */
2793 ppc_xcoff_fixup_addis (char *rt_e
, char *d_e
, char *ra_e
)
2795 size_t ra_size
= ra_e
- d_e
- 1;
2796 char *save_ra
= xmalloc (ra_size
);
2799 memcpy (save_ra
, d_e
+ 1, ra_size
);
2800 /* Shuffle D to make room for RA, copying the comma too. */
2801 memmove (rt_e
+ ra_size
+ 1, rt_e
, d_e
- rt_e
);
2802 /* Erase the trailing ')', keeping any rubbish for potential errors. */
2803 memmove (ra_e
, ra_e
+ 1, strlen (ra_e
));
2804 /* Write RA back. */
2805 memcpy (rt_e
+ 1, save_ra
, ra_size
);
2809 /* Support @ie, etc. on constants emitted via .short, .int etc. */
2811 bfd_reloc_code_real_type
2812 ppc_xcoff_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2815 if (nbytes
>= 2 && *input_line_pointer
== '@')
2816 return ppc_xcoff_suffix (&input_line_pointer
);
2818 /* There isn't any @ symbol for default TLS relocations (R_TLS). */
2819 if (exp
->X_add_symbol
!= NULL
2820 && (symbol_get_tc (exp
->X_add_symbol
)->symbol_class
== XMC_TL
2821 || symbol_get_tc (exp
->X_add_symbol
)->symbol_class
== XMC_UL
))
2822 return (ppc_obj64
? BFD_RELOC_PPC64_TLSGD
: BFD_RELOC_PPC_TLSGD
);
2824 return BFD_RELOC_NONE
;
2827 #endif /* OBJ_XCOFF */
2829 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2830 /* See whether a symbol is in the TOC section. */
2833 ppc_is_toc_sym (symbolS
*sym
)
2836 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2837 || symbol_get_tc (sym
)->symbol_class
== XMC_TE
2838 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2841 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2843 return strcmp (sname
, ".toc") == 0;
2845 return strcmp (sname
, ".got") == 0;
2848 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2852 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2854 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2858 /* Check we don't already exist. */
2859 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2860 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2863 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2865 if (ppc_apuinfo_num_alloc
== 0)
2867 ppc_apuinfo_num_alloc
= 4;
2868 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2872 ppc_apuinfo_num_alloc
+= 4;
2873 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2874 ppc_apuinfo_num_alloc
);
2877 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2882 /* Various frobbings of labels and their addresses. */
2884 /* Symbols labelling the current insn. */
2885 struct insn_label_list
2887 struct insn_label_list
*next
;
2891 static struct insn_label_list
*insn_labels
;
2892 static struct insn_label_list
*free_insn_labels
;
2895 ppc_record_label (symbolS
*sym
)
2897 struct insn_label_list
*l
;
2899 if (free_insn_labels
== NULL
)
2900 l
= XNEW (struct insn_label_list
);
2903 l
= free_insn_labels
;
2904 free_insn_labels
= l
->next
;
2908 l
->next
= insn_labels
;
2913 ppc_clear_labels (void)
2915 while (insn_labels
!= NULL
)
2917 struct insn_label_list
*l
= insn_labels
;
2918 insn_labels
= l
->next
;
2919 l
->next
= free_insn_labels
;
2920 free_insn_labels
= l
;
2925 ppc_start_line_hook (void)
2927 ppc_clear_labels ();
2931 ppc_new_dot_label (symbolS
*sym
)
2933 ppc_record_label (sym
);
2935 /* Anchor this label to the current csect for relocations. */
2936 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2941 ppc_frob_label (symbolS
*sym
)
2943 ppc_record_label (sym
);
2946 /* Set the class of a label based on where it is defined. This handles
2947 symbols without suffixes. Also, move the symbol so that it follows
2948 the csect symbol. */
2949 if (ppc_current_csect
!= (symbolS
*) NULL
)
2951 if (symbol_get_tc (sym
)->symbol_class
== -1)
2952 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
2954 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
2955 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
2956 &symbol_rootP
, &symbol_lastP
);
2957 /* Update last csect symbol. */
2958 symbol_get_tc (ppc_current_csect
)->within
= sym
;
2960 /* Some labels like .bs are using within differently.
2961 So avoid changing it, if it's already set. */
2962 if (symbol_get_tc (sym
)->within
== NULL
)
2963 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2968 dwarf2_emit_label (sym
);
2972 /* We need to keep a list of fixups. We can't simply generate them as
2973 we go, because that would require us to first create the frag, and
2974 that would screw up references to ``.''. */
2980 bfd_reloc_code_real_type reloc
;
2983 #define MAX_INSN_FIXUPS (5)
2985 /* Return the field size operated on by RELOC, and whether it is
2986 pc-relative in PC_RELATIVE. */
2989 fixup_size (bfd_reloc_code_real_type reloc
, bool *pc_relative
)
2991 unsigned int size
= 0;
2996 /* This switch statement must handle all BFD_RELOC values
2997 possible in instruction fixups. As is, it handles all
2998 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
2999 bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
3000 Overkill since data and marker relocs need not be handled
3001 here, but this way we can be sure a needed fixup reloc isn't
3002 accidentally omitted. */
3003 case BFD_RELOC_PPC_EMB_MRKREF
:
3004 case BFD_RELOC_VTABLE_ENTRY
:
3005 case BFD_RELOC_VTABLE_INHERIT
:
3013 case BFD_RELOC_16_BASEREL
:
3014 case BFD_RELOC_16_GOTOFF
:
3015 case BFD_RELOC_GPREL16
:
3016 case BFD_RELOC_HI16
:
3017 case BFD_RELOC_HI16_BASEREL
:
3018 case BFD_RELOC_HI16_GOTOFF
:
3019 case BFD_RELOC_HI16_PLTOFF
:
3020 case BFD_RELOC_HI16_S
:
3021 case BFD_RELOC_HI16_S_BASEREL
:
3022 case BFD_RELOC_HI16_S_GOTOFF
:
3023 case BFD_RELOC_HI16_S_PLTOFF
:
3024 case BFD_RELOC_LO16
:
3025 case BFD_RELOC_LO16_BASEREL
:
3026 case BFD_RELOC_LO16_GOTOFF
:
3027 case BFD_RELOC_LO16_PLTOFF
:
3028 case BFD_RELOC_PPC64_ADDR16_DS
:
3029 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3030 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3031 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
3032 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
3033 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
3034 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
3035 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
3036 case BFD_RELOC_PPC64_DTPREL16_DS
:
3037 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
3038 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
3039 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
3040 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
3041 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
3042 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
3043 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
3044 case BFD_RELOC_PPC64_GOT16_DS
:
3045 case BFD_RELOC_PPC64_GOT16_LO_DS
:
3046 case BFD_RELOC_PPC64_HIGHER
:
3047 case BFD_RELOC_PPC64_HIGHER_S
:
3048 case BFD_RELOC_PPC64_HIGHEST
:
3049 case BFD_RELOC_PPC64_HIGHEST_S
:
3050 case BFD_RELOC_PPC64_PLT16_LO_DS
:
3051 case BFD_RELOC_PPC64_PLTGOT16
:
3052 case BFD_RELOC_PPC64_PLTGOT16_DS
:
3053 case BFD_RELOC_PPC64_PLTGOT16_HA
:
3054 case BFD_RELOC_PPC64_PLTGOT16_HI
:
3055 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3056 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
3057 case BFD_RELOC_PPC64_SECTOFF_DS
:
3058 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
3059 case BFD_RELOC_PPC64_TOC16_DS
:
3060 case BFD_RELOC_PPC64_TOC16_HA
:
3061 case BFD_RELOC_PPC64_TOC16_HI
:
3062 case BFD_RELOC_PPC64_TOC16_LO
:
3063 case BFD_RELOC_PPC64_TOC16_LO_DS
:
3064 case BFD_RELOC_PPC64_TPREL16_DS
:
3065 case BFD_RELOC_PPC64_TPREL16_HIGH
:
3066 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
3067 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
3068 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
3069 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
3070 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
3071 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
3073 case BFD_RELOC_PPC_BA16
:
3075 case BFD_RELOC_PPC_DTPREL16
:
3076 case BFD_RELOC_PPC_DTPREL16_HA
:
3077 case BFD_RELOC_PPC_DTPREL16_HI
:
3078 case BFD_RELOC_PPC_DTPREL16_LO
:
3079 case BFD_RELOC_PPC_EMB_NADDR16
:
3080 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
3081 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
3082 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
3083 case BFD_RELOC_PPC_EMB_RELSDA
:
3084 case BFD_RELOC_PPC_EMB_RELSEC16
:
3085 case BFD_RELOC_PPC_EMB_RELST_LO
:
3086 case BFD_RELOC_PPC_EMB_RELST_HI
:
3087 case BFD_RELOC_PPC_EMB_RELST_HA
:
3088 case BFD_RELOC_PPC_EMB_SDA2I16
:
3089 case BFD_RELOC_PPC_EMB_SDA2REL
:
3090 case BFD_RELOC_PPC_EMB_SDAI16
:
3091 case BFD_RELOC_PPC_GOT_DTPREL16
:
3092 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
3093 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
3094 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3095 case BFD_RELOC_PPC_GOT_TLSGD16
:
3096 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
3097 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
3098 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
3099 case BFD_RELOC_PPC_GOT_TLSLD16
:
3100 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
3101 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
3102 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
3103 case BFD_RELOC_PPC_GOT_TPREL16
:
3104 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
3105 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
3106 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3107 case BFD_RELOC_PPC_TOC16
:
3108 case BFD_RELOC_PPC_TOC16_HI
:
3109 case BFD_RELOC_PPC_TOC16_LO
:
3110 case BFD_RELOC_PPC_TPREL16
:
3111 case BFD_RELOC_PPC_TPREL16_HA
:
3112 case BFD_RELOC_PPC_TPREL16_HI
:
3113 case BFD_RELOC_PPC_TPREL16_LO
:
3117 case BFD_RELOC_16_PCREL
:
3118 case BFD_RELOC_HI16_PCREL
:
3119 case BFD_RELOC_HI16_S_PCREL
:
3120 case BFD_RELOC_LO16_PCREL
:
3121 case BFD_RELOC_PPC64_REL16_HIGH
:
3122 case BFD_RELOC_PPC64_REL16_HIGHA
:
3123 case BFD_RELOC_PPC64_REL16_HIGHER
:
3124 case BFD_RELOC_PPC64_REL16_HIGHER34
:
3125 case BFD_RELOC_PPC64_REL16_HIGHERA
:
3126 case BFD_RELOC_PPC64_REL16_HIGHERA34
:
3127 case BFD_RELOC_PPC64_REL16_HIGHEST
:
3128 case BFD_RELOC_PPC64_REL16_HIGHEST34
:
3129 case BFD_RELOC_PPC64_REL16_HIGHESTA
:
3130 case BFD_RELOC_PPC64_REL16_HIGHESTA34
:
3132 case BFD_RELOC_PPC_B16
:
3134 case BFD_RELOC_PPC_VLE_REL8
:
3140 case BFD_RELOC_32_PLTOFF
:
3142 case BFD_RELOC_CTOR
:
3144 case BFD_RELOC_PPC64_ENTRY
:
3145 case BFD_RELOC_PPC_16DX_HA
:
3147 case BFD_RELOC_PPC_BA16
:
3149 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
3150 case BFD_RELOC_PPC_BA16_BRTAKEN
:
3151 case BFD_RELOC_PPC_BA26
:
3152 case BFD_RELOC_PPC_EMB_BIT_FLD
:
3153 case BFD_RELOC_PPC_EMB_NADDR32
:
3154 case BFD_RELOC_PPC_EMB_SDA21
:
3155 case BFD_RELOC_PPC_TLS
:
3156 case BFD_RELOC_PPC_TLSGD
:
3157 case BFD_RELOC_PPC_TLSLD
:
3158 case BFD_RELOC_PPC_TLSLE
:
3159 case BFD_RELOC_PPC_TLSIE
:
3160 case BFD_RELOC_PPC_TLSM
:
3161 case BFD_RELOC_PPC_TLSML
:
3162 case BFD_RELOC_PPC_VLE_HA16A
:
3163 case BFD_RELOC_PPC_VLE_HA16D
:
3164 case BFD_RELOC_PPC_VLE_HI16A
:
3165 case BFD_RELOC_PPC_VLE_HI16D
:
3166 case BFD_RELOC_PPC_VLE_LO16A
:
3167 case BFD_RELOC_PPC_VLE_LO16D
:
3168 case BFD_RELOC_PPC_VLE_SDA21
:
3169 case BFD_RELOC_PPC_VLE_SDA21_LO
:
3170 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3171 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
3172 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3173 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
3174 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3175 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
3176 case BFD_RELOC_PPC64_TLS_PCREL
:
3181 case BFD_RELOC_24_PLT_PCREL
:
3182 case BFD_RELOC_32_PCREL
:
3183 case BFD_RELOC_32_PLT_PCREL
:
3184 case BFD_RELOC_PPC64_REL24_NOTOC
:
3185 case BFD_RELOC_PPC64_REL24_P9NOTOC
:
3187 case BFD_RELOC_PPC_B16
:
3189 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3190 case BFD_RELOC_PPC_B16_BRTAKEN
:
3191 case BFD_RELOC_PPC_B26
:
3192 case BFD_RELOC_PPC_LOCAL24PC
:
3193 case BFD_RELOC_PPC_REL16DX_HA
:
3194 case BFD_RELOC_PPC_VLE_REL15
:
3195 case BFD_RELOC_PPC_VLE_REL24
:
3201 case BFD_RELOC_CTOR
:
3203 case BFD_RELOC_PPC_COPY
:
3204 case BFD_RELOC_PPC_DTPMOD
:
3205 case BFD_RELOC_PPC_DTPREL
:
3206 case BFD_RELOC_PPC_GLOB_DAT
:
3207 case BFD_RELOC_PPC_TPREL
:
3208 size
= ppc_obj64
? 8 : 4;
3212 case BFD_RELOC_64_PLTOFF
:
3213 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
3214 case BFD_RELOC_PPC64_D28
:
3215 case BFD_RELOC_PPC64_D34
:
3216 case BFD_RELOC_PPC64_D34_LO
:
3217 case BFD_RELOC_PPC64_D34_HI30
:
3218 case BFD_RELOC_PPC64_D34_HA30
:
3219 case BFD_RELOC_PPC64_TPREL34
:
3220 case BFD_RELOC_PPC64_DTPREL34
:
3221 case BFD_RELOC_PPC64_TOC
:
3222 case BFD_RELOC_PPC64_TLSGD
:
3223 case BFD_RELOC_PPC64_TLSLD
:
3224 case BFD_RELOC_PPC64_TLSLE
:
3225 case BFD_RELOC_PPC64_TLSIE
:
3226 case BFD_RELOC_PPC64_TLSM
:
3227 case BFD_RELOC_PPC64_TLSML
:
3231 case BFD_RELOC_64_PCREL
:
3232 case BFD_RELOC_64_PLT_PCREL
:
3233 case BFD_RELOC_PPC64_GOT_PCREL34
:
3234 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
3235 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
3236 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
3237 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
3238 case BFD_RELOC_PPC64_PCREL28
:
3239 case BFD_RELOC_PPC64_PCREL34
:
3240 case BFD_RELOC_PPC64_PLT_PCREL34
:
3249 if (ENABLE_CHECKING
)
3251 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
3252 if (reloc_howto
!= NULL
3253 && (size
!= bfd_get_reloc_size (reloc_howto
)
3254 || pcrel
!= reloc_howto
->pc_relative
))
3256 as_bad (_("%s howto doesn't match size/pcrel in gas"),
3261 *pc_relative
= pcrel
;
3266 /* If we have parsed a call to __tls_get_addr, parse an argument like
3267 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg
3268 is successfully parsed, *STR is updated past the trailing
3269 parenthesis and trailing white space, and *TLS_FIX contains the
3270 reloc and arg expression. */
3273 parse_tls_arg (char **str
, const expressionS
*exp
, struct ppc_fixup
*tls_fix
)
3275 const char *sym_name
= S_GET_NAME (exp
->X_add_symbol
);
3276 if (sym_name
[0] == '.')
3279 tls_fix
->reloc
= BFD_RELOC_NONE
;
3280 if (strncasecmp (sym_name
, "__tls_get_addr", 14) == 0
3281 && (sym_name
[14] == 0
3282 || strcasecmp (sym_name
+ 14, "_desc") == 0
3283 || strcasecmp (sym_name
+ 14, "_opt") == 0))
3285 char *hold
= input_line_pointer
;
3286 input_line_pointer
= *str
+ 1;
3287 expression (&tls_fix
->exp
);
3288 if (tls_fix
->exp
.X_op
== O_symbol
)
3290 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3291 tls_fix
->reloc
= BFD_RELOC_PPC_TLSGD
;
3292 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3293 tls_fix
->reloc
= BFD_RELOC_PPC_TLSLD
;
3294 if (tls_fix
->reloc
!= BFD_RELOC_NONE
)
3296 input_line_pointer
+= 7;
3298 *str
= input_line_pointer
;
3301 input_line_pointer
= hold
;
3303 return tls_fix
->reloc
!= BFD_RELOC_NONE
;
3307 /* This routine is called for each instruction to be assembled. */
3310 md_assemble (char *str
)
3313 const struct powerpc_opcode
*opcode
;
3315 const ppc_opindex_t
*opindex_ptr
;
3318 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
3323 unsigned int insn_length
;
3325 /* Get the opcode. */
3326 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
3331 /* Look up the opcode in the hash table. */
3332 opcode
= (const struct powerpc_opcode
*) str_hash_find (ppc_hash
, str
);
3333 if (opcode
== (const struct powerpc_opcode
*) NULL
)
3335 as_bad (_("unrecognized opcode: `%s'"), str
);
3336 ppc_clear_labels ();
3340 insn
= opcode
->opcode
;
3341 if (!target_big_endian
3342 && ((insn
& ~(1 << 26)) == 46u << 26
3343 || (insn
& ~(0xc0 << 1)) == (31u << 26 | 533 << 1)))
3345 /* lmw, stmw, lswi, lswx, stswi, stswx */
3346 as_bad (_("`%s' invalid when little-endian"), str
);
3347 ppc_clear_labels ();
3352 while (ISSPACE (*str
))
3356 /* AIX often generates addis instructions using "addis RT, D(RA)"
3357 format instead of the classic "addis RT, RA, SI" one.
3358 Restore it to the default format as it's the one encoded
3360 if (!strcmp (opcode
->name
, "addis"))
3362 char *rt_e
= strchr (str
, ',');
3364 && strchr (rt_e
+ 1, ',') == NULL
)
3366 char *d_e
= strchr (rt_e
+ 1, '(');
3367 if (d_e
!= NULL
&& d_e
!= rt_e
+ 1)
3369 char *ra_e
= strrchr (d_e
+ 1, ')');
3370 if (ra_e
!= NULL
&& ra_e
!= d_e
+ 1)
3371 ppc_xcoff_fixup_addis (rt_e
, d_e
, ra_e
);
3377 /* PowerPC operands are just expressions. The only real issue is
3378 that a few operand types are optional. If an instruction has
3379 multiple optional operands and one is omitted, then all optional
3380 operands past the first omitted one must also be omitted. */
3381 int num_optional_operands
= 0;
3382 int num_optional_provided
= 0;
3384 /* Gather the operands. */
3388 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
3390 const struct powerpc_operand
*operand
;
3396 if (next_opindex
== 0)
3397 operand
= &powerpc_operands
[*opindex_ptr
];
3400 operand
= &powerpc_operands
[next_opindex
];
3405 /* If this is an optional operand, and we are skipping it, just
3406 insert the default value, usually a zero. */
3407 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3408 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
3410 if (num_optional_operands
== 0)
3412 const ppc_opindex_t
*optr
;
3418 for (optr
= opindex_ptr
; *optr
!= 0; optr
++)
3420 const struct powerpc_operand
*op
;
3421 op
= &powerpc_operands
[*optr
];
3425 if ((op
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3426 && !((op
->flags
& PPC_OPERAND_OPTIONAL32
) != 0
3428 ++num_optional_operands
;
3430 if (s
!= NULL
&& *s
!= '\0')
3434 /* Look for the start of the next operand. */
3435 if ((op
->flags
& PPC_OPERAND_PARENS
) != 0)
3436 s
= strpbrk (s
, "(,");
3438 s
= strchr (s
, ',');
3444 omitted
= total
- provided
;
3445 num_optional_provided
= num_optional_operands
- omitted
;
3447 if (--num_optional_provided
< 0)
3449 uint64_t val
= ppc_optional_operand_value (operand
, insn
, ppc_cpu
,
3450 num_optional_provided
);
3451 if (operand
->insert
)
3453 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
3454 if (errmsg
!= (const char *) NULL
)
3455 as_bad ("%s", errmsg
);
3457 else if (operand
->shift
>= 0)
3458 insn
|= (val
& operand
->bitm
) << operand
->shift
;
3460 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
3462 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
3463 next_opindex
= *opindex_ptr
+ 1;
3468 /* Gather the operand. */
3469 hold
= input_line_pointer
;
3470 input_line_pointer
= str
;
3471 cr_operand
= ((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0
3472 || (operand
->flags
& PPC_OPERAND_CR_REG
) != 0);
3475 str
= input_line_pointer
;
3476 input_line_pointer
= hold
;
3478 if (ex
.X_op
== O_illegal
)
3479 as_bad (_("illegal operand"));
3480 else if (ex
.X_op
== O_absent
)
3481 as_bad (_("missing operand"));
3482 else if (ex
.X_op
== O_register
)
3486 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3487 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3488 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
| PPC_OPERAND_ACC
3489 | PPC_OPERAND_DMR
)) != 0
3490 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3491 && ex
.X_add_number
!= 0
3492 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3493 as_warn (_("invalid register expression"));
3494 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3495 ppc_cpu
, (char *) NULL
, 0);
3497 else if (ex
.X_op
== O_constant
3498 || (ex
.X_op
== O_big
&& ex
.X_add_number
> 0))
3501 if (ex
.X_op
== O_constant
)
3503 val
= ex
.X_add_number
;
3504 if (sizeof (ex
.X_add_number
) < sizeof (val
)
3505 && (ex
.X_add_number
< 0) != ex
.X_extrabit
)
3506 val
= val
^ ((addressT
) -1 ^ (uint64_t) -1);
3509 val
= generic_bignum_to_int64 ();
3511 /* Allow @HA, @L, @H on constants. */
3512 char *orig_str
= str
;
3513 bfd_reloc_code_real_type reloc
= ppc_elf_suffix (&str
, &ex
);
3515 if (ex
.X_op
== O_constant
)
3517 val
= ex
.X_add_number
;
3518 if (sizeof (ex
.X_add_number
) < sizeof (val
)
3519 && (ex
.X_add_number
< 0) != ex
.X_extrabit
)
3520 val
= val
^ ((addressT
) -1 ^ (uint64_t) -1);
3522 if (reloc
!= BFD_RELOC_NONE
)
3529 case BFD_RELOC_LO16
:
3531 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3535 case BFD_RELOC_HI16
:
3536 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3538 /* PowerPC64 @h is tested for overflow. */
3540 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3542 uint64_t sign
= (((uint64_t) -1 >> 16) + 1) >> 1;
3543 val
= (val
^ sign
) - sign
;
3549 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3551 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3555 case BFD_RELOC_HI16_S
:
3556 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3558 /* PowerPC64 @ha is tested for overflow. */
3559 val
= (val
+ 0x8000) >> 16;
3560 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3562 uint64_t sign
= (((uint64_t) -1 >> 16) + 1) >> 1;
3563 val
= (val
^ sign
) - sign
;
3569 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3571 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3575 case BFD_RELOC_PPC64_HIGHER
:
3576 val
= PPC_HIGHER (val
);
3577 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3581 case BFD_RELOC_PPC64_HIGHER_S
:
3582 val
= PPC_HIGHERA (val
);
3583 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3587 case BFD_RELOC_PPC64_HIGHEST
:
3588 val
= PPC_HIGHEST (val
);
3589 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3593 case BFD_RELOC_PPC64_HIGHEST_S
:
3594 val
= PPC_HIGHESTA (val
);
3595 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3599 #endif /* OBJ_ELF */
3600 insn
= ppc_insert_operand (insn
, operand
, val
, ppc_cpu
, NULL
, 0);
3604 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3606 /* Look for a __tls_get_addr arg using the insane old syntax. */
3607 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3608 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3610 fixups
[fc
].opindex
= *opindex_ptr
;
3614 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3616 /* If VLE-mode convert LO/HI/HA relocations. */
3617 if (opcode
->flags
& PPC_OPCODE_VLE
)
3619 uint64_t tmp_insn
= insn
& opcode
->mask
;
3621 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3622 || tmp_insn
== E_AND2I_DOT_INSN
3623 || tmp_insn
== E_OR2IS_INSN
3624 || tmp_insn
== E_LI_INSN
3625 || tmp_insn
== E_LIS_INSN
3626 || tmp_insn
== E_AND2IS_DOT_INSN
);
3629 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3630 || tmp_insn
== E_ADD2IS_INSN
3631 || tmp_insn
== E_CMP16I_INSN
3632 || tmp_insn
== E_MULL2I_INSN
3633 || tmp_insn
== E_CMPL16I_INSN
3634 || tmp_insn
== E_CMPH16I_INSN
3635 || tmp_insn
== E_CMPHL16I_INSN
);
3642 case BFD_RELOC_PPC_EMB_SDA21
:
3643 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3646 case BFD_RELOC_LO16
:
3648 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3649 else if (use_a_reloc
)
3650 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3653 case BFD_RELOC_HI16
:
3655 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3656 else if (use_a_reloc
)
3657 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3660 case BFD_RELOC_HI16_S
:
3662 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3663 else if (use_a_reloc
)
3664 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3667 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3669 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3672 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3674 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3677 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3679 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3684 /* TLS and other tweaks. */
3690 case BFD_RELOC_PPC_TLS
:
3691 case BFD_RELOC_PPC64_TLS_PCREL
:
3692 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3693 as_bad (_("@tls may not be used with \"%s\" operands"),
3695 else if (operand
->shift
!= 11)
3696 as_bad (_("@tls may only be used in last operand"));
3698 insn
= ppc_insert_operand (insn
, operand
,
3700 ppc_cpu
, (char *) NULL
, 0);
3703 /* We'll only use the 32 (or 64) bit form of these relocations
3704 in constants. Instructions get the 16 or 34 bit form. */
3705 case BFD_RELOC_PPC_DTPREL
:
3706 if (operand
->bitm
== 0x3ffffffffULL
)
3707 reloc
= BFD_RELOC_PPC64_DTPREL34
;
3709 reloc
= BFD_RELOC_PPC_DTPREL16
;
3712 case BFD_RELOC_PPC_TPREL
:
3713 if (operand
->bitm
== 0x3ffffffffULL
)
3714 reloc
= BFD_RELOC_PPC64_TPREL34
;
3716 reloc
= BFD_RELOC_PPC_TPREL16
;
3719 case BFD_RELOC_PPC64_PCREL34
:
3720 if (operand
->bitm
== 0xfffffffULL
)
3722 reloc
= BFD_RELOC_PPC64_PCREL28
;
3726 case BFD_RELOC_PPC64_GOT_PCREL34
:
3727 case BFD_RELOC_PPC64_PLT_PCREL34
:
3728 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
3729 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
3730 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
3731 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
3732 if (operand
->bitm
!= 0x3ffffffffULL
3733 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3734 as_warn (_("%s unsupported on this instruction"), "@pcrel");
3737 case BFD_RELOC_LO16
:
3738 if (operand
->bitm
== 0x3ffffffffULL
3739 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3740 reloc
= BFD_RELOC_PPC64_D34_LO
;
3741 else if ((operand
->bitm
| 0xf) != 0xffff
3742 || operand
->shift
!= 0
3743 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3744 as_warn (_("%s unsupported on this instruction"), "@l");
3747 case BFD_RELOC_HI16
:
3748 if (operand
->bitm
== 0x3ffffffffULL
3749 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3750 reloc
= BFD_RELOC_PPC64_D34_HI30
;
3751 else if (operand
->bitm
!= 0xffff
3752 || operand
->shift
!= 0
3753 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3754 as_warn (_("%s unsupported on this instruction"), "@h");
3757 case BFD_RELOC_HI16_S
:
3758 if (operand
->bitm
== 0x3ffffffffULL
3759 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3760 reloc
= BFD_RELOC_PPC64_D34_HA30
;
3761 else if (operand
->bitm
== 0xffff
3762 && operand
->shift
== (int) PPC_OPSHIFT_INV
3763 && opcode
->opcode
== (19 << 26) + (2 << 1))
3765 reloc
= BFD_RELOC_PPC_16DX_HA
;
3766 else if (operand
->bitm
!= 0xffff
3767 || operand
->shift
!= 0
3768 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3769 as_warn (_("%s unsupported on this instruction"), "@ha");
3772 #endif /* OBJ_ELF */
3774 reloc
= ppc_xcoff_suffix (&str
);
3775 #endif /* OBJ_XCOFF */
3777 if (reloc
!= BFD_RELOC_NONE
)
3779 /* Determine a BFD reloc value based on the operand information.
3780 We are only prepared to turn a few of the operands into
3782 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3783 | PPC_OPERAND_ABSOLUTE
)) != 0
3784 && operand
->bitm
== 0x3fffffc
3785 && operand
->shift
== 0)
3786 reloc
= BFD_RELOC_PPC_B26
;
3787 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3788 | PPC_OPERAND_ABSOLUTE
)) != 0
3789 && operand
->bitm
== 0xfffc
3790 && operand
->shift
== 0)
3791 reloc
= BFD_RELOC_PPC_B16
;
3792 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3793 && operand
->bitm
== 0x1fe
3794 && operand
->shift
== -1)
3795 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3796 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3797 && operand
->bitm
== 0xfffe
3798 && operand
->shift
== 0)
3799 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3800 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3801 && operand
->bitm
== 0x1fffffe
3802 && operand
->shift
== 0)
3803 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3804 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3805 && (operand
->bitm
& 0xfff0) == 0xfff0
3806 && operand
->shift
== 0)
3808 reloc
= BFD_RELOC_16
;
3809 #if defined OBJ_XCOFF || defined OBJ_ELF
3810 /* Note: the symbol may be not yet defined. */
3811 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3812 && ppc_is_toc_sym (ex
.X_add_symbol
))
3814 reloc
= BFD_RELOC_PPC_TOC16
;
3816 as_warn (_("assuming %s on symbol"),
3817 ppc_obj64
? "@toc" : "@xgot");
3822 else if (operand
->bitm
== 0x3ffffffffULL
)
3823 reloc
= BFD_RELOC_PPC64_D34
;
3824 else if (operand
->bitm
== 0xfffffffULL
)
3825 reloc
= BFD_RELOC_PPC64_D28
;
3827 /* For the absolute forms of branches, convert the PC
3828 relative form back into the absolute. */
3829 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3833 case BFD_RELOC_PPC_B26
:
3834 reloc
= BFD_RELOC_PPC_BA26
;
3836 case BFD_RELOC_PPC_B16
:
3837 reloc
= BFD_RELOC_PPC_BA16
;
3840 case BFD_RELOC_PPC_B16_BRTAKEN
:
3841 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3843 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3844 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3855 case BFD_RELOC_PPC_TOC16
:
3856 toc_reloc_types
|= has_small_toc_reloc
;
3858 case BFD_RELOC_PPC64_TOC16_LO
:
3859 case BFD_RELOC_PPC64_TOC16_HI
:
3860 case BFD_RELOC_PPC64_TOC16_HA
:
3861 toc_reloc_types
|= has_large_toc_reloc
;
3868 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3873 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3876 case BFD_RELOC_LO16
:
3877 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3880 case BFD_RELOC_16_GOTOFF
:
3881 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3884 case BFD_RELOC_LO16_GOTOFF
:
3885 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3888 case BFD_RELOC_LO16_PLTOFF
:
3889 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3892 case BFD_RELOC_16_BASEREL
:
3893 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3896 case BFD_RELOC_LO16_BASEREL
:
3897 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3900 case BFD_RELOC_PPC_TOC16
:
3901 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3904 case BFD_RELOC_PPC64_TOC16_LO
:
3905 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3908 case BFD_RELOC_PPC64_PLTGOT16
:
3909 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3912 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3913 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3916 case BFD_RELOC_PPC_DTPREL16
:
3917 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3920 case BFD_RELOC_PPC_DTPREL16_LO
:
3921 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3924 case BFD_RELOC_PPC_TPREL16
:
3925 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3928 case BFD_RELOC_PPC_TPREL16_LO
:
3929 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3932 case BFD_RELOC_PPC_GOT_DTPREL16
:
3933 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3934 case BFD_RELOC_PPC_GOT_TPREL16
:
3935 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3939 as_bad (_("unsupported relocation for DS offset field"));
3944 /* Look for a __tls_get_addr arg after any __tls_get_addr
3945 modifiers like @plt. This fixup must be emitted before
3946 the usual call fixup. */
3947 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3948 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3950 fixups
[fc
].opindex
= *opindex_ptr
;
3955 /* We need to generate a fixup for this expression. */
3956 if (fc
>= MAX_INSN_FIXUPS
)
3957 as_fatal (_("too many fixups"));
3958 fixups
[fc
].exp
= ex
;
3959 fixups
[fc
].opindex
= *opindex_ptr
;
3960 fixups
[fc
].reloc
= reloc
;
3968 /* If expecting more operands, then we want to see "),". */
3969 if (*str
== endc
&& opindex_ptr
[1] != 0)
3973 while (ISSPACE (*str
));
3977 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3982 /* The call to expression should have advanced str past any
3990 else if (*str
!= '\0')
3992 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3995 else if (endc
== ')')
3997 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
4002 while (ISSPACE (*str
))
4006 as_bad (_("junk at end of line: `%s'"), str
);
4009 /* Do we need/want an APUinfo section? */
4010 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
4013 /* These are all version "1". */
4014 if (opcode
->flags
& PPC_OPCODE_SPE
)
4015 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
4016 if (opcode
->flags
& PPC_OPCODE_ISEL
)
4017 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
4018 if (opcode
->flags
& PPC_OPCODE_EFS
)
4019 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
4020 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
4021 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
4022 if (opcode
->flags
& PPC_OPCODE_PMR
)
4023 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
4024 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
4025 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
4026 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
4027 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
4028 /* Only set the VLE flag if the instruction has been pulled via
4029 the VLE instruction set. This way the flag is guaranteed to
4030 be set for VLE-only instructions or for VLE-only processors,
4031 however it'll remain clear for dual-mode instructions on
4032 dual-mode and, more importantly, standard-mode processors. */
4033 if (ppc_cpu
& opcode
->flags
& PPC_OPCODE_VLE
)
4035 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
4036 if (elf_section_data (now_seg
) != NULL
)
4037 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
4042 /* Write out the instruction. */
4045 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
4046 /* All instructions can start on a 2 byte boundary for VLE. */
4049 if (frag_now
->insn_addr
!= addr_mask
)
4051 /* Don't emit instructions to a frag started for data, or for a
4052 CPU differing in VLE mode. Data is allowed to be misaligned,
4053 and it's possible to start a new frag in the middle of
4055 frag_wane (frag_now
);
4059 /* Check that insns within the frag are aligned. ppc_frag_check
4060 will ensure that the frag start address is aligned. */
4061 if ((frag_now_fix () & addr_mask
) != 0)
4062 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
4064 /* Differentiate between two, four, and eight byte insns. */
4066 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
4068 else if ((opcode
->flags
& PPC_OPCODE_POWER10
) != 0
4069 && PPC_PREFIX_P (insn
))
4071 struct insn_label_list
*l
;
4075 /* 8-byte prefix instructions are not allowed to cross 64-byte
4077 frag_align_code (6, 4);
4078 record_alignment (now_seg
, 6);
4080 /* Update alignment of the containing csect. */
4081 if (symbol_get_tc (ppc_current_csect
)->align
< 6)
4082 symbol_get_tc (ppc_current_csect
)->align
= 6;
4085 /* Update "dot" in any expressions used by this instruction, and
4086 a label attached to the instruction. By "attached" we mean
4087 on the same source line as the instruction and without any
4088 intervening semicolons. */
4089 dot_value
= frag_now_fix ();
4090 dot_frag
= frag_now
;
4091 for (l
= insn_labels
; l
!= NULL
; l
= l
->next
)
4093 symbol_set_frag (l
->label
, dot_frag
);
4094 S_SET_VALUE (l
->label
, dot_value
);
4098 ppc_clear_labels ();
4100 f
= frag_more (insn_length
);
4101 frag_now
->insn_addr
= addr_mask
;
4103 /* The prefix part of an 8-byte instruction always occupies the lower
4104 addressed word in a doubleword, regardless of endianness. */
4105 if (insn_length
== 8
4106 && (sizeof (insn
) > sizeof (valueT
) || !target_big_endian
))
4108 md_number_to_chars (f
, PPC_GET_PREFIX (insn
), 4);
4109 md_number_to_chars (f
+ 4, PPC_GET_SUFFIX (insn
), 4);
4112 md_number_to_chars (f
, insn
, insn_length
);
4116 last_subseg
= now_subseg
;
4119 dwarf2_emit_insn (insn_length
);
4122 /* Create any fixups. */
4123 for (i
= 0; i
< fc
; i
++)
4126 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
4129 unsigned int size
= fixup_size (fixups
[i
].reloc
, &pcrel
);
4130 int offset
= target_big_endian
? (insn_length
- size
) : 0;
4132 fixP
= fix_new_exp (frag_now
,
4133 f
- frag_now
->fr_literal
+ offset
,
4141 const struct powerpc_operand
*operand
;
4143 operand
= &powerpc_operands
[fixups
[i
].opindex
];
4144 fixP
= fix_new_exp (frag_now
,
4145 f
- frag_now
->fr_literal
,
4148 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
4151 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
4156 /* For ELF, add support for SHT_ORDERED. */
4159 ppc_section_type (char *str
, size_t len
)
4161 if (len
== 7 && startswith (str
, "ordered"))
4168 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
4170 if (type
== SHT_ORDERED
)
4171 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
4177 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
4182 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
4185 #endif /* OBJ_ELF */
4188 /* Pseudo-op handling. */
4190 /* The .byte pseudo-op. This is similar to the normal .byte
4191 pseudo-op, but it can also take a single ASCII string. */
4194 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
4198 if (*input_line_pointer
!= '\"')
4204 /* Gather characters. A real double quote is doubled. Unusual
4205 characters are not permitted. */
4206 ++input_line_pointer
;
4211 c
= *input_line_pointer
++;
4215 if (*input_line_pointer
!= '\"')
4217 ++input_line_pointer
;
4220 FRAG_APPEND_1_CHAR (c
);
4224 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
4225 as_warn (_("data in executable section"));
4226 demand_empty_rest_of_line ();
4231 /* XCOFF specific pseudo-op handling. */
4233 /* This is set if we are creating a .stabx symbol, since we don't want
4234 to handle symbol suffixes for such symbols. */
4235 static bool ppc_stab_symbol
;
4237 /* Retrieve the visiblity input for pseudo-ops having ones. */
4238 static unsigned short
4239 ppc_xcoff_get_visibility (void) {
4242 if (startswith (input_line_pointer
, "exported"))
4244 input_line_pointer
+= 8;
4245 return SYM_V_EXPORTED
;
4248 if (startswith (input_line_pointer
, "hidden"))
4250 input_line_pointer
+= 6;
4251 return SYM_V_HIDDEN
;
4254 if (startswith (input_line_pointer
, "internal"))
4256 input_line_pointer
+= 8;
4257 return SYM_V_INTERNAL
;
4260 if (startswith (input_line_pointer
, "protected"))
4262 input_line_pointer
+= 9;
4263 return SYM_V_PROTECTED
;
4269 /* Retrieve visiblity using GNU syntax. */
4270 static void ppc_GNU_visibility (int visibility
) {
4274 coff_symbol_type
*coffsym
;
4278 if ((name
= read_symbol_name ()) == NULL
)
4280 symbolP
= symbol_find_or_make (name
);
4282 coffsym
= coffsymbol (symbol_get_bfdsym (symbolP
));
4284 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4285 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4287 c
= *input_line_pointer
;
4290 input_line_pointer
++;
4294 if (*input_line_pointer
== '\n')
4300 demand_empty_rest_of_line ();
4303 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
4304 symbols in the .bss segment as though they were local common
4305 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
4306 aligns .comm and .lcomm to 4 bytes.
4307 Symbols having a XMC_UL storage class are uninialized thread-local
4311 ppc_comm (int lcomm
)
4313 asection
*current_seg
= now_seg
;
4314 subsegT current_subseg
= now_subseg
;
4320 symbolS
*lcomm_sym
= NULL
;
4323 unsigned short visibility
= 0;
4324 struct ppc_xcoff_section
*section
;
4326 endc
= get_symbol_name (&name
);
4327 end_name
= input_line_pointer
;
4328 (void) restore_line_pointer (endc
);
4330 if (*input_line_pointer
!= ',')
4332 as_bad (_("missing size"));
4333 ignore_rest_of_line ();
4336 ++input_line_pointer
;
4338 size
= get_absolute_expression ();
4341 as_bad (_("negative size"));
4342 ignore_rest_of_line ();
4348 /* The third argument to .comm is the alignment. */
4349 if (*input_line_pointer
!= ',')
4353 ++input_line_pointer
;
4354 align
= get_absolute_expression ();
4357 as_warn (_("ignoring bad alignment"));
4361 /* The fourth argument to .comm is the visibility. */
4362 if (*input_line_pointer
== ',')
4364 input_line_pointer
++;
4365 visibility
= ppc_xcoff_get_visibility ();
4368 as_bad (_("Unknown visibility field in .comm"));
4369 ignore_rest_of_line ();
4380 /* The third argument to .lcomm appears to be the real local
4381 common symbol to create. References to the symbol named in
4382 the first argument are turned into references to the third
4384 if (*input_line_pointer
!= ',')
4386 as_bad (_("missing real symbol name"));
4387 ignore_rest_of_line ();
4390 ++input_line_pointer
;
4392 lcomm_endc
= get_symbol_name (&lcomm_name
);
4394 lcomm_sym
= symbol_find_or_make (lcomm_name
);
4396 (void) restore_line_pointer (lcomm_endc
);
4398 /* The fourth argument to .lcomm is the alignment. */
4399 if (*input_line_pointer
!= ',')
4408 ++input_line_pointer
;
4409 align
= get_absolute_expression ();
4412 as_warn (_("ignoring bad alignment"));
4419 sym
= symbol_find_or_make (name
);
4422 if (S_IS_DEFINED (sym
)
4423 || S_GET_VALUE (sym
) != 0)
4425 as_bad (_("attempt to redefine symbol"));
4426 ignore_rest_of_line ();
4430 if (symbol_get_tc (sym
)->symbol_class
== XMC_UL
4431 || (lcomm
&& symbol_get_tc (lcomm_sym
)->symbol_class
== XMC_UL
))
4433 section
= &ppc_xcoff_tbss_section
;
4434 if (!ppc_xcoff_section_is_initialized (section
))
4436 ppc_init_xcoff_section (section
, subseg_new (".tbss", 0));
4437 bfd_set_section_flags (section
->segment
,
4438 SEC_ALLOC
| SEC_THREAD_LOCAL
);
4439 seg_info (section
->segment
)->bss
= 1;
4443 section
= &ppc_xcoff_bss_section
;
4445 record_alignment (section
->segment
, align
);
4448 || ! S_IS_DEFINED (lcomm_sym
))
4457 S_SET_EXTERNAL (sym
);
4461 symbol_get_tc (lcomm_sym
)->output
= 1;
4462 def_sym
= lcomm_sym
;
4466 subseg_set (section
->segment
, 1);
4467 frag_align (align
, 0, 0);
4469 symbol_set_frag (def_sym
, frag_now
);
4470 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
4471 def_size
, (char *) NULL
);
4473 S_SET_SEGMENT (def_sym
, section
->segment
);
4474 symbol_get_tc (def_sym
)->align
= align
;
4478 /* Align the size of lcomm_sym. */
4479 symbol_get_frag (lcomm_sym
)->fr_offset
=
4480 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
4481 &~ ((1 << align
) - 1));
4482 if (align
> symbol_get_tc (lcomm_sym
)->align
)
4483 symbol_get_tc (lcomm_sym
)->align
= align
;
4488 /* Make sym an offset from lcomm_sym. */
4489 S_SET_SEGMENT (sym
, section
->segment
);
4490 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
4491 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
4492 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
4495 if (!lcomm
&& visibility
)
4497 /* Add visibility to .comm symbol. */
4498 coff_symbol_type
*coffsym
= coffsymbol (symbol_get_bfdsym (sym
));
4499 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4500 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4503 subseg_set (current_seg
, current_subseg
);
4505 demand_empty_rest_of_line ();
4508 /* The .csect pseudo-op. This switches us into a different
4509 subsegment. The first argument is a symbol whose value is the
4510 start of the .csect. In COFF, csect symbols get special aux
4511 entries defined by the x_csect field of union internal_auxent. The
4512 optional second argument is the alignment (the default is 2). */
4515 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
4522 endc
= get_symbol_name (&name
);
4524 sym
= symbol_find_or_make (name
);
4526 (void) restore_line_pointer (endc
);
4528 if (S_GET_NAME (sym
)[0] == '\0')
4530 /* An unnamed csect is assumed to be [PR]. */
4531 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
4535 if (*input_line_pointer
== ',')
4537 ++input_line_pointer
;
4538 align
= get_absolute_expression ();
4541 ppc_change_csect (sym
, align
);
4543 demand_empty_rest_of_line ();
4546 /* Change to a different csect. */
4549 ppc_change_csect (symbolS
*sym
, offsetT align
)
4551 if (S_IS_DEFINED (sym
))
4552 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
4555 struct ppc_xcoff_section
*section
;
4562 /* This is a new csect. We need to look at the symbol class to
4563 figure out whether it should go in the text section or the
4567 switch (symbol_get_tc (sym
)->symbol_class
)
4577 section
= &ppc_xcoff_text_section
;
4587 section
= &ppc_xcoff_data_section
;
4588 if (ppc_toc_csect
!= NULL
4589 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4590 == section
->next_subsegment
))
4594 section
= &ppc_xcoff_bss_section
;
4597 section
= &ppc_xcoff_tdata_section
;
4598 /* Create .tdata section if not yet done. */
4599 if (!ppc_xcoff_section_is_initialized (section
))
4601 ppc_init_xcoff_section (section
, subseg_new (".tdata", 0));
4602 bfd_set_section_flags (section
->segment
, SEC_ALLOC
4603 | SEC_LOAD
| SEC_RELOC
| SEC_DATA
4604 | SEC_THREAD_LOCAL
);
4608 section
= &ppc_xcoff_tbss_section
;
4609 /* Create .tbss section if not yet done. */
4610 if (!ppc_xcoff_section_is_initialized (section
))
4612 ppc_init_xcoff_section (section
, subseg_new (".tbss", 0));
4613 bfd_set_section_flags (section
->segment
, SEC_ALLOC
|
4615 seg_info (section
->segment
)->bss
= 1;
4622 S_SET_SEGMENT (sym
, section
->segment
);
4623 symbol_get_tc (sym
)->subseg
= section
->next_subsegment
;
4624 ++section
->next_subsegment
;
4626 /* We set the obstack chunk size to a small value before
4627 changing subsegments, so that we don't use a lot of memory
4628 space for what may be a small section. */
4629 hold_chunksize
= chunksize
;
4632 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4633 symbol_get_tc (sym
)->subseg
);
4635 chunksize
= hold_chunksize
;
4638 ppc_after_toc_frag
= frag_now
;
4640 record_alignment (sec
, align
);
4642 frag_align_code (align
, 0);
4644 frag_align (align
, 0, 0);
4646 symbol_set_frag (sym
, frag_now
);
4647 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4649 symbol_get_tc (sym
)->align
= align
;
4650 symbol_get_tc (sym
)->output
= 1;
4651 symbol_get_tc (sym
)->within
= sym
;
4653 for (list
= section
->csects
;
4654 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4655 list
= symbol_get_tc (list
)->next
)
4657 symbol_get_tc (list
)->next
= sym
;
4659 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4660 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4664 ppc_current_csect
= sym
;
4668 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4672 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4674 sec
= subseg_new (dw
->xcoff_name
, subseg
);
4675 oldflags
= bfd_section_flags (sec
);
4676 if (oldflags
== SEC_NO_FLAGS
)
4678 /* Just created section. */
4679 gas_assert (dw_sections
[idx
].sect
== NULL
);
4681 bfd_set_section_flags (sec
, SEC_DEBUGGING
);
4682 bfd_set_section_alignment (sec
, 0);
4683 dw_sections
[idx
].sect
= sec
;
4686 /* Not anymore in a csect. */
4687 ppc_current_csect
= NULL
;
4690 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4691 .dwsect flag [, opt-label ]
4695 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4699 const struct xcoff_dwsect_name
*dw
;
4700 struct dw_subsection
*subseg
;
4701 struct dw_section
*dws
;
4705 flag
= get_absolute_expression ();
4707 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4708 if (xcoff_dwsect_names
[i
].flag
== flag
)
4710 dw
= &xcoff_dwsect_names
[i
];
4714 /* Parse opt-label. */
4715 if (*input_line_pointer
== ',')
4720 ++input_line_pointer
;
4722 c
= get_symbol_name (&label
);
4723 opt_label
= symbol_find_or_make (label
);
4724 (void) restore_line_pointer (c
);
4729 demand_empty_rest_of_line ();
4731 /* Return now in case of unknown subsection. */
4734 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4739 /* Find the subsection. */
4740 dws
= &dw_sections
[i
];
4742 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4744 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4745 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4747 as_bad (_("label %s was not defined in this dwarf section"),
4748 S_GET_NAME (opt_label
));
4749 subseg
= dws
->anon_subseg
;
4753 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4758 /* Switch to the subsection. */
4759 ppc_change_debug_section (i
, subseg
->subseg
);
4763 /* Create a new dw subsection. */
4764 subseg
= XCNEW (struct dw_subsection
);
4766 if (opt_label
== NULL
)
4768 /* The anonymous one. */
4770 subseg
->link
= NULL
;
4771 dws
->anon_subseg
= subseg
;
4776 if (dws
->list_subseg
!= NULL
)
4777 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4781 subseg
->link
= dws
->list_subseg
;
4782 dws
->list_subseg
= subseg
;
4783 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4786 ppc_change_debug_section (i
, subseg
->subseg
);
4790 /* Add the length field. */
4791 expressionS
*exp
= &subseg
->end_exp
;
4794 if (opt_label
!= NULL
)
4795 symbol_set_value_now (opt_label
);
4797 /* Add the length field. Note that according to the AIX assembler
4798 manual, the size of the length field is 4 for powerpc32 but
4799 12 for powerpc64. */
4802 /* Write the 64bit marker. */
4803 md_number_to_chars (frag_more (4), -1, 4);
4806 exp
->X_op
= O_subtract
;
4807 exp
->X_op_symbol
= symbol_temp_new_now ();
4808 exp
->X_add_symbol
= symbol_temp_make ();
4810 sz
= ppc_obj64
? 8 : 4;
4811 exp
->X_add_number
= -sz
;
4812 emit_expr (exp
, sz
);
4817 /* This function handles the .text and .data pseudo-ops. These
4818 pseudo-ops aren't really used by XCOFF; we implement them for the
4819 convenience of people who aren't used to XCOFF. */
4822 ppc_section (int type
)
4829 else if (type
== 'd')
4834 sym
= symbol_find_or_make (name
);
4836 ppc_change_csect (sym
, 2);
4838 demand_empty_rest_of_line ();
4841 /* This function handles the .section pseudo-op. This is mostly to
4842 give an error, since XCOFF only supports .text, .data and .bss, but
4843 we do permit the user to name the text or data section. */
4846 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4849 const char *real_name
;
4853 c
= get_symbol_name (&user_name
);
4855 if (strcmp (user_name
, ".text") == 0)
4856 real_name
= ".text[PR]";
4857 else if (strcmp (user_name
, ".data") == 0)
4858 real_name
= ".data[RW]";
4861 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4862 (void) restore_line_pointer (c
);
4863 ignore_rest_of_line ();
4867 (void) restore_line_pointer (c
);
4869 sym
= symbol_find_or_make (real_name
);
4871 ppc_change_csect (sym
, 2);
4873 demand_empty_rest_of_line ();
4876 /* The .extern pseudo-op. We create an undefined symbol. */
4879 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4884 if ((name
= read_symbol_name ()) == NULL
)
4887 sym
= symbol_find_or_make (name
);
4890 if (*input_line_pointer
== ',')
4892 unsigned short visibility
;
4893 coff_symbol_type
*coffsym
= coffsymbol (symbol_get_bfdsym (sym
));
4895 input_line_pointer
++;
4896 visibility
= ppc_xcoff_get_visibility ();
4899 as_bad (_("Unknown visibility field in .extern"));
4900 ignore_rest_of_line ();
4904 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4905 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4908 demand_empty_rest_of_line ();
4911 /* XCOFF semantic for .globl says that the second parameter is
4912 the symbol visibility. */
4915 ppc_globl (int ignore ATTRIBUTE_UNUSED
)
4920 if ((name
= read_symbol_name ()) == NULL
)
4923 sym
= symbol_find_or_make (name
);
4925 S_SET_EXTERNAL (sym
);
4927 if (*input_line_pointer
== ',')
4929 unsigned short visibility
;
4930 coff_symbol_type
*coffsym
= coffsymbol (symbol_get_bfdsym (sym
));
4932 input_line_pointer
++;
4933 visibility
= ppc_xcoff_get_visibility ();
4936 as_bad (_("Unknown visibility field in .globl"));
4937 ignore_rest_of_line ();
4941 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4942 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4945 demand_empty_rest_of_line ();
4948 /* XCOFF semantic for .weak says that the second parameter is
4949 the symbol visibility. */
4952 ppc_weak (int ignore ATTRIBUTE_UNUSED
)
4957 if ((name
= read_symbol_name ()) == NULL
)
4960 sym
= symbol_find_or_make (name
);
4964 if (*input_line_pointer
== ',')
4966 unsigned short visibility
;
4967 coff_symbol_type
*coffsym
= coffsymbol (symbol_get_bfdsym (sym
));
4969 input_line_pointer
++;
4970 visibility
= ppc_xcoff_get_visibility ();
4973 as_bad (_("Unknown visibility field in .weak"));
4974 ignore_rest_of_line ();
4978 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4979 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4982 demand_empty_rest_of_line ();
4985 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4988 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4994 endc
= get_symbol_name (&name
);
4996 sym
= symbol_find_or_make (name
);
4998 (void) restore_line_pointer (endc
);
5000 symbol_get_tc (sym
)->output
= 1;
5002 demand_empty_rest_of_line ();
5005 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
5006 relocations at the beginning of the current csect.
5008 (In principle, there's no reason why the relocations _have_ to be at
5009 the beginning. Anywhere in the csect would do. However, inserting
5010 at the beginning is what the native assembler does, and it helps to
5011 deal with cases where the .ref statements follow the section contents.)
5013 ??? .refs don't work for empty .csects. However, the native assembler
5014 doesn't report an error in this case, and neither yet do we. */
5017 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
5022 if (ppc_current_csect
== NULL
)
5024 as_bad (_(".ref outside .csect"));
5025 ignore_rest_of_line ();
5031 c
= get_symbol_name (&name
);
5033 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
5034 symbol_find_or_make (name
), 0, false, BFD_RELOC_NONE
);
5036 *input_line_pointer
= c
;
5037 SKIP_WHITESPACE_AFTER_NAME ();
5038 c
= *input_line_pointer
;
5041 input_line_pointer
++;
5043 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
5045 as_bad (_("missing symbol name"));
5046 ignore_rest_of_line ();
5053 demand_empty_rest_of_line ();
5056 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
5057 although I don't know why it bothers. */
5060 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
5067 endc
= get_symbol_name (&name
);
5069 sym
= symbol_find_or_make (name
);
5071 (void) restore_line_pointer (endc
);
5073 if (*input_line_pointer
!= ',')
5075 as_bad (_("missing rename string"));
5076 ignore_rest_of_line ();
5079 ++input_line_pointer
;
5081 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
5083 demand_empty_rest_of_line ();
5086 /* The .stabx pseudo-op. This is similar to a normal .stabs
5087 pseudo-op, but slightly different. A sample is
5088 .stabx "main:F-1",.main,142,0
5089 The first argument is the symbol name to create. The second is the
5090 value, and the third is the storage class. The fourth seems to be
5091 always zero, and I am assuming it is the type. */
5094 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
5101 name
= demand_copy_C_string (&len
);
5103 if (*input_line_pointer
!= ',')
5105 as_bad (_("missing value"));
5108 ++input_line_pointer
;
5110 ppc_stab_symbol
= true;
5111 sym
= symbol_make (name
);
5112 ppc_stab_symbol
= false;
5114 symbol_get_tc (sym
)->real_name
= name
;
5116 (void) expression (&exp
);
5123 as_bad (_("illegal .stabx expression; zero assumed"));
5124 exp
.X_add_number
= 0;
5127 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
5128 symbol_set_frag (sym
, &zero_address_frag
);
5132 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
5133 symbol_set_value_expression (sym
, &exp
);
5137 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
5138 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
5143 /* The value is some complex expression. This will probably
5144 fail at some later point, but this is probably the right
5145 thing to do here. */
5146 symbol_set_value_expression (sym
, &exp
);
5150 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5151 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5153 if (*input_line_pointer
!= ',')
5155 as_bad (_("missing class"));
5158 ++input_line_pointer
;
5160 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
5162 if (*input_line_pointer
!= ',')
5164 as_bad (_("missing type"));
5167 ++input_line_pointer
;
5169 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
5171 symbol_get_tc (sym
)->output
= 1;
5173 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
5178 .stabx "z",arrays_,133,0
5181 .comm arrays_,13768,3
5183 resolve_symbol_value will copy the exp's "within" into sym's when the
5184 offset is 0. Since this seems to be corner case problem,
5185 only do the correction for storage class C_STSYM. A better solution
5186 would be to have the tc field updated in ppc_symbol_new_hook. */
5188 if (exp
.X_op
== O_symbol
)
5190 if (ppc_current_block
== NULL
)
5191 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
5193 symbol_get_tc (sym
)->within
= ppc_current_block
;
5197 if (exp
.X_op
!= O_symbol
5198 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
5199 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
5200 ppc_frob_label (sym
);
5203 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5204 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
5205 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
5206 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5209 demand_empty_rest_of_line ();
5212 /* The .file pseudo-op. On XCOFF, .file can have several parameters
5213 which are being added to the symbol table to provide additional
5217 ppc_file (int ignore ATTRIBUTE_UNUSED
)
5219 char *sfname
, *s1
= NULL
, *s2
= NULL
, *s3
= NULL
;
5220 int length
, auxnb
= 1;
5222 /* Some assemblers tolerate immediately following '"'. */
5223 if ((sfname
= demand_copy_string (&length
)) != 0)
5225 coff_symbol_type
*coffsym
;
5226 if (*input_line_pointer
== ',')
5228 ++input_line_pointer
;
5229 s1
= demand_copy_string (&length
);
5232 if (*input_line_pointer
== ',')
5234 ++input_line_pointer
;
5235 s2
= demand_copy_string (&length
);
5238 if (*input_line_pointer
== ',')
5240 ++input_line_pointer
;
5241 s3
= demand_copy_string (&length
);
5247 /* Use coff dot_file creation and adjust auxiliary entries. */
5248 c_dot_file_symbol (sfname
);
5249 S_SET_NUMBER_AUXILIARY (symbol_rootP
, auxnb
);
5250 coffsym
= coffsymbol (symbol_get_bfdsym (symbol_rootP
));
5251 coffsym
->native
[1].u
.auxent
.x_file
.x_ftype
= XFT_FN
;
5255 coffsym
->native
[2].u
.auxent
.x_file
.x_ftype
= XFT_CT
;
5256 coffsym
->native
[2].extrap
= s1
;
5260 coffsym
->native
[3].u
.auxent
.x_file
.x_ftype
= XFT_CV
;
5261 coffsym
->native
[3].extrap
= s2
;
5265 coffsym
->native
[4].u
.auxent
.x_file
.x_ftype
= XFT_CD
;
5266 coffsym
->native
[4].extrap
= s3
;
5269 demand_empty_rest_of_line ();
5273 /* The .function pseudo-op. This takes several arguments. The first
5274 argument seems to be the external name of the symbol. The second
5275 argument seems to be the label for the start of the function. gcc
5276 uses the same name for both. I have no idea what the third and
5277 fourth arguments are meant to be. The optional fifth argument is
5278 an expression for the size of the function. In COFF this symbol
5279 gets an aux entry like that used for a csect. */
5282 ppc_function (int ignore ATTRIBUTE_UNUSED
)
5290 endc
= get_symbol_name (&name
);
5292 /* Ignore any [PR] suffix. */
5293 name
= ppc_canonicalize_symbol_name (name
);
5294 s
= strchr (name
, '[');
5295 if (s
!= (char *) NULL
5296 && strcmp (s
+ 1, "PR]") == 0)
5299 ext_sym
= symbol_find_or_make (name
);
5301 (void) restore_line_pointer (endc
);
5303 if (*input_line_pointer
!= ',')
5305 as_bad (_("missing symbol name"));
5306 ignore_rest_of_line ();
5309 ++input_line_pointer
;
5311 endc
= get_symbol_name (&name
);
5313 lab_sym
= symbol_find_or_make (name
);
5315 (void) restore_line_pointer (endc
);
5317 if (ext_sym
!= lab_sym
)
5321 exp
.X_op
= O_symbol
;
5322 exp
.X_add_symbol
= lab_sym
;
5323 exp
.X_op_symbol
= NULL
;
5324 exp
.X_add_number
= 0;
5326 symbol_set_value_expression (ext_sym
, &exp
);
5329 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
5330 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
5331 symbol_get_tc (ext_sym
)->output
= 1;
5333 if (*input_line_pointer
== ',')
5337 /* Ignore the third argument. */
5338 ++input_line_pointer
;
5340 if (*input_line_pointer
== ',')
5342 /* Ignore the fourth argument. */
5343 ++input_line_pointer
;
5345 if (*input_line_pointer
== ',')
5347 /* The fifth argument is the function size.
5348 If it's omitted, the size will be the containing csect.
5349 This will be donce during ppc_frob_symtab. */
5350 ++input_line_pointer
;
5351 symbol_get_tc (ext_sym
)->u
.size
5352 = symbol_new ("L0\001", absolute_section
,
5353 &zero_address_frag
, 0);
5354 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
5359 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5360 SF_SET_FUNCTION (ext_sym
);
5361 SF_SET_PROCESS (ext_sym
);
5362 coff_add_linesym (ext_sym
);
5364 demand_empty_rest_of_line ();
5367 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
5368 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
5369 with the correct line number */
5371 static symbolS
*saved_bi_sym
= 0;
5374 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
5378 sym
= symbol_make (".bf");
5379 S_SET_SEGMENT (sym
, text_section
);
5380 symbol_set_frag (sym
, frag_now
);
5381 S_SET_VALUE (sym
, frag_now_fix ());
5382 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5384 coff_line_base
= get_absolute_expression ();
5386 S_SET_NUMBER_AUXILIARY (sym
, 1);
5387 SA_SET_SYM_LNNO (sym
, coff_line_base
);
5389 /* Line number for bi. */
5392 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
5397 symbol_get_tc (sym
)->output
= 1;
5399 ppc_frob_label (sym
);
5401 demand_empty_rest_of_line ();
5404 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
5405 ".ef", except that the line number is absolute, not relative to the
5406 most recent ".bf" symbol. */
5409 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
5413 sym
= symbol_make (".ef");
5414 S_SET_SEGMENT (sym
, text_section
);
5415 symbol_set_frag (sym
, frag_now
);
5416 S_SET_VALUE (sym
, frag_now_fix ());
5417 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5418 S_SET_NUMBER_AUXILIARY (sym
, 1);
5419 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5420 symbol_get_tc (sym
)->output
= 1;
5422 ppc_frob_label (sym
);
5424 demand_empty_rest_of_line ();
5427 /* The .bi and .ei pseudo-ops. These take a string argument and
5428 generates a C_BINCL or C_EINCL symbol, which goes at the start of
5429 the symbol list. The value of .bi will be know when the next .bf
5435 static symbolS
*last_biei
;
5442 name
= demand_copy_C_string (&len
);
5444 /* The value of these symbols is actually file offset. Here we set
5445 the value to the index into the line number entries. In
5446 ppc_frob_symbols we set the fix_line field, which will cause BFD
5447 to do the right thing. */
5449 sym
= symbol_make (name
);
5450 /* obj-coff.c currently only handles line numbers correctly in the
5452 S_SET_SEGMENT (sym
, text_section
);
5453 S_SET_VALUE (sym
, coff_n_line_nos
);
5454 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5456 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
5457 symbol_get_tc (sym
)->output
= 1;
5465 for (look
= last_biei
? last_biei
: symbol_rootP
;
5466 (look
!= (symbolS
*) NULL
5467 && (S_GET_STORAGE_CLASS (look
) == C_FILE
5468 || S_GET_STORAGE_CLASS (look
) == C_BINCL
5469 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
5470 look
= symbol_next (look
))
5472 if (look
!= (symbolS
*) NULL
)
5474 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5475 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
5479 demand_empty_rest_of_line ();
5482 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
5483 There is one argument, which is a csect symbol. The value of the
5484 .bs symbol is the index of this csect symbol. */
5487 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
5494 if (ppc_current_block
!= NULL
)
5495 as_bad (_("nested .bs blocks"));
5497 endc
= get_symbol_name (&name
);
5499 csect
= symbol_find_or_make (name
);
5501 (void) restore_line_pointer (endc
);
5503 sym
= symbol_make (".bs");
5504 S_SET_SEGMENT (sym
, now_seg
);
5505 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
5506 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5507 symbol_get_tc (sym
)->output
= 1;
5509 symbol_get_tc (sym
)->within
= csect
;
5511 ppc_frob_label (sym
);
5513 ppc_current_block
= sym
;
5515 demand_empty_rest_of_line ();
5518 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
5521 ppc_es (int ignore ATTRIBUTE_UNUSED
)
5525 if (ppc_current_block
== NULL
)
5526 as_bad (_(".es without preceding .bs"));
5528 sym
= symbol_make (".es");
5529 S_SET_SEGMENT (sym
, now_seg
);
5530 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
5531 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5532 symbol_get_tc (sym
)->output
= 1;
5534 ppc_frob_label (sym
);
5536 ppc_current_block
= NULL
;
5538 demand_empty_rest_of_line ();
5541 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
5545 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
5549 sym
= symbol_make (".bb");
5550 S_SET_SEGMENT (sym
, text_section
);
5551 symbol_set_frag (sym
, frag_now
);
5552 S_SET_VALUE (sym
, frag_now_fix ());
5553 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5555 S_SET_NUMBER_AUXILIARY (sym
, 1);
5556 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5558 symbol_get_tc (sym
)->output
= 1;
5560 SF_SET_PROCESS (sym
);
5562 ppc_frob_label (sym
);
5564 demand_empty_rest_of_line ();
5567 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
5571 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
5575 sym
= symbol_make (".eb");
5576 S_SET_SEGMENT (sym
, text_section
);
5577 symbol_set_frag (sym
, frag_now
);
5578 S_SET_VALUE (sym
, frag_now_fix ());
5579 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5580 S_SET_NUMBER_AUXILIARY (sym
, 1);
5581 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5582 symbol_get_tc (sym
)->output
= 1;
5584 SF_SET_PROCESS (sym
);
5586 ppc_frob_label (sym
);
5588 demand_empty_rest_of_line ();
5591 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
5595 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
5601 name
= demand_copy_C_string (&len
);
5602 sym
= symbol_make (name
);
5603 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5604 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5605 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
5606 S_SET_VALUE (sym
, 0);
5607 symbol_get_tc (sym
)->output
= 1;
5609 ppc_frob_label (sym
);
5611 demand_empty_rest_of_line ();
5614 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
5617 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
5621 sym
= symbol_make (".ec");
5622 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5623 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5624 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
5625 S_SET_VALUE (sym
, 0);
5626 symbol_get_tc (sym
)->output
= 1;
5628 ppc_frob_label (sym
);
5630 demand_empty_rest_of_line ();
5633 /* The .toc pseudo-op. Switch to the .toc subsegment. */
5636 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
5638 if (ppc_toc_csect
!= (symbolS
*) NULL
)
5639 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
5646 subseg
= ppc_xcoff_data_section
.next_subsegment
;
5647 ++ppc_xcoff_data_section
.next_subsegment
;
5649 subseg_new (segment_name (data_section
), subseg
);
5650 ppc_toc_frag
= frag_now
;
5652 sym
= symbol_find_or_make ("TOC[TC0]");
5653 symbol_set_frag (sym
, frag_now
);
5654 S_SET_SEGMENT (sym
, data_section
);
5655 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5656 symbol_get_tc (sym
)->subseg
= subseg
;
5657 symbol_get_tc (sym
)->output
= 1;
5658 symbol_get_tc (sym
)->within
= sym
;
5660 ppc_toc_csect
= sym
;
5662 for (list
= ppc_xcoff_data_section
.csects
;
5663 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
5664 list
= symbol_get_tc (list
)->next
)
5666 symbol_get_tc (list
)->next
= sym
;
5668 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5669 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
5673 ppc_current_csect
= ppc_toc_csect
;
5675 demand_empty_rest_of_line ();
5678 /* The AIX assembler automatically aligns the operands of a .long or
5679 .short pseudo-op, and we want to be compatible. */
5682 ppc_xcoff_cons (int log_size
)
5684 frag_align (log_size
, 0, 0);
5685 record_alignment (now_seg
, log_size
);
5686 cons (1 << log_size
);
5690 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
5695 (void) expression (&exp
);
5697 if (exp
.X_op
!= O_constant
)
5699 as_bad (_("non-constant byte count"));
5703 byte_count
= exp
.X_add_number
;
5705 if (*input_line_pointer
!= ',')
5707 as_bad (_("missing value"));
5711 ++input_line_pointer
;
5716 ppc_xcoff_md_finish (void)
5720 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
5722 struct dw_section
*dws
= &dw_sections
[i
];
5723 struct dw_subsection
*dwss
;
5725 if (dws
->anon_subseg
)
5727 dwss
= dws
->anon_subseg
;
5728 dwss
->link
= dws
->list_subseg
;
5731 dwss
= dws
->list_subseg
;
5733 for (; dwss
!= NULL
; dwss
= dwss
->link
)
5734 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
5736 subseg_set (dws
->sect
, dwss
->subseg
);
5737 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
5743 #endif /* OBJ_XCOFF */
5744 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5746 /* The .tc pseudo-op. This is used when generating either XCOFF or
5747 ELF. This takes two or more arguments.
5749 When generating XCOFF output, the first argument is the name to
5750 give to this location in the toc; this will be a symbol with class
5751 TC. The rest of the arguments are N-byte values to actually put at
5752 this location in the TOC; often there is just one more argument, a
5753 relocatable symbol reference. The size of the value to store
5754 depends on target word size. A 32-bit target uses 4-byte values, a
5755 64-bit target uses 8-byte values.
5757 When not generating XCOFF output, the arguments are the same, but
5758 the first argument is simply ignored. */
5761 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5765 /* Define the TOC symbol name. */
5771 if (ppc_toc_csect
== (symbolS
*) NULL
5772 || ppc_toc_csect
!= ppc_current_csect
)
5774 as_bad (_(".tc not in .toc section"));
5775 ignore_rest_of_line ();
5779 endc
= get_symbol_name (&name
);
5781 sym
= symbol_find_or_make (name
);
5783 (void) restore_line_pointer (endc
);
5785 if (S_IS_DEFINED (sym
))
5789 label
= symbol_get_tc (ppc_current_csect
)->within
;
5790 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5792 as_bad (_(".tc with no label"));
5793 ignore_rest_of_line ();
5797 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5798 symbol_set_frag (label
, symbol_get_frag (sym
));
5799 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5801 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5802 ++input_line_pointer
;
5807 S_SET_SEGMENT (sym
, now_seg
);
5808 symbol_set_frag (sym
, frag_now
);
5809 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5811 /* AIX assembler seems to allow any storage class to be set in .tc.
5812 But for now, only XMC_TC and XMC_TE are supported by us. */
5813 switch (symbol_get_tc (sym
)->symbol_class
)
5820 as_bad (_(".tc with storage class %d not yet supported"),
5821 symbol_get_tc (sym
)->symbol_class
);
5822 ignore_rest_of_line ();
5825 symbol_get_tc (sym
)->output
= 1;
5827 ppc_frob_label (sym
);
5830 #endif /* OBJ_XCOFF */
5834 /* Skip the TOC symbol name. */
5835 while (is_part_of_name (*input_line_pointer
)
5836 || *input_line_pointer
== ' '
5837 || *input_line_pointer
== '['
5838 || *input_line_pointer
== ']'
5839 || *input_line_pointer
== '{'
5840 || *input_line_pointer
== '}')
5841 ++input_line_pointer
;
5843 /* Align to a four/eight byte boundary. */
5844 align
= ppc_obj64
? 3 : 2;
5845 frag_align (align
, 0, 0);
5846 record_alignment (now_seg
, align
);
5847 #endif /* OBJ_ELF */
5849 if (*input_line_pointer
!= ',')
5850 demand_empty_rest_of_line ();
5853 ++input_line_pointer
;
5854 cons (ppc_obj64
? 8 : 4);
5858 /* Pseudo-op .machine. */
5861 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5865 #define MAX_HISTORY 100
5866 static ppc_cpu_t
*cpu_history
;
5867 static int curr_hist
;
5871 c
= get_symbol_name (&cpu_string
);
5872 cpu_string
= xstrdup (cpu_string
);
5873 (void) restore_line_pointer (c
);
5875 if (cpu_string
!= NULL
)
5877 ppc_cpu_t old_cpu
= ppc_cpu
;
5880 for (p
= cpu_string
; *p
!= 0; p
++)
5883 if (strcmp (cpu_string
, "push") == 0)
5885 if (cpu_history
== NULL
)
5886 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5888 if (curr_hist
>= MAX_HISTORY
)
5889 as_bad (_(".machine stack overflow"));
5891 cpu_history
[curr_hist
++] = ppc_cpu
;
5893 else if (strcmp (cpu_string
, "pop") == 0)
5896 as_bad (_(".machine stack underflow"));
5898 ppc_cpu
= cpu_history
[--curr_hist
];
5903 /* Not using the global "sticky" variable here results in
5904 none of the extra functional unit command line options,
5905 -many, -maltivec, -mspe, -mspe2, -mvle, -mvsx, being in
5906 force after selecting a new cpu with .machine.
5907 ".machine altivec" and other extra functional unit
5908 options do not count as a new machine, instead they add
5909 to currently selected opcodes. */
5910 ppc_cpu_t machine_sticky
= 0;
5911 /* Unfortunately, some versions of gcc emit a .machine
5912 directive very near the start of the compiler's assembly
5913 output file. This is bad because it overrides user -Wa
5914 cpu selection. Worse, there are versions of gcc that
5915 emit the *wrong* cpu, not even respecting the -mcpu given
5916 to gcc. See gcc pr101393. And to compound the problem,
5917 as of 20220222 gcc doesn't pass the correct cpu option to
5918 gas on the command line. See gcc pr59828. Hack around
5919 this by keeping sticky options for an early .machine. */
5921 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
5923 segment_info_type
*info
= seg_info (sec
);
5924 /* Are the frags for this section perturbed from their
5925 initial state? Even .align will count here. */
5927 && (info
->frchainP
->frch_root
!= info
->frchainP
->frch_last
5928 || info
->frchainP
->frch_root
->fr_type
!= rs_fill
5929 || info
->frchainP
->frch_root
->fr_fix
!= 0))
5932 new_cpu
= ppc_parse_cpu (ppc_cpu
,
5933 sec
== NULL
? &sticky
: &machine_sticky
,
5938 as_bad (_("invalid machine `%s'"), cpu_string
);
5941 if (ppc_cpu
!= old_cpu
)
5942 ppc_setup_opcodes ();
5945 demand_empty_rest_of_line ();
5947 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5951 /* XCOFF specific symbol and file handling. */
5953 /* Canonicalize the symbol name. We use the to force the suffix, if
5954 any, to use square brackets, and to be in upper case. */
5957 ppc_canonicalize_symbol_name (char *name
)
5961 if (ppc_stab_symbol
)
5964 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
5978 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
5981 if (*s
== '\0' || s
[1] != '\0')
5982 as_bad (_("bad symbol suffix"));
5990 /* Set the class of a symbol based on the suffix, if any. This is
5991 called whenever a new symbol is created. */
5994 ppc_symbol_new_hook (symbolS
*sym
)
5996 struct ppc_tc_sy
*tc
;
5999 tc
= symbol_get_tc (sym
);
6002 tc
->symbol_class
= -1;
6003 tc
->real_name
= NULL
;
6010 if (ppc_stab_symbol
)
6013 s
= strchr (S_GET_NAME (sym
), '[');
6014 if (s
== (const char *) NULL
)
6016 /* There is no suffix. */
6025 if (strcmp (s
, "BS]") == 0)
6026 tc
->symbol_class
= XMC_BS
;
6029 if (strcmp (s
, "DB]") == 0)
6030 tc
->symbol_class
= XMC_DB
;
6031 else if (strcmp (s
, "DS]") == 0)
6032 tc
->symbol_class
= XMC_DS
;
6035 if (strcmp (s
, "GL]") == 0)
6036 tc
->symbol_class
= XMC_GL
;
6039 if (strcmp (s
, "PR]") == 0)
6040 tc
->symbol_class
= XMC_PR
;
6043 if (strcmp (s
, "RO]") == 0)
6044 tc
->symbol_class
= XMC_RO
;
6045 else if (strcmp (s
, "RW]") == 0)
6046 tc
->symbol_class
= XMC_RW
;
6049 if (strcmp (s
, "SV]") == 0)
6050 tc
->symbol_class
= XMC_SV
;
6053 if (strcmp (s
, "TC]") == 0)
6054 tc
->symbol_class
= XMC_TC
;
6055 else if (strcmp (s
, "TI]") == 0)
6056 tc
->symbol_class
= XMC_TI
;
6057 else if (strcmp (s
, "TB]") == 0)
6058 tc
->symbol_class
= XMC_TB
;
6059 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
6060 tc
->symbol_class
= XMC_TC0
;
6061 else if (strcmp (s
, "TE]") == 0)
6062 tc
->symbol_class
= XMC_TE
;
6063 else if (strcmp (s
, "TL]") == 0)
6064 tc
->symbol_class
= XMC_TL
;
6067 if (strcmp (s
, "UA]") == 0)
6068 tc
->symbol_class
= XMC_UA
;
6069 else if (strcmp (s
, "UC]") == 0)
6070 tc
->symbol_class
= XMC_UC
;
6071 else if (strcmp (s
, "UL]") == 0)
6072 tc
->symbol_class
= XMC_UL
;
6075 if (strcmp (s
, "XO]") == 0)
6076 tc
->symbol_class
= XMC_XO
;
6080 if (tc
->symbol_class
== -1)
6081 as_bad (_("unrecognized symbol suffix"));
6084 /* This variable is set by ppc_frob_symbol if any absolute symbols are
6085 seen. It tells ppc_adjust_symtab whether it needs to look through
6088 static bool ppc_saw_abs
;
6090 /* Change the name of a symbol just before writing it out. Set the
6091 real name if the .rename pseudo-op was used. Otherwise, remove any
6092 class suffix. Return 1 if the symbol should not be included in the
6096 ppc_frob_symbol (symbolS
*sym
)
6098 static symbolS
*ppc_last_function
;
6099 static symbolS
*set_end
;
6101 /* Discard symbols that should not be included in the output symbol
6103 if (! symbol_used_in_reloc_p (sym
)
6104 && S_GET_STORAGE_CLASS (sym
) != C_DWARF
6105 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
6106 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6107 && ! symbol_get_tc (sym
)->output
6108 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
6111 /* This one will disappear anyway. Don't make a csect sym for it. */
6112 if (sym
== abs_section_sym
)
6115 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
6116 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
6122 name
= S_GET_NAME (sym
);
6123 s
= strchr (name
, '[');
6124 if (s
!= (char *) NULL
)
6130 snew
= xstrndup (name
, len
);
6132 S_SET_NAME (sym
, snew
);
6136 if (set_end
!= (symbolS
*) NULL
)
6138 SA_SET_SYM_ENDNDX (set_end
, sym
);
6142 if (SF_GET_FUNCTION (sym
))
6144 /* Make sure coff_last_function is reset. Otherwise, we won't create
6145 the auxent for the next function. */
6146 coff_last_function
= 0;
6147 ppc_last_function
= sym
;
6148 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
6150 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
6151 SA_SET_SYM_FSIZE (sym
,
6152 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
6156 /* Size of containing csect. */
6157 symbolS
* within
= symbol_get_tc (sym
)->within
;
6158 union internal_auxent
*csectaux
;
6159 csectaux
= &coffsymbol (symbol_get_bfdsym (within
))
6160 ->native
[S_GET_NUMBER_AUXILIARY(within
)].u
.auxent
;
6162 SA_SET_SYM_FSIZE (sym
, csectaux
->x_csect
.x_scnlen
.l
);
6165 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
6166 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
6168 if (ppc_last_function
== (symbolS
*) NULL
)
6169 as_bad (_(".ef with no preceding .function"));
6172 set_end
= ppc_last_function
;
6173 ppc_last_function
= NULL
;
6175 /* We don't have a C_EFCN symbol, but we need to force the
6176 COFF backend to believe that it has seen one. */
6177 coff_last_function
= NULL
;
6181 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6182 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
6183 && S_GET_STORAGE_CLASS (sym
) != C_FILE
6184 && S_GET_STORAGE_CLASS (sym
) != C_FCN
6185 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
6186 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
6187 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
6188 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
6189 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
6190 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
6191 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
6193 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
6194 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
6195 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
6198 union internal_auxent
*a
;
6200 /* Create a csect aux. */
6201 i
= S_GET_NUMBER_AUXILIARY (sym
);
6202 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
6203 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
6204 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
6206 /* This is the TOC table. */
6207 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
6208 a
->x_csect
.x_scnlen
.l
= 0;
6209 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6211 else if (symbol_get_tc (sym
)->subseg
!= 0)
6213 /* This is a csect symbol. x_scnlen is the size of the
6215 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
6216 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (S_GET_SEGMENT (sym
))
6217 - S_GET_VALUE (sym
));
6220 resolve_symbol_value (symbol_get_tc (sym
)->next
);
6221 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
6222 - S_GET_VALUE (sym
));
6224 if (symbol_get_tc (sym
)->symbol_class
== XMC_BS
6225 || symbol_get_tc (sym
)->symbol_class
== XMC_UL
)
6226 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6228 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
6230 else if (S_GET_SEGMENT (sym
) == bss_section
6231 || S_GET_SEGMENT (sym
) == ppc_xcoff_tbss_section
.segment
)
6233 /* This is a common symbol. */
6234 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6235 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6236 if (S_GET_SEGMENT (sym
) == ppc_xcoff_tbss_section
.segment
)
6237 symbol_get_tc (sym
)->symbol_class
= XMC_UL
;
6238 else if (S_IS_EXTERNAL (sym
))
6239 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6241 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6243 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6245 /* This is an absolute symbol. The csect will be created by
6246 ppc_adjust_symtab. */
6248 a
->x_csect
.x_smtyp
= XTY_LD
;
6249 if (symbol_get_tc (sym
)->symbol_class
== -1)
6250 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6252 else if (! S_IS_DEFINED (sym
))
6254 /* This is an external symbol. */
6255 a
->x_csect
.x_scnlen
.l
= 0;
6256 a
->x_csect
.x_smtyp
= XTY_ER
;
6258 else if (ppc_is_toc_sym (sym
))
6262 /* This is a TOC definition. x_scnlen is the size of the
6264 next
= symbol_next (sym
);
6265 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6266 next
= symbol_next (next
);
6267 if (next
== (symbolS
*) NULL
6268 || (!ppc_is_toc_sym (next
)))
6270 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6271 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (data_section
)
6272 - S_GET_VALUE (sym
));
6274 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6275 - S_GET_VALUE (sym
));
6279 resolve_symbol_value (next
);
6280 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6281 - S_GET_VALUE (sym
));
6283 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6289 /* This is a normal symbol definition. x_scnlen is the
6290 symbol index of the containing csect. */
6291 if (S_GET_SEGMENT (sym
) == text_section
)
6292 csect
= ppc_xcoff_text_section
.csects
;
6293 else if (S_GET_SEGMENT (sym
) == data_section
)
6294 csect
= ppc_xcoff_data_section
.csects
;
6295 else if (S_GET_SEGMENT (sym
) == ppc_xcoff_tdata_section
.segment
)
6296 csect
= ppc_xcoff_tdata_section
.csects
;
6300 /* Skip the initial dummy symbol. */
6301 csect
= symbol_get_tc (csect
)->next
;
6303 if (csect
== (symbolS
*) NULL
)
6305 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6306 a
->x_csect
.x_scnlen
.l
= 0;
6310 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6312 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6313 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6314 > S_GET_VALUE (sym
))
6316 csect
= symbol_get_tc (csect
)->next
;
6319 a
->x_csect
.x_scnlen
.p
=
6320 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6321 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6324 a
->x_csect
.x_smtyp
= XTY_LD
;
6327 a
->x_csect
.x_parmhash
= 0;
6328 a
->x_csect
.x_snhash
= 0;
6329 if (symbol_get_tc (sym
)->symbol_class
== -1)
6330 a
->x_csect
.x_smclas
= XMC_PR
;
6332 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6333 a
->x_csect
.x_stab
= 0;
6334 a
->x_csect
.x_snstab
= 0;
6336 /* Don't let the COFF backend resort these symbols. */
6337 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6339 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6341 /* We want the value to be the symbol index of the referenced
6342 csect symbol. BFD will do that for us if we set the right
6344 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6345 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6347 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6348 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6350 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6355 block
= symbol_get_tc (sym
)->within
;
6358 /* The value is the offset from the enclosing csect. */
6361 csect
= symbol_get_tc (block
)->within
;
6362 resolve_symbol_value (csect
);
6363 base
= S_GET_VALUE (csect
);
6368 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6370 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6371 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6373 /* We want the value to be a file offset into the line numbers.
6374 BFD will do that for us if we set the right flags. We have
6375 already set the value correctly. */
6376 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6382 /* Adjust the symbol table. */
6385 ppc_adjust_symtab (void)
6390 /* Make sure C_DWARF symbols come right after C_FILE.
6391 As the C_FILE might not be defined yet and as C_DWARF
6392 might already be ordered, we insert them before the
6393 first symbol which isn't a C_FILE or a C_DWARF. */
6394 for (anchorSym
= symbol_rootP
; anchorSym
!= NULL
;
6395 anchorSym
= symbol_next (anchorSym
))
6397 if (S_GET_STORAGE_CLASS (anchorSym
) != C_FILE
6398 && S_GET_STORAGE_CLASS (anchorSym
) != C_DWARF
)
6405 if (S_GET_STORAGE_CLASS (sym
) != C_DWARF
)
6407 sym
= symbol_next (sym
);
6411 symbolS
* tsym
= sym
;
6412 sym
= symbol_next (sym
);
6414 symbol_remove (tsym
, &symbol_rootP
, &symbol_lastP
);
6415 symbol_insert (tsym
, anchorSym
, &symbol_rootP
, &symbol_lastP
);
6418 /* Create csect symbols for all absolute symbols. */
6423 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6427 union internal_auxent
*a
;
6429 if (S_GET_SEGMENT (sym
) != absolute_section
)
6432 csect
= symbol_create (".abs[XO]", absolute_section
,
6433 &zero_address_frag
, S_GET_VALUE (sym
));
6434 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6435 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6436 i
= S_GET_NUMBER_AUXILIARY (csect
);
6437 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6438 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6439 a
->x_csect
.x_scnlen
.l
= 0;
6440 a
->x_csect
.x_smtyp
= XTY_SD
;
6441 a
->x_csect
.x_parmhash
= 0;
6442 a
->x_csect
.x_snhash
= 0;
6443 a
->x_csect
.x_smclas
= XMC_XO
;
6444 a
->x_csect
.x_stab
= 0;
6445 a
->x_csect
.x_snstab
= 0;
6447 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6449 i
= S_GET_NUMBER_AUXILIARY (sym
);
6450 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6451 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6452 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6455 ppc_saw_abs
= false;
6458 /* Set the VMA for a section. This is called on all the sections in
6462 ppc_frob_section (asection
*sec
)
6464 static bfd_vma vma
= 0;
6466 /* Dwarf sections start at 0. */
6467 if (bfd_section_flags (sec
) & SEC_DEBUGGING
)
6470 vma
= md_section_align (sec
, vma
);
6471 bfd_set_section_vma (sec
, vma
);
6472 vma
+= bfd_section_size (sec
);
6475 #endif /* OBJ_XCOFF */
6478 md_atof (int type
, char *litp
, int *sizep
)
6480 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6483 /* Write a value out to the object file, using the appropriate
6487 md_number_to_chars (char *buf
, valueT val
, int n
)
6489 if (target_big_endian
)
6490 number_to_chars_bigendian (buf
, val
, n
);
6492 number_to_chars_littleendian (buf
, val
, n
);
6495 /* Align a section (I don't know why this is machine dependent). */
6498 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6503 int align
= bfd_section_alignment (seg
);
6505 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6509 /* We don't have any form of relaxing. */
6512 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6513 asection
*seg ATTRIBUTE_UNUSED
)
6519 /* Convert a machine dependent frag. We never generate these. */
6522 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6523 asection
*sec ATTRIBUTE_UNUSED
,
6524 fragS
*fragp ATTRIBUTE_UNUSED
)
6529 /* We have no need to default values of symbols. */
6532 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6537 /* Functions concerning relocs. */
6539 /* The location from which a PC relative jump should be calculated,
6540 given a PC relative reloc. */
6543 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6545 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6550 /* Return the surrending csect for sym when possible. */
6553 ppc_get_csect_to_adjust (symbolS
*sym
)
6558 valueT val
= resolve_symbol_value (sym
);
6559 TC_SYMFIELD_TYPE
*tc
= symbol_get_tc (sym
);
6560 segT symseg
= S_GET_SEGMENT (sym
);
6563 && tc
->symbol_class
!= XMC_TC0
6564 && tc
->symbol_class
!= XMC_TC
6565 && tc
->symbol_class
!= XMC_TE
6566 && symseg
!= bss_section
6567 && symseg
!= ppc_xcoff_tbss_section
.segment
6568 /* Don't adjust if this is a reloc in the toc section. */
6569 && (symseg
!= data_section
6570 || ppc_toc_csect
== NULL
6571 || val
< ppc_toc_frag
->fr_address
6572 || (ppc_after_toc_frag
!= NULL
6573 && val
>= ppc_after_toc_frag
->fr_address
)))
6575 symbolS
* csect
= tc
->within
;
6577 /* If the symbol was not declared by a label (eg: a section symbol),
6578 use the section instead of the csect. This doesn't happen in
6579 normal AIX assembly code. */
6581 csect
= seg_info (symseg
)->sym
;
6589 /* This is called to see whether a fixup should be adjusted to use a
6590 section symbol. We take the opportunity to change a fixup against
6591 a symbol in the TOC subsegment into a reloc against the
6592 corresponding .tc symbol. */
6595 ppc_fix_adjustable (fixS
*fix
)
6597 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6598 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6601 if (symseg
== absolute_section
)
6604 /* Always adjust symbols in debugging sections. */
6605 if (bfd_section_flags (symseg
) & SEC_DEBUGGING
)
6608 if (ppc_toc_csect
!= (symbolS
*) NULL
6609 && fix
->fx_addsy
!= ppc_toc_csect
6610 && symseg
== data_section
6611 && val
>= ppc_toc_frag
->fr_address
6612 && (ppc_after_toc_frag
== (fragS
*) NULL
6613 || val
< ppc_after_toc_frag
->fr_address
))
6617 for (sy
= symbol_next (ppc_toc_csect
);
6618 sy
!= (symbolS
*) NULL
;
6619 sy
= symbol_next (sy
))
6621 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6623 if (sy_tc
->symbol_class
== XMC_TC0
)
6625 if (sy_tc
->symbol_class
!= XMC_TC
6626 && sy_tc
->symbol_class
!= XMC_TE
)
6628 if (val
== resolve_symbol_value (sy
))
6631 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6636 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6637 _("symbol in .toc does not match any .tc"));
6640 /* Possibly adjust the reloc to be against the csect. */
6641 if ((csect
= ppc_get_csect_to_adjust (fix
->fx_addsy
)) != NULL
)
6643 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6644 fix
->fx_addsy
= csect
;
6647 if ((csect
= ppc_get_csect_to_adjust (fix
->fx_subsy
)) != NULL
)
6649 fix
->fx_offset
-= resolve_symbol_value (fix
->fx_subsy
)
6650 - symbol_get_frag (csect
)->fr_address
;
6651 fix
->fx_subsy
= csect
;
6654 /* Adjust a reloc against a .lcomm symbol to be against the base
6656 if (symseg
== bss_section
6657 && ! S_IS_EXTERNAL (fix
->fx_addsy
)
6658 && symbol_get_tc (fix
->fx_addsy
)->subseg
== 0)
6660 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6662 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6669 /* A reloc from one csect to another must be kept. The assembler
6670 will, of course, keep relocs between sections, and it will keep
6671 absolute relocs, but we need to force it to keep PC relative relocs
6672 between two csects in the same section. */
6675 ppc_force_relocation (fixS
*fix
)
6677 /* At this point fix->fx_addsy should already have been converted to
6678 a csect symbol. If the csect does not include the fragment, then
6679 we need to force the relocation. */
6681 && fix
->fx_addsy
!= NULL
6682 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6683 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6684 > fix
->fx_frag
->fr_address
)
6685 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6686 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6687 <= fix
->fx_frag
->fr_address
))))
6690 return generic_force_reloc (fix
);
6692 #endif /* OBJ_XCOFF */
6695 /* If this function returns non-zero, it guarantees that a relocation
6696 will be emitted for a fixup. */
6699 ppc_force_relocation (fixS
*fix
)
6701 switch (fix
->fx_r_type
)
6703 case BFD_RELOC_PPC_B16_BRTAKEN
:
6704 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6705 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6706 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6707 case BFD_RELOC_24_PLT_PCREL
:
6708 case BFD_RELOC_PPC64_TOC
:
6709 case BFD_RELOC_16_GOTOFF
:
6710 case BFD_RELOC_LO16_GOTOFF
:
6711 case BFD_RELOC_HI16_GOTOFF
:
6712 case BFD_RELOC_HI16_S_GOTOFF
:
6713 case BFD_RELOC_LO16_PLTOFF
:
6714 case BFD_RELOC_HI16_PLTOFF
:
6715 case BFD_RELOC_HI16_S_PLTOFF
:
6716 case BFD_RELOC_GPREL16
:
6717 case BFD_RELOC_16_BASEREL
:
6718 case BFD_RELOC_LO16_BASEREL
:
6719 case BFD_RELOC_HI16_BASEREL
:
6720 case BFD_RELOC_HI16_S_BASEREL
:
6721 case BFD_RELOC_PPC_TOC16
:
6722 case BFD_RELOC_PPC64_TOC16_LO
:
6723 case BFD_RELOC_PPC64_TOC16_HI
:
6724 case BFD_RELOC_PPC64_TOC16_HA
:
6725 case BFD_RELOC_PPC64_PLTGOT16
:
6726 case BFD_RELOC_PPC64_PLTGOT16_LO
:
6727 case BFD_RELOC_PPC64_PLTGOT16_HI
:
6728 case BFD_RELOC_PPC64_PLTGOT16_HA
:
6729 case BFD_RELOC_PPC64_GOT16_DS
:
6730 case BFD_RELOC_PPC64_GOT16_LO_DS
:
6731 case BFD_RELOC_PPC64_PLT16_LO_DS
:
6732 case BFD_RELOC_PPC64_SECTOFF_DS
:
6733 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
6734 case BFD_RELOC_PPC64_TOC16_DS
:
6735 case BFD_RELOC_PPC64_TOC16_LO_DS
:
6736 case BFD_RELOC_PPC64_PLTGOT16_DS
:
6737 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
6738 case BFD_RELOC_PPC_EMB_NADDR16
:
6739 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
6740 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
6741 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
6742 case BFD_RELOC_PPC_EMB_SDAI16
:
6743 case BFD_RELOC_PPC_EMB_SDA2I16
:
6744 case BFD_RELOC_PPC_EMB_SDA2REL
:
6745 case BFD_RELOC_PPC_EMB_SDA21
:
6746 case BFD_RELOC_PPC_EMB_MRKREF
:
6747 case BFD_RELOC_PPC_EMB_RELSEC16
:
6748 case BFD_RELOC_PPC_EMB_RELST_LO
:
6749 case BFD_RELOC_PPC_EMB_RELST_HI
:
6750 case BFD_RELOC_PPC_EMB_RELST_HA
:
6751 case BFD_RELOC_PPC_EMB_BIT_FLD
:
6752 case BFD_RELOC_PPC_EMB_RELSDA
:
6753 case BFD_RELOC_PPC_VLE_SDA21
:
6754 case BFD_RELOC_PPC_VLE_SDA21_LO
:
6755 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
6756 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
6757 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
6758 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
6759 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
6760 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
6761 case BFD_RELOC_PPC64_PLT_PCREL34
:
6762 case BFD_RELOC_PPC64_GOT_PCREL34
:
6764 case BFD_RELOC_PPC_B26
:
6765 case BFD_RELOC_PPC_BA26
:
6766 case BFD_RELOC_PPC_B16
:
6767 case BFD_RELOC_PPC_BA16
:
6768 case BFD_RELOC_PPC64_REL24_NOTOC
:
6769 case BFD_RELOC_PPC64_REL24_P9NOTOC
:
6770 /* All branch fixups targeting a localentry symbol must
6771 force a relocation. */
6774 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6775 elf_symbol_type
*elfsym
= elf_symbol_from (bfdsym
);
6776 gas_assert (elfsym
);
6777 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6785 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6786 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
)
6789 return generic_force_reloc (fix
);
6793 ppc_fix_adjustable (fixS
*fix
)
6795 switch (fix
->fx_r_type
)
6797 /* All branch fixups targeting a localentry symbol must
6798 continue using the symbol. */
6799 case BFD_RELOC_PPC_B26
:
6800 case BFD_RELOC_PPC_BA26
:
6801 case BFD_RELOC_PPC_B16
:
6802 case BFD_RELOC_PPC_BA16
:
6803 case BFD_RELOC_PPC_B16_BRTAKEN
:
6804 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6805 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6806 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6807 case BFD_RELOC_PPC64_REL24_NOTOC
:
6808 case BFD_RELOC_PPC64_REL24_P9NOTOC
:
6811 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6812 elf_symbol_type
*elfsym
= elf_symbol_from (bfdsym
);
6813 gas_assert (elfsym
);
6814 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6822 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6823 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6824 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6825 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6826 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6827 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6828 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT_PCREL34
6829 && fix
->fx_r_type
!= BFD_RELOC_24_PLT_PCREL
6830 && fix
->fx_r_type
!= BFD_RELOC_32_PLTOFF
6831 && fix
->fx_r_type
!= BFD_RELOC_32_PLT_PCREL
6832 && fix
->fx_r_type
!= BFD_RELOC_LO16_PLTOFF
6833 && fix
->fx_r_type
!= BFD_RELOC_HI16_PLTOFF
6834 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_PLTOFF
6835 && fix
->fx_r_type
!= BFD_RELOC_64_PLTOFF
6836 && fix
->fx_r_type
!= BFD_RELOC_64_PLT_PCREL
6837 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT16_LO_DS
6838 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT_PCREL34
6839 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16
6840 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO
6841 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HI
6842 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HA
6843 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_DS
6844 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO_DS
6845 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6846 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_LO16A
6847 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HI16A
6848 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HA16A
6849 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6850 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6851 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6852 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
));
6857 ppc_frag_check (struct frag
*fragP
)
6859 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
6860 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6861 _("instruction address is not a multiple of %d"),
6862 fragP
->insn_addr
+ 1);
6865 /* rs_align_code frag handling. */
6867 enum ppc_nop_encoding_for_rs_align_code
6876 ppc_nop_select (void)
6878 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
6880 if ((ppc_cpu
& (PPC_OPCODE_POWER9
| PPC_OPCODE_E500MC
)) == 0)
6882 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
6883 return PPC_NOP_GROUP_P7
;
6884 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0)
6885 return PPC_NOP_GROUP_P6
;
6887 return PPC_NOP_VANILLA
;
6891 ppc_handle_align (struct frag
*fragP
)
6893 valueT count
= (fragP
->fr_next
->fr_address
6894 - (fragP
->fr_address
+ fragP
->fr_fix
));
6895 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6896 enum ppc_nop_encoding_for_rs_align_code nop_select
= *dest
& 0xff;
6898 /* Pad with zeros if not inserting a whole number of instructions.
6899 We could pad with zeros up to an instruction boundary then follow
6900 with nops but odd counts indicate data in an executable section
6901 so padding with zeros is most appropriate. */
6903 || (nop_select
== PPC_NOP_VLE
? (count
& 1) != 0 : (count
& 3) != 0))
6909 if (nop_select
== PPC_NOP_VLE
)
6913 md_number_to_chars (dest
, 0x4400, 2);
6919 if (count
> 4 * nop_limit
&& count
< 0x2000000)
6923 /* Make a branch, then follow with nops. Insert another
6924 frag to handle the nops. */
6925 md_number_to_chars (dest
, 0x48000000 + count
, 4);
6930 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6931 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
6932 fragP
->fr_next
= rest
;
6934 rest
->fr_address
+= rest
->fr_fix
+ 4;
6936 /* If we leave the next frag as rs_align_code we'll come here
6937 again, resulting in a bunch of branches rather than a
6938 branch followed by nops. */
6939 rest
->fr_type
= rs_align
;
6940 dest
= rest
->fr_literal
;
6943 md_number_to_chars (dest
, 0x60000000, 4);
6945 if (nop_select
>= PPC_NOP_GROUP_P6
)
6947 /* For power6, power7, and power8, we want the last nop to
6948 be a group terminating one. Do this by inserting an
6949 rs_fill frag immediately after this one, with its address
6950 set to the last nop location. This will automatically
6951 reduce the number of nops in the current frag by one. */
6954 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6956 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
6957 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
6958 group_nop
->fr_fix
= 0;
6959 group_nop
->fr_offset
= 1;
6960 group_nop
->fr_type
= rs_fill
;
6961 fragP
->fr_next
= group_nop
;
6962 dest
= group_nop
->fr_literal
;
6965 if (nop_select
== PPC_NOP_GROUP_P6
)
6966 /* power6 group terminating nop: "ori 1,1,0". */
6967 md_number_to_chars (dest
, 0x60210000, 4);
6969 /* power7/power8 group terminating nop: "ori 2,2,0". */
6970 md_number_to_chars (dest
, 0x60420000, 4);
6975 /* Apply a fixup to the object code. This is called for all the
6976 fixups we generated by the calls to fix_new_exp, above. */
6979 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
6981 valueT value
= * valP
;
6983 const struct powerpc_operand
*operand
;
6986 if (fixP
->fx_addsy
!= NULL
)
6988 /* Hack around bfd_install_relocation brain damage. */
6990 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
6992 if (fixP
->fx_addsy
== abs_section_sym
)
6998 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6999 the symbol values. If we are doing this relocation the code in
7000 write.c is going to call bfd_install_relocation, which is also
7001 going to use the symbol value. That means that if the reloc is
7002 fully resolved we want to use *valP since bfd_install_relocation is
7004 However, if the reloc is not fully resolved we do not want to
7005 use *valP, and must use fx_offset instead. If the relocation
7006 is PC-relative, we then need to re-apply md_pcrel_from_section
7007 to this new relocation value. */
7008 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
7013 value
= fixP
->fx_offset
;
7015 value
-= md_pcrel_from_section (fixP
, seg
);
7019 /* We are only able to convert some relocs to pc-relative. */
7022 switch (fixP
->fx_r_type
)
7025 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
7029 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
7033 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
7036 case BFD_RELOC_LO16
:
7037 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
7040 case BFD_RELOC_HI16
:
7041 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
7044 case BFD_RELOC_HI16_S
:
7045 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
7048 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7049 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGH
;
7052 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7053 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHA
;
7056 case BFD_RELOC_PPC64_HIGHER
:
7057 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER
;
7060 case BFD_RELOC_PPC64_HIGHER_S
:
7061 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA
;
7064 case BFD_RELOC_PPC64_HIGHEST
:
7065 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST
;
7068 case BFD_RELOC_PPC64_HIGHEST_S
:
7069 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA
;
7072 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
7073 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER34
;
7076 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
7077 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA34
;
7080 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
7081 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST34
;
7084 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
7085 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA34
;
7088 case BFD_RELOC_PPC_16DX_HA
:
7089 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7092 case BFD_RELOC_PPC64_D34
:
7093 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL34
;
7096 case BFD_RELOC_PPC64_D28
:
7097 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL28
;
7104 else if (!fixP
->fx_done
7105 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
7107 /* addpcis is relative to next insn address. */
7109 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7114 if (fixP
->fx_pcrel_adjust
!= 0)
7116 /* This is a fixup on an instruction. */
7117 ppc_opindex_t opindex
= fixP
->fx_pcrel_adjust
& PPC_OPINDEX_MAX
;
7119 operand
= &powerpc_operands
[opindex
];
7121 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
7122 does not generate a reloc. It uses the offset of `sym' within its
7123 csect. Other usages, such as `.long sym', generate relocs. This
7124 is the documented behaviour of non-TOC symbols. */
7125 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
7126 && (operand
->bitm
& 0xfff0) == 0xfff0
7127 && operand
->shift
== 0
7128 && (operand
->insert
== NULL
|| ppc_obj64
)
7129 && fixP
->fx_addsy
!= NULL
7130 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
7131 && !ppc_is_toc_sym (fixP
->fx_addsy
)
7132 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
7134 value
= fixP
->fx_offset
;
7138 /* During parsing of instructions, a TOC16 reloc is generated for
7139 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
7140 in the toc. But at parse time, SYM may be not yet defined, so
7141 check again here. */
7142 if (fixP
->fx_r_type
== BFD_RELOC_16
7143 && fixP
->fx_addsy
!= NULL
7144 && ppc_is_toc_sym (fixP
->fx_addsy
))
7145 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
7149 /* Calculate value to be stored in field. */
7151 switch (fixP
->fx_r_type
)
7154 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
7155 case BFD_RELOC_PPC_VLE_LO16A
:
7156 case BFD_RELOC_PPC_VLE_LO16D
:
7158 case BFD_RELOC_LO16
:
7159 case BFD_RELOC_LO16_PCREL
:
7160 fieldval
= value
& 0xffff;
7162 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7163 fieldval
= SEX16 (fieldval
);
7164 fixP
->fx_no_overflow
= 1;
7167 case BFD_RELOC_HI16
:
7168 case BFD_RELOC_HI16_PCREL
:
7170 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7172 fieldval
= value
>> 16;
7173 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7175 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7176 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7182 case BFD_RELOC_PPC_VLE_HI16A
:
7183 case BFD_RELOC_PPC_VLE_HI16D
:
7184 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7186 fieldval
= PPC_HI (value
);
7187 goto sign_extend_16
;
7189 case BFD_RELOC_HI16_S
:
7190 case BFD_RELOC_HI16_S_PCREL
:
7191 case BFD_RELOC_PPC_16DX_HA
:
7192 case BFD_RELOC_PPC_REL16DX_HA
:
7194 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7196 fieldval
= (value
+ 0x8000) >> 16;
7197 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7199 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7200 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7206 case BFD_RELOC_PPC_VLE_HA16A
:
7207 case BFD_RELOC_PPC_VLE_HA16D
:
7208 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7210 fieldval
= PPC_HA (value
);
7211 goto sign_extend_16
;
7214 case BFD_RELOC_PPC64_HIGHER
:
7215 fieldval
= PPC_HIGHER (value
);
7216 goto sign_extend_16
;
7218 case BFD_RELOC_PPC64_HIGHER_S
:
7219 fieldval
= PPC_HIGHERA (value
);
7220 goto sign_extend_16
;
7222 case BFD_RELOC_PPC64_HIGHEST
:
7223 fieldval
= PPC_HIGHEST (value
);
7224 goto sign_extend_16
;
7226 case BFD_RELOC_PPC64_HIGHEST_S
:
7227 fieldval
= PPC_HIGHESTA (value
);
7228 goto sign_extend_16
;
7235 if (operand
!= NULL
)
7237 /* Handle relocs in an insn. */
7238 switch (fixP
->fx_r_type
)
7241 /* The following relocs can't be calculated by the assembler.
7242 Leave the field zero. */
7243 case BFD_RELOC_PPC_TPREL16
:
7244 case BFD_RELOC_PPC_TPREL16_LO
:
7245 case BFD_RELOC_PPC_TPREL16_HI
:
7246 case BFD_RELOC_PPC_TPREL16_HA
:
7247 case BFD_RELOC_PPC_DTPREL16
:
7248 case BFD_RELOC_PPC_DTPREL16_LO
:
7249 case BFD_RELOC_PPC_DTPREL16_HI
:
7250 case BFD_RELOC_PPC_DTPREL16_HA
:
7251 case BFD_RELOC_PPC_GOT_TLSGD16
:
7252 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7253 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7254 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7255 case BFD_RELOC_PPC_GOT_TLSLD16
:
7256 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7257 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7258 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7259 case BFD_RELOC_PPC_GOT_TPREL16
:
7260 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7261 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7262 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7263 case BFD_RELOC_PPC_GOT_DTPREL16
:
7264 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7265 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7266 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7267 case BFD_RELOC_PPC64_TPREL16_DS
:
7268 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
7269 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7270 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7271 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7272 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7273 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7274 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7275 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7276 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7277 case BFD_RELOC_PPC64_DTPREL16_DS
:
7278 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
7279 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7280 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7281 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7282 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7283 case BFD_RELOC_PPC64_TPREL34
:
7284 case BFD_RELOC_PPC64_DTPREL34
:
7285 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
7286 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
7287 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
7288 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
7289 gas_assert (fixP
->fx_addsy
!= NULL
);
7290 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7294 /* These also should leave the field zero for the same
7295 reason. Note that older versions of gas wrote values
7296 here. If we want to go back to the old behaviour, then
7297 all _LO and _LO_DS cases will need to be treated like
7298 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
7299 case BFD_RELOC_16_GOTOFF
:
7300 case BFD_RELOC_LO16_GOTOFF
:
7301 case BFD_RELOC_HI16_GOTOFF
:
7302 case BFD_RELOC_HI16_S_GOTOFF
:
7303 case BFD_RELOC_LO16_PLTOFF
:
7304 case BFD_RELOC_HI16_PLTOFF
:
7305 case BFD_RELOC_HI16_S_PLTOFF
:
7306 case BFD_RELOC_GPREL16
:
7307 case BFD_RELOC_16_BASEREL
:
7308 case BFD_RELOC_LO16_BASEREL
:
7309 case BFD_RELOC_HI16_BASEREL
:
7310 case BFD_RELOC_HI16_S_BASEREL
:
7311 case BFD_RELOC_PPC_TOC16
:
7312 case BFD_RELOC_PPC64_TOC16_LO
:
7313 case BFD_RELOC_PPC64_TOC16_HI
:
7314 case BFD_RELOC_PPC64_TOC16_HA
:
7315 case BFD_RELOC_PPC64_PLTGOT16
:
7316 case BFD_RELOC_PPC64_PLTGOT16_LO
:
7317 case BFD_RELOC_PPC64_PLTGOT16_HI
:
7318 case BFD_RELOC_PPC64_PLTGOT16_HA
:
7319 case BFD_RELOC_PPC64_GOT16_DS
:
7320 case BFD_RELOC_PPC64_GOT16_LO_DS
:
7321 case BFD_RELOC_PPC64_PLT16_LO_DS
:
7322 case BFD_RELOC_PPC64_SECTOFF_DS
:
7323 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
7324 case BFD_RELOC_PPC64_TOC16_DS
:
7325 case BFD_RELOC_PPC64_TOC16_LO_DS
:
7326 case BFD_RELOC_PPC64_PLTGOT16_DS
:
7327 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
7328 case BFD_RELOC_PPC_EMB_NADDR16
:
7329 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7330 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7331 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7332 case BFD_RELOC_PPC_EMB_SDAI16
:
7333 case BFD_RELOC_PPC_EMB_SDA2I16
:
7334 case BFD_RELOC_PPC_EMB_SDA2REL
:
7335 case BFD_RELOC_PPC_EMB_SDA21
:
7336 case BFD_RELOC_PPC_EMB_MRKREF
:
7337 case BFD_RELOC_PPC_EMB_RELSEC16
:
7338 case BFD_RELOC_PPC_EMB_RELST_LO
:
7339 case BFD_RELOC_PPC_EMB_RELST_HI
:
7340 case BFD_RELOC_PPC_EMB_RELST_HA
:
7341 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7342 case BFD_RELOC_PPC_EMB_RELSDA
:
7343 case BFD_RELOC_PPC_VLE_SDA21
:
7344 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7345 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7346 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
7347 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7348 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
7349 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7350 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
7351 case BFD_RELOC_PPC64_GOT_PCREL34
:
7352 case BFD_RELOC_PPC64_PLT_PCREL34
:
7353 gas_assert (fixP
->fx_addsy
!= NULL
);
7356 case BFD_RELOC_PPC_TLS
:
7357 case BFD_RELOC_PPC_TLSGD
:
7358 case BFD_RELOC_PPC_TLSLD
:
7359 case BFD_RELOC_PPC64_TLS_PCREL
:
7365 case BFD_RELOC_PPC_B16
:
7366 /* Adjust the offset to the instruction boundary. */
7371 case BFD_RELOC_VTABLE_INHERIT
:
7372 case BFD_RELOC_VTABLE_ENTRY
:
7373 case BFD_RELOC_PPC_DTPMOD
:
7374 case BFD_RELOC_PPC_TPREL
:
7375 case BFD_RELOC_PPC_DTPREL
:
7376 case BFD_RELOC_PPC_COPY
:
7377 case BFD_RELOC_PPC_GLOB_DAT
:
7378 case BFD_RELOC_32_PLT_PCREL
:
7379 case BFD_RELOC_PPC_EMB_NADDR32
:
7380 case BFD_RELOC_PPC64_TOC
:
7381 case BFD_RELOC_CTOR
:
7383 case BFD_RELOC_32_PCREL
:
7386 case BFD_RELOC_64_PCREL
:
7387 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7388 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7389 _("%s unsupported as instruction fixup"),
7390 bfd_get_reloc_code_name (fixP
->fx_r_type
));
7399 /* powerpc uses RELA style relocs, so if emitting a reloc the field
7400 contents can stay at zero. */
7401 #define APPLY_RELOC fixP->fx_done
7403 #define APPLY_RELOC 1
7405 /* We need to call the insert function even when fieldval is
7406 zero if the insert function would translate that zero to a
7407 bit pattern other than all zeros. */
7408 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
7411 unsigned char *where
;
7413 /* Fetch the instruction, insert the fully resolved operand
7414 value, and stuff the instruction back again. */
7415 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
7416 if (target_big_endian
)
7418 if (fixP
->fx_size
< 4)
7419 insn
= bfd_getb16 (where
);
7422 insn
= bfd_getb32 (where
);
7423 if (fixP
->fx_size
> 4)
7424 insn
= insn
<< 32 | bfd_getb32 (where
+ 4);
7429 if (fixP
->fx_size
< 4)
7430 insn
= bfd_getl16 (where
);
7433 insn
= bfd_getl32 (where
);
7434 if (fixP
->fx_size
> 4)
7435 insn
= insn
<< 32 | bfd_getl32 (where
+ 4);
7438 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
7439 fixP
->tc_fix_data
.ppc_cpu
,
7440 fixP
->fx_file
, fixP
->fx_line
);
7441 if (target_big_endian
)
7443 if (fixP
->fx_size
< 4)
7444 bfd_putb16 (insn
, where
);
7447 if (fixP
->fx_size
> 4)
7449 bfd_putb32 (insn
, where
+ 4);
7452 bfd_putb32 (insn
, where
);
7457 if (fixP
->fx_size
< 4)
7458 bfd_putl16 (insn
, where
);
7461 if (fixP
->fx_size
> 4)
7463 bfd_putl32 (insn
, where
+ 4);
7466 bfd_putl32 (insn
, where
);
7472 /* Nothing else to do here. */
7475 gas_assert (fixP
->fx_addsy
!= NULL
);
7476 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7481 /* Use expr_symbol_where to see if this is an expression
7483 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7484 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7485 _("unresolved expression that must be resolved"));
7487 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7488 _("unsupported relocation against %s"),
7489 S_GET_NAME (fixP
->fx_addsy
));
7496 /* Handle relocs in data. */
7497 switch (fixP
->fx_r_type
)
7499 case BFD_RELOC_VTABLE_INHERIT
:
7501 && !S_IS_DEFINED (fixP
->fx_addsy
)
7502 && !S_IS_WEAK (fixP
->fx_addsy
))
7503 S_SET_WEAK (fixP
->fx_addsy
);
7506 case BFD_RELOC_VTABLE_ENTRY
:
7511 /* These can appear with @l etc. in data. */
7512 case BFD_RELOC_LO16
:
7513 case BFD_RELOC_LO16_PCREL
:
7514 case BFD_RELOC_HI16
:
7515 case BFD_RELOC_HI16_PCREL
:
7516 case BFD_RELOC_HI16_S
:
7517 case BFD_RELOC_HI16_S_PCREL
:
7518 case BFD_RELOC_PPC64_HIGHER
:
7519 case BFD_RELOC_PPC64_HIGHER_S
:
7520 case BFD_RELOC_PPC64_HIGHEST
:
7521 case BFD_RELOC_PPC64_HIGHEST_S
:
7522 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7523 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7524 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7527 case BFD_RELOC_PPC_DTPMOD
:
7528 case BFD_RELOC_PPC_TPREL
:
7529 case BFD_RELOC_PPC_DTPREL
:
7530 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7533 /* Just punt all of these to the linker. */
7534 case BFD_RELOC_PPC_B16_BRTAKEN
:
7535 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7536 case BFD_RELOC_16_GOTOFF
:
7537 case BFD_RELOC_LO16_GOTOFF
:
7538 case BFD_RELOC_HI16_GOTOFF
:
7539 case BFD_RELOC_HI16_S_GOTOFF
:
7540 case BFD_RELOC_LO16_PLTOFF
:
7541 case BFD_RELOC_HI16_PLTOFF
:
7542 case BFD_RELOC_HI16_S_PLTOFF
:
7543 case BFD_RELOC_PPC_COPY
:
7544 case BFD_RELOC_PPC_GLOB_DAT
:
7545 case BFD_RELOC_16_BASEREL
:
7546 case BFD_RELOC_LO16_BASEREL
:
7547 case BFD_RELOC_HI16_BASEREL
:
7548 case BFD_RELOC_HI16_S_BASEREL
:
7549 case BFD_RELOC_PPC_TLS
:
7550 case BFD_RELOC_PPC_DTPREL16_LO
:
7551 case BFD_RELOC_PPC_DTPREL16_HI
:
7552 case BFD_RELOC_PPC_DTPREL16_HA
:
7553 case BFD_RELOC_PPC_TPREL16_LO
:
7554 case BFD_RELOC_PPC_TPREL16_HI
:
7555 case BFD_RELOC_PPC_TPREL16_HA
:
7556 case BFD_RELOC_PPC_GOT_TLSGD16
:
7557 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7558 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7559 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7560 case BFD_RELOC_PPC_GOT_TLSLD16
:
7561 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7562 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7563 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7564 case BFD_RELOC_PPC_GOT_DTPREL16
:
7565 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7566 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7567 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7568 case BFD_RELOC_PPC_GOT_TPREL16
:
7569 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7570 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7571 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7572 case BFD_RELOC_24_PLT_PCREL
:
7573 case BFD_RELOC_PPC_LOCAL24PC
:
7574 case BFD_RELOC_32_PLT_PCREL
:
7575 case BFD_RELOC_GPREL16
:
7576 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7577 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7578 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7579 case BFD_RELOC_PPC_EMB_NADDR32
:
7580 case BFD_RELOC_PPC_EMB_NADDR16
:
7581 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7582 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7583 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7584 case BFD_RELOC_PPC_EMB_SDAI16
:
7585 case BFD_RELOC_PPC_EMB_SDA2REL
:
7586 case BFD_RELOC_PPC_EMB_SDA2I16
:
7587 case BFD_RELOC_PPC_EMB_SDA21
:
7588 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7589 case BFD_RELOC_PPC_EMB_MRKREF
:
7590 case BFD_RELOC_PPC_EMB_RELSEC16
:
7591 case BFD_RELOC_PPC_EMB_RELST_LO
:
7592 case BFD_RELOC_PPC_EMB_RELST_HI
:
7593 case BFD_RELOC_PPC_EMB_RELST_HA
:
7594 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7595 case BFD_RELOC_PPC_EMB_RELSDA
:
7596 case BFD_RELOC_PPC64_TOC
:
7597 case BFD_RELOC_PPC_TOC16
:
7598 case BFD_RELOC_PPC_TOC16_LO
:
7599 case BFD_RELOC_PPC_TOC16_HI
:
7600 case BFD_RELOC_PPC64_TOC16_LO
:
7601 case BFD_RELOC_PPC64_TOC16_HI
:
7602 case BFD_RELOC_PPC64_TOC16_HA
:
7603 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7604 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7605 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7606 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7607 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7608 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7609 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7610 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7611 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7612 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7613 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7614 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7615 case BFD_RELOC_PPC64_TLS_PCREL
:
7621 case BFD_RELOC_PPC_TLSGD
:
7622 case BFD_RELOC_PPC_TLSLD
:
7623 case BFD_RELOC_PPC_TLSLE
:
7624 case BFD_RELOC_PPC_TLSIE
:
7625 case BFD_RELOC_PPC_TLSM
:
7626 case BFD_RELOC_PPC64_TLSGD
:
7627 case BFD_RELOC_PPC64_TLSLD
:
7628 case BFD_RELOC_PPC64_TLSLE
:
7629 case BFD_RELOC_PPC64_TLSIE
:
7630 case BFD_RELOC_PPC64_TLSM
:
7631 gas_assert (fixP
->fx_addsy
!= NULL
);
7632 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7635 /* Officially, R_TLSML relocations must be from a TOC entry
7636 targeting itself. In practice, this TOC entry is always
7637 named (or .rename) "_$TLSML".
7638 Thus, as it doesn't seem possible to retrieve the symbol
7639 being relocated here, we simply check that the symbol
7640 targeted by R_TLSML is indeed a TOC entry named "_$TLSML".
7641 FIXME: Find a way to correctly check R_TLSML relocations
7642 as described above. */
7643 case BFD_RELOC_PPC_TLSML
:
7644 case BFD_RELOC_PPC64_TLSML
:
7645 gas_assert (fixP
->fx_addsy
!= NULL
);
7646 if ((symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
7647 || symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TE
)
7648 && strcmp (symbol_get_tc (fixP
->fx_addsy
)->real_name
, "_$TLSML") != 0)
7649 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7650 _("R_TLSML relocation doesn't target a "
7651 "TOC entry named \"_$TLSML\": %s"), S_GET_NAME(fixP
->fx_addsy
));
7655 case BFD_RELOC_NONE
:
7657 case BFD_RELOC_CTOR
:
7659 case BFD_RELOC_32_PCREL
:
7662 case BFD_RELOC_64_PCREL
:
7664 case BFD_RELOC_16_PCREL
:
7670 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7675 if (fixP
->fx_size
&& APPLY_RELOC
)
7676 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7677 fieldval
, fixP
->fx_size
);
7679 && (seg
->flags
& SEC_CODE
) != 0
7680 && fixP
->fx_size
== 4
7683 && (fixP
->fx_r_type
== BFD_RELOC_32
7684 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7685 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7686 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7687 _("data in executable section"));
7691 ppc_elf_validate_fix (fixP
, seg
);
7692 fixP
->fx_addnumber
= value
;
7694 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7695 from the section contents. If we are going to be emitting a reloc
7696 then the section contents are immaterial, so don't warn if they
7697 happen to overflow. Leave such warnings to ld. */
7700 fixP
->fx_no_overflow
= 1;
7702 /* Arrange to emit .TOC. as a normal symbol if used in anything
7703 but .TOC.@tocbase. */
7705 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7706 && fixP
->fx_addsy
!= NULL
7707 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7708 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7711 if (fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16
7712 || fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_HI
7713 || fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_LO
)
7715 /* We want to use the offset within the toc, not the actual VMA
7717 fixP
->fx_addnumber
= (- bfd_section_vma (S_GET_SEGMENT (fixP
->fx_addsy
))
7718 - S_GET_VALUE (ppc_toc_csect
));
7720 /* The high bits must be adjusted for the low bits being signed. */
7721 if (fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_HI
) {
7722 fixP
->fx_addnumber
+= 0x8000;
7725 /* Set *valP to avoid errors. */
7728 else if (fixP
->fx_r_type
== BFD_RELOC_PPC_TLSM
7729 || fixP
->fx_r_type
== BFD_RELOC_PPC64_TLSM
7730 || fixP
->fx_r_type
== BFD_RELOC_PPC_TLSML
7731 || fixP
->fx_r_type
== BFD_RELOC_PPC64_TLSML
)
7732 /* AIX ld expects the section contents for these relocations
7733 to be zero. Arrange for that to occur when
7734 bfd_install_relocation is called. */
7735 fixP
->fx_addnumber
= (- bfd_section_vma (S_GET_SEGMENT (fixP
->fx_addsy
))
7736 - S_GET_VALUE (fixP
->fx_addsy
)
7739 fixP
->fx_addnumber
= 0;
7743 /* Generate a reloc for a fixup. */
7746 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7748 static arelent
*relocs
[3];
7751 relocs
[0] = reloc
= XNEW (arelent
);
7754 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7755 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7756 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7757 /* BFD_RELOC_PPC64_TLS_PCREL generates R_PPC64_TLS with an odd r_offset. */
7758 if (fixp
->fx_r_type
== BFD_RELOC_PPC64_TLS_PCREL
)
7760 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7761 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7763 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7764 _("reloc %d not supported by object file format"),
7765 (int) fixp
->fx_r_type
);
7768 reloc
->addend
= fixp
->fx_addnumber
;
7770 if (fixp
->fx_subsy
!= NULL
)
7772 relocs
[1] = reloc
= XNEW (arelent
);
7775 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7776 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
7777 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7779 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_PPC_NEG
);
7780 reloc
->addend
= fixp
->fx_addnumber
;
7782 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7784 as_bad_subtract (fixp
);
7785 free (relocs
[1]->sym_ptr_ptr
);
7787 free (relocs
[0]->sym_ptr_ptr
);
7798 ppc_cfi_frame_initial_instructions (void)
7800 cfi_add_CFA_def_cfa (1, 0);
7804 tc_ppc_regname_to_dw2regnum (char *regname
)
7806 unsigned int regnum
= -1;
7810 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7812 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7813 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7814 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7815 { "spe_acc", 111 }, { "spefscr", 112 }
7818 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7819 if (strcmp (regnames
[i
].name
, regname
) == 0)
7820 return regnames
[i
].dw2regnum
;
7822 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7824 p
= regname
+ 1 + (regname
[1] == '.');
7825 regnum
= strtoul (p
, &q
, 10);
7826 if (p
== q
|| *q
|| regnum
>= 32)
7828 if (regname
[0] == 'f')
7830 else if (regname
[0] == 'v')
7833 else if (regname
[0] == 'c' && regname
[1] == 'r')
7835 p
= regname
+ 2 + (regname
[2] == '.');
7836 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7838 regnum
= p
[0] - '0' + 68;