1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2019 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian
;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian
= 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p
= TARGET_REG_NAMES_P
;
96 static void ppc_macro (char *, const struct powerpc_macro
*);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS
*, offsetT
);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars
[] = "#!";
162 static const char ppc_eabi_comment_chars
[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
167 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
170 const char comment_chars
[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars
[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars
[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS
[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS
[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars
[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment
;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length
;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit
= 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu
= 0;
205 ppc_cpu_t sticky
= 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion
= 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc
= 1,
214 has_small_toc_reloc
= 2
218 /* Warn on emitting data to code sections. */
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table
[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte
, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm
, 0 },
237 { "lcomm", ppc_comm
, 1 },
241 { "bi", ppc_biei
, 0 },
243 { "csect", ppc_csect
, 0 },
244 { "dwsect", ppc_dwsect
, 0 },
245 { "data", ppc_section
, 'd' },
249 { "ei", ppc_biei
, 1 },
251 { "extern", ppc_extern
, 0 },
252 { "function", ppc_function
, 0 },
253 { "lglobl", ppc_lglobl
, 0 },
254 { "ref", ppc_ref
, 0 },
255 { "rename", ppc_rename
, 0 },
256 { "section", ppc_named_section
, 0 },
257 { "stabx", ppc_stabx
, 0 },
258 { "text", ppc_section
, 't' },
259 { "toc", ppc_toc
, 0 },
260 { "long", ppc_xcoff_cons
, 2 },
261 { "llong", ppc_xcoff_cons
, 3 },
262 { "word", ppc_xcoff_cons
, 1 },
263 { "short", ppc_xcoff_cons
, 1 },
264 { "vbyte", ppc_vbyte
, 0 },
268 { "llong", cons
, 8 },
269 { "rdata", ppc_elf_rdata
, 0 },
270 { "rodata", ppc_elf_rdata
, 0 },
271 { "lcomm", ppc_elf_lcomm
, 0 },
272 { "localentry", ppc_elf_localentry
, 0 },
273 { "abiversion", ppc_elf_abiversion
, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous
, 0 },
280 { "pdata", ppc_pdata
, 0 },
281 { "ydata", ppc_ydata
, 0 },
282 { "reldata", ppc_reldata
, 0 },
283 { "rdata", ppc_rdata
, 0 },
284 { "ualong", ppc_ualong
, 0 },
285 { "znop", ppc_znop
, 0 },
286 { "comm", ppc_pe_comm
, 0 },
287 { "lcomm", ppc_pe_comm
, 1 },
288 { "section", ppc_pe_section
, 0 },
289 { "function", ppc_pe_function
,0 },
290 { "tocd", ppc_pe_tocd
, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine
, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value
;
311 unsigned short flags
;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers
[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG
},
351 { "cr.1", 1, PPC_OPERAND_CR_REG
},
352 { "cr.2", 2, PPC_OPERAND_CR_REG
},
353 { "cr.3", 3, PPC_OPERAND_CR_REG
},
354 { "cr.4", 4, PPC_OPERAND_CR_REG
},
355 { "cr.5", 5, PPC_OPERAND_CR_REG
},
356 { "cr.6", 6, PPC_OPERAND_CR_REG
},
357 { "cr.7", 7, PPC_OPERAND_CR_REG
},
359 { "cr0", 0, PPC_OPERAND_CR_REG
},
360 { "cr1", 1, PPC_OPERAND_CR_REG
},
361 { "cr2", 2, PPC_OPERAND_CR_REG
},
362 { "cr3", 3, PPC_OPERAND_CR_REG
},
363 { "cr4", 4, PPC_OPERAND_CR_REG
},
364 { "cr5", 5, PPC_OPERAND_CR_REG
},
365 { "cr6", 6, PPC_OPERAND_CR_REG
},
366 { "cr7", 7, PPC_OPERAND_CR_REG
},
368 { "ctr", 9, PPC_OPERAND_SPR
},
369 { "dar", 19, PPC_OPERAND_SPR
},
370 { "dec", 22, PPC_OPERAND_SPR
},
371 { "dsisr", 18, PPC_OPERAND_SPR
},
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR
},
375 { "f.1", 1, PPC_OPERAND_FPR
},
376 { "f.10", 10, PPC_OPERAND_FPR
},
377 { "f.11", 11, PPC_OPERAND_FPR
},
378 { "f.12", 12, PPC_OPERAND_FPR
},
379 { "f.13", 13, PPC_OPERAND_FPR
},
380 { "f.14", 14, PPC_OPERAND_FPR
},
381 { "f.15", 15, PPC_OPERAND_FPR
},
382 { "f.16", 16, PPC_OPERAND_FPR
},
383 { "f.17", 17, PPC_OPERAND_FPR
},
384 { "f.18", 18, PPC_OPERAND_FPR
},
385 { "f.19", 19, PPC_OPERAND_FPR
},
386 { "f.2", 2, PPC_OPERAND_FPR
},
387 { "f.20", 20, PPC_OPERAND_FPR
},
388 { "f.21", 21, PPC_OPERAND_FPR
},
389 { "f.22", 22, PPC_OPERAND_FPR
},
390 { "f.23", 23, PPC_OPERAND_FPR
},
391 { "f.24", 24, PPC_OPERAND_FPR
},
392 { "f.25", 25, PPC_OPERAND_FPR
},
393 { "f.26", 26, PPC_OPERAND_FPR
},
394 { "f.27", 27, PPC_OPERAND_FPR
},
395 { "f.28", 28, PPC_OPERAND_FPR
},
396 { "f.29", 29, PPC_OPERAND_FPR
},
397 { "f.3", 3, PPC_OPERAND_FPR
},
398 { "f.30", 30, PPC_OPERAND_FPR
},
399 { "f.31", 31, PPC_OPERAND_FPR
},
400 { "f.32", 32, PPC_OPERAND_VSR
},
401 { "f.33", 33, PPC_OPERAND_VSR
},
402 { "f.34", 34, PPC_OPERAND_VSR
},
403 { "f.35", 35, PPC_OPERAND_VSR
},
404 { "f.36", 36, PPC_OPERAND_VSR
},
405 { "f.37", 37, PPC_OPERAND_VSR
},
406 { "f.38", 38, PPC_OPERAND_VSR
},
407 { "f.39", 39, PPC_OPERAND_VSR
},
408 { "f.4", 4, PPC_OPERAND_FPR
},
409 { "f.40", 40, PPC_OPERAND_VSR
},
410 { "f.41", 41, PPC_OPERAND_VSR
},
411 { "f.42", 42, PPC_OPERAND_VSR
},
412 { "f.43", 43, PPC_OPERAND_VSR
},
413 { "f.44", 44, PPC_OPERAND_VSR
},
414 { "f.45", 45, PPC_OPERAND_VSR
},
415 { "f.46", 46, PPC_OPERAND_VSR
},
416 { "f.47", 47, PPC_OPERAND_VSR
},
417 { "f.48", 48, PPC_OPERAND_VSR
},
418 { "f.49", 49, PPC_OPERAND_VSR
},
419 { "f.5", 5, PPC_OPERAND_FPR
},
420 { "f.50", 50, PPC_OPERAND_VSR
},
421 { "f.51", 51, PPC_OPERAND_VSR
},
422 { "f.52", 52, PPC_OPERAND_VSR
},
423 { "f.53", 53, PPC_OPERAND_VSR
},
424 { "f.54", 54, PPC_OPERAND_VSR
},
425 { "f.55", 55, PPC_OPERAND_VSR
},
426 { "f.56", 56, PPC_OPERAND_VSR
},
427 { "f.57", 57, PPC_OPERAND_VSR
},
428 { "f.58", 58, PPC_OPERAND_VSR
},
429 { "f.59", 59, PPC_OPERAND_VSR
},
430 { "f.6", 6, PPC_OPERAND_FPR
},
431 { "f.60", 60, PPC_OPERAND_VSR
},
432 { "f.61", 61, PPC_OPERAND_VSR
},
433 { "f.62", 62, PPC_OPERAND_VSR
},
434 { "f.63", 63, PPC_OPERAND_VSR
},
435 { "f.7", 7, PPC_OPERAND_FPR
},
436 { "f.8", 8, PPC_OPERAND_FPR
},
437 { "f.9", 9, PPC_OPERAND_FPR
},
439 { "f0", 0, PPC_OPERAND_FPR
},
440 { "f1", 1, PPC_OPERAND_FPR
},
441 { "f10", 10, PPC_OPERAND_FPR
},
442 { "f11", 11, PPC_OPERAND_FPR
},
443 { "f12", 12, PPC_OPERAND_FPR
},
444 { "f13", 13, PPC_OPERAND_FPR
},
445 { "f14", 14, PPC_OPERAND_FPR
},
446 { "f15", 15, PPC_OPERAND_FPR
},
447 { "f16", 16, PPC_OPERAND_FPR
},
448 { "f17", 17, PPC_OPERAND_FPR
},
449 { "f18", 18, PPC_OPERAND_FPR
},
450 { "f19", 19, PPC_OPERAND_FPR
},
451 { "f2", 2, PPC_OPERAND_FPR
},
452 { "f20", 20, PPC_OPERAND_FPR
},
453 { "f21", 21, PPC_OPERAND_FPR
},
454 { "f22", 22, PPC_OPERAND_FPR
},
455 { "f23", 23, PPC_OPERAND_FPR
},
456 { "f24", 24, PPC_OPERAND_FPR
},
457 { "f25", 25, PPC_OPERAND_FPR
},
458 { "f26", 26, PPC_OPERAND_FPR
},
459 { "f27", 27, PPC_OPERAND_FPR
},
460 { "f28", 28, PPC_OPERAND_FPR
},
461 { "f29", 29, PPC_OPERAND_FPR
},
462 { "f3", 3, PPC_OPERAND_FPR
},
463 { "f30", 30, PPC_OPERAND_FPR
},
464 { "f31", 31, PPC_OPERAND_FPR
},
465 { "f32", 32, PPC_OPERAND_VSR
},
466 { "f33", 33, PPC_OPERAND_VSR
},
467 { "f34", 34, PPC_OPERAND_VSR
},
468 { "f35", 35, PPC_OPERAND_VSR
},
469 { "f36", 36, PPC_OPERAND_VSR
},
470 { "f37", 37, PPC_OPERAND_VSR
},
471 { "f38", 38, PPC_OPERAND_VSR
},
472 { "f39", 39, PPC_OPERAND_VSR
},
473 { "f4", 4, PPC_OPERAND_FPR
},
474 { "f40", 40, PPC_OPERAND_VSR
},
475 { "f41", 41, PPC_OPERAND_VSR
},
476 { "f42", 42, PPC_OPERAND_VSR
},
477 { "f43", 43, PPC_OPERAND_VSR
},
478 { "f44", 44, PPC_OPERAND_VSR
},
479 { "f45", 45, PPC_OPERAND_VSR
},
480 { "f46", 46, PPC_OPERAND_VSR
},
481 { "f47", 47, PPC_OPERAND_VSR
},
482 { "f48", 48, PPC_OPERAND_VSR
},
483 { "f49", 49, PPC_OPERAND_VSR
},
484 { "f5", 5, PPC_OPERAND_FPR
},
485 { "f50", 50, PPC_OPERAND_VSR
},
486 { "f51", 51, PPC_OPERAND_VSR
},
487 { "f52", 52, PPC_OPERAND_VSR
},
488 { "f53", 53, PPC_OPERAND_VSR
},
489 { "f54", 54, PPC_OPERAND_VSR
},
490 { "f55", 55, PPC_OPERAND_VSR
},
491 { "f56", 56, PPC_OPERAND_VSR
},
492 { "f57", 57, PPC_OPERAND_VSR
},
493 { "f58", 58, PPC_OPERAND_VSR
},
494 { "f59", 59, PPC_OPERAND_VSR
},
495 { "f6", 6, PPC_OPERAND_FPR
},
496 { "f60", 60, PPC_OPERAND_VSR
},
497 { "f61", 61, PPC_OPERAND_VSR
},
498 { "f62", 62, PPC_OPERAND_VSR
},
499 { "f63", 63, PPC_OPERAND_VSR
},
500 { "f7", 7, PPC_OPERAND_FPR
},
501 { "f8", 8, PPC_OPERAND_FPR
},
502 { "f9", 9, PPC_OPERAND_FPR
},
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR
},
506 { "gqr.1", 1, PPC_OPERAND_GQR
},
507 { "gqr.2", 2, PPC_OPERAND_GQR
},
508 { "gqr.3", 3, PPC_OPERAND_GQR
},
509 { "gqr.4", 4, PPC_OPERAND_GQR
},
510 { "gqr.5", 5, PPC_OPERAND_GQR
},
511 { "gqr.6", 6, PPC_OPERAND_GQR
},
512 { "gqr.7", 7, PPC_OPERAND_GQR
},
513 { "gqr0", 0, PPC_OPERAND_GQR
},
514 { "gqr1", 1, PPC_OPERAND_GQR
},
515 { "gqr2", 2, PPC_OPERAND_GQR
},
516 { "gqr3", 3, PPC_OPERAND_GQR
},
517 { "gqr4", 4, PPC_OPERAND_GQR
},
518 { "gqr5", 5, PPC_OPERAND_GQR
},
519 { "gqr6", 6, PPC_OPERAND_GQR
},
520 { "gqr7", 7, PPC_OPERAND_GQR
},
522 { "lr", 8, PPC_OPERAND_SPR
},
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR
},
526 { "r.1", 1, PPC_OPERAND_GPR
},
527 { "r.10", 10, PPC_OPERAND_GPR
},
528 { "r.11", 11, PPC_OPERAND_GPR
},
529 { "r.12", 12, PPC_OPERAND_GPR
},
530 { "r.13", 13, PPC_OPERAND_GPR
},
531 { "r.14", 14, PPC_OPERAND_GPR
},
532 { "r.15", 15, PPC_OPERAND_GPR
},
533 { "r.16", 16, PPC_OPERAND_GPR
},
534 { "r.17", 17, PPC_OPERAND_GPR
},
535 { "r.18", 18, PPC_OPERAND_GPR
},
536 { "r.19", 19, PPC_OPERAND_GPR
},
537 { "r.2", 2, PPC_OPERAND_GPR
},
538 { "r.20", 20, PPC_OPERAND_GPR
},
539 { "r.21", 21, PPC_OPERAND_GPR
},
540 { "r.22", 22, PPC_OPERAND_GPR
},
541 { "r.23", 23, PPC_OPERAND_GPR
},
542 { "r.24", 24, PPC_OPERAND_GPR
},
543 { "r.25", 25, PPC_OPERAND_GPR
},
544 { "r.26", 26, PPC_OPERAND_GPR
},
545 { "r.27", 27, PPC_OPERAND_GPR
},
546 { "r.28", 28, PPC_OPERAND_GPR
},
547 { "r.29", 29, PPC_OPERAND_GPR
},
548 { "r.3", 3, PPC_OPERAND_GPR
},
549 { "r.30", 30, PPC_OPERAND_GPR
},
550 { "r.31", 31, PPC_OPERAND_GPR
},
551 { "r.4", 4, PPC_OPERAND_GPR
},
552 { "r.5", 5, PPC_OPERAND_GPR
},
553 { "r.6", 6, PPC_OPERAND_GPR
},
554 { "r.7", 7, PPC_OPERAND_GPR
},
555 { "r.8", 8, PPC_OPERAND_GPR
},
556 { "r.9", 9, PPC_OPERAND_GPR
},
558 { "r.sp", 1, PPC_OPERAND_GPR
},
560 { "r.toc", 2, PPC_OPERAND_GPR
},
562 { "r0", 0, PPC_OPERAND_GPR
},
563 { "r1", 1, PPC_OPERAND_GPR
},
564 { "r10", 10, PPC_OPERAND_GPR
},
565 { "r11", 11, PPC_OPERAND_GPR
},
566 { "r12", 12, PPC_OPERAND_GPR
},
567 { "r13", 13, PPC_OPERAND_GPR
},
568 { "r14", 14, PPC_OPERAND_GPR
},
569 { "r15", 15, PPC_OPERAND_GPR
},
570 { "r16", 16, PPC_OPERAND_GPR
},
571 { "r17", 17, PPC_OPERAND_GPR
},
572 { "r18", 18, PPC_OPERAND_GPR
},
573 { "r19", 19, PPC_OPERAND_GPR
},
574 { "r2", 2, PPC_OPERAND_GPR
},
575 { "r20", 20, PPC_OPERAND_GPR
},
576 { "r21", 21, PPC_OPERAND_GPR
},
577 { "r22", 22, PPC_OPERAND_GPR
},
578 { "r23", 23, PPC_OPERAND_GPR
},
579 { "r24", 24, PPC_OPERAND_GPR
},
580 { "r25", 25, PPC_OPERAND_GPR
},
581 { "r26", 26, PPC_OPERAND_GPR
},
582 { "r27", 27, PPC_OPERAND_GPR
},
583 { "r28", 28, PPC_OPERAND_GPR
},
584 { "r29", 29, PPC_OPERAND_GPR
},
585 { "r3", 3, PPC_OPERAND_GPR
},
586 { "r30", 30, PPC_OPERAND_GPR
},
587 { "r31", 31, PPC_OPERAND_GPR
},
588 { "r4", 4, PPC_OPERAND_GPR
},
589 { "r5", 5, PPC_OPERAND_GPR
},
590 { "r6", 6, PPC_OPERAND_GPR
},
591 { "r7", 7, PPC_OPERAND_GPR
},
592 { "r8", 8, PPC_OPERAND_GPR
},
593 { "r9", 9, PPC_OPERAND_GPR
},
595 { "rtoc", 2, PPC_OPERAND_GPR
},
597 { "sdr1", 25, PPC_OPERAND_SPR
},
599 { "sp", 1, PPC_OPERAND_GPR
},
601 { "srr0", 26, PPC_OPERAND_SPR
},
602 { "srr1", 27, PPC_OPERAND_SPR
},
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR
},
606 { "v.1", 1, PPC_OPERAND_VR
},
607 { "v.10", 10, PPC_OPERAND_VR
},
608 { "v.11", 11, PPC_OPERAND_VR
},
609 { "v.12", 12, PPC_OPERAND_VR
},
610 { "v.13", 13, PPC_OPERAND_VR
},
611 { "v.14", 14, PPC_OPERAND_VR
},
612 { "v.15", 15, PPC_OPERAND_VR
},
613 { "v.16", 16, PPC_OPERAND_VR
},
614 { "v.17", 17, PPC_OPERAND_VR
},
615 { "v.18", 18, PPC_OPERAND_VR
},
616 { "v.19", 19, PPC_OPERAND_VR
},
617 { "v.2", 2, PPC_OPERAND_VR
},
618 { "v.20", 20, PPC_OPERAND_VR
},
619 { "v.21", 21, PPC_OPERAND_VR
},
620 { "v.22", 22, PPC_OPERAND_VR
},
621 { "v.23", 23, PPC_OPERAND_VR
},
622 { "v.24", 24, PPC_OPERAND_VR
},
623 { "v.25", 25, PPC_OPERAND_VR
},
624 { "v.26", 26, PPC_OPERAND_VR
},
625 { "v.27", 27, PPC_OPERAND_VR
},
626 { "v.28", 28, PPC_OPERAND_VR
},
627 { "v.29", 29, PPC_OPERAND_VR
},
628 { "v.3", 3, PPC_OPERAND_VR
},
629 { "v.30", 30, PPC_OPERAND_VR
},
630 { "v.31", 31, PPC_OPERAND_VR
},
631 { "v.4", 4, PPC_OPERAND_VR
},
632 { "v.5", 5, PPC_OPERAND_VR
},
633 { "v.6", 6, PPC_OPERAND_VR
},
634 { "v.7", 7, PPC_OPERAND_VR
},
635 { "v.8", 8, PPC_OPERAND_VR
},
636 { "v.9", 9, PPC_OPERAND_VR
},
638 { "v0", 0, PPC_OPERAND_VR
},
639 { "v1", 1, PPC_OPERAND_VR
},
640 { "v10", 10, PPC_OPERAND_VR
},
641 { "v11", 11, PPC_OPERAND_VR
},
642 { "v12", 12, PPC_OPERAND_VR
},
643 { "v13", 13, PPC_OPERAND_VR
},
644 { "v14", 14, PPC_OPERAND_VR
},
645 { "v15", 15, PPC_OPERAND_VR
},
646 { "v16", 16, PPC_OPERAND_VR
},
647 { "v17", 17, PPC_OPERAND_VR
},
648 { "v18", 18, PPC_OPERAND_VR
},
649 { "v19", 19, PPC_OPERAND_VR
},
650 { "v2", 2, PPC_OPERAND_VR
},
651 { "v20", 20, PPC_OPERAND_VR
},
652 { "v21", 21, PPC_OPERAND_VR
},
653 { "v22", 22, PPC_OPERAND_VR
},
654 { "v23", 23, PPC_OPERAND_VR
},
655 { "v24", 24, PPC_OPERAND_VR
},
656 { "v25", 25, PPC_OPERAND_VR
},
657 { "v26", 26, PPC_OPERAND_VR
},
658 { "v27", 27, PPC_OPERAND_VR
},
659 { "v28", 28, PPC_OPERAND_VR
},
660 { "v29", 29, PPC_OPERAND_VR
},
661 { "v3", 3, PPC_OPERAND_VR
},
662 { "v30", 30, PPC_OPERAND_VR
},
663 { "v31", 31, PPC_OPERAND_VR
},
664 { "v4", 4, PPC_OPERAND_VR
},
665 { "v5", 5, PPC_OPERAND_VR
},
666 { "v6", 6, PPC_OPERAND_VR
},
667 { "v7", 7, PPC_OPERAND_VR
},
668 { "v8", 8, PPC_OPERAND_VR
},
669 { "v9", 9, PPC_OPERAND_VR
},
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR
},
673 { "vs.1", 1, PPC_OPERAND_VSR
},
674 { "vs.10", 10, PPC_OPERAND_VSR
},
675 { "vs.11", 11, PPC_OPERAND_VSR
},
676 { "vs.12", 12, PPC_OPERAND_VSR
},
677 { "vs.13", 13, PPC_OPERAND_VSR
},
678 { "vs.14", 14, PPC_OPERAND_VSR
},
679 { "vs.15", 15, PPC_OPERAND_VSR
},
680 { "vs.16", 16, PPC_OPERAND_VSR
},
681 { "vs.17", 17, PPC_OPERAND_VSR
},
682 { "vs.18", 18, PPC_OPERAND_VSR
},
683 { "vs.19", 19, PPC_OPERAND_VSR
},
684 { "vs.2", 2, PPC_OPERAND_VSR
},
685 { "vs.20", 20, PPC_OPERAND_VSR
},
686 { "vs.21", 21, PPC_OPERAND_VSR
},
687 { "vs.22", 22, PPC_OPERAND_VSR
},
688 { "vs.23", 23, PPC_OPERAND_VSR
},
689 { "vs.24", 24, PPC_OPERAND_VSR
},
690 { "vs.25", 25, PPC_OPERAND_VSR
},
691 { "vs.26", 26, PPC_OPERAND_VSR
},
692 { "vs.27", 27, PPC_OPERAND_VSR
},
693 { "vs.28", 28, PPC_OPERAND_VSR
},
694 { "vs.29", 29, PPC_OPERAND_VSR
},
695 { "vs.3", 3, PPC_OPERAND_VSR
},
696 { "vs.30", 30, PPC_OPERAND_VSR
},
697 { "vs.31", 31, PPC_OPERAND_VSR
},
698 { "vs.32", 32, PPC_OPERAND_VSR
},
699 { "vs.33", 33, PPC_OPERAND_VSR
},
700 { "vs.34", 34, PPC_OPERAND_VSR
},
701 { "vs.35", 35, PPC_OPERAND_VSR
},
702 { "vs.36", 36, PPC_OPERAND_VSR
},
703 { "vs.37", 37, PPC_OPERAND_VSR
},
704 { "vs.38", 38, PPC_OPERAND_VSR
},
705 { "vs.39", 39, PPC_OPERAND_VSR
},
706 { "vs.4", 4, PPC_OPERAND_VSR
},
707 { "vs.40", 40, PPC_OPERAND_VSR
},
708 { "vs.41", 41, PPC_OPERAND_VSR
},
709 { "vs.42", 42, PPC_OPERAND_VSR
},
710 { "vs.43", 43, PPC_OPERAND_VSR
},
711 { "vs.44", 44, PPC_OPERAND_VSR
},
712 { "vs.45", 45, PPC_OPERAND_VSR
},
713 { "vs.46", 46, PPC_OPERAND_VSR
},
714 { "vs.47", 47, PPC_OPERAND_VSR
},
715 { "vs.48", 48, PPC_OPERAND_VSR
},
716 { "vs.49", 49, PPC_OPERAND_VSR
},
717 { "vs.5", 5, PPC_OPERAND_VSR
},
718 { "vs.50", 50, PPC_OPERAND_VSR
},
719 { "vs.51", 51, PPC_OPERAND_VSR
},
720 { "vs.52", 52, PPC_OPERAND_VSR
},
721 { "vs.53", 53, PPC_OPERAND_VSR
},
722 { "vs.54", 54, PPC_OPERAND_VSR
},
723 { "vs.55", 55, PPC_OPERAND_VSR
},
724 { "vs.56", 56, PPC_OPERAND_VSR
},
725 { "vs.57", 57, PPC_OPERAND_VSR
},
726 { "vs.58", 58, PPC_OPERAND_VSR
},
727 { "vs.59", 59, PPC_OPERAND_VSR
},
728 { "vs.6", 6, PPC_OPERAND_VSR
},
729 { "vs.60", 60, PPC_OPERAND_VSR
},
730 { "vs.61", 61, PPC_OPERAND_VSR
},
731 { "vs.62", 62, PPC_OPERAND_VSR
},
732 { "vs.63", 63, PPC_OPERAND_VSR
},
733 { "vs.7", 7, PPC_OPERAND_VSR
},
734 { "vs.8", 8, PPC_OPERAND_VSR
},
735 { "vs.9", 9, PPC_OPERAND_VSR
},
737 { "vs0", 0, PPC_OPERAND_VSR
},
738 { "vs1", 1, PPC_OPERAND_VSR
},
739 { "vs10", 10, PPC_OPERAND_VSR
},
740 { "vs11", 11, PPC_OPERAND_VSR
},
741 { "vs12", 12, PPC_OPERAND_VSR
},
742 { "vs13", 13, PPC_OPERAND_VSR
},
743 { "vs14", 14, PPC_OPERAND_VSR
},
744 { "vs15", 15, PPC_OPERAND_VSR
},
745 { "vs16", 16, PPC_OPERAND_VSR
},
746 { "vs17", 17, PPC_OPERAND_VSR
},
747 { "vs18", 18, PPC_OPERAND_VSR
},
748 { "vs19", 19, PPC_OPERAND_VSR
},
749 { "vs2", 2, PPC_OPERAND_VSR
},
750 { "vs20", 20, PPC_OPERAND_VSR
},
751 { "vs21", 21, PPC_OPERAND_VSR
},
752 { "vs22", 22, PPC_OPERAND_VSR
},
753 { "vs23", 23, PPC_OPERAND_VSR
},
754 { "vs24", 24, PPC_OPERAND_VSR
},
755 { "vs25", 25, PPC_OPERAND_VSR
},
756 { "vs26", 26, PPC_OPERAND_VSR
},
757 { "vs27", 27, PPC_OPERAND_VSR
},
758 { "vs28", 28, PPC_OPERAND_VSR
},
759 { "vs29", 29, PPC_OPERAND_VSR
},
760 { "vs3", 3, PPC_OPERAND_VSR
},
761 { "vs30", 30, PPC_OPERAND_VSR
},
762 { "vs31", 31, PPC_OPERAND_VSR
},
763 { "vs32", 32, PPC_OPERAND_VSR
},
764 { "vs33", 33, PPC_OPERAND_VSR
},
765 { "vs34", 34, PPC_OPERAND_VSR
},
766 { "vs35", 35, PPC_OPERAND_VSR
},
767 { "vs36", 36, PPC_OPERAND_VSR
},
768 { "vs37", 37, PPC_OPERAND_VSR
},
769 { "vs38", 38, PPC_OPERAND_VSR
},
770 { "vs39", 39, PPC_OPERAND_VSR
},
771 { "vs4", 4, PPC_OPERAND_VSR
},
772 { "vs40", 40, PPC_OPERAND_VSR
},
773 { "vs41", 41, PPC_OPERAND_VSR
},
774 { "vs42", 42, PPC_OPERAND_VSR
},
775 { "vs43", 43, PPC_OPERAND_VSR
},
776 { "vs44", 44, PPC_OPERAND_VSR
},
777 { "vs45", 45, PPC_OPERAND_VSR
},
778 { "vs46", 46, PPC_OPERAND_VSR
},
779 { "vs47", 47, PPC_OPERAND_VSR
},
780 { "vs48", 48, PPC_OPERAND_VSR
},
781 { "vs49", 49, PPC_OPERAND_VSR
},
782 { "vs5", 5, PPC_OPERAND_VSR
},
783 { "vs50", 50, PPC_OPERAND_VSR
},
784 { "vs51", 51, PPC_OPERAND_VSR
},
785 { "vs52", 52, PPC_OPERAND_VSR
},
786 { "vs53", 53, PPC_OPERAND_VSR
},
787 { "vs54", 54, PPC_OPERAND_VSR
},
788 { "vs55", 55, PPC_OPERAND_VSR
},
789 { "vs56", 56, PPC_OPERAND_VSR
},
790 { "vs57", 57, PPC_OPERAND_VSR
},
791 { "vs58", 58, PPC_OPERAND_VSR
},
792 { "vs59", 59, PPC_OPERAND_VSR
},
793 { "vs6", 6, PPC_OPERAND_VSR
},
794 { "vs60", 60, PPC_OPERAND_VSR
},
795 { "vs61", 61, PPC_OPERAND_VSR
},
796 { "vs62", 62, PPC_OPERAND_VSR
},
797 { "vs63", 63, PPC_OPERAND_VSR
},
798 { "vs7", 7, PPC_OPERAND_VSR
},
799 { "vs8", 8, PPC_OPERAND_VSR
},
800 { "vs9", 9, PPC_OPERAND_VSR
},
802 { "xer", 1, PPC_OPERAND_SPR
}
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg
*
811 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
813 int middle
, low
, high
;
821 middle
= (low
+ high
) / 2;
822 cmp
= strcasecmp (name
, regs
[middle
].name
);
828 return ®s
[middle
];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS
*expressionP
)
850 const struct pd_reg
*reg
;
855 /* Find the spelling of the operand. */
856 start
= name
= input_line_pointer
;
857 if (name
[0] == '%' && ISALPHA (name
[1]))
858 name
= ++input_line_pointer
;
860 else if (!reg_names_p
|| !ISALPHA (name
[0]))
863 c
= get_symbol_name (&name
);
864 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
866 /* Put back the delimiting char. */
867 *input_line_pointer
= c
;
869 /* Look to see if it's in the register table. */
872 expressionP
->X_op
= O_register
;
873 expressionP
->X_add_number
= reg
->value
;
874 expressionP
->X_md
= reg
->flags
;
876 /* Make the rest nice. */
877 expressionP
->X_add_symbol
= NULL
;
878 expressionP
->X_op_symbol
= NULL
;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer
= start
;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand
;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names
[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG
},
898 { "cr1", 1, PPC_OPERAND_CR_REG
},
899 { "cr2", 2, PPC_OPERAND_CR_REG
},
900 { "cr3", 3, PPC_OPERAND_CR_REG
},
901 { "cr4", 4, PPC_OPERAND_CR_REG
},
902 { "cr5", 5, PPC_OPERAND_CR_REG
},
903 { "cr6", 6, PPC_OPERAND_CR_REG
},
904 { "cr7", 7, PPC_OPERAND_CR_REG
},
905 { "eq", 2, PPC_OPERAND_CR_BIT
},
906 { "gt", 1, PPC_OPERAND_CR_BIT
},
907 { "lt", 0, PPC_OPERAND_CR_BIT
},
908 { "so", 3, PPC_OPERAND_CR_BIT
},
909 { "un", 3, PPC_OPERAND_CR_BIT
}
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name
, expressionS
*exp
)
918 const struct pd_reg
*reg
;
925 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
930 exp
->X_op
= O_register
;
931 exp
->X_add_number
= reg
->value
;
932 exp
->X_md
= reg
->flags
;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right
->X_op
== O_register
946 && right
->X_md
== PPC_OPERAND_CR_REG
947 && left
->X_op
== O_constant
948 && left
->X_add_number
== 4)
949 || (left
->X_op
== O_register
950 && left
->X_md
== PPC_OPERAND_CR_REG
951 && right
->X_op
== O_constant
952 && right
->X_add_number
== 4)))
954 left
->X_op
= O_register
;
955 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
956 left
->X_add_number
*= right
->X_add_number
;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right
->X_op
== O_register
962 && left
->X_op
== O_register
964 && ((right
->X_md
== PPC_OPERAND_CR_BIT
965 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
966 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
967 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
969 left
->X_md
= PPC_OPERAND_CR_BIT
;
970 right
->X_op
= O_constant
;
974 /* Accept reg +/- constant. */
975 if (left
->X_op
== O_register
976 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right
->X_op
== O_register
)
982 if (op
== O_add
&& left
->X_op
== O_constant
)
983 left
->X_md
= right
->X_md
;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
996 /* Opcode hash table. */
997 static struct hash_control
*ppc_hash
;
999 /* Macro hash table. */
1000 static struct hash_control
*ppc_macro_hash
;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags
= 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris
= SOLARIS_P
;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment
= 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS
*ppc_text_csects
;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment
= 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS
*ppc_data_csects
;
1039 /* The current csect. */
1040 static symbolS
*ppc_current_csect
;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS
*ppc_toc_csect
;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS
*ppc_toc_frag
;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS
*ppc_after_toc_frag
;
1056 /* The current static block. */
1057 static symbolS
*ppc_current_block
;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection
*ppc_coff_debug_section
;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection
{
1066 /* Subsections are simply linked. */
1067 struct dw_subsection
*link
;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp
;
1076 static struct dw_section
{
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection
*list_subseg
;
1083 /* The anonymous subsection. */
1084 struct dw_subsection
*anon_subseg
;
1085 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section
;
1092 static segT pdata_section
;
1093 static segT reldata_section
;
1094 static segT rdata_section
;
1095 static segT tocdata_section
;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section
;
1099 static segT ppc_current_section
;
1104 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list
;
1106 unsigned int ppc_apuinfo_num
;
1107 unsigned int ppc_apuinfo_num_alloc
;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1113 const char *const md_shortopts
= "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts
[] = {
1117 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1118 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1119 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1120 {NULL
, no_argument
, NULL
, 0}
1122 const size_t md_longopts_size
= sizeof (md_longopts
);
1125 md_parse_option (int c
, const char *arg
)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg
, "e") == 0)
1142 target_big_endian
= 0;
1143 set_target_endian
= 1;
1144 if (ppc_cpu
& PPC_OPCODE_VLE
)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg
, "e") == 0)
1155 target_big_endian
= 1;
1156 set_target_endian
= 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1168 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg
, "64") == 0)
1182 if (ppc_cpu
& PPC_OPCODE_VLE
)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg
, "32") == 0)
1195 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1200 if (strcmp (arg
, "vle") == 0)
1202 if (set_target_endian
&& target_big_endian
== 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1205 as_bad (_("the use of -mvle requires -a32."));
1209 else if (strcmp (arg
, "no-vle") == 0)
1211 sticky
&= ~PPC_OPCODE_VLE
;
1213 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1214 new_cpu
&= ~PPC_OPCODE_VLE
;
1219 else if (strcmp (arg
, "regnames") == 0)
1222 else if (strcmp (arg
, "no-regnames") == 0)
1223 reg_names_p
= FALSE
;
1226 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1227 that require relocation. */
1228 else if (strcmp (arg
, "relocatable") == 0)
1230 shlib
= SHLIB_MRELOCATABLE
;
1231 ppc_flags
|= EF_PPC_RELOCATABLE
;
1234 else if (strcmp (arg
, "relocatable-lib") == 0)
1236 shlib
= SHLIB_MRELOCATABLE
;
1237 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1240 /* -memb, set embedded bit. */
1241 else if (strcmp (arg
, "emb") == 0)
1242 ppc_flags
|= EF_PPC_EMB
;
1244 /* -mlittle/-mbig set the endianness. */
1245 else if (strcmp (arg
, "little") == 0
1246 || strcmp (arg
, "little-endian") == 0)
1248 target_big_endian
= 0;
1249 set_target_endian
= 1;
1250 if (ppc_cpu
& PPC_OPCODE_VLE
)
1251 as_bad (_("the use of -mvle requires big endian."));
1254 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1256 target_big_endian
= 1;
1257 set_target_endian
= 1;
1260 else if (strcmp (arg
, "solaris") == 0)
1263 ppc_comment_chars
= ppc_solaris_comment_chars
;
1266 else if (strcmp (arg
, "no-solaris") == 0)
1269 ppc_comment_chars
= ppc_eabi_comment_chars
;
1271 else if (strcmp (arg
, "spe2") == 0)
1273 ppc_cpu
|= PPC_OPCODE_SPE2
;
1278 as_bad (_("invalid switch -m%s"), arg
);
1284 /* -V: SVR4 argument to print version ID. */
1286 print_version_id ();
1289 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1290 should be emitted or not. FIXME: Not implemented. */
1294 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1295 rather than .stabs.excl, which is ignored by the linker.
1296 FIXME: Not implemented. */
1307 nop_limit
= strtoul (optarg
, &end
, 0);
1309 as_bad (_("--nops needs a numeric argument"));
1324 md_show_usage (FILE *stream
)
1326 fprintf (stream
, _("\
1328 -a32 generate ELF32/XCOFF32\n\
1329 -a64 generate ELF64/XCOFF64\n\
1331 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1332 -mpwr generate code for POWER (RIOS1)\n\
1333 -m601 generate code for PowerPC 601\n\
1334 -mppc, -mppc32, -m603, -m604\n\
1335 generate code for PowerPC 603/604\n\
1336 -m403 generate code for PowerPC 403\n\
1337 -m405 generate code for PowerPC 405\n\
1338 -m440 generate code for PowerPC 440\n\
1339 -m464 generate code for PowerPC 464\n\
1340 -m476 generate code for PowerPC 476\n\
1341 -m7400, -m7410, -m7450, -m7455\n\
1342 generate code for PowerPC 7400/7410/7450/7455\n\
1343 -m750cl, -mgekko, -mbroadway\n\
1344 generate code for PowerPC 750cl/Gekko/Broadway\n\
1345 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1346 fprintf (stream
, _("\
1347 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1348 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1349 -mbooke generate code for 32-bit PowerPC BookE\n\
1350 -ma2 generate code for A2 architecture\n\
1351 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1352 -mpower5, -mpwr5, -mpwr5x\n\
1353 generate code for Power5 architecture\n\
1354 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1355 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1356 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1357 -mpower9, -mpwr9 generate code for Power9 architecture\n\
1358 -mcell generate code for Cell Broadband Engine architecture\n\
1359 -mcom generate code for Power/PowerPC common instructions\n\
1360 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1361 fprintf (stream
, _("\
1362 -maltivec generate code for AltiVec\n\
1363 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1364 -me300 generate code for PowerPC e300 family\n\
1365 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1366 -me500mc, generate code for Freescale e500mc core complex\n\
1367 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1368 -me5500, generate code for Freescale e5500 core complex\n\
1369 -me6500, generate code for Freescale e6500 core complex\n\
1370 -mspe generate code for Motorola SPE instructions\n\
1371 -mspe2 generate code for Freescale SPE2 instructions\n\
1372 -mvle generate code for Freescale VLE instructions\n\
1373 -mtitan generate code for AppliedMicro Titan core complex\n\
1374 -mregnames Allow symbolic names for registers\n\
1375 -mno-regnames Do not allow symbolic names for registers\n"));
1377 fprintf (stream
, _("\
1378 -mrelocatable support for GCC's -mrelocatble option\n\
1379 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1380 -memb set PPC_EMB bit in ELF flags\n\
1381 -mlittle, -mlittle-endian, -le\n\
1382 generate code for a little endian machine\n\
1383 -mbig, -mbig-endian, -be\n\
1384 generate code for a big endian machine\n\
1385 -msolaris generate code for Solaris\n\
1386 -mno-solaris do not generate code for Solaris\n\
1387 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1388 -V print assembler version number\n\
1389 -Qy, -Qn ignored\n"));
1391 fprintf (stream
, _("\
1392 -nops=count when aligning, more than COUNT nops uses a branch\n\
1393 -ppc476-workaround warn if emitting data to code sections\n"));
1396 /* Set ppc_cpu if it is not already set. */
1401 const char *default_os
= TARGET_OS
;
1402 const char *default_cpu
= TARGET_CPU
;
1404 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1407 if (target_big_endian
)
1408 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1410 /* The minimum supported cpu for 64-bit little-endian is power8. */
1411 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1412 else if (strncmp (default_os
, "aix", 3) == 0
1413 && default_os
[3] >= '4' && default_os
[3] <= '9')
1414 ppc_cpu
|= PPC_OPCODE_COMMON
;
1415 else if (strncmp (default_os
, "aix3", 4) == 0)
1416 ppc_cpu
|= PPC_OPCODE_POWER
;
1417 else if (strcmp (default_cpu
, "rs6000") == 0)
1418 ppc_cpu
|= PPC_OPCODE_POWER
;
1419 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1420 ppc_cpu
|= PPC_OPCODE_PPC
;
1422 as_fatal (_("unknown default cpu = %s, os = %s"),
1423 default_cpu
, default_os
);
1427 /* Figure out the BFD architecture to use. This function and ppc_mach
1428 are called well before md_begin, when the output file is opened. */
1430 enum bfd_architecture
1433 const char *default_cpu
= TARGET_CPU
;
1436 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1437 return bfd_arch_powerpc
;
1438 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1439 return bfd_arch_powerpc
;
1440 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1441 return bfd_arch_rs6000
;
1442 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1444 if (strcmp (default_cpu
, "rs6000") == 0)
1445 return bfd_arch_rs6000
;
1446 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1447 return bfd_arch_powerpc
;
1450 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1451 return bfd_arch_unknown
;
1458 return bfd_mach_ppc64
;
1459 else if (ppc_arch () == bfd_arch_rs6000
)
1460 return bfd_mach_rs6k
;
1461 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1462 return bfd_mach_ppc_titan
;
1463 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1464 return bfd_mach_ppc_vle
;
1466 return bfd_mach_ppc
;
1470 ppc_target_format (void)
1474 return target_big_endian
? "pe-powerpc" : "pe-powerpcle";
1476 return "xcoff-powermac";
1479 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1481 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1487 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1488 # elif defined (TE_VXWORKS)
1489 return "elf32-powerpc-vxworks";
1491 return (target_big_endian
1492 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1493 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1498 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1499 Return TRUE if there's a problem, otherwise FALSE. */
1502 insn_validate (const struct powerpc_opcode
*op
)
1504 const unsigned char *o
;
1505 uint64_t omask
= op
->mask
;
1507 /* The mask had better not trim off opcode bits. */
1508 if ((op
->opcode
& omask
) != op
->opcode
)
1510 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1514 /* The operands must not overlap the opcode or each other. */
1515 for (o
= op
->operands
; *o
; ++o
)
1517 bfd_boolean optional
= FALSE
;
1518 if (*o
>= num_powerpc_operands
)
1520 as_bad (_("operand index error for %s"), op
->name
);
1526 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1527 if (operand
->shift
== (int) PPC_OPSHIFT_INV
)
1534 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1536 else if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1538 mask
= (*operand
->insert
) (0, val
, ppc_cpu
, &errmsg
);
1540 else if (operand
->shift
>= 0)
1541 mask
= operand
->bitm
<< operand
->shift
;
1543 mask
= operand
->bitm
>> -operand
->shift
;
1546 as_bad (_("operand %d overlap in %s"),
1547 (int) (o
- op
->operands
), op
->name
);
1551 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
1555 as_bad (_("non-optional operand %d follows optional operand in %s"),
1556 (int) (o
- op
->operands
), op
->name
);
1564 /* Insert opcodes and macros into hash tables. Called at startup and
1565 for .machine pseudo. */
1568 ppc_setup_opcodes (void)
1570 const struct powerpc_opcode
*op
;
1571 const struct powerpc_opcode
*op_end
;
1572 const struct powerpc_macro
*macro
;
1573 const struct powerpc_macro
*macro_end
;
1574 bfd_boolean bad_insn
= FALSE
;
1576 if (ppc_hash
!= NULL
)
1577 hash_die (ppc_hash
);
1578 if (ppc_macro_hash
!= NULL
)
1579 hash_die (ppc_macro_hash
);
1581 /* Insert the opcodes into a hash table. */
1582 ppc_hash
= hash_new ();
1584 if (ENABLE_CHECKING
)
1588 /* An index into powerpc_operands is stored in struct fix
1589 fx_pcrel_adjust which is 8 bits wide. */
1590 gas_assert (num_powerpc_operands
< 256);
1592 /* Check operand masks. Code here and in the disassembler assumes
1593 all the 1's in the mask are contiguous. */
1594 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1596 uint64_t mask
= powerpc_operands
[i
].bitm
;
1600 right_bit
= mask
& -mask
;
1602 right_bit
= mask
& -mask
;
1603 if (mask
!= right_bit
)
1605 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1608 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1609 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1610 sizeof (powerpc_operands
[0])) == 0)
1612 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1619 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1620 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1622 if (ENABLE_CHECKING
)
1624 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1626 #ifdef PRINT_OPCODE_TABLE
1627 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1628 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1629 new_opcode
, (unsigned long long) op
->opcode
,
1630 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1633 /* The major opcodes had better be sorted. Code in the disassembler
1634 assumes the insns are sorted according to major opcode. */
1635 if (op
!= powerpc_opcodes
1636 && new_opcode
< PPC_OP (op
[-1].opcode
))
1638 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1642 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1644 as_bad (_("%s is enabled by vle flag"), op
->name
);
1647 if (PPC_OP (op
->opcode
) != 4
1648 && PPC_OP (op
->opcode
) != 31
1649 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1651 as_bad (_("%s not disabled by vle flag"), op
->name
);
1654 bad_insn
|= insn_validate (op
);
1657 if ((ppc_cpu
& op
->flags
) != 0
1658 && !(ppc_cpu
& op
->deprecated
))
1662 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1665 as_bad (_("duplicate instruction %s"),
1672 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1673 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1674 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1676 op_end
= prefix_opcodes
+ prefix_num_opcodes
;
1677 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1679 if (ENABLE_CHECKING
)
1681 unsigned int new_opcode
= PPC_PREFIX_SEG (op
[0].opcode
);
1683 #ifdef PRINT_OPCODE_TABLE
1684 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1685 op
->name
, (unsigned int) (op
- prefix_opcodes
),
1686 new_opcode
, (unsigned long long) op
->opcode
,
1687 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1690 /* The major opcodes had better be sorted. Code in the disassembler
1691 assumes the insns are sorted according to major opcode. */
1692 if (op
!= prefix_opcodes
1693 && new_opcode
< PPC_PREFIX_SEG (op
[-1].opcode
))
1695 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1698 bad_insn
|= insn_validate (op
);
1701 if ((ppc_cpu
& op
->flags
) != 0
1702 && !(ppc_cpu
& op
->deprecated
))
1706 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1709 as_bad (_("duplicate instruction %s"),
1716 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1717 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1718 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1720 op_end
= vle_opcodes
+ vle_num_opcodes
;
1721 for (op
= vle_opcodes
; op
< op_end
; op
++)
1723 if (ENABLE_CHECKING
)
1725 unsigned new_seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1727 #ifdef PRINT_OPCODE_TABLE
1728 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1729 op
->name
, (unsigned int) (op
- vle_opcodes
),
1730 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1731 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1734 /* The major opcodes had better be sorted. Code in the disassembler
1735 assumes the insns are sorted according to major opcode. */
1736 if (op
!= vle_opcodes
1737 && new_seg
< VLE_OP_TO_SEG (VLE_OP (op
[-1].opcode
, op
[-1].mask
)))
1739 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1743 bad_insn
|= insn_validate (op
);
1746 if ((ppc_cpu
& op
->flags
) != 0
1747 && !(ppc_cpu
& op
->deprecated
))
1751 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1754 as_bad (_("duplicate instruction %s"),
1761 /* SPE2 instructions */
1762 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1764 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1765 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1767 if (ENABLE_CHECKING
)
1769 if (op
!= spe2_opcodes
)
1771 unsigned old_seg
, new_seg
;
1773 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1774 old_seg
= VLE_OP_TO_SEG (old_seg
);
1775 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1776 new_seg
= VLE_OP_TO_SEG (new_seg
);
1778 /* The major opcodes had better be sorted. Code in the
1779 disassembler assumes the insns are sorted according to
1781 if (new_seg
< old_seg
)
1783 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1788 bad_insn
|= insn_validate (op
);
1791 if ((ppc_cpu
& op
->flags
) != 0 && !(ppc_cpu
& op
->deprecated
))
1795 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1798 as_bad (_("duplicate instruction %s"),
1805 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1806 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1809 /* Insert the macros into a hash table. */
1810 ppc_macro_hash
= hash_new ();
1812 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1813 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1815 if ((macro
->flags
& ppc_cpu
) != 0 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1819 retval
= hash_insert (ppc_macro_hash
, macro
->name
, (void *) macro
);
1820 if (retval
!= (const char *) NULL
)
1822 as_bad (_("duplicate macro %s"), macro
->name
);
1832 /* This function is called when the assembler starts up. It is called
1833 after the options have been parsed and the output file has been
1841 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1842 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1845 /* Set the ELF flags if desired. */
1846 if (ppc_flags
&& !msolaris
)
1847 bfd_set_private_flags (stdoutput
, ppc_flags
);
1850 ppc_setup_opcodes ();
1852 /* Tell the main code what the endianness is if it is not overridden
1854 if (!set_target_endian
)
1856 set_target_endian
= 1;
1857 target_big_endian
= PPC_BIG_ENDIAN
;
1861 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1863 /* Create dummy symbols to serve as initial csects. This forces the
1864 text csects to precede the data csects. These symbols will not
1866 ppc_text_csects
= symbol_make ("dummy\001");
1867 symbol_get_tc (ppc_text_csects
)->within
= ppc_text_csects
;
1868 ppc_data_csects
= symbol_make ("dummy\001");
1869 symbol_get_tc (ppc_data_csects
)->within
= ppc_data_csects
;
1874 ppc_current_section
= text_section
;
1875 ppc_previous_section
= 0;
1884 if (ppc_apuinfo_list
== NULL
)
1887 /* Ok, so write the section info out. We have this layout:
1891 0 8 length of "APUinfo\0"
1892 4 (n*4) number of APU's (4 bytes each)
1895 20 APU#1 first APU's info
1896 24 APU#2 second APU's info
1901 asection
*seg
= now_seg
;
1902 subsegT subseg
= now_subseg
;
1903 asection
*apuinfo_secp
= (asection
*) NULL
;
1906 /* Create the .PPC.EMB.apuinfo section. */
1907 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1908 bfd_set_section_flags (stdoutput
,
1910 SEC_HAS_CONTENTS
| SEC_READONLY
);
1913 md_number_to_chars (p
, (valueT
) 8, 4);
1916 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1919 md_number_to_chars (p
, (valueT
) 2, 4);
1922 strcpy (p
, APUINFO_LABEL
);
1924 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1927 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1930 frag_align (2, 0, 0);
1932 /* We probably can't restore the current segment, for there likely
1935 subseg_set (seg
, subseg
);
1940 /* Insert an operand value into an instruction. */
1943 ppc_insert_operand (uint64_t insn
,
1944 const struct powerpc_operand
*operand
,
1950 int64_t min
, max
, right
;
1952 max
= operand
->bitm
;
1956 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
1958 /* Extend the allowed range for addis to [-32768, 65535].
1959 Similarly for cmpli and some VLE high part insns. For 64-bit
1960 it would be good to disable this for signed fields since the
1961 value is sign extended into the high 32 bits of the register.
1962 If the value is, say, an address, then we might care about
1963 the high bits. However, gcc as of 2014-06 uses unsigned
1964 values when loading the high part of 64-bit constants using
1966 min
= ~(max
>> 1) & -right
;
1968 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
1970 max
= (max
>> 1) & -right
;
1971 min
= ~max
& -right
;
1974 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1977 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1986 /* Some people write constants with the sign extension done by
1987 hand but only up to 32 bits. This shouldn't really be valid,
1988 but, to permit this code to assemble on a 64-bit host, we
1989 sign extend the 32-bit value to 64 bits if so doing makes the
1992 && (val
- (1LL << 32)) >= min
1993 && (val
- (1LL << 32)) <= max
1994 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
1995 val
= val
- (1LL << 32);
1997 /* Similarly, people write expressions like ~(1<<15), and expect
1998 this to be OK for a 32-bit unsigned value. */
2000 && (val
+ (1LL << 32)) >= min
2001 && (val
+ (1LL << 32)) <= max
2002 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
2003 val
= val
+ (1LL << 32);
2007 || (val
& (right
- 1)) != 0)
2008 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
2011 if (operand
->insert
)
2016 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
2017 if (errmsg
!= (const char *) NULL
)
2018 as_bad_where (file
, line
, "%s", errmsg
);
2020 else if (operand
->shift
>= 0)
2021 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2023 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2030 /* Parse @got, etc. and return the desired relocation. */
2031 static bfd_reloc_code_real_type
2032 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
2036 unsigned int length
: 8;
2037 unsigned int valid32
: 1;
2038 unsigned int valid64
: 1;
2047 const struct map_bfd
*ptr
;
2049 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2050 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2051 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2053 static const struct map_bfd mapping
[] = {
2054 MAP ("l", BFD_RELOC_LO16
),
2055 MAP ("h", BFD_RELOC_HI16
),
2056 MAP ("ha", BFD_RELOC_HI16_S
),
2057 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2058 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2059 MAP ("got", BFD_RELOC_16_GOTOFF
),
2060 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2061 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2062 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2063 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2064 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2065 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2066 MAP ("copy", BFD_RELOC_PPC_COPY
),
2067 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2068 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2069 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2070 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2071 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2072 MAP ("tls", BFD_RELOC_PPC_TLS
),
2073 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2074 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2075 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2076 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2077 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2078 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2079 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2080 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2081 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2082 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2083 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2084 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2085 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2086 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2087 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2088 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2089 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2090 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2091 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2092 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2093 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2094 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2095 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2096 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2097 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2098 MAP32 ("fixup", BFD_RELOC_CTOR
),
2099 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2100 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2101 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2102 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2103 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2104 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2105 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2106 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2107 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2108 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2109 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2110 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2111 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2112 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2113 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2114 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2115 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2116 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2117 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2118 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2119 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2120 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2121 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2122 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2123 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2124 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2125 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2126 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2127 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2128 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2129 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2130 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2131 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2132 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2133 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2134 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2135 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2136 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2137 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2138 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2139 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2140 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2141 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2142 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2143 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2144 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2145 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2146 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2147 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2148 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2149 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2150 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC
),
2151 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2155 return BFD_RELOC_NONE
;
2157 for (ch
= *str
, str2
= ident
;
2158 (str2
< ident
+ sizeof (ident
) - 1
2159 && (ISALNUM (ch
) || ch
== '@'));
2162 *str2
++ = TOLOWER (ch
);
2169 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2170 if (ch
== ptr
->string
[0]
2171 && len
== ptr
->length
2172 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2173 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2175 int reloc
= ptr
->reloc
;
2177 if (!ppc_obj64
&& exp_p
->X_add_number
!= 0)
2181 case BFD_RELOC_16_GOTOFF
:
2182 case BFD_RELOC_LO16_GOTOFF
:
2183 case BFD_RELOC_HI16_GOTOFF
:
2184 case BFD_RELOC_HI16_S_GOTOFF
:
2185 as_warn (_("identifier+constant@got means "
2186 "identifier@got+constant"));
2189 case BFD_RELOC_PPC_GOT_TLSGD16
:
2190 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2191 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2192 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2193 case BFD_RELOC_PPC_GOT_TLSLD16
:
2194 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2195 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2196 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2197 case BFD_RELOC_PPC_GOT_DTPREL16
:
2198 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2199 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2200 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2201 case BFD_RELOC_PPC_GOT_TPREL16
:
2202 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2203 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2204 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2205 as_bad (_("symbol+offset not supported for got tls"));
2210 /* Now check for identifier@suffix+constant. */
2211 if (*str
== '-' || *str
== '+')
2213 char *orig_line
= input_line_pointer
;
2214 expressionS new_exp
;
2216 input_line_pointer
= str
;
2217 expression (&new_exp
);
2218 if (new_exp
.X_op
== O_constant
)
2220 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2221 str
= input_line_pointer
;
2224 if (&input_line_pointer
!= str_p
)
2225 input_line_pointer
= orig_line
;
2229 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2230 && exp_p
->X_op
== O_symbol
2231 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2233 /* Change the symbol so that the dummy .TOC. symbol can be
2234 omitted from the object file. */
2235 exp_p
->X_add_symbol
= &abs_symbol
;
2238 return (bfd_reloc_code_real_type
) reloc
;
2241 return BFD_RELOC_NONE
;
2244 /* Support @got, etc. on constants emitted via .short, .int etc. */
2246 bfd_reloc_code_real_type
2247 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2250 if (nbytes
>= 2 && *input_line_pointer
== '@')
2251 return ppc_elf_suffix (&input_line_pointer
, exp
);
2252 return BFD_RELOC_NONE
;
2255 /* Warn when emitting data to code sections, unless we are emitting
2256 a relocation that ld --ppc476-workaround uses to recognise data
2257 *and* there was an unconditional branch prior to the data. */
2260 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2261 unsigned int nbytes
, fixS
*fix
)
2264 && (now_seg
->flags
& SEC_CODE
) != 0
2267 || !(fix
->fx_r_type
== BFD_RELOC_32
2268 || fix
->fx_r_type
== BFD_RELOC_CTOR
2269 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2270 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2271 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2272 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2273 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2274 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2275 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2276 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2278 /* Flag that we've warned. */
2282 as_warn (_("data in executable section"));
2286 /* Solaris pseduo op to change to the .rodata section. */
2288 ppc_elf_rdata (int xxx
)
2290 char *save_line
= input_line_pointer
;
2291 static char section
[] = ".rodata\n";
2293 /* Just pretend this is .section .rodata */
2294 input_line_pointer
= section
;
2295 obj_elf_section (xxx
);
2297 input_line_pointer
= save_line
;
2300 /* Pseudo op to make file scope bss items. */
2302 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2315 c
= get_symbol_name (&name
);
2317 /* Just after name is now '\0'. */
2318 p
= input_line_pointer
;
2320 SKIP_WHITESPACE_AFTER_NAME ();
2321 if (*input_line_pointer
!= ',')
2323 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2324 ignore_rest_of_line ();
2328 input_line_pointer
++; /* skip ',' */
2329 if ((size
= get_absolute_expression ()) < 0)
2331 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2332 ignore_rest_of_line ();
2336 /* The third argument to .lcomm is the alignment. */
2337 if (*input_line_pointer
!= ',')
2341 ++input_line_pointer
;
2342 align
= get_absolute_expression ();
2345 as_warn (_("ignoring bad alignment"));
2351 symbolP
= symbol_find_or_make (name
);
2354 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2356 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2357 S_GET_NAME (symbolP
));
2358 ignore_rest_of_line ();
2362 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2364 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2365 S_GET_NAME (symbolP
),
2366 (long) S_GET_VALUE (symbolP
),
2369 ignore_rest_of_line ();
2375 old_subsec
= now_subseg
;
2378 /* Convert to a power of 2 alignment. */
2379 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2382 as_bad (_("common alignment not a power of 2"));
2383 ignore_rest_of_line ();
2390 record_alignment (bss_section
, align2
);
2391 subseg_set (bss_section
, 1);
2393 frag_align (align2
, 0, 0);
2394 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2395 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2396 symbol_set_frag (symbolP
, frag_now
);
2397 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2400 S_SET_SIZE (symbolP
, size
);
2401 S_SET_SEGMENT (symbolP
, bss_section
);
2402 subseg_set (old_sec
, old_subsec
);
2403 demand_empty_rest_of_line ();
2406 /* Pseudo op to set symbol local entry point. */
2408 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2411 char c
= get_symbol_name (&name
);
2416 elf_symbol_type
*elfsym
;
2418 p
= input_line_pointer
;
2420 SKIP_WHITESPACE_AFTER_NAME ();
2421 if (*input_line_pointer
!= ',')
2424 as_bad (_("expected comma after name `%s' in .localentry directive"),
2427 ignore_rest_of_line ();
2430 input_line_pointer
++;
2432 if (exp
.X_op
== O_absent
)
2434 as_bad (_("missing expression in .localentry directive"));
2435 exp
.X_op
= O_constant
;
2436 exp
.X_add_number
= 0;
2439 sym
= symbol_find_or_make (name
);
2442 if (resolve_expression (&exp
)
2443 && exp
.X_op
== O_constant
)
2445 unsigned int encoded
, ok
;
2448 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2449 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2452 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2453 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2455 as_bad (_(".localentry expression for `%s' "
2456 "is not a valid power of 2"), S_GET_NAME (sym
));
2462 bfdsym
= symbol_get_bfdsym (sym
);
2463 elfsym
= elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
2464 gas_assert (elfsym
);
2465 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2466 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2467 if (ppc_abiversion
== 0)
2472 as_bad (_(".localentry expression for `%s' "
2473 "does not evaluate to a constant"), S_GET_NAME (sym
));
2475 demand_empty_rest_of_line ();
2478 /* Pseudo op to set ABI version. */
2480 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2485 if (exp
.X_op
== O_absent
)
2487 as_bad (_("missing expression in .abiversion directive"));
2488 exp
.X_op
= O_constant
;
2489 exp
.X_add_number
= 0;
2492 if (resolve_expression (&exp
)
2493 && exp
.X_op
== O_constant
)
2494 ppc_abiversion
= exp
.X_add_number
;
2496 as_bad (_(".abiversion expression does not evaluate to a constant"));
2497 demand_empty_rest_of_line ();
2500 /* Parse a .gnu_attribute directive. */
2502 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2504 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2506 /* Check validity of defined powerpc tags. */
2507 if (tag
== Tag_GNU_Power_ABI_FP
2508 || tag
== Tag_GNU_Power_ABI_Vector
2509 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2513 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2515 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2516 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2517 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2518 as_warn (_("unknown .gnu_attribute value"));
2522 /* Set ABI version in output file. */
2526 if (ppc_obj64
&& ppc_abiversion
!= 0)
2528 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2529 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2533 /* Validate any relocations emitted for -mrelocatable, possibly adding
2534 fixups for word relocations in writable segments, so we can adjust
2537 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2539 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2548 case SHLIB_MRELOCATABLE
:
2549 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2550 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2551 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2552 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2553 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2554 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2555 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2556 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2557 && (seg
->flags
& SEC_LOAD
) != 0
2558 && strcmp (segment_name (seg
), ".got2") != 0
2559 && strcmp (segment_name (seg
), ".dtors") != 0
2560 && strcmp (segment_name (seg
), ".ctors") != 0
2561 && strcmp (segment_name (seg
), ".fixup") != 0
2562 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2563 && strcmp (segment_name (seg
), ".eh_frame") != 0
2564 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2566 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2567 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2569 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2570 _("relocation cannot be done when using -mrelocatable"));
2577 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2578 function descriptor sym if the corresponding code sym is used. */
2581 ppc_frob_file_before_adjust (void)
2589 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2595 name
= S_GET_NAME (symp
);
2599 if (! S_IS_WEAK (symp
)
2600 || S_IS_DEFINED (symp
))
2603 dotname
= concat (".", name
, (char *) NULL
);
2604 dotsym
= symbol_find_noref (dotname
, 1);
2606 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2607 || symbol_used_in_reloc_p (dotsym
)))
2608 symbol_mark_used (symp
);
2612 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2614 && toc_reloc_types
!= has_large_toc_reloc
2615 && bfd_section_size (stdoutput
, toc
) > 0x10000)
2616 as_warn (_("TOC section size exceeds 64k"));
2619 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2620 emitted. Other uses of .TOC. will cause the symbol to be marked
2621 with BSF_KEEP in md_apply_fix. */
2624 ppc_elf_adjust_symtab (void)
2629 symp
= symbol_find (".TOC.");
2632 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2633 if ((bsym
->flags
& BSF_KEEP
) == 0)
2634 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2638 #endif /* OBJ_ELF */
2643 * Summary of parse_toc_entry.
2645 * in: Input_line_pointer points to the '[' in one of:
2647 * [toc] [tocv] [toc32] [toc64]
2649 * Anything else is an error of one kind or another.
2652 * return value: success or failure
2653 * toc_kind: kind of toc reference
2654 * input_line_pointer:
2655 * success: first char after the ']'
2656 * failure: unchanged
2660 * [toc] - rv == success, toc_kind = default_toc
2661 * [tocv] - rv == success, toc_kind = data_in_toc
2662 * [toc32] - rv == success, toc_kind = must_be_32
2663 * [toc64] - rv == success, toc_kind = must_be_64
2667 enum toc_size_qualifier
2669 default_toc
, /* The toc cell constructed should be the system default size */
2670 data_in_toc
, /* This is a direct reference to a toc cell */
2671 must_be_32
, /* The toc cell constructed must be 32 bits wide */
2672 must_be_64
/* The toc cell constructed must be 64 bits wide */
2676 parse_toc_entry (enum toc_size_qualifier
*toc_kind
)
2681 enum toc_size_qualifier t
;
2683 /* Save the input_line_pointer. */
2684 start
= input_line_pointer
;
2686 /* Skip over the '[' , and whitespace. */
2687 ++input_line_pointer
;
2690 /* Find the spelling of the operand. */
2691 c
= get_symbol_name (&toc_spec
);
2693 if (strcmp (toc_spec
, "toc") == 0)
2697 else if (strcmp (toc_spec
, "tocv") == 0)
2701 else if (strcmp (toc_spec
, "toc32") == 0)
2705 else if (strcmp (toc_spec
, "toc64") == 0)
2711 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec
);
2712 *input_line_pointer
= c
;
2713 input_line_pointer
= start
;
2717 /* Now find the ']'. */
2718 *input_line_pointer
= c
;
2720 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2721 c
= *input_line_pointer
++; /* input_line_pointer->past char in c. */
2725 as_bad (_("syntax error: expected `]', found `%c'"), c
);
2726 input_line_pointer
= start
;
2735 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2736 /* See whether a symbol is in the TOC section. */
2739 ppc_is_toc_sym (symbolS
*sym
)
2742 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2743 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2746 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2748 return strcmp (sname
, ".toc") == 0;
2750 return strcmp (sname
, ".got") == 0;
2753 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2757 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2759 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2763 /* Check we don't already exist. */
2764 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2765 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2768 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2770 if (ppc_apuinfo_num_alloc
== 0)
2772 ppc_apuinfo_num_alloc
= 4;
2773 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2777 ppc_apuinfo_num_alloc
+= 4;
2778 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2779 ppc_apuinfo_num_alloc
);
2782 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2787 /* Various frobbings of labels and their addresses. */
2789 /* Symbols labelling the current insn. */
2790 struct insn_label_list
2792 struct insn_label_list
*next
;
2796 static struct insn_label_list
*insn_labels
;
2797 static struct insn_label_list
*free_insn_labels
;
2800 ppc_record_label (symbolS
*sym
)
2802 struct insn_label_list
*l
;
2804 if (free_insn_labels
== NULL
)
2805 l
= XNEW (struct insn_label_list
);
2808 l
= free_insn_labels
;
2809 free_insn_labels
= l
->next
;
2813 l
->next
= insn_labels
;
2818 ppc_clear_labels (void)
2820 while (insn_labels
!= NULL
)
2822 struct insn_label_list
*l
= insn_labels
;
2823 insn_labels
= l
->next
;
2824 l
->next
= free_insn_labels
;
2825 free_insn_labels
= l
;
2830 ppc_start_line_hook (void)
2832 ppc_clear_labels ();
2836 ppc_new_dot_label (symbolS
*sym
)
2838 ppc_record_label (sym
);
2840 /* Anchor this label to the current csect for relocations. */
2841 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2846 ppc_frob_label (symbolS
*sym
)
2848 ppc_record_label (sym
);
2851 /* Set the class of a label based on where it is defined. This handles
2852 symbols without suffixes. Also, move the symbol so that it follows
2853 the csect symbol. */
2854 if (ppc_current_csect
!= (symbolS
*) NULL
)
2856 if (symbol_get_tc (sym
)->symbol_class
== -1)
2857 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
2859 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
2860 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
2861 &symbol_rootP
, &symbol_lastP
);
2862 symbol_get_tc (ppc_current_csect
)->within
= sym
;
2863 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2868 dwarf2_emit_label (sym
);
2872 /* We need to keep a list of fixups. We can't simply generate them as
2873 we go, because that would require us to first create the frag, and
2874 that would screw up references to ``.''. */
2880 bfd_reloc_code_real_type reloc
;
2883 #define MAX_INSN_FIXUPS (5)
2885 /* Return the field size operated on by RELOC, and whether it is
2886 pc-relative in PC_RELATIVE. */
2889 fixup_size (bfd_reloc_code_real_type reloc
, bfd_boolean
*pc_relative
)
2891 unsigned int size
= 0;
2892 bfd_boolean pcrel
= FALSE
;
2896 /* This switch statement must handle all BFD_RELOC values
2897 possible in instruction fixups. As is, it handles all
2898 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
2899 bfd/coff-ppc, bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
2900 Overkill since data and marker relocs need not be handled
2901 here, but this way we can be sure a needed fixup reloc isn't
2902 accidentally omitted. */
2903 case BFD_RELOC_PPC_EMB_MRKREF
:
2904 case BFD_RELOC_VTABLE_ENTRY
:
2905 case BFD_RELOC_VTABLE_INHERIT
:
2913 case BFD_RELOC_16_BASEREL
:
2914 case BFD_RELOC_16_GOTOFF
:
2915 case BFD_RELOC_GPREL16
:
2916 case BFD_RELOC_HI16
:
2917 case BFD_RELOC_HI16_BASEREL
:
2918 case BFD_RELOC_HI16_GOTOFF
:
2919 case BFD_RELOC_HI16_PLTOFF
:
2920 case BFD_RELOC_HI16_S
:
2921 case BFD_RELOC_HI16_S_BASEREL
:
2922 case BFD_RELOC_HI16_S_GOTOFF
:
2923 case BFD_RELOC_HI16_S_PLTOFF
:
2924 case BFD_RELOC_LO16
:
2925 case BFD_RELOC_LO16_BASEREL
:
2926 case BFD_RELOC_LO16_GOTOFF
:
2927 case BFD_RELOC_LO16_PLTOFF
:
2928 case BFD_RELOC_PPC64_ADDR16_DS
:
2929 case BFD_RELOC_PPC64_ADDR16_HIGH
:
2930 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
2931 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
2932 case BFD_RELOC_PPC64_DTPREL16_DS
:
2933 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
2934 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
2935 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
2936 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
2937 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
2938 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
2939 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
2940 case BFD_RELOC_PPC64_GOT16_DS
:
2941 case BFD_RELOC_PPC64_GOT16_LO_DS
:
2942 case BFD_RELOC_PPC64_HIGHER
:
2943 case BFD_RELOC_PPC64_HIGHER_S
:
2944 case BFD_RELOC_PPC64_HIGHEST
:
2945 case BFD_RELOC_PPC64_HIGHEST_S
:
2946 case BFD_RELOC_PPC64_PLT16_LO_DS
:
2947 case BFD_RELOC_PPC64_PLTGOT16
:
2948 case BFD_RELOC_PPC64_PLTGOT16_DS
:
2949 case BFD_RELOC_PPC64_PLTGOT16_HA
:
2950 case BFD_RELOC_PPC64_PLTGOT16_HI
:
2951 case BFD_RELOC_PPC64_PLTGOT16_LO
:
2952 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
2953 case BFD_RELOC_PPC64_SECTOFF_DS
:
2954 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
2955 case BFD_RELOC_PPC64_TOC16_DS
:
2956 case BFD_RELOC_PPC64_TOC16_HA
:
2957 case BFD_RELOC_PPC64_TOC16_HI
:
2958 case BFD_RELOC_PPC64_TOC16_LO
:
2959 case BFD_RELOC_PPC64_TOC16_LO_DS
:
2960 case BFD_RELOC_PPC64_TPREL16_DS
:
2961 case BFD_RELOC_PPC64_TPREL16_HIGH
:
2962 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
2963 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
2964 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
2965 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
2966 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
2967 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
2969 case BFD_RELOC_PPC_BA16
:
2971 case BFD_RELOC_PPC_DTPREL16
:
2972 case BFD_RELOC_PPC_DTPREL16_HA
:
2973 case BFD_RELOC_PPC_DTPREL16_HI
:
2974 case BFD_RELOC_PPC_DTPREL16_LO
:
2975 case BFD_RELOC_PPC_EMB_NADDR16
:
2976 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
2977 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
2978 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
2979 case BFD_RELOC_PPC_EMB_RELSDA
:
2980 case BFD_RELOC_PPC_EMB_RELSEC16
:
2981 case BFD_RELOC_PPC_EMB_RELST_LO
:
2982 case BFD_RELOC_PPC_EMB_RELST_HI
:
2983 case BFD_RELOC_PPC_EMB_RELST_HA
:
2984 case BFD_RELOC_PPC_EMB_SDA2I16
:
2985 case BFD_RELOC_PPC_EMB_SDA2REL
:
2986 case BFD_RELOC_PPC_EMB_SDAI16
:
2987 case BFD_RELOC_PPC_GOT_DTPREL16
:
2988 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2989 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2990 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2991 case BFD_RELOC_PPC_GOT_TLSGD16
:
2992 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2993 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2994 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2995 case BFD_RELOC_PPC_GOT_TLSLD16
:
2996 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2997 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2998 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2999 case BFD_RELOC_PPC_GOT_TPREL16
:
3000 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
3001 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
3002 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3003 case BFD_RELOC_PPC_TOC16
:
3004 case BFD_RELOC_PPC_TPREL16
:
3005 case BFD_RELOC_PPC_TPREL16_HA
:
3006 case BFD_RELOC_PPC_TPREL16_HI
:
3007 case BFD_RELOC_PPC_TPREL16_LO
:
3011 case BFD_RELOC_16_PCREL
:
3012 case BFD_RELOC_HI16_PCREL
:
3013 case BFD_RELOC_HI16_S_PCREL
:
3014 case BFD_RELOC_LO16_PCREL
:
3015 case BFD_RELOC_PPC64_REL16_HIGH
:
3016 case BFD_RELOC_PPC64_REL16_HIGHA
:
3017 case BFD_RELOC_PPC64_REL16_HIGHER
:
3018 case BFD_RELOC_PPC64_REL16_HIGHERA
:
3019 case BFD_RELOC_PPC64_REL16_HIGHEST
:
3020 case BFD_RELOC_PPC64_REL16_HIGHESTA
:
3022 case BFD_RELOC_PPC_B16
:
3024 case BFD_RELOC_PPC_VLE_REL8
:
3029 case BFD_RELOC_16_GOT_PCREL
: /* coff reloc, bad name re size. */
3031 case BFD_RELOC_32_GOTOFF
:
3032 case BFD_RELOC_32_PLTOFF
:
3034 case BFD_RELOC_CTOR
:
3036 case BFD_RELOC_PPC64_ENTRY
:
3037 case BFD_RELOC_PPC_16DX_HA
:
3039 case BFD_RELOC_PPC_BA16
:
3041 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
3042 case BFD_RELOC_PPC_BA16_BRTAKEN
:
3043 case BFD_RELOC_PPC_BA26
:
3044 case BFD_RELOC_PPC_EMB_BIT_FLD
:
3045 case BFD_RELOC_PPC_EMB_NADDR32
:
3046 case BFD_RELOC_PPC_EMB_SDA21
:
3047 case BFD_RELOC_PPC_TLS
:
3048 case BFD_RELOC_PPC_TLSGD
:
3049 case BFD_RELOC_PPC_TLSLD
:
3050 case BFD_RELOC_PPC_VLE_HA16A
:
3051 case BFD_RELOC_PPC_VLE_HA16D
:
3052 case BFD_RELOC_PPC_VLE_HI16A
:
3053 case BFD_RELOC_PPC_VLE_HI16D
:
3054 case BFD_RELOC_PPC_VLE_LO16A
:
3055 case BFD_RELOC_PPC_VLE_LO16D
:
3056 case BFD_RELOC_PPC_VLE_SDA21
:
3057 case BFD_RELOC_PPC_VLE_SDA21_LO
:
3058 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3059 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
3060 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3061 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
3062 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3063 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
3068 case BFD_RELOC_24_PLT_PCREL
:
3069 case BFD_RELOC_32_PCREL
:
3070 case BFD_RELOC_32_PLT_PCREL
:
3071 case BFD_RELOC_PPC64_REL24_NOTOC
:
3073 case BFD_RELOC_PPC_B16
:
3075 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3076 case BFD_RELOC_PPC_B16_BRTAKEN
:
3077 case BFD_RELOC_PPC_B26
:
3078 case BFD_RELOC_PPC_LOCAL24PC
:
3079 case BFD_RELOC_PPC_REL16DX_HA
:
3080 case BFD_RELOC_PPC_VLE_REL15
:
3081 case BFD_RELOC_PPC_VLE_REL24
:
3087 case BFD_RELOC_CTOR
:
3089 case BFD_RELOC_PPC_COPY
:
3090 case BFD_RELOC_PPC_DTPMOD
:
3091 case BFD_RELOC_PPC_DTPREL
:
3092 case BFD_RELOC_PPC_GLOB_DAT
:
3093 case BFD_RELOC_PPC_TPREL
:
3094 size
= ppc_obj64
? 8 : 4;
3098 case BFD_RELOC_64_PLTOFF
:
3099 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
3100 case BFD_RELOC_PPC64_TOC
:
3104 case BFD_RELOC_64_PCREL
:
3105 case BFD_RELOC_64_PLT_PCREL
:
3114 if (ENABLE_CHECKING
)
3116 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
3117 if (reloc_howto
!= NULL
3118 && (size
!= bfd_get_reloc_size (reloc_howto
)
3119 || pcrel
!= reloc_howto
->pc_relative
))
3121 as_bad (_("%s howto doesn't match size/pcrel in gas"),
3126 *pc_relative
= pcrel
;
3131 /* If we have parsed a call to __tls_get_addr, parse an argument like
3132 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg
3133 is successfully parsed, *STR is updated past the trailing
3134 parenthesis and trailing white space, and *TLS_FIX contains the
3135 reloc and arg expression. */
3138 parse_tls_arg (char **str
, const expressionS
*exp
, struct ppc_fixup
*tls_fix
)
3140 const char *sym_name
= S_GET_NAME (exp
->X_add_symbol
);
3141 if (sym_name
[0] == '.')
3144 tls_fix
->reloc
= BFD_RELOC_NONE
;
3145 if (strcasecmp (sym_name
, "__tls_get_addr") == 0)
3147 char *hold
= input_line_pointer
;
3148 input_line_pointer
= *str
+ 1;
3149 expression (&tls_fix
->exp
);
3150 if (tls_fix
->exp
.X_op
== O_symbol
)
3152 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3153 tls_fix
->reloc
= BFD_RELOC_PPC_TLSGD
;
3154 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3155 tls_fix
->reloc
= BFD_RELOC_PPC_TLSLD
;
3156 if (tls_fix
->reloc
!= BFD_RELOC_NONE
)
3158 input_line_pointer
+= 7;
3160 *str
= input_line_pointer
;
3163 input_line_pointer
= hold
;
3165 return tls_fix
->reloc
!= BFD_RELOC_NONE
;
3169 /* This routine is called for each instruction to be assembled. */
3172 md_assemble (char *str
)
3175 const struct powerpc_opcode
*opcode
;
3177 const unsigned char *opindex_ptr
;
3180 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
3185 unsigned int insn_length
;
3187 /* Get the opcode. */
3188 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
3193 /* Look up the opcode in the hash table. */
3194 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, str
);
3195 if (opcode
== (const struct powerpc_opcode
*) NULL
)
3197 const struct powerpc_macro
*macro
;
3199 macro
= (const struct powerpc_macro
*) hash_find (ppc_macro_hash
, str
);
3200 if (macro
== (const struct powerpc_macro
*) NULL
)
3201 as_bad (_("unrecognized opcode: `%s'"), str
);
3203 ppc_macro (s
, macro
);
3205 ppc_clear_labels ();
3209 insn
= opcode
->opcode
;
3212 while (ISSPACE (*str
))
3215 /* PowerPC operands are just expressions. The only real issue is
3216 that a few operand types are optional. If an instruction has
3217 multiple optional operands and one is omitted, then all optional
3218 operands past the first omitted one must also be omitted. */
3219 int num_optional_operands
= 0;
3220 int num_optional_provided
= 0;
3222 /* Gather the operands. */
3226 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
3228 const struct powerpc_operand
*operand
;
3234 if (next_opindex
== 0)
3235 operand
= &powerpc_operands
[*opindex_ptr
];
3238 operand
= &powerpc_operands
[next_opindex
];
3243 /* If this is an optional operand, and we are skipping it, just
3244 insert the default value, usually a zero. */
3245 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3246 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
3248 if (num_optional_operands
== 0)
3250 const unsigned char *optr
;
3256 for (optr
= opindex_ptr
; *optr
!= 0; optr
++)
3258 const struct powerpc_operand
*op
;
3259 op
= &powerpc_operands
[*optr
];
3263 if ((op
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3264 && !((op
->flags
& PPC_OPERAND_OPTIONAL32
) != 0
3266 ++num_optional_operands
;
3268 if (s
!= NULL
&& *s
!= '\0')
3272 /* Look for the start of the next operand. */
3273 if ((op
->flags
& PPC_OPERAND_PARENS
) != 0)
3274 s
= strpbrk (s
, "(,");
3276 s
= strchr (s
, ',');
3282 omitted
= total
- provided
;
3283 num_optional_provided
= num_optional_operands
- omitted
;
3285 if (--num_optional_provided
< 0)
3287 int64_t val
= ppc_optional_operand_value (operand
, insn
, ppc_cpu
,
3288 num_optional_provided
);
3289 if (operand
->insert
)
3291 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
3292 if (errmsg
!= (const char *) NULL
)
3293 as_bad ("%s", errmsg
);
3295 else if (operand
->shift
>= 0)
3296 insn
|= (val
& operand
->bitm
) << operand
->shift
;
3298 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
3300 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
3301 next_opindex
= *opindex_ptr
+ 1;
3306 /* Gather the operand. */
3307 hold
= input_line_pointer
;
3308 input_line_pointer
= str
;
3311 if (*input_line_pointer
== '[')
3313 /* We are expecting something like the second argument here:
3315 * lwz r4,[toc].GS.0.static_int(rtoc)
3316 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
3317 * The argument following the `]' must be a symbol name, and the
3318 * register must be the toc register: 'rtoc' or '2'
3320 * The effect is to 0 as the displacement field
3321 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
3322 * the appropriate variation) reloc against it based on the symbol.
3323 * The linker will build the toc, and insert the resolved toc offset.
3326 * o The size of the toc entry is currently assumed to be
3327 * 32 bits. This should not be assumed to be a hard coded
3329 * o In an effort to cope with a change from 32 to 64 bits,
3330 * there are also toc entries that are specified to be
3331 * either 32 or 64 bits:
3332 * lwz r4,[toc32].GS.0.static_int(rtoc)
3333 * lwz r4,[toc64].GS.0.static_int(rtoc)
3334 * These demand toc entries of the specified size, and the
3335 * instruction probably requires it.
3339 enum toc_size_qualifier toc_kind
;
3340 bfd_reloc_code_real_type toc_reloc
;
3342 /* Go parse off the [tocXX] part. */
3343 valid_toc
= parse_toc_entry (&toc_kind
);
3347 ignore_rest_of_line ();
3351 /* Now get the symbol following the ']'. */
3357 /* In this case, we may not have seen the symbol yet,
3358 since it is allowed to appear on a .extern or .globl
3359 or just be a label in the .data section. */
3360 toc_reloc
= BFD_RELOC_PPC_TOC16
;
3363 /* 1. The symbol must be defined and either in the toc
3364 section, or a global.
3365 2. The reloc generated must have the TOCDEFN flag set
3366 in upper bit mess of the reloc type.
3367 FIXME: It's a little confusing what the tocv
3368 qualifier can be used for. At the very least, I've
3369 seen three uses, only one of which I'm sure I can
3371 if (ex
.X_op
== O_symbol
)
3373 gas_assert (ex
.X_add_symbol
!= NULL
);
3374 if (symbol_get_bfdsym (ex
.X_add_symbol
)->section
3377 as_bad (_("[tocv] symbol is not a toc symbol"));
3381 toc_reloc
= BFD_RELOC_PPC_TOC16
;
3384 /* FIXME: these next two specifically specify 32/64 bit
3385 toc entries. We don't support them today. Is this
3386 the right way to say that? */
3387 toc_reloc
= BFD_RELOC_NONE
;
3388 as_bad (_("unimplemented toc32 expression modifier"));
3391 /* FIXME: see above. */
3392 toc_reloc
= BFD_RELOC_NONE
;
3393 as_bad (_("unimplemented toc64 expression modifier"));
3397 _("Unexpected return value [%d] from parse_toc_entry!\n"),
3403 /* We need to generate a fixup for this expression. */
3404 if (fc
>= MAX_INSN_FIXUPS
)
3405 as_fatal (_("too many fixups"));
3407 fixups
[fc
].reloc
= toc_reloc
;
3408 fixups
[fc
].exp
= ex
;
3409 fixups
[fc
].opindex
= *opindex_ptr
;
3412 /* Ok. We've set up the fixup for the instruction. Now make it
3413 look like the constant 0 was found here. */
3415 ex
.X_op
= O_constant
;
3416 ex
.X_add_number
= 0;
3417 ex
.X_add_symbol
= NULL
;
3418 ex
.X_op_symbol
= NULL
;
3425 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3426 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3427 || !register_name (&ex
))
3429 char save_lex
= lex_type
['%'];
3431 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3432 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3435 lex_type
['%'] |= LEX_BEGIN_NAME
;
3439 lex_type
['%'] = save_lex
;
3443 str
= input_line_pointer
;
3444 input_line_pointer
= hold
;
3446 if (ex
.X_op
== O_illegal
)
3447 as_bad (_("illegal operand"));
3448 else if (ex
.X_op
== O_absent
)
3449 as_bad (_("missing operand"));
3450 else if (ex
.X_op
== O_register
)
3454 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3455 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3456 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
)) != 0
3457 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3458 && ex
.X_add_number
!= 0
3459 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3460 as_warn (_("invalid register expression"));
3461 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3462 ppc_cpu
, (char *) NULL
, 0);
3464 else if (ex
.X_op
== O_constant
)
3467 /* Allow @HA, @L, @H on constants. */
3468 bfd_reloc_code_real_type reloc
;
3469 char *orig_str
= str
;
3471 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3478 case BFD_RELOC_LO16
:
3479 ex
.X_add_number
&= 0xffff;
3480 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3481 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3484 case BFD_RELOC_HI16
:
3485 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3487 /* PowerPC64 @h is tested for overflow. */
3488 ex
.X_add_number
= (addressT
) ex
.X_add_number
>> 16;
3489 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3491 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3493 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3499 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3500 ex
.X_add_number
= PPC_HI (ex
.X_add_number
);
3501 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3502 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3505 case BFD_RELOC_HI16_S
:
3506 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3508 /* PowerPC64 @ha is tested for overflow. */
3510 = ((addressT
) ex
.X_add_number
+ 0x8000) >> 16;
3511 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3513 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3515 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3521 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3522 ex
.X_add_number
= PPC_HA (ex
.X_add_number
);
3523 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3524 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3527 case BFD_RELOC_PPC64_HIGHER
:
3528 ex
.X_add_number
= PPC_HIGHER (ex
.X_add_number
);
3529 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3530 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3533 case BFD_RELOC_PPC64_HIGHER_S
:
3534 ex
.X_add_number
= PPC_HIGHERA (ex
.X_add_number
);
3535 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3536 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3539 case BFD_RELOC_PPC64_HIGHEST
:
3540 ex
.X_add_number
= PPC_HIGHEST (ex
.X_add_number
);
3541 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3542 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3545 case BFD_RELOC_PPC64_HIGHEST_S
:
3546 ex
.X_add_number
= PPC_HIGHESTA (ex
.X_add_number
);
3547 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3548 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3551 #endif /* OBJ_ELF */
3552 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3553 ppc_cpu
, (char *) NULL
, 0);
3557 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3559 /* Look for a __tls_get_addr arg using the insane old syntax. */
3560 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3561 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3563 fixups
[fc
].opindex
= *opindex_ptr
;
3567 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3569 /* If VLE-mode convert LO/HI/HA relocations. */
3570 if (opcode
->flags
& PPC_OPCODE_VLE
)
3572 uint64_t tmp_insn
= insn
& opcode
->mask
;
3574 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3575 || tmp_insn
== E_AND2I_DOT_INSN
3576 || tmp_insn
== E_OR2IS_INSN
3577 || tmp_insn
== E_LI_INSN
3578 || tmp_insn
== E_LIS_INSN
3579 || tmp_insn
== E_AND2IS_DOT_INSN
);
3582 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3583 || tmp_insn
== E_ADD2IS_INSN
3584 || tmp_insn
== E_CMP16I_INSN
3585 || tmp_insn
== E_MULL2I_INSN
3586 || tmp_insn
== E_CMPL16I_INSN
3587 || tmp_insn
== E_CMPH16I_INSN
3588 || tmp_insn
== E_CMPHL16I_INSN
);
3595 case BFD_RELOC_PPC_EMB_SDA21
:
3596 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3599 case BFD_RELOC_LO16
:
3601 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3602 else if (use_a_reloc
)
3603 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3606 case BFD_RELOC_HI16
:
3608 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3609 else if (use_a_reloc
)
3610 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3613 case BFD_RELOC_HI16_S
:
3615 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3616 else if (use_a_reloc
)
3617 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3620 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3622 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3625 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3627 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3630 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3632 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3637 /* TLS and other tweaks. */
3643 case BFD_RELOC_PPC_TLS
:
3644 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3645 as_bad (_("@tls may not be used with \"%s\" operands"),
3647 else if (operand
->shift
!= 11)
3648 as_bad (_("@tls may only be used in last operand"));
3650 insn
= ppc_insert_operand (insn
, operand
,
3652 ppc_cpu
, (char *) NULL
, 0);
3655 /* We'll only use the 32 (or 64) bit form of these relocations
3656 in constants. Instructions get the 16 bit form. */
3657 case BFD_RELOC_PPC_DTPREL
:
3658 reloc
= BFD_RELOC_PPC_DTPREL16
;
3661 case BFD_RELOC_PPC_TPREL
:
3662 reloc
= BFD_RELOC_PPC_TPREL16
;
3665 case BFD_RELOC_LO16
:
3666 if ((operand
->bitm
| 0xf) != 0xffff
3667 || operand
->shift
!= 0
3668 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3669 as_warn (_("%s unsupported on this instruction"), "@l");
3672 case BFD_RELOC_HI16
:
3673 if (operand
->bitm
!= 0xffff
3674 || operand
->shift
!= 0
3675 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3676 as_warn (_("%s unsupported on this instruction"), "@h");
3679 case BFD_RELOC_HI16_S
:
3680 if (operand
->bitm
== 0xffff
3681 && operand
->shift
== (int) PPC_OPSHIFT_INV
3682 && opcode
->opcode
== (19 << 26) + (2 << 1))
3684 reloc
= BFD_RELOC_PPC_16DX_HA
;
3685 else if (operand
->bitm
!= 0xffff
3686 || operand
->shift
!= 0
3687 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3688 as_warn (_("%s unsupported on this instruction"), "@ha");
3691 #endif /* OBJ_ELF */
3693 if (reloc
!= BFD_RELOC_NONE
)
3695 /* Determine a BFD reloc value based on the operand information.
3696 We are only prepared to turn a few of the operands into
3698 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3699 | PPC_OPERAND_ABSOLUTE
)) != 0
3700 && operand
->bitm
== 0x3fffffc
3701 && operand
->shift
== 0)
3702 reloc
= BFD_RELOC_PPC_B26
;
3703 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3704 | PPC_OPERAND_ABSOLUTE
)) != 0
3705 && operand
->bitm
== 0xfffc
3706 && operand
->shift
== 0)
3707 reloc
= BFD_RELOC_PPC_B16
;
3708 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3709 && operand
->bitm
== 0x1fe
3710 && operand
->shift
== -1)
3711 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3712 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3713 && operand
->bitm
== 0xfffe
3714 && operand
->shift
== 0)
3715 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3716 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3717 && operand
->bitm
== 0x1fffffe
3718 && operand
->shift
== 0)
3719 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3720 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3721 && (operand
->bitm
& 0xfff0) == 0xfff0
3722 && operand
->shift
== 0)
3724 reloc
= BFD_RELOC_16
;
3725 #if defined OBJ_XCOFF || defined OBJ_ELF
3726 /* Note: the symbol may be not yet defined. */
3727 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3728 && ppc_is_toc_sym (ex
.X_add_symbol
))
3730 reloc
= BFD_RELOC_PPC_TOC16
;
3732 as_warn (_("assuming %s on symbol"),
3733 ppc_obj64
? "@toc" : "@xgot");
3739 /* For the absolute forms of branches, convert the PC
3740 relative form back into the absolute. */
3741 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3745 case BFD_RELOC_PPC_B26
:
3746 reloc
= BFD_RELOC_PPC_BA26
;
3748 case BFD_RELOC_PPC_B16
:
3749 reloc
= BFD_RELOC_PPC_BA16
;
3752 case BFD_RELOC_PPC_B16_BRTAKEN
:
3753 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3755 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3756 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3767 case BFD_RELOC_PPC_TOC16
:
3768 toc_reloc_types
|= has_small_toc_reloc
;
3770 case BFD_RELOC_PPC64_TOC16_LO
:
3771 case BFD_RELOC_PPC64_TOC16_HI
:
3772 case BFD_RELOC_PPC64_TOC16_HA
:
3773 toc_reloc_types
|= has_large_toc_reloc
;
3780 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3785 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3787 case BFD_RELOC_LO16
:
3788 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3790 case BFD_RELOC_16_GOTOFF
:
3791 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3793 case BFD_RELOC_LO16_GOTOFF
:
3794 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3796 case BFD_RELOC_LO16_PLTOFF
:
3797 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3799 case BFD_RELOC_16_BASEREL
:
3800 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3802 case BFD_RELOC_LO16_BASEREL
:
3803 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3805 case BFD_RELOC_PPC_TOC16
:
3806 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3808 case BFD_RELOC_PPC64_TOC16_LO
:
3809 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3811 case BFD_RELOC_PPC64_PLTGOT16
:
3812 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3814 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3815 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3817 case BFD_RELOC_PPC_DTPREL16
:
3818 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3820 case BFD_RELOC_PPC_DTPREL16_LO
:
3821 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3823 case BFD_RELOC_PPC_TPREL16
:
3824 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3826 case BFD_RELOC_PPC_TPREL16_LO
:
3827 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3829 case BFD_RELOC_PPC_GOT_DTPREL16
:
3830 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3831 case BFD_RELOC_PPC_GOT_TPREL16
:
3832 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3835 as_bad (_("unsupported relocation for DS offset field"));
3840 /* Look for a __tls_get_addr arg after any __tls_get_addr
3841 modifiers like @plt. This fixup must be emitted before
3842 the usual call fixup. */
3843 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3844 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3846 fixups
[fc
].opindex
= *opindex_ptr
;
3851 /* We need to generate a fixup for this expression. */
3852 if (fc
>= MAX_INSN_FIXUPS
)
3853 as_fatal (_("too many fixups"));
3854 fixups
[fc
].exp
= ex
;
3855 fixups
[fc
].opindex
= *opindex_ptr
;
3856 fixups
[fc
].reloc
= reloc
;
3864 /* If expecting more operands, then we want to see "),". */
3865 if (*str
== endc
&& opindex_ptr
[1] != 0)
3869 while (ISSPACE (*str
));
3873 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3878 /* The call to expression should have advanced str past any
3886 else if (*str
!= '\0')
3888 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3891 else if (endc
== ')')
3893 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
3898 while (ISSPACE (*str
))
3902 as_bad (_("junk at end of line: `%s'"), str
);
3905 /* Do we need/want an APUinfo section? */
3906 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
3909 /* These are all version "1". */
3910 if (opcode
->flags
& PPC_OPCODE_SPE
)
3911 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
3912 if (opcode
->flags
& PPC_OPCODE_ISEL
)
3913 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
3914 if (opcode
->flags
& PPC_OPCODE_EFS
)
3915 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
3916 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
3917 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
3918 if (opcode
->flags
& PPC_OPCODE_PMR
)
3919 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
3920 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
3921 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
3922 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
3923 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
3924 /* Only set the VLE flag if the instruction has been pulled via
3925 the VLE instruction set. This way the flag is guaranteed to
3926 be set for VLE-only instructions or for VLE-only processors,
3927 however it'll remain clear for dual-mode instructions on
3928 dual-mode and, more importantly, standard-mode processors. */
3929 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
3931 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
3932 if (elf_section_data (now_seg
) != NULL
)
3933 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
3938 /* Write out the instruction. */
3941 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
3942 /* All instructions can start on a 2 byte boundary for VLE. */
3945 if (frag_now
->insn_addr
!= addr_mask
)
3947 /* Don't emit instructions to a frag started for data, or for a
3948 CPU differing in VLE mode. Data is allowed to be misaligned,
3949 and it's possible to start a new frag in the middle of
3951 frag_wane (frag_now
);
3955 /* Check that insns within the frag are aligned. ppc_frag_check
3956 will ensure that the frag start address is aligned. */
3957 if ((frag_now_fix () & addr_mask
) != 0)
3958 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
3960 /* Differentiate between two, four, and eight byte insns. */
3962 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
3964 else if ((opcode
->flags
& PPC_OPCODE_POWERXX
) != 0
3965 && PPC_PREFIX_P (insn
))
3967 struct insn_label_list
*l
;
3971 /* 8-byte prefix instructions are not allowed to cross 64-byte
3973 frag_align_code (6, 4);
3974 record_alignment (now_seg
, 6);
3976 /* Update "dot" in any expressions used by this instruction, and
3977 a label attached to the instruction. By "attached" we mean
3978 on the same source line as the instruction and without any
3979 intervening semicolons. */
3980 dot_value
= frag_now_fix ();
3981 dot_frag
= frag_now
;
3982 for (l
= insn_labels
; l
!= NULL
; l
= l
->next
)
3984 symbol_set_frag (l
->label
, dot_frag
);
3985 S_SET_VALUE (l
->label
, dot_value
);
3989 ppc_clear_labels ();
3991 f
= frag_more (insn_length
);
3992 frag_now
->insn_addr
= addr_mask
;
3994 /* The prefix part of an 8-byte instruction always occupies the lower
3995 addressed word in a doubleword, regardless of endianness. */
3996 if (!target_big_endian
&& insn_length
== 8)
3998 md_number_to_chars (f
, PPC_GET_PREFIX (insn
), 4);
3999 md_number_to_chars (f
+ 4, PPC_GET_SUFFIX (insn
), 4);
4002 md_number_to_chars (f
, insn
, insn_length
);
4006 last_subseg
= now_subseg
;
4009 dwarf2_emit_insn (insn_length
);
4012 /* Create any fixups. */
4013 for (i
= 0; i
< fc
; i
++)
4016 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
4019 unsigned int size
= fixup_size (fixups
[i
].reloc
, &pcrel
);
4020 int offset
= target_big_endian
? (insn_length
- size
) : 0;
4022 fixP
= fix_new_exp (frag_now
,
4023 f
- frag_now
->fr_literal
+ offset
,
4031 const struct powerpc_operand
*operand
;
4033 operand
= &powerpc_operands
[fixups
[i
].opindex
];
4034 fixP
= fix_new_exp (frag_now
,
4035 f
- frag_now
->fr_literal
,
4038 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
4041 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
4045 /* Handle a macro. Gather all the operands, transform them as
4046 described by the macro, and call md_assemble recursively. All the
4047 operands are separated by commas; we don't accept parentheses
4048 around operands here. */
4051 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
4062 /* Gather the users operands into the operands array. */
4067 if (count
>= sizeof operands
/ sizeof operands
[0])
4069 operands
[count
++] = s
;
4070 s
= strchr (s
, ',');
4071 if (s
== (char *) NULL
)
4076 if (count
!= macro
->operands
)
4078 as_bad (_("wrong number of operands"));
4082 /* Work out how large the string must be (the size is unbounded
4083 because it includes user input). */
4085 format
= macro
->format
;
4086 while (*format
!= '\0')
4095 arg
= strtol (format
+ 1, &send
, 10);
4096 know (send
!= format
&& arg
< count
);
4097 len
+= strlen (operands
[arg
]);
4102 /* Put the string together. */
4103 complete
= s
= XNEWVEC (char, len
+ 1);
4104 format
= macro
->format
;
4105 while (*format
!= '\0')
4111 arg
= strtol (format
+ 1, &send
, 10);
4112 strcpy (s
, operands
[arg
]);
4119 /* Assemble the constructed instruction. */
4120 md_assemble (complete
);
4125 /* For ELF, add support for SHT_ORDERED. */
4128 ppc_section_type (char *str
, size_t len
)
4130 if (len
== 7 && strncmp (str
, "ordered", 7) == 0)
4137 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
4139 if (type
== SHT_ORDERED
)
4140 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
4146 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
4151 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
4154 #endif /* OBJ_ELF */
4157 /* Pseudo-op handling. */
4159 /* The .byte pseudo-op. This is similar to the normal .byte
4160 pseudo-op, but it can also take a single ASCII string. */
4163 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
4167 if (*input_line_pointer
!= '\"')
4173 /* Gather characters. A real double quote is doubled. Unusual
4174 characters are not permitted. */
4175 ++input_line_pointer
;
4180 c
= *input_line_pointer
++;
4184 if (*input_line_pointer
!= '\"')
4186 ++input_line_pointer
;
4189 FRAG_APPEND_1_CHAR (c
);
4193 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
4194 as_warn (_("data in executable section"));
4195 demand_empty_rest_of_line ();
4200 /* XCOFF specific pseudo-op handling. */
4202 /* This is set if we are creating a .stabx symbol, since we don't want
4203 to handle symbol suffixes for such symbols. */
4204 static bfd_boolean ppc_stab_symbol
;
4206 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
4207 symbols in the .bss segment as though they were local common
4208 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
4209 aligns .comm and .lcomm to 4 bytes. */
4212 ppc_comm (int lcomm
)
4214 asection
*current_seg
= now_seg
;
4215 subsegT current_subseg
= now_subseg
;
4221 symbolS
*lcomm_sym
= NULL
;
4225 endc
= get_symbol_name (&name
);
4226 end_name
= input_line_pointer
;
4227 (void) restore_line_pointer (endc
);
4229 if (*input_line_pointer
!= ',')
4231 as_bad (_("missing size"));
4232 ignore_rest_of_line ();
4235 ++input_line_pointer
;
4237 size
= get_absolute_expression ();
4240 as_bad (_("negative size"));
4241 ignore_rest_of_line ();
4247 /* The third argument to .comm is the alignment. */
4248 if (*input_line_pointer
!= ',')
4252 ++input_line_pointer
;
4253 align
= get_absolute_expression ();
4256 as_warn (_("ignoring bad alignment"));
4266 /* The third argument to .lcomm appears to be the real local
4267 common symbol to create. References to the symbol named in
4268 the first argument are turned into references to the third
4270 if (*input_line_pointer
!= ',')
4272 as_bad (_("missing real symbol name"));
4273 ignore_rest_of_line ();
4276 ++input_line_pointer
;
4278 lcomm_endc
= get_symbol_name (&lcomm_name
);
4280 lcomm_sym
= symbol_find_or_make (lcomm_name
);
4282 (void) restore_line_pointer (lcomm_endc
);
4284 /* The fourth argument to .lcomm is the alignment. */
4285 if (*input_line_pointer
!= ',')
4294 ++input_line_pointer
;
4295 align
= get_absolute_expression ();
4298 as_warn (_("ignoring bad alignment"));
4305 sym
= symbol_find_or_make (name
);
4308 if (S_IS_DEFINED (sym
)
4309 || S_GET_VALUE (sym
) != 0)
4311 as_bad (_("attempt to redefine symbol"));
4312 ignore_rest_of_line ();
4316 record_alignment (bss_section
, align
);
4319 || ! S_IS_DEFINED (lcomm_sym
))
4328 S_SET_EXTERNAL (sym
);
4332 symbol_get_tc (lcomm_sym
)->output
= 1;
4333 def_sym
= lcomm_sym
;
4337 subseg_set (bss_section
, 1);
4338 frag_align (align
, 0, 0);
4340 symbol_set_frag (def_sym
, frag_now
);
4341 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
4342 def_size
, (char *) NULL
);
4344 S_SET_SEGMENT (def_sym
, bss_section
);
4345 symbol_get_tc (def_sym
)->align
= align
;
4349 /* Align the size of lcomm_sym. */
4350 symbol_get_frag (lcomm_sym
)->fr_offset
=
4351 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
4352 &~ ((1 << align
) - 1));
4353 if (align
> symbol_get_tc (lcomm_sym
)->align
)
4354 symbol_get_tc (lcomm_sym
)->align
= align
;
4359 /* Make sym an offset from lcomm_sym. */
4360 S_SET_SEGMENT (sym
, bss_section
);
4361 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
4362 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
4363 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
4366 subseg_set (current_seg
, current_subseg
);
4368 demand_empty_rest_of_line ();
4371 /* The .csect pseudo-op. This switches us into a different
4372 subsegment. The first argument is a symbol whose value is the
4373 start of the .csect. In COFF, csect symbols get special aux
4374 entries defined by the x_csect field of union internal_auxent. The
4375 optional second argument is the alignment (the default is 2). */
4378 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
4385 endc
= get_symbol_name (&name
);
4387 sym
= symbol_find_or_make (name
);
4389 (void) restore_line_pointer (endc
);
4391 if (S_GET_NAME (sym
)[0] == '\0')
4393 /* An unnamed csect is assumed to be [PR]. */
4394 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
4398 if (*input_line_pointer
== ',')
4400 ++input_line_pointer
;
4401 align
= get_absolute_expression ();
4404 ppc_change_csect (sym
, align
);
4406 demand_empty_rest_of_line ();
4409 /* Change to a different csect. */
4412 ppc_change_csect (symbolS
*sym
, offsetT align
)
4414 if (S_IS_DEFINED (sym
))
4415 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
4425 /* This is a new csect. We need to look at the symbol class to
4426 figure out whether it should go in the text section or the
4430 switch (symbol_get_tc (sym
)->symbol_class
)
4440 S_SET_SEGMENT (sym
, text_section
);
4441 symbol_get_tc (sym
)->subseg
= ppc_text_subsegment
;
4442 ++ppc_text_subsegment
;
4443 list_ptr
= &ppc_text_csects
;
4453 if (ppc_toc_csect
!= NULL
4454 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4455 == ppc_data_subsegment
))
4457 S_SET_SEGMENT (sym
, data_section
);
4458 symbol_get_tc (sym
)->subseg
= ppc_data_subsegment
;
4459 ++ppc_data_subsegment
;
4460 list_ptr
= &ppc_data_csects
;
4466 /* We set the obstack chunk size to a small value before
4467 changing subsegments, so that we don't use a lot of memory
4468 space for what may be a small section. */
4469 hold_chunksize
= chunksize
;
4472 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4473 symbol_get_tc (sym
)->subseg
);
4475 chunksize
= hold_chunksize
;
4478 ppc_after_toc_frag
= frag_now
;
4480 record_alignment (sec
, align
);
4482 frag_align_code (align
, 0);
4484 frag_align (align
, 0, 0);
4486 symbol_set_frag (sym
, frag_now
);
4487 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4489 symbol_get_tc (sym
)->align
= align
;
4490 symbol_get_tc (sym
)->output
= 1;
4491 symbol_get_tc (sym
)->within
= sym
;
4493 for (list
= *list_ptr
;
4494 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4495 list
= symbol_get_tc (list
)->next
)
4497 symbol_get_tc (list
)->next
= sym
;
4499 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4500 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4504 ppc_current_csect
= sym
;
4508 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4512 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4514 sec
= subseg_new (dw
->name
, subseg
);
4515 oldflags
= bfd_get_section_flags (stdoutput
, sec
);
4516 if (oldflags
== SEC_NO_FLAGS
)
4518 /* Just created section. */
4519 gas_assert (dw_sections
[idx
].sect
== NULL
);
4521 bfd_set_section_flags (stdoutput
, sec
, SEC_DEBUGGING
);
4522 bfd_set_section_alignment (stdoutput
, sec
, 0);
4523 dw_sections
[idx
].sect
= sec
;
4526 /* Not anymore in a csect. */
4527 ppc_current_csect
= NULL
;
4530 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4531 .dwsect flag [, opt-label ]
4535 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4539 const struct xcoff_dwsect_name
*dw
;
4540 struct dw_subsection
*subseg
;
4541 struct dw_section
*dws
;
4545 flag
= get_absolute_expression ();
4547 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4548 if (xcoff_dwsect_names
[i
].flag
== flag
)
4550 dw
= &xcoff_dwsect_names
[i
];
4554 /* Parse opt-label. */
4555 if (*input_line_pointer
== ',')
4560 ++input_line_pointer
;
4562 c
= get_symbol_name (&label
);
4563 opt_label
= symbol_find_or_make (label
);
4564 (void) restore_line_pointer (c
);
4569 demand_empty_rest_of_line ();
4571 /* Return now in case of unknown subsection. */
4574 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4579 /* Find the subsection. */
4580 dws
= &dw_sections
[i
];
4582 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4584 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4585 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4587 as_bad (_("label %s was not defined in this dwarf section"),
4588 S_GET_NAME (opt_label
));
4589 subseg
= dws
->anon_subseg
;
4593 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4598 /* Switch to the subsection. */
4599 ppc_change_debug_section (i
, subseg
->subseg
);
4603 /* Create a new dw subsection. */
4604 subseg
= XNEW (struct dw_subsection
);
4606 if (opt_label
== NULL
)
4608 /* The anonymous one. */
4610 subseg
->link
= NULL
;
4611 dws
->anon_subseg
= subseg
;
4616 if (dws
->list_subseg
!= NULL
)
4617 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4621 subseg
->link
= dws
->list_subseg
;
4622 dws
->list_subseg
= subseg
;
4623 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4626 ppc_change_debug_section (i
, subseg
->subseg
);
4630 /* Add the length field. */
4631 expressionS
*exp
= &subseg
->end_exp
;
4634 if (opt_label
!= NULL
)
4635 symbol_set_value_now (opt_label
);
4637 /* Add the length field. Note that according to the AIX assembler
4638 manual, the size of the length field is 4 for powerpc32 but
4639 12 for powerpc64. */
4642 /* Write the 64bit marker. */
4643 md_number_to_chars (frag_more (4), -1, 4);
4646 exp
->X_op
= O_subtract
;
4647 exp
->X_op_symbol
= symbol_temp_new_now ();
4648 exp
->X_add_symbol
= symbol_temp_make ();
4650 sz
= ppc_obj64
? 8 : 4;
4651 exp
->X_add_number
= -sz
;
4652 emit_expr (exp
, sz
);
4657 /* This function handles the .text and .data pseudo-ops. These
4658 pseudo-ops aren't really used by XCOFF; we implement them for the
4659 convenience of people who aren't used to XCOFF. */
4662 ppc_section (int type
)
4669 else if (type
== 'd')
4674 sym
= symbol_find_or_make (name
);
4676 ppc_change_csect (sym
, 2);
4678 demand_empty_rest_of_line ();
4681 /* This function handles the .section pseudo-op. This is mostly to
4682 give an error, since XCOFF only supports .text, .data and .bss, but
4683 we do permit the user to name the text or data section. */
4686 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4689 const char *real_name
;
4693 c
= get_symbol_name (&user_name
);
4695 if (strcmp (user_name
, ".text") == 0)
4696 real_name
= ".text[PR]";
4697 else if (strcmp (user_name
, ".data") == 0)
4698 real_name
= ".data[RW]";
4701 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4702 (void) restore_line_pointer (c
);
4703 ignore_rest_of_line ();
4707 (void) restore_line_pointer (c
);
4709 sym
= symbol_find_or_make (real_name
);
4711 ppc_change_csect (sym
, 2);
4713 demand_empty_rest_of_line ();
4716 /* The .extern pseudo-op. We create an undefined symbol. */
4719 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4724 endc
= get_symbol_name (&name
);
4726 (void) symbol_find_or_make (name
);
4728 (void) restore_line_pointer (endc
);
4730 demand_empty_rest_of_line ();
4733 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4736 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4742 endc
= get_symbol_name (&name
);
4744 sym
= symbol_find_or_make (name
);
4746 (void) restore_line_pointer (endc
);
4748 symbol_get_tc (sym
)->output
= 1;
4750 demand_empty_rest_of_line ();
4753 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4754 relocations at the beginning of the current csect.
4756 (In principle, there's no reason why the relocations _have_ to be at
4757 the beginning. Anywhere in the csect would do. However, inserting
4758 at the beginning is what the native assembler does, and it helps to
4759 deal with cases where the .ref statements follow the section contents.)
4761 ??? .refs don't work for empty .csects. However, the native assembler
4762 doesn't report an error in this case, and neither yet do we. */
4765 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4770 if (ppc_current_csect
== NULL
)
4772 as_bad (_(".ref outside .csect"));
4773 ignore_rest_of_line ();
4779 c
= get_symbol_name (&name
);
4781 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4782 symbol_find_or_make (name
), 0, FALSE
, BFD_RELOC_NONE
);
4784 *input_line_pointer
= c
;
4785 SKIP_WHITESPACE_AFTER_NAME ();
4786 c
= *input_line_pointer
;
4789 input_line_pointer
++;
4791 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4793 as_bad (_("missing symbol name"));
4794 ignore_rest_of_line ();
4801 demand_empty_rest_of_line ();
4804 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4805 although I don't know why it bothers. */
4808 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4815 endc
= get_symbol_name (&name
);
4817 sym
= symbol_find_or_make (name
);
4819 (void) restore_line_pointer (endc
);
4821 if (*input_line_pointer
!= ',')
4823 as_bad (_("missing rename string"));
4824 ignore_rest_of_line ();
4827 ++input_line_pointer
;
4829 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
4831 demand_empty_rest_of_line ();
4834 /* The .stabx pseudo-op. This is similar to a normal .stabs
4835 pseudo-op, but slightly different. A sample is
4836 .stabx "main:F-1",.main,142,0
4837 The first argument is the symbol name to create. The second is the
4838 value, and the third is the storage class. The fourth seems to be
4839 always zero, and I am assuming it is the type. */
4842 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
4849 name
= demand_copy_C_string (&len
);
4851 if (*input_line_pointer
!= ',')
4853 as_bad (_("missing value"));
4856 ++input_line_pointer
;
4858 ppc_stab_symbol
= TRUE
;
4859 sym
= symbol_make (name
);
4860 ppc_stab_symbol
= FALSE
;
4862 symbol_get_tc (sym
)->real_name
= name
;
4864 (void) expression (&exp
);
4871 as_bad (_("illegal .stabx expression; zero assumed"));
4872 exp
.X_add_number
= 0;
4875 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
4876 symbol_set_frag (sym
, &zero_address_frag
);
4880 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
4881 symbol_set_value_expression (sym
, &exp
);
4885 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
4886 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
4891 /* The value is some complex expression. This will probably
4892 fail at some later point, but this is probably the right
4893 thing to do here. */
4894 symbol_set_value_expression (sym
, &exp
);
4898 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4899 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4901 if (*input_line_pointer
!= ',')
4903 as_bad (_("missing class"));
4906 ++input_line_pointer
;
4908 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
4910 if (*input_line_pointer
!= ',')
4912 as_bad (_("missing type"));
4915 ++input_line_pointer
;
4917 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
4919 symbol_get_tc (sym
)->output
= 1;
4921 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
4926 .stabx "z",arrays_,133,0
4929 .comm arrays_,13768,3
4931 resolve_symbol_value will copy the exp's "within" into sym's when the
4932 offset is 0. Since this seems to be corner case problem,
4933 only do the correction for storage class C_STSYM. A better solution
4934 would be to have the tc field updated in ppc_symbol_new_hook. */
4936 if (exp
.X_op
== O_symbol
)
4938 if (ppc_current_block
== NULL
)
4939 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4941 symbol_get_tc (sym
)->within
= ppc_current_block
;
4942 symbol_get_tc (exp
.X_add_symbol
)->within
= ppc_current_block
;
4946 if (exp
.X_op
!= O_symbol
4947 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
4948 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
4949 ppc_frob_label (sym
);
4952 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4953 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
4954 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
4955 symbol_get_tc (ppc_current_csect
)->within
= sym
;
4958 demand_empty_rest_of_line ();
4961 /* The .function pseudo-op. This takes several arguments. The first
4962 argument seems to be the external name of the symbol. The second
4963 argument seems to be the label for the start of the function. gcc
4964 uses the same name for both. I have no idea what the third and
4965 fourth arguments are meant to be. The optional fifth argument is
4966 an expression for the size of the function. In COFF this symbol
4967 gets an aux entry like that used for a csect. */
4970 ppc_function (int ignore ATTRIBUTE_UNUSED
)
4978 endc
= get_symbol_name (&name
);
4980 /* Ignore any [PR] suffix. */
4981 name
= ppc_canonicalize_symbol_name (name
);
4982 s
= strchr (name
, '[');
4983 if (s
!= (char *) NULL
4984 && strcmp (s
+ 1, "PR]") == 0)
4987 ext_sym
= symbol_find_or_make (name
);
4989 (void) restore_line_pointer (endc
);
4991 if (*input_line_pointer
!= ',')
4993 as_bad (_("missing symbol name"));
4994 ignore_rest_of_line ();
4997 ++input_line_pointer
;
4999 endc
= get_symbol_name (&name
);
5001 lab_sym
= symbol_find_or_make (name
);
5003 (void) restore_line_pointer (endc
);
5005 if (ext_sym
!= lab_sym
)
5009 exp
.X_op
= O_symbol
;
5010 exp
.X_add_symbol
= lab_sym
;
5011 exp
.X_op_symbol
= NULL
;
5012 exp
.X_add_number
= 0;
5014 symbol_set_value_expression (ext_sym
, &exp
);
5017 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
5018 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
5019 symbol_get_tc (ext_sym
)->output
= 1;
5021 if (*input_line_pointer
== ',')
5025 /* Ignore the third argument. */
5026 ++input_line_pointer
;
5028 if (*input_line_pointer
== ',')
5030 /* Ignore the fourth argument. */
5031 ++input_line_pointer
;
5033 if (*input_line_pointer
== ',')
5035 /* The fifth argument is the function size. */
5036 ++input_line_pointer
;
5037 symbol_get_tc (ext_sym
)->u
.size
= symbol_new
5038 ("L0\001", absolute_section
,(valueT
) 0, &zero_address_frag
);
5039 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
5044 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5045 SF_SET_FUNCTION (ext_sym
);
5046 SF_SET_PROCESS (ext_sym
);
5047 coff_add_linesym (ext_sym
);
5049 demand_empty_rest_of_line ();
5052 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
5053 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
5054 with the correct line number */
5056 static symbolS
*saved_bi_sym
= 0;
5059 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
5063 sym
= symbol_make (".bf");
5064 S_SET_SEGMENT (sym
, text_section
);
5065 symbol_set_frag (sym
, frag_now
);
5066 S_SET_VALUE (sym
, frag_now_fix ());
5067 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5069 coff_line_base
= get_absolute_expression ();
5071 S_SET_NUMBER_AUXILIARY (sym
, 1);
5072 SA_SET_SYM_LNNO (sym
, coff_line_base
);
5074 /* Line number for bi. */
5077 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
5082 symbol_get_tc (sym
)->output
= 1;
5084 ppc_frob_label (sym
);
5086 demand_empty_rest_of_line ();
5089 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
5090 ".ef", except that the line number is absolute, not relative to the
5091 most recent ".bf" symbol. */
5094 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
5098 sym
= symbol_make (".ef");
5099 S_SET_SEGMENT (sym
, text_section
);
5100 symbol_set_frag (sym
, frag_now
);
5101 S_SET_VALUE (sym
, frag_now_fix ());
5102 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5103 S_SET_NUMBER_AUXILIARY (sym
, 1);
5104 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5105 symbol_get_tc (sym
)->output
= 1;
5107 ppc_frob_label (sym
);
5109 demand_empty_rest_of_line ();
5112 /* The .bi and .ei pseudo-ops. These take a string argument and
5113 generates a C_BINCL or C_EINCL symbol, which goes at the start of
5114 the symbol list. The value of .bi will be know when the next .bf
5120 static symbolS
*last_biei
;
5127 name
= demand_copy_C_string (&len
);
5129 /* The value of these symbols is actually file offset. Here we set
5130 the value to the index into the line number entries. In
5131 ppc_frob_symbols we set the fix_line field, which will cause BFD
5132 to do the right thing. */
5134 sym
= symbol_make (name
);
5135 /* obj-coff.c currently only handles line numbers correctly in the
5137 S_SET_SEGMENT (sym
, text_section
);
5138 S_SET_VALUE (sym
, coff_n_line_nos
);
5139 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5141 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
5142 symbol_get_tc (sym
)->output
= 1;
5150 for (look
= last_biei
? last_biei
: symbol_rootP
;
5151 (look
!= (symbolS
*) NULL
5152 && (S_GET_STORAGE_CLASS (look
) == C_FILE
5153 || S_GET_STORAGE_CLASS (look
) == C_BINCL
5154 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
5155 look
= symbol_next (look
))
5157 if (look
!= (symbolS
*) NULL
)
5159 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5160 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
5164 demand_empty_rest_of_line ();
5167 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
5168 There is one argument, which is a csect symbol. The value of the
5169 .bs symbol is the index of this csect symbol. */
5172 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
5179 if (ppc_current_block
!= NULL
)
5180 as_bad (_("nested .bs blocks"));
5182 endc
= get_symbol_name (&name
);
5184 csect
= symbol_find_or_make (name
);
5186 (void) restore_line_pointer (endc
);
5188 sym
= symbol_make (".bs");
5189 S_SET_SEGMENT (sym
, now_seg
);
5190 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
5191 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5192 symbol_get_tc (sym
)->output
= 1;
5194 symbol_get_tc (sym
)->within
= csect
;
5196 ppc_frob_label (sym
);
5198 ppc_current_block
= sym
;
5200 demand_empty_rest_of_line ();
5203 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
5206 ppc_es (int ignore ATTRIBUTE_UNUSED
)
5210 if (ppc_current_block
== NULL
)
5211 as_bad (_(".es without preceding .bs"));
5213 sym
= symbol_make (".es");
5214 S_SET_SEGMENT (sym
, now_seg
);
5215 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
5216 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5217 symbol_get_tc (sym
)->output
= 1;
5219 ppc_frob_label (sym
);
5221 ppc_current_block
= NULL
;
5223 demand_empty_rest_of_line ();
5226 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
5230 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
5234 sym
= symbol_make (".bb");
5235 S_SET_SEGMENT (sym
, text_section
);
5236 symbol_set_frag (sym
, frag_now
);
5237 S_SET_VALUE (sym
, frag_now_fix ());
5238 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5240 S_SET_NUMBER_AUXILIARY (sym
, 1);
5241 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5243 symbol_get_tc (sym
)->output
= 1;
5245 SF_SET_PROCESS (sym
);
5247 ppc_frob_label (sym
);
5249 demand_empty_rest_of_line ();
5252 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
5256 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
5260 sym
= symbol_make (".eb");
5261 S_SET_SEGMENT (sym
, text_section
);
5262 symbol_set_frag (sym
, frag_now
);
5263 S_SET_VALUE (sym
, frag_now_fix ());
5264 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5265 S_SET_NUMBER_AUXILIARY (sym
, 1);
5266 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5267 symbol_get_tc (sym
)->output
= 1;
5269 SF_SET_PROCESS (sym
);
5271 ppc_frob_label (sym
);
5273 demand_empty_rest_of_line ();
5276 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
5280 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
5286 name
= demand_copy_C_string (&len
);
5287 sym
= symbol_make (name
);
5288 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5289 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5290 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
5291 S_SET_VALUE (sym
, 0);
5292 symbol_get_tc (sym
)->output
= 1;
5294 ppc_frob_label (sym
);
5296 demand_empty_rest_of_line ();
5299 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
5302 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
5306 sym
= symbol_make (".ec");
5307 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5308 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5309 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
5310 S_SET_VALUE (sym
, 0);
5311 symbol_get_tc (sym
)->output
= 1;
5313 ppc_frob_label (sym
);
5315 demand_empty_rest_of_line ();
5318 /* The .toc pseudo-op. Switch to the .toc subsegment. */
5321 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
5323 if (ppc_toc_csect
!= (symbolS
*) NULL
)
5324 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
5331 subseg
= ppc_data_subsegment
;
5332 ++ppc_data_subsegment
;
5334 subseg_new (segment_name (data_section
), subseg
);
5335 ppc_toc_frag
= frag_now
;
5337 sym
= symbol_find_or_make ("TOC[TC0]");
5338 symbol_set_frag (sym
, frag_now
);
5339 S_SET_SEGMENT (sym
, data_section
);
5340 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5341 symbol_get_tc (sym
)->subseg
= subseg
;
5342 symbol_get_tc (sym
)->output
= 1;
5343 symbol_get_tc (sym
)->within
= sym
;
5345 ppc_toc_csect
= sym
;
5347 for (list
= ppc_data_csects
;
5348 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
5349 list
= symbol_get_tc (list
)->next
)
5351 symbol_get_tc (list
)->next
= sym
;
5353 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5354 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
5358 ppc_current_csect
= ppc_toc_csect
;
5360 demand_empty_rest_of_line ();
5363 /* The AIX assembler automatically aligns the operands of a .long or
5364 .short pseudo-op, and we want to be compatible. */
5367 ppc_xcoff_cons (int log_size
)
5369 frag_align (log_size
, 0, 0);
5370 record_alignment (now_seg
, log_size
);
5371 cons (1 << log_size
);
5375 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
5380 (void) expression (&exp
);
5382 if (exp
.X_op
!= O_constant
)
5384 as_bad (_("non-constant byte count"));
5388 byte_count
= exp
.X_add_number
;
5390 if (*input_line_pointer
!= ',')
5392 as_bad (_("missing value"));
5396 ++input_line_pointer
;
5401 ppc_xcoff_end (void)
5405 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
5407 struct dw_section
*dws
= &dw_sections
[i
];
5408 struct dw_subsection
*dwss
;
5410 if (dws
->anon_subseg
)
5412 dwss
= dws
->anon_subseg
;
5413 dwss
->link
= dws
->list_subseg
;
5416 dwss
= dws
->list_subseg
;
5418 for (; dwss
!= NULL
; dwss
= dwss
->link
)
5419 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
5421 subseg_set (dws
->sect
, dwss
->subseg
);
5422 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
5427 #endif /* OBJ_XCOFF */
5428 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5430 /* The .tc pseudo-op. This is used when generating either XCOFF or
5431 ELF. This takes two or more arguments.
5433 When generating XCOFF output, the first argument is the name to
5434 give to this location in the toc; this will be a symbol with class
5435 TC. The rest of the arguments are N-byte values to actually put at
5436 this location in the TOC; often there is just one more argument, a
5437 relocatable symbol reference. The size of the value to store
5438 depends on target word size. A 32-bit target uses 4-byte values, a
5439 64-bit target uses 8-byte values.
5441 When not generating XCOFF output, the arguments are the same, but
5442 the first argument is simply ignored. */
5445 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5449 /* Define the TOC symbol name. */
5455 if (ppc_toc_csect
== (symbolS
*) NULL
5456 || ppc_toc_csect
!= ppc_current_csect
)
5458 as_bad (_(".tc not in .toc section"));
5459 ignore_rest_of_line ();
5463 endc
= get_symbol_name (&name
);
5465 sym
= symbol_find_or_make (name
);
5467 (void) restore_line_pointer (endc
);
5469 if (S_IS_DEFINED (sym
))
5473 label
= symbol_get_tc (ppc_current_csect
)->within
;
5474 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5476 as_bad (_(".tc with no label"));
5477 ignore_rest_of_line ();
5481 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5482 symbol_set_frag (label
, symbol_get_frag (sym
));
5483 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5485 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5486 ++input_line_pointer
;
5491 S_SET_SEGMENT (sym
, now_seg
);
5492 symbol_set_frag (sym
, frag_now
);
5493 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5494 symbol_get_tc (sym
)->symbol_class
= XMC_TC
;
5495 symbol_get_tc (sym
)->output
= 1;
5497 ppc_frob_label (sym
);
5500 #endif /* OBJ_XCOFF */
5504 /* Skip the TOC symbol name. */
5505 while (is_part_of_name (*input_line_pointer
)
5506 || *input_line_pointer
== ' '
5507 || *input_line_pointer
== '['
5508 || *input_line_pointer
== ']'
5509 || *input_line_pointer
== '{'
5510 || *input_line_pointer
== '}')
5511 ++input_line_pointer
;
5513 /* Align to a four/eight byte boundary. */
5514 align
= ppc_obj64
? 3 : 2;
5515 frag_align (align
, 0, 0);
5516 record_alignment (now_seg
, align
);
5517 #endif /* OBJ_ELF */
5519 if (*input_line_pointer
!= ',')
5520 demand_empty_rest_of_line ();
5523 ++input_line_pointer
;
5524 cons (ppc_obj64
? 8 : 4);
5528 /* Pseudo-op .machine. */
5531 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5535 #define MAX_HISTORY 100
5536 static ppc_cpu_t
*cpu_history
;
5537 static int curr_hist
;
5541 c
= get_symbol_name (&cpu_string
);
5542 cpu_string
= xstrdup (cpu_string
);
5543 (void) restore_line_pointer (c
);
5545 if (cpu_string
!= NULL
)
5547 ppc_cpu_t old_cpu
= ppc_cpu
;
5551 for (p
= cpu_string
; *p
!= 0; p
++)
5554 if (strcmp (cpu_string
, "push") == 0)
5556 if (cpu_history
== NULL
)
5557 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5559 if (curr_hist
>= MAX_HISTORY
)
5560 as_bad (_(".machine stack overflow"));
5562 cpu_history
[curr_hist
++] = ppc_cpu
;
5564 else if (strcmp (cpu_string
, "pop") == 0)
5567 as_bad (_(".machine stack underflow"));
5569 ppc_cpu
= cpu_history
[--curr_hist
];
5571 else if ((new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, cpu_string
)) != 0)
5574 as_bad (_("invalid machine `%s'"), cpu_string
);
5576 if (ppc_cpu
!= old_cpu
)
5577 ppc_setup_opcodes ();
5580 demand_empty_rest_of_line ();
5582 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5586 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5588 /* Set the current section. */
5590 ppc_set_current_section (segT
new)
5592 ppc_previous_section
= ppc_current_section
;
5593 ppc_current_section
= new;
5596 /* pseudo-op: .previous
5597 behaviour: toggles the current section with the previous section.
5599 warnings: "No previous section" */
5602 ppc_previous (int ignore ATTRIBUTE_UNUSED
)
5604 if (ppc_previous_section
== NULL
)
5606 as_warn (_("no previous section to return to, ignored."));
5610 subseg_set (ppc_previous_section
, 0);
5612 ppc_set_current_section (ppc_previous_section
);
5615 /* pseudo-op: .pdata
5616 behaviour: predefined read only data section
5620 initial: .section .pdata "adr3"
5621 a - don't know -- maybe a misprint
5622 d - initialized data
5624 3 - double word aligned (that would be 4 byte boundary)
5627 Tag index tables (also known as the function table) for exception
5628 handling, debugging, etc. */
5631 ppc_pdata (int ignore ATTRIBUTE_UNUSED
)
5633 if (pdata_section
== 0)
5635 pdata_section
= subseg_new (".pdata", 0);
5637 bfd_set_section_flags (stdoutput
, pdata_section
,
5638 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5639 | SEC_READONLY
| SEC_DATA
));
5641 bfd_set_section_alignment (stdoutput
, pdata_section
, 2);
5645 pdata_section
= subseg_new (".pdata", 0);
5647 ppc_set_current_section (pdata_section
);
5650 /* pseudo-op: .ydata
5651 behaviour: predefined read only data section
5655 initial: .section .ydata "drw3"
5656 a - don't know -- maybe a misprint
5657 d - initialized data
5659 3 - double word aligned (that would be 4 byte boundary)
5661 Tag tables (also known as the scope table) for exception handling,
5665 ppc_ydata (int ignore ATTRIBUTE_UNUSED
)
5667 if (ydata_section
== 0)
5669 ydata_section
= subseg_new (".ydata", 0);
5670 bfd_set_section_flags (stdoutput
, ydata_section
,
5671 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5672 | SEC_READONLY
| SEC_DATA
));
5674 bfd_set_section_alignment (stdoutput
, ydata_section
, 3);
5678 ydata_section
= subseg_new (".ydata", 0);
5680 ppc_set_current_section (ydata_section
);
5683 /* pseudo-op: .reldata
5684 behaviour: predefined read write data section
5685 double word aligned (4-byte)
5686 FIXME: relocation is applied to it
5687 FIXME: what's the difference between this and .data?
5690 initial: .section .reldata "drw3"
5691 d - initialized data
5694 3 - double word aligned (that would be 8 byte boundary)
5697 Like .data, but intended to hold data subject to relocation, such as
5698 function descriptors, etc. */
5701 ppc_reldata (int ignore ATTRIBUTE_UNUSED
)
5703 if (reldata_section
== 0)
5705 reldata_section
= subseg_new (".reldata", 0);
5707 bfd_set_section_flags (stdoutput
, reldata_section
,
5708 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5711 bfd_set_section_alignment (stdoutput
, reldata_section
, 2);
5715 reldata_section
= subseg_new (".reldata", 0);
5717 ppc_set_current_section (reldata_section
);
5720 /* pseudo-op: .rdata
5721 behaviour: predefined read only data section
5725 initial: .section .rdata "dr3"
5726 d - initialized data
5728 3 - double word aligned (that would be 4 byte boundary) */
5731 ppc_rdata (int ignore ATTRIBUTE_UNUSED
)
5733 if (rdata_section
== 0)
5735 rdata_section
= subseg_new (".rdata", 0);
5736 bfd_set_section_flags (stdoutput
, rdata_section
,
5737 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5738 | SEC_READONLY
| SEC_DATA
));
5740 bfd_set_section_alignment (stdoutput
, rdata_section
, 2);
5744 rdata_section
= subseg_new (".rdata", 0);
5746 ppc_set_current_section (rdata_section
);
5749 /* pseudo-op: .ualong
5750 behaviour: much like .int, with the exception that no alignment is
5752 FIXME: test the alignment statement
5757 ppc_ualong (int ignore ATTRIBUTE_UNUSED
)
5763 /* pseudo-op: .znop <symbol name>
5764 behaviour: Issue a nop instruction
5765 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5766 the supplied symbol name.
5768 warnings: Missing symbol name */
5771 ppc_znop (int ignore ATTRIBUTE_UNUSED
)
5774 const struct powerpc_opcode
*opcode
;
5781 /* Strip out the symbol name. */
5782 c
= get_symbol_name (&symbol_name
);
5784 name
= xstrdup (symbol_name
);
5786 sym
= symbol_find_or_make (name
);
5788 *input_line_pointer
= c
;
5790 SKIP_WHITESPACE_AFTER_NAME ();
5792 /* Look up the opcode in the hash table. */
5793 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, "nop");
5795 /* Stick in the nop. */
5796 insn
= opcode
->opcode
;
5798 /* Write out the instruction. */
5800 md_number_to_chars (f
, insn
, 4);
5802 f
- frag_now
->fr_literal
,
5807 BFD_RELOC_16_GOT_PCREL
);
5817 ppc_pe_comm (int lcomm
)
5826 c
= get_symbol_name (&name
);
5828 /* just after name is now '\0'. */
5829 p
= input_line_pointer
;
5831 SKIP_WHITESPACE_AFTER_NAME ();
5832 if (*input_line_pointer
!= ',')
5834 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5835 ignore_rest_of_line ();
5839 input_line_pointer
++; /* skip ',' */
5840 if ((temp
= get_absolute_expression ()) < 0)
5842 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
5843 ignore_rest_of_line ();
5849 /* The third argument to .comm is the alignment. */
5850 if (*input_line_pointer
!= ',')
5854 ++input_line_pointer
;
5855 align
= get_absolute_expression ();
5858 as_warn (_("ignoring bad alignment"));
5865 symbolP
= symbol_find_or_make (name
);
5868 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
5870 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5871 S_GET_NAME (symbolP
));
5872 ignore_rest_of_line ();
5876 if (S_GET_VALUE (symbolP
))
5878 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
5879 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5880 S_GET_NAME (symbolP
),
5881 (long) S_GET_VALUE (symbolP
),
5886 S_SET_VALUE (symbolP
, (valueT
) temp
);
5887 S_SET_EXTERNAL (symbolP
);
5888 S_SET_SEGMENT (symbolP
, bfd_com_section_ptr
);
5891 demand_empty_rest_of_line ();
5895 * implement the .section pseudo op:
5896 * .section name {, "flags"}
5898 * | +--- optional flags: 'b' for bss
5900 * +-- section name 'l' for lib
5904 * 'd' (apparently m88k for data)
5906 * But if the argument is not a quoted string, treat it as a
5907 * subsegment number.
5909 * FIXME: this is a copy of the section processing from obj-coff.c, with
5910 * additions/changes for the moto-pas assembler support. There are three
5913 * FIXME: I just noticed this. This doesn't work at all really. It it
5914 * setting bits that bfd probably neither understands or uses. The
5915 * correct approach (?) will have to incorporate extra fields attached
5916 * to the section to hold the system specific stuff. (krk)
5919 * 'a' - unknown - referred to in documentation, but no definition supplied
5920 * 'c' - section has code
5921 * 'd' - section has initialized data
5922 * 'u' - section has uninitialized data
5923 * 'i' - section contains directives (info)
5924 * 'n' - section can be discarded
5925 * 'R' - remove section at link time
5927 * Section Protection:
5928 * 'r' - section is readable
5929 * 'w' - section is writable
5930 * 'x' - section is executable
5931 * 's' - section is sharable
5933 * Section Alignment:
5934 * '0' - align to byte boundary
5935 * '1' - align to halfword boundary
5936 * '2' - align to word boundary
5937 * '3' - align to doubleword boundary
5938 * '4' - align to quadword boundary
5939 * '5' - align to 32 byte boundary
5940 * '6' - align to 64 byte boundary
5945 ppc_pe_section (int ignore ATTRIBUTE_UNUSED
)
5947 /* Strip out the section name. */
5956 c
= get_symbol_name (§ion_name
);
5958 name
= xstrdup (section_name
);
5960 *input_line_pointer
= c
;
5962 SKIP_WHITESPACE_AFTER_NAME ();
5965 flags
= SEC_NO_FLAGS
;
5967 if (strcmp (name
, ".idata$2") == 0)
5971 else if (strcmp (name
, ".idata$3") == 0)
5975 else if (strcmp (name
, ".idata$4") == 0)
5979 else if (strcmp (name
, ".idata$5") == 0)
5983 else if (strcmp (name
, ".idata$6") == 0)
5988 /* Default alignment to 16 byte boundary. */
5991 if (*input_line_pointer
== ',')
5993 ++input_line_pointer
;
5995 if (*input_line_pointer
!= '"')
5996 exp
= get_absolute_expression ();
5999 ++input_line_pointer
;
6000 while (*input_line_pointer
!= '"'
6001 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
6003 switch (*input_line_pointer
)
6005 /* Section Contents */
6006 case 'a': /* unknown */
6007 as_bad (_("unsupported section attribute -- 'a'"));
6009 case 'c': /* code section */
6012 case 'd': /* section has initialized data */
6015 case 'u': /* section has uninitialized data */
6016 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
6020 case 'i': /* section contains directives (info) */
6021 /* FIXME: This is IMAGE_SCN_LNK_INFO
6023 flags
|= SEC_HAS_CONTENTS
;
6025 case 'n': /* section can be discarded */
6028 case 'R': /* Remove section at link time */
6029 flags
|= SEC_NEVER_LOAD
;
6031 #if IFLICT_BRAIN_DAMAGE
6032 /* Section Protection */
6033 case 'r': /* section is readable */
6034 flags
|= IMAGE_SCN_MEM_READ
;
6036 case 'w': /* section is writable */
6037 flags
|= IMAGE_SCN_MEM_WRITE
;
6039 case 'x': /* section is executable */
6040 flags
|= IMAGE_SCN_MEM_EXECUTE
;
6042 case 's': /* section is sharable */
6043 flags
|= IMAGE_SCN_MEM_SHARED
;
6046 /* Section Alignment */
6047 case '0': /* align to byte boundary */
6048 flags
|= IMAGE_SCN_ALIGN_1BYTES
;
6051 case '1': /* align to halfword boundary */
6052 flags
|= IMAGE_SCN_ALIGN_2BYTES
;
6055 case '2': /* align to word boundary */
6056 flags
|= IMAGE_SCN_ALIGN_4BYTES
;
6059 case '3': /* align to doubleword boundary */
6060 flags
|= IMAGE_SCN_ALIGN_8BYTES
;
6063 case '4': /* align to quadword boundary */
6064 flags
|= IMAGE_SCN_ALIGN_16BYTES
;
6067 case '5': /* align to 32 byte boundary */
6068 flags
|= IMAGE_SCN_ALIGN_32BYTES
;
6071 case '6': /* align to 64 byte boundary */
6072 flags
|= IMAGE_SCN_ALIGN_64BYTES
;
6077 as_bad (_("unknown section attribute '%c'"),
6078 *input_line_pointer
);
6081 ++input_line_pointer
;
6083 if (*input_line_pointer
== '"')
6084 ++input_line_pointer
;
6088 sec
= subseg_new (name
, (subsegT
) exp
);
6090 ppc_set_current_section (sec
);
6092 if (flags
!= SEC_NO_FLAGS
)
6094 if (! bfd_set_section_flags (stdoutput
, sec
, flags
))
6095 as_bad (_("error setting flags for \"%s\": %s"),
6096 bfd_section_name (stdoutput
, sec
),
6097 bfd_errmsg (bfd_get_error ()));
6100 bfd_set_section_alignment (stdoutput
, sec
, align
);
6104 ppc_pe_function (int ignore ATTRIBUTE_UNUSED
)
6110 endc
= get_symbol_name (&name
);
6112 ext_sym
= symbol_find_or_make (name
);
6114 (void) restore_line_pointer (endc
);
6116 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
6117 SF_SET_FUNCTION (ext_sym
);
6118 SF_SET_PROCESS (ext_sym
);
6119 coff_add_linesym (ext_sym
);
6121 demand_empty_rest_of_line ();
6125 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED
)
6127 if (tocdata_section
== 0)
6129 tocdata_section
= subseg_new (".tocd", 0);
6130 /* FIXME: section flags won't work. */
6131 bfd_set_section_flags (stdoutput
, tocdata_section
,
6132 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
6133 | SEC_READONLY
| SEC_DATA
));
6135 bfd_set_section_alignment (stdoutput
, tocdata_section
, 2);
6139 rdata_section
= subseg_new (".tocd", 0);
6142 ppc_set_current_section (tocdata_section
);
6144 demand_empty_rest_of_line ();
6147 /* Don't adjust TOC relocs to use the section symbol. */
6150 ppc_pe_fix_adjustable (fixS
*fix
)
6152 return fix
->fx_r_type
!= BFD_RELOC_PPC_TOC16
;
6159 /* XCOFF specific symbol and file handling. */
6161 /* Canonicalize the symbol name. We use the to force the suffix, if
6162 any, to use square brackets, and to be in upper case. */
6165 ppc_canonicalize_symbol_name (char *name
)
6169 if (ppc_stab_symbol
)
6172 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
6186 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
6189 if (*s
== '\0' || s
[1] != '\0')
6190 as_bad (_("bad symbol suffix"));
6198 /* Set the class of a symbol based on the suffix, if any. This is
6199 called whenever a new symbol is created. */
6202 ppc_symbol_new_hook (symbolS
*sym
)
6204 struct ppc_tc_sy
*tc
;
6207 tc
= symbol_get_tc (sym
);
6210 tc
->symbol_class
= -1;
6211 tc
->real_name
= NULL
;
6218 if (ppc_stab_symbol
)
6221 s
= strchr (S_GET_NAME (sym
), '[');
6222 if (s
== (const char *) NULL
)
6224 /* There is no suffix. */
6233 if (strcmp (s
, "BS]") == 0)
6234 tc
->symbol_class
= XMC_BS
;
6237 if (strcmp (s
, "DB]") == 0)
6238 tc
->symbol_class
= XMC_DB
;
6239 else if (strcmp (s
, "DS]") == 0)
6240 tc
->symbol_class
= XMC_DS
;
6243 if (strcmp (s
, "GL]") == 0)
6244 tc
->symbol_class
= XMC_GL
;
6247 if (strcmp (s
, "PR]") == 0)
6248 tc
->symbol_class
= XMC_PR
;
6251 if (strcmp (s
, "RO]") == 0)
6252 tc
->symbol_class
= XMC_RO
;
6253 else if (strcmp (s
, "RW]") == 0)
6254 tc
->symbol_class
= XMC_RW
;
6257 if (strcmp (s
, "SV]") == 0)
6258 tc
->symbol_class
= XMC_SV
;
6261 if (strcmp (s
, "TC]") == 0)
6262 tc
->symbol_class
= XMC_TC
;
6263 else if (strcmp (s
, "TI]") == 0)
6264 tc
->symbol_class
= XMC_TI
;
6265 else if (strcmp (s
, "TB]") == 0)
6266 tc
->symbol_class
= XMC_TB
;
6267 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
6268 tc
->symbol_class
= XMC_TC0
;
6271 if (strcmp (s
, "UA]") == 0)
6272 tc
->symbol_class
= XMC_UA
;
6273 else if (strcmp (s
, "UC]") == 0)
6274 tc
->symbol_class
= XMC_UC
;
6277 if (strcmp (s
, "XO]") == 0)
6278 tc
->symbol_class
= XMC_XO
;
6282 if (tc
->symbol_class
== -1)
6283 as_bad (_("unrecognized symbol suffix"));
6286 /* This variable is set by ppc_frob_symbol if any absolute symbols are
6287 seen. It tells ppc_adjust_symtab whether it needs to look through
6290 static bfd_boolean ppc_saw_abs
;
6292 /* Change the name of a symbol just before writing it out. Set the
6293 real name if the .rename pseudo-op was used. Otherwise, remove any
6294 class suffix. Return 1 if the symbol should not be included in the
6298 ppc_frob_symbol (symbolS
*sym
)
6300 static symbolS
*ppc_last_function
;
6301 static symbolS
*set_end
;
6303 /* Discard symbols that should not be included in the output symbol
6305 if (! symbol_used_in_reloc_p (sym
)
6306 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
6307 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6308 && ! symbol_get_tc (sym
)->output
6309 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
6312 /* This one will disappear anyway. Don't make a csect sym for it. */
6313 if (sym
== abs_section_sym
)
6316 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
6317 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
6323 name
= S_GET_NAME (sym
);
6324 s
= strchr (name
, '[');
6325 if (s
!= (char *) NULL
)
6331 snew
= xstrndup (name
, len
);
6333 S_SET_NAME (sym
, snew
);
6337 if (set_end
!= (symbolS
*) NULL
)
6339 SA_SET_SYM_ENDNDX (set_end
, sym
);
6343 if (SF_GET_FUNCTION (sym
))
6345 if (ppc_last_function
!= (symbolS
*) NULL
)
6346 as_bad (_("two .function pseudo-ops with no intervening .ef"));
6347 ppc_last_function
= sym
;
6348 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
6350 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
6351 SA_SET_SYM_FSIZE (sym
,
6352 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
6355 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
6356 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
6358 if (ppc_last_function
== (symbolS
*) NULL
)
6359 as_bad (_(".ef with no preceding .function"));
6362 set_end
= ppc_last_function
;
6363 ppc_last_function
= NULL
;
6365 /* We don't have a C_EFCN symbol, but we need to force the
6366 COFF backend to believe that it has seen one. */
6367 coff_last_function
= NULL
;
6371 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6372 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
6373 && S_GET_STORAGE_CLASS (sym
) != C_FILE
6374 && S_GET_STORAGE_CLASS (sym
) != C_FCN
6375 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
6376 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
6377 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
6378 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
6379 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
6380 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
6381 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
6383 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
6384 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
6385 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
6388 union internal_auxent
*a
;
6390 /* Create a csect aux. */
6391 i
= S_GET_NUMBER_AUXILIARY (sym
);
6392 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
6393 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
6394 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
6396 /* This is the TOC table. */
6397 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
6398 a
->x_csect
.x_scnlen
.l
= 0;
6399 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6401 else if (symbol_get_tc (sym
)->subseg
!= 0)
6403 /* This is a csect symbol. x_scnlen is the size of the
6405 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
6406 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6407 S_GET_SEGMENT (sym
))
6408 - S_GET_VALUE (sym
));
6411 resolve_symbol_value (symbol_get_tc (sym
)->next
);
6412 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
6413 - S_GET_VALUE (sym
));
6415 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
6417 else if (S_GET_SEGMENT (sym
) == bss_section
)
6419 /* This is a common symbol. */
6420 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6421 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6422 if (S_IS_EXTERNAL (sym
))
6423 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6425 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6427 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6429 /* This is an absolute symbol. The csect will be created by
6430 ppc_adjust_symtab. */
6432 a
->x_csect
.x_smtyp
= XTY_LD
;
6433 if (symbol_get_tc (sym
)->symbol_class
== -1)
6434 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6436 else if (! S_IS_DEFINED (sym
))
6438 /* This is an external symbol. */
6439 a
->x_csect
.x_scnlen
.l
= 0;
6440 a
->x_csect
.x_smtyp
= XTY_ER
;
6442 else if (symbol_get_tc (sym
)->symbol_class
== XMC_TC
)
6446 /* This is a TOC definition. x_scnlen is the size of the
6448 next
= symbol_next (sym
);
6449 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6450 next
= symbol_next (next
);
6451 if (next
== (symbolS
*) NULL
6452 || symbol_get_tc (next
)->symbol_class
!= XMC_TC
)
6454 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6455 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6457 - S_GET_VALUE (sym
));
6459 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6460 - S_GET_VALUE (sym
));
6464 resolve_symbol_value (next
);
6465 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6466 - S_GET_VALUE (sym
));
6468 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6474 /* This is a normal symbol definition. x_scnlen is the
6475 symbol index of the containing csect. */
6476 if (S_GET_SEGMENT (sym
) == text_section
)
6477 csect
= ppc_text_csects
;
6478 else if (S_GET_SEGMENT (sym
) == data_section
)
6479 csect
= ppc_data_csects
;
6483 /* Skip the initial dummy symbol. */
6484 csect
= symbol_get_tc (csect
)->next
;
6486 if (csect
== (symbolS
*) NULL
)
6488 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6489 a
->x_csect
.x_scnlen
.l
= 0;
6493 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6495 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6496 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6497 > S_GET_VALUE (sym
))
6499 csect
= symbol_get_tc (csect
)->next
;
6502 a
->x_csect
.x_scnlen
.p
=
6503 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6504 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6507 a
->x_csect
.x_smtyp
= XTY_LD
;
6510 a
->x_csect
.x_parmhash
= 0;
6511 a
->x_csect
.x_snhash
= 0;
6512 if (symbol_get_tc (sym
)->symbol_class
== -1)
6513 a
->x_csect
.x_smclas
= XMC_PR
;
6515 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6516 a
->x_csect
.x_stab
= 0;
6517 a
->x_csect
.x_snstab
= 0;
6519 /* Don't let the COFF backend resort these symbols. */
6520 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6522 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6524 /* We want the value to be the symbol index of the referenced
6525 csect symbol. BFD will do that for us if we set the right
6527 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6528 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6530 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6531 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6533 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6538 block
= symbol_get_tc (sym
)->within
;
6541 /* The value is the offset from the enclosing csect. */
6544 csect
= symbol_get_tc (block
)->within
;
6545 resolve_symbol_value (csect
);
6546 base
= S_GET_VALUE (csect
);
6551 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6553 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6554 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6556 /* We want the value to be a file offset into the line numbers.
6557 BFD will do that for us if we set the right flags. We have
6558 already set the value correctly. */
6559 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6565 /* Adjust the symbol table. This creates csect symbols for all
6566 absolute symbols. */
6569 ppc_adjust_symtab (void)
6576 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6580 union internal_auxent
*a
;
6582 if (S_GET_SEGMENT (sym
) != absolute_section
)
6585 csect
= symbol_create (".abs[XO]", absolute_section
,
6586 S_GET_VALUE (sym
), &zero_address_frag
);
6587 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6588 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6589 i
= S_GET_NUMBER_AUXILIARY (csect
);
6590 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6591 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6592 a
->x_csect
.x_scnlen
.l
= 0;
6593 a
->x_csect
.x_smtyp
= XTY_SD
;
6594 a
->x_csect
.x_parmhash
= 0;
6595 a
->x_csect
.x_snhash
= 0;
6596 a
->x_csect
.x_smclas
= XMC_XO
;
6597 a
->x_csect
.x_stab
= 0;
6598 a
->x_csect
.x_snstab
= 0;
6600 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6602 i
= S_GET_NUMBER_AUXILIARY (sym
);
6603 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6604 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6605 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6608 ppc_saw_abs
= FALSE
;
6611 /* Set the VMA for a section. This is called on all the sections in
6615 ppc_frob_section (asection
*sec
)
6617 static bfd_vma vma
= 0;
6619 /* Dwarf sections start at 0. */
6620 if (bfd_get_section_flags (NULL
, sec
) & SEC_DEBUGGING
)
6623 vma
= md_section_align (sec
, vma
);
6624 bfd_set_section_vma (stdoutput
, sec
, vma
);
6625 vma
+= bfd_section_size (stdoutput
, sec
);
6628 #endif /* OBJ_XCOFF */
6631 md_atof (int type
, char *litp
, int *sizep
)
6633 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6636 /* Write a value out to the object file, using the appropriate
6640 md_number_to_chars (char *buf
, valueT val
, int n
)
6642 if (target_big_endian
)
6643 number_to_chars_bigendian (buf
, val
, n
);
6645 number_to_chars_littleendian (buf
, val
, n
);
6648 /* Align a section (I don't know why this is machine dependent). */
6651 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6656 int align
= bfd_get_section_alignment (stdoutput
, seg
);
6658 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6662 /* We don't have any form of relaxing. */
6665 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6666 asection
*seg ATTRIBUTE_UNUSED
)
6672 /* Convert a machine dependent frag. We never generate these. */
6675 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6676 asection
*sec ATTRIBUTE_UNUSED
,
6677 fragS
*fragp ATTRIBUTE_UNUSED
)
6682 /* We have no need to default values of symbols. */
6685 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6690 /* Functions concerning relocs. */
6692 /* The location from which a PC relative jump should be calculated,
6693 given a PC relative reloc. */
6696 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6698 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6703 /* This is called to see whether a fixup should be adjusted to use a
6704 section symbol. We take the opportunity to change a fixup against
6705 a symbol in the TOC subsegment into a reloc against the
6706 corresponding .tc symbol. */
6709 ppc_fix_adjustable (fixS
*fix
)
6711 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6712 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6713 TC_SYMFIELD_TYPE
*tc
;
6715 if (symseg
== absolute_section
)
6718 /* Always adjust symbols in debugging sections. */
6719 if (bfd_get_section_flags (stdoutput
, symseg
) & SEC_DEBUGGING
)
6722 if (ppc_toc_csect
!= (symbolS
*) NULL
6723 && fix
->fx_addsy
!= ppc_toc_csect
6724 && symseg
== data_section
6725 && val
>= ppc_toc_frag
->fr_address
6726 && (ppc_after_toc_frag
== (fragS
*) NULL
6727 || val
< ppc_after_toc_frag
->fr_address
))
6731 for (sy
= symbol_next (ppc_toc_csect
);
6732 sy
!= (symbolS
*) NULL
;
6733 sy
= symbol_next (sy
))
6735 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6737 if (sy_tc
->symbol_class
== XMC_TC0
)
6739 if (sy_tc
->symbol_class
!= XMC_TC
)
6741 if (val
== resolve_symbol_value (sy
))
6744 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6749 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6750 _("symbol in .toc does not match any .tc"));
6753 /* Possibly adjust the reloc to be against the csect. */
6754 tc
= symbol_get_tc (fix
->fx_addsy
);
6756 && tc
->symbol_class
!= XMC_TC0
6757 && tc
->symbol_class
!= XMC_TC
6758 && symseg
!= bss_section
6759 /* Don't adjust if this is a reloc in the toc section. */
6760 && (symseg
!= data_section
6761 || ppc_toc_csect
== NULL
6762 || val
< ppc_toc_frag
->fr_address
6763 || (ppc_after_toc_frag
!= NULL
6764 && val
>= ppc_after_toc_frag
->fr_address
)))
6766 symbolS
*csect
= tc
->within
;
6768 /* If the symbol was not declared by a label (eg: a section symbol),
6769 use the section instead of the csect. This doesn't happen in
6770 normal AIX assembly code. */
6772 csect
= seg_info (symseg
)->sym
;
6774 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6775 fix
->fx_addsy
= csect
;
6780 /* Adjust a reloc against a .lcomm symbol to be against the base
6782 if (symseg
== bss_section
6783 && ! S_IS_EXTERNAL (fix
->fx_addsy
))
6785 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6787 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6794 /* A reloc from one csect to another must be kept. The assembler
6795 will, of course, keep relocs between sections, and it will keep
6796 absolute relocs, but we need to force it to keep PC relative relocs
6797 between two csects in the same section. */
6800 ppc_force_relocation (fixS
*fix
)
6802 /* At this point fix->fx_addsy should already have been converted to
6803 a csect symbol. If the csect does not include the fragment, then
6804 we need to force the relocation. */
6806 && fix
->fx_addsy
!= NULL
6807 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6808 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6809 > fix
->fx_frag
->fr_address
)
6810 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6811 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6812 <= fix
->fx_frag
->fr_address
))))
6815 return generic_force_reloc (fix
);
6817 #endif /* OBJ_XCOFF */
6820 /* If this function returns non-zero, it guarantees that a relocation
6821 will be emitted for a fixup. */
6824 ppc_force_relocation (fixS
*fix
)
6826 /* Branch prediction relocations must force a relocation, as must
6827 the vtable description relocs. */
6828 switch (fix
->fx_r_type
)
6830 case BFD_RELOC_PPC_B16_BRTAKEN
:
6831 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6832 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6833 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6834 case BFD_RELOC_24_PLT_PCREL
:
6835 case BFD_RELOC_PPC64_TOC
:
6837 case BFD_RELOC_PPC_B26
:
6838 case BFD_RELOC_PPC_BA26
:
6839 case BFD_RELOC_PPC_B16
:
6840 case BFD_RELOC_PPC_BA16
:
6841 case BFD_RELOC_PPC64_REL24_NOTOC
:
6842 /* All branch fixups targeting a localentry symbol must
6843 force a relocation. */
6846 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6847 elf_symbol_type
*elfsym
6848 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6849 gas_assert (elfsym
);
6850 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6858 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6859 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
)
6862 return generic_force_reloc (fix
);
6866 ppc_fix_adjustable (fixS
*fix
)
6868 switch (fix
->fx_r_type
)
6870 /* All branch fixups targeting a localentry symbol must
6871 continue using the symbol. */
6872 case BFD_RELOC_PPC_B26
:
6873 case BFD_RELOC_PPC_BA26
:
6874 case BFD_RELOC_PPC_B16
:
6875 case BFD_RELOC_PPC_BA16
:
6876 case BFD_RELOC_PPC_B16_BRTAKEN
:
6877 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6878 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6879 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6880 case BFD_RELOC_PPC64_REL24_NOTOC
:
6883 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6884 elf_symbol_type
*elfsym
6885 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6886 gas_assert (elfsym
);
6887 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6895 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6896 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6897 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6898 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6899 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6900 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6901 && fix
->fx_r_type
!= BFD_RELOC_16_GOT_PCREL
6902 && fix
->fx_r_type
!= BFD_RELOC_32_GOTOFF
6903 && fix
->fx_r_type
!= BFD_RELOC_24_PLT_PCREL
6904 && fix
->fx_r_type
!= BFD_RELOC_32_PLTOFF
6905 && fix
->fx_r_type
!= BFD_RELOC_32_PLT_PCREL
6906 && fix
->fx_r_type
!= BFD_RELOC_LO16_PLTOFF
6907 && fix
->fx_r_type
!= BFD_RELOC_HI16_PLTOFF
6908 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_PLTOFF
6909 && fix
->fx_r_type
!= BFD_RELOC_64_PLTOFF
6910 && fix
->fx_r_type
!= BFD_RELOC_64_PLT_PCREL
6911 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT16_LO_DS
6912 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16
6913 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO
6914 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HI
6915 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HA
6916 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_DS
6917 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO_DS
6918 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6919 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_LO16A
6920 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HI16A
6921 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HA16A
6922 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6923 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6924 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6925 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
));
6930 ppc_frag_check (struct frag
*fragP
)
6932 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
6933 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6934 _("instruction address is not a multiple of %d"),
6935 fragP
->insn_addr
+ 1);
6938 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6939 rs_align_code frag. */
6942 ppc_handle_align (struct frag
*fragP
)
6944 valueT count
= (fragP
->fr_next
->fr_address
6945 - (fragP
->fr_address
+ fragP
->fr_fix
));
6947 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && count
!= 0 && (count
& 1) == 0)
6949 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6952 md_number_to_chars (dest
, 0x4400, 2);
6954 else if (count
!= 0 && (count
& 3) == 0)
6956 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6960 if (count
> 4 * nop_limit
&& count
< 0x2000000)
6964 /* Make a branch, then follow with nops. Insert another
6965 frag to handle the nops. */
6966 md_number_to_chars (dest
, 0x48000000 + count
, 4);
6971 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6972 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
6973 fragP
->fr_next
= rest
;
6975 rest
->fr_address
+= rest
->fr_fix
+ 4;
6977 /* If we leave the next frag as rs_align_code we'll come here
6978 again, resulting in a bunch of branches rather than a
6979 branch followed by nops. */
6980 rest
->fr_type
= rs_align
;
6981 dest
= rest
->fr_literal
;
6984 md_number_to_chars (dest
, 0x60000000, 4);
6986 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0
6987 && (ppc_cpu
& PPC_OPCODE_POWER9
) == 0)
6989 /* For power6, power7, and power8, we want the last nop to
6990 be a group terminating one. Do this by inserting an
6991 rs_fill frag immediately after this one, with its address
6992 set to the last nop location. This will automatically
6993 reduce the number of nops in the current frag by one. */
6996 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6998 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
6999 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
7000 group_nop
->fr_fix
= 0;
7001 group_nop
->fr_offset
= 1;
7002 group_nop
->fr_type
= rs_fill
;
7003 fragP
->fr_next
= group_nop
;
7004 dest
= group_nop
->fr_literal
;
7007 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
7009 if (ppc_cpu
& PPC_OPCODE_E500MC
)
7010 /* e500mc group terminating nop: "ori 0,0,0". */
7011 md_number_to_chars (dest
, 0x60000000, 4);
7013 /* power7/power8 group terminating nop: "ori 2,2,0". */
7014 md_number_to_chars (dest
, 0x60420000, 4);
7017 /* power6 group terminating nop: "ori 1,1,0". */
7018 md_number_to_chars (dest
, 0x60210000, 4);
7023 /* Apply a fixup to the object code. This is called for all the
7024 fixups we generated by the calls to fix_new_exp, above. */
7027 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
7029 valueT value
= * valP
;
7031 const struct powerpc_operand
*operand
;
7034 if (fixP
->fx_addsy
!= NULL
)
7036 /* Hack around bfd_install_relocation brain damage. */
7038 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
7040 if (fixP
->fx_addsy
== abs_section_sym
)
7046 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7047 the symbol values. If we are doing this relocation the code in
7048 write.c is going to call bfd_install_relocation, which is also
7049 going to use the symbol value. That means that if the reloc is
7050 fully resolved we want to use *valP since bfd_install_relocation is
7052 However, if the reloc is not fully resolved we do not want to
7053 use *valP, and must use fx_offset instead. If the relocation
7054 is PC-relative, we then need to re-apply md_pcrel_from_section
7055 to this new relocation value. */
7056 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
7061 value
= fixP
->fx_offset
;
7063 value
-= md_pcrel_from_section (fixP
, seg
);
7067 /* We are only able to convert some relocs to pc-relative. */
7070 switch (fixP
->fx_r_type
)
7073 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
7077 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
7081 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
7084 case BFD_RELOC_LO16
:
7085 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
7088 case BFD_RELOC_HI16
:
7089 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
7092 case BFD_RELOC_HI16_S
:
7093 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
7096 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7097 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGH
;
7100 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7101 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHA
;
7104 case BFD_RELOC_PPC64_HIGHER
:
7105 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER
;
7108 case BFD_RELOC_PPC64_HIGHER_S
:
7109 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA
;
7112 case BFD_RELOC_PPC64_HIGHEST
:
7113 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST
;
7116 case BFD_RELOC_PPC64_HIGHEST_S
:
7117 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA
;
7120 case BFD_RELOC_PPC_16DX_HA
:
7121 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7128 else if (!fixP
->fx_done
7129 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
7131 /* addpcis is relative to next insn address. */
7133 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7138 if (fixP
->fx_pcrel_adjust
!= 0)
7140 /* This is a fixup on an instruction. */
7141 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
7143 operand
= &powerpc_operands
[opindex
];
7145 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
7146 does not generate a reloc. It uses the offset of `sym' within its
7147 csect. Other usages, such as `.long sym', generate relocs. This
7148 is the documented behaviour of non-TOC symbols. */
7149 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
7150 && (operand
->bitm
& 0xfff0) == 0xfff0
7151 && operand
->shift
== 0
7152 && (operand
->insert
== NULL
|| ppc_obj64
)
7153 && fixP
->fx_addsy
!= NULL
7154 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
7155 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
7156 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC0
7157 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
7159 value
= fixP
->fx_offset
;
7163 /* During parsing of instructions, a TOC16 reloc is generated for
7164 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
7165 in the toc. But at parse time, SYM may be not yet defined, so
7166 check again here. */
7167 if (fixP
->fx_r_type
== BFD_RELOC_16
7168 && fixP
->fx_addsy
!= NULL
7169 && ppc_is_toc_sym (fixP
->fx_addsy
))
7170 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
7174 /* Calculate value to be stored in field. */
7176 switch (fixP
->fx_r_type
)
7179 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
7180 case BFD_RELOC_PPC_VLE_LO16A
:
7181 case BFD_RELOC_PPC_VLE_LO16D
:
7183 case BFD_RELOC_LO16
:
7184 case BFD_RELOC_LO16_PCREL
:
7185 fieldval
= value
& 0xffff;
7187 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7188 fieldval
= SEX16 (fieldval
);
7189 fixP
->fx_no_overflow
= 1;
7192 case BFD_RELOC_HI16
:
7193 case BFD_RELOC_HI16_PCREL
:
7195 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7197 fieldval
= value
>> 16;
7198 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7200 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7201 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7207 case BFD_RELOC_PPC_VLE_HI16A
:
7208 case BFD_RELOC_PPC_VLE_HI16D
:
7209 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7211 fieldval
= PPC_HI (value
);
7212 goto sign_extend_16
;
7214 case BFD_RELOC_HI16_S
:
7215 case BFD_RELOC_HI16_S_PCREL
:
7216 case BFD_RELOC_PPC_16DX_HA
:
7217 case BFD_RELOC_PPC_REL16DX_HA
:
7219 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7221 fieldval
= (value
+ 0x8000) >> 16;
7222 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7224 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7225 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7231 case BFD_RELOC_PPC_VLE_HA16A
:
7232 case BFD_RELOC_PPC_VLE_HA16D
:
7233 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7235 fieldval
= PPC_HA (value
);
7236 goto sign_extend_16
;
7239 case BFD_RELOC_PPC64_HIGHER
:
7240 fieldval
= PPC_HIGHER (value
);
7241 goto sign_extend_16
;
7243 case BFD_RELOC_PPC64_HIGHER_S
:
7244 fieldval
= PPC_HIGHERA (value
);
7245 goto sign_extend_16
;
7247 case BFD_RELOC_PPC64_HIGHEST
:
7248 fieldval
= PPC_HIGHEST (value
);
7249 goto sign_extend_16
;
7251 case BFD_RELOC_PPC64_HIGHEST_S
:
7252 fieldval
= PPC_HIGHESTA (value
);
7253 goto sign_extend_16
;
7260 if (operand
!= NULL
)
7262 /* Handle relocs in an insn. */
7263 switch (fixP
->fx_r_type
)
7266 /* The following relocs can't be calculated by the assembler.
7267 Leave the field zero. */
7268 case BFD_RELOC_PPC_TPREL16
:
7269 case BFD_RELOC_PPC_TPREL16_LO
:
7270 case BFD_RELOC_PPC_TPREL16_HI
:
7271 case BFD_RELOC_PPC_TPREL16_HA
:
7272 case BFD_RELOC_PPC_DTPREL16
:
7273 case BFD_RELOC_PPC_DTPREL16_LO
:
7274 case BFD_RELOC_PPC_DTPREL16_HI
:
7275 case BFD_RELOC_PPC_DTPREL16_HA
:
7276 case BFD_RELOC_PPC_GOT_TLSGD16
:
7277 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7278 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7279 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7280 case BFD_RELOC_PPC_GOT_TLSLD16
:
7281 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7282 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7283 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7284 case BFD_RELOC_PPC_GOT_TPREL16
:
7285 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7286 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7287 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7288 case BFD_RELOC_PPC_GOT_DTPREL16
:
7289 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7290 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7291 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7292 case BFD_RELOC_PPC64_TPREL16_DS
:
7293 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
7294 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7295 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7296 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7297 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7298 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7299 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7300 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7301 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7302 case BFD_RELOC_PPC64_DTPREL16_DS
:
7303 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
7304 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7305 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7306 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7307 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7308 gas_assert (fixP
->fx_addsy
!= NULL
);
7309 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7313 /* These also should leave the field zero for the same
7314 reason. Note that older versions of gas wrote values
7315 here. If we want to go back to the old behaviour, then
7316 all _LO and _LO_DS cases will need to be treated like
7317 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
7318 case BFD_RELOC_16_GOTOFF
:
7319 case BFD_RELOC_LO16_GOTOFF
:
7320 case BFD_RELOC_HI16_GOTOFF
:
7321 case BFD_RELOC_HI16_S_GOTOFF
:
7322 case BFD_RELOC_LO16_PLTOFF
:
7323 case BFD_RELOC_HI16_PLTOFF
:
7324 case BFD_RELOC_HI16_S_PLTOFF
:
7325 case BFD_RELOC_GPREL16
:
7326 case BFD_RELOC_16_BASEREL
:
7327 case BFD_RELOC_LO16_BASEREL
:
7328 case BFD_RELOC_HI16_BASEREL
:
7329 case BFD_RELOC_HI16_S_BASEREL
:
7330 case BFD_RELOC_PPC_TOC16
:
7331 case BFD_RELOC_PPC64_TOC16_LO
:
7332 case BFD_RELOC_PPC64_TOC16_HI
:
7333 case BFD_RELOC_PPC64_TOC16_HA
:
7334 case BFD_RELOC_PPC64_PLTGOT16
:
7335 case BFD_RELOC_PPC64_PLTGOT16_LO
:
7336 case BFD_RELOC_PPC64_PLTGOT16_HI
:
7337 case BFD_RELOC_PPC64_PLTGOT16_HA
:
7338 case BFD_RELOC_PPC64_GOT16_DS
:
7339 case BFD_RELOC_PPC64_GOT16_LO_DS
:
7340 case BFD_RELOC_PPC64_PLT16_LO_DS
:
7341 case BFD_RELOC_PPC64_SECTOFF_DS
:
7342 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
7343 case BFD_RELOC_PPC64_TOC16_DS
:
7344 case BFD_RELOC_PPC64_TOC16_LO_DS
:
7345 case BFD_RELOC_PPC64_PLTGOT16_DS
:
7346 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
7347 case BFD_RELOC_PPC_EMB_NADDR16
:
7348 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7349 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7350 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7351 case BFD_RELOC_PPC_EMB_SDAI16
:
7352 case BFD_RELOC_PPC_EMB_SDA2I16
:
7353 case BFD_RELOC_PPC_EMB_SDA2REL
:
7354 case BFD_RELOC_PPC_EMB_SDA21
:
7355 case BFD_RELOC_PPC_EMB_MRKREF
:
7356 case BFD_RELOC_PPC_EMB_RELSEC16
:
7357 case BFD_RELOC_PPC_EMB_RELST_LO
:
7358 case BFD_RELOC_PPC_EMB_RELST_HI
:
7359 case BFD_RELOC_PPC_EMB_RELST_HA
:
7360 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7361 case BFD_RELOC_PPC_EMB_RELSDA
:
7362 case BFD_RELOC_PPC_VLE_SDA21
:
7363 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7364 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7365 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
7366 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7367 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
7368 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7369 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
7370 gas_assert (fixP
->fx_addsy
!= NULL
);
7373 case BFD_RELOC_PPC_TLS
:
7374 case BFD_RELOC_PPC_TLSGD
:
7375 case BFD_RELOC_PPC_TLSLD
:
7381 case BFD_RELOC_PPC_B16
:
7382 /* Adjust the offset to the instruction boundary. */
7387 case BFD_RELOC_VTABLE_INHERIT
:
7388 case BFD_RELOC_VTABLE_ENTRY
:
7389 case BFD_RELOC_PPC_DTPMOD
:
7390 case BFD_RELOC_PPC_TPREL
:
7391 case BFD_RELOC_PPC_DTPREL
:
7392 case BFD_RELOC_PPC_COPY
:
7393 case BFD_RELOC_PPC_GLOB_DAT
:
7394 case BFD_RELOC_32_PLT_PCREL
:
7395 case BFD_RELOC_PPC_EMB_NADDR32
:
7396 case BFD_RELOC_PPC64_TOC
:
7397 case BFD_RELOC_CTOR
:
7399 case BFD_RELOC_32_PCREL
:
7402 case BFD_RELOC_64_PCREL
:
7403 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7404 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7405 _("%s unsupported as instruction fixup"),
7406 bfd_get_reloc_code_name (fixP
->fx_r_type
));
7415 /* powerpc uses RELA style relocs, so if emitting a reloc the field
7416 contents can stay at zero. */
7417 #define APPLY_RELOC fixP->fx_done
7419 #define APPLY_RELOC 1
7421 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
7424 unsigned char *where
;
7426 /* Fetch the instruction, insert the fully resolved operand
7427 value, and stuff the instruction back again. */
7428 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
7429 if (target_big_endian
)
7431 if (fixP
->fx_size
== 4)
7432 insn
= bfd_getb32 (where
);
7434 insn
= bfd_getb16 (where
);
7438 if (fixP
->fx_size
== 4)
7439 insn
= bfd_getl32 (where
);
7441 insn
= bfd_getl16 (where
);
7443 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
7444 fixP
->tc_fix_data
.ppc_cpu
,
7445 fixP
->fx_file
, fixP
->fx_line
);
7446 if (target_big_endian
)
7448 if (fixP
->fx_size
== 4)
7449 bfd_putb32 (insn
, where
);
7451 bfd_putb16 (insn
, where
);
7455 if (fixP
->fx_size
== 4)
7456 bfd_putl32 (insn
, where
);
7458 bfd_putl16 (insn
, where
);
7463 /* Nothing else to do here. */
7466 gas_assert (fixP
->fx_addsy
!= NULL
);
7467 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7472 /* Use expr_symbol_where to see if this is an expression
7474 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7475 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7476 _("unresolved expression that must be resolved"));
7478 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7479 _("unsupported relocation against %s"),
7480 S_GET_NAME (fixP
->fx_addsy
));
7487 /* Handle relocs in data. */
7488 switch (fixP
->fx_r_type
)
7490 case BFD_RELOC_VTABLE_INHERIT
:
7492 && !S_IS_DEFINED (fixP
->fx_addsy
)
7493 && !S_IS_WEAK (fixP
->fx_addsy
))
7494 S_SET_WEAK (fixP
->fx_addsy
);
7497 case BFD_RELOC_VTABLE_ENTRY
:
7502 /* These can appear with @l etc. in data. */
7503 case BFD_RELOC_LO16
:
7504 case BFD_RELOC_LO16_PCREL
:
7505 case BFD_RELOC_HI16
:
7506 case BFD_RELOC_HI16_PCREL
:
7507 case BFD_RELOC_HI16_S
:
7508 case BFD_RELOC_HI16_S_PCREL
:
7509 case BFD_RELOC_PPC64_HIGHER
:
7510 case BFD_RELOC_PPC64_HIGHER_S
:
7511 case BFD_RELOC_PPC64_HIGHEST
:
7512 case BFD_RELOC_PPC64_HIGHEST_S
:
7513 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7514 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7515 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7518 case BFD_RELOC_PPC_DTPMOD
:
7519 case BFD_RELOC_PPC_TPREL
:
7520 case BFD_RELOC_PPC_DTPREL
:
7521 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7524 /* Just punt all of these to the linker. */
7525 case BFD_RELOC_PPC_B16_BRTAKEN
:
7526 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7527 case BFD_RELOC_16_GOTOFF
:
7528 case BFD_RELOC_LO16_GOTOFF
:
7529 case BFD_RELOC_HI16_GOTOFF
:
7530 case BFD_RELOC_HI16_S_GOTOFF
:
7531 case BFD_RELOC_LO16_PLTOFF
:
7532 case BFD_RELOC_HI16_PLTOFF
:
7533 case BFD_RELOC_HI16_S_PLTOFF
:
7534 case BFD_RELOC_PPC_COPY
:
7535 case BFD_RELOC_PPC_GLOB_DAT
:
7536 case BFD_RELOC_16_BASEREL
:
7537 case BFD_RELOC_LO16_BASEREL
:
7538 case BFD_RELOC_HI16_BASEREL
:
7539 case BFD_RELOC_HI16_S_BASEREL
:
7540 case BFD_RELOC_PPC_TLS
:
7541 case BFD_RELOC_PPC_DTPREL16_LO
:
7542 case BFD_RELOC_PPC_DTPREL16_HI
:
7543 case BFD_RELOC_PPC_DTPREL16_HA
:
7544 case BFD_RELOC_PPC_TPREL16_LO
:
7545 case BFD_RELOC_PPC_TPREL16_HI
:
7546 case BFD_RELOC_PPC_TPREL16_HA
:
7547 case BFD_RELOC_PPC_GOT_TLSGD16
:
7548 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7549 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7550 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7551 case BFD_RELOC_PPC_GOT_TLSLD16
:
7552 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7553 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7554 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7555 case BFD_RELOC_PPC_GOT_DTPREL16
:
7556 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7557 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7558 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7559 case BFD_RELOC_PPC_GOT_TPREL16
:
7560 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7561 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7562 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7563 case BFD_RELOC_24_PLT_PCREL
:
7564 case BFD_RELOC_PPC_LOCAL24PC
:
7565 case BFD_RELOC_32_PLT_PCREL
:
7566 case BFD_RELOC_GPREL16
:
7567 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7568 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7569 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7570 case BFD_RELOC_PPC_EMB_NADDR32
:
7571 case BFD_RELOC_PPC_EMB_NADDR16
:
7572 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7573 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7574 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7575 case BFD_RELOC_PPC_EMB_SDAI16
:
7576 case BFD_RELOC_PPC_EMB_SDA2REL
:
7577 case BFD_RELOC_PPC_EMB_SDA2I16
:
7578 case BFD_RELOC_PPC_EMB_SDA21
:
7579 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7580 case BFD_RELOC_PPC_EMB_MRKREF
:
7581 case BFD_RELOC_PPC_EMB_RELSEC16
:
7582 case BFD_RELOC_PPC_EMB_RELST_LO
:
7583 case BFD_RELOC_PPC_EMB_RELST_HI
:
7584 case BFD_RELOC_PPC_EMB_RELST_HA
:
7585 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7586 case BFD_RELOC_PPC_EMB_RELSDA
:
7587 case BFD_RELOC_PPC64_TOC
:
7588 case BFD_RELOC_PPC_TOC16
:
7589 case BFD_RELOC_PPC64_TOC16_LO
:
7590 case BFD_RELOC_PPC64_TOC16_HI
:
7591 case BFD_RELOC_PPC64_TOC16_HA
:
7592 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7593 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7594 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7595 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7596 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7597 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7598 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7599 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7600 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7601 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7602 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7603 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7609 case BFD_RELOC_NONE
:
7611 case BFD_RELOC_CTOR
:
7613 case BFD_RELOC_32_PCREL
:
7616 case BFD_RELOC_64_PCREL
:
7618 case BFD_RELOC_16_PCREL
:
7624 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7629 if (fixP
->fx_size
&& APPLY_RELOC
)
7630 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7631 fieldval
, fixP
->fx_size
);
7633 && (seg
->flags
& SEC_CODE
) != 0
7634 && fixP
->fx_size
== 4
7637 && (fixP
->fx_r_type
== BFD_RELOC_32
7638 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7639 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7640 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7641 _("data in executable section"));
7645 ppc_elf_validate_fix (fixP
, seg
);
7646 fixP
->fx_addnumber
= value
;
7648 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7649 from the section contents. If we are going to be emitting a reloc
7650 then the section contents are immaterial, so don't warn if they
7651 happen to overflow. Leave such warnings to ld. */
7654 fixP
->fx_no_overflow
= 1;
7656 /* Arrange to emit .TOC. as a normal symbol if used in anything
7657 but .TOC.@tocbase. */
7659 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7660 && fixP
->fx_addsy
!= NULL
7661 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7662 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7665 if (fixP
->fx_r_type
!= BFD_RELOC_PPC_TOC16
)
7666 fixP
->fx_addnumber
= 0;
7670 fixP
->fx_addnumber
= 0;
7672 /* We want to use the offset within the toc, not the actual VMA
7674 fixP
->fx_addnumber
=
7675 - bfd_get_section_vma (stdoutput
, S_GET_SEGMENT (fixP
->fx_addsy
))
7676 - S_GET_VALUE (ppc_toc_csect
);
7677 /* Set *valP to avoid errors. */
7684 /* Generate a reloc for a fixup. */
7687 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7691 reloc
= XNEW (arelent
);
7693 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7694 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7695 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7696 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7697 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7699 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7700 _("reloc %d not supported by object file format"),
7701 (int) fixp
->fx_r_type
);
7704 reloc
->addend
= fixp
->fx_addnumber
;
7710 ppc_cfi_frame_initial_instructions (void)
7712 cfi_add_CFA_def_cfa (1, 0);
7716 tc_ppc_regname_to_dw2regnum (char *regname
)
7718 unsigned int regnum
= -1;
7722 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7724 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7725 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7726 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7727 { "spe_acc", 111 }, { "spefscr", 112 }
7730 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7731 if (strcmp (regnames
[i
].name
, regname
) == 0)
7732 return regnames
[i
].dw2regnum
;
7734 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7736 p
= regname
+ 1 + (regname
[1] == '.');
7737 regnum
= strtoul (p
, &q
, 10);
7738 if (p
== q
|| *q
|| regnum
>= 32)
7740 if (regname
[0] == 'f')
7742 else if (regname
[0] == 'v')
7745 else if (regname
[0] == 'c' && regname
[1] == 'r')
7747 p
= regname
+ 2 + (regname
[2] == '.');
7748 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7750 regnum
= p
[0] - '0' + 68;