3 Free Software Foundation, Inc.
4 Contributed by Joseph Myers <joseph@codesourcery.com>
5 Bernd Schmidt <bernds@codesourcery.com>
7 This file is part of GAS, the GNU Assembler.
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
25 #include "dwarf2dbg.h"
26 #include "safe-ctype.h"
28 #include "opcode/tic6x.h"
29 #include "elf/tic6x.h"
30 #include "elf32-tic6x.h"
32 /* Truncate and sign-extend at 32 bits, so that building on a 64-bit
33 host gives identical results to a 32-bit host. */
34 #define TRUNC(X) ((valueT) (X) & 0xffffffffU)
35 #define SEXT(X) ((TRUNC (X) ^ 0x80000000U) - 0x80000000U)
37 const char comment_chars
[] = ";";
38 const char line_comment_chars
[] = "#*;";
39 const char line_separator_chars
[] = "@";
41 const char EXP_CHARS
[] = "eE";
42 const char FLT_CHARS
[] = "dDfF";
44 const char *md_shortopts
= "";
48 OPTION_MARCH
= OPTION_MD_BASE
,
52 OPTION_MLITTLE_ENDIAN
,
56 struct option md_longopts
[] =
58 { "march", required_argument
, NULL
, OPTION_MARCH
},
59 { "matomic", no_argument
, NULL
, OPTION_MATOMIC
},
60 { "mno-atomic", no_argument
, NULL
, OPTION_MNO_ATOMIC
},
61 { "mbig-endian", no_argument
, NULL
, OPTION_MBIG_ENDIAN
},
62 { "mlittle-endian", no_argument
, NULL
, OPTION_MLITTLE_ENDIAN
},
63 { "mgenerate-rel", no_argument
, NULL
, OPTION_MGENERATE_REL
},
64 { NULL
, no_argument
, NULL
, 0 }
66 size_t md_longopts_size
= sizeof (md_longopts
);
68 /* Whether to enable atomic instructions. 1 to enable them, 0 to
69 disable, -1 to default from architecture. */
70 static int tic6x_atomic
= -1;
72 /* The instructions enabled based only on the selected architecture
73 (all instructions, if no architecture specified). Atomic
74 instructions may be enabled or disabled separately. */
75 static unsigned short tic6x_arch_enable
= (TIC6X_INSN_C62X
83 /* The instructions enabled based on the current set of features
84 (architecture, as modified by other options). */
85 static unsigned short tic6x_features
;
87 /* The architecture attribute value, or C6XABI_Tag_ISA_none if
89 static int tic6x_arch_attribute
= C6XABI_Tag_ISA_none
;
91 /* Whether any instructions at all have been seen. Once any
92 instructions have been seen, architecture attributes merge into the
93 previous attribute value rather than replacing it. */
94 static bfd_boolean tic6x_seen_insns
= FALSE
;
96 /* The number of registers in each register file supported by the
97 current architecture. */
98 static unsigned int tic6x_num_registers
;
100 /* Whether predication on A0 is possible. */
101 static bfd_boolean tic6x_predicate_a0
;
103 /* Whether execute packets can cross fetch packet boundaries. */
104 static bfd_boolean tic6x_can_cross_fp_boundary
;
106 /* Whether there are constraints on simultaneous reads and writes of
108 static bfd_boolean tic6x_long_data_constraints
;
110 /* Whether compact instructions are available. */
111 static bfd_boolean tic6x_compact_insns
;
113 /* Whether to generate RELA relocations. */
114 static bfd_boolean tic6x_generate_rela
= TRUE
;
116 /* Table of supported architecture variants. */
121 unsigned short features
;
123 static const tic6x_arch_table tic6x_arches
[] =
125 { "c62x", C6XABI_Tag_ISA_C62X
, TIC6X_INSN_C62X
},
126 { "c64x", C6XABI_Tag_ISA_C64X
, TIC6X_INSN_C62X
| TIC6X_INSN_C64X
},
127 { "c64x+", C6XABI_Tag_ISA_C64XP
, (TIC6X_INSN_C62X
129 | TIC6X_INSN_C64XP
) },
130 { "c67x", C6XABI_Tag_ISA_C67X
, TIC6X_INSN_C62X
| TIC6X_INSN_C67X
},
131 { "c67x+", C6XABI_Tag_ISA_C67XP
, (TIC6X_INSN_C62X
133 | TIC6X_INSN_C67XP
) },
134 { "c674x", C6XABI_Tag_ISA_C674X
, (TIC6X_INSN_C62X
139 | TIC6X_INSN_C674X
) }
142 /* Update the selected architecture based on ARCH, giving an error if
143 ARCH is an invalid value. Does not call tic6x_update_features; the
144 caller must do that if necessary. */
147 tic6x_use_arch (const char *arch
)
151 for (i
= 0; i
< ARRAY_SIZE (tic6x_arches
); i
++)
152 if (strcmp (arch
, tic6x_arches
[i
].arch
) == 0)
154 tic6x_arch_enable
= tic6x_arches
[i
].features
;
155 if (tic6x_seen_insns
)
157 = elf32_tic6x_merge_arch_attributes (tic6x_arch_attribute
,
158 tic6x_arches
[i
].attr
);
160 tic6x_arch_attribute
= tic6x_arches
[i
].attr
;
164 as_bad (_("unknown architecture '%s'"), arch
);
167 /* Parse a target-specific option. */
170 md_parse_option (int c
, char *arg
)
175 tic6x_use_arch (arg
);
182 case OPTION_MNO_ATOMIC
:
186 case OPTION_MBIG_ENDIAN
:
187 target_big_endian
= 1;
190 case OPTION_MLITTLE_ENDIAN
:
191 target_big_endian
= 0;
194 case OPTION_MGENERATE_REL
:
195 tic6x_generate_rela
= FALSE
;
205 md_show_usage (FILE *stream ATTRIBUTE_UNUSED
)
209 fputc ('\n', stream
);
210 fprintf (stream
, _("TMS320C6000 options:\n"));
211 fprintf (stream
, _(" -march=ARCH enable instructions from architecture ARCH\n"));
212 fprintf (stream
, _(" -matomic enable atomic operation instructions\n"));
213 fprintf (stream
, _(" -mno-atomic disable atomic operation instructions\n"));
214 fprintf (stream
, _(" -mbig-endian generate big-endian code\n"));
215 fprintf (stream
, _(" -mlittle-endian generate little-endian code\n"));
216 /* -mgenerate-rel is only for testsuite use and is deliberately
219 fputc ('\n', stream
);
220 fprintf (stream
, _("Supported ARCH values are:"));
221 for (i
= 0; i
< ARRAY_SIZE (tic6x_arches
); i
++)
222 fprintf (stream
, " %s", tic6x_arches
[i
].arch
);
223 fputc ('\n', stream
);
226 /* Update enabled features based on the current architecture and
229 tic6x_update_features (void)
231 switch (tic6x_atomic
)
234 tic6x_features
= tic6x_arch_enable
;
238 tic6x_features
= tic6x_arch_enable
& ~TIC6X_INSN_ATOMIC
;
242 tic6x_features
= tic6x_arch_enable
| TIC6X_INSN_ATOMIC
;
250 = (tic6x_arch_enable
& (TIC6X_INSN_C64X
| TIC6X_INSN_C67XP
)) ? 32 : 16;
252 tic6x_predicate_a0
= (tic6x_arch_enable
& TIC6X_INSN_C64X
) ? TRUE
: FALSE
;
254 tic6x_can_cross_fp_boundary
256 & (TIC6X_INSN_C64X
| TIC6X_INSN_C67XP
)) ? TRUE
: FALSE
;
258 tic6x_long_data_constraints
259 = (tic6x_arch_enable
& TIC6X_INSN_C64X
) ? FALSE
: TRUE
;
261 tic6x_compact_insns
= (tic6x_arch_enable
& TIC6X_INSN_C64XP
) ? TRUE
: FALSE
;
264 /* Do configuration after all options have been parsed. */
267 tic6x_after_parse_args (void)
269 tic6x_update_features ();
272 /* Parse a .arch directive. */
275 s_tic6x_arch (int ignored ATTRIBUTE_UNUSED
)
280 arch
= input_line_pointer
;
281 while (*input_line_pointer
&& !ISSPACE (*input_line_pointer
))
282 input_line_pointer
++;
283 c
= *input_line_pointer
;
284 *input_line_pointer
= 0;
286 tic6x_use_arch (arch
);
287 tic6x_update_features ();
288 *input_line_pointer
= c
;
289 demand_empty_rest_of_line ();
292 /* Parse a .atomic directive. */
295 s_tic6x_atomic (int ignored ATTRIBUTE_UNUSED
)
298 tic6x_update_features ();
299 demand_empty_rest_of_line ();
302 /* Parse a .noatomic directive. */
305 s_tic6x_noatomic (int ignored ATTRIBUTE_UNUSED
)
308 tic6x_update_features ();
309 demand_empty_rest_of_line ();
312 /* Parse a .nocmp directive. */
315 s_tic6x_nocmp (int ignored ATTRIBUTE_UNUSED
)
317 seg_info (now_seg
)->tc_segment_info_data
.nocmp
= TRUE
;
318 demand_empty_rest_of_line ();
321 /* Track for each attribute whether it has been set explicitly (and so
322 should not have a default value set by the assembler). */
323 static bfd_boolean tic6x_attributes_set_explicitly
[NUM_KNOWN_OBJ_ATTRIBUTES
];
325 /* Parse a .c6xabi_attribute directive. */
328 s_tic6x_c6xabi_attribute (int ignored ATTRIBUTE_UNUSED
)
330 int tag
= s_vendor_attribute (OBJ_ATTR_PROC
);
332 if (tag
< NUM_KNOWN_OBJ_ATTRIBUTES
)
333 tic6x_attributes_set_explicitly
[tag
] = TRUE
;
340 } tic6x_attribute_table
;
342 static const tic6x_attribute_table tic6x_attributes
[] =
344 #define TAG(tag, value) { #tag, tag }
345 #include "elf/tic6x-attrs.h"
349 /* Convert an attribute name to a number. */
352 tic6x_convert_symbolic_attribute (const char *name
)
356 for (i
= 0; i
< ARRAY_SIZE (tic6x_attributes
); i
++)
357 if (strcmp (name
, tic6x_attributes
[i
].name
) == 0)
358 return tic6x_attributes
[i
].tag
;
363 const pseudo_typeS md_pseudo_table
[] =
365 { "arch", s_tic6x_arch
, 0 },
366 { "atomic", s_tic6x_atomic
, 0 },
367 { "c6xabi_attribute", s_tic6x_c6xabi_attribute
, 0 },
368 { "noatomic", s_tic6x_noatomic
, 0 },
369 { "nocmp", s_tic6x_nocmp
, 0 },
374 /* Hash table of opcodes. For each opcode name, this stores a pointer
375 to a tic6x_opcode_list listing (in an arbitrary order) all opcode
376 table entries with that name. */
377 static struct hash_control
*opcode_hash
;
379 /* Initialize the assembler (called once at assembler startup). */
386 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, 0);
388 /* Insert opcodes into the hash table. */
389 opcode_hash
= hash_new ();
390 for (id
= 0; id
< tic6x_opcode_max
; id
++)
393 tic6x_opcode_list
*opc
= xmalloc (sizeof (tic6x_opcode_list
));
396 opc
->next
= hash_find (opcode_hash
, tic6x_opcode_table
[id
].name
);
397 if ((errmsg
= hash_jam (opcode_hash
, tic6x_opcode_table
[id
].name
, opc
))
399 as_fatal ("%s", _(errmsg
));
403 /* Whether the current line being parsed had the "||" parallel bars. */
404 static bfd_boolean tic6x_line_parallel
;
406 /* Whether the current line being parsed started "||^" to indicate an
407 SPMASKed parallel instruction. */
408 static bfd_boolean tic6x_line_spmask
;
410 /* If the current line being parsed had an instruction predicate, the
411 creg value for that predicate (which must be nonzero); otherwise
413 static unsigned int tic6x_line_creg
;
415 /* If the current line being parsed had an instruction predicate, the
416 z value for that predicate; otherwise 0. */
417 static unsigned int tic6x_line_z
;
419 /* Return 1 (updating input_line_pointer as appropriate) if the line
420 starting with C (immediately before input_line_pointer) starts with
421 pre-opcode text appropriate for this target, 0 otherwise. */
424 tic6x_unrecognized_line (int c
)
429 bfd_boolean bad_predicate
;
434 if (input_line_pointer
[0] == '|')
436 if (input_line_pointer
[1] == '^')
438 tic6x_line_spmask
= TRUE
;
439 input_line_pointer
+= 2;
442 input_line_pointer
+= 1;
443 if (tic6x_line_parallel
)
444 as_bad (_("multiple '||' on same line"));
445 tic6x_line_parallel
= TRUE
;
447 as_bad (_("'||' after predicate"));
453 /* If it doesn't look like a predicate at all, just return 0.
454 If it looks like one but not a valid one, give a better
456 p
= input_line_pointer
;
457 while (*p
!= ']' && !is_end_of_line
[(unsigned char) *p
])
462 p
= input_line_pointer
;
464 bad_predicate
= FALSE
;
470 if (*p
== 'A' || *p
== 'a')
472 else if (*p
== 'B' || *p
== 'b')
476 areg
= TRUE
; /* Avoid uninitialized warning. */
477 bad_predicate
= TRUE
;
482 if (*p
!= '0' && *p
!= '1' && *p
!= '2')
483 bad_predicate
= TRUE
;
484 else if (p
[1] != ']')
485 bad_predicate
= TRUE
;
487 input_line_pointer
= p
+ 2;
491 as_bad (_("multiple predicates on same line"));
497 as_bad (_("bad predicate '%s'"), input_line_pointer
- 1);
499 input_line_pointer
= endp
;
506 tic6x_line_creg
= (areg
? 6 : 1);
507 if (areg
&& !tic6x_predicate_a0
)
508 as_bad (_("predication on A0 not supported on this architecture"));
512 tic6x_line_creg
= (areg
? 4 : 2);
516 tic6x_line_creg
= (areg
? 5 : 3);
531 /* Do any target-specific handling of a label required. */
534 tic6x_frob_label (symbolS
*sym
)
536 segment_info_type
*si
;
537 tic6x_label_list
*list
;
539 if (tic6x_line_parallel
)
541 as_bad (_("label after '||'"));
542 tic6x_line_parallel
= FALSE
;
543 tic6x_line_spmask
= FALSE
;
547 as_bad (_("label after predicate"));
552 si
= seg_info (now_seg
);
553 list
= si
->tc_segment_info_data
.label_list
;
554 si
->tc_segment_info_data
.label_list
= xmalloc (sizeof (tic6x_label_list
));
555 si
->tc_segment_info_data
.label_list
->next
= list
;
556 si
->tc_segment_info_data
.label_list
->label
= sym
;
558 /* Defining tc_frob_label overrides the ELF definition of
559 obj_frob_label, so we need to apply its effects here. */
560 dwarf2_emit_label (sym
);
563 /* At end-of-line, give errors for start-of-line decorations that
564 needed an instruction but were not followed by one. */
567 tic6x_end_of_line (void)
569 if (tic6x_line_parallel
)
571 as_bad (_("'||' not followed by instruction"));
572 tic6x_line_parallel
= FALSE
;
573 tic6x_line_spmask
= FALSE
;
577 as_bad (_("predicate not followed by instruction"));
583 /* Do any target-specific handling of the start of a logical line. */
586 tic6x_start_line_hook (void)
588 tic6x_end_of_line ();
591 /* Do target-specific handling immediately after an input file from
592 the command line, and any other inputs it includes, have been
598 tic6x_end_of_line ();
601 /* Do target-specific initialization after arguments have been
602 processed and the output file created. */
605 tic6x_init_after_args (void)
607 elf32_tic6x_set_use_rela_p (stdoutput
, tic6x_generate_rela
);
610 /* Free LIST of labels (possibly NULL). */
613 tic6x_free_label_list (tic6x_label_list
*list
)
617 tic6x_label_list
*old
= list
;
624 /* Handle a data alignment of N bytes. */
627 tic6x_cons_align (int n ATTRIBUTE_UNUSED
)
629 segment_info_type
*seginfo
= seg_info (now_seg
);
631 /* Data means there is no current execute packet, and that any label
632 applies to that data rather than a subsequent instruction. */
633 tic6x_free_label_list (seginfo
->tc_segment_info_data
.label_list
);
634 seginfo
->tc_segment_info_data
.label_list
= NULL
;
635 seginfo
->tc_segment_info_data
.execute_packet_frag
= NULL
;
636 seginfo
->tc_segment_info_data
.last_insn_lsb
= NULL
;
637 seginfo
->tc_segment_info_data
.spmask_addr
= NULL
;
638 seginfo
->tc_segment_info_data
.func_units_used
= 0;
641 /* Handle an alignment directive. Return TRUE if the
642 machine-independent frag generation should be skipped. */
645 tic6x_do_align (int n
, char *fill
, int len ATTRIBUTE_UNUSED
, int max
)
647 /* Given code alignments of 4, 8, 16 or 32 bytes, we try to handle
648 them in the md_end pass by inserting NOPs in parallel with
649 previous instructions. We only do this in sections containing
650 nothing but instructions. Code alignments of 1 or 2 bytes have
651 no effect in such sections (but we record them with
652 machine-dependent frags anyway so they can be skipped or
653 converted to machine-independent), while those of more than 64
654 bytes cannot reliably be handled in this way. */
660 && subseg_text_p (now_seg
))
668 /* Machine-independent code would generate a frag here, but we
669 wish to handle it in a machine-dependent way. */
670 if (frag_now_fix () != 0)
672 if (frag_now
->fr_type
!= rs_machine_dependent
)
673 frag_wane (frag_now
);
678 align_frag
= frag_now
;
679 p
= frag_var (rs_machine_dependent
, 32, 32, max
, NULL
, n
, NULL
);
680 /* This must be the same as the frag to which a pointer was just
682 if (p
!= align_frag
->fr_literal
)
684 align_frag
->tc_frag_data
.is_insns
= FALSE
;
691 /* Types of operand for parsing purposes. These are used as bit-masks
692 to tell tic6x_parse_operand what forms of operand are
694 #define TIC6X_OP_EXP 0x0001u
695 #define TIC6X_OP_REG 0x0002u
696 #define TIC6X_OP_REGPAIR 0x0004u
697 #define TIC6X_OP_IRP 0x0008u
698 #define TIC6X_OP_NRP 0x0010u
699 /* With TIC6X_OP_MEM_NOUNREG, the contents of a () offset are always
700 interpreted as an expression, which may be a symbol with the same
701 name as a register that ends up being implicitly DP-relative. With
702 TIC6X_OP_MEM_UNREG, the contents of a () offset are interpreted as
703 a register if they match one, and failing that as an expression,
704 which must be constant. */
705 #define TIC6X_OP_MEM_NOUNREG 0x0020u
706 #define TIC6X_OP_MEM_UNREG 0x0040u
707 #define TIC6X_OP_CTRL 0x0080u
708 #define TIC6X_OP_FUNC_UNIT 0x0100u
710 /* A register or register pair read by the assembler. */
713 /* The side the register is on (1 or 2). */
715 /* The register number (0 to 31). */
719 /* Types of modification of a base address. */
725 tic6x_mem_mod_preinc
,
726 tic6x_mem_mod_predec
,
727 tic6x_mem_mod_postinc
,
728 tic6x_mem_mod_postdec
731 /* Scaled [] or unscaled () nature of an offset. */
736 tic6x_offset_unscaled
739 /* A memory operand read by the assembler. */
742 /* The base register. */
743 tic6x_register base_reg
;
744 /* How the base register is modified. */
746 /* Whether there is an offset (required with plain "+" and "-"), and
747 whether it is scaled or unscaled if so. */
748 tic6x_mem_scaling scaled
;
749 /* Whether the offset is a register (TRUE) or an expression
751 bfd_boolean offset_is_reg
;
760 /* A functional unit in SPMASK operands read by the assembler. */
763 /* The basic unit. */
764 tic6x_func_unit_base base
;
765 /* The side (1 or 2). */
767 } tic6x_func_unit_operand
;
769 /* An operand read by the assembler. */
772 /* The syntactic form of the operand, as one of the bit-masks
775 /* The operand value. */
778 /* An expression: TIC6X_OP_EXP. */
780 /* A register: TIC6X_OP_REG, TIC6X_OP_REGPAIR. */
782 /* A memory reference: TIC6X_OP_MEM_NOUNREG,
783 TIC6X_OP_MEM_UNREG. */
785 /* A control register: TIC6X_OP_CTRL. */
787 /* A functional unit: TIC6X_OP_FUNC_UNIT. */
788 tic6x_func_unit_operand func_unit
;
792 #define skip_whitespace(str) do { if (*(str) == ' ') ++(str); } while (0)
794 /* Parse a register operand, or part of an operand, starting at *P.
795 If syntactically OK (including that the number is in the range 0 to
796 31, but not necessarily in range for this architecture), return
797 TRUE, putting the register side and number in *REG and update *P to
798 point immediately after the register number; otherwise return FALSE
799 without changing *P (but possibly changing *REG). Do not print any
803 tic6x_parse_register (char **p
, tic6x_register
*reg
)
824 if (*r
>= '0' && *r
<= '9')
832 if (reg
->num
> 0 && *r
>= '0' && *r
<= '9')
834 reg
->num
= reg
->num
* 10 + (*r
- '0');
838 if (*r
>= '0' && *r
<= '9')
847 /* Parse the initial two characters of a functional unit name starting
848 at *P. If OK, set *BASE and *SIDE and return TRUE; otherwise,
852 tic6x_parse_func_unit_base (char *p
, tic6x_func_unit_base
*base
,
855 bfd_boolean good_func_unit
= TRUE
;
856 tic6x_func_unit_base maybe_base
= tic6x_func_unit_nfu
;
857 unsigned int maybe_side
= 0;
863 maybe_base
= tic6x_func_unit_d
;
868 maybe_base
= tic6x_func_unit_l
;
873 maybe_base
= tic6x_func_unit_m
;
878 maybe_base
= tic6x_func_unit_s
;
882 good_func_unit
= FALSE
;
898 good_func_unit
= FALSE
;
908 return good_func_unit
;
911 /* Parse an operand starting at *P. If the operand parses OK, return
912 TRUE and store the value in *OP; otherwise return FALSE (possibly
913 changing *OP). In any case, update *P to point to the following
914 comma or end of line. The possible operand forms are given by
915 OP_FORMS. For diagnostics, this is operand OPNO of an opcode
916 starting at STR, length OPC_LEN. */
919 tic6x_parse_operand (char **p
, tic6x_operand
*op
, unsigned int op_forms
,
920 char *str
, int opc_len
, unsigned int opno
)
922 bfd_boolean operand_parsed
= FALSE
;
925 if ((op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
))
926 == (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
))
929 /* Check for functional unit names for SPMASK and SPMASKR. */
930 if (!operand_parsed
&& (op_forms
& TIC6X_OP_FUNC_UNIT
))
932 tic6x_func_unit_base base
= tic6x_func_unit_nfu
;
933 unsigned int side
= 0;
935 if (tic6x_parse_func_unit_base (q
, &base
, &side
))
939 skip_whitespace (rq
);
940 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
942 op
->form
= TIC6X_OP_FUNC_UNIT
;
943 op
->value
.func_unit
.base
= base
;
944 op
->value
.func_unit
.side
= side
;
945 operand_parsed
= TRUE
;
951 /* Check for literal "irp". */
952 if (!operand_parsed
&& (op_forms
& TIC6X_OP_IRP
))
954 if ((q
[0] == 'i' || q
[0] == 'I')
955 && (q
[1] == 'r' || q
[1] == 'R')
956 && (q
[2] == 'p' || q
[2] == 'P'))
960 skip_whitespace (rq
);
961 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
963 op
->form
= TIC6X_OP_IRP
;
964 operand_parsed
= TRUE
;
970 /* Check for literal "nrp". */
971 if (!operand_parsed
&& (op_forms
& TIC6X_OP_NRP
))
973 if ((q
[0] == 'n' || q
[0] == 'N')
974 && (q
[1] == 'r' || q
[1] == 'R')
975 && (q
[2] == 'p' || q
[2] == 'P'))
979 skip_whitespace (rq
);
980 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
982 op
->form
= TIC6X_OP_NRP
;
983 operand_parsed
= TRUE
;
989 /* Check for control register names. */
990 if (!operand_parsed
&& (op_forms
& TIC6X_OP_CTRL
))
994 for (crid
= 0; crid
< tic6x_ctrl_max
; crid
++)
996 size_t len
= strlen (tic6x_ctrl_table
[crid
].name
);
998 if (strncasecmp (tic6x_ctrl_table
[crid
].name
, q
, len
) == 0)
1002 skip_whitespace (rq
);
1003 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1005 op
->form
= TIC6X_OP_CTRL
;
1006 op
->value
.ctrl
= crid
;
1007 operand_parsed
= TRUE
;
1009 if (!(tic6x_ctrl_table
[crid
].isa_variants
& tic6x_features
))
1010 as_bad (_("control register '%s' not supported "
1011 "on this architecture"),
1012 tic6x_ctrl_table
[crid
].name
);
1018 /* See if this looks like a memory reference. */
1020 && (op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
)))
1022 bfd_boolean mem_ok
= TRUE
;
1024 tic6x_mem_mod mem_mod
= tic6x_mem_mod_none
;
1025 tic6x_register base_reg
;
1026 bfd_boolean require_offset
, permit_offset
;
1027 tic6x_mem_scaling scaled
;
1028 bfd_boolean offset_is_reg
;
1029 expressionS offset_exp
;
1030 tic6x_register offset_reg
;
1039 skip_whitespace (mq
);
1045 mem_mod
= tic6x_mem_mod_preinc
;
1050 mem_mod
= tic6x_mem_mod_plus
;
1058 mem_mod
= tic6x_mem_mod_predec
;
1063 mem_mod
= tic6x_mem_mod_minus
;
1075 skip_whitespace (mq
);
1076 mem_ok
= tic6x_parse_register (&mq
, &base_reg
);
1079 if (mem_ok
&& mem_mod
== tic6x_mem_mod_none
)
1081 skip_whitespace (mq
);
1082 if (mq
[0] == '+' && mq
[1] == '+')
1084 mem_mod
= tic6x_mem_mod_postinc
;
1087 else if (mq
[0] == '-' && mq
[1] == '-')
1089 mem_mod
= tic6x_mem_mod_postdec
;
1094 if (mem_mod
== tic6x_mem_mod_none
)
1095 permit_offset
= FALSE
;
1097 permit_offset
= TRUE
;
1098 if (mem_mod
== tic6x_mem_mod_plus
|| mem_mod
== tic6x_mem_mod_minus
)
1099 require_offset
= TRUE
;
1101 require_offset
= FALSE
;
1102 scaled
= tic6x_offset_none
;
1103 offset_is_reg
= FALSE
;
1105 if (mem_ok
&& permit_offset
)
1109 skip_whitespace (mq
);
1113 scaled
= tic6x_offset_scaled
;
1119 scaled
= tic6x_offset_unscaled
;
1127 if (scaled
!= tic6x_offset_none
)
1129 skip_whitespace (mq
);
1130 if (scaled
== tic6x_offset_scaled
1131 || (op_forms
& TIC6X_OP_MEM_UNREG
))
1136 reg_ok
= tic6x_parse_register (&rq
, &offset_reg
);
1139 skip_whitespace (rq
);
1143 offset_is_reg
= TRUE
;
1149 char *save_input_line_pointer
;
1151 save_input_line_pointer
= input_line_pointer
;
1152 input_line_pointer
= mq
;
1153 expression (&offset_exp
);
1154 mq
= input_line_pointer
;
1155 input_line_pointer
= save_input_line_pointer
;
1157 skip_whitespace (mq
);
1165 if (mem_ok
&& require_offset
&& scaled
== tic6x_offset_none
)
1170 skip_whitespace (mq
);
1171 if (!is_end_of_line
[(unsigned char) *mq
] && *mq
!= ',')
1177 op
->form
= op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
);
1178 op
->value
.mem
.base_reg
= base_reg
;
1179 op
->value
.mem
.mod
= mem_mod
;
1180 op
->value
.mem
.scaled
= scaled
;
1181 op
->value
.mem
.offset_is_reg
= offset_is_reg
;
1183 op
->value
.mem
.offset
.reg
= offset_reg
;
1185 op
->value
.mem
.offset
.exp
= offset_exp
;
1186 operand_parsed
= TRUE
;
1188 if (base_reg
.num
>= tic6x_num_registers
)
1189 as_bad (_("register number %u not supported on this architecture"),
1191 if (offset_is_reg
&& offset_reg
.num
>= tic6x_num_registers
)
1192 as_bad (_("register number %u not supported on this architecture"),
1197 /* See if this looks like a register or register pair. */
1198 if (!operand_parsed
&& (op_forms
& (TIC6X_OP_REG
| TIC6X_OP_REGPAIR
)))
1200 tic6x_register first_reg
, second_reg
;
1204 reg_ok
= tic6x_parse_register (&rq
, &first_reg
);
1208 if (*rq
== ':' && (op_forms
& TIC6X_OP_REGPAIR
))
1211 reg_ok
= tic6x_parse_register (&rq
, &second_reg
);
1214 skip_whitespace (rq
);
1215 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1217 if ((second_reg
.num
& 1)
1218 || (first_reg
.num
!= second_reg
.num
+ 1)
1219 || (first_reg
.side
!= second_reg
.side
))
1220 as_bad (_("register pair for operand %u of '%.*s'"
1221 " not a valid even/odd pair"), opno
,
1223 op
->form
= TIC6X_OP_REGPAIR
;
1224 op
->value
.reg
= second_reg
;
1225 operand_parsed
= TRUE
;
1230 else if (op_forms
& TIC6X_OP_REG
)
1232 skip_whitespace (rq
);
1233 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1235 op
->form
= TIC6X_OP_REG
;
1236 op
->value
.reg
= first_reg
;
1237 operand_parsed
= TRUE
;
1244 if (first_reg
.num
>= tic6x_num_registers
)
1245 as_bad (_("register number %u not supported on this architecture"),
1247 if (op
->form
== TIC6X_OP_REGPAIR
1248 && second_reg
.num
>= tic6x_num_registers
)
1249 as_bad (_("register number %u not supported on this architecture"),
1254 /* Otherwise, parse it as an expression. */
1255 if (!operand_parsed
&& (op_forms
& TIC6X_OP_EXP
))
1257 char *save_input_line_pointer
;
1259 save_input_line_pointer
= input_line_pointer
;
1260 input_line_pointer
= q
;
1261 op
->form
= TIC6X_OP_EXP
;
1262 expression (&op
->value
.exp
);
1263 q
= input_line_pointer
;
1264 input_line_pointer
= save_input_line_pointer
;
1265 operand_parsed
= TRUE
;
1270 /* Now the operand has been parsed, there must be nothing more
1271 before the comma or end of line. */
1272 skip_whitespace (q
);
1273 if (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1275 operand_parsed
= FALSE
;
1276 as_bad (_("junk after operand %u of '%.*s'"), opno
,
1278 while (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1284 /* This could not be parsed as any acceptable form of
1288 case TIC6X_OP_REG
| TIC6X_OP_REGPAIR
:
1289 as_bad (_("bad register or register pair for operand %u of '%.*s'"),
1290 opno
, opc_len
, str
);
1293 case TIC6X_OP_REG
| TIC6X_OP_CTRL
:
1295 as_bad (_("bad register for operand %u of '%.*s'"),
1296 opno
, opc_len
, str
);
1299 case TIC6X_OP_REGPAIR
:
1300 as_bad (_("bad register pair for operand %u of '%.*s'"),
1301 opno
, opc_len
, str
);
1304 case TIC6X_OP_FUNC_UNIT
:
1305 as_bad (_("bad functional unit for operand %u of '%.*s'"),
1306 opno
, opc_len
, str
);
1310 as_bad (_("bad operand %u of '%.*s'"),
1311 opno
, opc_len
, str
);
1315 while (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1319 return operand_parsed
;
1322 /* Table of assembler operators and associated O_* values. */
1327 } tic6x_operator_table
;
1328 static const tic6x_operator_table tic6x_operators
[] = {
1329 #define O_dsbt_index O_md1
1330 { "dsbt_index", O_dsbt_index
},
1333 #define O_dpr_got O_md3
1334 { "dpr_got", O_dpr_got
},
1335 #define O_dpr_byte O_md4
1336 { "dpr_byte", O_dpr_byte
},
1337 #define O_dpr_hword O_md5
1338 { "dpr_hword", O_dpr_hword
},
1339 #define O_dpr_word O_md6
1340 { "dpr_word", O_dpr_word
},
1343 /* Parse a name in some machine-specific way. Used on C6X to handle
1344 assembler operators. */
1347 tic6x_parse_name (const char *name
, expressionS
*exprP
,
1348 enum expr_mode mode ATTRIBUTE_UNUSED
, char *nextchar
)
1350 char *p
= input_line_pointer
;
1351 char c
, *name_start
, *name_end
;
1352 const char *inner_name
;
1354 operatorT op
= O_illegal
;
1360 for (i
= 0; i
< ARRAY_SIZE (tic6x_operators
); i
++)
1361 if (strcasecmp (name
+ 1, tic6x_operators
[i
].name
) == 0)
1363 op
= tic6x_operators
[i
].op
;
1367 if (op
== O_illegal
)
1370 *input_line_pointer
= *nextchar
;
1371 skip_whitespace (p
);
1375 *input_line_pointer
= 0;
1379 skip_whitespace (p
);
1381 if (!is_name_beginner (*p
))
1383 *input_line_pointer
= 0;
1389 while (is_part_of_name (*p
))
1392 skip_whitespace (p
);
1396 *input_line_pointer
= 0;
1400 input_line_pointer
= p
+ 1;
1401 *nextchar
= *input_line_pointer
;
1402 *input_line_pointer
= 0;
1406 inner_name
= name_start
;
1407 if (op
== O_dsbt_index
&& strcmp (inner_name
, "__c6xabi_DSBT_BASE") != 0)
1409 as_bad (_("$DSBT_INDEX must be used with __c6xabi_DSBT_BASE"));
1410 inner_name
= "__c6xabi_DSBT_BASE";
1412 sym
= symbol_find_or_make (inner_name
);
1416 exprP
->X_add_symbol
= sym
;
1417 exprP
->X_add_number
= 0;
1418 exprP
->X_op_symbol
= NULL
;
1424 /* Create a fixup for an expression. Same arguments as fix_new_exp,
1425 plus FIX_ADDA which is TRUE for ADDA instructions (to indicate that
1426 fixes resolving to constants should have those constants implicitly
1427 shifted) and FALSE otherwise, but look for C6X-specific expression
1428 types and adjust the relocations or give errors accordingly. */
1431 tic6x_fix_new_exp (fragS
*frag
, int where
, int size
, expressionS
*exp
,
1432 int pcrel
, bfd_reloc_code_real_type r_type
,
1433 bfd_boolean fix_adda
)
1435 bfd_reloc_code_real_type new_reloc
= BFD_RELOC_UNUSED
;
1443 case BFD_RELOC_C6000_SBR_U15_W
:
1444 new_reloc
= BFD_RELOC_C6000_DSBT_INDEX
;
1448 as_bad (_("$DSBT_INDEX not supported in this context"));
1456 case BFD_RELOC_C6000_SBR_U15_W
:
1457 new_reloc
= BFD_RELOC_C6000_SBR_GOT_U15_W
;
1461 as_bad (_("$GOT not supported in this context"));
1469 case BFD_RELOC_C6000_ABS_L16
:
1470 new_reloc
= BFD_RELOC_C6000_SBR_GOT_L16_W
;
1473 case BFD_RELOC_C6000_ABS_H16
:
1474 new_reloc
= BFD_RELOC_C6000_SBR_GOT_H16_W
;
1478 as_bad (_("$DPR_GOT not supported in this context"));
1486 case BFD_RELOC_C6000_ABS_S16
:
1487 new_reloc
= BFD_RELOC_C6000_SBR_S16
;
1490 case BFD_RELOC_C6000_ABS_L16
:
1491 new_reloc
= BFD_RELOC_C6000_SBR_L16_B
;
1494 case BFD_RELOC_C6000_ABS_H16
:
1495 new_reloc
= BFD_RELOC_C6000_SBR_H16_B
;
1499 as_bad (_("$DPR_BYTE not supported in this context"));
1507 case BFD_RELOC_C6000_ABS_L16
:
1508 new_reloc
= BFD_RELOC_C6000_SBR_L16_H
;
1511 case BFD_RELOC_C6000_ABS_H16
:
1512 new_reloc
= BFD_RELOC_C6000_SBR_H16_H
;
1516 as_bad (_("$DPR_HWORD not supported in this context"));
1524 case BFD_RELOC_C6000_ABS_L16
:
1525 new_reloc
= BFD_RELOC_C6000_SBR_L16_W
;
1528 case BFD_RELOC_C6000_ABS_H16
:
1529 new_reloc
= BFD_RELOC_C6000_SBR_H16_W
;
1533 as_bad (_("$DPR_WORD not supported in this context"));
1544 as_bad (_("invalid PC-relative operand"));
1550 if (new_reloc
== BFD_RELOC_UNUSED
)
1551 fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
1553 fix
= fix_new (frag
, where
, size
, exp
->X_add_symbol
, exp
->X_add_number
,
1555 fix
->tc_fix_data
.fix_adda
= fix_adda
;
1558 /* Generate a fix for a constant (.word etc.). Needed to ensure these
1559 go through the error checking in tic6x_fix_new_exp. */
1562 tic6x_cons_fix_new (fragS
*frag
, int where
, int size
, expressionS
*exp
)
1564 bfd_reloc_code_real_type r_type
;
1569 r_type
= BFD_RELOC_8
;
1573 r_type
= BFD_RELOC_16
;
1577 r_type
= BFD_RELOC_32
;
1581 as_bad (_("no %d-byte relocations available"), size
);
1585 tic6x_fix_new_exp (frag
, where
, size
, exp
, 0, r_type
, FALSE
);
1588 /* Initialize target-specific fix data. */
1591 tic6x_init_fix_data (fixS
*fixP
)
1593 fixP
->tc_fix_data
.fix_adda
= FALSE
;
1596 /* Return true if the fix can be handled by GAS, false if it must
1597 be passed through to the linker. */
1600 tic6x_fix_adjustable (fixS
*fixP
)
1602 switch (fixP
->fx_r_type
)
1604 /* Adjust_reloc_syms doesn't know about the GOT. */
1605 case BFD_RELOC_C6000_SBR_GOT_U15_W
:
1606 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
1607 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
1615 /* Given the fine-grained form of an operand, return the coarse
1619 tic6x_coarse_operand_form (tic6x_operand_form form
)
1623 case tic6x_operand_asm_const
:
1624 case tic6x_operand_link_const
:
1625 return TIC6X_OP_EXP
;
1627 case tic6x_operand_reg
:
1628 case tic6x_operand_xreg
:
1629 case tic6x_operand_dreg
:
1630 case tic6x_operand_areg
:
1631 case tic6x_operand_retreg
:
1632 return TIC6X_OP_REG
;
1634 case tic6x_operand_regpair
:
1635 case tic6x_operand_xregpair
:
1636 case tic6x_operand_dregpair
:
1637 return TIC6X_OP_REGPAIR
;
1639 case tic6x_operand_irp
:
1640 return TIC6X_OP_IRP
;
1642 case tic6x_operand_nrp
:
1643 return TIC6X_OP_NRP
;
1645 case tic6x_operand_ctrl
:
1646 return TIC6X_OP_CTRL
;
1648 case tic6x_operand_mem_short
:
1649 case tic6x_operand_mem_long
:
1650 case tic6x_operand_mem_deref
:
1651 return TIC6X_OP_MEM_NOUNREG
;
1653 case tic6x_operand_mem_ndw
:
1654 return TIC6X_OP_MEM_UNREG
;
1656 case tic6x_operand_func_unit
:
1657 return TIC6X_OP_FUNC_UNIT
;
1664 /* How an operand may match or not match a desired form. If different
1665 instruction alternatives fail in different ways, the first failure
1666 in this list determines the diagnostic. */
1670 tic6x_match_matches
,
1671 /* Bad coarse form. */
1674 tic6x_match_non_const
,
1675 /* Register on wrong side. */
1676 tic6x_match_wrong_side
,
1677 /* Not a valid address register. */
1678 tic6x_match_bad_address
,
1679 /* Not a valid return address register. */
1680 tic6x_match_bad_return
,
1681 /* Control register not readable. */
1682 tic6x_match_ctrl_write_only
,
1683 /* Control register not writable. */
1684 tic6x_match_ctrl_read_only
,
1685 /* Not a valid memory reference for this instruction. */
1687 } tic6x_operand_match
;
1689 /* Return whether an operand matches the given fine-grained form and
1690 read/write usage, and, if it does not match, how it fails to match.
1691 The main functional unit side is SIDE; the cross-path side is CROSS
1692 (the same as SIDE if a cross path not used); the data side is
1694 static tic6x_operand_match
1695 tic6x_operand_matches_form (const tic6x_operand
*op
, tic6x_operand_form form
,
1696 tic6x_rw rw
, unsigned int side
, unsigned int cross
,
1697 unsigned int data_side
)
1699 unsigned int coarse
= tic6x_coarse_operand_form (form
);
1701 if (coarse
!= op
->form
)
1702 return tic6x_match_coarse
;
1706 case tic6x_operand_asm_const
:
1707 if (op
->value
.exp
.X_op
== O_constant
)
1708 return tic6x_match_matches
;
1710 return tic6x_match_non_const
;
1712 case tic6x_operand_link_const
:
1713 case tic6x_operand_irp
:
1714 case tic6x_operand_nrp
:
1715 case tic6x_operand_func_unit
:
1716 /* All expressions are link-time constants, although there may
1717 not be relocations to express them in the output file. "irp"
1718 and "nrp" are unique operand values. All parsed functional
1719 unit names are valid. */
1720 return tic6x_match_matches
;
1722 case tic6x_operand_reg
:
1723 case tic6x_operand_regpair
:
1724 if (op
->value
.reg
.side
== side
)
1725 return tic6x_match_matches
;
1727 return tic6x_match_wrong_side
;
1729 case tic6x_operand_xreg
:
1730 case tic6x_operand_xregpair
:
1731 if (op
->value
.reg
.side
== cross
)
1732 return tic6x_match_matches
;
1734 return tic6x_match_wrong_side
;
1736 case tic6x_operand_dreg
:
1737 case tic6x_operand_dregpair
:
1738 if (op
->value
.reg
.side
== data_side
)
1739 return tic6x_match_matches
;
1741 return tic6x_match_wrong_side
;
1743 case tic6x_operand_areg
:
1744 if (op
->value
.reg
.side
!= cross
)
1745 return tic6x_match_wrong_side
;
1746 else if (op
->value
.reg
.side
== 2
1747 && (op
->value
.reg
.num
== 14 || op
->value
.reg
.num
== 15))
1748 return tic6x_match_matches
;
1750 return tic6x_match_bad_address
;
1752 case tic6x_operand_retreg
:
1753 if (op
->value
.reg
.side
!= side
)
1754 return tic6x_match_wrong_side
;
1755 else if (op
->value
.reg
.num
!= 3)
1756 return tic6x_match_bad_return
;
1758 return tic6x_match_matches
;
1760 case tic6x_operand_ctrl
:
1764 if (tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read
1765 || tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read_write
)
1766 return tic6x_match_matches
;
1768 return tic6x_match_ctrl_write_only
;
1770 case tic6x_rw_write
:
1771 if (tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_write
1772 || tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read_write
)
1773 return tic6x_match_matches
;
1775 return tic6x_match_ctrl_read_only
;
1781 case tic6x_operand_mem_deref
:
1782 if (op
->value
.mem
.mod
!= tic6x_mem_mod_none
)
1783 return tic6x_match_bad_mem
;
1784 else if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1786 else if (op
->value
.mem
.base_reg
.side
!= side
)
1787 return tic6x_match_bad_mem
;
1789 return tic6x_match_matches
;
1791 case tic6x_operand_mem_short
:
1792 case tic6x_operand_mem_ndw
:
1793 if (op
->value
.mem
.base_reg
.side
!= side
)
1794 return tic6x_match_bad_mem
;
1795 if (op
->value
.mem
.mod
== tic6x_mem_mod_none
)
1797 if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1799 return tic6x_match_matches
;
1801 if (op
->value
.mem
.scaled
== tic6x_offset_none
)
1803 if (op
->value
.mem
.mod
== tic6x_mem_mod_plus
1804 || op
->value
.mem
.mod
== tic6x_mem_mod_minus
)
1806 return tic6x_match_matches
;
1808 if (op
->value
.mem
.offset_is_reg
)
1810 if (op
->value
.mem
.scaled
== tic6x_offset_unscaled
1811 && form
!= tic6x_operand_mem_ndw
)
1813 if (op
->value
.mem
.offset
.reg
.side
== side
)
1814 return tic6x_match_matches
;
1816 return tic6x_match_bad_mem
;
1820 if (op
->value
.mem
.offset
.exp
.X_op
== O_constant
)
1821 return tic6x_match_matches
;
1823 return tic6x_match_bad_mem
;
1826 case tic6x_operand_mem_long
:
1827 if (op
->value
.mem
.base_reg
.side
== 2
1828 && (op
->value
.mem
.base_reg
.num
== 14
1829 || op
->value
.mem
.base_reg
.num
== 15))
1831 switch (op
->value
.mem
.mod
)
1833 case tic6x_mem_mod_none
:
1834 if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1836 return tic6x_match_matches
;
1838 case tic6x_mem_mod_plus
:
1839 if (op
->value
.mem
.scaled
== tic6x_offset_none
)
1841 if (op
->value
.mem
.offset_is_reg
)
1842 return tic6x_match_bad_mem
;
1843 else if (op
->value
.mem
.scaled
== tic6x_offset_scaled
1844 && op
->value
.mem
.offset
.exp
.X_op
!= O_constant
)
1845 return tic6x_match_bad_mem
;
1847 return tic6x_match_matches
;
1849 case tic6x_mem_mod_minus
:
1850 case tic6x_mem_mod_preinc
:
1851 case tic6x_mem_mod_predec
:
1852 case tic6x_mem_mod_postinc
:
1853 case tic6x_mem_mod_postdec
:
1854 return tic6x_match_bad_mem
;
1862 return tic6x_match_bad_mem
;
1869 /* Return the number of bits shift used with DP-relative coding method
1873 tic6x_dpr_shift (tic6x_coding_method coding
)
1877 case tic6x_coding_ulcst_dpr_byte
:
1880 case tic6x_coding_ulcst_dpr_half
:
1883 case tic6x_coding_ulcst_dpr_word
:
1891 /* Return the relocation used with DP-relative coding method
1894 static bfd_reloc_code_real_type
1895 tic6x_dpr_reloc (tic6x_coding_method coding
)
1899 case tic6x_coding_ulcst_dpr_byte
:
1900 return BFD_RELOC_C6000_SBR_U15_B
;
1902 case tic6x_coding_ulcst_dpr_half
:
1903 return BFD_RELOC_C6000_SBR_U15_H
;
1905 case tic6x_coding_ulcst_dpr_word
:
1906 return BFD_RELOC_C6000_SBR_U15_W
;
1913 /* Given a memory reference *MEM_REF as originally parsed, fill in
1914 defaults for missing offsets. */
1917 tic6x_default_mem_ref (tic6x_mem_ref
*mem_ref
)
1919 switch (mem_ref
->mod
)
1921 case tic6x_mem_mod_none
:
1922 if (mem_ref
->scaled
!= tic6x_offset_none
)
1924 mem_ref
->mod
= tic6x_mem_mod_plus
;
1925 mem_ref
->scaled
= tic6x_offset_unscaled
;
1926 mem_ref
->offset_is_reg
= FALSE
;
1927 memset (&mem_ref
->offset
.exp
, 0, sizeof mem_ref
->offset
.exp
);
1928 mem_ref
->offset
.exp
.X_op
= O_constant
;
1929 mem_ref
->offset
.exp
.X_add_number
= 0;
1930 mem_ref
->offset
.exp
.X_unsigned
= 0;
1933 case tic6x_mem_mod_plus
:
1934 case tic6x_mem_mod_minus
:
1935 if (mem_ref
->scaled
== tic6x_offset_none
)
1939 case tic6x_mem_mod_preinc
:
1940 case tic6x_mem_mod_predec
:
1941 case tic6x_mem_mod_postinc
:
1942 case tic6x_mem_mod_postdec
:
1943 if (mem_ref
->scaled
!= tic6x_offset_none
)
1945 mem_ref
->scaled
= tic6x_offset_scaled
;
1946 mem_ref
->offset_is_reg
= FALSE
;
1947 memset (&mem_ref
->offset
.exp
, 0, sizeof mem_ref
->offset
.exp
);
1948 mem_ref
->offset
.exp
.X_op
= O_constant
;
1949 mem_ref
->offset
.exp
.X_add_number
= 1;
1950 mem_ref
->offset
.exp
.X_unsigned
= 0;
1958 /* Return the encoding in the 8-bit field of an SPMASK or SPMASKR
1959 instruction of the specified UNIT, side SIDE. */
1962 tic6x_encode_spmask (tic6x_func_unit_base unit
, unsigned int side
)
1966 case tic6x_func_unit_l
:
1967 return 1 << (side
- 1);
1969 case tic6x_func_unit_s
:
1970 return 1 << (side
+ 1);
1972 case tic6x_func_unit_d
:
1973 return 1 << (side
+ 3);
1975 case tic6x_func_unit_m
:
1976 return 1 << (side
+ 5);
1983 /* Try to encode the instruction with opcode number ID and operands
1984 OPERANDS (number NUM_OPERANDS), creg value THIS_LINE_CREG and z
1985 value THIS_LINE_Z; FUNC_UNIT_SIDE, FUNC_UNIT_CROSS and
1986 FUNC_UNIT_DATA_SIDE describe the functional unit specification;
1987 SPLOOP_II is the ii value from the previous SPLOOP-family
1988 instruction, or 0 if not in such a loop; the only possible problems
1989 are operands being out of range (they already match the
1990 fine-grained form), and inappropriate predication. If this
1991 succeeds, return the encoding and set *OK to TRUE; otherwise return
1992 0 and set *OK to FALSE. If a fix is needed, set *FIX_NEEDED to
1993 true and fill in *FIX_EXP, *FIX_PCREL, *FX_R_TYPE and *FIX_ADDA.
1994 Print error messages for failure if PRINT_ERRORS is TRUE; the
1995 opcode starts at STR and has length OPC_LEN. */
1998 tic6x_try_encode (tic6x_opcode_id id
, tic6x_operand
*operands
,
1999 unsigned int num_operands
, unsigned int this_line_creg
,
2000 unsigned int this_line_z
, unsigned int func_unit_side
,
2001 unsigned int func_unit_cross
,
2002 unsigned int func_unit_data_side
, int sploop_ii
,
2003 expressionS
**fix_exp
, int *fix_pcrel
,
2004 bfd_reloc_code_real_type
*fx_r_type
, bfd_boolean
*fix_adda
,
2005 bfd_boolean
*fix_needed
, bfd_boolean
*ok
,
2006 bfd_boolean print_errors
, char *str
, int opc_len
)
2008 const tic6x_opcode
*opct
;
2009 const tic6x_insn_format
*fmt
;
2010 unsigned int opcode_value
;
2013 opct
= &tic6x_opcode_table
[id
];
2014 fmt
= &tic6x_insn_format_table
[opct
->format
];
2015 opcode_value
= fmt
->cst_bits
;
2017 for (fld
= 0; fld
< opct
->num_fixed_fields
; fld
++)
2019 if (opct
->fixed_fields
[fld
].min_val
== opct
->fixed_fields
[fld
].max_val
)
2021 const tic6x_insn_field
*fldd
;
2022 fldd
= tic6x_field_from_fmt (fmt
, opct
->fixed_fields
[fld
].field_id
);
2025 opcode_value
|= opct
->fixed_fields
[fld
].min_val
<< fldd
->low_pos
;
2029 for (fld
= 0; fld
< opct
->num_variable_fields
; fld
++)
2031 const tic6x_insn_field
*fldd
;
2037 unsigned int fcyc_bits
;
2042 fldd
= tic6x_field_from_fmt (fmt
, opct
->variable_fields
[fld
].field_id
);
2045 opno
= opct
->variable_fields
[fld
].operand_num
;
2046 switch (opct
->variable_fields
[fld
].coding_method
)
2048 case tic6x_coding_ucst
:
2049 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2051 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2053 ucexp
= operands
[opno
].value
.exp
;
2055 if (ucexp
.X_add_number
< 0
2056 || ucexp
.X_add_number
>= (1 << fldd
->width
))
2059 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2064 value
= ucexp
.X_add_number
;
2067 case tic6x_coding_scst
:
2068 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2070 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2073 /* Opcode table should not permit non-constants without
2074 a known relocation for them. */
2075 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2078 *fix_exp
= &operands
[opno
].value
.exp
;
2080 *fx_r_type
= BFD_RELOC_C6000_ABS_S16
;
2084 sign_value
= SEXT (operands
[opno
].value
.exp
.X_add_number
);
2086 if (sign_value
< -(1 << (fldd
->width
- 1))
2087 || (sign_value
>= (1 << (fldd
->width
- 1))))
2090 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2095 value
= sign_value
+ (1 << (fldd
->width
- 1));
2096 value
^= (1 << (fldd
->width
- 1));
2099 case tic6x_coding_ucst_minus_one
:
2100 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2102 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2104 if (operands
[opno
].value
.exp
.X_add_number
<= 0
2105 || operands
[opno
].value
.exp
.X_add_number
> (1 << fldd
->width
))
2108 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2113 value
= operands
[opno
].value
.exp
.X_add_number
- 1;
2116 case tic6x_coding_scst_negate
:
2117 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2119 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2121 sign_value
= SEXT (-operands
[opno
].value
.exp
.X_add_number
);
2122 goto signed_constant
;
2124 case tic6x_coding_ulcst_dpr_byte
:
2125 case tic6x_coding_ulcst_dpr_half
:
2126 case tic6x_coding_ulcst_dpr_word
:
2127 bits
= tic6x_dpr_shift (opct
->variable_fields
[fld
].coding_method
);
2128 switch (operands
[opno
].form
)
2131 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2133 ucexp
= operands
[opno
].value
.exp
;
2134 goto unsigned_constant
;
2136 expp
= &operands
[opno
].value
.exp
;
2139 case TIC6X_OP_MEM_NOUNREG
:
2140 mem
= operands
[opno
].value
.mem
;
2141 tic6x_default_mem_ref (&mem
);
2142 if (mem
.offset_is_reg
)
2144 if (mem
.offset
.exp
.X_op
== O_constant
)
2146 ucexp
= mem
.offset
.exp
;
2147 if (mem
.scaled
== tic6x_offset_unscaled
)
2149 if (ucexp
.X_add_number
& ((1 << bits
) - 1))
2152 as_bad (_("offset in operand %u of '%.*s' not "
2153 "divisible by %u"), opno
+ 1, opc_len
,
2158 ucexp
.X_add_number
>>= bits
;
2160 goto unsigned_constant
;
2162 if (mem
.scaled
!= tic6x_offset_unscaled
)
2164 if (operands
[opno
].value
.mem
.mod
== tic6x_mem_mod_none
2165 || operands
[opno
].value
.mem
.scaled
!= tic6x_offset_unscaled
2166 || operands
[opno
].value
.mem
.offset_is_reg
)
2168 expp
= &operands
[opno
].value
.mem
.offset
.exp
;
2175 /* Opcode table should not use this encoding without a known
2177 if (fldd
->low_pos
!= 8 || fldd
->width
!= 15)
2179 /* We do not check for offset divisibility here; such a
2180 check is not needed at this point to encode the value,
2181 and if there is eventually a problem it will be detected
2182 either in md_apply_fix or at link time. */
2187 = tic6x_dpr_reloc (opct
->variable_fields
[fld
].coding_method
);
2188 if (operands
[opno
].form
== TIC6X_OP_EXP
)
2194 case tic6x_coding_lcst_low16
:
2195 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2197 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2198 value
= operands
[opno
].value
.exp
.X_add_number
& 0xffff;
2202 /* Opcode table should not use this encoding without a
2203 known relocation. */
2204 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2207 *fix_exp
= &operands
[opno
].value
.exp
;
2209 *fx_r_type
= BFD_RELOC_C6000_ABS_L16
;
2214 case tic6x_coding_lcst_high16
:
2215 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2217 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2218 value
= (operands
[opno
].value
.exp
.X_add_number
>> 16) & 0xffff;
2222 /* Opcode table should not use this encoding without a
2223 known relocation. */
2224 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2227 *fix_exp
= &operands
[opno
].value
.exp
;
2229 *fx_r_type
= BFD_RELOC_C6000_ABS_H16
;
2234 case tic6x_coding_pcrel
:
2235 case tic6x_coding_pcrel_half
:
2236 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2240 *fix_exp
= &operands
[opno
].value
.exp
;
2242 if (fldd
->low_pos
== 7 && fldd
->width
== 21)
2243 *fx_r_type
= BFD_RELOC_C6000_PCR_S21
;
2244 else if (fldd
->low_pos
== 16 && fldd
->width
== 12)
2245 *fx_r_type
= BFD_RELOC_C6000_PCR_S12
;
2246 else if (fldd
->low_pos
== 13 && fldd
->width
== 10)
2247 *fx_r_type
= BFD_RELOC_C6000_PCR_S10
;
2248 else if (fldd
->low_pos
== 16 && fldd
->width
== 7)
2249 *fx_r_type
= BFD_RELOC_C6000_PCR_S7
;
2251 /* Opcode table should not use this encoding without a
2252 known relocation. */
2257 case tic6x_coding_reg
:
2258 switch (operands
[opno
].form
)
2261 case TIC6X_OP_REGPAIR
:
2262 value
= operands
[opno
].value
.reg
.num
;
2265 case TIC6X_OP_MEM_NOUNREG
:
2266 case TIC6X_OP_MEM_UNREG
:
2267 value
= operands
[opno
].value
.mem
.base_reg
.num
;
2275 case tic6x_coding_areg
:
2276 switch (operands
[opno
].form
)
2279 value
= (operands
[opno
].value
.reg
.num
== 15 ? 1 : 0);
2282 case TIC6X_OP_MEM_NOUNREG
:
2283 value
= (operands
[opno
].value
.mem
.base_reg
.num
== 15 ? 1 : 0);
2291 case tic6x_coding_crlo
:
2292 if (operands
[opno
].form
!= TIC6X_OP_CTRL
)
2294 value
= tic6x_ctrl_table
[operands
[opno
].value
.ctrl
].crlo
;
2297 case tic6x_coding_crhi
:
2298 if (operands
[opno
].form
!= TIC6X_OP_CTRL
)
2303 case tic6x_coding_reg_shift
:
2304 if (operands
[opno
].form
!= TIC6X_OP_REGPAIR
)
2306 value
= operands
[opno
].value
.reg
.num
>> 1;
2309 case tic6x_coding_mem_offset
:
2310 if (operands
[opno
].form
!= TIC6X_OP_MEM_NOUNREG
)
2312 mem
= operands
[opno
].value
.mem
;
2313 tic6x_default_mem_ref (&mem
);
2314 if (mem
.offset_is_reg
)
2316 if (mem
.scaled
!= tic6x_offset_scaled
)
2318 value
= mem
.offset
.reg
.num
;
2324 if (mem
.offset
.exp
.X_op
!= O_constant
)
2328 case tic6x_offset_scaled
:
2332 case tic6x_offset_unscaled
:
2333 scale
= opct
->operand_info
[opno
].size
;
2334 if (scale
!= 1 && scale
!= 2 && scale
!= 4 && scale
!= 8)
2341 if (mem
.offset
.exp
.X_add_number
< 0
2342 || mem
.offset
.exp
.X_add_number
>= (1 << fldd
->width
) * scale
)
2345 as_bad (_("offset in operand %u of '%.*s' out of range"),
2346 opno
+ 1, opc_len
, str
);
2350 if (mem
.offset
.exp
.X_add_number
% scale
)
2353 as_bad (_("offset in operand %u of '%.*s' not "
2355 opno
+ 1, opc_len
, str
, scale
);
2359 value
= mem
.offset
.exp
.X_add_number
/ scale
;
2363 case tic6x_coding_mem_offset_noscale
:
2364 if (operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2366 mem
= operands
[opno
].value
.mem
;
2367 tic6x_default_mem_ref (&mem
);
2368 if (mem
.offset_is_reg
)
2369 value
= mem
.offset
.reg
.num
;
2372 if (mem
.offset
.exp
.X_op
!= O_constant
)
2374 if (mem
.offset
.exp
.X_add_number
< 0
2375 || mem
.offset
.exp
.X_add_number
>= (1 << fldd
->width
))
2378 as_bad (_("offset in operand %u of '%.*s' out of range"),
2379 opno
+ 1, opc_len
, str
);
2383 value
= mem
.offset
.exp
.X_add_number
;
2387 case tic6x_coding_mem_mode
:
2388 if (operands
[opno
].form
!= TIC6X_OP_MEM_NOUNREG
2389 && operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2391 mem
= operands
[opno
].value
.mem
;
2392 tic6x_default_mem_ref (&mem
);
2395 case tic6x_mem_mod_plus
:
2399 case tic6x_mem_mod_minus
:
2403 case tic6x_mem_mod_preinc
:
2407 case tic6x_mem_mod_predec
:
2411 case tic6x_mem_mod_postinc
:
2415 case tic6x_mem_mod_postdec
:
2422 value
+= (mem
.offset_is_reg
? 4 : 0);
2425 case tic6x_coding_scaled
:
2426 if (operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2428 mem
= operands
[opno
].value
.mem
;
2429 tic6x_default_mem_ref (&mem
);
2432 case tic6x_offset_unscaled
:
2436 case tic6x_offset_scaled
:
2445 case tic6x_coding_spmask
:
2446 /* The position of such a field is hardcoded in the handling
2448 if (fldd
->low_pos
!= 18)
2451 for (opno
= 0; opno
< num_operands
; opno
++)
2455 v
= tic6x_encode_spmask (operands
[opno
].value
.func_unit
.base
,
2456 operands
[opno
].value
.func_unit
.side
);
2460 as_bad (_("functional unit already masked for operand "
2461 "%u of '%.*s'"), opno
+ 1, opc_len
, str
);
2469 case tic6x_coding_reg_unused
:
2470 /* This is a placeholder; correct handling goes along with
2471 resource constraint checks. */
2475 case tic6x_coding_fstg
:
2476 case tic6x_coding_fcyc
:
2477 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2479 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2484 as_bad (_("'%.*s' instruction not in a software "
2493 else if (sploop_ii
<= 2)
2495 else if (sploop_ii
<= 4)
2497 else if (sploop_ii
<= 8)
2499 else if (sploop_ii
<= 14)
2503 if (fcyc_bits
> fldd
->width
)
2506 if (opct
->variable_fields
[fld
].coding_method
== tic6x_coding_fstg
)
2509 if (operands
[opno
].value
.exp
.X_add_number
< 0
2510 || (operands
[opno
].value
.exp
.X_add_number
2511 >= (1 << (fldd
->width
- fcyc_bits
))))
2514 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2519 value
= operands
[opno
].value
.exp
.X_add_number
;
2520 for (t
= 0, i
= fcyc_bits
; i
< fldd
->width
; i
++)
2522 t
= (t
<< 1) | (value
& 1);
2525 value
= t
<< fcyc_bits
;
2529 if (operands
[opno
].value
.exp
.X_add_number
< 0
2530 || (operands
[opno
].value
.exp
.X_add_number
>= sploop_ii
))
2533 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2538 value
= operands
[opno
].value
.exp
.X_add_number
;
2542 case tic6x_coding_fu
:
2543 value
= func_unit_side
== 2 ? 1 : 0;
2546 case tic6x_coding_data_fu
:
2547 value
= func_unit_data_side
== 2 ? 1 : 0;
2550 case tic6x_coding_xpath
:
2551 value
= func_unit_cross
;
2558 for (ffld
= 0; ffld
< opct
->num_fixed_fields
; ffld
++)
2559 if ((opct
->fixed_fields
[ffld
].field_id
2560 == opct
->variable_fields
[fld
].field_id
)
2561 && (value
< opct
->fixed_fields
[ffld
].min_val
2562 || value
> opct
->fixed_fields
[ffld
].max_val
))
2565 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2571 opcode_value
|= value
<< fldd
->low_pos
;
2576 const tic6x_insn_field
*creg
;
2577 const tic6x_insn_field
*z
;
2579 creg
= tic6x_field_from_fmt (fmt
, tic6x_field_creg
);
2583 as_bad (_("instruction '%.*s' cannot be predicated"),
2588 z
= tic6x_field_from_fmt (fmt
, tic6x_field_z
);
2589 /* If there is a creg field, there must be a z field; otherwise
2590 there is an error in the format table. */
2594 opcode_value
|= this_line_creg
<< creg
->low_pos
;
2595 opcode_value
|= this_line_z
<< z
->low_pos
;
2599 return opcode_value
;
2602 /* Convert the target integer stored in N bytes in BUF to a host
2603 integer, returning that value. */
2606 md_chars_to_number (char *buf
, int n
)
2609 unsigned char *p
= (unsigned char *) buf
;
2611 if (target_big_endian
)
2616 result
|= (*p
++ & 0xff);
2624 result
|= (p
[n
] & 0xff);
2631 /* Assemble the instruction starting at STR (an opcode, with the
2632 opcode name all-lowercase). */
2635 md_assemble (char *str
)
2639 bfd_boolean this_line_parallel
;
2640 bfd_boolean this_line_spmask
;
2641 unsigned int this_line_creg
;
2642 unsigned int this_line_z
;
2643 tic6x_label_list
*this_insn_label_list
;
2644 segment_info_type
*seginfo
;
2645 tic6x_opcode_list
*opc_list
, *opc
;
2646 tic6x_func_unit_base func_unit_base
= tic6x_func_unit_nfu
;
2647 unsigned int func_unit_side
= 0;
2648 unsigned int func_unit_cross
= 0;
2649 unsigned int cross_side
= 0;
2650 unsigned int func_unit_data_side
= 0;
2651 unsigned int max_matching_opcodes
, num_matching_opcodes
;
2652 tic6x_opcode_id
*opcm
= NULL
;
2653 unsigned int opc_rank
[TIC6X_NUM_PREFER
];
2654 const tic6x_opcode
*opct
= NULL
;
2655 int min_rank
, try_rank
, max_rank
;
2656 bfd_boolean num_operands_permitted
[TIC6X_MAX_SOURCE_OPERANDS
+ 1]
2658 unsigned int operand_forms
[TIC6X_MAX_SOURCE_OPERANDS
] = { 0 };
2659 tic6x_operand operands
[TIC6X_MAX_SOURCE_OPERANDS
];
2660 unsigned int max_num_operands
;
2661 unsigned int num_operands_read
;
2662 bfd_boolean ok_this_arch
, ok_this_fu
, ok_this_arch_fu
;
2663 bfd_boolean bad_operands
= FALSE
;
2664 unsigned int opcode_value
;
2665 bfd_boolean encoded_ok
;
2666 bfd_boolean fix_needed
= FALSE
;
2667 expressionS
*fix_exp
= NULL
;
2669 bfd_reloc_code_real_type fx_r_type
= BFD_RELOC_UNUSED
;
2670 bfd_boolean fix_adda
= FALSE
;
2675 while (*p
&& !is_end_of_line
[(unsigned char) *p
] && *p
!= ' ')
2678 /* This function should only have been called when there is actually
2679 an instruction to assemble. */
2683 /* Now an instruction has been seen, architecture attributes from
2684 .arch directives merge with rather than overriding the previous
2686 tic6x_seen_insns
= TRUE
;
2687 /* If no .arch directives or -march options have been seen, we are
2688 assessing instruction validity based on the C674X default, so set
2689 the attribute accordingly. */
2690 if (tic6x_arch_attribute
== C6XABI_Tag_ISA_none
)
2691 tic6x_arch_attribute
= C6XABI_Tag_ISA_C674X
;
2693 /* Reset global settings for parallel bars and predicates now to
2694 avoid extra errors if there are problems with this opcode. */
2695 this_line_parallel
= tic6x_line_parallel
;
2696 this_line_spmask
= tic6x_line_spmask
;
2697 this_line_creg
= tic6x_line_creg
;
2698 this_line_z
= tic6x_line_z
;
2699 tic6x_line_parallel
= FALSE
;
2700 tic6x_line_spmask
= FALSE
;
2701 tic6x_line_creg
= 0;
2703 seginfo
= seg_info (now_seg
);
2704 this_insn_label_list
= seginfo
->tc_segment_info_data
.label_list
;
2705 seginfo
->tc_segment_info_data
.label_list
= NULL
;
2707 opc_list
= hash_find_n (opcode_hash
, str
, p
- str
);
2708 if (opc_list
== NULL
)
2712 as_bad (_("unknown opcode '%s'"), str
);
2718 skip_whitespace (p
);
2720 /* See if there is something that looks like a functional unit
2724 bfd_boolean good_func_unit
;
2725 tic6x_func_unit_base maybe_base
= tic6x_func_unit_nfu
;
2726 unsigned int maybe_side
= 0;
2727 unsigned int maybe_cross
= 0;
2728 unsigned int maybe_data_side
= 0;
2730 good_func_unit
= tic6x_parse_func_unit_base (p
+ 1, &maybe_base
,
2735 if (p
[3] == ' ' || is_end_of_line
[(unsigned char) p
[3]])
2737 else if ((p
[3] == 'x' || p
[3] == 'X')
2738 && (p
[4] == ' ' || is_end_of_line
[(unsigned char) p
[4]]))
2743 else if (maybe_base
== tic6x_func_unit_d
2744 && (p
[3] == 't' || p
[3] == 'T')
2745 && (p
[4] == '1' || p
[4] == '2')
2746 && (p
[5] == ' ' || is_end_of_line
[(unsigned char) p
[5]]))
2748 maybe_data_side
= p
[4] - '0';
2752 good_func_unit
= FALSE
;
2757 func_unit_base
= maybe_base
;
2758 func_unit_side
= maybe_side
;
2759 func_unit_cross
= maybe_cross
;
2760 cross_side
= (func_unit_cross
? 3 - func_unit_side
: func_unit_side
);
2761 func_unit_data_side
= maybe_data_side
;
2764 skip_whitespace (p
);
2767 /* Determine which entries in the opcode table match, and the
2768 associated permitted forms of operands. */
2769 max_matching_opcodes
= 0;
2770 for (opc
= opc_list
; opc
; opc
= opc
->next
)
2771 max_matching_opcodes
++;
2772 num_matching_opcodes
= 0;
2773 opcm
= xmalloc (max_matching_opcodes
* sizeof (*opcm
));
2774 max_num_operands
= 0;
2775 ok_this_arch
= FALSE
;
2777 ok_this_arch_fu
= FALSE
;
2778 for (opc
= opc_list
; opc
; opc
= opc
->next
)
2780 unsigned int num_operands
;
2782 bfd_boolean this_opc_arch_ok
= TRUE
;
2783 bfd_boolean this_opc_fu_ok
= TRUE
;
2785 if (tic6x_insn_format_table
[tic6x_opcode_table
[opc
->id
].format
].num_bits
2788 if (!(tic6x_opcode_table
[opc
->id
].isa_variants
& tic6x_features
))
2789 this_opc_arch_ok
= FALSE
;
2790 if (tic6x_opcode_table
[opc
->id
].func_unit
!= func_unit_base
)
2791 this_opc_fu_ok
= FALSE
;
2792 if (func_unit_side
== 1
2793 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SIDE_B_ONLY
))
2794 this_opc_fu_ok
= FALSE
;
2796 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_NO_CROSS
))
2797 this_opc_fu_ok
= FALSE
;
2798 if (!func_unit_data_side
2799 && (tic6x_opcode_table
[opc
->id
].flags
2800 & (TIC6X_FLAG_LOAD
| TIC6X_FLAG_STORE
)))
2801 this_opc_fu_ok
= FALSE
;
2802 if (func_unit_data_side
2803 && !(tic6x_opcode_table
[opc
->id
].flags
2804 & (TIC6X_FLAG_LOAD
| TIC6X_FLAG_STORE
)))
2805 this_opc_fu_ok
= FALSE
;
2806 if (func_unit_data_side
== 1
2807 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SIDE_T2_ONLY
))
2808 this_opc_fu_ok
= FALSE
;
2809 if (this_opc_arch_ok
)
2810 ok_this_arch
= TRUE
;
2813 if (!this_opc_arch_ok
|| !this_opc_fu_ok
)
2815 ok_this_arch_fu
= TRUE
;
2816 opcm
[num_matching_opcodes
] = opc
->id
;
2817 num_matching_opcodes
++;
2818 num_operands
= tic6x_opcode_table
[opc
->id
].num_operands
;
2820 if (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SPMASK
)
2822 if (num_operands
!= 1
2823 || (tic6x_opcode_table
[opc
->id
].operand_info
[0].form
2824 != tic6x_operand_func_unit
))
2827 for (i
= 0; i
< num_operands
; i
++)
2830 |= tic6x_coarse_operand_form (tic6x_operand_func_unit
);
2831 num_operands_permitted
[i
] = TRUE
;
2836 for (i
= 0; i
< num_operands
; i
++)
2838 tic6x_operand_form f
2839 = tic6x_opcode_table
[opc
->id
].operand_info
[i
].form
;
2841 operand_forms
[i
] |= tic6x_coarse_operand_form (f
);
2844 num_operands_permitted
[num_operands
] = TRUE
;
2845 if (num_operands
> max_num_operands
)
2846 max_num_operands
= num_operands
;
2851 as_bad (_("'%.*s' instruction not supported on this architecture"),
2859 as_bad (_("'%.*s' instruction not supported on this functional unit"),
2865 if (!ok_this_arch_fu
)
2867 as_bad (_("'%.*s' instruction not supported on this functional unit"
2868 " for this architecture"),
2874 /* If there were no instructions matching the above availability
2875 checks, we should now have given an error and returned. */
2876 if (num_matching_opcodes
== 0)
2879 num_operands_read
= 0;
2882 skip_whitespace (p
);
2883 if (is_end_of_line
[(unsigned char) *p
])
2885 if (num_operands_read
> 0)
2887 as_bad (_("missing operand after comma"));
2888 bad_operands
= TRUE
;
2893 if (max_num_operands
== 0)
2895 as_bad (_("too many operands to '%.*s'"), opc_len
, str
);
2896 bad_operands
= TRUE
;
2900 if (!tic6x_parse_operand (&p
, &operands
[num_operands_read
],
2901 operand_forms
[num_operands_read
], str
, opc_len
,
2902 num_operands_read
+ 1))
2903 bad_operands
= TRUE
;
2904 num_operands_read
++;
2906 if (is_end_of_line
[(unsigned char) *p
])
2911 if (num_operands_read
== max_num_operands
)
2913 as_bad (_("too many operands to '%.*s'"), opc_len
, str
);
2914 bad_operands
= TRUE
;
2920 /* Operand parsing should consume whole operands. */
2924 if (!bad_operands
&& !num_operands_permitted
[num_operands_read
])
2926 as_bad (_("bad number of operands to '%.*s'"), opc_len
, str
);
2927 bad_operands
= TRUE
;
2932 /* Each operand is of the right syntactic form for some opcode
2933 choice, and the number of operands is valid. Check that each
2934 operand is OK in detail for some opcode choice with the right
2935 number of operands. */
2938 for (i
= 0; i
< num_operands_read
; i
++)
2940 bfd_boolean coarse_ok
= FALSE
;
2941 bfd_boolean fine_ok
= FALSE
;
2942 tic6x_operand_match fine_failure
= tic6x_match_matches
;
2945 for (j
= 0; j
< num_matching_opcodes
; j
++)
2947 tic6x_operand_form f
;
2950 tic6x_operand_match this_fine_failure
;
2952 if (tic6x_opcode_table
[opcm
[j
]].flags
& TIC6X_FLAG_SPMASK
)
2954 f
= tic6x_operand_func_unit
;
2959 if (tic6x_opcode_table
[opcm
[j
]].num_operands
2960 != num_operands_read
)
2963 f
= tic6x_opcode_table
[opcm
[j
]].operand_info
[i
].form
;
2964 rw
= tic6x_opcode_table
[opcm
[j
]].operand_info
[i
].rw
;
2966 cf
= tic6x_coarse_operand_form (f
);
2968 if (operands
[i
].form
!= cf
)
2973 = tic6x_operand_matches_form (&operands
[i
], f
, rw
,
2976 func_unit_data_side
);
2977 if (this_fine_failure
== tic6x_match_matches
)
2982 if (fine_failure
== tic6x_match_matches
2983 || fine_failure
> this_fine_failure
)
2984 fine_failure
= this_fine_failure
;
2987 /* No instructions should have operand syntactic forms only
2988 acceptable with certain numbers of operands, so no
2989 diagnostic for this case. */
2995 switch (fine_failure
)
2997 case tic6x_match_non_const
:
2998 as_bad (_("operand %u of '%.*s' not constant"),
2999 i
+ 1, opc_len
, str
);
3002 case tic6x_match_wrong_side
:
3003 as_bad (_("operand %u of '%.*s' on wrong side"),
3004 i
+ 1, opc_len
, str
);
3007 case tic6x_match_bad_return
:
3008 as_bad (_("operand %u of '%.*s' not a valid return "
3009 "address register"),
3010 i
+ 1, opc_len
, str
);
3013 case tic6x_match_ctrl_write_only
:
3014 as_bad (_("operand %u of '%.*s' is write-only"),
3015 i
+ 1, opc_len
, str
);
3018 case tic6x_match_ctrl_read_only
:
3019 as_bad (_("operand %u of '%.*s' is read-only"),
3020 i
+ 1, opc_len
, str
);
3023 case tic6x_match_bad_mem
:
3024 as_bad (_("operand %u of '%.*s' not a valid memory "
3026 i
+ 1, opc_len
, str
);
3029 case tic6x_match_bad_address
:
3030 as_bad (_("operand %u of '%.*s' not a valid base "
3031 "address register"),
3032 i
+ 1, opc_len
, str
);
3038 bad_operands
= TRUE
;
3046 /* Each operand is OK for some opcode choice, and the number of
3047 operands is valid. Check whether there is an opcode choice
3048 for which all operands are simultaneously valid. */
3050 bfd_boolean found_match
= FALSE
;
3052 for (i
= 0; i
< TIC6X_NUM_PREFER
; i
++)
3053 opc_rank
[i
] = (unsigned int) -1;
3055 min_rank
= TIC6X_NUM_PREFER
- 1;
3058 for (i
= 0; i
< num_matching_opcodes
; i
++)
3061 bfd_boolean this_matches
= TRUE
;
3063 if (!(tic6x_opcode_table
[opcm
[i
]].flags
& TIC6X_FLAG_SPMASK
)
3064 && tic6x_opcode_table
[opcm
[i
]].num_operands
!= num_operands_read
)
3067 for (j
= 0; j
< num_operands_read
; j
++)
3069 tic6x_operand_form f
;
3072 if (tic6x_opcode_table
[opcm
[i
]].flags
& TIC6X_FLAG_SPMASK
)
3074 f
= tic6x_operand_func_unit
;
3079 f
= tic6x_opcode_table
[opcm
[i
]].operand_info
[j
].form
;
3080 rw
= tic6x_opcode_table
[opcm
[i
]].operand_info
[j
].rw
;
3082 if (tic6x_operand_matches_form (&operands
[j
], f
, rw
,
3085 func_unit_data_side
)
3086 != tic6x_match_matches
)
3088 this_matches
= FALSE
;
3095 int rank
= TIC6X_PREFER_VAL (tic6x_opcode_table
[opcm
[i
]].flags
);
3097 if (rank
< min_rank
)
3099 if (rank
> max_rank
)
3102 if (opc_rank
[rank
] == (unsigned int) -1)
3105 /* The opcode table should provide a total ordering
3106 for all cases where multiple matches may get
3116 as_bad (_("bad operand combination for '%.*s'"), opc_len
, str
);
3117 bad_operands
= TRUE
;
3129 for (try_rank
= max_rank
; try_rank
>= min_rank
; try_rank
--)
3133 if (opc_rank
[try_rank
] == (unsigned int) -1)
3136 opcode_value
= tic6x_try_encode (opcm
[opc_rank
[try_rank
]], operands
,
3137 num_operands_read
, this_line_creg
,
3138 this_line_z
, func_unit_side
,
3139 func_unit_cross
, func_unit_data_side
,
3140 seginfo
->tc_segment_info_data
.sploop_ii
,
3141 &fix_exp
, &fix_pcrel
, &fx_r_type
,
3142 &fix_adda
, &fix_needed
, &encoded_ok
,
3143 (try_rank
== min_rank
? TRUE
: FALSE
),
3147 opct
= &tic6x_opcode_table
[opcm
[opc_rank
[try_rank
]]];
3157 if (this_line_parallel
)
3159 insn_frag
= seginfo
->tc_segment_info_data
.execute_packet_frag
;
3160 if (insn_frag
== NULL
)
3162 as_bad (_("parallel instruction not following another instruction"));
3166 if (insn_frag
->fr_fix
>= 32)
3168 as_bad (_("too many instructions in execute packet"));
3172 if (this_insn_label_list
!= NULL
)
3173 as_bad (_("label not at start of execute packet"));
3175 if (opct
->flags
& TIC6X_FLAG_FIRST
)
3176 as_bad (_("'%.*s' instruction not at start of execute packet"),
3179 *seginfo
->tc_segment_info_data
.last_insn_lsb
|= 0x1;
3180 output
= insn_frag
->fr_literal
+ insn_frag
->fr_fix
;
3184 tic6x_label_list
*l
;
3186 seginfo
->tc_segment_info_data
.spmask_addr
= NULL
;
3187 seginfo
->tc_segment_info_data
.func_units_used
= 0;
3189 /* Start a new frag for this execute packet. */
3190 if (frag_now_fix () != 0)
3192 if (frag_now
->fr_type
!= rs_machine_dependent
)
3193 frag_wane (frag_now
);
3198 insn_frag
= seginfo
->tc_segment_info_data
.execute_packet_frag
= frag_now
;
3199 for (l
= this_insn_label_list
; l
; l
= l
->next
)
3201 symbol_set_frag (l
->label
, frag_now
);
3202 S_SET_VALUE (l
->label
, 0);
3203 S_SET_SEGMENT (l
->label
, now_seg
);
3205 tic6x_free_label_list (this_insn_label_list
);
3206 dwarf2_emit_insn (0);
3207 output
= frag_var (rs_machine_dependent
, 32, 32, 0, NULL
, 0, NULL
);
3208 /* This must be the same as the frag to which a pointer was just
3210 if (output
!= insn_frag
->fr_literal
)
3212 insn_frag
->tc_frag_data
.is_insns
= TRUE
;
3213 insn_frag
->tc_frag_data
.can_cross_fp_boundary
3214 = tic6x_can_cross_fp_boundary
;
3217 if (func_unit_base
!= tic6x_func_unit_nfu
)
3219 unsigned int func_unit_enc
;
3221 func_unit_enc
= tic6x_encode_spmask (func_unit_base
, func_unit_side
);
3223 if (seginfo
->tc_segment_info_data
.func_units_used
& func_unit_enc
)
3224 as_bad (_("functional unit already used in this execute packet"));
3226 seginfo
->tc_segment_info_data
.func_units_used
|= func_unit_enc
;
3229 if (opct
->flags
& TIC6X_FLAG_SPLOOP
)
3231 if (seginfo
->tc_segment_info_data
.sploop_ii
)
3232 as_bad (_("nested software pipelined loop"));
3233 if (num_operands_read
!= 1
3234 || operands
[0].form
!= TIC6X_OP_EXP
3235 || operands
[0].value
.exp
.X_op
!= O_constant
)
3237 seginfo
->tc_segment_info_data
.sploop_ii
3238 = operands
[0].value
.exp
.X_add_number
;
3240 else if (opct
->flags
& TIC6X_FLAG_SPKERNEL
)
3242 if (!seginfo
->tc_segment_info_data
.sploop_ii
)
3243 as_bad (_("'%.*s' instruction not in a software pipelined loop"),
3245 seginfo
->tc_segment_info_data
.sploop_ii
= 0;
3248 if (this_line_spmask
)
3250 if (seginfo
->tc_segment_info_data
.spmask_addr
== NULL
)
3251 as_bad (_("'||^' without previous SPMASK"));
3252 else if (func_unit_base
== tic6x_func_unit_nfu
)
3253 as_bad (_("cannot mask instruction using no functional unit"));
3256 unsigned int spmask_opcode
;
3257 unsigned int mask_bit
;
3260 = md_chars_to_number (seginfo
->tc_segment_info_data
.spmask_addr
,
3262 mask_bit
= tic6x_encode_spmask (func_unit_base
, func_unit_side
);
3264 if (spmask_opcode
& mask_bit
)
3265 as_bad (_("functional unit already masked"));
3266 spmask_opcode
|= mask_bit
;
3267 md_number_to_chars (seginfo
->tc_segment_info_data
.spmask_addr
,
3272 record_alignment (now_seg
, 5);
3273 md_number_to_chars (output
, opcode_value
, 4);
3275 tic6x_fix_new_exp (insn_frag
, output
- insn_frag
->fr_literal
, 4, fix_exp
,
3276 fix_pcrel
, fx_r_type
, fix_adda
);
3277 insn_frag
->fr_fix
+= 4;
3278 insn_frag
->fr_var
-= 4;
3279 seginfo
->tc_segment_info_data
.last_insn_lsb
3280 = (target_big_endian
? output
+ 3 : output
);
3281 if (opct
->flags
& TIC6X_FLAG_SPMASK
)
3282 seginfo
->tc_segment_info_data
.spmask_addr
= output
;
3285 /* Modify NEWVAL (32-bit) by inserting VALUE, shifted right by SHIFT
3286 and the least significant BITS bits taken, at position POS. */
3287 #define MODIFY_VALUE(NEWVAL, VALUE, SHIFT, POS, BITS) \
3289 (NEWVAL) &= 0xffffffffU & ~(((1U << (BITS)) - 1) << (POS)); \
3290 (NEWVAL) |= (((VALUE) >> (SHIFT)) & ((1U << (BITS)) - 1)) << (POS); \
3293 /* Apply a fixup to the object file. */
3296 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3298 offsetT value
= *valP
;
3299 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3301 value
= SEXT (value
);
3304 fixP
->fx_offset
= SEXT (fixP
->fx_offset
);
3306 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3309 /* We do our own overflow checks. */
3310 fixP
->fx_no_overflow
= 1;
3312 switch (fixP
->fx_r_type
)
3314 case BFD_RELOC_NONE
:
3315 /* Force output to the object file. */
3320 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3321 md_number_to_chars (buf
, value
, 4);
3325 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3327 if (value
< -0x8000 || value
> 0xffff)
3328 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3329 _("value too large for 2-byte field"));
3330 md_number_to_chars (buf
, value
, 2);
3335 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3337 if (value
< -0x80 || value
> 0xff)
3338 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3339 _("value too large for 1-byte field"));
3340 md_number_to_chars (buf
, value
, 1);
3344 case BFD_RELOC_C6000_ABS_S16
:
3345 case BFD_RELOC_C6000_ABS_L16
:
3346 case BFD_RELOC_C6000_SBR_S16
:
3347 case BFD_RELOC_C6000_SBR_L16_B
:
3348 case BFD_RELOC_C6000_SBR_L16_H
:
3349 case BFD_RELOC_C6000_SBR_L16_W
:
3350 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
3351 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3353 offsetT newval
= md_chars_to_number (buf
, 4);
3356 switch (fixP
->fx_r_type
)
3358 case BFD_RELOC_C6000_SBR_L16_H
:
3362 case BFD_RELOC_C6000_SBR_L16_W
:
3363 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
3372 MODIFY_VALUE (newval
, value
, shift
, 7, 16);
3373 if ((value
< -0x8000 || value
> 0x7fff)
3374 && (fixP
->fx_r_type
== BFD_RELOC_C6000_ABS_S16
3375 || fixP
->fx_r_type
== BFD_RELOC_C6000_SBR_S16
))
3376 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3377 _("immediate offset out of range"));
3379 md_number_to_chars (buf
, newval
, 4);
3382 && fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_S16
3383 && fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_L16
)
3387 case BFD_RELOC_C6000_ABS_H16
:
3388 case BFD_RELOC_C6000_SBR_H16_B
:
3389 case BFD_RELOC_C6000_SBR_H16_H
:
3390 case BFD_RELOC_C6000_SBR_H16_W
:
3391 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
3392 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3394 offsetT newval
= md_chars_to_number (buf
, 4);
3397 switch (fixP
->fx_r_type
)
3399 case BFD_RELOC_C6000_SBR_H16_H
:
3403 case BFD_RELOC_C6000_SBR_H16_W
:
3404 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
3413 MODIFY_VALUE (newval
, value
, shift
, 7, 16);
3415 md_number_to_chars (buf
, newval
, 4);
3417 if (fixP
->fx_done
&& fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_H16
)
3421 case BFD_RELOC_C6000_SBR_U15_B
:
3422 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3424 offsetT newval
= md_chars_to_number (buf
, 4);
3426 MODIFY_VALUE (newval
, value
, 0, 8, 15);
3427 if (value
< 0 || value
> 0x7fff)
3428 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3429 _("immediate offset out of range"));
3431 md_number_to_chars (buf
, newval
, 4);
3435 case BFD_RELOC_C6000_SBR_U15_H
:
3436 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3438 offsetT newval
= md_chars_to_number (buf
, 4);
3440 /* Constant ADDA operands, processed as constant when the
3441 instruction is parsed, are encoded as-is rather than
3442 shifted. If the operand of an ADDA instruction is now
3443 constant (for example, the difference between two labels
3444 found after the instruction), ensure it is encoded the
3445 same way it would have been if the constant value had
3446 been known when the instruction was parsed. */
3447 if (fixP
->tc_fix_data
.fix_adda
&& fixP
->fx_done
)
3450 MODIFY_VALUE (newval
, value
, 1, 8, 15);
3452 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3453 _("immediate offset not 2-byte-aligned"));
3454 if (value
< 0 || value
> 0xfffe)
3455 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3456 _("immediate offset out of range"));
3458 md_number_to_chars (buf
, newval
, 4);
3462 case BFD_RELOC_C6000_SBR_U15_W
:
3463 case BFD_RELOC_C6000_SBR_GOT_U15_W
:
3464 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3466 offsetT newval
= md_chars_to_number (buf
, 4);
3468 /* Constant ADDA operands, processed as constant when the
3469 instruction is parsed, are encoded as-is rather than
3470 shifted. If the operand of an ADDA instruction is now
3471 constant (for example, the difference between two labels
3472 found after the instruction), ensure it is encoded the
3473 same way it would have been if the constant value had
3474 been known when the instruction was parsed. */
3475 if (fixP
->tc_fix_data
.fix_adda
&& fixP
->fx_done
)
3478 MODIFY_VALUE (newval
, value
, 2, 8, 15);
3480 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3481 _("immediate offset not 4-byte-aligned"));
3482 if (value
< 0 || value
> 0x1fffc)
3483 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3484 _("immediate offset out of range"));
3486 md_number_to_chars (buf
, newval
, 4);
3488 if (fixP
->fx_done
&& fixP
->fx_r_type
!= BFD_RELOC_C6000_SBR_U15_W
)
3492 case BFD_RELOC_C6000_DSBT_INDEX
:
3494 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3495 _("addend used with $DSBT_INDEX"));
3500 case BFD_RELOC_C6000_PCR_S21
:
3501 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3503 offsetT newval
= md_chars_to_number (buf
, 4);
3505 MODIFY_VALUE (newval
, value
, 2, 7, 21);
3508 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3509 _("PC-relative offset not 4-byte-aligned"));
3510 if (value
< -0x400000 || value
> 0x3ffffc)
3511 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3512 _("PC-relative offset out of range"));
3514 md_number_to_chars (buf
, newval
, 4);
3518 case BFD_RELOC_C6000_PCR_S12
:
3519 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3521 offsetT newval
= md_chars_to_number (buf
, 4);
3523 MODIFY_VALUE (newval
, value
, 2, 16, 12);
3526 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3527 _("PC-relative offset not 4-byte-aligned"));
3528 if (value
< -0x2000 || value
> 0x1ffc)
3529 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3530 _("PC-relative offset out of range"));
3532 md_number_to_chars (buf
, newval
, 4);
3536 case BFD_RELOC_C6000_PCR_S10
:
3537 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3539 offsetT newval
= md_chars_to_number (buf
, 4);
3541 MODIFY_VALUE (newval
, value
, 2, 13, 10);
3544 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3545 _("PC-relative offset not 4-byte-aligned"));
3546 if (value
< -0x800 || value
> 0x7fc)
3547 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3548 _("PC-relative offset out of range"));
3550 md_number_to_chars (buf
, newval
, 4);
3554 case BFD_RELOC_C6000_PCR_S7
:
3555 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3557 offsetT newval
= md_chars_to_number (buf
, 4);
3559 MODIFY_VALUE (newval
, value
, 2, 16, 7);
3562 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3563 _("PC-relative offset not 4-byte-aligned"));
3564 if (value
< -0x100 || value
> 0xfc)
3565 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3566 _("PC-relative offset out of range"));
3568 md_number_to_chars (buf
, newval
, 4);
3577 /* Convert a floating-point number to target (IEEE) format. */
3580 md_atof (int type
, char *litP
, int *sizeP
)
3582 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
3585 /* Adjust the frags in SECTION (see tic6x_end). */
3588 tic6x_adjust_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT section
,
3589 void *dummy ATTRIBUTE_UNUSED
)
3591 segment_info_type
*info
;
3594 bfd_boolean have_code
= FALSE
;
3595 bfd_boolean have_non_code
= FALSE
;
3597 info
= seg_info (section
);
3601 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
3602 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
3603 switch (fragp
->fr_type
)
3605 case rs_machine_dependent
:
3606 if (fragp
->tc_frag_data
.is_insns
)
3612 if (fragp
->fr_fix
> 0)
3613 have_non_code
= TRUE
;
3617 have_non_code
= TRUE
;
3621 /* Process alignment requirements in a code-only section. */
3622 if (have_code
&& !have_non_code
)
3624 /* If we need to insert an odd number of instructions to meet an
3625 alignment requirement, there must have been an odd number of
3626 instructions since the last 8-byte-aligned execute packet
3627 boundary. So there must have been an execute packet with an
3628 odd number (and so a number fewer than 8) of instructions
3629 into which we can insert a NOP without breaking any previous
3632 If then we need to insert a number 2 mod 4 of instructions,
3633 the number of instructions since the last 16-byte-aligned
3634 execute packet boundary must be 2 mod 4. So between that
3635 boundary and the following 8-byte-aligned boundary there must
3636 either be at least one execute packet with 2-mod-4
3637 instructions, or at least two with an odd number of
3638 instructions; again, greedily inserting NOPs as soon as
3639 possible suffices to meet the alignment requirement.
3641 If then we need to insert 4 instructions, we look between the
3642 last 32-byte-aligned boundary and the following
3643 16-byte-aligned boundary. The sizes of the execute packets
3644 in this range total 4 instructions mod 8, so again there is
3645 room for greedy insertion of NOPs to meet the alignment
3646 requirement, and before any intermediate point with 8-byte
3647 (2-instruction) alignment requirement the sizes of execute
3648 packets (and so the room for NOPs) will total 2 instructions
3649 mod 4 so greedy insertion will not break such alignments.
3651 So we can always meet these alignment requirements by
3652 inserting NOPs in parallel with existing execute packets, and
3653 by induction the approach described above inserts the minimum
3654 number of such NOPs. */
3656 /* The number of NOPs we are currently looking to insert, if we
3657 have gone back to insert NOPs. */
3658 unsigned int want_insert
= 0;
3660 /* Out of that number, the number inserted so far in the current
3661 stage of the above algorithm. */
3662 unsigned int want_insert_done_so_far
= 0;
3664 /* The position mod 32 at the start of the current frag. */
3665 unsigned int pos
= 0;
3667 /* The locations in the frag chain of the most recent frags at
3668 the start of which there is the given alignment. */
3669 frchainS
*frchp_last32
, *frchp_last16
, *frchp_last8
;
3670 fragS
*fragp_last32
, *fragp_last16
, *fragp_last8
;
3671 unsigned int pos_last32
, pos_last16
, pos_last8
;
3673 frchp_last32
= frchp_last16
= frchp_last8
= info
->frchainP
;
3674 fragp_last32
= fragp_last16
= fragp_last8
= info
->frchainP
->frch_root
;
3675 pos_last32
= pos_last16
= pos_last8
= 0;
3677 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
3678 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
3681 bfd_boolean go_back
= FALSE
;
3682 frchainS
*frchp_next
;
3685 if (fragp
->fr_type
!= rs_machine_dependent
)
3688 if (fragp
->tc_frag_data
.is_insns
3689 && pos
+ fragp
->fr_fix
> 32
3690 && !fragp
->tc_frag_data
.can_cross_fp_boundary
)
3692 /* As described above, we should always have met an
3693 alignment requirement by the time we come back to
3700 want_insert
= (32 - pos
) >> 2;
3701 if (want_insert
> 7)
3703 want_insert_done_so_far
= 0;
3707 if (!fragp
->tc_frag_data
.is_insns
)
3709 unsigned int would_insert_bytes
;
3711 if (!(pos
& ((1 << fragp
->fr_offset
) - 1)))
3712 /* This alignment requirement is already met. */
3715 /* As described above, we should always have met an
3716 alignment requirement by the time we come back to
3721 /* We may not be able to meet this requirement within
3722 the given number of characters. */
3724 = ((1 << fragp
->fr_offset
)
3725 - (pos
& ((1 << fragp
->fr_offset
) - 1)));
3727 if (fragp
->fr_subtype
!= 0
3728 && would_insert_bytes
> fragp
->fr_subtype
)
3731 /* An unmet alignment must be 8, 16 or 32 bytes;
3732 smaller ones must always be met within code-only
3733 sections and larger ones cause the section not to
3735 if (fragp
->fr_offset
!= 3
3736 && fragp
->fr_offset
!= 4
3737 && fragp
->fr_offset
!= 5)
3740 if (would_insert_bytes
& 3)
3742 want_insert
= would_insert_bytes
>> 2;
3743 if (want_insert
> 7)
3745 want_insert_done_so_far
= 0;
3748 else if (want_insert
&& !go_back
)
3750 unsigned int num_insns
= fragp
->fr_fix
>> 2;
3751 unsigned int max_poss_nops
= 8 - num_insns
;
3755 unsigned int cur_want_nops
, max_want_nops
, do_nops
, i
;
3757 if (want_insert
& 1)
3759 else if (want_insert
& 2)
3761 else if (want_insert
& 4)
3766 max_want_nops
= cur_want_nops
- want_insert_done_so_far
;
3768 do_nops
= (max_poss_nops
< max_want_nops
3771 for (i
= 0; i
< do_nops
; i
++)
3773 md_number_to_chars (fragp
->fr_literal
+ fragp
->fr_fix
,
3775 if (target_big_endian
)
3776 fragp
->fr_literal
[fragp
->fr_fix
- 1] |= 0x1;
3778 fragp
->fr_literal
[fragp
->fr_fix
- 4] |= 0x1;
3782 want_insert_done_so_far
+= do_nops
;
3783 if (want_insert_done_so_far
== cur_want_nops
)
3785 want_insert
-= want_insert_done_so_far
;
3786 want_insert_done_so_far
= 0;
3794 if (want_insert
& 1)
3796 frchp
= frchp_last8
;
3797 fragp
= fragp_last8
;
3800 else if (want_insert
& 2)
3802 frchp
= frchp_last8
= frchp_last16
;
3803 fragp
= fragp_last8
= fragp_last16
;
3804 pos
= pos_last8
= pos_last16
;
3806 else if (want_insert
& 4)
3808 frchp
= frchp_last8
= frchp_last16
= frchp_last32
;
3809 fragp
= fragp_last8
= fragp_last16
= fragp_last32
;
3810 pos
= pos_last8
= pos_last16
= pos_last32
;
3818 /* Update current position for moving past a code
3820 pos
+= fragp
->fr_fix
;
3823 fragp_next
= fragp
->fr_next
;
3824 if (fragp_next
== NULL
)
3826 frchp_next
= frchp
->frch_next
;
3827 if (frchp_next
!= NULL
)
3828 fragp_next
= frchp_next
->frch_root
;
3832 frchp_last8
= frchp_next
;
3833 fragp_last8
= fragp_next
;
3838 frchp_last16
= frchp_next
;
3839 fragp_last16
= fragp_next
;
3844 frchp_last32
= frchp_next
;
3845 fragp_last32
= fragp_next
;
3851 /* Now convert the machine-dependent frags to machine-independent
3853 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
3854 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
3856 if (fragp
->fr_type
== rs_machine_dependent
)
3858 if (fragp
->tc_frag_data
.is_insns
)
3862 fragp
->fr_type
= rs_align_code
;
3864 *fragp
->fr_literal
= 0;
3870 /* Initialize the machine-dependent parts of a frag. */
3873 tic6x_frag_init (fragS
*fragp
)
3875 fragp
->tc_frag_data
.is_insns
= FALSE
;
3876 fragp
->tc_frag_data
.can_cross_fp_boundary
= FALSE
;
3879 /* Set an attribute if it has not already been set by the user. */
3882 tic6x_set_attribute_int (int tag
, int value
)
3885 || tag
>= NUM_KNOWN_OBJ_ATTRIBUTES
)
3887 if (!tic6x_attributes_set_explicitly
[tag
])
3888 bfd_elf_add_proc_attr_int (stdoutput
, tag
, value
);
3891 /* Set object attributes deduced from the input file and command line
3892 rather than given explicitly. */
3894 tic6x_set_attributes (void)
3896 if (tic6x_arch_attribute
== C6XABI_Tag_ISA_none
)
3897 tic6x_arch_attribute
= C6XABI_Tag_ISA_C674X
;
3899 tic6x_set_attribute_int (Tag_ISA
, tic6x_arch_attribute
);
3902 /* Do machine-dependent manipulations of the frag chains after all
3903 input has been read and before the machine-independent sizing and
3909 /* Set object attributes at this point if not explicitly set. */
3910 tic6x_set_attributes ();
3912 /* Meeting alignment requirements may require inserting NOPs in
3913 parallel in execute packets earlier in the segment. Future
3914 16-bit instruction generation involves whole-segment optimization
3915 to determine the best choice and ordering of 32-bit or 16-bit
3916 instructions. This doesn't fit will in the general relaxation
3917 framework, so handle alignment and 16-bit instruction generation
3919 bfd_map_over_sections (stdoutput
, tic6x_adjust_section
, NULL
);
3922 /* No machine-dependent frags at this stage; all converted in
3926 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT asec ATTRIBUTE_UNUSED
,
3927 fragS
*fragp ATTRIBUTE_UNUSED
)
3932 /* No machine-dependent frags at this stage; all converted in
3936 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
3937 segT seg ATTRIBUTE_UNUSED
)
3942 /* Put a number into target byte order. */
3945 md_number_to_chars (char *buf
, valueT val
, int n
)
3947 if (target_big_endian
)
3948 number_to_chars_bigendian (buf
, val
, n
);
3950 number_to_chars_littleendian (buf
, val
, n
);
3953 /* Machine-dependent operand parsing not currently needed. */
3956 md_operand (expressionS
*op ATTRIBUTE_UNUSED
)
3960 /* PC-relative operands are relative to the start of the fetch
3964 tic6x_pcrel_from_section (fixS
*fixp
, segT sec
)
3966 if (fixp
->fx_addsy
!= NULL
3967 && (!S_IS_DEFINED (fixp
->fx_addsy
)
3968 || S_GET_SEGMENT (fixp
->fx_addsy
) != sec
))
3970 return (fixp
->fx_where
+ fixp
->fx_frag
->fr_address
) & ~(long) 0x1f;
3973 /* Round up a section size to the appropriate boundary. */
3976 md_section_align (segT segment ATTRIBUTE_UNUSED
,
3979 /* Round up section sizes to ensure that text sections consist of
3980 whole fetch packets. */
3981 int align
= bfd_get_section_alignment (stdoutput
, segment
);
3982 return ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
3985 /* No special undefined symbol handling needed for now. */
3988 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
3993 /* Translate internal representation of relocation info to BFD target
3997 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4000 bfd_reloc_code_real_type r_type
;
4002 reloc
= xmalloc (sizeof (arelent
));
4003 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
4004 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4005 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4006 reloc
->addend
= (tic6x_generate_rela
? fixp
->fx_offset
: 0);
4007 r_type
= fixp
->fx_r_type
;
4008 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4010 if (reloc
->howto
== NULL
)
4012 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4013 _("Cannot represent relocation type %s"),
4014 bfd_get_reloc_code_name (r_type
));
4018 /* Correct for adjustments bfd_install_relocation will make. */
4019 if (reloc
->howto
->pcrel_offset
&& reloc
->howto
->partial_inplace
)
4020 reloc
->addend
+= reloc
->address
;