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* config/tc-v850.c (md_assemble): When no reloc, create pcrel fixups
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1 /* tc-v850.c -- Assembler code for the NEC V850
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #include <stdio.h>
23 #include "as.h"
24 #include "safe-ctype.h"
25 #include "subsegs.h"
26 #include "opcode/v850.h"
27 #include "dwarf2dbg.h"
28
29 /* Sign-extend a 16-bit number. */
30 #define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000)
31
32 /* Temporarily holds the reloc in a cons expression. */
33 static bfd_reloc_code_real_type hold_cons_reloc = BFD_RELOC_UNUSED;
34
35 /* Set to TRUE if we want to be pedantic about signed overflows. */
36 static bfd_boolean warn_signed_overflows = FALSE;
37 static bfd_boolean warn_unsigned_overflows = FALSE;
38
39 /* Indicates the target BFD machine number. */
40 static int machine = -1;
41
42 /* Indicates the target processor(s) for the assemble. */
43 static int processor_mask = -1;
44 \f
45 /* Structure to hold information about predefined registers. */
46 struct reg_name {
47 const char *name;
48 int value;
49 };
50
51 /* Generic assembler global variables which must be defined by all
52 targets. */
53
54 /* Characters which always start a comment. */
55 const char comment_chars[] = "#";
56
57 /* Characters which start a comment at the beginning of a line. */
58 const char line_comment_chars[] = ";#";
59
60 /* Characters which may be used to separate multiple commands on a
61 single line. */
62 const char line_separator_chars[] = ";";
63
64 /* Characters which are used to indicate an exponent in a floating
65 point number. */
66 const char EXP_CHARS[] = "eE";
67
68 /* Characters which mean that a number is a floating point constant,
69 as in 0d1.0. */
70 const char FLT_CHARS[] = "dD";
71 \f
72 const relax_typeS md_relax_table[] = {
73 /* Conditional branches. */
74 {0xff, -0x100, 2, 1},
75 {0x1fffff, -0x200000, 6, 0},
76 /* Unconditional branches. */
77 {0xff, -0x100, 2, 3},
78 {0x1fffff, -0x200000, 4, 0},
79 };
80
81 static int v850_relax = 0;
82
83 /* Fixups. */
84 #define MAX_INSN_FIXUPS (5)
85 struct v850_fixup {
86 expressionS exp;
87 int opindex;
88 bfd_reloc_code_real_type reloc;
89 };
90
91 struct v850_fixup fixups[MAX_INSN_FIXUPS];
92 static int fc;
93
94 struct v850_seg_entry
95 {
96 segT s;
97 const char *name;
98 flagword flags;
99 };
100
101 struct v850_seg_entry v850_seg_table[] =
102 {
103 { NULL, ".sdata",
104 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
105 | SEC_SMALL_DATA },
106 { NULL, ".tdata",
107 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
108 { NULL, ".zdata",
109 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
110 { NULL, ".sbss",
111 SEC_ALLOC | SEC_SMALL_DATA },
112 { NULL, ".tbss",
113 SEC_ALLOC },
114 { NULL, ".zbss",
115 SEC_ALLOC},
116 { NULL, ".rosdata",
117 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
118 | SEC_HAS_CONTENTS | SEC_SMALL_DATA },
119 { NULL, ".rozdata",
120 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
121 | SEC_HAS_CONTENTS },
122 { NULL, ".scommon",
123 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
124 | SEC_SMALL_DATA | SEC_IS_COMMON },
125 { NULL, ".tcommon",
126 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
127 | SEC_IS_COMMON },
128 { NULL, ".zcommon",
129 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
130 | SEC_IS_COMMON },
131 { NULL, ".call_table_data",
132 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
133 { NULL, ".call_table_text",
134 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_CODE
135 | SEC_HAS_CONTENTS},
136 { NULL, ".bss",
137 SEC_ALLOC }
138 };
139
140 #define SDATA_SECTION 0
141 #define TDATA_SECTION 1
142 #define ZDATA_SECTION 2
143 #define SBSS_SECTION 3
144 #define TBSS_SECTION 4
145 #define ZBSS_SECTION 5
146 #define ROSDATA_SECTION 6
147 #define ROZDATA_SECTION 7
148 #define SCOMMON_SECTION 8
149 #define TCOMMON_SECTION 9
150 #define ZCOMMON_SECTION 10
151 #define CALL_TABLE_DATA_SECTION 11
152 #define CALL_TABLE_TEXT_SECTION 12
153 #define BSS_SECTION 13
154
155 static void do_v850_seg PARAMS ((int, subsegT));
156
157 static void
158 do_v850_seg (i, sub)
159 int i;
160 subsegT sub;
161 {
162 struct v850_seg_entry *seg = v850_seg_table + i;
163
164 obj_elf_section_change_hook ();
165 if (seg->s != NULL)
166 {
167 subseg_set (seg->s, sub);
168 }
169 else
170 {
171 seg->s = subseg_new (seg->name, sub);
172 bfd_set_section_flags (stdoutput, seg->s, seg->flags);
173 if ((seg->flags & SEC_LOAD) == 0)
174 seg_info (seg->s)->bss = 1;
175 }
176 }
177
178 static void v850_seg PARAMS ((int i));
179
180 static void
181 v850_seg (i)
182 int i;
183 {
184 subsegT sub = get_absolute_expression ();
185
186 do_v850_seg (i, sub);
187 demand_empty_rest_of_line ();
188 }
189
190 static void v850_offset PARAMS ((int));
191
192 static void
193 v850_offset (ignore)
194 int ignore ATTRIBUTE_UNUSED;
195 {
196 char *pfrag;
197 int temp = get_absolute_expression ();
198
199 pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, (symbolS *)0,
200 (offsetT) temp, (char *) 0);
201 *pfrag = 0;
202
203 demand_empty_rest_of_line ();
204 }
205
206 /* Copied from obj_elf_common() in gas/config/obj-elf.c. */
207
208 static void v850_comm PARAMS ((int));
209
210 static void
211 v850_comm (area)
212 int area;
213 {
214 char *name;
215 char c;
216 char *p;
217 int temp;
218 unsigned int size;
219 symbolS *symbolP;
220 int have_align;
221
222 name = input_line_pointer;
223 c = get_symbol_end ();
224
225 /* Just after name is now '\0'. */
226 p = input_line_pointer;
227 *p = c;
228
229 SKIP_WHITESPACE ();
230
231 if (*input_line_pointer != ',')
232 {
233 as_bad (_("Expected comma after symbol-name"));
234 ignore_rest_of_line ();
235 return;
236 }
237
238 /* Skip ','. */
239 input_line_pointer++;
240
241 if ((temp = get_absolute_expression ()) < 0)
242 {
243 /* xgettext:c-format */
244 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
245 ignore_rest_of_line ();
246 return;
247 }
248
249 size = temp;
250 *p = 0;
251 symbolP = symbol_find_or_make (name);
252 *p = c;
253
254 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
255 {
256 as_bad (_("Ignoring attempt to re-define symbol"));
257 ignore_rest_of_line ();
258 return;
259 }
260
261 if (S_GET_VALUE (symbolP) != 0)
262 {
263 if (S_GET_VALUE (symbolP) != size)
264 {
265 /* xgettext:c-format */
266 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
267 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
268 }
269 }
270
271 know (symbol_get_frag (symbolP) == &zero_address_frag);
272
273 if (*input_line_pointer != ',')
274 have_align = 0;
275 else
276 {
277 have_align = 1;
278 input_line_pointer++;
279 SKIP_WHITESPACE ();
280 }
281
282 if (! have_align || *input_line_pointer != '"')
283 {
284 if (! have_align)
285 temp = 0;
286 else
287 {
288 temp = get_absolute_expression ();
289
290 if (temp < 0)
291 {
292 temp = 0;
293 as_warn (_("Common alignment negative; 0 assumed"));
294 }
295 }
296
297 if (symbol_get_obj (symbolP)->local)
298 {
299 segT old_sec;
300 int old_subsec;
301 char *pfrag;
302 int align;
303 flagword applicable;
304
305 old_sec = now_seg;
306 old_subsec = now_subseg;
307
308 applicable = bfd_applicable_section_flags (stdoutput);
309
310 applicable &= SEC_ALLOC;
311
312 switch (area)
313 {
314 case SCOMMON_SECTION:
315 do_v850_seg (SBSS_SECTION, 0);
316 break;
317
318 case ZCOMMON_SECTION:
319 do_v850_seg (ZBSS_SECTION, 0);
320 break;
321
322 case TCOMMON_SECTION:
323 do_v850_seg (TBSS_SECTION, 0);
324 break;
325 }
326
327 if (temp)
328 {
329 /* Convert to a power of 2 alignment. */
330 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
331 ;
332
333 if (temp != 1)
334 {
335 as_bad (_("Common alignment not a power of 2"));
336 ignore_rest_of_line ();
337 return;
338 }
339 }
340 else
341 align = 0;
342
343 record_alignment (now_seg, align);
344
345 if (align)
346 frag_align (align, 0, 0);
347
348 switch (area)
349 {
350 case SCOMMON_SECTION:
351 if (S_GET_SEGMENT (symbolP) == v850_seg_table[SBSS_SECTION].s)
352 symbol_get_frag (symbolP)->fr_symbol = 0;
353 break;
354
355 case ZCOMMON_SECTION:
356 if (S_GET_SEGMENT (symbolP) == v850_seg_table[ZBSS_SECTION].s)
357 symbol_get_frag (symbolP)->fr_symbol = 0;
358 break;
359
360 case TCOMMON_SECTION:
361 if (S_GET_SEGMENT (symbolP) == v850_seg_table[TBSS_SECTION].s)
362 symbol_get_frag (symbolP)->fr_symbol = 0;
363 break;
364
365 default:
366 abort ();
367 }
368
369 symbol_set_frag (symbolP, frag_now);
370 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
371 (offsetT) size, (char *) 0);
372 *pfrag = 0;
373 S_SET_SIZE (symbolP, size);
374
375 switch (area)
376 {
377 case SCOMMON_SECTION:
378 S_SET_SEGMENT (symbolP, v850_seg_table[SBSS_SECTION].s);
379 break;
380
381 case ZCOMMON_SECTION:
382 S_SET_SEGMENT (symbolP, v850_seg_table[ZBSS_SECTION].s);
383 break;
384
385 case TCOMMON_SECTION:
386 S_SET_SEGMENT (symbolP, v850_seg_table[TBSS_SECTION].s);
387 break;
388
389 default:
390 abort ();
391 }
392
393 S_CLEAR_EXTERNAL (symbolP);
394 obj_elf_section_change_hook ();
395 subseg_set (old_sec, old_subsec);
396 }
397 else
398 {
399 segT old_sec;
400 int old_subsec;
401
402 allocate_common:
403 old_sec = now_seg;
404 old_subsec = now_subseg;
405
406 S_SET_VALUE (symbolP, (valueT) size);
407 S_SET_ALIGN (symbolP, temp);
408 S_SET_EXTERNAL (symbolP);
409
410 switch (area)
411 {
412 case SCOMMON_SECTION:
413 case ZCOMMON_SECTION:
414 case TCOMMON_SECTION:
415 do_v850_seg (area, 0);
416 S_SET_SEGMENT (symbolP, v850_seg_table[area].s);
417 break;
418
419 default:
420 abort ();
421 }
422
423 obj_elf_section_change_hook ();
424 subseg_set (old_sec, old_subsec);
425 }
426 }
427 else
428 {
429 input_line_pointer++;
430
431 /* @@ Some use the dot, some don't. Can we get some consistency?? */
432 if (*input_line_pointer == '.')
433 input_line_pointer++;
434
435 /* @@ Some say data, some say bss. */
436 if (strncmp (input_line_pointer, "bss\"", 4)
437 && strncmp (input_line_pointer, "data\"", 5))
438 {
439 while (*--input_line_pointer != '"')
440 ;
441 input_line_pointer--;
442 goto bad_common_segment;
443 }
444 while (*input_line_pointer++ != '"')
445 ;
446 goto allocate_common;
447 }
448
449 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
450
451 demand_empty_rest_of_line ();
452 return;
453
454 {
455 bad_common_segment:
456 p = input_line_pointer;
457 while (*p && *p != '\n')
458 p++;
459 c = *p;
460 *p = '\0';
461 as_bad (_("bad .common segment %s"), input_line_pointer + 1);
462 *p = c;
463 input_line_pointer = p;
464 ignore_rest_of_line ();
465 return;
466 }
467 }
468
469 static void set_machine PARAMS ((int));
470
471 static void
472 set_machine (number)
473 int number;
474 {
475 machine = number;
476 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
477
478 switch (machine)
479 {
480 case 0: processor_mask = PROCESSOR_V850; break;
481 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
482 }
483 }
484
485 static void v850_longcode PARAMS ((int));
486
487 static void
488 v850_longcode (type)
489 int type;
490 {
491 expressionS ex;
492
493 if (! v850_relax)
494 {
495 if (type == 1)
496 as_warn (".longcall pseudo-op seen when not relaxing");
497 else
498 as_warn (".longjump pseudo-op seen when not relaxing");
499 }
500
501 expression (&ex);
502
503 if (ex.X_op != O_symbol || ex.X_add_number != 0)
504 {
505 as_bad ("bad .longcall format");
506 ignore_rest_of_line ();
507
508 return;
509 }
510
511 if (type == 1)
512 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1,
513 BFD_RELOC_V850_LONGCALL);
514 else
515 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1,
516 BFD_RELOC_V850_LONGJUMP);
517
518 demand_empty_rest_of_line ();
519 }
520
521 /* The target specific pseudo-ops which we support. */
522 const pseudo_typeS md_pseudo_table[] =
523 {
524 { "sdata", v850_seg, SDATA_SECTION },
525 { "tdata", v850_seg, TDATA_SECTION },
526 { "zdata", v850_seg, ZDATA_SECTION },
527 { "sbss", v850_seg, SBSS_SECTION },
528 { "tbss", v850_seg, TBSS_SECTION },
529 { "zbss", v850_seg, ZBSS_SECTION },
530 { "rosdata", v850_seg, ROSDATA_SECTION },
531 { "rozdata", v850_seg, ROZDATA_SECTION },
532 { "bss", v850_seg, BSS_SECTION },
533 { "offset", v850_offset, 0 },
534 { "word", cons, 4 },
535 { "zcomm", v850_comm, ZCOMMON_SECTION },
536 { "scomm", v850_comm, SCOMMON_SECTION },
537 { "tcomm", v850_comm, TCOMMON_SECTION },
538 { "v850", set_machine, 0 },
539 { "call_table_data", v850_seg, CALL_TABLE_DATA_SECTION },
540 { "call_table_text", v850_seg, CALL_TABLE_TEXT_SECTION },
541 { "v850e", set_machine, bfd_mach_v850e },
542 { "longcall", v850_longcode, 1 },
543 { "longjump", v850_longcode, 2 },
544 { NULL, NULL, 0 }
545 };
546
547 /* Opcode hash table. */
548 static struct hash_control *v850_hash;
549
550 /* This table is sorted. Suitable for searching by a binary search. */
551 static const struct reg_name pre_defined_registers[] =
552 {
553 { "ep", 30 }, /* ep - element ptr */
554 { "gp", 4 }, /* gp - global ptr */
555 { "hp", 2 }, /* hp - handler stack ptr */
556 { "lp", 31 }, /* lp - link ptr */
557 { "r0", 0 },
558 { "r1", 1 },
559 { "r10", 10 },
560 { "r11", 11 },
561 { "r12", 12 },
562 { "r13", 13 },
563 { "r14", 14 },
564 { "r15", 15 },
565 { "r16", 16 },
566 { "r17", 17 },
567 { "r18", 18 },
568 { "r19", 19 },
569 { "r2", 2 },
570 { "r20", 20 },
571 { "r21", 21 },
572 { "r22", 22 },
573 { "r23", 23 },
574 { "r24", 24 },
575 { "r25", 25 },
576 { "r26", 26 },
577 { "r27", 27 },
578 { "r28", 28 },
579 { "r29", 29 },
580 { "r3", 3 },
581 { "r30", 30 },
582 { "r31", 31 },
583 { "r4", 4 },
584 { "r5", 5 },
585 { "r6", 6 },
586 { "r7", 7 },
587 { "r8", 8 },
588 { "r9", 9 },
589 { "sp", 3 }, /* sp - stack ptr */
590 { "tp", 5 }, /* tp - text ptr */
591 { "zero", 0 },
592 };
593
594 #define REG_NAME_CNT \
595 (sizeof (pre_defined_registers) / sizeof (struct reg_name))
596
597 static const struct reg_name system_registers[] =
598 {
599 { "asid", 23 },
600 { "bpc", 22 },
601 { "bpav", 24 },
602 { "bpam", 25 },
603 { "bpdv", 26 },
604 { "bpdm", 27 },
605 { "ctbp", 20 },
606 { "ctpc", 16 },
607 { "ctpsw", 17 },
608 { "dbpc", 18 },
609 { "dbpsw", 19 },
610 { "dir", 21 },
611 { "ecr", 4 },
612 { "eipc", 0 },
613 { "eipsw", 1 },
614 { "fepc", 2 },
615 { "fepsw", 3 },
616 { "psw", 5 },
617 };
618
619 #define SYSREG_NAME_CNT \
620 (sizeof (system_registers) / sizeof (struct reg_name))
621
622 static const struct reg_name system_list_registers[] =
623 {
624 {"PS", 5 },
625 {"SR", 0 + 1}
626 };
627
628 #define SYSREGLIST_NAME_CNT \
629 (sizeof (system_list_registers) / sizeof (struct reg_name))
630
631 static const struct reg_name cc_names[] =
632 {
633 { "c", 0x1 },
634 { "e", 0x2 },
635 { "ge", 0xe },
636 { "gt", 0xf },
637 { "h", 0xb },
638 { "l", 0x1 },
639 { "le", 0x7 },
640 { "lt", 0x6 },
641 { "n", 0x4 },
642 { "nc", 0x9 },
643 { "ne", 0xa },
644 { "nh", 0x3 },
645 { "nl", 0x9 },
646 { "ns", 0xc },
647 { "nv", 0x8 },
648 { "nz", 0xa },
649 { "p", 0xc },
650 { "s", 0x4 },
651 { "sa", 0xd },
652 { "t", 0x5 },
653 { "v", 0x0 },
654 { "z", 0x2 },
655 };
656
657 #define CC_NAME_CNT \
658 (sizeof (cc_names) / sizeof (struct reg_name))
659
660 /* Do a binary search of the given register table to see if NAME is a
661 valid regiter name. Return the register number from the array on
662 success, or -1 on failure. */
663
664 static int reg_name_search
665 PARAMS ((const struct reg_name *, int, const char *, bfd_boolean));
666
667 static int
668 reg_name_search (regs, regcount, name, accept_numbers)
669 const struct reg_name *regs;
670 int regcount;
671 const char *name;
672 bfd_boolean accept_numbers;
673 {
674 int middle, low, high;
675 int cmp;
676 symbolS *symbolP;
677
678 /* If the register name is a symbol, then evaluate it. */
679 if ((symbolP = symbol_find (name)) != NULL)
680 {
681 /* If the symbol is an alias for another name then use that.
682 If the symbol is an alias for a number, then return the number. */
683 if (symbol_equated_p (symbolP))
684 {
685 name
686 = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
687 }
688 else if (accept_numbers)
689 {
690 int reg = S_GET_VALUE (symbolP);
691
692 if (reg >= 0 && reg <= 31)
693 return reg;
694 }
695
696 /* Otherwise drop through and try parsing name normally. */
697 }
698
699 low = 0;
700 high = regcount - 1;
701
702 do
703 {
704 middle = (low + high) / 2;
705 cmp = strcasecmp (name, regs[middle].name);
706 if (cmp < 0)
707 high = middle - 1;
708 else if (cmp > 0)
709 low = middle + 1;
710 else
711 return regs[middle].value;
712 }
713 while (low <= high);
714 return -1;
715 }
716
717 /* Summary of register_name().
718
719 in: Input_line_pointer points to 1st char of operand.
720
721 out: An expressionS.
722 The operand may have been a register: in this case, X_op == O_register,
723 X_add_number is set to the register number, and truth is returned.
724 Input_line_pointer->(next non-blank) char after operand, or is in
725 its original state. */
726
727 static bfd_boolean register_name PARAMS ((expressionS *));
728
729 static bfd_boolean
730 register_name (expressionP)
731 expressionS *expressionP;
732 {
733 int reg_number;
734 char *name;
735 char *start;
736 char c;
737
738 /* Find the spelling of the operand. */
739 start = name = input_line_pointer;
740
741 c = get_symbol_end ();
742
743 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
744 name, FALSE);
745
746 /* Put back the delimiting char. */
747 *input_line_pointer = c;
748
749 /* Look to see if it's in the register table. */
750 if (reg_number >= 0)
751 {
752 expressionP->X_op = O_register;
753 expressionP->X_add_number = reg_number;
754
755 /* Make the rest nice. */
756 expressionP->X_add_symbol = NULL;
757 expressionP->X_op_symbol = NULL;
758
759 return TRUE;
760 }
761 else
762 {
763 /* Reset the line as if we had not done anything. */
764 input_line_pointer = start;
765
766 return FALSE;
767 }
768 }
769
770 /* Summary of system_register_name().
771
772 in: INPUT_LINE_POINTER points to 1st char of operand.
773 EXPRESSIONP points to an expression structure to be filled in.
774 ACCEPT_NUMBERS is true iff numerical register names may be used.
775 ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
776 accepted.
777
778 out: An expressionS structure in expressionP.
779 The operand may have been a register: in this case, X_op == O_register,
780 X_add_number is set to the register number, and truth is returned.
781 Input_line_pointer->(next non-blank) char after operand, or is in
782 its original state. */
783
784 static bfd_boolean system_register_name
785 PARAMS ((expressionS *, bfd_boolean, bfd_boolean));
786
787 static bfd_boolean
788 system_register_name (expressionP, accept_numbers, accept_list_names)
789 expressionS *expressionP;
790 bfd_boolean accept_numbers;
791 bfd_boolean accept_list_names;
792 {
793 int reg_number;
794 char *name;
795 char *start;
796 char c;
797
798 /* Find the spelling of the operand. */
799 start = name = input_line_pointer;
800
801 c = get_symbol_end ();
802 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
803 accept_numbers);
804
805 /* Put back the delimiting char. */
806 *input_line_pointer = c;
807
808 if (reg_number < 0
809 && accept_numbers)
810 {
811 /* Reset input_line pointer. */
812 input_line_pointer = start;
813
814 if (ISDIGIT (*input_line_pointer))
815 {
816 reg_number = strtol (input_line_pointer, &input_line_pointer, 10);
817
818 /* Make sure that the register number is allowable. */
819 if (reg_number < 0
820 || (reg_number > 5 && reg_number < 16)
821 || reg_number > 27)
822 {
823 reg_number = -1;
824 }
825 }
826 else if (accept_list_names)
827 {
828 c = get_symbol_end ();
829 reg_number = reg_name_search (system_list_registers,
830 SYSREGLIST_NAME_CNT, name, FALSE);
831
832 /* Put back the delimiting char. */
833 *input_line_pointer = c;
834 }
835 }
836
837 /* Look to see if it's in the register table. */
838 if (reg_number >= 0)
839 {
840 expressionP->X_op = O_register;
841 expressionP->X_add_number = reg_number;
842
843 /* Make the rest nice. */
844 expressionP->X_add_symbol = NULL;
845 expressionP->X_op_symbol = NULL;
846
847 return TRUE;
848 }
849 else
850 {
851 /* Reset the line as if we had not done anything. */
852 input_line_pointer = start;
853
854 return FALSE;
855 }
856 }
857
858 /* Summary of cc_name().
859
860 in: INPUT_LINE_POINTER points to 1st char of operand.
861
862 out: An expressionS.
863 The operand may have been a register: in this case, X_op == O_register,
864 X_add_number is set to the register number, and truth is returned.
865 Input_line_pointer->(next non-blank) char after operand, or is in
866 its original state. */
867
868 static bfd_boolean cc_name PARAMS ((expressionS *));
869
870 static bfd_boolean
871 cc_name (expressionP)
872 expressionS *expressionP;
873 {
874 int reg_number;
875 char *name;
876 char *start;
877 char c;
878
879 /* Find the spelling of the operand. */
880 start = name = input_line_pointer;
881
882 c = get_symbol_end ();
883 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
884
885 /* Put back the delimiting char. */
886 *input_line_pointer = c;
887
888 /* Look to see if it's in the register table. */
889 if (reg_number >= 0)
890 {
891 expressionP->X_op = O_constant;
892 expressionP->X_add_number = reg_number;
893
894 /* Make the rest nice. */
895 expressionP->X_add_symbol = NULL;
896 expressionP->X_op_symbol = NULL;
897
898 return TRUE;
899 }
900 else
901 {
902 /* Reset the line as if we had not done anything. */
903 input_line_pointer = start;
904
905 return FALSE;
906 }
907 }
908
909 static void skip_white_space PARAMS ((void));
910
911 static void
912 skip_white_space ()
913 {
914 while (*input_line_pointer == ' '
915 || *input_line_pointer == '\t')
916 ++input_line_pointer;
917 }
918
919 /* Summary of parse_register_list ().
920
921 in: INPUT_LINE_POINTER points to 1st char of a list of registers.
922 INSN is the partially constructed instruction.
923 OPERAND is the operand being inserted.
924
925 out: NULL if the parse completed successfully, otherwise a
926 pointer to an error message is returned. If the parse
927 completes the correct bit fields in the instruction
928 will be filled in.
929
930 Parses register lists with the syntax:
931
932 { rX }
933 { rX, rY }
934 { rX - rY }
935 { rX - rY, rZ }
936 etc
937
938 and also parses constant epxressions whoes bits indicate the
939 registers in the lists. The LSB in the expression refers to
940 the lowest numbered permissable register in the register list,
941 and so on upwards. System registers are considered to be very
942 high numbers. */
943
944 static char *parse_register_list
945 PARAMS ((unsigned long *, const struct v850_operand *));
946
947 static char *
948 parse_register_list (insn, operand)
949 unsigned long *insn;
950 const struct v850_operand *operand;
951 {
952 static int type1_regs[32] = {
953 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
954 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
955 };
956 static int type2_regs[32] = {
957 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
958 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
959 };
960 static int type3_regs[32] = {
961 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
962 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8
963 };
964 int *regs;
965 expressionS exp;
966
967 /* Select a register array to parse. */
968 switch (operand->shift)
969 {
970 case 0xffe00001: regs = type1_regs; break;
971 case 0xfff8000f: regs = type2_regs; break;
972 case 0xfff8001f: regs = type3_regs; break;
973 default:
974 as_bad (_("unknown operand shift: %x\n"), operand->shift);
975 return _("internal failure in parse_register_list");
976 }
977
978 skip_white_space ();
979
980 /* If the expression starts with a curly brace it is a register list.
981 Otherwise it is a constant expression, whoes bits indicate which
982 registers are to be included in the list. */
983 if (*input_line_pointer != '{')
984 {
985 int reg;
986 int i;
987
988 expression (&exp);
989
990 if (exp.X_op != O_constant)
991 return _("constant expression or register list expected");
992
993 if (regs == type1_regs)
994 {
995 if (exp.X_add_number & 0xFFFFF000)
996 return _("high bits set in register list expression");
997
998 for (reg = 20; reg < 32; reg++)
999 if (exp.X_add_number & (1 << (reg - 20)))
1000 {
1001 for (i = 0; i < 32; i++)
1002 if (regs[i] == reg)
1003 *insn |= (1 << i);
1004 }
1005 }
1006 else if (regs == type2_regs)
1007 {
1008 if (exp.X_add_number & 0xFFFE0000)
1009 return _("high bits set in register list expression");
1010
1011 for (reg = 1; reg < 16; reg++)
1012 if (exp.X_add_number & (1 << (reg - 1)))
1013 {
1014 for (i = 0; i < 32; i++)
1015 if (regs[i] == reg)
1016 *insn |= (1 << i);
1017 }
1018
1019 if (exp.X_add_number & (1 << 15))
1020 *insn |= (1 << 3);
1021
1022 if (exp.X_add_number & (1 << 16))
1023 *insn |= (1 << 19);
1024 }
1025 else /* regs == type3_regs */
1026 {
1027 if (exp.X_add_number & 0xFFFE0000)
1028 return _("high bits set in register list expression");
1029
1030 for (reg = 16; reg < 32; reg++)
1031 if (exp.X_add_number & (1 << (reg - 16)))
1032 {
1033 for (i = 0; i < 32; i++)
1034 if (regs[i] == reg)
1035 *insn |= (1 << i);
1036 }
1037
1038 if (exp.X_add_number & (1 << 16))
1039 *insn |= (1 << 19);
1040 }
1041
1042 return NULL;
1043 }
1044
1045 input_line_pointer++;
1046
1047 /* Parse the register list until a terminator (closing curly brace or
1048 new-line) is found. */
1049 for (;;)
1050 {
1051 if (register_name (&exp))
1052 {
1053 int i;
1054
1055 /* Locate the given register in the list, and if it is there,
1056 insert the corresponding bit into the instruction. */
1057 for (i = 0; i < 32; i++)
1058 {
1059 if (regs[i] == exp.X_add_number)
1060 {
1061 *insn |= (1 << i);
1062 break;
1063 }
1064 }
1065
1066 if (i == 32)
1067 return _("illegal register included in list");
1068 }
1069 else if (system_register_name (&exp, TRUE, TRUE))
1070 {
1071 if (regs == type1_regs)
1072 {
1073 return _("system registers cannot be included in list");
1074 }
1075 else if (exp.X_add_number == 5)
1076 {
1077 if (regs == type2_regs)
1078 return _("PSW cannot be included in list");
1079 else
1080 *insn |= 0x8;
1081 }
1082 else if (exp.X_add_number < 4)
1083 *insn |= 0x80000;
1084 else
1085 return _("High value system registers cannot be included in list");
1086 }
1087 else if (*input_line_pointer == '}')
1088 {
1089 input_line_pointer++;
1090 break;
1091 }
1092 else if (*input_line_pointer == ',')
1093 {
1094 input_line_pointer++;
1095 continue;
1096 }
1097 else if (*input_line_pointer == '-')
1098 {
1099 /* We have encountered a range of registers: rX - rY. */
1100 int j;
1101 expressionS exp2;
1102
1103 /* Skip the dash. */
1104 ++input_line_pointer;
1105
1106 /* Get the second register in the range. */
1107 if (! register_name (&exp2))
1108 {
1109 return _("second register should follow dash in register list");
1110 exp2.X_add_number = exp.X_add_number;
1111 }
1112
1113 /* Add the rest of the registers in the range. */
1114 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1115 {
1116 int i;
1117
1118 /* Locate the given register in the list, and if it is there,
1119 insert the corresponding bit into the instruction. */
1120 for (i = 0; i < 32; i++)
1121 {
1122 if (regs[i] == j)
1123 {
1124 *insn |= (1 << i);
1125 break;
1126 }
1127 }
1128
1129 if (i == 32)
1130 return _("illegal register included in list");
1131 }
1132 }
1133 else
1134 break;
1135
1136 skip_white_space ();
1137 }
1138
1139 return NULL;
1140 }
1141
1142 const char *md_shortopts = "m:";
1143
1144 struct option md_longopts[] = {
1145 {NULL, no_argument, NULL, 0}
1146 };
1147
1148 size_t md_longopts_size = sizeof (md_longopts);
1149
1150 void
1151 md_show_usage (stream)
1152 FILE *stream;
1153 {
1154 fprintf (stream, _(" V850 options:\n"));
1155 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
1156 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n"));
1157 fprintf (stream, _(" -mv850 The code is targeted at the v850\n"));
1158 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
1159 fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
1160 fprintf (stream, _(" -mrelax Enable relaxation\n"));
1161 }
1162
1163 int
1164 md_parse_option (c, arg)
1165 int c;
1166 char *arg;
1167 {
1168 if (c != 'm')
1169 {
1170 if (c != 'a')
1171 /* xgettext:c-format */
1172 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1173 return 0;
1174 }
1175
1176 if (strcmp (arg, "warn-signed-overflow") == 0)
1177 {
1178 warn_signed_overflows = TRUE;
1179 }
1180 else if (strcmp (arg, "warn-unsigned-overflow") == 0)
1181 {
1182 warn_unsigned_overflows = TRUE;
1183 }
1184 else if (strcmp (arg, "v850") == 0)
1185 {
1186 machine = 0;
1187 processor_mask = PROCESSOR_V850;
1188 }
1189 else if (strcmp (arg, "v850e") == 0)
1190 {
1191 machine = bfd_mach_v850e;
1192 processor_mask = PROCESSOR_V850E;
1193 }
1194 else if (strcmp (arg, "v850any") == 0)
1195 {
1196 /* Tell the world that this is for any v850 chip. */
1197 machine = 0;
1198
1199 /* But support instructions for the extended versions. */
1200 processor_mask = PROCESSOR_V850E;
1201 }
1202 else if (strcmp (arg, "relax") == 0)
1203 v850_relax = 1;
1204 else
1205 {
1206 /* xgettext:c-format */
1207 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1208 return 0;
1209 }
1210
1211 return 1;
1212 }
1213
1214 symbolS *
1215 md_undefined_symbol (name)
1216 char *name ATTRIBUTE_UNUSED;
1217 {
1218 return 0;
1219 }
1220
1221 char *
1222 md_atof (type, litp, sizep)
1223 int type;
1224 char *litp;
1225 int *sizep;
1226 {
1227 int prec;
1228 LITTLENUM_TYPE words[4];
1229 char *t;
1230 int i;
1231
1232 switch (type)
1233 {
1234 case 'f':
1235 prec = 2;
1236 break;
1237
1238 case 'd':
1239 prec = 4;
1240 break;
1241
1242 default:
1243 *sizep = 0;
1244 return _("bad call to md_atof");
1245 }
1246
1247 t = atof_ieee (input_line_pointer, type, words);
1248 if (t)
1249 input_line_pointer = t;
1250
1251 *sizep = prec * 2;
1252
1253 for (i = prec - 1; i >= 0; i--)
1254 {
1255 md_number_to_chars (litp, (valueT) words[i], 2);
1256 litp += 2;
1257 }
1258
1259 return NULL;
1260 }
1261
1262 /* Very gross. */
1263
1264 void
1265 md_convert_frag (abfd, sec, fragP)
1266 bfd *abfd ATTRIBUTE_UNUSED;
1267 asection *sec;
1268 fragS *fragP;
1269 {
1270 subseg_change (sec, 0);
1271
1272 /* In range conditional or unconditional branch. */
1273 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1274 {
1275 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1276 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
1277 fragP->fr_fix += 2;
1278 }
1279 /* Out of range conditional branch. Emit a branch around a jump. */
1280 else if (fragP->fr_subtype == 1)
1281 {
1282 unsigned char *buffer =
1283 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1284
1285 /* Reverse the condition of the first branch. */
1286 buffer[0] ^= 0x08;
1287 /* Mask off all the displacement bits. */
1288 buffer[0] &= 0x8f;
1289 buffer[1] &= 0x07;
1290 /* Now set the displacement bits so that we branch
1291 around the unconditional branch. */
1292 buffer[0] |= 0x30;
1293
1294 /* Now create the unconditional branch + fixup to the final
1295 target. */
1296 md_number_to_chars (buffer + 2, 0x00000780, 4);
1297 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1298 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1299 (int) fragP->fr_opcode + 1);
1300 fragP->fr_fix += 6;
1301 }
1302 /* Out of range unconditional branch. Emit a jump. */
1303 else if (fragP->fr_subtype == 3)
1304 {
1305 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1306 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1307 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1308 (int) fragP->fr_opcode + 1);
1309 fragP->fr_fix += 4;
1310 }
1311 else
1312 abort ();
1313 }
1314
1315 valueT
1316 md_section_align (seg, addr)
1317 asection *seg;
1318 valueT addr;
1319 {
1320 int align = bfd_get_section_alignment (stdoutput, seg);
1321 return ((addr + (1 << align) - 1) & (-1 << align));
1322 }
1323
1324 void
1325 md_begin ()
1326 {
1327 char *prev_name = "";
1328 const struct v850_opcode *op;
1329
1330 if (strncmp (TARGET_CPU, "v850e", 5) == 0)
1331 {
1332 if (machine == -1)
1333 machine = bfd_mach_v850e;
1334
1335 if (processor_mask == -1)
1336 processor_mask = PROCESSOR_V850E;
1337 }
1338 else if (strncmp (TARGET_CPU, "v850", 4) == 0)
1339 {
1340 if (machine == -1)
1341 machine = 0;
1342
1343 if (processor_mask == -1)
1344 processor_mask = PROCESSOR_V850;
1345 }
1346 else
1347 /* xgettext:c-format */
1348 as_bad (_("Unable to determine default target processor from string: %s"),
1349 TARGET_CPU);
1350
1351 v850_hash = hash_new ();
1352
1353 /* Insert unique names into hash table. The V850 instruction set
1354 has many identical opcode names that have different opcodes based
1355 on the operands. This hash table then provides a quick index to
1356 the first opcode with a particular name in the opcode table. */
1357 op = v850_opcodes;
1358 while (op->name)
1359 {
1360 if (strcmp (prev_name, op->name))
1361 {
1362 prev_name = (char *) op->name;
1363 hash_insert (v850_hash, op->name, (char *) op);
1364 }
1365 op++;
1366 }
1367
1368 v850_seg_table[BSS_SECTION].s = bss_section;
1369 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
1370 }
1371
1372 static bfd_reloc_code_real_type handle_ctoff
1373 PARAMS ((const struct v850_operand *));
1374
1375 static bfd_reloc_code_real_type
1376 handle_ctoff (operand)
1377 const struct v850_operand *operand;
1378 {
1379 if (operand == NULL)
1380 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1381
1382 if (operand->bits != 6
1383 || operand->shift != 0)
1384 {
1385 as_bad (_("ctoff() relocation used on an instruction which does not support it"));
1386 return BFD_RELOC_64; /* Used to indicate an error condition. */
1387 }
1388
1389 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1390 }
1391
1392 static bfd_reloc_code_real_type handle_sdaoff
1393 PARAMS ((const struct v850_operand *));
1394
1395 static bfd_reloc_code_real_type
1396 handle_sdaoff (operand)
1397 const struct v850_operand *operand;
1398 {
1399 if (operand == NULL)
1400 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1401
1402 if (operand->bits == 15 && operand->shift == 17)
1403 return BFD_RELOC_V850_SDA_15_16_OFFSET;
1404
1405 if (operand->bits == -1)
1406 return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1407
1408 if (operand->bits != 16
1409 || operand->shift != 16)
1410 {
1411 as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
1412 return BFD_RELOC_64; /* Used to indicate an error condition. */
1413 }
1414
1415 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1416 }
1417
1418 static bfd_reloc_code_real_type handle_zdaoff
1419 PARAMS ((const struct v850_operand *));
1420
1421 static bfd_reloc_code_real_type
1422 handle_zdaoff (operand)
1423 const struct v850_operand *operand;
1424 {
1425 if (operand == NULL)
1426 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1427
1428 if (operand->bits == 15 && operand->shift == 17)
1429 return BFD_RELOC_V850_ZDA_15_16_OFFSET;
1430
1431 if (operand->bits == -1)
1432 return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1433
1434 if (operand->bits != 16
1435 || operand->shift != 16)
1436 {
1437 as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
1438 /* Used to indicate an error condition. */
1439 return BFD_RELOC_64;
1440 }
1441
1442 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1443 }
1444
1445 static bfd_reloc_code_real_type handle_tdaoff
1446 PARAMS ((const struct v850_operand *));
1447
1448 static bfd_reloc_code_real_type
1449 handle_tdaoff (operand)
1450 const struct v850_operand *operand;
1451 {
1452 if (operand == NULL)
1453 /* Data item, not an instruction. */
1454 return BFD_RELOC_V850_TDA_7_7_OFFSET;
1455
1456 if (operand->bits == 6 && operand->shift == 1)
1457 /* sld.w/sst.w, operand: D8_6 */
1458 return BFD_RELOC_V850_TDA_6_8_OFFSET;
1459
1460 if (operand->bits == 4 && operand->insert != NULL)
1461 /* sld.hu, operand: D5-4 */
1462 return BFD_RELOC_V850_TDA_4_5_OFFSET;
1463
1464 if (operand->bits == 4 && operand->insert == NULL)
1465 /* sld.bu, operand: D4 */
1466 return BFD_RELOC_V850_TDA_4_4_OFFSET;
1467
1468 if (operand->bits == 16 && operand->shift == 16)
1469 /* set1 & chums, operands: D16 */
1470 return BFD_RELOC_V850_TDA_16_16_OFFSET;
1471
1472 if (operand->bits != 7)
1473 {
1474 as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
1475 /* Used to indicate an error condition. */
1476 return BFD_RELOC_64;
1477 }
1478
1479 return operand->insert != NULL
1480 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
1481 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
1482 }
1483
1484 /* Warning: The code in this function relies upon the definitions
1485 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1486 matching the hard coded values contained herein. */
1487
1488 static bfd_reloc_code_real_type v850_reloc_prefix
1489 PARAMS ((const struct v850_operand *));
1490
1491 static bfd_reloc_code_real_type
1492 v850_reloc_prefix (operand)
1493 const struct v850_operand *operand;
1494 {
1495 bfd_boolean paren_skipped = FALSE;
1496
1497 /* Skip leading opening parenthesis. */
1498 if (*input_line_pointer == '(')
1499 {
1500 ++input_line_pointer;
1501 paren_skipped = TRUE;
1502 }
1503
1504 #define CHECK_(name, reloc) \
1505 if (strncmp (input_line_pointer, name "(", strlen (name) + 1) == 0) \
1506 { \
1507 input_line_pointer += strlen (name); \
1508 return reloc; \
1509 }
1510
1511 CHECK_ ("hi0", BFD_RELOC_HI16 );
1512 CHECK_ ("hi", BFD_RELOC_HI16_S );
1513 CHECK_ ("lo", BFD_RELOC_LO16 );
1514 CHECK_ ("sdaoff", handle_sdaoff (operand));
1515 CHECK_ ("zdaoff", handle_zdaoff (operand));
1516 CHECK_ ("tdaoff", handle_tdaoff (operand));
1517 CHECK_ ("hilo", BFD_RELOC_32 );
1518 CHECK_ ("ctoff", handle_ctoff (operand) );
1519
1520 /* Restore skipped parenthesis. */
1521 if (paren_skipped)
1522 --input_line_pointer;
1523
1524 return BFD_RELOC_UNUSED;
1525 }
1526
1527 /* Insert an operand value into an instruction. */
1528
1529 static unsigned long v850_insert_operand
1530 PARAMS ((unsigned long, const struct v850_operand *, offsetT, char *,
1531 unsigned int, char *));
1532
1533 static unsigned long
1534 v850_insert_operand (insn, operand, val, file, line, str)
1535 unsigned long insn;
1536 const struct v850_operand *operand;
1537 offsetT val;
1538 char *file;
1539 unsigned int line;
1540 char *str;
1541 {
1542 if (operand->insert)
1543 {
1544 const char *message = NULL;
1545
1546 insn = operand->insert (insn, val, &message);
1547 if (message != NULL)
1548 {
1549 if ((operand->flags & V850_OPERAND_SIGNED)
1550 && ! warn_signed_overflows
1551 && strstr (message, "out of range") != NULL)
1552 {
1553 /* Skip warning... */
1554 }
1555 else if ((operand->flags & V850_OPERAND_SIGNED) == 0
1556 && ! warn_unsigned_overflows
1557 && strstr (message, "out of range") != NULL)
1558 {
1559 /* Skip warning... */
1560 }
1561 else if (str)
1562 {
1563 if (file == (char *) NULL)
1564 as_warn ("%s: %s", str, message);
1565 else
1566 as_warn_where (file, line, "%s: %s", str, message);
1567 }
1568 else
1569 {
1570 if (file == (char *) NULL)
1571 as_warn (message);
1572 else
1573 as_warn_where (file, line, message);
1574 }
1575 }
1576 }
1577 else
1578 {
1579 if (operand->bits != 32)
1580 {
1581 long min, max;
1582
1583 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1584 {
1585 if (! warn_signed_overflows)
1586 max = (1 << operand->bits) - 1;
1587 else
1588 max = (1 << (operand->bits - 1)) - 1;
1589
1590 min = -(1 << (operand->bits - 1));
1591 }
1592 else
1593 {
1594 max = (1 << operand->bits) - 1;
1595
1596 if (! warn_unsigned_overflows)
1597 min = -(1 << (operand->bits - 1));
1598 else
1599 min = 0;
1600 }
1601
1602 if (val < (offsetT) min || val > (offsetT) max)
1603 {
1604 /* xgettext:c-format */
1605 const char *err =
1606 _("operand out of range (%s not between %ld and %ld)");
1607 char buf[100];
1608
1609 /* Restore min and mix to expected values for decimal ranges. */
1610 if ((operand->flags & V850_OPERAND_SIGNED)
1611 && ! warn_signed_overflows)
1612 max = (1 << (operand->bits - 1)) - 1;
1613
1614 if (! (operand->flags & V850_OPERAND_SIGNED)
1615 && ! warn_unsigned_overflows)
1616 min = 0;
1617
1618 if (str)
1619 {
1620 sprintf (buf, "%s: ", str);
1621
1622 sprint_value (buf + strlen (buf), val);
1623 }
1624 else
1625 sprint_value (buf, val);
1626
1627 if (file == (char *) NULL)
1628 as_warn (err, buf, min, max);
1629 else
1630 as_warn_where (file, line, err, buf, min, max);
1631 }
1632 }
1633
1634 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1635 }
1636
1637 return insn;
1638 }
1639 \f
1640 static char copy_of_instruction[128];
1641
1642 void
1643 md_assemble (str)
1644 char *str;
1645 {
1646 char *s;
1647 char *start_of_operands;
1648 struct v850_opcode *opcode;
1649 struct v850_opcode *next_opcode;
1650 const unsigned char *opindex_ptr;
1651 int next_opindex;
1652 int relaxable = 0;
1653 unsigned long insn;
1654 unsigned long insn_size;
1655 char *f;
1656 int i;
1657 int match;
1658 bfd_boolean extra_data_after_insn = FALSE;
1659 unsigned extra_data_len = 0;
1660 unsigned long extra_data = 0;
1661 char *saved_input_line_pointer;
1662
1663 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
1664
1665 /* Get the opcode. */
1666 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
1667 continue;
1668
1669 if (*s != '\0')
1670 *s++ = '\0';
1671
1672 /* Find the first opcode with the proper name. */
1673 opcode = (struct v850_opcode *) hash_find (v850_hash, str);
1674 if (opcode == NULL)
1675 {
1676 /* xgettext:c-format */
1677 as_bad (_("Unrecognized opcode: `%s'"), str);
1678 ignore_rest_of_line ();
1679 return;
1680 }
1681
1682 str = s;
1683 while (ISSPACE (*str))
1684 ++str;
1685
1686 start_of_operands = str;
1687
1688 saved_input_line_pointer = input_line_pointer;
1689
1690 for (;;)
1691 {
1692 const char *errmsg = NULL;
1693
1694 match = 0;
1695
1696 if ((opcode->processors & processor_mask) == 0)
1697 {
1698 errmsg = _("Target processor does not support this instruction.");
1699 goto error;
1700 }
1701
1702 relaxable = 0;
1703 fc = 0;
1704 next_opindex = 0;
1705 insn = opcode->opcode;
1706 extra_data_after_insn = FALSE;
1707
1708 input_line_pointer = str = start_of_operands;
1709
1710 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
1711 {
1712 const struct v850_operand *operand;
1713 char *hold;
1714 expressionS ex;
1715 bfd_reloc_code_real_type reloc;
1716
1717 if (next_opindex == 0)
1718 {
1719 operand = &v850_operands[*opindex_ptr];
1720 }
1721 else
1722 {
1723 operand = &v850_operands[next_opindex];
1724 next_opindex = 0;
1725 }
1726
1727 errmsg = NULL;
1728
1729 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1730 ++str;
1731
1732 if (operand->flags & V850_OPERAND_RELAX)
1733 relaxable = 1;
1734
1735 /* Gather the operand. */
1736 hold = input_line_pointer;
1737 input_line_pointer = str;
1738
1739 /* lo(), hi(), hi0(), etc... */
1740 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1741 {
1742 /* This is a fake reloc, used to indicate an error condition. */
1743 if (reloc == BFD_RELOC_64)
1744 {
1745 match = 1;
1746 goto error;
1747 }
1748
1749 expression (&ex);
1750
1751 if (ex.X_op == O_constant)
1752 {
1753 switch (reloc)
1754 {
1755 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1756 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
1757 and the like. */
1758 /* Fall through. */
1759
1760 case BFD_RELOC_LO16:
1761 {
1762 /* Truncate, then sign extend the value. */
1763 ex.X_add_number = SEXT16 (ex.X_add_number);
1764 break;
1765 }
1766
1767 case BFD_RELOC_HI16:
1768 {
1769 /* Truncate, then sign extend the value. */
1770 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1771 break;
1772 }
1773
1774 case BFD_RELOC_HI16_S:
1775 {
1776 /* Truncate, then sign extend the value. */
1777 int temp = (ex.X_add_number >> 16) & 0xffff;
1778
1779 temp += (ex.X_add_number >> 15) & 1;
1780
1781 ex.X_add_number = SEXT16 (temp);
1782 break;
1783 }
1784
1785 case BFD_RELOC_32:
1786 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1787 {
1788 errmsg = _("immediate operand is too large");
1789 goto error;
1790 }
1791
1792 extra_data_after_insn = TRUE;
1793 extra_data_len = 4;
1794 extra_data = 0;
1795 break;
1796
1797 default:
1798 fprintf (stderr, "reloc: %d\n", reloc);
1799 as_bad (_("AAARG -> unhandled constant reloc"));
1800 break;
1801 }
1802
1803 if (fc > MAX_INSN_FIXUPS)
1804 as_fatal (_("too many fixups"));
1805
1806 fixups[fc].exp = ex;
1807 fixups[fc].opindex = *opindex_ptr;
1808 fixups[fc].reloc = reloc;
1809 fc++;
1810 }
1811 else
1812 {
1813 if (reloc == BFD_RELOC_32)
1814 {
1815 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1816 {
1817 errmsg = _("immediate operand is too large");
1818 goto error;
1819 }
1820
1821 extra_data_after_insn = TRUE;
1822 extra_data_len = 4;
1823 extra_data = ex.X_add_number;
1824 }
1825
1826 if (fc > MAX_INSN_FIXUPS)
1827 as_fatal (_("too many fixups"));
1828
1829 fixups[fc].exp = ex;
1830 fixups[fc].opindex = *opindex_ptr;
1831 fixups[fc].reloc = reloc;
1832 fc++;
1833 }
1834 }
1835 else
1836 {
1837 errmsg = NULL;
1838
1839 if ((operand->flags & V850_OPERAND_REG) != 0)
1840 {
1841 if (!register_name (&ex))
1842 {
1843 errmsg = _("invalid register name");
1844 }
1845 else if ((operand->flags & V850_NOT_R0)
1846 && ex.X_add_number == 0)
1847 {
1848 errmsg = _("register r0 cannot be used here");
1849
1850 /* Force an error message to be generated by
1851 skipping over any following potential matches
1852 for this opcode. */
1853 opcode += 3;
1854 }
1855 }
1856 else if ((operand->flags & V850_OPERAND_SRG) != 0)
1857 {
1858 if (!system_register_name (&ex, TRUE, FALSE))
1859 {
1860 errmsg = _("invalid system register name");
1861 }
1862 }
1863 else if ((operand->flags & V850_OPERAND_EP) != 0)
1864 {
1865 char *start = input_line_pointer;
1866 char c = get_symbol_end ();
1867
1868 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1869 {
1870 /* Put things back the way we found them. */
1871 *input_line_pointer = c;
1872 input_line_pointer = start;
1873 errmsg = _("expected EP register");
1874 goto error;
1875 }
1876
1877 *input_line_pointer = c;
1878 str = input_line_pointer;
1879 input_line_pointer = hold;
1880
1881 while (*str == ' ' || *str == ','
1882 || *str == '[' || *str == ']')
1883 ++str;
1884 continue;
1885 }
1886 else if ((operand->flags & V850_OPERAND_CC) != 0)
1887 {
1888 if (!cc_name (&ex))
1889 {
1890 errmsg = _("invalid condition code name");
1891 }
1892 }
1893 else if (operand->flags & V850E_PUSH_POP)
1894 {
1895 errmsg = parse_register_list (&insn, operand);
1896
1897 /* The parse_register_list() function has already done
1898 everything, so fake a dummy expression. */
1899 ex.X_op = O_constant;
1900 ex.X_add_number = 0;
1901 }
1902 else if (operand->flags & V850E_IMMEDIATE16)
1903 {
1904 expression (&ex);
1905
1906 if (ex.X_op != O_constant)
1907 errmsg = _("constant expression expected");
1908 else if (ex.X_add_number & 0xffff0000)
1909 {
1910 if (ex.X_add_number & 0xffff)
1911 errmsg = _("constant too big to fit into instruction");
1912 else if ((insn & 0x001fffc0) == 0x00130780)
1913 ex.X_add_number >>= 16;
1914 else
1915 errmsg = _("constant too big to fit into instruction");
1916 }
1917
1918 extra_data_after_insn = TRUE;
1919 extra_data_len = 2;
1920 extra_data = ex.X_add_number;
1921 ex.X_add_number = 0;
1922 }
1923 else if (operand->flags & V850E_IMMEDIATE32)
1924 {
1925 expression (&ex);
1926
1927 if (ex.X_op != O_constant)
1928 errmsg = _("constant expression expected");
1929
1930 extra_data_after_insn = TRUE;
1931 extra_data_len = 4;
1932 extra_data = ex.X_add_number;
1933 ex.X_add_number = 0;
1934 }
1935 else if (register_name (&ex)
1936 && (operand->flags & V850_OPERAND_REG) == 0)
1937 {
1938 char c;
1939 int exists = 0;
1940
1941 /* It is possible that an alias has been defined that
1942 matches a register name. For example the code may
1943 include a ".set ZERO, 0" directive, which matches
1944 the register name "zero". Attempt to reparse the
1945 field as an expression, and only complain if we
1946 cannot generate a constant. */
1947
1948 input_line_pointer = str;
1949
1950 c = get_symbol_end ();
1951
1952 if (symbol_find (str) != NULL)
1953 exists = 1;
1954
1955 *input_line_pointer = c;
1956 input_line_pointer = str;
1957
1958 expression (&ex);
1959
1960 if (ex.X_op != O_constant)
1961 {
1962 /* If this register is actually occuring too early on
1963 the parsing of the instruction, (because another
1964 field is missing) then report this. */
1965 if (opindex_ptr[1] != 0
1966 && (v850_operands[opindex_ptr[1]].flags
1967 & V850_OPERAND_REG))
1968 errmsg = _("syntax error: value is missing before the register name");
1969 else
1970 errmsg = _("syntax error: register not expected");
1971
1972 /* If we created a symbol in the process of this
1973 test then delete it now, so that it will not
1974 be output with the real symbols... */
1975 if (exists == 0
1976 && ex.X_op == O_symbol)
1977 symbol_remove (ex.X_add_symbol,
1978 &symbol_rootP, &symbol_lastP);
1979 }
1980 }
1981 else if (system_register_name (&ex, FALSE, FALSE)
1982 && (operand->flags & V850_OPERAND_SRG) == 0)
1983 {
1984 errmsg = _("syntax error: system register not expected");
1985 }
1986 else if (cc_name (&ex)
1987 && (operand->flags & V850_OPERAND_CC) == 0)
1988 {
1989 errmsg = _("syntax error: condition code not expected");
1990 }
1991 else
1992 {
1993 expression (&ex);
1994 /* Special case:
1995 If we are assembling a MOV instruction and the immediate
1996 value does not fit into the bits available then create a
1997 fake error so that the next MOV instruction will be
1998 selected. This one has a 32 bit immediate field. */
1999
2000 if (((insn & 0x07e0) == 0x0200)
2001 && operand->bits == 5 /* Do not match the CALLT instruction. */
2002 && ex.X_op == O_constant
2003 && (ex.X_add_number < (-(1 << (operand->bits - 1)))
2004 || ex.X_add_number > ((1 << (operand->bits - 1)) - 1)))
2005 errmsg = _("immediate operand is too large");
2006 }
2007
2008 if (errmsg)
2009 goto error;
2010
2011 #if 0
2012 fprintf (stderr,
2013 " insn: %x, operand %d, op: %d, add_number: %d\n",
2014 insn, opindex_ptr - opcode->operands,
2015 ex.X_op, ex.X_add_number);
2016 #endif
2017
2018 switch (ex.X_op)
2019 {
2020 case O_illegal:
2021 errmsg = _("illegal operand");
2022 goto error;
2023 case O_absent:
2024 errmsg = _("missing operand");
2025 goto error;
2026 case O_register:
2027 if ((operand->flags
2028 & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
2029 {
2030 errmsg = _("invalid operand");
2031 goto error;
2032 }
2033 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2034 (char *) NULL, 0,
2035 copy_of_instruction);
2036 break;
2037
2038 case O_constant:
2039 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2040 (char *) NULL, 0,
2041 copy_of_instruction);
2042 break;
2043
2044 default:
2045 /* We need to generate a fixup for this expression. */
2046 if (fc >= MAX_INSN_FIXUPS)
2047 as_fatal (_("too many fixups"));
2048
2049 fixups[fc].exp = ex;
2050 fixups[fc].opindex = *opindex_ptr;
2051 fixups[fc].reloc = BFD_RELOC_UNUSED;
2052 ++fc;
2053 break;
2054 }
2055 }
2056
2057 str = input_line_pointer;
2058 input_line_pointer = hold;
2059
2060 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
2061 || *str == ')')
2062 ++str;
2063 }
2064 match = 1;
2065
2066 error:
2067 if (match == 0)
2068 {
2069 next_opcode = opcode + 1;
2070 if (next_opcode->name != NULL
2071 && strcmp (next_opcode->name, opcode->name) == 0)
2072 {
2073 opcode = next_opcode;
2074
2075 /* Skip versions that are not supported by the target
2076 processor. */
2077 if ((opcode->processors & processor_mask) == 0)
2078 goto error;
2079
2080 continue;
2081 }
2082
2083 as_bad ("%s: %s", copy_of_instruction, errmsg);
2084
2085 if (*input_line_pointer == ']')
2086 ++input_line_pointer;
2087
2088 ignore_rest_of_line ();
2089 input_line_pointer = saved_input_line_pointer;
2090 return;
2091 }
2092 break;
2093 }
2094
2095 while (ISSPACE (*str))
2096 ++str;
2097
2098 if (*str != '\0')
2099 /* xgettext:c-format */
2100 as_bad (_("junk at end of line: `%s'"), str);
2101
2102 input_line_pointer = str;
2103
2104 /* Tie dwarf2 debug info to the address at the start of the insn.
2105 We can't do this after the insn has been output as the current
2106 frag may have been closed off. eg. by frag_var. */
2107 dwarf2_emit_insn (0);
2108
2109 /* Write out the instruction. */
2110
2111 if (relaxable && fc > 0)
2112 {
2113 insn_size = 2;
2114 fc = 0;
2115
2116 if (!strcmp (opcode->name, "br"))
2117 {
2118 f = frag_var (rs_machine_dependent, 4, 2, 2,
2119 fixups[0].exp.X_add_symbol,
2120 fixups[0].exp.X_add_number,
2121 (char *) fixups[0].opindex);
2122 md_number_to_chars (f, insn, insn_size);
2123 md_number_to_chars (f + 2, 0, 2);
2124 }
2125 else
2126 {
2127 f = frag_var (rs_machine_dependent, 6, 4, 0,
2128 fixups[0].exp.X_add_symbol,
2129 fixups[0].exp.X_add_number,
2130 (char *) fixups[0].opindex);
2131 md_number_to_chars (f, insn, insn_size);
2132 md_number_to_chars (f + 2, 0, 4);
2133 }
2134 }
2135 else
2136 {
2137 /* Four byte insns have an opcode with the two high bits on. */
2138 if ((insn & 0x0600) == 0x0600)
2139 insn_size = 4;
2140 else
2141 insn_size = 2;
2142
2143 /* Special case: 32 bit MOV. */
2144 if ((insn & 0xffe0) == 0x0620)
2145 insn_size = 2;
2146
2147 f = frag_more (insn_size);
2148 md_number_to_chars (f, insn, insn_size);
2149
2150 if (extra_data_after_insn)
2151 {
2152 f = frag_more (extra_data_len);
2153 md_number_to_chars (f, extra_data, extra_data_len);
2154
2155 extra_data_after_insn = FALSE;
2156 }
2157 }
2158
2159 /* Create any fixups. At this point we do not use a
2160 bfd_reloc_code_real_type, but instead just use the
2161 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2162 handle fixups for any operand type, although that is admittedly
2163 not a very exciting feature. We pick a BFD reloc type in
2164 md_apply_fix3. */
2165 for (i = 0; i < fc; i++)
2166 {
2167 const struct v850_operand *operand;
2168 bfd_reloc_code_real_type reloc;
2169
2170 operand = &v850_operands[fixups[i].opindex];
2171
2172 reloc = fixups[i].reloc;
2173
2174 if (reloc != BFD_RELOC_UNUSED)
2175 {
2176 reloc_howto_type *reloc_howto =
2177 bfd_reloc_type_lookup (stdoutput, reloc);
2178 int size;
2179 int address;
2180 fixS *fixP;
2181
2182 if (!reloc_howto)
2183 abort ();
2184
2185 size = bfd_get_reloc_size (reloc_howto);
2186
2187 /* XXX This will abort on an R_V850_8 reloc -
2188 is this reloc actually used? */
2189 if (size != 2 && size != 4)
2190 abort ();
2191
2192 address = (f - frag_now->fr_literal) + insn_size - size;
2193
2194 if (reloc == BFD_RELOC_32)
2195 address += 2;
2196
2197 fixP = fix_new_exp (frag_now, address, size,
2198 &fixups[i].exp,
2199 reloc_howto->pc_relative,
2200 reloc);
2201
2202 switch (reloc)
2203 {
2204 case BFD_RELOC_LO16:
2205 case BFD_RELOC_HI16:
2206 case BFD_RELOC_HI16_S:
2207 fixP->fx_no_overflow = 1;
2208 break;
2209 default:
2210 break;
2211 }
2212 }
2213 else
2214 {
2215 fix_new_exp (frag_now,
2216 f - frag_now->fr_literal, 4,
2217 & fixups[i].exp,
2218 (operand->flags & V850_OPERAND_DISP) != 0,
2219 (bfd_reloc_code_real_type) (fixups[i].opindex
2220 + (int) BFD_RELOC_UNUSED));
2221 }
2222 }
2223
2224 input_line_pointer = saved_input_line_pointer;
2225 }
2226
2227 /* If while processing a fixup, a reloc really needs to be created
2228 then it is done here. */
2229
2230 arelent *
2231 tc_gen_reloc (seg, fixp)
2232 asection *seg ATTRIBUTE_UNUSED;
2233 fixS *fixp;
2234 {
2235 arelent *reloc;
2236
2237 reloc = (arelent *) xmalloc (sizeof (arelent));
2238 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2239 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2240 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2241
2242 if ( fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
2243 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2244 || fixp->fx_r_type == BFD_RELOC_V850_LONGCALL
2245 || fixp->fx_r_type == BFD_RELOC_V850_LONGJUMP
2246 || fixp->fx_r_type == BFD_RELOC_V850_ALIGN)
2247 reloc->addend = fixp->fx_offset;
2248 else
2249 {
2250 if (fixp->fx_r_type == BFD_RELOC_32
2251 && fixp->fx_pcrel)
2252 fixp->fx_r_type = BFD_RELOC_32_PCREL;
2253
2254 reloc->addend = fixp->fx_addnumber;
2255 }
2256
2257 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2258
2259 if (reloc->howto == (reloc_howto_type *) NULL)
2260 {
2261 as_bad_where (fixp->fx_file, fixp->fx_line,
2262 /* xgettext:c-format */
2263 _("reloc %d not supported by object file format"),
2264 (int) fixp->fx_r_type);
2265
2266 xfree (reloc);
2267
2268 return NULL;
2269 }
2270
2271 return reloc;
2272 }
2273
2274 void
2275 v850_handle_align (frag)
2276 fragS * frag;
2277 {
2278 if (v850_relax
2279 && frag->fr_type == rs_align
2280 && frag->fr_address + frag->fr_fix > 0
2281 && frag->fr_offset > 1
2282 && now_seg != bss_section
2283 && now_seg != v850_seg_table[SBSS_SECTION].s
2284 && now_seg != v850_seg_table[TBSS_SECTION].s
2285 && now_seg != v850_seg_table[ZBSS_SECTION].s)
2286 fix_new (frag, frag->fr_fix, 2, & abs_symbol, frag->fr_offset, 0,
2287 BFD_RELOC_V850_ALIGN);
2288 }
2289
2290 /* Return current size of variable part of frag. */
2291
2292 int
2293 md_estimate_size_before_relax (fragp, seg)
2294 fragS *fragp;
2295 asection *seg ATTRIBUTE_UNUSED;
2296 {
2297 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2298 abort ();
2299
2300 return md_relax_table[fragp->fr_subtype].rlx_length;
2301 }
2302
2303 long
2304 v850_pcrel_from_section (fixp, section)
2305 fixS *fixp;
2306 segT section;
2307 {
2308 /* If the symbol is undefined, or in a section other than our own,
2309 or it is weak (in which case it may well be in another section,
2310 then let the linker figure it out. */
2311 if (fixp->fx_addsy != (symbolS *) NULL
2312 && (! S_IS_DEFINED (fixp->fx_addsy)
2313 || S_IS_WEAK (fixp->fx_addsy)
2314 || (S_GET_SEGMENT (fixp->fx_addsy) != section)))
2315 return 0;
2316
2317 return fixp->fx_frag->fr_address + fixp->fx_where;
2318 }
2319
2320 void
2321 md_apply_fix3 (fixP, valueP, seg)
2322 fixS *fixP;
2323 valueT *valueP;
2324 segT seg ATTRIBUTE_UNUSED;
2325 {
2326 valueT value = * valueP;
2327 char *where;
2328
2329 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2330 || fixP->fx_r_type == BFD_RELOC_V850_LONGCALL
2331 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP
2332 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2333 {
2334 fixP->fx_done = 0;
2335 return;
2336 }
2337
2338 if (fixP->fx_addsy == (symbolS *) NULL)
2339 fixP->fx_addnumber = value,
2340 fixP->fx_done = 1;
2341
2342 else if (fixP->fx_pcrel)
2343 fixP->fx_addnumber = fixP->fx_offset;
2344
2345 else
2346 {
2347 value = fixP->fx_offset;
2348 if (fixP->fx_subsy != (symbolS *) NULL)
2349 {
2350 if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
2351 value -= S_GET_VALUE (fixP->fx_subsy);
2352 else
2353 {
2354 /* We don't actually support subtracting a symbol. */
2355 as_bad_where (fixP->fx_file, fixP->fx_line,
2356 _("expression too complex"));
2357 }
2358 }
2359 fixP->fx_addnumber = value;
2360 }
2361
2362 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
2363 {
2364 int opindex;
2365 const struct v850_operand *operand;
2366 unsigned long insn;
2367
2368 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
2369 operand = &v850_operands[opindex];
2370
2371 /* Fetch the instruction, insert the fully resolved operand
2372 value, and stuff the instruction back again.
2373
2374 Note the instruction has been stored in little endian
2375 format! */
2376 where = fixP->fx_frag->fr_literal + fixP->fx_where;
2377
2378 insn = bfd_getl32 ((unsigned char *) where);
2379 insn = v850_insert_operand (insn, operand, (offsetT) value,
2380 fixP->fx_file, fixP->fx_line, NULL);
2381 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2382
2383 if (fixP->fx_done)
2384 /* Nothing else to do here. */
2385 return;
2386
2387 /* Determine a BFD reloc value based on the operand information.
2388 We are only prepared to turn a few of the operands into relocs. */
2389
2390 if (operand->bits == 22)
2391 fixP->fx_r_type = BFD_RELOC_V850_22_PCREL;
2392 else if (operand->bits == 9)
2393 fixP->fx_r_type = BFD_RELOC_V850_9_PCREL;
2394 else
2395 {
2396 #if 0
2397 fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn);
2398 #endif
2399
2400 as_bad_where (fixP->fx_file, fixP->fx_line,
2401 _("unresolved expression that must be resolved"));
2402 fixP->fx_done = 1;
2403 return;
2404 }
2405 }
2406 else if (fixP->fx_done)
2407 {
2408 /* We still have to insert the value into memory! */
2409 where = fixP->fx_frag->fr_literal + fixP->fx_where;
2410
2411 if (fixP->fx_size == 1)
2412 *where = value & 0xff;
2413 else if (fixP->fx_size == 2)
2414 bfd_putl16 (value & 0xffff, (unsigned char *) where);
2415 else if (fixP->fx_size == 4)
2416 bfd_putl32 (value, (unsigned char *) where);
2417 }
2418 }
2419 \f
2420 /* Parse a cons expression. We have to handle hi(), lo(), etc
2421 on the v850. */
2422
2423 void
2424 parse_cons_expression_v850 (exp)
2425 expressionS *exp;
2426 {
2427 /* See if there's a reloc prefix like hi() we have to handle. */
2428 hold_cons_reloc = v850_reloc_prefix (NULL);
2429
2430 /* Do normal expression parsing. */
2431 expression (exp);
2432 }
2433
2434 /* Create a fixup for a cons expression. If parse_cons_expression_v850
2435 found a reloc prefix, then we use that reloc, else we choose an
2436 appropriate one based on the size of the expression. */
2437
2438 void
2439 cons_fix_new_v850 (frag, where, size, exp)
2440 fragS *frag;
2441 int where;
2442 int size;
2443 expressionS *exp;
2444 {
2445 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2446 {
2447 if (size == 4)
2448 hold_cons_reloc = BFD_RELOC_32;
2449 if (size == 2)
2450 hold_cons_reloc = BFD_RELOC_16;
2451 if (size == 1)
2452 hold_cons_reloc = BFD_RELOC_8;
2453 }
2454
2455 if (exp != NULL)
2456 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2457 else
2458 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
2459
2460 hold_cons_reloc = BFD_RELOC_UNUSED;
2461 }
2462
2463 bfd_boolean
2464 v850_fix_adjustable (fixP)
2465 fixS *fixP;
2466 {
2467 if (fixP->fx_addsy == NULL)
2468 return 1;
2469
2470 /* Don't adjust function names. */
2471 if (S_IS_FUNCTION (fixP->fx_addsy))
2472 return 0;
2473
2474 /* We need the symbol name for the VTABLE entries. */
2475 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2476 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2477 return 0;
2478
2479 return 1;
2480 }
2481
2482 int
2483 v850_force_relocation (fixP)
2484 struct fix *fixP;
2485 {
2486 if (fixP->fx_r_type == BFD_RELOC_V850_LONGCALL
2487 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP)
2488 return 1;
2489
2490 if (v850_relax
2491 && (fixP->fx_pcrel
2492 || fixP->fx_r_type == BFD_RELOC_V850_ALIGN
2493 || fixP->fx_r_type == BFD_RELOC_V850_22_PCREL
2494 || fixP->fx_r_type == BFD_RELOC_V850_9_PCREL
2495 || fixP->fx_r_type >= BFD_RELOC_UNUSED))
2496 return 1;
2497
2498 return generic_force_reloc (fixP);
2499 }