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1 /* tc-xtensa.h -- Header file for tc-xtensa.c.
2 Copyright (C) 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
19 02110-1301, USA. */
20
21 #ifndef TC_XTENSA
22 #define TC_XTENSA 1
23
24 struct fix;
25
26 #ifndef OBJ_ELF
27 #error Xtensa support requires ELF object format
28 #endif
29
30 #include "xtensa-isa.h"
31 #include "xtensa-config.h"
32
33 #define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE
34
35
36 /* Maximum number of opcode slots in a VLIW instruction. */
37 #define MAX_SLOTS 15
38
39
40 /* For all xtensa relax states except RELAX_DESIRE_ALIGN and
41 RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
42 in the fr_var field. For the two exceptions, fr_var is a float value
43 that records the frequency with which the following instruction is
44 executed as a branch target. The aligner uses this information to
45 tell which targets are most important to be aligned. */
46
47 enum xtensa_relax_statesE
48 {
49 RELAX_ALIGN_NEXT_OPCODE,
50 /* Use the first opcode of the next fragment to determine the
51 alignment requirements. This is ONLY used for LOOPs currently. */
52
53 RELAX_CHECK_ALIGN_NEXT_OPCODE,
54 /* The next non-empty frag contains a loop instruction. Check to see
55 if it is correctly aligned, but do not align it. */
56
57 RELAX_DESIRE_ALIGN_IF_TARGET,
58 /* These are placed in front of labels and converted to either
59 RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
60 relaxation begins. */
61
62 RELAX_ADD_NOP_IF_A0_B_RETW,
63 /* These are placed in front of conditional branches. Before
64 relaxation begins, they are turned into either NOPs for branches
65 immediately followed by RETW or RETW.N or rs_fills of 0. This is
66 used to avoid a hardware bug in some early versions of the
67 processor. */
68
69 RELAX_ADD_NOP_IF_PRE_LOOP_END,
70 /* These are placed after JX instructions. Before relaxation begins,
71 they are turned into either NOPs, if the JX is one instruction
72 before a loop end label, or rs_fills of 0. This is used to avoid a
73 hardware interlock issue prior to Xtensa version T1040. */
74
75 RELAX_ADD_NOP_IF_SHORT_LOOP,
76 /* These are placed after LOOP instructions and turned into NOPs when:
77 (1) there are less than 3 instructions in the loop; we place 2 of
78 these in a row to add up to 2 NOPS in short loops; or (2) the
79 instructions in the loop do not include a branch or jump.
80 Otherwise they are turned into rs_fills of 0 before relaxation
81 begins. This is used to avoid hardware bug PR3830. */
82
83 RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
84 /* These are placed after LOOP instructions and turned into NOPs if
85 there are less than 12 bytes to the end of some other loop's end.
86 Otherwise they are turned into rs_fills of 0 before relaxation
87 begins. This is used to avoid hardware bug PR3830. */
88
89 RELAX_DESIRE_ALIGN,
90 /* The next fragment would like its first instruction to NOT cross an
91 instruction fetch boundary. */
92
93 RELAX_MAYBE_DESIRE_ALIGN,
94 /* The next fragment might like its first instruction to NOT cross an
95 instruction fetch boundary. These are placed after a branch that
96 might be relaxed. If the branch is relaxed, then this frag will be
97 a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
98 frag. */
99
100 RELAX_LOOP_END,
101 /* This will be turned into a NOP or NOP.N if the previous instruction
102 is expanded to negate a loop. */
103
104 RELAX_LOOP_END_ADD_NOP,
105 /* When the code density option is available, this will generate a
106 NOP.N marked RELAX_NARROW. Otherwise, it will create an rs_fill
107 fragment with a NOP in it. */
108
109 RELAX_LITERAL,
110 /* Another fragment could generate an expansion here but has not yet. */
111
112 RELAX_LITERAL_NR,
113 /* Expansion has been generated by an instruction that generates a
114 literal. However, the stretch has NOT been reported yet in this
115 fragment. */
116
117 RELAX_LITERAL_FINAL,
118 /* Expansion has been generated by an instruction that generates a
119 literal. */
120
121 RELAX_LITERAL_POOL_BEGIN,
122 RELAX_LITERAL_POOL_END,
123 /* Technically these are not relaxations at all but mark a location
124 to store literals later. Note that fr_var stores the frchain for
125 BEGIN frags and fr_var stores now_seg for END frags. */
126
127 RELAX_NARROW,
128 /* The last instruction in this fragment (at->fr_opcode) can be
129 freely replaced with a single wider instruction if a future
130 alignment desires or needs it. */
131
132 RELAX_IMMED,
133 /* The last instruction in this fragment (at->fr_opcode) contains
134 an immediate or symbol. If the value does not fit, relax the
135 opcode using expansions from the relax table. */
136
137 RELAX_IMMED_STEP1,
138 /* The last instruction in this fragment (at->fr_opcode) contains a
139 literal. It has already been expanded 1 step. */
140
141 RELAX_IMMED_STEP2,
142 /* The last instruction in this fragment (at->fr_opcode) contains a
143 literal. It has already been expanded 2 steps. */
144
145 RELAX_IMMED_STEP3,
146 /* The last instruction in this fragment (at->fr_opcode) contains a
147 literal. It has already been expanded 3 steps. */
148
149 RELAX_SLOTS,
150 /* There are instructions within the last VLIW instruction that need
151 relaxation. Find the relaxation based on the slot info in
152 xtensa_frag_type. Relaxations that deal with particular opcodes
153 are slot-based (e.g., converting a MOVI to an L32R). Relaxations
154 that deal with entire instructions, such as alignment, are not
155 slot-based. */
156
157 RELAX_FILL_NOP,
158 /* This marks the location of a pipeline stall. We can fill these guys
159 in for alignment of any size. */
160
161 RELAX_UNREACHABLE,
162 /* This marks the location as unreachable. The assembler may widen or
163 narrow this area to meet alignment requirements of nearby
164 instructions. */
165
166 RELAX_MAYBE_UNREACHABLE,
167 /* This marks the location as possibly unreachable. These are placed
168 after a branch that may be relaxed into a branch and jump. If the
169 branch is relaxed, then this frag will be converted to a
170 RELAX_UNREACHABLE frag. */
171
172 RELAX_ORG,
173 /* This marks the location as having previously been an rs_org frag.
174 rs_org frags are converted to fill-zero frags immediately after
175 relaxation. However, we need to remember where they were so we can
176 prevent the linker from changing the size of any frag between the
177 section start and the org frag. */
178
179 RELAX_NONE
180 };
181
182 /* This is used as a stopper to bound the number of steps that
183 can be taken. */
184 #define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP3 - RELAX_IMMED)
185
186 struct xtensa_frag_type
187 {
188 /* Info about the current state of assembly, e.g., transform,
189 absolute_literals, etc. These need to be passed to the backend and
190 then to the object file.
191
192 When is_assembly_state_set is false, the frag inherits some of the
193 state settings from the previous frag in this segment. Because it
194 is not possible to intercept all fragment closures (frag_more and
195 frag_append_1_char can close a frag), we use a pass after initial
196 assembly to fill in the assembly states. */
197
198 unsigned int is_assembly_state_set : 1;
199 unsigned int is_no_density : 1;
200 unsigned int is_no_transform : 1;
201 unsigned int use_longcalls : 1;
202 unsigned int use_absolute_literals : 1;
203
204 /* Inhibits relaxation of machine-dependent alignment frags the
205 first time through a relaxation.... */
206 unsigned int relax_seen : 1;
207
208 /* Information that is needed in the object file and set when known. */
209 unsigned int is_literal : 1;
210 unsigned int is_loop_target : 1;
211 unsigned int is_branch_target : 1;
212 unsigned int is_insn : 1;
213 unsigned int is_unreachable : 1;
214
215 unsigned int is_specific_opcode : 1; /* also implies no_transform */
216
217 unsigned int is_align : 1;
218 unsigned int is_text_align : 1;
219 unsigned int alignment : 5;
220
221 /* A frag with this bit set is the first in a loop that actually
222 contains an instruction. */
223 unsigned int is_first_loop_insn : 1;
224
225 /* A frag with this bit set is a branch that we are using to
226 align branch targets as if it were a normal narrow instruction. */
227 unsigned int is_aligning_branch : 1;
228
229 /* For text fragments that can generate literals at relax time, this
230 variable points to the frag where the literal will be stored. For
231 literal frags, this variable points to the nearest literal pool
232 location frag. This literal frag will be moved to after this
233 location. For RELAX_LITERAL_POOL_BEGIN frags, this field points
234 to the frag immediately before the corresponding RELAX_LITERAL_POOL_END
235 frag, to make moving frags for this literal pool efficient. */
236 fragS *literal_frag;
237
238 /* The destination segment for literal frags. (Note that this is only
239 valid after xtensa_move_literals.) This field is also used for
240 LITERAL_POOL_END frags. */
241 segT lit_seg;
242
243 /* Frag chain for LITERAL_POOL_BEGIN frags. */
244 struct frchain *lit_frchain;
245
246 /* For the relaxation scheme, some literal fragments can have their
247 expansions modified by an instruction that relaxes. */
248 int text_expansion[MAX_SLOTS];
249 int literal_expansion[MAX_SLOTS];
250 int unreported_expansion;
251
252 /* For text fragments that can generate literals at relax time: */
253 fragS *literal_frags[MAX_SLOTS];
254 enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
255 symbolS *slot_symbols[MAX_SLOTS];
256 offsetT slot_offsets[MAX_SLOTS];
257
258 /* The global aligner needs to walk backward through the list of
259 frags. This field is only valid after xtensa_end. */
260 fragS *fr_prev;
261 };
262
263
264 /* For VLIW support, we need to know what slot a fixup applies to. */
265 typedef struct xtensa_fix_data_struct
266 {
267 int slot;
268 symbolS *X_add_symbol;
269 offsetT X_add_number;
270 } xtensa_fix_data;
271
272
273 /* Structure to record xtensa-specific symbol information. */
274 typedef struct xtensa_symfield_type
275 {
276 unsigned int is_loop_target : 1;
277 unsigned int is_branch_target : 1;
278 } xtensa_symfield_type;
279
280
281 /* Structure for saving information about a block of property data
282 for frags that have the same flags. The forward reference is
283 in this header file. The actual definition is in tc-xtensa.c. */
284 struct xtensa_block_info_struct;
285 typedef struct xtensa_block_info_struct xtensa_block_info;
286
287
288 /* Property section types. */
289 typedef enum
290 {
291 xt_literal_sec,
292 xt_prop_sec,
293 max_xt_sec
294 } xt_section_type;
295
296 typedef struct xtensa_segment_info_struct
297 {
298 fragS *literal_pool_loc;
299 xtensa_block_info *blocks[max_xt_sec];
300 } xtensa_segment_info;
301
302
303 extern const char *xtensa_target_format (void);
304 extern void xtensa_init_fix_data (struct fix *);
305 extern void xtensa_frag_init (fragS *);
306 extern int xtensa_force_relocation (struct fix *);
307 extern int xtensa_validate_fix_sub (struct fix *);
308 extern void xtensa_frob_label (struct symbol *);
309 extern void xtensa_end (void);
310 extern void xtensa_post_relax_hook (void);
311 extern void xtensa_file_arch_init (bfd *);
312 extern void xtensa_flush_pending_output (void);
313 extern bfd_boolean xtensa_fix_adjustable (struct fix *);
314 extern void xtensa_symbol_new_hook (symbolS *);
315 extern long xtensa_relax_frag (fragS *, long, int *);
316 extern void xtensa_elf_section_change_hook (void);
317 extern int xtensa_unrecognized_line (int);
318 extern bfd_boolean xtensa_check_inside_bundle (void);
319 extern void xtensa_handle_align (fragS *);
320 extern char *xtensa_section_rename (char *);
321
322 #define TARGET_FORMAT xtensa_target_format ()
323 #define TARGET_ARCH bfd_arch_xtensa
324 #define TC_SEGMENT_INFO_TYPE xtensa_segment_info
325 #define TC_SYMFIELD_TYPE struct xtensa_symfield_type
326 #define TC_FIX_TYPE xtensa_fix_data
327 #define TC_INIT_FIX_DATA(x) xtensa_init_fix_data (x)
328 #define TC_FRAG_TYPE struct xtensa_frag_type
329 #define TC_FRAG_INIT(frag) xtensa_frag_init (frag)
330 #define TC_FORCE_RELOCATION(fix) xtensa_force_relocation (fix)
331 #define TC_FORCE_RELOCATION_SUB_SAME(fix, seg) \
332 (! SEG_NORMAL (seg) || xtensa_force_relocation (fix))
333 #define TC_VALIDATE_FIX_SUB(fix) xtensa_validate_fix_sub (fix)
334 #define NO_PSEUDO_DOT xtensa_check_inside_bundle ()
335 #define tc_canonicalize_symbol_name(s) xtensa_section_rename (s)
336 #define tc_canonicalize_section_name(s) xtensa_section_rename (s)
337 #define tc_init_after_args() xtensa_file_arch_init (stdoutput)
338 #define tc_fix_adjustable(fix) xtensa_fix_adjustable (fix)
339 #define tc_frob_label(sym) xtensa_frob_label (sym)
340 #define tc_unrecognized_line(ch) xtensa_unrecognized_line (ch)
341 #define md_do_align(a,b,c,d,e) xtensa_flush_pending_output ()
342 #define md_elf_section_change_hook xtensa_elf_section_change_hook
343 #define md_end xtensa_end
344 #define md_flush_pending_output() xtensa_flush_pending_output ()
345 #define md_operand(x)
346 #define TEXT_SECTION_NAME xtensa_section_rename (".text")
347 #define DATA_SECTION_NAME xtensa_section_rename (".data")
348 #define BSS_SECTION_NAME xtensa_section_rename (".bss")
349 #define HANDLE_ALIGN(fragP) xtensa_handle_align (fragP)
350 #define MAX_MEM_FOR_RS_ALIGN_CODE 1
351
352
353 /* The renumber_section function must be mapped over all the sections
354 after calling xtensa_post_relax_hook. That function is static in
355 write.c so it cannot be called from xtensa_post_relax_hook itself. */
356
357 #define md_post_relax_hook \
358 do \
359 { \
360 int i = 0; \
361 xtensa_post_relax_hook (); \
362 bfd_map_over_sections (stdoutput, renumber_sections, &i); \
363 } \
364 while (0)
365
366
367 /* Because xtensa relaxation can insert a new literal into the middle of
368 fragment and thus require re-running the relaxation pass on the
369 section, we need an explicit flag here. We explicitly use the name
370 "stretched" here to avoid changing the source code in write.c. */
371
372 #define md_relax_frag(segment, fragP, stretch) \
373 xtensa_relax_frag (fragP, stretch, &stretched)
374
375
376 #define LOCAL_LABELS_FB 1
377 #define WORKING_DOT_WORD 1
378 #define DOUBLESLASH_LINE_COMMENTS
379 #define TC_HANDLES_FX_DONE
380 #define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
381 #define TC_LINKRELAX_FIXUP(SEG) 0
382 #define MD_APPLY_SYM_VALUE(FIX) 0
383 #define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
384
385 /* Use line number format that is amenable to linker relaxation. */
386 #define DWARF2_USE_FIXED_ADVANCE_PC (linkrelax != 0)
387
388
389 /* Resource reservation info functions. */
390
391 /* Returns the number of copies of a particular unit. */
392 typedef int (*unit_num_copies_func) (void *, xtensa_funcUnit);
393
394 /* Returns the number of units the opcode uses. */
395 typedef int (*opcode_num_units_func) (void *, xtensa_opcode);
396
397 /* Given an opcode and an index into the opcode's funcUnit list,
398 returns the unit used for the index. */
399 typedef int (*opcode_funcUnit_use_unit_func) (void *, xtensa_opcode, int);
400
401 /* Given an opcode and an index into the opcode's funcUnit list,
402 returns the cycle during which the unit is used. */
403 typedef int (*opcode_funcUnit_use_stage_func) (void *, xtensa_opcode, int);
404
405 /* The above typedefs parameterize the resource_table so that the
406 optional scheduler doesn't need its own resource reservation system.
407
408 For simple resource checking, which is all that happens normally,
409 the functions will be as follows (with some wrapping to make the
410 interface more convenient):
411
412 unit_num_copies_func = xtensa_funcUnit_num_copies
413 opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
414 opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
415 opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage
416
417 Of course the optional scheduler has its own reservation table
418 and functions. */
419
420 int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
421 int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);
422
423 typedef struct
424 {
425 void *data;
426 int cycles;
427 int allocated_cycles;
428 int num_units;
429 unit_num_copies_func unit_num_copies;
430 opcode_num_units_func opcode_num_units;
431 opcode_funcUnit_use_unit_func opcode_unit_use;
432 opcode_funcUnit_use_stage_func opcode_unit_stage;
433 unsigned char **units;
434 } resource_table;
435
436 resource_table *new_resource_table
437 (void *, int, int, unit_num_copies_func, opcode_num_units_func,
438 opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
439 void resize_resource_table (resource_table *, int);
440 void clear_resource_table (resource_table *);
441 bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
442 void reserve_resources (resource_table *, xtensa_opcode, int);
443 void release_resources (resource_table *, xtensa_opcode, int);
444
445 #endif /* TC_XTENSA */