gas/config/tc-xtensa.h

   1 /* tc-xtensa.h -- Header file for tc-xtensa.c.
   2    Copyright (C) 2003, 2004 Free Software Foundation, Inc.
   3
   4    This file is part of GAS, the GNU Assembler.
   5
   6    GAS is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 2, or (at your option)
   9    any later version.
  10
  11    GAS is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with GAS; see the file COPYING.  If not, write to the Free
  18    Software Foundation, 59 Temple Place - Suite 330, Boston, MA
  19    02111-1307, USA.  */
  20
  21 #ifndef TC_XTENSA
  22 #define TC_XTENSA 1
  23
  24 #ifdef ANSI_PROTOTYPES
  25 struct fix;
  26 #endif
  27
  28 #ifndef BFD_ASSEMBLER
  29 #error Xtensa support requires BFD_ASSEMBLER
  30 #endif
  31
  32 #ifndef OBJ_ELF
  33 #error Xtensa support requires ELF object format
  34 #endif
  35
  36 #include "xtensa-isa.h"
  37 #include "xtensa-config.h"
  38
  39 #define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE
  40
  41
  42 /* Maximum number of opcode slots in a VLIW instruction.  */
  43 #define MAX_SLOTS 15
  44
  45
  46 /* For all xtensa relax states except RELAX_DESIRE_ALIGN and
  47    RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
  48    in the fr_var field.  For the two exceptions, fr_var is a float value
  49    that records the frequency with which the following instruction is
  50    executed as a branch target.  The aligner uses this information to
  51    tell which targets are most important to be aligned.  */
  52
  53 enum xtensa_relax_statesE
  54 {
  55   RELAX_ALIGN_NEXT_OPCODE,
  56   /* Use the first opcode of the next fragment to determine the
  57      alignment requirements.  This is ONLY used for LOOPs currently.  */
  58
  59   RELAX_CHECK_ALIGN_NEXT_OPCODE,
  60   /* The next non-empty frag contains a loop instruction.  Check to see
  61      if it is correctly aligned, but do not align it.  */
  62
  63   RELAX_DESIRE_ALIGN_IF_TARGET,
  64   /* These are placed in front of labels and converted to either
  65      RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
  66      relaxation begins.  */
  67
  68   RELAX_ADD_NOP_IF_A0_B_RETW,
  69   /* These are placed in front of conditional branches.  Before
  70      relaxation begins, they are turned into either NOPs for branches
  71      immediately followed by RETW or RETW.N or rs_fills of 0.  This is
  72      used to avoid a hardware bug in some early versions of the
  73      processor.  */
  74
  75   RELAX_ADD_NOP_IF_PRE_LOOP_END,
  76   /* These are placed after JX instructions.  Before relaxation begins,
  77      they are turned into either NOPs, if the JX is one instruction
  78      before a loop end label, or rs_fills of 0.  This is used to avoid a
  79      hardware interlock issue prior to Xtensa version T1040.  */
  80
  81   RELAX_ADD_NOP_IF_SHORT_LOOP,
  82   /* These are placed after LOOP instructions and turned into NOPs when:
  83      (1) there are less than 3 instructions in the loop; we place 2 of
  84      these in a row to add up to 2 NOPS in short loops; or (2) the
  85      instructions in the loop do not include a branch or jump.
  86      Otherwise they are turned into rs_fills of 0 before relaxation
  87      begins.  This is used to avoid hardware bug PR3830.  */
  88
  89   RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
  90   /* These are placed after LOOP instructions and turned into NOPs if
  91      there are less than 12 bytes to the end of some other loop's end.
  92      Otherwise they are turned into rs_fills of 0 before relaxation
  93      begins.  This is used to avoid hardware bug PR3830.  */
  94
  95   RELAX_DESIRE_ALIGN,
  96   /* The next fragment would like its first instruction to NOT cross an
  97      instruction fetch boundary.  */
  98
  99   RELAX_MAYBE_DESIRE_ALIGN,
 100   /* The next fragment might like its first instruction to NOT cross an
 101      instruction fetch boundary.  These are placed after a branch that
 102      might be relaxed.  If the branch is relaxed, then this frag will be
 103      a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
 104      frag.  */
 105
 106   RELAX_LOOP_END,
 107   /* This will be turned into a NOP or NOP.N if the previous instruction
 108      is expanded to negate a loop.  */
 109
 110   RELAX_LOOP_END_ADD_NOP,
 111   /* When the code density option is available, this will generate a
 112      NOP.N marked RELAX_NARROW.  Otherwise, it will create an rs_fill
 113      fragment with a NOP in it.  */
 114
 115   RELAX_LITERAL,
 116   /* Another fragment could generate an expansion here but has not yet.  */
 117
 118   RELAX_LITERAL_NR,
 119   /* Expansion has been generated by an instruction that generates a
 120      literal.  However, the stretch has NOT been reported yet in this
 121      fragment.  */
 122
 123   RELAX_LITERAL_FINAL,
 124   /* Expansion has been generated by an instruction that generates a
 125      literal.  */
 126
 127   RELAX_LITERAL_POOL_BEGIN,
 128   RELAX_LITERAL_POOL_END,
 129   /* Technically these are not relaxations at all but mark a location
 130      to store literals later.  Note that fr_var stores the frchain for
 131      BEGIN frags and fr_var stores now_seg for END frags.  */
 132
 133   RELAX_NARROW,
 134   /* The last instruction in this fragment (at->fr_opcode) can be
 135      freely replaced with a single wider instruction if a future
 136      alignment desires or needs it.  */
 137
 138   RELAX_IMMED,
 139   /* The last instruction in this fragment (at->fr_opcode) contains
 140      the value defined by fr_symbol (fr_offset = 0).  If the value
 141      does not fit, use the specified expansion.  This is similar to
 142      "NARROW", except that these may not be expanded in order to align
 143      code.  */
 144
 145   RELAX_IMMED_STEP1,
 146   /* The last instruction in this fragment (at->fr_opcode) contains a
 147      literal.  It has already been expanded at least 1 step.  */
 148
 149   RELAX_IMMED_STEP2,
 150   /* The last instruction in this fragment (at->fr_opcode) contains a
 151      literal.  It has already been expanded at least 2 steps.  */
 152
 153   RELAX_SLOTS,
 154   /* There are instructions within the last VLIW instruction that need
 155      relaxation.  Find the relaxation based on the slot info in
 156      xtensa_frag_type.  Relaxations that deal with particular opcodes
 157      are slot-based (e.g., converting a MOVI to an L32R).  Relaxations
 158      that deal with entire instructions, such as alignment, are not
 159      slot-based.  */
 160
 161   RELAX_FILL_NOP,
 162   /* This marks the location of a pipeline stall.  We can fill these guys
 163      in for alignment of any size.  */
 164
 165   RELAX_UNREACHABLE,
 166   /* This marks the location as unreachable.  The assembler may widen or
 167      narrow this area to meet alignment requirements of nearby
 168      instructions.  */
 169
 170   RELAX_MAYBE_UNREACHABLE,
 171   /* This marks the location as possibly unreachable.  These are placed
 172      after a branch that may be relaxed into a branch and jump. If the
 173      branch is relaxed, then this frag will be converted to a
 174      RELAX_UNREACHABLE frag.  */
 175
 176   RELAX_NONE
 177 };
 178
 179 /* This is used as a stopper to bound the number of steps that
 180    can be taken.  */
 181 #define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP2 - RELAX_IMMED)
 182
 183 struct xtensa_frag_type
 184 {
 185   /* Info about the current state of assembly, e.g., transform,
 186      absolute_literals, etc.  These need to be passed to the backend and
 187      then to the object file.
 188
 189      When is_assembly_state_set is false, the frag inherits some of the
 190      state settings from the previous frag in this segment.  Because it
 191      is not possible to intercept all fragment closures (frag_more and
 192      frag_append_1_char can close a frag), we use a pass after initial
 193      assembly to fill in the assembly states.  */
 194
 195   unsigned int is_assembly_state_set : 1;
 196   unsigned int is_no_density : 1;
 197   unsigned int is_no_transform : 1;
 198   unsigned int use_absolute_literals : 1;
 199
 200   /* Inhibits relaxation of machine-dependent alignment frags the
 201      first time through a relaxation....  */
 202   unsigned int relax_seen : 1;
 203
 204   /* Infomation that is needed in the object file and set when known.  */
 205   unsigned int is_literal : 1;
 206   unsigned int is_loop_target : 1;
 207   unsigned int is_branch_target : 1;
 208   unsigned int is_insn : 1;
 209   unsigned int is_unreachable : 1;
 210
 211   unsigned int is_specific_opcode : 1; /* also implies no_transform */
 212
 213   unsigned int is_align : 1;
 214   unsigned int is_text_align : 1;
 215   unsigned int alignment : 5;
 216
 217   /* A frag with this bit set is the first in a loop that actually
 218      contains an instruction.  */
 219   unsigned int is_first_loop_insn : 1;
 220
 221   /* For text fragments that can generate literals at relax time, this
 222      variable points to the frag where the literal will be stored.  For
 223      literal frags, this variable points to the nearest literal pool
 224      location frag.  This literal frag will be moved to after this
 225      location.  */
 226   fragS *literal_frag;
 227
 228   /* The destination segment for literal frags.  (Note that this is only
 229      valid after xtensa_move_literals.  */
 230   segT lit_seg;
 231
 232   /* For the relaxation scheme, some literal fragments can have their
 233      expansions modified by an instruction that relaxes.  */
 234   int text_expansion[MAX_SLOTS];
 235   int literal_expansion[MAX_SLOTS];
 236   int unreported_expansion;
 237
 238   /* For text fragments that can generate literals at relax time:  */
 239   fragS *literal_frags[MAX_SLOTS];
 240   enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
 241   symbolS *slot_symbols[MAX_SLOTS];
 242   symbolS *slot_sub_symbols[MAX_SLOTS];
 243   offsetT slot_offsets[MAX_SLOTS];
 244
 245   /* The global aligner needs to walk backward through the list of
 246      frags.  This field is only valid after xtensa_end.  */
 247   fragS *fr_prev;
 248 };
 249
 250
 251 /* For VLIW support, we need to know what slot a fixup applies to.  */
 252 typedef struct xtensa_fix_data_struct
 253 {
 254   int slot;
 255   symbolS *X_add_symbol;
 256   offsetT X_add_number;
 257 } xtensa_fix_data;
 258
 259
 260 /* Structure to record xtensa-specific symbol information.  */
 261 typedef struct xtensa_symfield_type
 262 {
 263   unsigned int is_loop_target : 1;
 264   unsigned int is_branch_target : 1;
 265 } xtensa_symfield_type;
 266
 267
 268 /* Structure for saving information about a block of property data
 269    for frags that have the same flags.   The forward reference is
 270    in this header file.  The actual definition is in tc-xtensa.c.  */
 271 struct xtensa_block_info_struct;
 272 typedef struct xtensa_block_info_struct xtensa_block_info;
 273
 274
 275 /* Property section types.  */
 276 typedef enum
 277 {
 278   xt_literal_sec,
 279   xt_prop_sec,
 280   max_xt_sec
 281 } xt_section_type;
 282
 283 typedef struct xtensa_segment_info_struct
 284 {
 285   fragS *literal_pool_loc;
 286   xtensa_block_info *blocks[max_xt_sec];
 287 } xtensa_segment_info;
 288
 289
 290 extern const char *xtensa_target_format (void);
 291 extern void xtensa_init_fix_data (struct fix *);
 292 extern void xtensa_frag_init (fragS *);
 293 extern int xtensa_force_relocation (struct fix *);
 294 extern void xtensa_frob_label (struct symbol *);
 295 extern void xtensa_end (void);
 296 extern void xtensa_post_relax_hook (void);
 297 extern void xtensa_file_arch_init (bfd *);
 298 extern void xtensa_flush_pending_output (void);
 299 extern bfd_boolean xtensa_fix_adjustable (struct fix *);
 300 extern void xtensa_symbol_new_hook (symbolS *);
 301 extern long xtensa_relax_frag (fragS *, long, int *);
 302 extern void xtensa_elf_section_change_hook (void);
 303 extern int xtensa_unrecognized_line (int);
 304 extern bfd_boolean xtensa_check_inside_bundle (void);
 305 extern void xtensa_handle_align (fragS *);
 306 extern char *xtensa_section_rename (char *);
 307
 308 #define TARGET_FORMAT                   xtensa_target_format ()
 309 #define TARGET_ARCH                     bfd_arch_xtensa
 310 #define TC_SEGMENT_INFO_TYPE            xtensa_segment_info
 311 #define TC_SYMFIELD_TYPE                struct xtensa_symfield_type
 312 #define TC_FIX_TYPE                     xtensa_fix_data
 313 #define TC_INIT_FIX_DATA(x)             xtensa_init_fix_data (x)
 314 #define TC_FRAG_TYPE                    struct xtensa_frag_type
 315 #define TC_FRAG_INIT(frag)              xtensa_frag_init (frag)
 316 #define TC_FORCE_RELOCATION(fix)        xtensa_force_relocation (fix)
 317 #define NO_PSEUDO_DOT                   xtensa_check_inside_bundle ()
 318 #define tc_canonicalize_symbol_name(s)  xtensa_section_rename (s)
 319 #define tc_canonicalize_section_name(s) xtensa_section_rename (s)
 320 #define tc_init_after_args()            xtensa_file_arch_init (stdoutput)
 321 #define tc_fix_adjustable(fix)          xtensa_fix_adjustable (fix)
 322 #define tc_frob_label(sym)              xtensa_frob_label (sym)
 323 #define tc_unrecognized_line(ch)        xtensa_unrecognized_line (ch)
 324 #define md_do_align(a,b,c,d,e)          xtensa_flush_pending_output ()
 325 #define md_elf_section_change_hook      xtensa_elf_section_change_hook
 326 #define md_end                          xtensa_end
 327 #define md_flush_pending_output()       xtensa_flush_pending_output ()
 328 #define md_operand(x)
 329 #define TEXT_SECTION_NAME               xtensa_section_rename (".text")
 330 #define DATA_SECTION_NAME               xtensa_section_rename (".data")
 331 #define BSS_SECTION_NAME                xtensa_section_rename (".bss")
 332 #define HANDLE_ALIGN(fragP)             xtensa_handle_align (fragP)
 333
 334
 335 /* The renumber_section function must be mapped over all the sections
 336    after calling xtensa_post_relax_hook.  That function is static in
 337    write.c so it cannot be called from xtensa_post_relax_hook itself.  */
 338
 339 #define md_post_relax_hook \
 340   do \
 341     { \
 342       int i = 0; \
 343       xtensa_post_relax_hook (); \
 344       bfd_map_over_sections (stdoutput, renumber_sections, &i); \
 345     } \
 346   while (0)
 347
 348
 349 /* Because xtensa relaxation can insert a new literal into the middle of
 350    fragment and thus require re-running the relaxation pass on the
 351    section, we need an explicit flag here.  We explicitly use the name
 352    "stretched" here to avoid changing the source code in write.c.  */
 353
 354 #define md_relax_frag(segment, fragP, stretch) \
 355   xtensa_relax_frag (fragP, stretch, &stretched)
 356
 357
 358 #define LOCAL_LABELS_FB 1
 359 #define WORKING_DOT_WORD 1
 360 #define DOUBLESLASH_LINE_COMMENTS
 361 #define TC_HANDLES_FX_DONE
 362 #define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
 363 #define TC_LINKRELAX_FIXUP(SEG) 0
 364 #define MD_APPLY_SYM_VALUE(FIX) 0
 365 #define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
 366
 367
 368 /* Resource reservation info functions.  */
 369
 370 /* Returns the number of copies of a particular unit.  */
 371 typedef int (*unit_num_copies_func) (void *, xtensa_funcUnit);
 372
 373 /* Returns the number of units the opcode uses.  */
 374 typedef int (*opcode_num_units_func) (void *, xtensa_opcode);
 375
 376 /* Given an opcode and an index into the opcode's funcUnit list,
 377    returns the unit used for the index.  */
 378 typedef int (*opcode_funcUnit_use_unit_func) (void *, xtensa_opcode, int);
 379
 380 /* Given an opcode and an index into the opcode's funcUnit list,
 381    returns the cycle during which the unit is used.  */
 382 typedef int (*opcode_funcUnit_use_stage_func) (void *, xtensa_opcode, int);
 383
 384 /* The above typedefs parameterize the resource_table so that the
 385    optional scheduler doesn't need its own resource reservation system.
 386
 387    For simple resource checking, which is all that happens normally,
 388    the functions will be as follows (with some wrapping to make the
 389    interface more convenient):
 390
 391    unit_num_copies_func = xtensa_funcUnit_num_copies
 392    opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
 393    opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
 394    opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage
 395
 396    Of course the optional scheduler has its own reservation table
 397    and functions.  */
 398
 399 int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
 400 int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);
 401
 402 typedef struct
 403 {
 404   void *data;
 405   int cycles;
 406   int allocated_cycles;
 407   int num_units;
 408   unit_num_copies_func unit_num_copies;
 409   opcode_num_units_func opcode_num_units;
 410   opcode_funcUnit_use_unit_func opcode_unit_use;
 411   opcode_funcUnit_use_stage_func opcode_unit_stage;
 412   char **units;
 413 } resource_table;
 414
 415 resource_table *new_resource_table
 416   (void *, int, int, unit_num_copies_func, opcode_num_units_func,
 417    opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
 418 void resize_resource_table (resource_table *, int);
 419 void clear_resource_table (resource_table *);
 420 bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
 421 void reserve_resources (resource_table *, xtensa_opcode, int);
 422 void release_resources (resource_table *, xtensa_opcode, int);
 423
 424 #endif /* TC_XTENSA */