gas/doc/c-avr.texi

   1 @c Copyright 2006, 2007, 2008, 2009, 2011
   2 @c Free Software Foundation, Inc.
   3 @c This is part of the GAS manual.
   4 @c For copying conditions, see the file as.texinfo.
   5
   6 @ifset GENERIC
   7 @page
   8 @node AVR-Dependent
   9 @chapter AVR Dependent Features
  10 @end ifset
  11
  12 @ifclear GENERIC
  13 @node Machine Dependencies
  14 @chapter AVR Dependent Features
  15 @end ifclear
  16
  17 @cindex AVR support
  18 @menu
  19 * AVR Options::              Options
  20 * AVR Syntax::               Syntax
  21 * AVR Opcodes::              Opcodes
  22 @end menu
  23
  24 @node AVR Options
  25 @section Options
  26 @cindex AVR options (none)
  27 @cindex options for AVR (none)
  28
  29 @table @code
  30
  31 @cindex @code{-mmcu=} command line option, AVR
  32 @item -mmcu=@var{mcu}
  33 Specify ATMEL AVR instruction set or MCU type.
  34
  35 Instruction set avr1 is for the minimal AVR core, not supported by the C
  36 compiler, only for assembler programs (MCU types: at90s1200,
  37 attiny11, attiny12, attiny15, attiny28).
  38
  39 Instruction set avr2 (default) is for the classic AVR core with up to
  40 8K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343,
  41 attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534,
  42 at90s8535).
  43
  44 Instruction set avr25 is for the classic AVR core with up to 8K program memory
  45 space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313,
  46 attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84,
  47 attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny461,
  48 attiny461a, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88,
  49 at86rf401, ata6289).
  50
  51 Instruction set avr3 is for the classic AVR core with up to 128K program
  52 memory space (MCU types: at43usb355, at76c711).
  53
  54 Instruction set avr31 is for the classic AVR core with exactly 128K program
  55 memory space (MCU types: atmega103, at43usb320).
  56
  57 Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP
  58 instructions (MCU types: attiny167, at90usb82, at90usb162, atmega8u2,
  59 atmega16u2, atmega32u2).
  60
  61 Instruction set avr4 is for the enhanced AVR core with up to 8K program
  62 memory space (MCU types: atmega48, atmega48a, atmega48p, atmega8, atmega88,
  63 atmega88a, atmega88p, atmega88pa, atmega8515, atmega8535, atmega8hva, at90pwm1,
  64 at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81).
  65
  66 Instruction set avr5 is for the enhanced AVR core with up to 128K program
  67 memory space (MCU types: atmega16, atmega16a, atmega161, atmega162, atmega163,
  68 atmega164a, atmega164p, atmega165, atmega165a, atmega165p, atmega168,
  69 atmega168a, atmega168p, atmega169, atmega169a, atmega169p, atmega169pa,
  70 atmega32, atmega323, atmega324a, atmega324p, atmega325, atmega325a, atmega325p,
  71 atmega325pa, atmega3250, atmega3250a, atmega3250p, atmega3250pa, atmega328,
  72 atmega328p, atmega329, atmega329a, atmega329p, atmega329pa, atmega3290,
  73 atmega3290a, atmega3290p, atmega3290pa, atmega406, atmega64, atmega640,
  74 atmega644, atmega644a, atmega644p, atmega644pa, atmega645, atmega645a,
  75 atmega645p, atmega6450, atmega6450a, atmega6450p, atmega649, atmega649a,
  76 atmega649p, atmega6490, atmega6490a, atmega6490p, atmega16hva, atmega16hva2,
  77 atmega16hvb, atmega16hvbrevb, atmega32hvb, atmega32hvbrevb, atmega64hve,
  78 at90can32, at90can64, at90pwm161, at90pwm216, at90pwm316, atmega32c1,
  79 atmega64c1, atmega16m1, atmega32m1, atmega64m1, atmega16u4, atmega32u4,
  80 atmega32u6, at90usb646, at90usb647, at94k, at90scr100).
  81
  82 Instruction set avr51 is for the enhanced AVR core with exactly 128K program
  83 memory space (MCU types: atmega128, atmega1280, atmega1281, atmega1284p,
  84 atmega128rfa1, at90can128, at90usb1286, at90usb1287, m3000).
  85
  86 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
  87 atmega2560, atmega2561).
  88
  89 Instruction set avrxmega2 is for the XMEGA AVR core with 8K to 64K program
  90 memory space and less than 64K data space (MCU types: atxmega16a4, atxmega16d4,
  91 atxmega16x1, atxmega32a4, atxmega32d4, atxmega32x1).
  92
  93 Instruction set avrxmega3 is for the XMEGA AVR core with 8K to 64K program
  94 memory space and greater than 64K data space (MCU types: none).
  95
  96 Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K program
  97 memory space and less than 64K data space (MCU types: atxmega64a3, atxmega64d3).
  98
  99 Instruction set avrxmega5 is for the XMEGA AVR core with up to 64K program
 100 memory space and greater than 64K data space (MCU types: atxmega64a1,
 101 atxmega64a1u).
 102
 103 Instruction set avrxmega6 is for the XMEGA AVR core with up to 256K program
 104 memory space and less than 64K data space (MCU types: atxmega128a3,
 105 atxmega128d3, atxmega192a3, atxmega128b1, atxmega192d3, atxmega256a3,
 106 atxmega256a3b, atxmega256a3bu, atxmega192d3).
 107
 108 Instruction set avrxmega7 is for the XMEGA AVR core with up to 256K program
 109 memory space and greater than 64K data space (MCU types: atxmega128a1,
 110 atxmega128a1u).
 111
 112 @cindex @code{-mall-opcodes} command line option, AVR
 113 @item -mall-opcodes
 114 Accept all AVR opcodes, even if not supported by @code{-mmcu}.
 115
 116 @cindex @code{-mno-skip-bug} command line option, AVR
 117 @item -mno-skip-bug
 118 This option disable warnings for skipping two-word instructions.
 119
 120 @cindex @code{-mno-wrap} command line option, AVR
 121 @item -mno-wrap
 122 This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
 123
 124 @end table
 125
 126
 127 @node AVR Syntax
 128 @section Syntax
 129 @menu
 130 * AVR-Chars::                Special Characters
 131 * AVR-Regs::                 Register Names
 132 * AVR-Modifiers::            Relocatable Expression Modifiers
 133 @end menu
 134
 135 @node AVR-Chars
 136 @subsection Special Characters
 137
 138 @cindex line comment character, AVR
 139 @cindex AVR line comment character
 140
 141 The presence of a @samp{;} anywhere on a line indicates the start of a
 142 comment that extends to the end of that line.
 143
 144 If a @samp{#} appears as the first character of a line, the whole line
 145 is treated as a comment, but in this case the line can also be a
 146 logical line number directive (@pxref{Comments}) or a preprocessor
 147 control command (@pxref{Preprocessing}).
 148
 149 @cindex line separator, AVR
 150 @cindex statement separator, AVR
 151 @cindex AVR line separator
 152
 153 The @samp{$} character can be used instead of a newline to separate
 154 statements.
 155
 156 @node AVR-Regs
 157 @subsection Register Names
 158
 159 @cindex AVR register names
 160 @cindex register names, AVR
 161
 162 The AVR has 32 x 8-bit general purpose working registers @samp{r0},
 163 @samp{r1}, ... @samp{r31}.
 164 Six of the 32 registers can be used as three 16-bit indirect address
 165 register pointers for Data Space addressing. One of the these address
 166 pointers can also be used as an address pointer for look up tables in
 167 Flash program memory. These added function registers are the 16-bit
 168 @samp{X}, @samp{Y} and @samp{Z} - registers.
 169
 170 @smallexample
 171 X = @r{r26:r27}
 172 Y = @r{r28:r29}
 173 Z = @r{r30:r31}
 174 @end smallexample
 175
 176 @node AVR-Modifiers
 177 @subsection Relocatable Expression Modifiers
 178
 179 @cindex AVR modifiers
 180 @cindex syntax, AVR
 181
 182 The assembler supports several modifiers when using relocatable addresses
 183 in AVR instruction operands.  The general syntax is the following:
 184
 185 @smallexample
 186 modifier(relocatable-expression)
 187 @end smallexample
 188
 189 @table @code
 190 @cindex symbol modifiers
 191
 192 @item lo8
 193
 194 This modifier allows you to use bits 0 through 7 of
 195 an address expression as 8 bit relocatable expression.
 196
 197 @item hi8
 198
 199 This modifier allows you to use bits 7 through 15 of an address expression
 200 as 8 bit relocatable expression.  This is useful with, for example, the
 201 AVR @samp{ldi} instruction and @samp{lo8} modifier.
 202
 203 For example
 204
 205 @smallexample
 206 ldi r26, lo8(sym+10)
 207 ldi r27, hi8(sym+10)
 208 @end smallexample
 209
 210 @item hh8
 211
 212 This modifier allows you to use bits 16 through 23 of
 213 an address expression as 8 bit relocatable expression.
 214 Also, can be useful for loading 32 bit constants.
 215
 216 @item hlo8
 217
 218 Synonym of @samp{hh8}.
 219
 220 @item hhi8
 221
 222 This modifier allows you to use bits 24 through 31 of
 223 an expression as 8 bit expression. This is useful with, for example, the
 224 AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
 225 @samp{hhi8}, modifier.
 226
 227 For example
 228
 229 @smallexample
 230 ldi r26, lo8(285774925)
 231 ldi r27, hi8(285774925)
 232 ldi r28, hlo8(285774925)
 233 ldi r29, hhi8(285774925)
 234 ; r29,r28,r27,r26 = 285774925
 235 @end smallexample
 236
 237 @item pm_lo8
 238
 239 This modifier allows you to use bits 0 through 7 of
 240 an address expression as 8 bit relocatable expression.
 241 This modifier useful for addressing data or code from
 242 Flash/Program memory. The using of @samp{pm_lo8} similar
 243 to @samp{lo8}.
 244
 245 @item pm_hi8
 246
 247 This modifier allows you to use bits 8 through 15 of
 248 an address expression as 8 bit relocatable expression.
 249 This modifier useful for addressing data or code from
 250 Flash/Program memory.
 251
 252 @item pm_hh8
 253
 254 This modifier allows you to use bits 15 through 23 of
 255 an address expression as 8 bit relocatable expression.
 256 This modifier useful for addressing data or code from
 257 Flash/Program memory.
 258
 259 @end table
 260
 261 @node AVR Opcodes
 262 @section Opcodes
 263
 264 @cindex AVR opcode summary
 265 @cindex opcode summary, AVR
 266 @cindex mnemonics, AVR
 267 @cindex instruction summary, AVR
 268 For detailed information on the AVR machine instruction set, see
 269 @url{www.atmel.com/products/AVR}.
 270
 271 @code{@value{AS}} implements all the standard AVR opcodes.
 272 The following table summarizes the AVR opcodes, and their arguments.
 273
 274 @smallexample
 275 @i{Legend:}
 276    r   @r{any register}
 277    d   @r{`ldi' register (r16-r31)}
 278    v   @r{`movw' even register (r0, r2, ..., r28, r30)}
 279    a   @r{`fmul' register (r16-r23)}
 280    w   @r{`adiw' register (r24,r26,r28,r30)}
 281    e   @r{pointer registers (X,Y,Z)}
 282    b   @r{base pointer register and displacement ([YZ]+disp)}
 283    z   @r{Z pointer register (for [e]lpm Rd,Z[+])}
 284    M   @r{immediate value from 0 to 255}
 285    n   @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
 286    s   @r{immediate value from 0 to 7}
 287    P   @r{Port address value from 0 to 63. (in, out)}
 288    p   @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
 289    K   @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
 290    i   @r{immediate value}
 291    l   @r{signed pc relative offset from -64 to 63}
 292    L   @r{signed pc relative offset from -2048 to 2047}
 293    h   @r{absolute code address (call, jmp)}
 294    S   @r{immediate value from 0 to 7 (S = s << 4)}
 295    ?   @r{use this opcode entry if no parameters, else use next opcode entry}
 296
 297 1001010010001000   clc
 298 1001010011011000   clh
 299 1001010011111000   cli
 300 1001010010101000   cln
 301 1001010011001000   cls
 302 1001010011101000   clt
 303 1001010010111000   clv
 304 1001010010011000   clz
 305 1001010000001000   sec
 306 1001010001011000   seh
 307 1001010001111000   sei
 308 1001010000101000   sen
 309 1001010001001000   ses
 310 1001010001101000   set
 311 1001010000111000   sev
 312 1001010000011000   sez
 313 100101001SSS1000   bclr    S
 314 100101000SSS1000   bset    S
 315 1001010100001001   icall
 316 1001010000001001   ijmp
 317 1001010111001000   lpm     ?
 318 1001000ddddd010+   lpm     r,z
 319 1001010111011000   elpm    ?
 320 1001000ddddd011+   elpm    r,z
 321 0000000000000000   nop
 322 1001010100001000   ret
 323 1001010100011000   reti
 324 1001010110001000   sleep
 325 1001010110011000   break
 326 1001010110101000   wdr
 327 1001010111101000   spm
 328 000111rdddddrrrr   adc     r,r
 329 000011rdddddrrrr   add     r,r
 330 001000rdddddrrrr   and     r,r
 331 000101rdddddrrrr   cp      r,r
 332 000001rdddddrrrr   cpc     r,r
 333 000100rdddddrrrr   cpse    r,r
 334 001001rdddddrrrr   eor     r,r
 335 001011rdddddrrrr   mov     r,r
 336 100111rdddddrrrr   mul     r,r
 337 001010rdddddrrrr   or      r,r
 338 000010rdddddrrrr   sbc     r,r
 339 000110rdddddrrrr   sub     r,r
 340 001001rdddddrrrr   clr     r
 341 000011rdddddrrrr   lsl     r
 342 000111rdddddrrrr   rol     r
 343 001000rdddddrrrr   tst     r
 344 0111KKKKddddKKKK   andi    d,M
 345 0111KKKKddddKKKK   cbr     d,n
 346 1110KKKKddddKKKK   ldi     d,M
 347 11101111dddd1111   ser     d
 348 0110KKKKddddKKKK   ori     d,M
 349 0110KKKKddddKKKK   sbr     d,M
 350 0011KKKKddddKKKK   cpi     d,M
 351 0100KKKKddddKKKK   sbci    d,M
 352 0101KKKKddddKKKK   subi    d,M
 353 1111110rrrrr0sss   sbrc    r,s
 354 1111111rrrrr0sss   sbrs    r,s
 355 1111100ddddd0sss   bld     r,s
 356 1111101ddddd0sss   bst     r,s
 357 10110PPdddddPPPP   in      r,P
 358 10111PPrrrrrPPPP   out     P,r
 359 10010110KKddKKKK   adiw    w,K
 360 10010111KKddKKKK   sbiw    w,K
 361 10011000pppppsss   cbi     p,s
 362 10011010pppppsss   sbi     p,s
 363 10011001pppppsss   sbic    p,s
 364 10011011pppppsss   sbis    p,s
 365 111101lllllll000   brcc    l
 366 111100lllllll000   brcs    l
 367 111100lllllll001   breq    l
 368 111101lllllll100   brge    l
 369 111101lllllll101   brhc    l
 370 111100lllllll101   brhs    l
 371 111101lllllll111   brid    l
 372 111100lllllll111   brie    l
 373 111100lllllll000   brlo    l
 374 111100lllllll100   brlt    l
 375 111100lllllll010   brmi    l
 376 111101lllllll001   brne    l
 377 111101lllllll010   brpl    l
 378 111101lllllll000   brsh    l
 379 111101lllllll110   brtc    l
 380 111100lllllll110   brts    l
 381 111101lllllll011   brvc    l
 382 111100lllllll011   brvs    l
 383 111101lllllllsss   brbc    s,l
 384 111100lllllllsss   brbs    s,l
 385 1101LLLLLLLLLLLL   rcall   L
 386 1100LLLLLLLLLLLL   rjmp    L
 387 1001010hhhhh111h   call    h
 388 1001010hhhhh110h   jmp     h
 389 1001010rrrrr0101   asr     r
 390 1001010rrrrr0000   com     r
 391 1001010rrrrr1010   dec     r
 392 1001010rrrrr0011   inc     r
 393 1001010rrrrr0110   lsr     r
 394 1001010rrrrr0001   neg     r
 395 1001000rrrrr1111   pop     r
 396 1001001rrrrr1111   push    r
 397 1001010rrrrr0111   ror     r
 398 1001010rrrrr0010   swap    r
 399 00000001ddddrrrr   movw    v,v
 400 00000010ddddrrrr   muls    d,d
 401 000000110ddd0rrr   mulsu   a,a
 402 000000110ddd1rrr   fmul    a,a
 403 000000111ddd0rrr   fmuls   a,a
 404 000000111ddd1rrr   fmulsu  a,a
 405 1001001ddddd0000   sts     i,r
 406 1001000ddddd0000   lds     r,i
 407 10o0oo0dddddbooo   ldd     r,b
 408 100!000dddddee-+   ld      r,e
 409 10o0oo1rrrrrbooo   std     b,r
 410 100!001rrrrree-+   st      e,r
 411 1001010100011001   eicall
 412 1001010000011001   eijmp
 413 @end smallexample