1 /* Get CPU type and Features for x86 processors.
2 Copyright (C) 2012-2024 Free Software Foundation, Inc.
3 Contributed by Sriraman Tallam (tmsriram@google.com)
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 Under Section 7 of GPL version 3, you are granted additional
18 permissions described in the GCC Runtime Library Exception, version
19 3.1, as published by the Free Software Foundation.
21 You should have received a copy of the GNU General Public License and
22 a copy of the GCC Runtime Library Exception along with this program;
23 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
24 <http://www.gnu.org/licenses/>. */
26 /* Processor Vendor and Models. */
38 /* Maximum values must be at the end of this enum. */
40 BUILTIN_VENDOR_MAX
= VENDOR_OTHER
43 /* Any new types or subtypes have to be inserted at the end. */
65 INTEL_CLEARWATERFOREST
,
67 BUILTIN_CPU_TYPE_MAX
= CPU_TYPE_MAX
70 enum processor_subtypes
72 INTEL_COREI7_NEHALEM
= 1,
73 INTEL_COREI7_WESTMERE
,
74 INTEL_COREI7_SANDYBRIDGE
,
83 INTEL_COREI7_IVYBRIDGE
,
85 INTEL_COREI7_BROADWELL
,
87 INTEL_COREI7_SKYLAKE_AVX512
,
88 INTEL_COREI7_CANNONLAKE
,
89 INTEL_COREI7_ICELAKE_CLIENT
,
90 INTEL_COREI7_ICELAKE_SERVER
,
92 INTEL_COREI7_CASCADELAKE
,
93 INTEL_COREI7_TIGERLAKE
,
94 INTEL_COREI7_COOPERLAKE
,
95 INTEL_COREI7_SAPPHIRERAPIDS
,
96 INTEL_COREI7_ALDERLAKE
,
98 INTEL_COREI7_ROCKETLAKE
,
99 ZHAOXIN_FAM7H_LUJIAZUI
,
101 INTEL_COREI7_GRANITERAPIDS
,
102 INTEL_COREI7_GRANITERAPIDS_D
,
103 INTEL_COREI7_ARROWLAKE
,
104 INTEL_COREI7_ARROWLAKE_S
,
105 INTEL_COREI7_PANTHERLAKE
,
106 ZHAOXIN_FAM7H_YONGFENG
,
110 /* Priority of i386 features, greater value is higher priority. This is
111 used to decide the order in which function dispatch must happen. For
112 instance, a version specialized for SSE4.2 should be checked for dispatch
113 before a version for SSE3, as SSE4.2 implies SSE3. */
114 enum feature_priority
152 /* ISA Features supported. New features have to be inserted at the end. */
154 enum processor_features
184 FEATURE_AVX5124VNNIW
,
185 FEATURE_AVX5124FMAPS
,
186 FEATURE_AVX512VPOPCNTDQ
,
191 FEATURE_AVX512BITALG
,
193 FEATURE_AVX512VP2INTERSECT
,
251 FEATURE_X86_64_BASELINE
,
257 FEATURE_AVXNECONVERT
,
263 FEATURE_AVXVNNIINT16
,
274 /* Size of __cpu_features2 array in libgcc/config/i386/cpuinfo.c. */
275 #define SIZE_OF_CPU_FEATURES ((CPU_FEATURE_MAX - 1) / 32)
277 /* These are the values for vendor types, cpu types and subtypes. Cpu
278 types and subtypes should be subtracted by the corresponding start
281 #define M_CPU_TYPE_START (BUILTIN_VENDOR_MAX)
282 #define M_CPU_SUBTYPE_START \
283 (M_CPU_TYPE_START + BUILTIN_CPU_TYPE_MAX)
284 #define M_VENDOR(a) (a)
285 #define M_CPU_TYPE(a) (M_CPU_TYPE_START + a)
286 #define M_CPU_SUBTYPE(a) (M_CPU_SUBTYPE_START + a)