1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2004, 2005, 2007 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* Target CPU builtins. */
23 #define TARGET_CPU_CPP_BUILTINS() \
26 builtin_define ("__alpha"); \
27 builtin_define ("__alpha__"); \
28 builtin_assert ("cpu=alpha"); \
29 builtin_assert ("machine=alpha"); \
32 builtin_define ("__alpha_cix__"); \
33 builtin_assert ("cpu=cix"); \
37 builtin_define ("__alpha_fix__"); \
38 builtin_assert ("cpu=fix"); \
42 builtin_define ("__alpha_bwx__"); \
43 builtin_assert ("cpu=bwx"); \
47 builtin_define ("__alpha_max__"); \
48 builtin_assert ("cpu=max"); \
50 if (alpha_cpu == PROCESSOR_EV6) \
52 builtin_define ("__alpha_ev6__"); \
53 builtin_assert ("cpu=ev6"); \
55 else if (alpha_cpu == PROCESSOR_EV5) \
57 builtin_define ("__alpha_ev5__"); \
58 builtin_assert ("cpu=ev5"); \
60 else /* Presumably ev4. */ \
62 builtin_define ("__alpha_ev4__"); \
63 builtin_assert ("cpu=ev4"); \
65 if (TARGET_IEEE || TARGET_IEEE_WITH_INEXACT) \
66 builtin_define ("_IEEE_FP"); \
67 if (TARGET_IEEE_WITH_INEXACT) \
68 builtin_define ("_IEEE_FP_INEXACT"); \
69 if (TARGET_LONG_DOUBLE_128) \
70 builtin_define ("__LONG_DOUBLE_128__"); \
72 /* Macros dependent on the C dialect. */ \
73 SUBTARGET_LANGUAGE_CPP_BUILTINS(); \
76 #ifndef SUBTARGET_LANGUAGE_CPP_BUILTINS
77 #define SUBTARGET_LANGUAGE_CPP_BUILTINS() \
80 if (preprocessing_asm_p ()) \
81 builtin_define_std ("LANGUAGE_ASSEMBLY"); \
82 else if (c_dialect_cxx ()) \
84 builtin_define ("__LANGUAGE_C_PLUS_PLUS"); \
85 builtin_define ("__LANGUAGE_C_PLUS_PLUS__"); \
88 builtin_define_std ("LANGUAGE_C"); \
89 if (c_dialect_objc ()) \
91 builtin_define ("__LANGUAGE_OBJECTIVE_C"); \
92 builtin_define ("__LANGUAGE_OBJECTIVE_C__"); \
98 #define WORD_SWITCH_TAKES_ARG(STR) \
99 (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR))
101 /* Print subsidiary information on the compiler version in use. */
102 #define TARGET_VERSION
104 /* Run-time compilation parameters selecting different hardware subsets. */
106 /* Which processor to schedule for. The cpu attribute defines a list that
107 mirrors this list, so changes to alpha.md must be made at the same time. */
111 PROCESSOR_EV4
, /* 2106[46]{a,} */
112 PROCESSOR_EV5
, /* 21164{a,pc,} */
113 PROCESSOR_EV6
, /* 21264 */
117 extern enum processor_type alpha_cpu
;
118 extern enum processor_type alpha_tune
;
120 enum alpha_trap_precision
122 ALPHA_TP_PROG
, /* No precision (default). */
123 ALPHA_TP_FUNC
, /* Trap contained within originating function. */
124 ALPHA_TP_INSN
/* Instruction accuracy and code is resumption safe. */
127 enum alpha_fp_rounding_mode
129 ALPHA_FPRM_NORM
, /* Normal rounding mode. */
130 ALPHA_FPRM_MINF
, /* Round towards minus-infinity. */
131 ALPHA_FPRM_CHOP
, /* Chopped rounding mode (towards 0). */
132 ALPHA_FPRM_DYN
/* Dynamic rounding mode. */
135 enum alpha_fp_trap_mode
137 ALPHA_FPTM_N
, /* Normal trap mode. */
138 ALPHA_FPTM_U
, /* Underflow traps enabled. */
139 ALPHA_FPTM_SU
, /* Software completion, w/underflow traps */
140 ALPHA_FPTM_SUI
/* Software completion, w/underflow & inexact traps */
143 extern int target_flags
;
145 extern enum alpha_trap_precision alpha_tp
;
146 extern enum alpha_fp_rounding_mode alpha_fprm
;
147 extern enum alpha_fp_trap_mode alpha_fptm
;
149 /* Invert the easy way to make options work. */
150 #define TARGET_FP (!TARGET_SOFT_FP)
152 /* These are for target os support and cannot be changed at runtime. */
153 #define TARGET_ABI_WINDOWS_NT 0
154 #define TARGET_ABI_OPEN_VMS 0
155 #define TARGET_ABI_UNICOSMK 0
156 #define TARGET_ABI_OSF (!TARGET_ABI_WINDOWS_NT \
157 && !TARGET_ABI_OPEN_VMS \
158 && !TARGET_ABI_UNICOSMK)
160 #ifndef TARGET_AS_CAN_SUBTRACT_LABELS
161 #define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS
163 #ifndef TARGET_AS_SLASH_BEFORE_SUFFIX
164 #define TARGET_AS_SLASH_BEFORE_SUFFIX TARGET_GAS
166 #ifndef TARGET_CAN_FAULT_IN_PROLOGUE
167 #define TARGET_CAN_FAULT_IN_PROLOGUE 0
169 #ifndef TARGET_HAS_XFLOATING_LIBS
170 #define TARGET_HAS_XFLOATING_LIBS TARGET_LONG_DOUBLE_128
172 #ifndef TARGET_PROFILING_NEEDS_GP
173 #define TARGET_PROFILING_NEEDS_GP 0
175 #ifndef TARGET_LD_BUGGY_LDGP
176 #define TARGET_LD_BUGGY_LDGP 0
178 #ifndef TARGET_FIXUP_EV5_PREFETCH
179 #define TARGET_FIXUP_EV5_PREFETCH 0
182 #define HAVE_AS_TLS 0
185 #define TARGET_DEFAULT MASK_FPREGS
187 #ifndef TARGET_CPU_DEFAULT
188 #define TARGET_CPU_DEFAULT 0
191 #ifndef TARGET_DEFAULT_EXPLICIT_RELOCS
192 #ifdef HAVE_AS_EXPLICIT_RELOCS
193 #define TARGET_DEFAULT_EXPLICIT_RELOCS MASK_EXPLICIT_RELOCS
194 #define TARGET_SUPPORT_ARCH 1
196 #define TARGET_DEFAULT_EXPLICIT_RELOCS 0
200 #ifndef TARGET_SUPPORT_ARCH
201 #define TARGET_SUPPORT_ARCH 0
204 /* Support for a compile-time default CPU, et cetera. The rules are:
205 --with-cpu is ignored if -mcpu is specified.
206 --with-tune is ignored if -mtune is specified. */
207 #define OPTION_DEFAULT_SPECS \
208 {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \
209 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }
211 /* Sometimes certain combinations of command options do not make sense
212 on a particular target machine. You can define a macro
213 `OVERRIDE_OPTIONS' to take account of this. This macro, if
214 defined, is executed once just after all the command options have
217 On the Alpha, it is used to translate target-option strings into
220 #define OVERRIDE_OPTIONS override_options ()
223 /* Define this macro to change register usage conditional on target flags.
225 On the Alpha, we use this to disable the floating-point registers when
228 #define CONDITIONAL_REGISTER_USAGE \
231 if (! TARGET_FPREGS) \
232 for (i = 32; i < 63; i++) \
233 fixed_regs[i] = call_used_regs[i] = 1; \
237 /* Show we can debug even without a frame pointer. */
238 #define CAN_DEBUG_WITHOUT_FP
240 /* target machine storage layout */
242 /* Define the size of `int'. The default is the same as the word size. */
243 #define INT_TYPE_SIZE 32
245 /* Define the size of `long long'. The default is the twice the word size. */
246 #define LONG_LONG_TYPE_SIZE 64
248 /* The two floating-point formats we support are S-floating, which is
249 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
250 and `long double' are T. */
252 #define FLOAT_TYPE_SIZE 32
253 #define DOUBLE_TYPE_SIZE 64
254 #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
256 /* Define this to set long double type size to use in libgcc2.c, which can
257 not depend on target_flags. */
258 #ifdef __LONG_DOUBLE_128__
259 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
261 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
264 /* Work around target_flags dependency in ada/targtyps.c. */
265 #define WIDEST_HARDWARE_FP_SIZE 64
267 #define WCHAR_TYPE "unsigned int"
268 #define WCHAR_TYPE_SIZE 32
270 /* Define this macro if it is advisable to hold scalars in registers
271 in a wider mode than that declared by the program. In such cases,
272 the value is constrained to be within the bounds of the declared
273 type, but kept valid in the wider mode. The signedness of the
274 extension may differ from that of the type.
276 For Alpha, we always store objects in a full register. 32-bit integers
277 are always sign-extended, but smaller objects retain their signedness.
279 Note that small vector types can get mapped onto integer modes at the
280 whim of not appearing in alpha-modes.def. We never promoted these
281 values before; don't do so now that we've trimmed the set of modes to
282 those actually implemented in the backend. */
284 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
285 if (GET_MODE_CLASS (MODE) == MODE_INT \
286 && (TYPE == NULL || TREE_CODE (TYPE) != VECTOR_TYPE) \
287 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
289 if ((MODE) == SImode) \
294 /* Define this if most significant bit is lowest numbered
295 in instructions that operate on numbered bit-fields.
297 There are no such instructions on the Alpha, but the documentation
299 #define BITS_BIG_ENDIAN 0
301 /* Define this if most significant byte of a word is the lowest numbered.
302 This is false on the Alpha. */
303 #define BYTES_BIG_ENDIAN 0
305 /* Define this if most significant word of a multiword number is lowest
308 For Alpha we can decide arbitrarily since there are no machine instructions
309 for them. Might as well be consistent with bytes. */
310 #define WORDS_BIG_ENDIAN 0
312 /* Width of a word, in units (bytes). */
313 #define UNITS_PER_WORD 8
315 /* Width in bits of a pointer.
316 See also the macro `Pmode' defined below. */
317 #define POINTER_SIZE 64
319 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
320 #define PARM_BOUNDARY 64
322 /* Boundary (in *bits*) on which stack pointer should be aligned. */
323 #define STACK_BOUNDARY 128
325 /* Allocation boundary (in *bits*) for the code of a function. */
326 #define FUNCTION_BOUNDARY 32
328 /* Alignment of field after `int : 0' in a structure. */
329 #define EMPTY_FIELD_BOUNDARY 64
331 /* Every structure's size must be a multiple of this. */
332 #define STRUCTURE_SIZE_BOUNDARY 8
334 /* A bit-field declared as `int' forces `int' alignment for the struct. */
335 #define PCC_BITFIELD_TYPE_MATTERS 1
337 /* No data type wants to be aligned rounder than this. */
338 #define BIGGEST_ALIGNMENT 128
340 /* For atomic access to objects, must have at least 32-bit alignment
341 unless the machine has byte operations. */
342 #define MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32))
344 /* Align all constants and variables to at least a word boundary so
345 we can pick up pieces of them faster. */
346 /* ??? Only if block-move stuff knows about different source/destination
349 #define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
350 #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
353 /* Set this nonzero if move instructions will actually fail to work
354 when given unaligned data.
356 Since we get an error message when we do one, call them invalid. */
358 #define STRICT_ALIGNMENT 1
360 /* Set this nonzero if unaligned move instructions are extremely slow.
362 On the Alpha, they trap. */
364 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
366 /* Standard register usage. */
368 /* Number of actual hardware registers.
369 The hardware registers are assigned numbers for the compiler
370 from 0 to just below FIRST_PSEUDO_REGISTER.
371 All registers that the compiler knows about must be given numbers,
372 even those that are not normally considered general registers.
374 We define all 32 integer registers, even though $31 is always zero,
375 and all 32 floating-point registers, even though $f31 is also
376 always zero. We do not bother defining the FP status register and
377 there are no other registers.
379 Since $31 is always zero, we will use register number 31 as the
380 argument pointer. It will never appear in the generated code
381 because we will always be eliminating it in favor of the stack
382 pointer or hardware frame pointer.
384 Likewise, we use $f31 for the frame pointer, which will always
385 be eliminated in favor of the hardware frame pointer or the
388 #define FIRST_PSEUDO_REGISTER 64
390 /* 1 for registers that have pervasive standard uses
391 and are not available for the register allocator. */
393 #define FIXED_REGISTERS \
394 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
395 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
396 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
397 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
399 /* 1 for registers not available across function calls.
400 These must include the FIXED_REGISTERS and also any
401 registers that can be used without being saved.
402 The latter must include the registers where values are returned
403 and the register where structure-value addresses are passed.
404 Aside from that, you can include as many other registers as you like. */
405 #define CALL_USED_REGISTERS \
406 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
407 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
408 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
409 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
411 /* List the order in which to allocate registers. Each register must be
412 listed once, even those in FIXED_REGISTERS. */
414 #define REG_ALLOC_ORDER { \
415 1, 2, 3, 4, 5, 6, 7, 8, /* nonsaved integer registers */ \
416 22, 23, 24, 25, 28, /* likewise */ \
417 0, /* likewise, but return value */ \
418 21, 20, 19, 18, 17, 16, /* likewise, but input args */ \
419 27, /* likewise, but OSF procedure value */ \
421 42, 43, 44, 45, 46, 47, /* nonsaved floating-point registers */ \
422 54, 55, 56, 57, 58, 59, /* likewise */ \
423 60, 61, 62, /* likewise */ \
424 32, 33, /* likewise, but return values */ \
425 53, 52, 51, 50, 49, 48, /* likewise, but input args */ \
427 9, 10, 11, 12, 13, 14, /* saved integer registers */ \
428 26, /* return address */ \
429 15, /* hard frame pointer */ \
431 34, 35, 36, 37, 38, 39, /* saved floating-point registers */ \
432 40, 41, /* likewise */ \
434 29, 30, 31, 63 /* gp, sp, ap, sfp */ \
437 /* Return number of consecutive hard regs needed starting at reg REGNO
438 to hold something of mode MODE.
439 This is ordinarily the length in words of a value of mode MODE
440 but can be less for certain modes in special long registers. */
442 #define HARD_REGNO_NREGS(REGNO, MODE) \
443 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
445 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
446 On Alpha, the integer registers can hold any mode. The floating-point
447 registers can hold 64-bit integers as well, but not smaller values. */
449 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
450 ((REGNO) >= 32 && (REGNO) <= 62 \
451 ? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode \
452 || (MODE) == SCmode || (MODE) == DCmode \
455 /* A C expression that is nonzero if a value of mode
456 MODE1 is accessible in mode MODE2 without copying.
458 This asymmetric test is true when MODE1 could be put
459 in an FP register but MODE2 could not. */
461 #define MODES_TIEABLE_P(MODE1, MODE2) \
462 (HARD_REGNO_MODE_OK (32, (MODE1)) \
463 ? HARD_REGNO_MODE_OK (32, (MODE2)) \
466 /* Specify the registers used for certain standard purposes.
467 The values of these macros are register numbers. */
469 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
470 /* #define PC_REGNUM */
472 /* Register to use for pushing function arguments. */
473 #define STACK_POINTER_REGNUM 30
475 /* Base register for access to local variables of the function. */
476 #define HARD_FRAME_POINTER_REGNUM 15
478 /* Value should be nonzero if functions must have frame pointers.
479 Zero means the frame pointer need not be set up (and parms
480 may be accessed via the stack pointer) in functions that seem suitable.
481 This is computed in `reload', in reload1.c. */
482 #define FRAME_POINTER_REQUIRED 0
484 /* Base register for access to arguments of the function. */
485 #define ARG_POINTER_REGNUM 31
487 /* Base register for access to local variables of function. */
488 #define FRAME_POINTER_REGNUM 63
490 /* Register in which static-chain is passed to a function.
492 For the Alpha, this is based on an example; the calling sequence
493 doesn't seem to specify this. */
494 #define STATIC_CHAIN_REGNUM 1
496 /* The register number of the register used to address a table of
497 static data addresses in memory. */
498 #define PIC_OFFSET_TABLE_REGNUM 29
500 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM'
501 is clobbered by calls. */
502 /* ??? It is and it isn't. It's required to be valid for a given
503 function when the function returns. It isn't clobbered by
504 current_file functions. Moreover, we do not expose the ldgp
505 until after reload, so we're probably safe. */
506 /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */
508 /* Define the classes of registers for register constraints in the
509 machine description. Also define ranges of constants.
511 One of the classes must always be named ALL_REGS and include all hard regs.
512 If there is more than one class, another class must be named NO_REGS
513 and contain no registers.
515 The name GENERAL_REGS must be the name of a class (or an alias for
516 another name such as ALL_REGS). This is the class of registers
517 that is allowed by "g" or "r" in a register constraint.
518 Also, registers outside this class are allocated only when
519 instructions express preferences for them.
521 The classes must be numbered in nondecreasing order; that is,
522 a larger-numbered class must never be contained completely
523 in a smaller-numbered class.
525 For any two classes, it is very desirable that there be another
526 class that represents their union. */
529 NO_REGS
, R0_REG
, R24_REG
, R25_REG
, R27_REG
,
530 GENERAL_REGS
, FLOAT_REGS
, ALL_REGS
,
534 #define N_REG_CLASSES (int) LIM_REG_CLASSES
536 /* Give names of register classes as strings for dump file. */
538 #define REG_CLASS_NAMES \
539 {"NO_REGS", "R0_REG", "R24_REG", "R25_REG", "R27_REG", \
540 "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
542 /* Define which registers fit in which classes.
543 This is an initializer for a vector of HARD_REG_SET
544 of length N_REG_CLASSES. */
546 #define REG_CLASS_CONTENTS \
547 { {0x00000000, 0x00000000}, /* NO_REGS */ \
548 {0x00000001, 0x00000000}, /* R0_REG */ \
549 {0x01000000, 0x00000000}, /* R24_REG */ \
550 {0x02000000, 0x00000000}, /* R25_REG */ \
551 {0x08000000, 0x00000000}, /* R27_REG */ \
552 {0xffffffff, 0x80000000}, /* GENERAL_REGS */ \
553 {0x00000000, 0x7fffffff}, /* FLOAT_REGS */ \
554 {0xffffffff, 0xffffffff} }
556 /* The same information, inverted:
557 Return the class number of the smallest class containing
558 reg number REGNO. This could be a conditional expression
559 or could index an array. */
561 #define REGNO_REG_CLASS(REGNO) \
562 ((REGNO) == 0 ? R0_REG \
563 : (REGNO) == 24 ? R24_REG \
564 : (REGNO) == 25 ? R25_REG \
565 : (REGNO) == 27 ? R27_REG \
566 : (REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS \
569 /* The class value for index registers, and the one for base regs. */
570 #define INDEX_REG_CLASS NO_REGS
571 #define BASE_REG_CLASS GENERAL_REGS
573 /* Given an rtx X being reloaded into a reg required to be
574 in class CLASS, return the class of reg to actually use.
575 In general this is just CLASS; but on some machines
576 in some cases it is preferable to use a more restrictive class. */
578 #define PREFERRED_RELOAD_CLASS alpha_preferred_reload_class
580 /* If we are copying between general and FP registers, we need a memory
581 location unless the FIX extension is available. */
583 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
584 (! TARGET_FIX && (((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \
585 || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)))
587 /* Specify the mode to be used for memory when a secondary memory
588 location is needed. If MODE is floating-point, use it. Otherwise,
589 widen to a word like the default. This is needed because we always
590 store integers in FP registers in quadword format. This whole
591 area is very tricky! */
592 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
593 (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \
594 : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \
595 : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0))
597 /* Return the maximum number of consecutive registers
598 needed to represent mode MODE in a register of class CLASS. */
600 #define CLASS_MAX_NREGS(CLASS, MODE) \
601 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
603 /* Return the class of registers that cannot change mode from FROM to TO. */
605 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
606 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
607 ? reg_classes_intersect_p (FLOAT_REGS, CLASS) : 0)
609 /* Define the cost of moving between registers of various classes. Moving
610 between FLOAT_REGS and anything else except float regs is expensive.
611 In fact, we make it quite expensive because we really don't want to
612 do these moves unless it is clearly worth it. Optimizations may
613 reduce the impact of not being able to allocate a pseudo to a
616 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
617 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 \
618 : TARGET_FIX ? ((CLASS1) == FLOAT_REGS ? 6 : 8) \
619 : 4+2*alpha_memory_latency)
621 /* A C expressions returning the cost of moving data of MODE from a register to
624 On the Alpha, bump this up a bit. */
626 extern int alpha_memory_latency
;
627 #define MEMORY_MOVE_COST(MODE,CLASS,IN) (2*alpha_memory_latency)
629 /* Provide the cost of a branch. Exact meaning under development. */
630 #define BRANCH_COST 5
632 /* Stack layout; function entry, exit and calling. */
634 /* Define this if pushing a word on the stack
635 makes the stack pointer a smaller address. */
636 #define STACK_GROWS_DOWNWARD
638 /* Define this to nonzero if the nominal address of the stack frame
639 is at the high-address end of the local variables;
640 that is, each additional local variable allocated
641 goes at a more negative offset in the frame. */
642 /* #define FRAME_GROWS_DOWNWARD 0 */
644 /* Offset within stack frame to start allocating local variables at.
645 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
646 first local allocated. Otherwise, it is the offset to the BEGINNING
647 of the first local allocated. */
649 #define STARTING_FRAME_OFFSET 0
651 /* If we generate an insn to push BYTES bytes,
652 this says how many the stack pointer really advances by.
653 On Alpha, don't define this because there are no push insns. */
654 /* #define PUSH_ROUNDING(BYTES) */
656 /* Define this to be nonzero if stack checking is built into the ABI. */
657 #define STACK_CHECK_BUILTIN 1
659 /* Define this if the maximum size of all the outgoing args is to be
660 accumulated and pushed during the prologue. The amount can be
661 found in the variable crtl->outgoing_args_size. */
662 #define ACCUMULATE_OUTGOING_ARGS 1
664 /* Offset of first parameter from the argument pointer register value. */
666 #define FIRST_PARM_OFFSET(FNDECL) 0
668 /* Definitions for register eliminations.
670 We have two registers that can be eliminated on the Alpha. First, the
671 frame pointer register can often be eliminated in favor of the stack
672 pointer register. Secondly, the argument pointer register can always be
673 eliminated; it is replaced with either the stack or frame pointer. */
675 /* This is an array of structures. Each structure initializes one pair
676 of eliminable registers. The "from" register number is given first,
677 followed by "to". Eliminations of the same "from" register are listed
678 in order of preference. */
680 #define ELIMINABLE_REGS \
681 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
682 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
683 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
684 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
686 /* Given FROM and TO register numbers, say whether this elimination is allowed.
687 Frame pointer elimination is automatically handled.
689 All eliminations are valid since the cases where FP can't be
690 eliminated are already handled. */
692 #define CAN_ELIMINATE(FROM, TO) 1
694 /* Round up to a multiple of 16 bytes. */
695 #define ALPHA_ROUND(X) (((X) + 15) & ~ 15)
697 /* Define the offset between two registers, one to be eliminated, and the other
698 its replacement, at the start of a routine. */
699 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
700 ((OFFSET) = alpha_initial_elimination_offset(FROM, TO))
702 /* Define this if stack space is still allocated for a parameter passed
704 /* #define REG_PARM_STACK_SPACE */
706 /* Value is the number of bytes of arguments automatically
707 popped when returning from a subroutine call.
708 FUNDECL is the declaration node of the function (as a tree),
709 FUNTYPE is the data type of the function (as a tree),
710 or for a library call it is an identifier node for the subroutine name.
711 SIZE is the number of bytes of arguments passed on the stack. */
713 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
715 /* Define how to find the value returned by a function.
716 VALTYPE is the data type of the value (as a tree).
717 If the precise function being called is known, FUNC is its FUNCTION_DECL;
718 otherwise, FUNC is 0.
720 On Alpha the value is found in $0 for integer functions and
721 $f0 for floating-point functions. */
723 #define FUNCTION_VALUE(VALTYPE, FUNC) \
724 function_value (VALTYPE, FUNC, VOIDmode)
726 /* Define how to find the value returned by a library function
727 assuming the value has mode MODE. */
729 #define LIBCALL_VALUE(MODE) \
730 function_value (NULL, NULL, MODE)
732 /* 1 if N is a possible register number for a function value
733 as seen by the caller. */
735 #define FUNCTION_VALUE_REGNO_P(N) \
736 ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33)
738 /* 1 if N is a possible register number for function argument passing.
739 On Alpha, these are $16-$21 and $f16-$f21. */
741 #define FUNCTION_ARG_REGNO_P(N) \
742 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
744 /* Define a data type for recording info about an argument list
745 during the scan of that argument list. This data type should
746 hold all necessary information about the function itself
747 and about the args processed so far, enough to enable macros
748 such as FUNCTION_ARG to determine where the next arg should go.
750 On Alpha, this is a single integer, which is a number of words
751 of arguments scanned so far.
752 Thus 6 or more means all following args should go on the stack. */
754 #define CUMULATIVE_ARGS int
756 /* Initialize a variable CUM of type CUMULATIVE_ARGS
757 for a call to a function whose data type is FNTYPE.
758 For a library call, FNTYPE is 0. */
760 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
763 /* Define intermediate macro to compute the size (in registers) of an argument
766 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
767 ((MODE) == TFmode || (MODE) == TCmode ? 1 \
768 : (((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \
769 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
771 /* Update the data in CUM to advance over an argument
772 of mode MODE and data type TYPE.
773 (TYPE is null for libcalls where that information may not be available.) */
775 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
777 (targetm.calls.must_pass_in_stack (MODE, TYPE)) \
778 ? 6 : ALPHA_ARG_SIZE (MODE, TYPE, NAMED))
780 /* Determine where to put an argument to a function.
781 Value is zero to push the argument on the stack,
782 or a hard register in which to store the argument.
784 MODE is the argument's machine mode.
785 TYPE is the data type of the argument (as a tree).
786 This is null for libcalls where that information may
788 CUM is a variable of type CUMULATIVE_ARGS which gives info about
789 the preceding args and about the function being called.
790 NAMED is nonzero if this argument is a named parameter
791 (otherwise it is an extra parameter matching an ellipsis).
793 On Alpha the first 6 words of args are normally in registers
794 and the rest are pushed. */
796 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
797 function_arg((CUM), (MODE), (TYPE), (NAMED))
799 /* Try to output insns to set TARGET equal to the constant C if it can be
800 done in less than N insns. Do all computations in MODE. Returns the place
801 where the output has been placed if it can be done and the insns have been
802 emitted. If it would take more than N insns, zero is returned and no
803 insns and emitted. */
805 /* Define the information needed to generate branch and scc insns. This is
806 stored from the compare operation. Note that we can't use "rtx" here
807 since it hasn't been defined! */
811 struct rtx_def
*op0
, *op1
;
815 extern struct alpha_compare alpha_compare
;
817 /* Make (or fake) .linkage entry for function call.
818 IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */
820 /* This macro defines the start of an assembly comment. */
822 #define ASM_COMMENT_START " #"
824 /* This macro produces the initial definition of a function. */
826 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
827 alpha_start_function(FILE,NAME,DECL);
829 /* This macro closes up a function definition for the assembler. */
831 #define ASM_DECLARE_FUNCTION_SIZE(FILE,NAME,DECL) \
832 alpha_end_function(FILE,NAME,DECL)
834 /* Output any profiling code before the prologue. */
836 #define PROFILE_BEFORE_PROLOGUE 1
838 /* Never use profile counters. */
840 #define NO_PROFILE_COUNTERS 1
842 /* Output assembler code to FILE to increment profiler label # LABELNO
843 for profiling a function entry. Under OSF/1, profiling is enabled
844 by simply passing -pg to the assembler and linker. */
846 #define FUNCTION_PROFILER(FILE, LABELNO)
848 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
849 the stack pointer does not matter. The value is tested only in
850 functions that have frame pointers.
851 No definition is equivalent to always zero. */
853 #define EXIT_IGNORE_STACK 1
855 /* Define registers used by the epilogue and return instruction. */
857 #define EPILOGUE_USES(REGNO) ((REGNO) == 26)
859 /* Output assembler code for a block containing the constant parts
860 of a trampoline, leaving space for the variable parts.
862 The trampoline should set the static chain pointer to value placed
863 into the trampoline and should branch to the specified routine.
864 Note that $27 has been set to the address of the trampoline, so we can
865 use it for addressability of the two data items. */
867 #define TRAMPOLINE_TEMPLATE(FILE) \
869 fprintf (FILE, "\tldq $1,24($27)\n"); \
870 fprintf (FILE, "\tldq $27,16($27)\n"); \
871 fprintf (FILE, "\tjmp $31,($27),0\n"); \
872 fprintf (FILE, "\tnop\n"); \
873 fprintf (FILE, "\t.quad 0,0\n"); \
876 /* Section in which to place the trampoline. On Alpha, instructions
877 may only be placed in a text segment. */
879 #define TRAMPOLINE_SECTION text_section
881 /* Length in units of the trampoline for entering a nested function. */
883 #define TRAMPOLINE_SIZE 32
885 /* The alignment of a trampoline, in bits. */
887 #define TRAMPOLINE_ALIGNMENT 64
889 /* Emit RTL insns to initialize the variable parts of a trampoline.
890 FNADDR is an RTX for the address of the function's pure code.
891 CXT is an RTX for the static chain value for the function. */
893 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
894 alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8)
896 /* A C expression whose value is RTL representing the value of the return
897 address for the frame COUNT steps up from the current frame.
898 FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of
899 the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME is defined. */
901 #define RETURN_ADDR_RTX alpha_return_addr
903 /* Before the prologue, RA lives in $26. */
904 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26)
905 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26)
906 #define DWARF_ALT_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (64)
907 #define DWARF_ZERO_REG 31
909 /* Describe how we implement __builtin_eh_return. */
910 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM)
911 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28)
912 #define EH_RETURN_HANDLER_RTX \
913 gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \
914 crtl->outgoing_args_size))
916 /* Addressing modes, and classification of registers for them. */
918 /* Macros to check register numbers against specific register classes. */
920 /* These assume that REGNO is a hard or pseudo reg number.
921 They give nonzero only if REGNO is a hard reg of the suitable class
922 or a pseudo reg currently allocated to a suitable hard reg.
923 Since they use reg_renumber, they are safe only once reg_renumber
924 has been allocated, which happens in local-alloc.c. */
926 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
927 #define REGNO_OK_FOR_BASE_P(REGNO) \
928 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \
929 || (REGNO) == 63 || reg_renumber[REGNO] == 63)
931 /* Maximum number of registers that can appear in a valid memory address. */
932 #define MAX_REGS_PER_ADDRESS 1
934 /* Recognize any constant value that is a valid address. For the Alpha,
935 there are only constants none since we want to use LDA to load any
936 symbolic addresses into registers. */
938 #define CONSTANT_ADDRESS_P(X) \
939 (GET_CODE (X) == CONST_INT \
940 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
942 /* Include all constant integers and constant doubles, but not
943 floating-point, except for floating-point zero. */
945 #define LEGITIMATE_CONSTANT_P alpha_legitimate_constant_p
947 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
948 and check its validity for a certain class.
949 We have two alternate definitions for each of them.
950 The usual definition accepts all pseudo regs; the other rejects
951 them unless they have been allocated suitable hard regs.
952 The symbol REG_OK_STRICT causes the latter definition to be used.
954 Most source files want to accept pseudo regs in the hope that
955 they will get allocated to the class that the insn wants them to be in.
956 Source files for reload pass need to be strict.
957 After reload, it makes no difference, since pseudo regs have
958 been eliminated by then. */
960 /* Nonzero if X is a hard reg that can be used as an index
961 or if it is a pseudo reg. */
962 #define REG_OK_FOR_INDEX_P(X) 0
964 /* Nonzero if X is a hard reg that can be used as a base reg
965 or if it is a pseudo reg. */
966 #define NONSTRICT_REG_OK_FOR_BASE_P(X) \
967 (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
969 /* ??? Nonzero if X is the frame pointer, or some virtual register
970 that may eliminate to the frame pointer. These will be allowed to
971 have offsets greater than 32K. This is done because register
972 elimination offsets will change the hi/lo split, and if we split
973 before reload, we will require additional instructions. */
974 #define NONSTRICT_REG_OK_FP_BASE_P(X) \
975 (REGNO (X) == 31 || REGNO (X) == 63 \
976 || (REGNO (X) >= FIRST_PSEUDO_REGISTER \
977 && REGNO (X) < LAST_VIRTUAL_REGISTER))
979 /* Nonzero if X is a hard reg that can be used as a base reg. */
980 #define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
983 #define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P (X)
985 #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X)
988 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
989 valid memory address for an instruction. */
992 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
994 if (alpha_legitimate_address_p (MODE, X, 1)) \
998 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
1000 if (alpha_legitimate_address_p (MODE, X, 0)) \
1005 /* Try machine-dependent ways of modifying an illegitimate address
1006 to be legitimate. If we find one, return the new, valid address.
1007 This macro is used in only one place: `memory_address' in explow.c. */
1009 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1011 rtx new_x = alpha_legitimize_address (X, NULL_RTX, MODE); \
1019 /* Try a machine-dependent way of reloading an illegitimate address
1020 operand. If we find one, push the reload and jump to WIN. This
1021 macro is used in only one place: `find_reloads_address' in reload.c. */
1023 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \
1025 rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \
1033 /* Go to LABEL if ADDR (a legitimate address expression)
1034 has an effect that depends on the machine mode it is used for.
1035 On the Alpha this is true only for the unaligned modes. We can
1036 simplify this test since we know that the address must be valid. */
1038 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1039 { if (GET_CODE (ADDR) == AND) goto LABEL; }
1041 /* Specify the machine mode that this machine uses
1042 for the index in the tablejump instruction. */
1043 #define CASE_VECTOR_MODE SImode
1045 /* Define as C expression which evaluates to nonzero if the tablejump
1046 instruction expects the table to contain offsets from the address of the
1049 Do not define this if the table should contain absolute addresses.
1050 On the Alpha, the table is really GP-relative, not relative to the PC
1051 of the table, but we pretend that it is PC-relative; this should be OK,
1052 but we should try to find some better way sometime. */
1053 #define CASE_VECTOR_PC_RELATIVE 1
1055 /* Define this as 1 if `char' should by default be signed; else as 0. */
1056 #define DEFAULT_SIGNED_CHAR 1
1058 /* Max number of bytes we can move to or from memory
1059 in one reasonably fast instruction. */
1063 /* If a memory-to-memory move would take MOVE_RATIO or more simple
1064 move-instruction pairs, we will do a movmem or libcall instead.
1066 Without byte/word accesses, we want no more than four instructions;
1067 with, several single byte accesses are better. */
1069 #define MOVE_RATIO (TARGET_BWX ? 7 : 2)
1071 /* Largest number of bytes of an object that can be placed in a register.
1072 On the Alpha we have plenty of registers, so use TImode. */
1073 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1075 /* Nonzero if access to memory by bytes is no faster than for words.
1076 Also nonzero if doing byte operations (specifically shifts) in registers
1079 On the Alpha, we want to not use the byte operation and instead use
1080 masking operations to access fields; these will save instructions. */
1082 #define SLOW_BYTE_ACCESS 1
1084 /* Define if operations between registers always perform the operation
1085 on the full register even if a narrower mode is specified. */
1086 #define WORD_REGISTER_OPERATIONS
1088 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1089 will either zero-extend or sign-extend. The value of this macro should
1090 be the code that says which one of the two operations is implicitly
1091 done, UNKNOWN if none. */
1092 #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)
1094 /* Define if loading short immediate values into registers sign extends. */
1095 #define SHORT_IMMEDIATES_SIGN_EXTEND
1097 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1098 is done just by pretending it is already truncated. */
1099 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1101 /* The CIX ctlz and cttz instructions return 64 for zero. */
1102 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
1103 #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
1105 /* Define the value returned by a floating-point comparison instruction. */
1107 #define FLOAT_STORE_FLAG_VALUE(MODE) \
1108 REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE))
1110 /* Canonicalize a comparison from one we don't have to one we do have. */
1112 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
1114 if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
1115 && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \
1120 (CODE) = swap_condition (CODE); \
1122 if (((CODE) == LT || (CODE) == LTU) \
1123 && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \
1125 (CODE) = (CODE) == LT ? LE : LEU; \
1126 (OP1) = GEN_INT (255); \
1130 /* Specify the machine mode that pointers have.
1131 After generation of rtl, the compiler makes no further distinction
1132 between pointers and any other objects of this machine mode. */
1133 #define Pmode DImode
1135 /* Mode of a function address in a call instruction (for indexing purposes). */
1137 #define FUNCTION_MODE Pmode
1139 /* Define this if addresses of constant functions
1140 shouldn't be put through pseudo regs where they can be cse'd.
1141 Desirable on machines where ordinary constants are expensive
1142 but a CALL with constant address is cheap.
1144 We define this on the Alpha so that gen_call and gen_call_value
1145 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1146 then copy it into a register, thus actually letting the address be
1149 #define NO_FUNCTION_CSE
1151 /* Define this to be nonzero if shift instructions ignore all but the low-order
1153 #define SHIFT_COUNT_TRUNCATED 1
1155 /* Control the assembler format that we output. */
1157 /* Output to assembler file text saying following lines
1158 may contain character constants, extra white space, comments, etc. */
1159 #define ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "")
1161 /* Output to assembler file text saying following lines
1162 no longer contain unusual constructs. */
1163 #define ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "")
1165 #define TEXT_SECTION_ASM_OP "\t.text"
1167 /* Output before read-only data. */
1169 #define READONLY_DATA_SECTION_ASM_OP "\t.rdata"
1171 /* Output before writable data. */
1173 #define DATA_SECTION_ASM_OP "\t.data"
1175 /* How to refer to registers in assembler output.
1176 This sequence is indexed by compiler's hard-register-number (see above). */
1178 #define REGISTER_NAMES \
1179 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1180 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1181 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1182 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1183 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1184 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1185 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1186 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"}
1188 /* Strip name encoding when emitting labels. */
1190 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
1192 const char *name_ = NAME; \
1193 if (*name_ == '@' || *name_ == '%') \
1195 if (*name_ == '*') \
1198 fputs (user_label_prefix, STREAM); \
1199 fputs (name_, STREAM); \
1202 /* Globalizing directive for a label. */
1203 #define GLOBAL_ASM_OP "\t.globl "
1205 /* The prefix to add to user-visible assembler symbols. */
1207 #define USER_LABEL_PREFIX ""
1209 /* This is how to output a label for a jump table. Arguments are the same as
1210 for (*targetm.asm_out.internal_label), except the insn for the jump table is
1213 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1214 { ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); }
1216 /* This is how to store into the string LABEL
1217 the symbol_ref name of an internal numbered label where
1218 PREFIX is the class of label and NUM is the number within the class.
1219 This is suitable for output with `assemble_name'. */
1221 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1222 sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM))
1224 /* We use the default ASCII-output routine, except that we don't write more
1225 than 50 characters since the assembler doesn't support very long lines. */
1227 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1229 FILE *_hide_asm_out_file = (MYFILE); \
1230 const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \
1231 int _hide_thissize = (MYLENGTH); \
1232 int _size_so_far = 0; \
1234 FILE *asm_out_file = _hide_asm_out_file; \
1235 const unsigned char *p = _hide_p; \
1236 int thissize = _hide_thissize; \
1238 fprintf (asm_out_file, "\t.ascii \""); \
1240 for (i = 0; i < thissize; i++) \
1242 register int c = p[i]; \
1244 if (_size_so_far ++ > 50 && i < thissize - 4) \
1245 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1247 if (c == '\"' || c == '\\') \
1248 putc ('\\', asm_out_file); \
1249 if (c >= ' ' && c < 0177) \
1250 putc (c, asm_out_file); \
1253 fprintf (asm_out_file, "\\%o", c); \
1254 /* After an octal-escape, if a digit follows, \
1255 terminate one string constant and start another. \
1256 The VAX assembler fails to stop reading the escape \
1257 after three digits, so this is the only way we \
1258 can get it to parse the data properly. */ \
1259 if (i < thissize - 1 && ISDIGIT (p[i + 1])) \
1260 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1263 fprintf (asm_out_file, "\"\n"); \
1268 /* This is how to output an element of a case-vector that is relative. */
1270 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1271 fprintf (FILE, "\t.%s $L%d\n", TARGET_ABI_WINDOWS_NT ? "long" : "gprel32", \
1274 /* This is how to output an assembler line
1275 that says to advance the location counter
1276 to a multiple of 2**LOG bytes. */
1278 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1280 fprintf (FILE, "\t.align %d\n", LOG);
1282 /* This is how to advance the location counter by SIZE bytes. */
1284 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1285 fprintf (FILE, "\t.space "HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
1287 /* This says how to output an assembler line
1288 to define a global common symbol. */
1290 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1291 ( fputs ("\t.comm ", (FILE)), \
1292 assemble_name ((FILE), (NAME)), \
1293 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)))
1295 /* This says how to output an assembler line
1296 to define a local common symbol. */
1298 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1299 ( fputs ("\t.lcomm ", (FILE)), \
1300 assemble_name ((FILE), (NAME)), \
1301 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)))
1304 /* Print operand X (an rtx) in assembler syntax to file FILE.
1305 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1306 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1308 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1310 /* Determine which codes are valid without a following integer. These must
1313 ~ Generates the name of the current function.
1315 / Generates the instruction suffix. The TRAP_SUFFIX and ROUND_SUFFIX
1316 attributes are examined to determine what is appropriate.
1318 , Generates single precision suffix for floating point
1319 instructions (s for IEEE, f for VAX)
1321 - Generates double precision suffix for floating point
1322 instructions (t for IEEE, g for VAX)
1325 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1326 ((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \
1327 || (CODE) == '#' || (CODE) == '*' || (CODE) == '&')
1329 /* Print a memory address as an operand to reference that memory location. */
1331 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1332 print_operand_address((FILE), (ADDR))
1334 /* Tell collect that the object format is ECOFF. */
1335 #define OBJECT_FORMAT_COFF
1336 #define EXTENDED_COFF
1338 /* If we use NM, pass -g to it so it only lists globals. */
1339 #define NM_FLAGS "-pg"
1341 /* Definitions for debugging. */
1343 #define SDB_DEBUGGING_INFO 1 /* generate info for mips-tfile */
1344 #define DBX_DEBUGGING_INFO 1 /* generate embedded stabs */
1345 #define MIPS_DEBUGGING_INFO 1 /* MIPS specific debugging info */
1347 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1348 #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
1352 /* Correct the offset of automatic variables and arguments. Note that
1353 the Alpha debug format wants all automatic variables and arguments
1354 to be in terms of two different offsets from the virtual frame pointer,
1355 which is the stack pointer before any adjustment in the function.
1356 The offset for the argument pointer is fixed for the native compiler,
1357 it is either zero (for the no arguments case) or large enough to hold
1358 all argument registers.
1359 The offset for the auto pointer is the fourth argument to the .frame
1360 directive (local_offset).
1361 To stay compatible with the native tools we use the same offsets
1362 from the virtual frame pointer and adjust the debugger arg/auto offsets
1363 accordingly. These debugger offsets are set up in output_prolog. */
1365 extern long alpha_arg_offset
;
1366 extern long alpha_auto_offset
;
1367 #define DEBUGGER_AUTO_OFFSET(X) \
1368 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
1369 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
1371 /* mips-tfile doesn't understand .stabd directives. */
1372 #define DBX_OUTPUT_SOURCE_LINE(STREAM, LINE, COUNTER) do { \
1373 dbxout_begin_stabn_sline (LINE); \
1374 dbxout_stab_value_internal_label ("LM", &COUNTER); \
1377 /* We want to use MIPS-style .loc directives for SDB line numbers. */
1378 extern int num_source_filenames
;
1379 #define SDB_OUTPUT_SOURCE_LINE(STREAM, LINE) \
1380 fprintf (STREAM, "\t.loc\t%d %d\n", num_source_filenames, LINE)
1382 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
1383 alpha_output_filename (STREAM, NAME)
1385 /* mips-tfile.c limits us to strings of one page. We must underestimate this
1386 number, because the real length runs past this up to the next
1387 continuation point. This is really a dbxout.c bug. */
1388 #define DBX_CONTIN_LENGTH 3000
1390 /* By default, turn on GDB extensions. */
1391 #define DEFAULT_GDB_EXTENSIONS 1
1393 /* Stabs-in-ECOFF can't handle dbxout_function_end(). */
1394 #define NO_DBX_FUNCTION_END 1
1396 /* If we are smuggling stabs through the ALPHA ECOFF object
1397 format, put a comment in front of the .stab<x> operation so
1398 that the ALPHA assembler does not choke. The mips-tfile program
1399 will correctly put the stab into the object file. */
1401 #define ASM_STABS_OP ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t")
1402 #define ASM_STABN_OP ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t")
1403 #define ASM_STABD_OP ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t")
1405 /* Forward references to tags are allowed. */
1406 #define SDB_ALLOW_FORWARD_REFERENCES
1408 /* Unknown tags are also allowed. */
1409 #define SDB_ALLOW_UNKNOWN_REFERENCES
1411 #define PUT_SDB_DEF(a) \
1413 fprintf (asm_out_file, "\t%s.def\t", \
1414 (TARGET_GAS) ? "" : "#"); \
1415 ASM_OUTPUT_LABELREF (asm_out_file, a); \
1416 fputc (';', asm_out_file); \
1419 #define PUT_SDB_PLAIN_DEF(a) \
1421 fprintf (asm_out_file, "\t%s.def\t.%s;", \
1422 (TARGET_GAS) ? "" : "#", (a)); \
1425 #define PUT_SDB_TYPE(a) \
1427 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
1430 /* For block start and end, we create labels, so that
1431 later we can figure out where the correct offset is.
1432 The normal .ent/.end serve well enough for functions,
1433 so those are just commented out. */
1435 extern int sdb_label_count
; /* block start/end next label # */
1437 #define PUT_SDB_BLOCK_START(LINE) \
1439 fprintf (asm_out_file, \
1440 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
1442 (TARGET_GAS) ? "" : "#", \
1445 sdb_label_count++; \
1448 #define PUT_SDB_BLOCK_END(LINE) \
1450 fprintf (asm_out_file, \
1451 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
1453 (TARGET_GAS) ? "" : "#", \
1456 sdb_label_count++; \
1459 #define PUT_SDB_FUNCTION_START(LINE)
1461 #define PUT_SDB_FUNCTION_END(LINE)
1463 #define PUT_SDB_EPILOGUE_END(NAME) ((void)(NAME))
1465 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
1466 mips-tdump.c to print them out.
1468 These must match the corresponding definitions in gdb/mipsread.c.
1469 Unfortunately, gcc and gdb do not currently share any directories. */
1471 #define CODE_MASK 0x8F300
1472 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
1473 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
1474 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
1476 /* Override some mips-tfile definitions. */
1478 #define SHASH_SIZE 511
1479 #define THASH_SIZE 55
1481 /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */
1483 #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7)
1485 /* The system headers under Alpha systems are generally C++-aware. */
1486 #define NO_IMPLICIT_EXTERN_C