1 /* Copyright (C) 1988-2024 Free Software Foundation, Inc.
3 This file is part of GCC.
5 GCC is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3, or (at your option)
10 GCC is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with GCC; see the file COPYING3. If not see
17 <http://www.gnu.org/licenses/>. */
19 #define IN_TARGET_CODE 1
23 #include "coretypes.h"
33 #include "stringpool.h"
40 #include "diagnostic.h"
43 #include "fold-const.h"
46 #include "stor-layout.h"
49 #include "insn-attr.h"
55 #include "common/common-target.h"
56 #include "langhooks.h"
60 #include "tm-constrs.h"
62 #include "sched-int.h"
64 #include "tree-pass.h"
66 #include "pass_manager.h"
67 #include "target-globals.h"
68 #include "gimple-iterator.h"
69 #include "shrink-wrap.h"
72 #include "tree-iterator.h"
74 #include "case-cfn-macros.h"
76 #include "fold-const-call.h"
78 #include "tree-ssanames.h"
80 #include "selftest-rtl.h"
81 #include "print-rtl.h"
84 #include "symbol-summary.h"
86 #include "ipa-fnsummary.h"
87 #include "wide-int-bitmask.h"
88 #include "tree-vector-builder.h"
90 #include "dwarf2out.h"
91 #include "i386-builtins.h"
92 #include "common/config/i386/i386-isas.h"
98 /* Macros for verification of enum ix86_builtins order. */
99 #define BDESC_VERIFY(x, y, z) \
100 gcc_checking_assert ((x) == (enum ix86_builtins) ((y) + (z)))
101 #define BDESC_VERIFYS(x, y, z) \
102 STATIC_ASSERT ((x) == (enum ix86_builtins) ((y) + (z)))
104 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_FIRST
,
105 IX86_BUILTIN__BDESC_COMI_LAST
, 1);
106 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_FIRST
,
107 IX86_BUILTIN__BDESC_PCMPESTR_LAST
, 1);
108 BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST
,
109 IX86_BUILTIN__BDESC_PCMPISTR_LAST
, 1);
110 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PURE_ARGS_FIRST
,
111 IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST
, 1);
112 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_FIRST
,
113 IX86_BUILTIN__BDESC_PURE_ARGS_LAST
, 1);
114 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST
,
115 IX86_BUILTIN__BDESC_ARGS_LAST
, 1);
116 BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_FIRST
,
117 IX86_BUILTIN__BDESC_ROUND_ARGS_LAST
, 1);
118 BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_FIRST
,
119 IX86_BUILTIN__BDESC_MULTI_ARG_LAST
, 1);
120 BDESC_VERIFYS (IX86_BUILTIN_MAX
,
121 IX86_BUILTIN__BDESC_CET_LAST
, 1);
124 /* Table for the ix86 builtin non-function types. */
125 static GTY(()) tree ix86_builtin_type_tab
[(int) IX86_BT_LAST_CPTR
+ 1];
127 tree ix86_float16_type_node
= NULL_TREE
;
128 tree ix86_bf16_type_node
= NULL_TREE
;
130 /* Retrieve an element from the above table, building some of
134 ix86_get_builtin_type (enum ix86_builtin_type tcode
)
139 gcc_assert ((unsigned)tcode
< ARRAY_SIZE(ix86_builtin_type_tab
));
141 type
= ix86_builtin_type_tab
[(int) tcode
];
145 gcc_assert (tcode
> IX86_BT_LAST_PRIM
);
146 if (tcode
<= IX86_BT_LAST_VECT
)
150 index
= tcode
- IX86_BT_LAST_PRIM
- 1;
151 itype
= ix86_get_builtin_type (ix86_builtin_type_vect_base
[index
]);
152 mode
= ix86_builtin_type_vect_mode
[index
];
154 type
= build_vector_type_for_mode (itype
, mode
);
160 index
= tcode
- IX86_BT_LAST_VECT
- 1;
161 if (tcode
<= IX86_BT_LAST_PTR
)
162 quals
= TYPE_UNQUALIFIED
;
164 quals
= TYPE_QUAL_CONST
;
166 itype
= ix86_get_builtin_type (ix86_builtin_type_ptr_base
[index
]);
167 if (quals
!= TYPE_UNQUALIFIED
)
168 itype
= build_qualified_type (itype
, quals
);
170 type
= build_pointer_type (itype
);
173 ix86_builtin_type_tab
[(int) tcode
] = type
;
177 /* Table for the ix86 builtin function types. */
178 static GTY(()) tree ix86_builtin_func_type_tab
[(int) IX86_BT_LAST_ALIAS
+ 1];
180 /* Retrieve an element from the above table, building some of
184 ix86_get_builtin_func_type (enum ix86_builtin_func_type tcode
)
188 gcc_assert ((unsigned)tcode
< ARRAY_SIZE (ix86_builtin_func_type_tab
));
190 type
= ix86_builtin_func_type_tab
[(int) tcode
];
194 if (tcode
<= IX86_BT_LAST_FUNC
)
196 unsigned start
= ix86_builtin_func_start
[(int) tcode
];
197 unsigned after
= ix86_builtin_func_start
[(int) tcode
+ 1];
198 tree rtype
, atype
, args
= void_list_node
;
201 rtype
= ix86_get_builtin_type (ix86_builtin_func_args
[start
]);
202 for (i
= after
- 1; i
> start
; --i
)
204 atype
= ix86_get_builtin_type (ix86_builtin_func_args
[i
]);
205 args
= tree_cons (NULL
, atype
, args
);
208 type
= build_function_type (rtype
, args
);
212 unsigned index
= tcode
- IX86_BT_LAST_FUNC
- 1;
213 enum ix86_builtin_func_type icode
;
215 icode
= ix86_builtin_func_alias_base
[index
];
216 type
= ix86_get_builtin_func_type (icode
);
219 ix86_builtin_func_type_tab
[(int) tcode
] = type
;
223 /* Table for the ix86 builtin decls. */
224 static GTY(()) tree ix86_builtins
[(int) IX86_BUILTIN_MAX
+ 1];
226 struct builtin_isa ix86_builtins_isa
[(int) IX86_BUILTIN_MAX
];
228 tree
get_ix86_builtin (enum ix86_builtins c
)
230 return ix86_builtins
[c
];
233 /* Bits that can still enable any inclusion of a builtin. */
234 HOST_WIDE_INT deferred_isa_values
= 0;
235 HOST_WIDE_INT deferred_isa_values2
= 0;
237 /* Add an ix86 target builtin function with CODE, NAME and TYPE. Save the
238 MASK and MASK2 of which isa_flags and ix86_isa_flags2 to use in the
239 ix86_builtins_isa array. Stores the function decl in the ix86_builtins
240 array. Returns the function decl or NULL_TREE, if the builtin was not
243 If the front end has a special hook for builtin functions, delay adding
244 builtin functions that aren't in the current ISA until the ISA is changed
245 with function specific optimization. Doing so, can save about 300K for the
246 default compiler. When the builtin is expanded, check at that time whether
249 If the front end doesn't have a special hook, record all builtins, even if
250 it isn't an instruction set in the current ISA in case the user uses
251 function specific options for a different ISA, so that we don't get scope
252 errors if a builtin is added in the middle of a function scope. */
255 def_builtin (HOST_WIDE_INT mask
, HOST_WIDE_INT mask2
,
257 enum ix86_builtin_func_type tcode
,
258 enum ix86_builtins code
)
260 tree decl
= NULL_TREE
;
262 /* An instruction may be 64bit only regardless of ISAs. */
263 if (!(mask
& OPTION_MASK_ISA_64BIT
) || TARGET_64BIT
)
265 ix86_builtins_isa
[(int) code
].isa
= mask
;
266 ix86_builtins_isa
[(int) code
].isa2
= mask2
;
268 mask
&= ~OPTION_MASK_ISA_64BIT
;
270 /* Filter out the masks most often ored together with others. */
271 if ((mask
& ix86_isa_flags
& OPTION_MASK_ISA_AVX512VL
)
272 && mask
!= OPTION_MASK_ISA_AVX512VL
)
273 mask
&= ~OPTION_MASK_ISA_AVX512VL
;
274 if ((mask
& ix86_isa_flags
& OPTION_MASK_ISA_AVX512BW
)
275 && mask
!= OPTION_MASK_ISA_AVX512BW
)
276 mask
&= ~OPTION_MASK_ISA_AVX512BW
;
278 if (((mask2
== 0 || (mask2
& ix86_isa_flags2
) != 0)
279 && (mask
== 0 || (mask
& ix86_isa_flags
) != 0))
280 || ((mask
& OPTION_MASK_ISA_MMX
) != 0 && TARGET_MMX_WITH_SSE
)
281 /* "Unified" builtin used by either AVXVNNI/AVXIFMA/AES intrinsics
282 or AVX512VNNIVL/AVX512IFMAVL/VAESVL non-mask intrinsics should be
283 defined whenever avxvnni/avxifma/aes or avx512vnni/avx512ifma/vaes
284 && avx512vl exist. */
285 || (mask2
== OPTION_MASK_ISA2_AVXVNNI
)
286 || (mask2
== OPTION_MASK_ISA2_AVXIFMA
)
287 || (mask2
== (OPTION_MASK_ISA2_AVXNECONVERT
288 | OPTION_MASK_ISA2_AVX512BF16
))
289 || ((mask2
& OPTION_MASK_ISA2_VAES
) != 0)
290 || (lang_hooks
.builtin_function
291 == lang_hooks
.builtin_function_ext_scope
))
293 tree type
= ix86_get_builtin_func_type (tcode
);
294 decl
= add_builtin_function (name
, type
, code
, BUILT_IN_MD
,
296 ix86_builtins
[(int) code
] = decl
;
297 ix86_builtins_isa
[(int) code
].set_and_not_built_p
= false;
298 if (!flag_non_call_exceptions
)
299 TREE_NOTHROW (decl
) = 1;
300 if (ix86_builtins
[(int) IX86_BUILTIN_MAX
] == NULL_TREE
)
301 ix86_builtins
[(int) IX86_BUILTIN_MAX
]
302 = build_tree_list (get_identifier ("leaf"), NULL_TREE
);
303 DECL_ATTRIBUTES (decl
) = ix86_builtins
[(int) IX86_BUILTIN_MAX
];
307 /* Just MASK and MASK2 where set_and_not_built_p == true can potentially
308 include a builtin. */
309 deferred_isa_values
|= mask
;
310 deferred_isa_values2
|= mask2
;
311 ix86_builtins
[(int) code
] = NULL_TREE
;
312 ix86_builtins_isa
[(int) code
].tcode
= tcode
;
313 ix86_builtins_isa
[(int) code
].name
= name
;
314 ix86_builtins_isa
[(int) code
].const_p
= false;
315 ix86_builtins_isa
[(int) code
].pure_p
= false;
316 ix86_builtins_isa
[(int) code
].set_and_not_built_p
= true;
323 /* Like def_builtin, but also marks the function decl "const". */
326 def_builtin_const (HOST_WIDE_INT mask
, HOST_WIDE_INT mask2
, const char *name
,
327 enum ix86_builtin_func_type tcode
, enum ix86_builtins code
)
329 tree decl
= def_builtin (mask
, mask2
, name
, tcode
, code
);
331 TREE_READONLY (decl
) = 1;
333 ix86_builtins_isa
[(int) code
].const_p
= true;
338 /* Like def_builtin, but also marks the function decl "pure". */
341 def_builtin_pure (HOST_WIDE_INT mask
, HOST_WIDE_INT mask2
, const char *name
,
342 enum ix86_builtin_func_type tcode
, enum ix86_builtins code
)
344 tree decl
= def_builtin (mask
, mask2
, name
, tcode
, code
);
346 DECL_PURE_P (decl
) = 1;
348 ix86_builtins_isa
[(int) code
].pure_p
= true;
353 /* Add any new builtin functions for a given ISA that may not have been
354 declared. This saves a bit of space compared to adding all of the
355 declarations to the tree, even if we didn't use them. */
358 ix86_add_new_builtins (HOST_WIDE_INT isa
, HOST_WIDE_INT isa2
)
360 isa
&= ~OPTION_MASK_ISA_64BIT
;
362 if ((isa
& deferred_isa_values
) == 0
363 && (isa2
& deferred_isa_values2
) == 0
364 && ((deferred_isa_values
& OPTION_MASK_ISA_MMX
) == 0
365 || !(TARGET_64BIT
&& (isa
& OPTION_MASK_ISA_SSE2
) != 0)))
368 /* Bits in ISA value can be removed from potential isa values. */
369 deferred_isa_values
&= ~isa
;
370 deferred_isa_values2
&= ~isa2
;
371 if (TARGET_64BIT
&& (isa
& OPTION_MASK_ISA_SSE2
) != 0)
372 deferred_isa_values
&= ~OPTION_MASK_ISA_MMX
;
375 tree saved_current_target_pragma
= current_target_pragma
;
376 current_target_pragma
= NULL_TREE
;
378 for (i
= 0; i
< (int)IX86_BUILTIN_MAX
; i
++)
380 if (((ix86_builtins_isa
[i
].isa
& isa
) != 0
381 || (ix86_builtins_isa
[i
].isa2
& isa2
) != 0
382 || ((ix86_builtins_isa
[i
].isa
& OPTION_MASK_ISA_MMX
) != 0
384 && (isa
& OPTION_MASK_ISA_SSE2
) != 0))
385 && ix86_builtins_isa
[i
].set_and_not_built_p
)
389 /* Don't define the builtin again. */
390 ix86_builtins_isa
[i
].set_and_not_built_p
= false;
392 type
= ix86_get_builtin_func_type (ix86_builtins_isa
[i
].tcode
);
393 decl
= add_builtin_function_ext_scope (ix86_builtins_isa
[i
].name
,
394 type
, i
, BUILT_IN_MD
, NULL
,
397 ix86_builtins
[i
] = decl
;
398 if (ix86_builtins_isa
[i
].const_p
)
399 TREE_READONLY (decl
) = 1;
400 if (ix86_builtins_isa
[i
].pure_p
)
401 DECL_PURE_P (decl
) = 1;
402 if (!flag_non_call_exceptions
)
403 TREE_NOTHROW (decl
) = 1;
404 if (ix86_builtins
[(int) IX86_BUILTIN_MAX
] == NULL_TREE
)
405 ix86_builtins
[(int) IX86_BUILTIN_MAX
]
406 = build_tree_list (get_identifier ("leaf"), NULL_TREE
);
407 DECL_ATTRIBUTES (decl
) = ix86_builtins
[(int) IX86_BUILTIN_MAX
];
411 current_target_pragma
= saved_current_target_pragma
;
414 /* TM vector builtins. */
416 /* Reuse the existing x86-specific `struct builtin_description' cause
417 we're lazy. Add casts to make them fit. */
418 static const struct builtin_description bdesc_tm
[] =
420 { OPTION_MASK_ISA_MMX
, 0, CODE_FOR_nothing
, "__builtin__ITM_WM64", (enum ix86_builtins
) BUILT_IN_TM_STORE_M64
, UNKNOWN
, VOID_FTYPE_PV2SI_V2SI
},
421 { OPTION_MASK_ISA_MMX
, 0, CODE_FOR_nothing
, "__builtin__ITM_WaRM64", (enum ix86_builtins
) BUILT_IN_TM_STORE_WAR_M64
, UNKNOWN
, VOID_FTYPE_PV2SI_V2SI
},
422 { OPTION_MASK_ISA_MMX
, 0, CODE_FOR_nothing
, "__builtin__ITM_WaWM64", (enum ix86_builtins
) BUILT_IN_TM_STORE_WAW_M64
, UNKNOWN
, VOID_FTYPE_PV2SI_V2SI
},
423 { OPTION_MASK_ISA_MMX
, 0, CODE_FOR_nothing
, "__builtin__ITM_RM64", (enum ix86_builtins
) BUILT_IN_TM_LOAD_M64
, UNKNOWN
, V2SI_FTYPE_PCV2SI
},
424 { OPTION_MASK_ISA_MMX
, 0, CODE_FOR_nothing
, "__builtin__ITM_RaRM64", (enum ix86_builtins
) BUILT_IN_TM_LOAD_RAR_M64
, UNKNOWN
, V2SI_FTYPE_PCV2SI
},
425 { OPTION_MASK_ISA_MMX
, 0, CODE_FOR_nothing
, "__builtin__ITM_RaWM64", (enum ix86_builtins
) BUILT_IN_TM_LOAD_RAW_M64
, UNKNOWN
, V2SI_FTYPE_PCV2SI
},
426 { OPTION_MASK_ISA_MMX
, 0, CODE_FOR_nothing
, "__builtin__ITM_RfWM64", (enum ix86_builtins
) BUILT_IN_TM_LOAD_RFW_M64
, UNKNOWN
, V2SI_FTYPE_PCV2SI
},
428 { OPTION_MASK_ISA_SSE
, 0, CODE_FOR_nothing
, "__builtin__ITM_WM128", (enum ix86_builtins
) BUILT_IN_TM_STORE_M128
, UNKNOWN
, VOID_FTYPE_PV4SF_V4SF
},
429 { OPTION_MASK_ISA_SSE
, 0, CODE_FOR_nothing
, "__builtin__ITM_WaRM128", (enum ix86_builtins
) BUILT_IN_TM_STORE_WAR_M128
, UNKNOWN
, VOID_FTYPE_PV4SF_V4SF
},
430 { OPTION_MASK_ISA_SSE
, 0, CODE_FOR_nothing
, "__builtin__ITM_WaWM128", (enum ix86_builtins
) BUILT_IN_TM_STORE_WAW_M128
, UNKNOWN
, VOID_FTYPE_PV4SF_V4SF
},
431 { OPTION_MASK_ISA_SSE
, 0, CODE_FOR_nothing
, "__builtin__ITM_RM128", (enum ix86_builtins
) BUILT_IN_TM_LOAD_M128
, UNKNOWN
, V4SF_FTYPE_PCV4SF
},
432 { OPTION_MASK_ISA_SSE
, 0, CODE_FOR_nothing
, "__builtin__ITM_RaRM128", (enum ix86_builtins
) BUILT_IN_TM_LOAD_RAR_M128
, UNKNOWN
, V4SF_FTYPE_PCV4SF
},
433 { OPTION_MASK_ISA_SSE
, 0, CODE_FOR_nothing
, "__builtin__ITM_RaWM128", (enum ix86_builtins
) BUILT_IN_TM_LOAD_RAW_M128
, UNKNOWN
, V4SF_FTYPE_PCV4SF
},
434 { OPTION_MASK_ISA_SSE
, 0, CODE_FOR_nothing
, "__builtin__ITM_RfWM128", (enum ix86_builtins
) BUILT_IN_TM_LOAD_RFW_M128
, UNKNOWN
, V4SF_FTYPE_PCV4SF
},
436 { OPTION_MASK_ISA_AVX
, 0, CODE_FOR_nothing
, "__builtin__ITM_WM256", (enum ix86_builtins
) BUILT_IN_TM_STORE_M256
, UNKNOWN
, VOID_FTYPE_PV8SF_V8SF
},
437 { OPTION_MASK_ISA_AVX
, 0, CODE_FOR_nothing
, "__builtin__ITM_WaRM256", (enum ix86_builtins
) BUILT_IN_TM_STORE_WAR_M256
, UNKNOWN
, VOID_FTYPE_PV8SF_V8SF
},
438 { OPTION_MASK_ISA_AVX
, 0, CODE_FOR_nothing
, "__builtin__ITM_WaWM256", (enum ix86_builtins
) BUILT_IN_TM_STORE_WAW_M256
, UNKNOWN
, VOID_FTYPE_PV8SF_V8SF
},
439 { OPTION_MASK_ISA_AVX
, 0, CODE_FOR_nothing
, "__builtin__ITM_RM256", (enum ix86_builtins
) BUILT_IN_TM_LOAD_M256
, UNKNOWN
, V8SF_FTYPE_PCV8SF
},
440 { OPTION_MASK_ISA_AVX
, 0, CODE_FOR_nothing
, "__builtin__ITM_RaRM256", (enum ix86_builtins
) BUILT_IN_TM_LOAD_RAR_M256
, UNKNOWN
, V8SF_FTYPE_PCV8SF
},
441 { OPTION_MASK_ISA_AVX
, 0, CODE_FOR_nothing
, "__builtin__ITM_RaWM256", (enum ix86_builtins
) BUILT_IN_TM_LOAD_RAW_M256
, UNKNOWN
, V8SF_FTYPE_PCV8SF
},
442 { OPTION_MASK_ISA_AVX
, 0, CODE_FOR_nothing
, "__builtin__ITM_RfWM256", (enum ix86_builtins
) BUILT_IN_TM_LOAD_RFW_M256
, UNKNOWN
, V8SF_FTYPE_PCV8SF
},
444 { OPTION_MASK_ISA_MMX
, 0, CODE_FOR_nothing
, "__builtin__ITM_LM64", (enum ix86_builtins
) BUILT_IN_TM_LOG_M64
, UNKNOWN
, VOID_FTYPE_PCVOID
},
445 { OPTION_MASK_ISA_SSE
, 0, CODE_FOR_nothing
, "__builtin__ITM_LM128", (enum ix86_builtins
) BUILT_IN_TM_LOG_M128
, UNKNOWN
, VOID_FTYPE_PCVOID
},
446 { OPTION_MASK_ISA_AVX
, 0, CODE_FOR_nothing
, "__builtin__ITM_LM256", (enum ix86_builtins
) BUILT_IN_TM_LOG_M256
, UNKNOWN
, VOID_FTYPE_PCVOID
},
449 /* Initialize the transactional memory vector load/store builtins. */
452 ix86_init_tm_builtins (void)
454 enum ix86_builtin_func_type ftype
;
455 const struct builtin_description
*d
;
458 tree attrs_load
, attrs_type_load
, attrs_store
, attrs_type_store
;
459 tree attrs_log
, attrs_type_log
;
464 /* If there are no builtins defined, we must be compiling in a
465 language without trans-mem support. */
466 if (!builtin_decl_explicit_p (BUILT_IN_TM_LOAD_1
))
469 /* Use whatever attributes a normal TM load has. */
470 decl
= builtin_decl_explicit (BUILT_IN_TM_LOAD_1
);
471 attrs_load
= DECL_ATTRIBUTES (decl
);
472 attrs_type_load
= TYPE_ATTRIBUTES (TREE_TYPE (decl
));
473 /* Use whatever attributes a normal TM store has. */
474 decl
= builtin_decl_explicit (BUILT_IN_TM_STORE_1
);
475 attrs_store
= DECL_ATTRIBUTES (decl
);
476 attrs_type_store
= TYPE_ATTRIBUTES (TREE_TYPE (decl
));
477 /* Use whatever attributes a normal TM log has. */
478 decl
= builtin_decl_explicit (BUILT_IN_TM_LOG
);
479 attrs_log
= DECL_ATTRIBUTES (decl
);
480 attrs_type_log
= TYPE_ATTRIBUTES (TREE_TYPE (decl
));
482 for (i
= 0, d
= bdesc_tm
;
483 i
< ARRAY_SIZE (bdesc_tm
);
486 if ((d
->mask
& ix86_isa_flags
) != 0
487 || ((d
->mask
& OPTION_MASK_ISA_MMX
) != 0 && TARGET_MMX_WITH_SSE
)
488 || (lang_hooks
.builtin_function
489 == lang_hooks
.builtin_function_ext_scope
))
491 tree type
, attrs
, attrs_type
;
492 enum built_in_function code
= (enum built_in_function
) d
->code
;
494 ftype
= (enum ix86_builtin_func_type
) d
->flag
;
495 type
= ix86_get_builtin_func_type (ftype
);
497 if (BUILTIN_TM_LOAD_P (code
))
500 attrs_type
= attrs_type_load
;
502 else if (BUILTIN_TM_STORE_P (code
))
505 attrs_type
= attrs_type_store
;
510 attrs_type
= attrs_type_log
;
512 decl
= add_builtin_function (d
->name
, type
, code
, BUILT_IN_NORMAL
,
513 /* The builtin without the prefix for
514 calling it directly. */
515 d
->name
+ strlen ("__builtin_"),
517 /* add_builtin_function() will set the DECL_ATTRIBUTES, now
518 set the TYPE_ATTRIBUTES. */
519 decl_attributes (&TREE_TYPE (decl
), attrs_type
, ATTR_FLAG_BUILT_IN
);
521 set_builtin_decl (code
, decl
, false);
526 /* Set up all the MMX/SSE builtins, even builtins for instructions that are not
527 in the current target ISA to allow the user to compile particular modules
528 with different target specific options that differ from the command line
531 ix86_init_mmx_sse_builtins (void)
533 const struct builtin_description
* d
;
534 enum ix86_builtin_func_type ftype
;
537 /* Add all special builtins with variable number of operands. */
538 for (i
= 0, d
= bdesc_special_args
;
539 i
< ARRAY_SIZE (bdesc_special_args
);
542 BDESC_VERIFY (d
->code
, IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST
, i
);
546 ftype
= (enum ix86_builtin_func_type
) d
->flag
;
547 def_builtin (d
->mask
, d
->mask2
, d
->name
, ftype
, d
->code
);
549 BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST
,
550 IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST
,
551 ARRAY_SIZE (bdesc_special_args
) - 1);
553 /* Add all pure builtins with variable number of operands. */
554 for (i
= 0, d
= bdesc_pure_args
;
555 i
< ARRAY_SIZE (bdesc_pure_args
);
558 BDESC_VERIFY (d
->code
, IX86_BUILTIN__BDESC_PURE_ARGS_FIRST
, i
);
562 ftype
= (enum ix86_builtin_func_type
) d
->flag
;
563 def_builtin_pure (d
->mask
, d
->mask2
, d
->name
, ftype
, d
->code
);
565 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PURE_ARGS_LAST
,
566 IX86_BUILTIN__BDESC_PURE_ARGS_FIRST
,
567 ARRAY_SIZE (bdesc_pure_args
) - 1);
569 /* Add all const builtins with variable number of operands. */
570 for (i
= 0, d
= bdesc_args
;
571 i
< ARRAY_SIZE (bdesc_args
);
574 BDESC_VERIFY (d
->code
, IX86_BUILTIN__BDESC_ARGS_FIRST
, i
);
578 ftype
= (enum ix86_builtin_func_type
) d
->flag
;
579 def_builtin_const (d
->mask
, d
->mask2
, d
->name
, ftype
, d
->code
);
581 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_LAST
,
582 IX86_BUILTIN__BDESC_ARGS_FIRST
,
583 ARRAY_SIZE (bdesc_args
) - 1);
585 /* Add all builtins with rounding. */
586 for (i
= 0, d
= bdesc_round_args
;
587 i
< ARRAY_SIZE (bdesc_round_args
);
590 BDESC_VERIFY (d
->code
, IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST
, i
);
594 ftype
= (enum ix86_builtin_func_type
) d
->flag
;
595 def_builtin_const (d
->mask
, d
->mask2
, d
->name
, ftype
, d
->code
);
597 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_LAST
,
598 IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST
,
599 ARRAY_SIZE (bdesc_round_args
) - 1);
601 /* pcmpestr[im] insns. */
602 for (i
= 0, d
= bdesc_pcmpestr
;
603 i
< ARRAY_SIZE (bdesc_pcmpestr
);
606 BDESC_VERIFY (d
->code
, IX86_BUILTIN__BDESC_PCMPESTR_FIRST
, i
);
607 if (d
->code
== IX86_BUILTIN_PCMPESTRM128
)
608 ftype
= V16QI_FTYPE_V16QI_INT_V16QI_INT_INT
;
610 ftype
= INT_FTYPE_V16QI_INT_V16QI_INT_INT
;
611 def_builtin_const (d
->mask
, d
->mask2
, d
->name
, ftype
, d
->code
);
613 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_LAST
,
614 IX86_BUILTIN__BDESC_PCMPESTR_FIRST
,
615 ARRAY_SIZE (bdesc_pcmpestr
) - 1);
617 /* pcmpistr[im] insns. */
618 for (i
= 0, d
= bdesc_pcmpistr
;
619 i
< ARRAY_SIZE (bdesc_pcmpistr
);
622 BDESC_VERIFY (d
->code
, IX86_BUILTIN__BDESC_PCMPISTR_FIRST
, i
);
623 if (d
->code
== IX86_BUILTIN_PCMPISTRM128
)
624 ftype
= V16QI_FTYPE_V16QI_V16QI_INT
;
626 ftype
= INT_FTYPE_V16QI_V16QI_INT
;
627 def_builtin_const (d
->mask
, d
->mask2
, d
->name
, ftype
, d
->code
);
629 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_LAST
,
630 IX86_BUILTIN__BDESC_PCMPISTR_FIRST
,
631 ARRAY_SIZE (bdesc_pcmpistr
) - 1);
633 /* comi/ucomi insns. */
634 for (i
= 0, d
= bdesc_comi
; i
< ARRAY_SIZE (bdesc_comi
); i
++, d
++)
636 BDESC_VERIFY (d
->code
, IX86_BUILTIN__BDESC_COMI_FIRST
, i
);
637 if (d
->mask
== OPTION_MASK_ISA_SSE2
)
638 ftype
= INT_FTYPE_V2DF_V2DF
;
640 ftype
= INT_FTYPE_V4SF_V4SF
;
641 def_builtin_const (d
->mask
, d
->mask2
, d
->name
, ftype
, d
->code
);
643 BDESC_VERIFYS (IX86_BUILTIN__BDESC_COMI_LAST
,
644 IX86_BUILTIN__BDESC_COMI_FIRST
,
645 ARRAY_SIZE (bdesc_comi
) - 1);
648 def_builtin (OPTION_MASK_ISA_SSE
, 0, "__builtin_ia32_ldmxcsr",
649 VOID_FTYPE_UNSIGNED
, IX86_BUILTIN_LDMXCSR
);
650 def_builtin_pure (OPTION_MASK_ISA_SSE
, 0, "__builtin_ia32_stmxcsr",
651 UNSIGNED_FTYPE_VOID
, IX86_BUILTIN_STMXCSR
);
654 def_builtin (OPTION_MASK_ISA_SSE
| OPTION_MASK_ISA_3DNOW_A
655 /* As it uses V4HImode, we have to require -mmmx too. */
656 | OPTION_MASK_ISA_MMX
, 0,
657 "__builtin_ia32_maskmovq", VOID_FTYPE_V8QI_V8QI_PCHAR
,
658 IX86_BUILTIN_MASKMOVQ
);
661 def_builtin (OPTION_MASK_ISA_SSE2
, 0, "__builtin_ia32_maskmovdqu",
662 VOID_FTYPE_V16QI_V16QI_PCHAR
, IX86_BUILTIN_MASKMOVDQU
);
664 def_builtin (OPTION_MASK_ISA_SSE2
, 0, "__builtin_ia32_clflush",
665 VOID_FTYPE_PCVOID
, IX86_BUILTIN_CLFLUSH
);
666 x86_mfence
= def_builtin (OPTION_MASK_ISA_SSE2
, 0, "__builtin_ia32_mfence",
667 VOID_FTYPE_VOID
, IX86_BUILTIN_MFENCE
);
670 def_builtin (0, OPTION_MASK_ISA2_MWAIT
, "__builtin_ia32_monitor",
671 VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED
, IX86_BUILTIN_MONITOR
);
672 def_builtin (0, OPTION_MASK_ISA2_MWAIT
, "__builtin_ia32_mwait",
673 VOID_FTYPE_UNSIGNED_UNSIGNED
, IX86_BUILTIN_MWAIT
);
676 def_builtin_const (OPTION_MASK_ISA_AES
| OPTION_MASK_ISA_SSE2
677 | OPTION_MASK_ISA_AVX512VL
,
678 OPTION_MASK_ISA2_VAES
,
679 "__builtin_ia32_aesenc128",
680 V2DI_FTYPE_V2DI_V2DI
, IX86_BUILTIN_AESENC128
);
681 def_builtin_const (OPTION_MASK_ISA_AES
| OPTION_MASK_ISA_SSE2
682 | OPTION_MASK_ISA_AVX512VL
,
683 OPTION_MASK_ISA2_VAES
,
684 "__builtin_ia32_aesenclast128",
685 V2DI_FTYPE_V2DI_V2DI
, IX86_BUILTIN_AESENCLAST128
);
686 def_builtin_const (OPTION_MASK_ISA_AES
| OPTION_MASK_ISA_SSE2
687 | OPTION_MASK_ISA_AVX512VL
,
688 OPTION_MASK_ISA2_VAES
,
689 "__builtin_ia32_aesdec128",
690 V2DI_FTYPE_V2DI_V2DI
, IX86_BUILTIN_AESDEC128
);
691 def_builtin_const (OPTION_MASK_ISA_AES
| OPTION_MASK_ISA_SSE2
692 | OPTION_MASK_ISA_AVX512VL
,
693 OPTION_MASK_ISA2_VAES
,
694 "__builtin_ia32_aesdeclast128",
695 V2DI_FTYPE_V2DI_V2DI
, IX86_BUILTIN_AESDECLAST128
);
696 def_builtin_const (OPTION_MASK_ISA_AES
| OPTION_MASK_ISA_SSE2
, 0,
697 "__builtin_ia32_aesimc128",
698 V2DI_FTYPE_V2DI
, IX86_BUILTIN_AESIMC128
);
699 def_builtin_const (OPTION_MASK_ISA_AES
| OPTION_MASK_ISA_SSE2
, 0,
700 "__builtin_ia32_aeskeygenassist128",
701 V2DI_FTYPE_V2DI_INT
, IX86_BUILTIN_AESKEYGENASSIST128
);
704 def_builtin_const (OPTION_MASK_ISA_PCLMUL
| OPTION_MASK_ISA_SSE2
, 0,
705 "__builtin_ia32_pclmulqdq128",
706 V2DI_FTYPE_V2DI_V2DI_INT
, IX86_BUILTIN_PCLMULQDQ128
);
709 def_builtin (OPTION_MASK_ISA_RDRND
, 0, "__builtin_ia32_rdrand16_step",
710 INT_FTYPE_PUSHORT
, IX86_BUILTIN_RDRAND16_STEP
);
711 def_builtin (OPTION_MASK_ISA_RDRND
, 0, "__builtin_ia32_rdrand32_step",
712 INT_FTYPE_PUNSIGNED
, IX86_BUILTIN_RDRAND32_STEP
);
713 def_builtin (OPTION_MASK_ISA_RDRND
| OPTION_MASK_ISA_64BIT
, 0,
714 "__builtin_ia32_rdrand64_step", INT_FTYPE_PULONGLONG
,
715 IX86_BUILTIN_RDRAND64_STEP
);
718 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gathersiv2df",
719 V2DF_FTYPE_V2DF_PCDOUBLE_V4SI_V2DF_INT
,
720 IX86_BUILTIN_GATHERSIV2DF
);
722 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gathersiv4df",
723 V4DF_FTYPE_V4DF_PCDOUBLE_V4SI_V4DF_INT
,
724 IX86_BUILTIN_GATHERSIV4DF
);
726 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gatherdiv2df",
727 V2DF_FTYPE_V2DF_PCDOUBLE_V2DI_V2DF_INT
,
728 IX86_BUILTIN_GATHERDIV2DF
);
730 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gatherdiv4df",
731 V4DF_FTYPE_V4DF_PCDOUBLE_V4DI_V4DF_INT
,
732 IX86_BUILTIN_GATHERDIV4DF
);
734 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gathersiv4sf",
735 V4SF_FTYPE_V4SF_PCFLOAT_V4SI_V4SF_INT
,
736 IX86_BUILTIN_GATHERSIV4SF
);
738 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gathersiv8sf",
739 V8SF_FTYPE_V8SF_PCFLOAT_V8SI_V8SF_INT
,
740 IX86_BUILTIN_GATHERSIV8SF
);
742 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gatherdiv4sf",
743 V4SF_FTYPE_V4SF_PCFLOAT_V2DI_V4SF_INT
,
744 IX86_BUILTIN_GATHERDIV4SF
);
746 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gatherdiv4sf256",
747 V4SF_FTYPE_V4SF_PCFLOAT_V4DI_V4SF_INT
,
748 IX86_BUILTIN_GATHERDIV8SF
);
750 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gathersiv2di",
751 V2DI_FTYPE_V2DI_PCINT64_V4SI_V2DI_INT
,
752 IX86_BUILTIN_GATHERSIV2DI
);
754 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gathersiv4di",
755 V4DI_FTYPE_V4DI_PCINT64_V4SI_V4DI_INT
,
756 IX86_BUILTIN_GATHERSIV4DI
);
758 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gatherdiv2di",
759 V2DI_FTYPE_V2DI_PCINT64_V2DI_V2DI_INT
,
760 IX86_BUILTIN_GATHERDIV2DI
);
762 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gatherdiv4di",
763 V4DI_FTYPE_V4DI_PCINT64_V4DI_V4DI_INT
,
764 IX86_BUILTIN_GATHERDIV4DI
);
766 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gathersiv4si",
767 V4SI_FTYPE_V4SI_PCINT_V4SI_V4SI_INT
,
768 IX86_BUILTIN_GATHERSIV4SI
);
770 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gathersiv8si",
771 V8SI_FTYPE_V8SI_PCINT_V8SI_V8SI_INT
,
772 IX86_BUILTIN_GATHERSIV8SI
);
774 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gatherdiv4si",
775 V4SI_FTYPE_V4SI_PCINT_V2DI_V4SI_INT
,
776 IX86_BUILTIN_GATHERDIV4SI
);
778 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gatherdiv4si256",
779 V4SI_FTYPE_V4SI_PCINT_V4DI_V4SI_INT
,
780 IX86_BUILTIN_GATHERDIV8SI
);
782 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gatheraltsiv4df ",
783 V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_V4DF_INT
,
784 IX86_BUILTIN_GATHERALTSIV4DF
);
786 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gatheraltdiv8sf ",
787 V8SF_FTYPE_V8SF_PCFLOAT_V4DI_V8SF_INT
,
788 IX86_BUILTIN_GATHERALTDIV8SF
);
790 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gatheraltsiv4di ",
791 V4DI_FTYPE_V4DI_PCINT64_V8SI_V4DI_INT
,
792 IX86_BUILTIN_GATHERALTSIV4DI
);
794 def_builtin_pure (OPTION_MASK_ISA_AVX2
, 0, "__builtin_ia32_gatheraltdiv8si ",
795 V8SI_FTYPE_V8SI_PCINT_V4DI_V8SI_INT
,
796 IX86_BUILTIN_GATHERALTDIV8SI
);
799 def_builtin_pure (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
800 "__builtin_ia32_gathersiv16sf",
801 V16SF_FTYPE_V16SF_PCVOID_V16SI_HI_INT
,
802 IX86_BUILTIN_GATHER3SIV16SF
);
804 def_builtin_pure (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
805 "__builtin_ia32_gathersiv8df",
806 V8DF_FTYPE_V8DF_PCVOID_V8SI_QI_INT
,
807 IX86_BUILTIN_GATHER3SIV8DF
);
809 def_builtin_pure (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
810 "__builtin_ia32_gatherdiv16sf",
811 V8SF_FTYPE_V8SF_PCVOID_V8DI_QI_INT
,
812 IX86_BUILTIN_GATHER3DIV16SF
);
814 def_builtin_pure (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
815 "__builtin_ia32_gatherdiv8df",
816 V8DF_FTYPE_V8DF_PCVOID_V8DI_QI_INT
,
817 IX86_BUILTIN_GATHER3DIV8DF
);
819 def_builtin_pure (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
820 "__builtin_ia32_gathersiv16si",
821 V16SI_FTYPE_V16SI_PCVOID_V16SI_HI_INT
,
822 IX86_BUILTIN_GATHER3SIV16SI
);
824 def_builtin_pure (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
825 "__builtin_ia32_gathersiv8di",
826 V8DI_FTYPE_V8DI_PCVOID_V8SI_QI_INT
,
827 IX86_BUILTIN_GATHER3SIV8DI
);
829 def_builtin_pure (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
830 "__builtin_ia32_gatherdiv16si",
831 V8SI_FTYPE_V8SI_PCVOID_V8DI_QI_INT
,
832 IX86_BUILTIN_GATHER3DIV16SI
);
834 def_builtin_pure (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
835 "__builtin_ia32_gatherdiv8di",
836 V8DI_FTYPE_V8DI_PCVOID_V8DI_QI_INT
,
837 IX86_BUILTIN_GATHER3DIV8DI
);
839 def_builtin_pure (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
840 "__builtin_ia32_gather3altsiv8df ",
841 V8DF_FTYPE_V8DF_PCDOUBLE_V16SI_QI_INT
,
842 IX86_BUILTIN_GATHER3ALTSIV8DF
);
844 def_builtin_pure (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
845 "__builtin_ia32_gather3altdiv16sf ",
846 V16SF_FTYPE_V16SF_PCFLOAT_V8DI_HI_INT
,
847 IX86_BUILTIN_GATHER3ALTDIV16SF
);
849 def_builtin_pure (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
850 "__builtin_ia32_gather3altsiv8di ",
851 V8DI_FTYPE_V8DI_PCINT64_V16SI_QI_INT
,
852 IX86_BUILTIN_GATHER3ALTSIV8DI
);
854 def_builtin_pure (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
855 "__builtin_ia32_gather3altdiv16si ",
856 V16SI_FTYPE_V16SI_PCINT_V8DI_HI_INT
,
857 IX86_BUILTIN_GATHER3ALTDIV16SI
);
859 def_builtin (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
860 "__builtin_ia32_scattersiv16sf",
861 VOID_FTYPE_PVOID_HI_V16SI_V16SF_INT
,
862 IX86_BUILTIN_SCATTERSIV16SF
);
864 def_builtin (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
865 "__builtin_ia32_scattersiv8df",
866 VOID_FTYPE_PVOID_QI_V8SI_V8DF_INT
,
867 IX86_BUILTIN_SCATTERSIV8DF
);
869 def_builtin (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
870 "__builtin_ia32_scatterdiv16sf",
871 VOID_FTYPE_PVOID_QI_V8DI_V8SF_INT
,
872 IX86_BUILTIN_SCATTERDIV16SF
);
874 def_builtin (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
875 "__builtin_ia32_scatterdiv8df",
876 VOID_FTYPE_PVOID_QI_V8DI_V8DF_INT
,
877 IX86_BUILTIN_SCATTERDIV8DF
);
879 def_builtin (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
880 "__builtin_ia32_scattersiv16si",
881 VOID_FTYPE_PVOID_HI_V16SI_V16SI_INT
,
882 IX86_BUILTIN_SCATTERSIV16SI
);
884 def_builtin (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
885 "__builtin_ia32_scattersiv8di",
886 VOID_FTYPE_PVOID_QI_V8SI_V8DI_INT
,
887 IX86_BUILTIN_SCATTERSIV8DI
);
889 def_builtin (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
890 "__builtin_ia32_scatterdiv16si",
891 VOID_FTYPE_PVOID_QI_V8DI_V8SI_INT
,
892 IX86_BUILTIN_SCATTERDIV16SI
);
894 def_builtin (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
895 "__builtin_ia32_scatterdiv8di",
896 VOID_FTYPE_PVOID_QI_V8DI_V8DI_INT
,
897 IX86_BUILTIN_SCATTERDIV8DI
);
900 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3siv2df",
901 V2DF_FTYPE_V2DF_PCVOID_V4SI_QI_INT
,
902 IX86_BUILTIN_GATHER3SIV2DF
);
904 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3siv4df",
905 V4DF_FTYPE_V4DF_PCVOID_V4SI_QI_INT
,
906 IX86_BUILTIN_GATHER3SIV4DF
);
908 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3div2df",
909 V2DF_FTYPE_V2DF_PCVOID_V2DI_QI_INT
,
910 IX86_BUILTIN_GATHER3DIV2DF
);
912 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3div4df",
913 V4DF_FTYPE_V4DF_PCVOID_V4DI_QI_INT
,
914 IX86_BUILTIN_GATHER3DIV4DF
);
916 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3siv4sf",
917 V4SF_FTYPE_V4SF_PCVOID_V4SI_QI_INT
,
918 IX86_BUILTIN_GATHER3SIV4SF
);
920 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3siv8sf",
921 V8SF_FTYPE_V8SF_PCVOID_V8SI_QI_INT
,
922 IX86_BUILTIN_GATHER3SIV8SF
);
924 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3div4sf",
925 V4SF_FTYPE_V4SF_PCVOID_V2DI_QI_INT
,
926 IX86_BUILTIN_GATHER3DIV4SF
);
928 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3div8sf",
929 V4SF_FTYPE_V4SF_PCVOID_V4DI_QI_INT
,
930 IX86_BUILTIN_GATHER3DIV8SF
);
932 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3siv2di",
933 V2DI_FTYPE_V2DI_PCVOID_V4SI_QI_INT
,
934 IX86_BUILTIN_GATHER3SIV2DI
);
936 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3siv4di",
937 V4DI_FTYPE_V4DI_PCVOID_V4SI_QI_INT
,
938 IX86_BUILTIN_GATHER3SIV4DI
);
940 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3div2di",
941 V2DI_FTYPE_V2DI_PCVOID_V2DI_QI_INT
,
942 IX86_BUILTIN_GATHER3DIV2DI
);
944 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3div4di",
945 V4DI_FTYPE_V4DI_PCVOID_V4DI_QI_INT
,
946 IX86_BUILTIN_GATHER3DIV4DI
);
948 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3siv4si",
949 V4SI_FTYPE_V4SI_PCVOID_V4SI_QI_INT
,
950 IX86_BUILTIN_GATHER3SIV4SI
);
952 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3siv8si",
953 V8SI_FTYPE_V8SI_PCVOID_V8SI_QI_INT
,
954 IX86_BUILTIN_GATHER3SIV8SI
);
956 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3div4si",
957 V4SI_FTYPE_V4SI_PCVOID_V2DI_QI_INT
,
958 IX86_BUILTIN_GATHER3DIV4SI
);
960 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3div8si",
961 V4SI_FTYPE_V4SI_PCVOID_V4DI_QI_INT
,
962 IX86_BUILTIN_GATHER3DIV8SI
);
964 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3altsiv4df ",
965 V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_QI_INT
,
966 IX86_BUILTIN_GATHER3ALTSIV4DF
);
968 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3altdiv8sf ",
969 V8SF_FTYPE_V8SF_PCFLOAT_V4DI_QI_INT
,
970 IX86_BUILTIN_GATHER3ALTDIV8SF
);
972 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3altsiv4di ",
973 V4DI_FTYPE_V4DI_PCINT64_V8SI_QI_INT
,
974 IX86_BUILTIN_GATHER3ALTSIV4DI
);
976 def_builtin_pure (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_gather3altdiv8si ",
977 V8SI_FTYPE_V8SI_PCINT_V4DI_QI_INT
,
978 IX86_BUILTIN_GATHER3ALTDIV8SI
);
980 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scattersiv8sf",
981 VOID_FTYPE_PVOID_QI_V8SI_V8SF_INT
,
982 IX86_BUILTIN_SCATTERSIV8SF
);
984 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scattersiv4sf",
985 VOID_FTYPE_PVOID_QI_V4SI_V4SF_INT
,
986 IX86_BUILTIN_SCATTERSIV4SF
);
988 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scattersiv4df",
989 VOID_FTYPE_PVOID_QI_V4SI_V4DF_INT
,
990 IX86_BUILTIN_SCATTERSIV4DF
);
992 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scattersiv2df",
993 VOID_FTYPE_PVOID_QI_V4SI_V2DF_INT
,
994 IX86_BUILTIN_SCATTERSIV2DF
);
996 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scatterdiv8sf",
997 VOID_FTYPE_PVOID_QI_V4DI_V4SF_INT
,
998 IX86_BUILTIN_SCATTERDIV8SF
);
1000 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scatterdiv4sf",
1001 VOID_FTYPE_PVOID_QI_V2DI_V4SF_INT
,
1002 IX86_BUILTIN_SCATTERDIV4SF
);
1004 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scatterdiv4df",
1005 VOID_FTYPE_PVOID_QI_V4DI_V4DF_INT
,
1006 IX86_BUILTIN_SCATTERDIV4DF
);
1008 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scatterdiv2df",
1009 VOID_FTYPE_PVOID_QI_V2DI_V2DF_INT
,
1010 IX86_BUILTIN_SCATTERDIV2DF
);
1012 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scattersiv8si",
1013 VOID_FTYPE_PVOID_QI_V8SI_V8SI_INT
,
1014 IX86_BUILTIN_SCATTERSIV8SI
);
1016 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scattersiv4si",
1017 VOID_FTYPE_PVOID_QI_V4SI_V4SI_INT
,
1018 IX86_BUILTIN_SCATTERSIV4SI
);
1020 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scattersiv4di",
1021 VOID_FTYPE_PVOID_QI_V4SI_V4DI_INT
,
1022 IX86_BUILTIN_SCATTERSIV4DI
);
1024 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scattersiv2di",
1025 VOID_FTYPE_PVOID_QI_V4SI_V2DI_INT
,
1026 IX86_BUILTIN_SCATTERSIV2DI
);
1028 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scatterdiv8si",
1029 VOID_FTYPE_PVOID_QI_V4DI_V4SI_INT
,
1030 IX86_BUILTIN_SCATTERDIV8SI
);
1032 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scatterdiv4si",
1033 VOID_FTYPE_PVOID_QI_V2DI_V4SI_INT
,
1034 IX86_BUILTIN_SCATTERDIV4SI
);
1036 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scatterdiv4di",
1037 VOID_FTYPE_PVOID_QI_V4DI_V4DI_INT
,
1038 IX86_BUILTIN_SCATTERDIV4DI
);
1040 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scatterdiv2di",
1041 VOID_FTYPE_PVOID_QI_V2DI_V2DI_INT
,
1042 IX86_BUILTIN_SCATTERDIV2DI
);
1044 def_builtin (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
1045 "__builtin_ia32_scatteraltsiv8df ",
1046 VOID_FTYPE_PDOUBLE_QI_V16SI_V8DF_INT
,
1047 IX86_BUILTIN_SCATTERALTSIV8DF
);
1049 def_builtin (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
1050 "__builtin_ia32_scatteraltdiv16sf ",
1051 VOID_FTYPE_PFLOAT_HI_V8DI_V16SF_INT
,
1052 IX86_BUILTIN_SCATTERALTDIV16SF
);
1054 def_builtin (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
1055 "__builtin_ia32_scatteraltsiv8di ",
1056 VOID_FTYPE_PLONGLONG_QI_V16SI_V8DI_INT
,
1057 IX86_BUILTIN_SCATTERALTSIV8DI
);
1059 def_builtin (OPTION_MASK_ISA_AVX512F
, OPTION_MASK_ISA2_EVEX512
,
1060 "__builtin_ia32_scatteraltdiv16si ",
1061 VOID_FTYPE_PINT_HI_V8DI_V16SI_INT
,
1062 IX86_BUILTIN_SCATTERALTDIV16SI
);
1064 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scatteraltsiv4df ",
1065 VOID_FTYPE_PDOUBLE_QI_V8SI_V4DF_INT
,
1066 IX86_BUILTIN_SCATTERALTSIV4DF
);
1068 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scatteraltdiv8sf ",
1069 VOID_FTYPE_PFLOAT_QI_V4DI_V8SF_INT
,
1070 IX86_BUILTIN_SCATTERALTDIV8SF
);
1072 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scatteraltsiv4di ",
1073 VOID_FTYPE_PLONGLONG_QI_V8SI_V4DI_INT
,
1074 IX86_BUILTIN_SCATTERALTSIV4DI
);
1076 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scatteraltdiv8si ",
1077 VOID_FTYPE_PINT_QI_V4DI_V8SI_INT
,
1078 IX86_BUILTIN_SCATTERALTDIV8SI
);
1080 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scatteraltsiv2df ",
1081 VOID_FTYPE_PDOUBLE_QI_V4SI_V2DF_INT
,
1082 IX86_BUILTIN_SCATTERALTSIV2DF
);
1084 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scatteraltdiv4sf ",
1085 VOID_FTYPE_PFLOAT_QI_V2DI_V4SF_INT
,
1086 IX86_BUILTIN_SCATTERALTDIV4SF
);
1088 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scatteraltsiv2di ",
1089 VOID_FTYPE_PLONGLONG_QI_V4SI_V2DI_INT
,
1090 IX86_BUILTIN_SCATTERALTSIV2DI
);
1092 def_builtin (OPTION_MASK_ISA_AVX512VL
, 0, "__builtin_ia32_scatteraltdiv4si ",
1093 VOID_FTYPE_PINT_QI_V2DI_V4SI_INT
,
1094 IX86_BUILTIN_SCATTERALTDIV4SI
);
1097 def_builtin (OPTION_MASK_ISA_AVX512PF
, 0, "__builtin_ia32_gatherpfdpd",
1098 VOID_FTYPE_QI_V8SI_PCVOID_INT_INT
,
1099 IX86_BUILTIN_GATHERPFDPD
);
1100 def_builtin (OPTION_MASK_ISA_AVX512PF
, 0, "__builtin_ia32_gatherpfdps",
1101 VOID_FTYPE_HI_V16SI_PCVOID_INT_INT
,
1102 IX86_BUILTIN_GATHERPFDPS
);
1103 def_builtin (OPTION_MASK_ISA_AVX512PF
, 0, "__builtin_ia32_gatherpfqpd",
1104 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT
,
1105 IX86_BUILTIN_GATHERPFQPD
);
1106 def_builtin (OPTION_MASK_ISA_AVX512PF
, 0, "__builtin_ia32_gatherpfqps",
1107 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT
,
1108 IX86_BUILTIN_GATHERPFQPS
);
1109 def_builtin (OPTION_MASK_ISA_AVX512PF
, 0, "__builtin_ia32_scatterpfdpd",
1110 VOID_FTYPE_QI_V8SI_PCVOID_INT_INT
,
1111 IX86_BUILTIN_SCATTERPFDPD
);
1112 def_builtin (OPTION_MASK_ISA_AVX512PF
, 0, "__builtin_ia32_scatterpfdps",
1113 VOID_FTYPE_HI_V16SI_PCVOID_INT_INT
,
1114 IX86_BUILTIN_SCATTERPFDPS
);
1115 def_builtin (OPTION_MASK_ISA_AVX512PF
, 0, "__builtin_ia32_scatterpfqpd",
1116 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT
,
1117 IX86_BUILTIN_SCATTERPFQPD
);
1118 def_builtin (OPTION_MASK_ISA_AVX512PF
, 0, "__builtin_ia32_scatterpfqps",
1119 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT
,
1120 IX86_BUILTIN_SCATTERPFQPS
);
1123 def_builtin_const (OPTION_MASK_ISA_SHA
, 0, "__builtin_ia32_sha1msg1",
1124 V4SI_FTYPE_V4SI_V4SI
, IX86_BUILTIN_SHA1MSG1
);
1125 def_builtin_const (OPTION_MASK_ISA_SHA
, 0, "__builtin_ia32_sha1msg2",
1126 V4SI_FTYPE_V4SI_V4SI
, IX86_BUILTIN_SHA1MSG2
);
1127 def_builtin_const (OPTION_MASK_ISA_SHA
, 0, "__builtin_ia32_sha1nexte",
1128 V4SI_FTYPE_V4SI_V4SI
, IX86_BUILTIN_SHA1NEXTE
);
1129 def_builtin_const (OPTION_MASK_ISA_SHA
, 0, "__builtin_ia32_sha1rnds4",
1130 V4SI_FTYPE_V4SI_V4SI_INT
, IX86_BUILTIN_SHA1RNDS4
);
1131 def_builtin_const (OPTION_MASK_ISA_SHA
, 0, "__builtin_ia32_sha256msg1",
1132 V4SI_FTYPE_V4SI_V4SI
, IX86_BUILTIN_SHA256MSG1
);
1133 def_builtin_const (OPTION_MASK_ISA_SHA
, 0, "__builtin_ia32_sha256msg2",
1134 V4SI_FTYPE_V4SI_V4SI
, IX86_BUILTIN_SHA256MSG2
);
1135 def_builtin_const (OPTION_MASK_ISA_SHA
, 0, "__builtin_ia32_sha256rnds2",
1136 V4SI_FTYPE_V4SI_V4SI_V4SI
, IX86_BUILTIN_SHA256RNDS2
);
1139 def_builtin (OPTION_MASK_ISA_RTM
, 0, "__builtin_ia32_xabort",
1140 VOID_FTYPE_UNSIGNED
, IX86_BUILTIN_XABORT
);
1142 /* MMX access to the vec_init patterns. */
1143 def_builtin_const (OPTION_MASK_ISA_MMX
, 0,
1144 "__builtin_ia32_vec_init_v2si",
1145 V2SI_FTYPE_INT_INT
, IX86_BUILTIN_VEC_INIT_V2SI
);
1147 def_builtin_const (OPTION_MASK_ISA_MMX
, 0,
1148 "__builtin_ia32_vec_init_v4hi",
1149 V4HI_FTYPE_HI_HI_HI_HI
,
1150 IX86_BUILTIN_VEC_INIT_V4HI
);
1152 def_builtin_const (OPTION_MASK_ISA_MMX
, 0,
1153 "__builtin_ia32_vec_init_v8qi",
1154 V8QI_FTYPE_QI_QI_QI_QI_QI_QI_QI_QI
,
1155 IX86_BUILTIN_VEC_INIT_V8QI
);
1157 /* Access to the vec_extract patterns. */
1158 def_builtin_const (OPTION_MASK_ISA_SSE2
, 0, "__builtin_ia32_vec_ext_v2df",
1159 DOUBLE_FTYPE_V2DF_INT
, IX86_BUILTIN_VEC_EXT_V2DF
);
1160 def_builtin_const (OPTION_MASK_ISA_SSE2
, 0, "__builtin_ia32_vec_ext_v2di",
1161 DI_FTYPE_V2DI_INT
, IX86_BUILTIN_VEC_EXT_V2DI
);
1162 def_builtin_const (OPTION_MASK_ISA_SSE
, 0, "__builtin_ia32_vec_ext_v4sf",
1163 FLOAT_FTYPE_V4SF_INT
, IX86_BUILTIN_VEC_EXT_V4SF
);
1164 def_builtin_const (OPTION_MASK_ISA_SSE2
, 0, "__builtin_ia32_vec_ext_v4si",
1165 SI_FTYPE_V4SI_INT
, IX86_BUILTIN_VEC_EXT_V4SI
);
1166 def_builtin_const (OPTION_MASK_ISA_SSE2
, 0, "__builtin_ia32_vec_ext_v8hi",
1167 HI_FTYPE_V8HI_INT
, IX86_BUILTIN_VEC_EXT_V8HI
);
1169 def_builtin_const (OPTION_MASK_ISA_SSE
| OPTION_MASK_ISA_3DNOW_A
1170 /* As it uses V4HImode, we have to require -mmmx too. */
1171 | OPTION_MASK_ISA_MMX
, 0,
1172 "__builtin_ia32_vec_ext_v4hi",
1173 HI_FTYPE_V4HI_INT
, IX86_BUILTIN_VEC_EXT_V4HI
);
1175 def_builtin_const (OPTION_MASK_ISA_MMX
, 0,
1176 "__builtin_ia32_vec_ext_v2si",
1177 SI_FTYPE_V2SI_INT
, IX86_BUILTIN_VEC_EXT_V2SI
);
1179 def_builtin_const (OPTION_MASK_ISA_SSE2
, 0, "__builtin_ia32_vec_ext_v16qi",
1180 QI_FTYPE_V16QI_INT
, IX86_BUILTIN_VEC_EXT_V16QI
);
1182 /* Access to the vec_set patterns. */
1183 def_builtin_const (OPTION_MASK_ISA_SSE4_1
| OPTION_MASK_ISA_64BIT
, 0,
1184 "__builtin_ia32_vec_set_v2di",
1185 V2DI_FTYPE_V2DI_DI_INT
, IX86_BUILTIN_VEC_SET_V2DI
);
1187 def_builtin_const (OPTION_MASK_ISA_SSE4_1
, 0, "__builtin_ia32_vec_set_v4sf",
1188 V4SF_FTYPE_V4SF_FLOAT_INT
, IX86_BUILTIN_VEC_SET_V4SF
);
1190 def_builtin_const (OPTION_MASK_ISA_SSE4_1
, 0, "__builtin_ia32_vec_set_v4si",
1191 V4SI_FTYPE_V4SI_SI_INT
, IX86_BUILTIN_VEC_SET_V4SI
);
1193 def_builtin_const (OPTION_MASK_ISA_SSE2
, 0, "__builtin_ia32_vec_set_v8hi",
1194 V8HI_FTYPE_V8HI_HI_INT
, IX86_BUILTIN_VEC_SET_V8HI
);
1196 def_builtin_const (OPTION_MASK_ISA_SSE
| OPTION_MASK_ISA_3DNOW_A
1197 /* As it uses V4HImode, we have to require -mmmx too. */
1198 | OPTION_MASK_ISA_MMX
, 0,
1199 "__builtin_ia32_vec_set_v4hi",
1200 V4HI_FTYPE_V4HI_HI_INT
, IX86_BUILTIN_VEC_SET_V4HI
);
1202 def_builtin_const (OPTION_MASK_ISA_SSE4_1
, 0, "__builtin_ia32_vec_set_v16qi",
1203 V16QI_FTYPE_V16QI_QI_INT
, IX86_BUILTIN_VEC_SET_V16QI
);
1206 def_builtin (OPTION_MASK_ISA_RDSEED
, 0, "__builtin_ia32_rdseed_hi_step",
1207 INT_FTYPE_PUSHORT
, IX86_BUILTIN_RDSEED16_STEP
);
1208 def_builtin (OPTION_MASK_ISA_RDSEED
, 0, "__builtin_ia32_rdseed_si_step",
1209 INT_FTYPE_PUNSIGNED
, IX86_BUILTIN_RDSEED32_STEP
);
1210 def_builtin (OPTION_MASK_ISA_RDSEED
| OPTION_MASK_ISA_64BIT
, 0,
1211 "__builtin_ia32_rdseed_di_step",
1212 INT_FTYPE_PULONGLONG
, IX86_BUILTIN_RDSEED64_STEP
);
1215 def_builtin (0, 0, "__builtin_ia32_addcarryx_u32",
1216 UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED
, IX86_BUILTIN_ADDCARRYX32
);
1217 def_builtin (OPTION_MASK_ISA_64BIT
, 0,
1218 "__builtin_ia32_addcarryx_u64",
1219 UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG
,
1220 IX86_BUILTIN_ADDCARRYX64
);
1223 def_builtin (0, 0, "__builtin_ia32_sbb_u32",
1224 UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED
, IX86_BUILTIN_SBB32
);
1225 def_builtin (OPTION_MASK_ISA_64BIT
, 0,
1226 "__builtin_ia32_sbb_u64",
1227 UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG
,
1228 IX86_BUILTIN_SBB64
);
1230 /* Read/write FLAGS. */
1233 def_builtin (OPTION_MASK_ISA_64BIT
, 0, "__builtin_ia32_readeflags_u64",
1234 UINT64_FTYPE_VOID
, IX86_BUILTIN_READ_FLAGS
);
1235 def_builtin (OPTION_MASK_ISA_64BIT
, 0, "__builtin_ia32_writeeflags_u64",
1236 VOID_FTYPE_UINT64
, IX86_BUILTIN_WRITE_FLAGS
);
1240 def_builtin (0, 0, "__builtin_ia32_readeflags_u32",
1241 UNSIGNED_FTYPE_VOID
, IX86_BUILTIN_READ_FLAGS
);
1242 def_builtin (0, 0, "__builtin_ia32_writeeflags_u32",
1243 VOID_FTYPE_UNSIGNED
, IX86_BUILTIN_WRITE_FLAGS
);
1247 def_builtin (OPTION_MASK_ISA_CLFLUSHOPT
, 0, "__builtin_ia32_clflushopt",
1248 VOID_FTYPE_PCVOID
, IX86_BUILTIN_CLFLUSHOPT
);
1251 def_builtin (OPTION_MASK_ISA_CLWB
, 0, "__builtin_ia32_clwb",
1252 VOID_FTYPE_PCVOID
, IX86_BUILTIN_CLWB
);
1254 /* MONITORX and MWAITX. */
1255 def_builtin (0, OPTION_MASK_ISA2_MWAITX
, "__builtin_ia32_monitorx",
1256 VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED
, IX86_BUILTIN_MONITORX
);
1257 def_builtin (0, OPTION_MASK_ISA2_MWAITX
, "__builtin_ia32_mwaitx",
1258 VOID_FTYPE_UNSIGNED_UNSIGNED_UNSIGNED
, IX86_BUILTIN_MWAITX
);
1261 def_builtin (0, OPTION_MASK_ISA2_CLZERO
, "__builtin_ia32_clzero",
1262 VOID_FTYPE_PCVOID
, IX86_BUILTIN_CLZERO
);
1265 def_builtin (0, OPTION_MASK_ISA2_WAITPKG
, "__builtin_ia32_umonitor",
1266 VOID_FTYPE_PVOID
, IX86_BUILTIN_UMONITOR
);
1267 def_builtin (0, OPTION_MASK_ISA2_WAITPKG
, "__builtin_ia32_umwait",
1268 UINT8_FTYPE_UNSIGNED_UINT64
, IX86_BUILTIN_UMWAIT
);
1269 def_builtin (0, OPTION_MASK_ISA2_WAITPKG
, "__builtin_ia32_tpause",
1270 UINT8_FTYPE_UNSIGNED_UINT64
, IX86_BUILTIN_TPAUSE
);
1273 def_builtin (OPTION_MASK_ISA_64BIT
, OPTION_MASK_ISA2_UINTR
,
1274 "__builtin_ia32_testui",
1275 UINT8_FTYPE_VOID
, IX86_BUILTIN_TESTUI
);
1278 def_builtin (OPTION_MASK_ISA_64BIT
, OPTION_MASK_ISA2_USER_MSR
,
1279 "__builtin_ia32_urdmsr", UINT64_FTYPE_UINT64
,
1280 IX86_BUILTIN_URDMSR
);
1281 def_builtin (OPTION_MASK_ISA_64BIT
, OPTION_MASK_ISA2_USER_MSR
,
1282 "__builtin_ia32_uwrmsr", VOID_FTYPE_UINT64_UINT64
,
1283 IX86_BUILTIN_UWRMSR
);
1286 def_builtin (0, OPTION_MASK_ISA2_CLDEMOTE
, "__builtin_ia32_cldemote",
1287 VOID_FTYPE_PCVOID
, IX86_BUILTIN_CLDEMOTE
);
1289 /* Add FMA4 multi-arg argument instructions */
1290 for (i
= 0, d
= bdesc_multi_arg
; i
< ARRAY_SIZE (bdesc_multi_arg
); i
++, d
++)
1292 BDESC_VERIFY (d
->code
, IX86_BUILTIN__BDESC_MULTI_ARG_FIRST
, i
);
1296 ftype
= (enum ix86_builtin_func_type
) d
->flag
;
1297 def_builtin_const (d
->mask
, d
->mask2
, d
->name
, ftype
, d
->code
);
1299 BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_LAST
,
1300 IX86_BUILTIN__BDESC_MULTI_ARG_FIRST
,
1301 ARRAY_SIZE (bdesc_multi_arg
) - 1);
1303 /* Add CET inrinsics. */
1304 for (i
= 0, d
= bdesc_cet
; i
< ARRAY_SIZE (bdesc_cet
); i
++, d
++)
1306 BDESC_VERIFY (d
->code
, IX86_BUILTIN__BDESC_CET_FIRST
, i
);
1310 ftype
= (enum ix86_builtin_func_type
) d
->flag
;
1311 def_builtin (d
->mask
, d
->mask2
, d
->name
, ftype
, d
->code
);
1313 BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_LAST
,
1314 IX86_BUILTIN__BDESC_CET_FIRST
,
1315 ARRAY_SIZE (bdesc_cet
) - 1);
1319 #undef BDESC_VERIFYS
1321 /* Make builtins to detect cpu type and features supported. NAME is
1322 the builtin name, CODE is the builtin code, and FTYPE is the function
1323 type of the builtin. */
1326 make_cpu_type_builtin (const char* name
, int code
,
1327 enum ix86_builtin_func_type ftype
, bool is_const
)
1332 type
= ix86_get_builtin_func_type (ftype
);
1333 decl
= add_builtin_function (name
, type
, code
, BUILT_IN_MD
,
1335 gcc_assert (decl
!= NULL_TREE
);
1336 ix86_builtins
[(int) code
] = decl
;
1337 TREE_READONLY (decl
) = is_const
;
1340 /* Make builtins to get CPU type and features supported. The created
1343 __builtin_cpu_init (), to detect cpu type and features,
1344 __builtin_cpu_is ("<CPUNAME>"), to check if cpu is of type <CPUNAME>,
1345 __builtin_cpu_supports ("<FEATURE>"), to check if cpu supports <FEATURE>
1349 ix86_init_platform_type_builtins (void)
1351 make_cpu_type_builtin ("__builtin_cpu_init", IX86_BUILTIN_CPU_INIT
,
1352 INT_FTYPE_VOID
, false);
1353 make_cpu_type_builtin ("__builtin_cpu_is", IX86_BUILTIN_CPU_IS
,
1354 INT_FTYPE_PCCHAR
, true);
1355 make_cpu_type_builtin ("__builtin_cpu_supports", IX86_BUILTIN_CPU_SUPPORTS
,
1356 INT_FTYPE_PCCHAR
, true);
1359 /* Internal method for ix86_init_builtins. */
1362 ix86_init_builtins_va_builtins_abi (void)
1364 tree ms_va_ref
, sysv_va_ref
;
1365 tree fnvoid_va_end_ms
, fnvoid_va_end_sysv
;
1366 tree fnvoid_va_start_ms
, fnvoid_va_start_sysv
;
1367 tree fnvoid_va_copy_ms
, fnvoid_va_copy_sysv
;
1368 tree fnattr_ms
= NULL_TREE
, fnattr_sysv
= NULL_TREE
;
1372 fnattr_ms
= build_tree_list (get_identifier ("ms_abi"), NULL_TREE
);
1373 fnattr_sysv
= build_tree_list (get_identifier ("sysv_abi"), NULL_TREE
);
1374 ms_va_ref
= build_reference_type (ms_va_list_type_node
);
1375 sysv_va_ref
= build_pointer_type (TREE_TYPE (sysv_va_list_type_node
));
1377 fnvoid_va_end_ms
= build_function_type_list (void_type_node
, ms_va_ref
,
1380 = build_varargs_function_type_list (void_type_node
, ms_va_ref
, NULL_TREE
);
1382 = build_function_type_list (void_type_node
, sysv_va_ref
, NULL_TREE
);
1383 fnvoid_va_start_sysv
1384 = build_varargs_function_type_list (void_type_node
, sysv_va_ref
,
1387 = build_function_type_list (void_type_node
, ms_va_ref
,
1388 ms_va_list_type_node
, NULL_TREE
);
1390 = build_function_type_list (void_type_node
, sysv_va_ref
,
1391 sysv_va_ref
, NULL_TREE
);
1393 add_builtin_function ("__builtin_ms_va_start", fnvoid_va_start_ms
,
1394 BUILT_IN_VA_START
, BUILT_IN_NORMAL
, NULL
, fnattr_ms
);
1395 add_builtin_function ("__builtin_ms_va_end", fnvoid_va_end_ms
,
1396 BUILT_IN_VA_END
, BUILT_IN_NORMAL
, NULL
, fnattr_ms
);
1397 add_builtin_function ("__builtin_ms_va_copy", fnvoid_va_copy_ms
,
1398 BUILT_IN_VA_COPY
, BUILT_IN_NORMAL
, NULL
, fnattr_ms
);
1399 add_builtin_function ("__builtin_sysv_va_start", fnvoid_va_start_sysv
,
1400 BUILT_IN_VA_START
, BUILT_IN_NORMAL
, NULL
, fnattr_sysv
);
1401 add_builtin_function ("__builtin_sysv_va_end", fnvoid_va_end_sysv
,
1402 BUILT_IN_VA_END
, BUILT_IN_NORMAL
, NULL
, fnattr_sysv
);
1403 add_builtin_function ("__builtin_sysv_va_copy", fnvoid_va_copy_sysv
,
1404 BUILT_IN_VA_COPY
, BUILT_IN_NORMAL
, NULL
, fnattr_sysv
);
1408 ix86_register_float16_builtin_type (void)
1410 /* Provide the _Float16 type and float16_type_node if needed so that
1411 it can be used in AVX512FP16 intrinsics and builtins. */
1412 if (!float16_type_node
)
1414 ix86_float16_type_node
= make_node (REAL_TYPE
);
1415 TYPE_PRECISION (ix86_float16_type_node
) = 16;
1416 SET_TYPE_MODE (ix86_float16_type_node
, HFmode
);
1417 layout_type (ix86_float16_type_node
);
1420 ix86_float16_type_node
= float16_type_node
;
1422 if (!maybe_get_identifier ("_Float16"))
1423 lang_hooks
.types
.register_builtin_type (ix86_float16_type_node
,
1428 ix86_register_bf16_builtin_type (void)
1430 if (bfloat16_type_node
== NULL_TREE
)
1432 ix86_bf16_type_node
= make_node (REAL_TYPE
);
1433 TYPE_PRECISION (ix86_bf16_type_node
) = 16;
1434 SET_TYPE_MODE (ix86_bf16_type_node
, BFmode
);
1435 layout_type (ix86_bf16_type_node
);
1438 ix86_bf16_type_node
= bfloat16_type_node
;
1440 if (!maybe_get_identifier ("__bf16"))
1441 lang_hooks
.types
.register_builtin_type (ix86_bf16_type_node
, "__bf16");
1445 ix86_init_builtin_types (void)
1447 tree float80_type_node
, const_string_type_node
;
1449 /* The __float80 type. */
1450 float80_type_node
= long_double_type_node
;
1451 if (TYPE_MODE (float80_type_node
) != XFmode
)
1453 if (float64x_type_node
!= NULL_TREE
1454 && TYPE_MODE (float64x_type_node
) == XFmode
)
1455 float80_type_node
= float64x_type_node
;
1458 /* The __float80 type. */
1459 float80_type_node
= make_node (REAL_TYPE
);
1461 TYPE_PRECISION (float80_type_node
) = 80;
1462 layout_type (float80_type_node
);
1465 lang_hooks
.types
.register_builtin_type (float80_type_node
, "__float80");
1467 /* The __float128 type. The node has already been created as
1468 _Float128, so for C we only need to register the __float128 name for
1469 it. For C++, we create a distinct type which will mangle differently
1470 (g) vs. _Float128 (DF128_) and behave backwards compatibly. */
1471 if (float128t_type_node
== NULL_TREE
)
1473 float128t_type_node
= make_node (REAL_TYPE
);
1474 TYPE_PRECISION (float128t_type_node
)
1475 = TYPE_PRECISION (float128_type_node
);
1476 SET_TYPE_MODE (float128t_type_node
, TYPE_MODE (float128_type_node
));
1477 layout_type (float128t_type_node
);
1479 lang_hooks
.types
.register_builtin_type (float128t_type_node
, "__float128");
1481 ix86_register_float16_builtin_type ();
1483 ix86_register_bf16_builtin_type ();
1485 const_string_type_node
1486 = build_pointer_type (build_qualified_type
1487 (char_type_node
, TYPE_QUAL_CONST
));
1489 /* This macro is built by i386-builtin-types.awk. */
1490 DEFINE_BUILTIN_PRIMITIVE_TYPES
;
1494 ix86_init_builtins (void)
1498 ix86_init_builtin_types ();
1500 /* Builtins to get CPU type and features. */
1501 ix86_init_platform_type_builtins ();
1503 /* TFmode support builtins. */
1504 def_builtin_const (0, 0, "__builtin_infq",
1505 FLOAT128_FTYPE_VOID
, IX86_BUILTIN_INFQ
);
1506 def_builtin_const (0, 0, "__builtin_huge_valq",
1507 FLOAT128_FTYPE_VOID
, IX86_BUILTIN_HUGE_VALQ
);
1509 ftype
= ix86_get_builtin_func_type (FLOAT128_FTYPE_CONST_STRING
);
1510 decl
= add_builtin_function ("__builtin_nanq", ftype
, IX86_BUILTIN_NANQ
,
1511 BUILT_IN_MD
, "nanq", NULL_TREE
);
1512 TREE_READONLY (decl
) = 1;
1513 ix86_builtins
[(int) IX86_BUILTIN_NANQ
] = decl
;
1515 decl
= add_builtin_function ("__builtin_nansq", ftype
, IX86_BUILTIN_NANSQ
,
1516 BUILT_IN_MD
, "nansq", NULL_TREE
);
1517 TREE_READONLY (decl
) = 1;
1518 ix86_builtins
[(int) IX86_BUILTIN_NANSQ
] = decl
;
1520 /* We will expand them to normal call if SSE isn't available since
1521 they are used by libgcc. */
1522 ftype
= ix86_get_builtin_func_type (FLOAT128_FTYPE_FLOAT128
);
1523 decl
= add_builtin_function ("__builtin_fabsq", ftype
, IX86_BUILTIN_FABSQ
,
1524 BUILT_IN_MD
, "__fabstf2", NULL_TREE
);
1525 TREE_READONLY (decl
) = 1;
1526 ix86_builtins
[(int) IX86_BUILTIN_FABSQ
] = decl
;
1528 ftype
= ix86_get_builtin_func_type (FLOAT128_FTYPE_FLOAT128_FLOAT128
);
1529 decl
= add_builtin_function ("__builtin_copysignq", ftype
,
1530 IX86_BUILTIN_COPYSIGNQ
, BUILT_IN_MD
,
1531 "__copysigntf3", NULL_TREE
);
1532 TREE_READONLY (decl
) = 1;
1533 ix86_builtins
[(int) IX86_BUILTIN_COPYSIGNQ
] = decl
;
1535 ix86_init_tm_builtins ();
1536 ix86_init_mmx_sse_builtins ();
1539 ix86_init_builtins_va_builtins_abi ();
1541 #ifdef SUBTARGET_INIT_BUILTINS
1542 SUBTARGET_INIT_BUILTINS
;
1546 /* Return the ix86 builtin for CODE. */
1549 ix86_builtin_decl (unsigned code
, bool)
1551 if (code
>= IX86_BUILTIN_MAX
)
1552 return error_mark_node
;
1554 return ix86_builtins
[code
];
1557 /* This returns the target-specific builtin with code CODE if
1558 current_function_decl has visibility on this builtin, which is checked
1559 using isa flags. Returns NULL_TREE otherwise. */
1561 static tree
ix86_get_builtin (enum ix86_builtins code
)
1563 struct cl_target_option
*opts
;
1564 tree target_tree
= NULL_TREE
;
1566 /* Determine the isa flags of current_function_decl. */
1568 if (current_function_decl
)
1569 target_tree
= DECL_FUNCTION_SPECIFIC_TARGET (current_function_decl
);
1571 if (target_tree
== NULL
)
1572 target_tree
= target_option_default_node
;
1574 opts
= TREE_TARGET_OPTION (target_tree
);
1576 if ((ix86_builtins_isa
[(int) code
].isa
& opts
->x_ix86_isa_flags
)
1577 || (ix86_builtins_isa
[(int) code
].isa2
& opts
->x_ix86_isa_flags2
))
1578 return ix86_builtin_decl (code
, true);
1583 /* Vectorization library interface and handlers. */
1584 tree (*ix86_veclib_handler
) (combined_fn
, tree
, tree
);
1586 /* Returns a function decl for a vectorized version of the combined function
1587 with combined_fn code FN and the result vector type TYPE, or NULL_TREE
1588 if it is not available. */
1591 ix86_builtin_vectorized_function (unsigned int fn
, tree type_out
,
1594 machine_mode in_mode
, out_mode
;
1597 if (TREE_CODE (type_out
) != VECTOR_TYPE
1598 || TREE_CODE (type_in
) != VECTOR_TYPE
)
1601 out_mode
= TYPE_MODE (TREE_TYPE (type_out
));
1602 out_n
= TYPE_VECTOR_SUBPARTS (type_out
);
1603 in_mode
= TYPE_MODE (TREE_TYPE (type_in
));
1604 in_n
= TYPE_VECTOR_SUBPARTS (type_in
);
1610 /* The round insn does not trap on denormals. */
1611 if (flag_trapping_math
|| !TARGET_SSE4_1
)
1614 /* PR106910, currently vectorizer doesn't go direct internal fn way
1615 when out_n != in_n, so let's still keep this.
1616 Otherwise, it relies on expander of
1617 lceilmn2/lfloormn2/lroundmn2/lrintmn2. */
1618 if (out_mode
== SImode
&& in_mode
== DFmode
)
1620 if (out_n
== 4 && in_n
== 2)
1621 return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX
);
1622 else if (out_n
== 8 && in_n
== 4)
1623 return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX256
);
1624 else if (out_n
== 16 && in_n
== 8)
1625 return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX512
);
1631 /* The round insn does not trap on denormals. */
1632 if (flag_trapping_math
|| !TARGET_SSE4_1
)
1635 if (out_mode
== SImode
&& in_mode
== DFmode
)
1637 if (out_n
== 4 && in_n
== 2)
1638 return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX
);
1639 else if (out_n
== 8 && in_n
== 4)
1640 return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX256
);
1641 else if (out_n
== 16 && in_n
== 8)
1642 return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX512
);
1648 if (out_mode
== SImode
&& in_mode
== DFmode
)
1650 if (out_n
== 4 && in_n
== 2)
1651 return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX
);
1652 else if (out_n
== 8 && in_n
== 4)
1653 return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX256
);
1654 else if (out_n
== 16 && in_n
== 8)
1655 return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX512
);
1661 /* The round insn does not trap on denormals. */
1662 if (flag_trapping_math
|| !TARGET_SSE4_1
)
1665 if (out_mode
== SImode
&& in_mode
== DFmode
)
1667 if (out_n
== 4 && in_n
== 2)
1668 return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX
);
1669 else if (out_n
== 8 && in_n
== 4)
1670 return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX256
);
1671 else if (out_n
== 16 && in_n
== 8)
1672 return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX512
);
1681 /* Dispatch to a handler for a vectorization library. */
1682 if (ix86_veclib_handler
)
1683 return ix86_veclib_handler (combined_fn (fn
), type_out
, type_in
);
1688 /* Returns a decl of a function that implements gather load with
1689 memory type MEM_VECTYPE and index type INDEX_VECTYPE and SCALE.
1690 Return NULL_TREE if it is not available. */
1693 ix86_vectorize_builtin_gather (const_tree mem_vectype
,
1694 const_tree index_type
, int scale
)
1697 enum ix86_builtins code
;
1698 const machine_mode mode
= TYPE_MODE (TREE_TYPE (mem_vectype
));
1700 if ((!TARGET_AVX512F
|| !TARGET_EVEX512
) && GET_MODE_SIZE (mode
) == 64)
1704 || (known_eq (TYPE_VECTOR_SUBPARTS (mem_vectype
), 2u)
1705 ? !TARGET_USE_GATHER_2PARTS
1706 : (known_eq (TYPE_VECTOR_SUBPARTS (mem_vectype
), 4u)
1707 ? !TARGET_USE_GATHER_4PARTS
1708 : !TARGET_USE_GATHER_8PARTS
)))
1711 if ((TREE_CODE (index_type
) != INTEGER_TYPE
1712 && !POINTER_TYPE_P (index_type
))
1713 || (TYPE_MODE (index_type
) != SImode
1714 && TYPE_MODE (index_type
) != DImode
))
1717 if (TYPE_PRECISION (index_type
) > POINTER_SIZE
)
1720 /* v*gather* insn sign extends index to pointer mode. */
1721 if (TYPE_PRECISION (index_type
) < POINTER_SIZE
1722 && TYPE_UNSIGNED (index_type
))
1727 || (scale
& (scale
- 1)) != 0)
1730 si
= TYPE_MODE (index_type
) == SImode
;
1731 switch (TYPE_MODE (mem_vectype
))
1734 if (TARGET_AVX512VL
)
1735 code
= si
? IX86_BUILTIN_GATHER3SIV2DF
: IX86_BUILTIN_GATHER3DIV2DF
;
1737 code
= si
? IX86_BUILTIN_GATHERSIV2DF
: IX86_BUILTIN_GATHERDIV2DF
;
1740 if (TARGET_AVX512VL
)
1741 code
= si
? IX86_BUILTIN_GATHER3ALTSIV4DF
: IX86_BUILTIN_GATHER3DIV4DF
;
1743 code
= si
? IX86_BUILTIN_GATHERALTSIV4DF
: IX86_BUILTIN_GATHERDIV4DF
;
1746 if (TARGET_AVX512VL
)
1747 code
= si
? IX86_BUILTIN_GATHER3SIV2DI
: IX86_BUILTIN_GATHER3DIV2DI
;
1749 code
= si
? IX86_BUILTIN_GATHERSIV2DI
: IX86_BUILTIN_GATHERDIV2DI
;
1752 if (TARGET_AVX512VL
)
1753 code
= si
? IX86_BUILTIN_GATHER3ALTSIV4DI
: IX86_BUILTIN_GATHER3DIV4DI
;
1755 code
= si
? IX86_BUILTIN_GATHERALTSIV4DI
: IX86_BUILTIN_GATHERDIV4DI
;
1758 if (TARGET_AVX512VL
)
1759 code
= si
? IX86_BUILTIN_GATHER3SIV4SF
: IX86_BUILTIN_GATHER3DIV4SF
;
1761 code
= si
? IX86_BUILTIN_GATHERSIV4SF
: IX86_BUILTIN_GATHERDIV4SF
;
1764 if (TARGET_AVX512VL
)
1765 code
= si
? IX86_BUILTIN_GATHER3SIV8SF
: IX86_BUILTIN_GATHER3ALTDIV8SF
;
1767 code
= si
? IX86_BUILTIN_GATHERSIV8SF
: IX86_BUILTIN_GATHERALTDIV8SF
;
1770 if (TARGET_AVX512VL
)
1771 code
= si
? IX86_BUILTIN_GATHER3SIV4SI
: IX86_BUILTIN_GATHER3DIV4SI
;
1773 code
= si
? IX86_BUILTIN_GATHERSIV4SI
: IX86_BUILTIN_GATHERDIV4SI
;
1776 if (TARGET_AVX512VL
)
1777 code
= si
? IX86_BUILTIN_GATHER3SIV8SI
: IX86_BUILTIN_GATHER3ALTDIV8SI
;
1779 code
= si
? IX86_BUILTIN_GATHERSIV8SI
: IX86_BUILTIN_GATHERALTDIV8SI
;
1782 code
= si
? IX86_BUILTIN_GATHER3ALTSIV8DF
: IX86_BUILTIN_GATHER3DIV8DF
;
1785 code
= si
? IX86_BUILTIN_GATHER3ALTSIV8DI
: IX86_BUILTIN_GATHER3DIV8DI
;
1788 code
= si
? IX86_BUILTIN_GATHER3SIV16SF
: IX86_BUILTIN_GATHER3ALTDIV16SF
;
1791 code
= si
? IX86_BUILTIN_GATHER3SIV16SI
: IX86_BUILTIN_GATHER3ALTDIV16SI
;
1797 return ix86_get_builtin (code
);
1800 /* Returns a code for a target-specific builtin that implements
1801 reciprocal of the function, or NULL_TREE if not available. */
1804 ix86_builtin_reciprocal (tree fndecl
)
1806 enum ix86_builtins fn_code
1807 = (enum ix86_builtins
) DECL_MD_FUNCTION_CODE (fndecl
);
1810 /* Vectorized version of sqrt to rsqrt conversion. */
1811 case IX86_BUILTIN_SQRTPS_NR
:
1812 return ix86_get_builtin (IX86_BUILTIN_RSQRTPS_NR
);
1814 case IX86_BUILTIN_SQRTPS_NR256
:
1815 return ix86_get_builtin (IX86_BUILTIN_RSQRTPS_NR256
);
1822 /* This parses the attribute arguments to target in DECL and determines
1823 the right builtin to use to match the platform specification.
1824 It returns the priority value for this version decl. If PREDICATE_LIST
1825 is not NULL, it stores the list of cpu features that need to be checked
1826 before dispatching this function. */
1829 get_builtin_code_for_version (tree decl
, tree
*predicate_list
)
1832 struct cl_target_option cur_target
;
1834 struct cl_target_option
*new_target
;
1835 const char *arg_str
= NULL
;
1836 const char *attrs_str
= NULL
;
1837 char *tok_str
= NULL
;
1840 enum feature_priority priority
= P_NONE
;
1842 static unsigned int NUM_FEATURES
= ARRAY_SIZE (isa_names_table
);
1846 tree predicate_chain
= NULL_TREE
;
1847 tree predicate_decl
, predicate_arg
;
1849 attrs
= lookup_attribute ("target", DECL_ATTRIBUTES (decl
));
1850 gcc_assert (attrs
!= NULL
);
1852 attrs
= TREE_VALUE (TREE_VALUE (attrs
));
1854 gcc_assert (TREE_CODE (attrs
) == STRING_CST
);
1855 attrs_str
= TREE_STRING_POINTER (attrs
);
1857 /* Return priority zero for default function. */
1858 if (strcmp (attrs_str
, "default") == 0)
1861 /* Handle arch= if specified. For priority, set it to be 1 more than
1862 the best instruction set the processor can handle. For instance, if
1863 there is a version for atom and a version for ssse3 (the highest ISA
1864 priority for atom), the atom version must be checked for dispatch
1865 before the ssse3 version. */
1866 if (strstr (attrs_str
, "arch=") != NULL
)
1868 cl_target_option_save (&cur_target
, &global_options
,
1869 &global_options_set
);
1871 = ix86_valid_target_attribute_tree (decl
, attrs
, &global_options
,
1872 &global_options_set
, 0);
1874 gcc_assert (target_node
);
1875 if (target_node
== error_mark_node
)
1877 new_target
= TREE_TARGET_OPTION (target_node
);
1878 gcc_assert (new_target
);
1879 enum ix86_builtins builtin_fn
= IX86_BUILTIN_CPU_IS
;
1881 /* Special case x86-64 micro-level architectures. */
1882 const char *arch_name
= attrs_str
+ strlen ("arch=");
1883 if (startswith (arch_name
, "x86-64"))
1885 arg_str
= arch_name
;
1886 builtin_fn
= IX86_BUILTIN_CPU_SUPPORTS
;
1887 if (strcmp (arch_name
, "x86-64") == 0)
1888 priority
= P_X86_64_BASELINE
;
1889 else if (strcmp (arch_name
, "x86-64-v2") == 0)
1890 priority
= P_X86_64_V2
;
1891 else if (strcmp (arch_name
, "x86-64-v3") == 0)
1892 priority
= P_X86_64_V3
;
1893 else if (strcmp (arch_name
, "x86-64-v4") == 0)
1894 priority
= P_X86_64_V4
;
1896 else if (new_target
->arch_specified
&& new_target
->arch
> 0)
1897 for (i
= 0; i
< pta_size
; i
++)
1898 if (processor_alias_table
[i
].processor
== new_target
->arch
)
1900 const pta
*arch_info
= &processor_alias_table
[i
];
1901 switch (arch_info
->priority
)
1904 arg_str
= arch_info
->name
;
1905 priority
= arch_info
->priority
;
1907 case P_PROC_DYNAMIC
:
1908 switch (new_target
->arch
)
1910 case PROCESSOR_NEHALEM
:
1911 if (TARGET_PCLMUL_P (new_target
->x_ix86_isa_flags
))
1913 arg_str
= "westmere";
1914 priority
= P_PCLMUL
;
1918 /* We translate "arch=corei7" and "arch=nehalem"
1919 to "corei7" so that it will be mapped to
1920 M_INTEL_COREI7 as cpu type to cover all
1921 M_INTEL_COREI7_XXXs. */
1923 priority
= P_PROC_SSE4_2
;
1926 case PROCESSOR_SANDYBRIDGE
:
1927 if (TARGET_F16C_P (new_target
->x_ix86_isa_flags
))
1928 arg_str
= "ivybridge";
1930 arg_str
= "sandybridge";
1931 priority
= P_PROC_AVX
;
1933 case PROCESSOR_HASWELL
:
1934 if (TARGET_ADX_P (new_target
->x_ix86_isa_flags
))
1935 arg_str
= "broadwell";
1937 arg_str
= "haswell";
1938 priority
= P_PROC_AVX2
;
1940 case PROCESSOR_AMDFAM10
:
1941 arg_str
= "amdfam10h";
1942 priority
= P_PROC_SSE4_A
;
1954 cl_target_option_restore (&global_options
, &global_options_set
,
1957 if (predicate_list
&& arg_str
== NULL
)
1959 error_at (DECL_SOURCE_LOCATION (decl
),
1960 "no dispatcher found for the versioning attributes");
1966 predicate_decl
= ix86_builtins
[(int) builtin_fn
];
1967 /* For a C string literal the length includes the trailing NULL. */
1968 predicate_arg
= build_string_literal (strlen (arg_str
) + 1, arg_str
);
1969 predicate_chain
= tree_cons (predicate_decl
, predicate_arg
,
1974 /* Process feature name. */
1975 tok_str
= (char *) xmalloc (strlen (attrs_str
) + 1);
1976 strcpy (tok_str
, attrs_str
);
1977 token
= strtok (tok_str
, ",");
1978 predicate_decl
= ix86_builtins
[(int) IX86_BUILTIN_CPU_SUPPORTS
];
1980 while (token
!= NULL
)
1982 /* Do not process "arch=" */
1983 if (startswith (token
, "arch="))
1985 token
= strtok (NULL
, ",");
1988 for (i
= 0; i
< NUM_FEATURES
; ++i
)
1990 if (strcmp (token
, isa_names_table
[i
].name
) == 0)
1994 predicate_arg
= build_string_literal (
1995 strlen (isa_names_table
[i
].name
) + 1,
1996 isa_names_table
[i
].name
);
1997 predicate_chain
= tree_cons (predicate_decl
, predicate_arg
,
2000 /* Find the maximum priority feature. */
2001 if (isa_names_table
[i
].priority
> priority
)
2002 priority
= isa_names_table
[i
].priority
;
2007 if (predicate_list
&& priority
== P_NONE
)
2009 error_at (DECL_SOURCE_LOCATION (decl
),
2010 "ISA %qs is not supported in %<target%> attribute, "
2011 "use %<arch=%> syntax", token
);
2014 token
= strtok (NULL
, ",");
2018 if (predicate_list
&& predicate_chain
== NULL_TREE
)
2020 error_at (DECL_SOURCE_LOCATION (decl
),
2021 "no dispatcher found for the versioning attributes: %s",
2025 else if (predicate_list
)
2027 predicate_chain
= nreverse (predicate_chain
);
2028 *predicate_list
= predicate_chain
;
2034 /* This builds the processor_model struct type defined in
2035 libgcc/config/i386/cpuinfo.c */
2038 build_processor_model_struct (void)
2040 const char *field_name
[] = {"__cpu_vendor", "__cpu_type", "__cpu_subtype",
2042 tree field
= NULL_TREE
, field_chain
= NULL_TREE
;
2044 tree type
= make_node (RECORD_TYPE
);
2046 /* The first 3 fields are unsigned int. */
2047 for (i
= 0; i
< 3; ++i
)
2049 field
= build_decl (UNKNOWN_LOCATION
, FIELD_DECL
,
2050 get_identifier (field_name
[i
]), unsigned_type_node
);
2051 if (field_chain
!= NULL_TREE
)
2052 DECL_CHAIN (field
) = field_chain
;
2053 field_chain
= field
;
2056 /* The last field is an array of unsigned integers of size one. */
2057 field
= build_decl (UNKNOWN_LOCATION
, FIELD_DECL
,
2058 get_identifier (field_name
[3]),
2059 build_array_type (unsigned_type_node
,
2060 build_index_type (size_one_node
)));
2061 if (field_chain
!= NULL_TREE
)
2062 DECL_CHAIN (field
) = field_chain
;
2063 field_chain
= field
;
2065 finish_builtin_struct (type
, "__processor_model", field_chain
, NULL_TREE
);
2069 /* Returns a extern, comdat VAR_DECL of type TYPE and name NAME. */
2072 make_var_decl (tree type
, const char *name
)
2076 new_decl
= build_decl (UNKNOWN_LOCATION
,
2078 get_identifier(name
),
2081 DECL_EXTERNAL (new_decl
) = 1;
2082 TREE_STATIC (new_decl
) = 1;
2083 TREE_PUBLIC (new_decl
) = 1;
2084 DECL_INITIAL (new_decl
) = 0;
2085 DECL_ARTIFICIAL (new_decl
) = 0;
2086 DECL_PRESERVE_P (new_decl
) = 1;
2088 make_decl_one_only (new_decl
, DECL_ASSEMBLER_NAME (new_decl
));
2089 assemble_variable (new_decl
, 0, 0, 0);
2094 static GTY(()) tree ix86_cpu_model_type_node
;
2095 static GTY(()) tree ix86_cpu_model_var
;
2096 static GTY(()) tree ix86_cpu_features2_type_node
;
2097 static GTY(()) tree ix86_cpu_features2_var
;
2099 /* FNDECL is a __builtin_cpu_is or a __builtin_cpu_supports call that is folded
2100 into an integer defined in libgcc/config/i386/cpuinfo.c */
2103 fold_builtin_cpu (tree fndecl
, tree
*args
)
2106 enum ix86_builtins fn_code
2107 = (enum ix86_builtins
) DECL_MD_FUNCTION_CODE (fndecl
);
2108 tree param_string_cst
= NULL
;
2110 if (ix86_cpu_model_var
== nullptr)
2112 /* Build a single __cpu_model variable for all references to
2113 __cpu_model so that GIMPLE level optimizers can CSE the loads
2114 of __cpu_model and optimize bit-operations properly. */
2115 ix86_cpu_model_type_node
= build_processor_model_struct ();
2116 ix86_cpu_model_var
= make_var_decl (ix86_cpu_model_type_node
,
2118 varpool_node::add (ix86_cpu_model_var
);
2121 gcc_assert ((args
!= NULL
) && (*args
!= NULL
));
2123 param_string_cst
= *args
;
2124 while (param_string_cst
2125 && TREE_CODE (param_string_cst
) != STRING_CST
)
2127 /* *args must be a expr that can contain other EXPRS leading to a
2129 if (!EXPR_P (param_string_cst
))
2131 error ("parameter to builtin must be a string constant or literal");
2132 return integer_zero_node
;
2134 param_string_cst
= TREE_OPERAND (EXPR_CHECK (param_string_cst
), 0);
2137 gcc_assert (param_string_cst
);
2139 if (fn_code
== IX86_BUILTIN_CPU_IS
)
2145 unsigned int field_val
= 0;
2147 for (i
= 0; i
< num_arch_names
; i
++)
2148 if (processor_alias_table
[i
].model
!= 0
2149 && strcmp (processor_alias_table
[i
].name
,
2150 TREE_STRING_POINTER (param_string_cst
)) == 0)
2153 if (i
== num_arch_names
)
2155 error ("parameter to builtin not valid: %s",
2156 TREE_STRING_POINTER (param_string_cst
));
2157 return integer_zero_node
;
2160 field
= TYPE_FIELDS (ix86_cpu_model_type_node
);
2161 field_val
= processor_alias_table
[i
].model
;
2163 /* CPU types are stored in the next field. */
2164 if (field_val
> M_CPU_TYPE_START
2165 && field_val
< M_CPU_SUBTYPE_START
)
2167 field
= DECL_CHAIN (field
);
2168 field_val
-= M_CPU_TYPE_START
;
2171 /* CPU subtypes are stored in the next field. */
2172 if (field_val
> M_CPU_SUBTYPE_START
)
2174 field
= DECL_CHAIN ( DECL_CHAIN (field
));
2175 field_val
-= M_CPU_SUBTYPE_START
;
2178 /* Get the appropriate field in __cpu_model. */
2179 ref
= build3 (COMPONENT_REF
, TREE_TYPE (field
), ix86_cpu_model_var
,
2182 /* Check the value. */
2183 final
= build2 (EQ_EXPR
, unsigned_type_node
, ref
,
2184 build_int_cstu (unsigned_type_node
, field_val
));
2185 return build1 (NOP_EXPR
, integer_type_node
, final
);
2187 else if (fn_code
== IX86_BUILTIN_CPU_SUPPORTS
)
2194 unsigned int field_val
= 0;
2195 unsigned int NUM_ISA_NAMES
= ARRAY_SIZE (isa_names_table
);
2197 for (i
= 0; i
< NUM_ISA_NAMES
; i
++)
2198 if (strcmp (isa_names_table
[i
].name
,
2199 TREE_STRING_POINTER (param_string_cst
)) == 0)
2202 if (i
== NUM_ISA_NAMES
)
2204 error ("parameter to builtin not valid: %s",
2205 TREE_STRING_POINTER (param_string_cst
));
2206 return integer_zero_node
;
2209 unsigned feature
= isa_names_table
[i
].feature
;
2210 if (feature
>= INT_TYPE_SIZE
)
2212 if (ix86_cpu_features2_var
== nullptr)
2214 /* Build a single __cpu_features2 variable for all
2215 references to __cpu_features2 so that GIMPLE level
2216 optimizers can CSE the loads of __cpu_features2 and
2217 optimize bit-operations properly. */
2219 = build_index_type (size_int (SIZE_OF_CPU_FEATURES
));
2220 ix86_cpu_features2_type_node
2221 = build_array_type (unsigned_type_node
, index_type
);
2222 ix86_cpu_features2_var
2223 = make_var_decl (ix86_cpu_features2_type_node
,
2225 varpool_node::add (ix86_cpu_features2_var
);
2228 /* Skip __cpu_features[0]. */
2229 feature
-= INT_TYPE_SIZE
;
2230 tree index
= size_int (feature
/ INT_TYPE_SIZE
);
2231 feature
= feature
% INT_TYPE_SIZE
;
2232 array_elt
= build4 (ARRAY_REF
, unsigned_type_node
,
2233 ix86_cpu_features2_var
,
2234 index
, NULL_TREE
, NULL_TREE
);
2235 /* Return __cpu_features2[index] & field_val */
2239 field
= TYPE_FIELDS (ix86_cpu_model_type_node
);
2240 /* Get the last field, which is __cpu_features. */
2241 while (DECL_CHAIN (field
))
2242 field
= DECL_CHAIN (field
);
2244 /* Get the appropriate field: __cpu_model.__cpu_features */
2245 ref
= build3 (COMPONENT_REF
, TREE_TYPE (field
), ix86_cpu_model_var
,
2248 /* Access the 0th element of __cpu_features array. */
2249 array_elt
= build4 (ARRAY_REF
, unsigned_type_node
, ref
,
2250 integer_zero_node
, NULL_TREE
, NULL_TREE
);
2252 /* Return __cpu_model.__cpu_features[0] & field_val */
2255 field_val
= 1U << feature
;
2256 final
= build2 (BIT_AND_EXPR
, unsigned_type_node
, array_elt
,
2257 build_int_cstu (unsigned_type_node
, field_val
));
2258 if (feature
== INT_TYPE_SIZE
- 1)
2259 return build2 (NE_EXPR
, integer_type_node
, final
,
2260 build_int_cst (unsigned_type_node
, 0));
2262 return build1 (NOP_EXPR
, integer_type_node
, final
);
2267 #include "gt-i386-builtins.h"