gcc/config/mips/mips.opt

   1 ; Options for the MIPS port of the compiler
   2 ;
   3 ; Copyright (C) 2005-2020 Free Software Foundation, Inc.
   4 ;
   5 ; This file is part of GCC.
   6 ;
   7 ; GCC is free software; you can redistribute it and/or modify it under
   8 ; the terms of the GNU General Public License as published by the Free
   9 ; Software Foundation; either version 3, or (at your option) any later
  10 ; version.
  11 ;
  12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
  13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14 ; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15 ; License for more details.
  16 ;
  17 ; You should have received a copy of the GNU General Public License
  18 ; along with GCC; see the file COPYING3.  If not see
  19 ; <http://www.gnu.org/licenses/>.
  20
  21 HeaderInclude
  22 config/mips/mips-opts.h
  23
  24 EB
  25 Driver
  26
  27 EL
  28 Driver
  29
  30 mabi=
  31 Target RejectNegative Joined Enum(mips_abi) Var(mips_abi) Init(MIPS_ABI_DEFAULT)
  32 -mabi=ABI       Generate code that conforms to the given ABI.
  33
  34 Enum
  35 Name(mips_abi) Type(int)
  36 Known MIPS ABIs (for use with the -mabi= option):
  37
  38 EnumValue
  39 Enum(mips_abi) String(32) Value(ABI_32)
  40
  41 EnumValue
  42 Enum(mips_abi) String(o64) Value(ABI_O64)
  43
  44 EnumValue
  45 Enum(mips_abi) String(n32) Value(ABI_N32)
  46
  47 EnumValue
  48 Enum(mips_abi) String(64) Value(ABI_64)
  49
  50 EnumValue
  51 Enum(mips_abi) String(eabi) Value(ABI_EABI)
  52
  53 mabicalls
  54 Target Report Mask(ABICALLS)
  55 Generate code that can be used in SVR4-style dynamic objects.
  56
  57 mmad
  58 Target Report Var(TARGET_MAD)
  59 Use PMC-style 'mad' instructions.
  60
  61 mimadd
  62 Target Report Mask(IMADD)
  63 Use integer madd/msub instructions.
  64
  65 march=
  66 Target RejectNegative Joined Var(mips_arch_option) ToLower Enum(mips_arch_opt_value)
  67 -march=ISA      Generate code for the given ISA.
  68
  69 mbranch-cost=
  70 Target RejectNegative Joined UInteger Var(mips_branch_cost)
  71 -mbranch-cost=COST      Set the cost of branches to roughly COST instructions.
  72
  73 mbranch-likely
  74 Target Report Mask(BRANCHLIKELY)
  75 Use Branch Likely instructions, overriding the architecture default.
  76
  77 mflip-mips16
  78 Target Report Var(TARGET_FLIP_MIPS16)
  79 Switch on/off MIPS16 ASE on alternating functions for compiler testing.
  80
  81 mcheck-zero-division
  82 Target Report Mask(CHECK_ZERO_DIV)
  83 Trap on integer divide by zero.
  84
  85 mcode-readable=
  86 Target RejectNegative Joined Enum(mips_code_readable_setting) Var(mips_code_readable) Init(CODE_READABLE_YES)
  87 -mcode-readable=SETTING Specify when instructions are allowed to access code.
  88
  89 Enum
  90 Name(mips_code_readable_setting) Type(enum mips_code_readable_setting)
  91 Valid arguments to -mcode-readable=:
  92
  93 EnumValue
  94 Enum(mips_code_readable_setting) String(yes) Value(CODE_READABLE_YES)
  95
  96 EnumValue
  97 Enum(mips_code_readable_setting) String(pcrel) Value(CODE_READABLE_PCREL)
  98
  99 EnumValue
 100 Enum(mips_code_readable_setting) String(no) Value(CODE_READABLE_NO)
 101
 102 mdivide-breaks
 103 Target Report RejectNegative Mask(DIVIDE_BREAKS)
 104 Use branch-and-break sequences to check for integer divide by zero.
 105
 106 mdivide-traps
 107 Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
 108 Use trap instructions to check for integer divide by zero.
 109
 110 mdmx
 111 Target Report RejectNegative Var(TARGET_MDMX)
 112 Allow the use of MDMX instructions.
 113
 114 mdouble-float
 115 Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
 116 Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations.
 117
 118 mdsp
 119 Target Report Var(TARGET_DSP)
 120 Use MIPS-DSP instructions.
 121
 122 mdspr2
 123 Target Report Var(TARGET_DSPR2)
 124 Use MIPS-DSP REV 2 instructions.
 125
 126 mdebug
 127 Target Var(TARGET_DEBUG_MODE) Undocumented
 128
 129 mdebugd
 130 Target Var(TARGET_DEBUG_D_MODE) Undocumented
 131
 132 meb
 133 Target Report RejectNegative Mask(BIG_ENDIAN)
 134 Use big-endian byte order.
 135
 136 mel
 137 Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
 138 Use little-endian byte order.
 139
 140 membedded-data
 141 Target Report Var(TARGET_EMBEDDED_DATA)
 142 Use ROM instead of RAM.
 143
 144 meva
 145 Target Report Var(TARGET_EVA)
 146 Use Enhanced Virtual Addressing instructions.
 147
 148 mexplicit-relocs
 149 Target Report Mask(EXPLICIT_RELOCS)
 150 Use NewABI-style %reloc() assembly operators.
 151
 152 mextern-sdata
 153 Target Report Var(TARGET_EXTERN_SDATA) Init(1)
 154 Use -G for data that is not defined by the current object.
 155
 156 mfix-24k
 157 Target Report Var(TARGET_FIX_24K)
 158 Work around certain 24K errata.
 159
 160 mfix-r4000
 161 Target Report Mask(FIX_R4000)
 162 Work around certain R4000 errata.
 163
 164 mfix-r4400
 165 Target Report Mask(FIX_R4400)
 166 Work around certain R4400 errata.
 167
 168 mfix-r5900
 169 Target Report Mask(FIX_R5900)
 170 Work around the R5900 short loop erratum.
 171
 172 mfix-rm7000
 173 Target Report Var(TARGET_FIX_RM7000)
 174 Work around certain RM7000 errata.
 175
 176 mfix-r10000
 177 Target Report Mask(FIX_R10000)
 178 Work around certain R10000 errata.
 179
 180 mfix-sb1
 181 Target Report Var(TARGET_FIX_SB1)
 182 Work around errata for early SB-1 revision 2 cores.
 183
 184 mfix-vr4120
 185 Target Report Var(TARGET_FIX_VR4120)
 186 Work around certain VR4120 errata.
 187
 188 mfix-vr4130
 189 Target Report Var(TARGET_FIX_VR4130)
 190 Work around VR4130 mflo/mfhi errata.
 191
 192 mfix4300
 193 Target Report Var(TARGET_4300_MUL_FIX)
 194 Work around an early 4300 hardware bug.
 195
 196 mfp-exceptions
 197 Target Report Var(TARGET_FP_EXCEPTIONS) Init(1)
 198 FP exceptions are enabled.
 199
 200 mfp32
 201 Target Report RejectNegative InverseMask(FLOAT64)
 202 Use 32-bit floating-point registers.
 203
 204 mfpxx
 205 Target Report RejectNegative Mask(FLOATXX)
 206 Conform to the o32 FPXX ABI.
 207
 208 mfp64
 209 Target Report RejectNegative Mask(FLOAT64)
 210 Use 64-bit floating-point registers.
 211
 212 mflush-func=
 213 Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
 214 -mflush-func=FUNC       Use FUNC to flush the cache before calling stack trampolines.
 215
 216 mabs=
 217 Target RejectNegative Joined Enum(mips_ieee_754_value) Var(mips_abs) Init(MIPS_IEEE_754_DEFAULT)
 218 -mabs=MODE      Select the IEEE 754 ABS/NEG instruction execution mode.
 219
 220 mnan=
 221 Target RejectNegative Joined Enum(mips_ieee_754_value) Var(mips_nan) Init(MIPS_IEEE_754_DEFAULT)
 222 -mnan=ENCODING  Select the IEEE 754 NaN data encoding.
 223
 224 Enum
 225 Name(mips_ieee_754_value) Type(int)
 226 Known MIPS IEEE 754 settings (for use with the -mabs= and -mnan= options):
 227
 228 EnumValue
 229 Enum(mips_ieee_754_value) String(2008) Value(MIPS_IEEE_754_2008)
 230
 231 EnumValue
 232 Enum(mips_ieee_754_value) String(legacy) Value(MIPS_IEEE_754_LEGACY)
 233
 234 mgp32
 235 Target Report RejectNegative InverseMask(64BIT)
 236 Use 32-bit general registers.
 237
 238 mgp64
 239 Target Report RejectNegative Mask(64BIT)
 240 Use 64-bit general registers.
 241
 242 mgpopt
 243 Target Report Var(TARGET_GPOPT) Init(1)
 244 Use GP-relative addressing to access small data.
 245
 246 mplt
 247 Target Report Var(TARGET_PLT)
 248 When generating -mabicalls code, allow executables to use PLTs and copy relocations.
 249
 250 mhard-float
 251 Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
 252 Allow the use of hardware floating-point ABI and instructions.
 253
 254 minterlink-compressed
 255 Target Report Var(TARGET_INTERLINK_COMPRESSED) Init(0)
 256 Generate code that is link-compatible with MIPS16 and microMIPS code.
 257
 258 minterlink-mips16
 259 Target Report Var(TARGET_INTERLINK_COMPRESSED) Init(0)
 260 An alias for minterlink-compressed provided for backward-compatibility.
 261
 262 mips
 263 Target RejectNegative Joined ToLower Enum(mips_mips_opt_value) Var(mips_isa_option)
 264 -mipsN  Generate code for ISA level N.
 265
 266 mips16
 267 Target Report RejectNegative Mask(MIPS16)
 268 Generate MIPS16 code.
 269
 270 mips3d
 271 Target Report RejectNegative Var(TARGET_MIPS3D)
 272 Use MIPS-3D instructions.
 273
 274 mllsc
 275 Target Report Mask(LLSC)
 276 Use ll, sc and sync instructions.
 277
 278 mlocal-sdata
 279 Target Report Var(TARGET_LOCAL_SDATA) Init(1)
 280 Use -G for object-local data.
 281
 282 mlong-calls
 283 Target Report Var(TARGET_LONG_CALLS)
 284 Use indirect calls.
 285
 286 mlong32
 287 Target Report RejectNegative InverseMask(LONG64, LONG32)
 288 Use a 32-bit long type.
 289
 290 mlong64
 291 Target Report RejectNegative Mask(LONG64)
 292 Use a 64-bit long type.
 293
 294 mmcount-ra-address
 295 Target Report Var(TARGET_MCOUNT_RA_ADDRESS)
 296 Pass the address of the ra save location to _mcount in $12.
 297
 298 mmemcpy
 299 Target Report Mask(MEMCPY)
 300 Don't optimize block moves.
 301
 302 mmicromips
 303 Target Report Mask(MICROMIPS)
 304 Use microMIPS instructions.
 305
 306 mmsa
 307 Target Report Mask(MSA)
 308 Use MIPS MSA Extension instructions.
 309
 310 mmt
 311 Target Report Var(TARGET_MT)
 312 Allow the use of MT instructions.
 313
 314 mno-float
 315 Target Report RejectNegative Var(TARGET_NO_FLOAT) Condition(TARGET_SUPPORTS_NO_FLOAT)
 316 Prevent the use of all floating-point operations.
 317
 318 mmcu
 319 Target Report Var(TARGET_MCU)
 320 Use MCU instructions.
 321
 322 mno-flush-func
 323 Target RejectNegative
 324 Do not use a cache-flushing function before calling stack trampolines.
 325
 326 mno-mdmx
 327 Target Report RejectNegative Var(TARGET_MDMX, 0)
 328 Do not use MDMX instructions.
 329
 330 mno-mips16
 331 Target Report RejectNegative InverseMask(MIPS16)
 332 Generate normal-mode code.
 333
 334 mno-mips3d
 335 Target Report RejectNegative Var(TARGET_MIPS3D, 0)
 336 Do not use MIPS-3D instructions.
 337
 338 mpaired-single
 339 Target Report Mask(PAIRED_SINGLE_FLOAT)
 340 Use paired-single floating-point instructions.
 341
 342 mr10k-cache-barrier=
 343 Target Joined RejectNegative Enum(mips_r10k_cache_barrier_setting) Var(mips_r10k_cache_barrier) Init(R10K_CACHE_BARRIER_NONE)
 344 -mr10k-cache-barrier=SETTING    Specify when r10k cache barriers should be inserted.
 345
 346 Enum
 347 Name(mips_r10k_cache_barrier_setting) Type(enum mips_r10k_cache_barrier_setting)
 348 Valid arguments to -mr10k-cache-barrier=:
 349
 350 EnumValue
 351 Enum(mips_r10k_cache_barrier_setting) String(load-store) Value(R10K_CACHE_BARRIER_LOAD_STORE)
 352
 353 EnumValue
 354 Enum(mips_r10k_cache_barrier_setting) String(store) Value(R10K_CACHE_BARRIER_STORE)
 355
 356 EnumValue
 357 Enum(mips_r10k_cache_barrier_setting) String(none) Value(R10K_CACHE_BARRIER_NONE)
 358
 359 mrelax-pic-calls
 360 Target Report Mask(RELAX_PIC_CALLS)
 361 Try to allow the linker to turn PIC calls into direct calls.
 362
 363 mshared
 364 Target Report Var(TARGET_SHARED) Init(1)
 365 When generating -mabicalls code, make the code suitable for use in shared libraries.
 366
 367 msingle-float
 368 Target Report RejectNegative Mask(SINGLE_FLOAT)
 369 Restrict the use of hardware floating-point instructions to 32-bit operations.
 370
 371 msmartmips
 372 Target Report Mask(SMARTMIPS)
 373 Use SmartMIPS instructions.
 374
 375 msoft-float
 376 Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
 377 Prevent the use of all hardware floating-point instructions.
 378
 379 msplit-addresses
 380 Target Report Mask(SPLIT_ADDRESSES)
 381 Optimize lui/addiu address loads.
 382
 383 msym32
 384 Target Report Var(TARGET_SYM32)
 385 Assume all symbols have 32-bit values.
 386
 387 msynci
 388 Target Report Mask(SYNCI)
 389 Use synci instruction to invalidate i-cache.
 390
 391 mlra
 392 Target Report Var(mips_lra_flag) Init(1) Save
 393 Use LRA instead of reload.
 394
 395 mlxc1-sxc1
 396 Target Report Var(mips_lxc1_sxc1) Init(1)
 397 Use lwxc1/swxc1/ldxc1/sdxc1 instructions where applicable.
 398
 399 mmadd4
 400 Target Report Var(mips_madd4) Init(1)
 401 Use 4-operand madd.s/madd.d and related instructions where applicable.
 402
 403 mtune=
 404 Target RejectNegative Joined Var(mips_tune_option) ToLower Enum(mips_arch_opt_value)
 405 -mtune=PROCESSOR        Optimize the output for PROCESSOR.
 406
 407 muninit-const-in-rodata
 408 Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
 409 Put uninitialized constants in ROM (needs -membedded-data).
 410
 411 mvirt
 412 Target Report Var(TARGET_VIRT)
 413 Use Virtualization (VZ) instructions.
 414
 415 mxpa
 416 Target Report Var(TARGET_XPA)
 417 Use eXtended Physical Address (XPA) instructions.
 418
 419 mcrc
 420 Target Report Var(TARGET_CRC)
 421 Use Cyclic Redundancy Check (CRC) instructions.
 422
 423 mginv
 424 Target Report Var(TARGET_GINV)
 425 Use Global INValidate (GINV) instructions.
 426
 427 mvr4130-align
 428 Target Report Mask(VR4130_ALIGN)
 429 Perform VR4130-specific alignment optimizations.
 430
 431 mxgot
 432 Target Report Var(TARGET_XGOT)
 433 Lift restrictions on GOT size.
 434
 435 modd-spreg
 436 Target Report Mask(ODD_SPREG)
 437 Enable use of odd-numbered single-precision registers.
 438
 439 mframe-header-opt
 440 Target Report Var(flag_frame_header_optimization) Optimization
 441 Optimize frame header.
 442
 443 noasmopt
 444 Driver
 445
 446 mload-store-pairs
 447 Target Report Var(TARGET_LOAD_STORE_PAIRS) Init(1)
 448 Enable load/store bonding.
 449
 450 mcompact-branches=
 451 Target RejectNegative JoinedOrMissing Var(mips_cb) Report Enum(mips_cb_setting) Init(MIPS_CB_OPTIMAL)
 452 Specify the compact branch usage policy.
 453
 454 Enum
 455 Name(mips_cb_setting) Type(enum mips_cb_setting)
 456 Policies available for use with -mcompact-branches=:
 457
 458 EnumValue
 459 Enum(mips_cb_setting) String(never) Value(MIPS_CB_NEVER)
 460
 461 EnumValue
 462 Enum(mips_cb_setting) String(optimal) Value(MIPS_CB_OPTIMAL)
 463
 464 EnumValue
 465 Enum(mips_cb_setting) String(always) Value(MIPS_CB_ALWAYS)
 466
 467 mloongson-mmi
 468 Target Report Mask(LOONGSON_MMI)
 469 Use Loongson MultiMedia extensions Instructions (MMI) instructions.
 470
 471 mloongson-ext
 472 Target Report Mask(LOONGSON_EXT)
 473 Use Loongson EXTension (EXT) instructions.
 474
 475 mloongson-ext2
 476 Target Report Var(TARGET_LOONGSON_EXT2)
 477 Use Loongson EXTension R2 (EXT2) instructions.