1 /* Definitions of target machine for GNU compiler, for the pdp-11
2 Copyright (C) 1994, 1995, 1996, 1998, 1999, 2000, 2001, 2002, 2004, 2005,
3 2006, 2007, 2008, 2010 Free Software Foundation, Inc.
4 Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #define CONSTANT_POOL_BEFORE_FUNCTION 0
24 /* check whether load_fpu_reg or not */
25 #define LOAD_FPU_REG_P(x) ((x) >= AC0_REGNUM && (x) <= AC3_REGNUM)
26 #define NO_LOAD_FPU_REG_P(x) ((x) == AC4_REGNUM || (x) == AC5_REGNUM)
27 #define FPU_REG_P(x) (LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x))
28 #define CPU_REG_P(x) ((x) <= PC_REGNUM)
30 /* Names to predefine in the preprocessor for this target machine. */
32 #define TARGET_CPU_CPP_BUILTINS() \
35 builtin_define_std ("pdp11"); \
39 /* Print subsidiary information on the compiler version in use. */
40 #define TARGET_VERSION fprintf (stderr, " (pdp11)");
43 /* Generate DBX debugging information. */
45 #define DBX_DEBUGGING_INFO
47 #define TARGET_40_PLUS (TARGET_40 || TARGET_45)
48 #define TARGET_10 (! TARGET_40_PLUS)
50 #define TARGET_UNIX_ASM_DEFAULT 0
52 #define ASSEMBLER_DIALECT (TARGET_UNIX_ASM ? 1 : 0)
57 #define SHORT_TYPE_SIZE 16
58 #define INT_TYPE_SIZE (TARGET_INT16 ? 16 : 32)
59 #define LONG_TYPE_SIZE 32
60 #define LONG_LONG_TYPE_SIZE 64
62 /* if we set FLOAT_TYPE_SIZE to 32, we could have the benefit
63 of saving core for huge arrays - the definitions are
64 already in md - but floats can never reside in
65 an FPU register - we keep the FPU in double float mode
67 #define FLOAT_TYPE_SIZE (TARGET_FLOAT32 ? 32 : 64)
68 #define DOUBLE_TYPE_SIZE 64
69 #define LONG_DOUBLE_TYPE_SIZE 64
71 /* machine types from ansi */
72 #define SIZE_TYPE "unsigned int" /* definition of size_t */
73 #define WCHAR_TYPE "int" /* or long int???? */
74 #define WCHAR_TYPE_SIZE 16
76 #define PTRDIFF_TYPE "int"
78 /* target machine storage layout */
80 /* Define this if most significant bit is lowest numbered
81 in instructions that operate on numbered bit-fields. */
82 #define BITS_BIG_ENDIAN 0
84 /* Define this if most significant byte of a word is the lowest numbered. */
85 #define BYTES_BIG_ENDIAN 0
87 /* Define this if most significant word of a multiword number is first. */
88 #define WORDS_BIG_ENDIAN 1
90 /* Define that floats are in VAX order, not high word first as for ints. */
91 #define FLOAT_WORDS_BIG_ENDIAN 0
93 /* Width of a word, in units (bytes).
95 UNITS OR BYTES - seems like units */
96 #define UNITS_PER_WORD 2
98 /* This machine doesn't use IEEE floats. */
99 /* Because the pdp11 (at least Unix) convention for 32-bit ints is
100 big endian, opposite for what you need for float, the vax float
101 conversion routines aren't actually used directly. But the underlying
102 format is indeed the vax/pdp11 float format. */
103 extern const struct real_format pdp11_f_format
;
104 extern const struct real_format pdp11_d_format
;
106 /* Maximum sized of reasonable data type
107 DImode or Dfmode ...*/
108 #define MAX_FIXED_MODE_SIZE 64
110 /* Allocation boundary (in *bits*) for storing pointers in memory. */
111 #define POINTER_BOUNDARY 16
113 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
114 #define PARM_BOUNDARY 16
116 /* Boundary (in *bits*) on which stack pointer should be aligned. */
117 #define STACK_BOUNDARY 16
119 /* Allocation boundary (in *bits*) for the code of a function. */
120 #define FUNCTION_BOUNDARY 16
122 /* Alignment of field after `int : 0' in a structure. */
123 #define EMPTY_FIELD_BOUNDARY 16
125 /* No data type wants to be aligned rounder than this. */
126 #define BIGGEST_ALIGNMENT 16
128 /* Define this if move instructions will actually fail to work
129 when given unaligned data. */
130 #define STRICT_ALIGNMENT 1
132 /* Standard register usage. */
134 /* Number of actual hardware registers.
135 The hardware registers are assigned numbers for the compiler
136 from 0 to just below FIRST_PSEUDO_REGISTER.
137 All registers that the compiler knows about must be given numbers,
138 even those that are not normally considered general registers.
140 we have 8 integer registers, plus 6 float
141 (don't use scratch float !) */
143 /* 1 for registers that have pervasive standard uses
144 and are not available for the register allocator.
146 On the pdp, these are:
149 reg 5 = fp; not necessarily!
152 #define FIXED_REGISTERS \
153 {0, 0, 0, 0, 0, 0, 1, 1, \
154 0, 0, 0, 0, 0, 0, 1, 1 }
158 /* 1 for registers not available across function calls.
159 These must include the FIXED_REGISTERS and also any
160 registers that can be used without being saved.
161 The latter must include the registers where values are returned
162 and the register where structure-value addresses are passed.
163 Aside from that, you can include as many other registers as you like. */
165 /* don't know about fp */
166 #define CALL_USED_REGISTERS \
167 {1, 1, 0, 0, 0, 0, 1, 1, \
168 0, 0, 0, 0, 0, 0, 1, 1 }
171 /* Return number of consecutive hard regs needed starting at reg REGNO
172 to hold something of mode MODE.
173 This is ordinarily the length in words of a value of mode MODE
174 but can be less for certain modes in special long registers.
177 #define HARD_REGNO_NREGS(REGNO, MODE) \
178 ((REGNO <= PC_REGNUM)? \
179 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
183 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
184 On the pdp, the cpu registers can hold any mode other than float
185 (because otherwise we may end up being asked to move from CPU to FPU
186 register, which isn't a valid operation on the PDP11).
187 For CPU registers, check alignment.
189 FPU accepts SF and DF but actually holds a DF - simplifies life!
191 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
192 (((REGNO) <= PC_REGNUM)? \
193 ((GET_MODE_BITSIZE(MODE) <= 16) \
194 || (GET_MODE_BITSIZE(MODE) >= 32 && \
195 !((REGNO) & 1) && !FLOAT_MODE_P (MODE))) \
196 :FLOAT_MODE_P (MODE))
199 /* Value is 1 if it is a good idea to tie two pseudo registers
200 when one has mode MODE1 and one has mode MODE2.
201 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
202 for any hard reg, then this must be 0 for correct output. */
203 #define MODES_TIEABLE_P(MODE1, MODE2) 0
205 /* Specify the registers used for certain standard purposes.
206 The values of these macros are register numbers. */
208 /* Register in which static-chain is passed to a function. */
209 /* ??? - i don't want to give up a reg for this! */
210 #define STATIC_CHAIN_REGNUM 4
212 /* Define the classes of registers for register constraints in the
213 machine description. Also define ranges of constants.
215 One of the classes must always be named ALL_REGS and include all hard regs.
216 If there is more than one class, another class must be named NO_REGS
217 and contain no registers.
219 The name GENERAL_REGS must be the name of a class (or an alias for
220 another name such as ALL_REGS). This is the class of registers
221 that is allowed by "g" or "r" in a register constraint.
222 Also, registers outside this class are allocated only when
223 instructions express preferences for them.
225 The classes must be numbered in nondecreasing order; that is,
226 a larger-numbered class must never be contained completely
227 in a smaller-numbered class.
229 For any two classes, it is very desirable that there be another
230 class that represents their union. */
232 /* The pdp has a couple of classes:
234 MUL_REGS are used for odd numbered regs, to use in 16-bit multiplication
235 (even numbered do 32-bit multiply)
236 LMUL_REGS long multiply registers (even numbered regs )
237 (don't need them, all 32-bit regs are even numbered!)
238 GENERAL_REGS is all cpu
239 LOAD_FPU_REGS is the first four cpu regs, they are easier to load
240 NO_LOAD_FPU_REGS is ac4 and ac5, currently - difficult to load them
241 FPU_REGS is all fpu regs
244 enum reg_class
{ NO_REGS
, MUL_REGS
, GENERAL_REGS
, LOAD_FPU_REGS
, NO_LOAD_FPU_REGS
, FPU_REGS
, ALL_REGS
, LIM_REG_CLASSES
};
246 #define N_REG_CLASSES (int) LIM_REG_CLASSES
248 /* have to allow this till cmpsi/tstsi are fixed in a better way !! */
249 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
251 /* Since GENERAL_REGS is the same class as ALL_REGS,
252 don't give it a different class number; just make it an alias. */
254 /* #define GENERAL_REGS ALL_REGS */
256 /* Give names of register classes as strings for dump file. */
258 #define REG_CLASS_NAMES {"NO_REGS", "MUL_REGS", "GENERAL_REGS", "LOAD_FPU_REGS", "NO_LOAD_FPU_REGS", "FPU_REGS", "ALL_REGS" }
260 /* Define which registers fit in which classes.
261 This is an initializer for a vector of HARD_REG_SET
262 of length N_REG_CLASSES. */
264 #define REG_CLASS_CONTENTS {{0}, {0x00aa}, {0xc0ff}, {0x0f00}, {0x3000}, {0x3f00}, {0xffff}}
266 /* The same information, inverted:
267 Return the class number of the smallest class containing
268 reg number REGNO. This could be a conditional expression
269 or could index an array. */
271 #define REGNO_REG_CLASS(REGNO) pdp11_regno_reg_class (REGNO)
273 /* The class value for index registers, and the one for base regs. */
274 #define INDEX_REG_CLASS GENERAL_REGS
275 #define BASE_REG_CLASS GENERAL_REGS
277 /* The following macro defines cover classes for Integrated Register
278 Allocator. Cover classes is a set of non-intersected register
279 classes covering all hard registers used for register allocation
280 purpose. Any move between two registers of a cover class should be
281 cheaper than load or store of the registers. The macro value is
282 array of register classes with LIM_REG_CLASSES used as the end
285 #define IRA_COVER_CLASSES { GENERAL_REGS, FPU_REGS, LIM_REG_CLASSES }
287 /* Hook for testing if memory is needed for moving between registers. */
288 #define SECONDARY_MEMORY_NEEDED(class1, class2, m) \
289 pdp11_secondary_memory_needed (class1, class2, m)
291 /* Return the maximum number of consecutive registers
292 needed to represent mode MODE in a register of class CLASS. */
293 #define CLASS_MAX_NREGS(CLASS, MODE) \
294 ((CLASS == GENERAL_REGS || CLASS == MUL_REGS)? \
295 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD): \
299 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
300 pdp11_cannot_change_mode_class (FROM, TO, CLASS)
302 /* Stack layout; function entry, exit and calling. */
304 /* Define this if pushing a word on the stack
305 makes the stack pointer a smaller address. */
306 #define STACK_GROWS_DOWNWARD
308 /* Define this to nonzero if the nominal address of the stack frame
309 is at the high-address end of the local variables;
310 that is, each additional local variable allocated
311 goes at a more negative offset in the frame.
313 #define FRAME_GROWS_DOWNWARD 1
315 /* Offset within stack frame to start allocating local variables at.
316 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
317 first local allocated. Otherwise, it is the offset to the BEGINNING
318 of the first local allocated. */
319 #define STARTING_FRAME_OFFSET 0
321 /* If we generate an insn to push BYTES bytes,
322 this says how many the stack pointer really advances by.
323 On the pdp11, the stack is on an even boundary */
324 #define PUSH_ROUNDING(BYTES) ((BYTES + 1) & ~1)
326 /* current_first_parm_offset stores the # of registers pushed on the
328 extern int current_first_parm_offset
;
330 /* Offset of first parameter from the argument pointer register value. */
331 #define FIRST_PARM_OFFSET(FNDECL) 0
333 /* Define how to find the value returned by a function.
334 VALTYPE is the data type of the value (as a tree).
335 If the precise function being called is known, FUNC is its FUNCTION_DECL;
336 otherwise, FUNC is 0. */
337 #define BASE_RETURN_VALUE_REG(MODE) \
338 (FLOAT_MODE_P (MODE) ? AC0_REGNUM : RETVAL_REGNUM)
340 /* 1 if N is a possible register number for function argument passing.
343 #define FUNCTION_ARG_REGNO_P(N) 0
345 /* Define a data type for recording info about an argument list
346 during the scan of that argument list. This data type should
347 hold all necessary information about the function itself
348 and about the args processed so far, enough to enable macros
349 such as FUNCTION_ARG to determine where the next arg should go.
353 #define CUMULATIVE_ARGS int
355 /* Initialize a variable CUM of type CUMULATIVE_ARGS
356 for a call to a function whose data type is FNTYPE.
357 For a library call, FNTYPE is 0.
359 ...., the offset normally starts at 0, but starts at 1 word
360 when the function gets a structure-value-address as an
361 invisible first argument. */
363 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
366 /* Output assembler code to FILE to increment profiler label # LABELNO
367 for profiling a function entry. */
369 #define FUNCTION_PROFILER(FILE, LABELNO) \
372 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
373 the stack pointer does not matter. The value is tested only in
374 functions that have frame pointers.
375 No definition is equivalent to always zero. */
377 extern int may_call_alloca
;
379 #define EXIT_IGNORE_STACK 1
381 /* Definitions for register eliminations.
383 This is an array of structures. Each structure initializes one pair
384 of eliminable registers. The "from" register number is given first,
385 followed by "to". Eliminations of the same "from" register are listed
386 in order of preference.
388 There are two registers that can always be eliminated on the pdp11.
389 The frame pointer and the arg pointer can be replaced by either the
390 hard frame pointer or to the stack pointer, depending upon the
391 circumstances. The hard frame pointer is not used before reload and
392 so it is not eligible for elimination. */
394 #define ELIMINABLE_REGS \
395 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
396 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
397 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
398 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} \
400 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
401 ((OFFSET) = pdp11_initial_elimination_offset ((FROM), (TO)))
404 /* Addressing modes, and classification of registers for them. */
406 #define HAVE_POST_INCREMENT 1
408 #define HAVE_PRE_DECREMENT 1
410 /* Macros to check register numbers against specific register classes. */
412 /* These assume that REGNO is a hard or pseudo reg number.
413 They give nonzero only if REGNO is a hard reg of the suitable class
414 or a pseudo reg currently allocated to a suitable hard reg.
415 Since they use reg_renumber, they are safe only once reg_renumber
416 has been allocated, which happens in local-alloc.c. */
418 #define REGNO_OK_FOR_BASE_P(REGNO) \
419 ((REGNO) <= PC_REGNUM || (unsigned) reg_renumber[REGNO] <= PC_REGNUM || \
420 (REGNO) == ARG_POINTER_REGNUM || (REGNO) == FRAME_POINTER_REGNUM)
422 #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P (REGNO)
424 /* Now macros that check whether X is a register and also,
425 strictly, whether it is in a specified class.
430 /* Maximum number of registers that can appear in a valid memory address. */
432 #define MAX_REGS_PER_ADDRESS 1
434 /* Nonzero if the constant value X is a legitimate general operand.
435 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
437 #define LEGITIMATE_CONSTANT_P(X) \
438 (GET_CODE (X) != CONST_DOUBLE || legitimate_const_double_p (X))
440 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
441 and check its validity for a certain class.
442 We have two alternate definitions for each of them.
443 The usual definition accepts all pseudo regs; the other rejects
444 them unless they have been allocated suitable hard regs.
445 The symbol REG_OK_STRICT causes the latter definition to be used.
447 Most source files want to accept pseudo regs in the hope that
448 they will get allocated to the class that the insn wants them to be in.
449 Source files for reload pass need to be strict.
450 After reload, it makes no difference, since pseudo regs have
451 been eliminated by then. */
453 #ifndef REG_OK_STRICT
455 /* Nonzero if X is a hard reg that can be used as an index
456 or if it is a pseudo reg. */
457 #define REG_OK_FOR_INDEX_P(X) (1)
458 /* Nonzero if X is a hard reg that can be used as a base reg
459 or if it is a pseudo reg. */
460 #define REG_OK_FOR_BASE_P(X) (1)
464 /* Nonzero if X is a hard reg that can be used as an index. */
465 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
466 /* Nonzero if X is a hard reg that can be used as a base reg. */
467 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
471 /* Specify the machine mode that this machine uses
472 for the index in the tablejump instruction. */
473 #define CASE_VECTOR_MODE HImode
475 /* Define this if a raw index is all that is needed for a
477 #define CASE_TAKES_INDEX_RAW
479 /* Define this as 1 if `char' should by default be signed; else as 0. */
480 #define DEFAULT_SIGNED_CHAR 1
482 /* Max number of bytes we can move from memory to memory
483 in one reasonably fast instruction.
488 /* Nonzero if access to memory by byte is slow and undesirable. -
490 #define SLOW_BYTE_ACCESS 0
492 /* Do not break .stabs pseudos into continuations. */
493 #define DBX_CONTIN_LENGTH 0
495 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
496 is done just by pretending it is already truncated. */
497 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
499 /* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE,
500 return the mode to be used for the comparison. For floating-point, CCFPmode
503 #define SELECT_CC_MODE(OP,X,Y) \
504 (GET_MODE_CLASS(GET_MODE(X)) == MODE_FLOAT? CCFPmode : CCmode)
506 /* Specify the machine mode that pointers have.
507 After generation of rtl, the compiler makes no further distinction
508 between pointers and any other objects of this machine mode. */
511 /* A function address in a call instruction
512 is a word address (for indexing purposes)
513 so give the MEM rtx a word's mode. */
514 #define FUNCTION_MODE HImode
516 /* Define this if addresses of constant functions
517 shouldn't be put through pseudo regs where they can be cse'd.
518 Desirable on machines where ordinary constants are expensive
519 but a CALL with constant address is cheap. */
520 /* #define NO_FUNCTION_CSE */
523 /* Tell emit-rtl.c how to initialize special values on a per-function base. */
524 extern struct rtx_def
*cc0_reg_rtx
;
526 #define CC_STATUS_MDEP rtx
528 #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0)
530 /* Tell final.c how to eliminate redundant test instructions. */
532 /* Here we define machine-dependent flags and fields in cc_status
533 (see `conditions.h'). */
535 #define CC_IN_FPU 04000
537 /* Do UPDATE_CC if EXP is a set, used in
540 floats only do compare correctly, else nullify ...
545 /* Store in cc_status the expressions
546 that the condition codes will describe
547 after execution of an instruction whose pattern is EXP.
548 Do not alter them if the instruction would not alter the cc's. */
550 #define NOTICE_UPDATE_CC(EXP, INSN) \
551 { if (GET_CODE (EXP) == SET) \
553 notice_update_cc_on_set(EXP, INSN); \
555 else if (GET_CODE (EXP) == PARALLEL \
556 && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
558 notice_update_cc_on_set(XVECEXP (EXP, 0, 0), INSN); \
560 else if (GET_CODE (EXP) == CALL) \
561 { /* all bets are off */ CC_STATUS_INIT; } \
562 if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
563 && cc_status.value2 \
564 && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
566 printf ("here!\n"); \
567 cc_status.value2 = 0; \
571 /* Control the assembler format that we output. */
573 /* Output to assembler file text saying following lines
574 may contain character constants, extra white space, comments, etc. */
576 #define ASM_APP_ON ""
578 /* Output to assembler file text saying following lines
579 no longer contain unusual constructs. */
581 #define ASM_APP_OFF ""
583 /* Output before read-only data. */
585 #define TEXT_SECTION_ASM_OP "\t.text\n"
587 /* Output before writable data. */
589 #define DATA_SECTION_ASM_OP "\t.data\n"
591 /* How to refer to registers in assembler output.
592 This sequence is indexed by compiler's hard-register-number (see above). */
594 #define REGISTER_NAMES \
595 {"r0", "r1", "r2", "r3", "r4", "r5", "sp", "pc", \
596 "ac0", "ac1", "ac2", "ac3", "ac4", "ac5", "fp", "ap" }
598 /* Globalizing directive for a label. */
599 #define GLOBAL_ASM_OP "\t.globl "
601 /* The prefix to add to user-visible assembler symbols. */
603 #define USER_LABEL_PREFIX "_"
605 /* This is how to store into the string LABEL
606 the symbol_ref name of an internal numbered label where
607 PREFIX is the class of label and NUM is the number within the class.
608 This is suitable for output with `assemble_name'. */
610 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
611 sprintf (LABEL, "*%s_%lu", PREFIX, (unsigned long)(NUM))
613 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
614 output_ascii (FILE, P, SIZE)
616 /* This is how to output an element of a case-vector that is absolute. */
618 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
619 fprintf (FILE, "\t%sL_%d\n", TARGET_UNIX_ASM ? "" : ".word ", VALUE)
621 /* This is how to output an element of a case-vector that is relative.
622 Don't define this if it is not supported. */
624 /* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */
626 /* This is how to output an assembler line
627 that says to advance the location counter
628 to a multiple of 2**LOG bytes.
633 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
639 fprintf (FILE, "\t.even\n"); \
642 gcc_unreachable (); \
645 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
646 fprintf (FILE, "\t.=.+ %#ho\n", (unsigned short)(SIZE))
648 /* This says how to output an assembler line
649 to define a global common symbol. */
651 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
652 pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, true)
655 /* This says how to output an assembler line
656 to define a local common symbol. */
658 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
659 pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, false)
661 /* Print a memory address as an operand to reference that memory location. */
663 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
664 print_operand_address (FILE, ADDR)
666 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
668 fprintf (FILE, "\tmov %s, -(sp)\n", reg_names[REGNO]) \
671 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
673 fprintf (FILE, "\tmov (sp)+, %s\n", reg_names[REGNO]) \
676 #define TRAMPOLINE_SIZE 8
677 #define TRAMPOLINE_ALIGNMENT 16
679 /* there is no point in avoiding branches on a pdp,
680 since branches are really cheap - I just want to find out
681 how much difference the BRANCH_COST macro makes in code */
682 #define BRANCH_COST(speed_p, predictable_p) (TARGET_BRANCH_CHEAP ? 0 : 1)
685 #define COMPARE_FLAG_MODE HImode