1 (define_automaton "mpc,mpcfp")
2 (define_cpu_unit "iu_mpc,mciu_mpc" "mpc")
3 (define_cpu_unit "fpu_mpc" "mpcfp")
4 (define_cpu_unit "lsu_mpc,bpu_mpc" "mpc")
6 ;; MPCCORE 32-bit SCIU, MCIU, LSU, FPU, BPU
9 (define_insn_reservation "mpccore-load" 2
10 (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u")
11 (eq_attr "cpu" "mpccore"))
14 (define_insn_reservation "mpccore-store" 1
15 (and (eq_attr "type" "store,store_ux,store_u,fpstore,fpstore_ux,fpstore_u")
16 (eq_attr "cpu" "mpccore"))
19 (define_insn_reservation "mpccore-fpload" 2
20 (and (eq_attr "type" "fpload,fpload_ux,fpload_u")
21 (eq_attr "cpu" "mpccore"))
24 (define_insn_reservation "mpccore-integer" 1
25 (and (eq_attr "type" "integer")
26 (eq_attr "cpu" "mpccore"))
29 (define_insn_reservation "mpccore-imul" 2
30 (and (eq_attr "type" "imul,imul2,imul3")
31 (eq_attr "cpu" "mpccore"))
34 ; Divide latency varies greatly from 2-11, use 6 as average
35 (define_insn_reservation "mpccore-idiv" 6
36 (and (eq_attr "type" "idiv")
37 (eq_attr "cpu" "mpccore"))
40 (define_insn_reservation "mpccore-compare" 3
41 (and (eq_attr "type" "cmp,compare,delayed_compare")
42 (eq_attr "cpu" "mpccore"))
43 "iu_mpc,nothing,bpu_mpc")
45 (define_insn_reservation "mpccore-fpcompare" 2
46 (and (eq_attr "type" "fpcompare")
47 (eq_attr "cpu" "mpccore"))
50 (define_insn_reservation "mpccore-fp" 4
51 (and (eq_attr "type" "fp")
52 (eq_attr "cpu" "mpccore"))
55 (define_insn_reservation "mpccore-dmul" 5
56 (and (eq_attr "type" "dmul")
57 (eq_attr "cpu" "mpccore"))
60 (define_insn_reservation "mpccore-sdiv" 10
61 (and (eq_attr "type" "sdiv")
62 (eq_attr "cpu" "mpccore"))
65 (define_insn_reservation "mpccore-ddiv" 17
66 (and (eq_attr "type" "ddiv")
67 (eq_attr "cpu" "mpccore"))
70 (define_insn_reservation "mpccore-mtjmpr" 4
71 (and (eq_attr "type" "mtjmpr")
72 (eq_attr "cpu" "mpccore"))
75 (define_insn_reservation "mpccore-jmpreg" 1
76 (and (eq_attr "type" "jmpreg,branch,cr_logical,delayed_cr,mfcr,mtcr")
77 (eq_attr "cpu" "mpccore"))