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1 /* GCC backend definitions for the Renesas RX processor.
2 Copyright (C) 2008-2020 Free Software Foundation, Inc.
3 Contributed by Red Hat.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20 \f
21
22 #define TARGET_CPU_CPP_BUILTINS() \
23 do \
24 { \
25 builtin_define ("__RX__"); \
26 builtin_assert ("cpu=RX"); \
27 if (rx_cpu_type == RX610) \
28 { \
29 builtin_define ("__RX610__"); \
30 builtin_assert ("machine=RX610"); \
31 } \
32 else if (rx_cpu_type == RX100) \
33 { \
34 builtin_define ("__RX100__"); \
35 builtin_assert ("machine=RX100"); \
36 } \
37 else if (rx_cpu_type == RX200) \
38 { \
39 builtin_define ("__RX200__"); \
40 builtin_assert ("machine=RX200"); \
41 } \
42 else if (rx_cpu_type == RX600) \
43 { \
44 builtin_define ("__RX600__"); \
45 builtin_assert ("machine=RX600"); \
46 } \
47 \
48 if (TARGET_BIG_ENDIAN_DATA) \
49 builtin_define ("__RX_BIG_ENDIAN__"); \
50 else \
51 builtin_define ("__RX_LITTLE_ENDIAN__");\
52 \
53 if (TARGET_64BIT_DOUBLES) \
54 builtin_define ("__RX_64BIT_DOUBLES__");\
55 else \
56 builtin_define ("__RX_32BIT_DOUBLES__");\
57 \
58 if (ALLOW_RX_FPU_INSNS) \
59 builtin_define ("__RX_FPU_INSNS__"); \
60 \
61 if (TARGET_AS100_SYNTAX) \
62 builtin_define ("__RX_AS100_SYNTAX__"); \
63 else \
64 builtin_define ("__RX_GAS_SYNTAX__"); \
65 \
66 if (TARGET_GCC_ABI) \
67 builtin_define ("__RX_GCC_ABI__"); \
68 else \
69 builtin_define ("__RX_ABI__"); \
70 \
71 if (rx_allow_string_insns) \
72 builtin_define ("__RX_ALLOW_STRING_INSNS__"); \
73 else \
74 builtin_define ("__RX_DISALLOW_STRING_INSNS__");\
75 } \
76 while (0)
77
78 #undef CC1_SPEC
79 #define CC1_SPEC "\
80 %{mas100-syntax:%{gdwarf*:%e-mas100-syntax is incompatible with -gdwarf}} \
81 %{mcpu=rx100:%{fpu:%erx100 cpu does not have FPU hardware}} \
82 %{mcpu=rx200:%{fpu:%erx200 cpu does not have FPU hardware}}"
83
84 #undef STARTFILE_SPEC
85 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:crt0.o%s} crtbegin.o%s"
86
87 #undef ENDFILE_SPEC
88 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
89
90 #undef CPP_SPEC
91 #define CPP_SPEC "\
92 %{mpid:-D_RX_PID=1} \
93 %{mint-register=*:-D_RX_INT_REGISTERS=%*} \
94 %{msmall-data-limit*:-D_RX_SMALL_DATA} \
95 "
96
97 #undef ASM_SPEC
98 #define ASM_SPEC "\
99 %{mbig-endian-data:-mbig-endian-data} \
100 %{m64bit-doubles:-m64bit-doubles} \
101 %{!m64bit-doubles:-m32bit-doubles} \
102 %{msmall-data-limit*:-msmall-data-limit} \
103 %{mrelax:-relax} \
104 %{mpid} \
105 %{mno-allow-string-insns} \
106 %{mint-register=*} \
107 %{mgcc-abi:-mgcc-abi} %{!mgcc-abi:-mrx-abi} \
108 %{mcpu=*} \
109 "
110
111 #undef LIB_SPEC
112 #define LIB_SPEC " \
113 --start-group \
114 -lc \
115 %{msim:-lsim}%{!msim:-lnosys} \
116 %{fprofile-arcs|fprofile-generate|coverage:-lgcov} \
117 --end-group \
118 %{!T*: %{msim:%Trx-sim.ld}%{!msim:%Trx.ld}} \
119 "
120
121 #undef LINK_SPEC
122 #define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
123 \f
124
125 #define BITS_BIG_ENDIAN 0
126 #define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
127 #define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
128
129 #define UNITS_PER_WORD 4
130
131 #define INT_TYPE_SIZE 32
132 #define LONG_TYPE_SIZE 32
133 #define LONG_LONG_TYPE_SIZE 64
134
135 #define FLOAT_TYPE_SIZE 32
136 #define DOUBLE_TYPE_SIZE (TARGET_64BIT_DOUBLES ? 64 : 32)
137 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
138
139 #define DEFAULT_SIGNED_CHAR 0
140
141 /* RX load/store instructions can handle unaligned addresses. */
142 #define STRICT_ALIGNMENT 0
143 #define FUNCTION_BOUNDARY ((rx_cpu_type == RX100 || rx_cpu_type == RX200) ? 4 : 8)
144 #define BIGGEST_ALIGNMENT 32
145 #define STACK_BOUNDARY 32
146 #define PARM_BOUNDARY 8
147
148 #define STACK_GROWS_DOWNWARD 1
149 #define FRAME_GROWS_DOWNWARD 0
150 #define FIRST_PARM_OFFSET(FNDECL) 0
151
152 #define MAX_REGS_PER_ADDRESS 2
153
154 #define Pmode SImode
155 #define POINTER_SIZE 32
156 #undef SIZE_TYPE
157 #define SIZE_TYPE "long unsigned int"
158 #undef PTRDIFF_TYPE
159 #define PTRDIFF_TYPE "long int"
160 #undef WCHAR_TYPE
161 #define WCHAR_TYPE "long int"
162 #undef WCHAR_TYPE_SIZE
163 #define WCHAR_TYPE_SIZE BITS_PER_WORD
164 #define POINTERS_EXTEND_UNSIGNED 1
165 #define FUNCTION_MODE QImode
166 #define CASE_VECTOR_MODE Pmode
167 #define WORD_REGISTER_OPERATIONS 1
168 #define HAS_LONG_COND_BRANCH 0
169 #define HAS_LONG_UNCOND_BRANCH 0
170
171 #define MOVE_MAX 4
172
173 #define HAVE_PRE_DECREMENT 1
174 #define HAVE_POST_INCREMENT 1
175
176 #define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2)
177 #define SLOW_BYTE_ACCESS 1
178
179 #define STORE_FLAG_VALUE 1
180 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
181 #define SHORT_IMMEDIATES_SIGN_EXTEND 1
182 \f
183 enum reg_class
184 {
185 NO_REGS, /* No registers in set. */
186 GR_REGS, /* Integer registers. */
187 ALL_REGS, /* All registers. */
188 LIM_REG_CLASSES /* Max value + 1. */
189 };
190
191 #define REG_CLASS_NAMES \
192 { \
193 "NO_REGS", \
194 "GR_REGS", \
195 "ALL_REGS" \
196 }
197
198 #define REG_CLASS_CONTENTS \
199 { \
200 { 0x00000000 }, /* No registers, */ \
201 { 0x0000ffff }, /* Integer registers. */ \
202 { 0x0000ffff } /* All registers. */ \
203 }
204
205 #define N_REG_CLASSES (int) LIM_REG_CLASSES
206 #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \
207 + UNITS_PER_WORD - 1) \
208 / UNITS_PER_WORD)
209
210 #define GENERAL_REGS GR_REGS
211 #define BASE_REG_CLASS GR_REGS
212 #define INDEX_REG_CLASS GR_REGS
213
214 #define FIRST_PSEUDO_REGISTER 17
215
216 #define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER \
217 ? GR_REGS : NO_REGS)
218
219 #define STACK_POINTER_REGNUM 0
220 #define FUNC_RETURN_REGNUM 1
221 #define FRAME_POINTER_REGNUM 6
222 #define ARG_POINTER_REGNUM 7
223 #define STATIC_CHAIN_REGNUM 8
224 #define TRAMPOLINE_TEMP_REGNUM 9
225 #define STRUCT_VAL_REGNUM 15
226 #define CC_REGNUM 16
227
228 /* This is the register which will probably be used to hold the address of
229 the start of the small data area, if -msmall-data-limit is being used,
230 or the address of the constant data area if -mpid is being used. If both
231 features are in use then two consecutive registers will be used.
232
233 Note - these registers must not be call_used because otherwise library
234 functions that are compiled without -msmall-data-limit/-mpid support
235 might clobber them.
236
237 Note that the actual values used depends on other options; use
238 rx_gp_base_regnum() and rx_pid_base_regnum() instead. */
239 #define GP_BASE_REGNUM 13
240
241 #define ELIMINABLE_REGS \
242 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
243 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
244 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
245
246 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
247 (OFFSET) = rx_initial_elimination_offset ((FROM), (TO))
248
249
250 #define FUNCTION_ARG_REGNO_P(N) (((N) >= 1) && ((N) <= 4))
251 #define FUNCTION_VALUE_REGNO_P(N) ((N) == FUNC_RETURN_REGNUM)
252 #define DEFAULT_PCC_STRUCT_RETURN 0
253
254 #define FIXED_REGISTERS \
255 { \
256 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 \
257 }
258
259 #define CALL_USED_REGISTERS \
260 { \
261 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1 \
262 }
263
264 #define LIBCALL_VALUE(MODE) \
265 gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
266 || COMPLEX_MODE_P (MODE) \
267 || VECTOR_MODE_P (MODE) \
268 || GET_MODE_SIZE (MODE) >= 4) \
269 ? (MODE) \
270 : SImode), \
271 FUNC_RETURN_REGNUM)
272
273 /* Order of allocation of registers. */
274
275 #define REG_ALLOC_ORDER \
276 { 7, 10, 11, 12, 13, 14, 4, 3, 2, 1, 9, 8, 6, 5, 15 \
277 }
278
279 #define REGNO_IN_RANGE(REGNO, MIN, MAX) \
280 (IN_RANGE ((REGNO), (MIN), (MAX)) \
281 || (reg_renumber != NULL \
282 && reg_renumber[(REGNO)] >= (MIN) \
283 && reg_renumber[(REGNO)] <= (MAX)))
284
285 #ifdef REG_OK_STRICT
286 #define REGNO_OK_FOR_BASE_P(regno) REGNO_IN_RANGE (regno, 0, 15)
287 #else
288 #define REGNO_OK_FOR_BASE_P(regno) 1
289 #endif
290
291 #define REGNO_OK_FOR_INDEX_P(regno) REGNO_OK_FOR_BASE_P (regno)
292
293 #define RTX_OK_FOR_BASE(X, STRICT) \
294 ((STRICT) ? \
295 ( (REG_P (X) \
296 && REGNO_IN_RANGE (REGNO (X), 0, 15)) \
297 || (GET_CODE (X) == SUBREG \
298 && REG_P (SUBREG_REG (X)) \
299 && REGNO_IN_RANGE (REGNO (SUBREG_REG (X)), 0, 15))) \
300 : \
301 ( (REG_P (X) \
302 || (GET_CODE (X) == SUBREG \
303 && REG_P (SUBREG_REG (X))))))
304 \f
305
306 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
307 ((COUNT) == 0 \
308 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT (-4))) \
309 : NULL_RTX)
310
311 #define INCOMING_RETURN_ADDR_RTX gen_rtx_MEM (Pmode, stack_pointer_rtx)
312
313 #define ACCUMULATE_OUTGOING_ARGS 1
314
315 typedef unsigned int CUMULATIVE_ARGS;
316
317 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
318 (CUM) = 0
319
320 \f
321 #define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20)
322 #define TRAMPOLINE_ALIGNMENT 32
323 \f
324 #define NO_PROFILE_COUNTERS 1
325 #define PROFILE_BEFORE_PROLOGUE 1
326
327 #define FUNCTION_PROFILER(FILE, LABELNO) \
328 fprintf (FILE, "\tbsr\t__mcount\n");
329 \f
330
331 #define REGISTER_NAMES \
332 { \
333 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
334 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", "cc" \
335 }
336
337 #define ADDITIONAL_REGISTER_NAMES \
338 { \
339 { "sp", STACK_POINTER_REGNUM } \
340 , { "fp", FRAME_POINTER_REGNUM } \
341 , { "arg", ARG_POINTER_REGNUM } \
342 , { "chain", STATIC_CHAIN_REGNUM } \
343 }
344
345 #define DATA_SECTION_ASM_OP \
346 (TARGET_AS100_SYNTAX ? "\t.SECTION D,DATA" \
347 : "\t.section D,\"aw\",@progbits\n\t.p2align 2")
348
349 #define SDATA_SECTION_ASM_OP \
350 (TARGET_AS100_SYNTAX ? "\t.SECTION D_2,DATA,ALIGN=2" \
351 : "\t.section D_2,\"aw\",@progbits\n\t.p2align 1")
352
353 #undef READONLY_DATA_SECTION_ASM_OP
354 #define READONLY_DATA_SECTION_ASM_OP \
355 (TARGET_AS100_SYNTAX ? "\t.SECTION C,ROMDATA,ALIGN=4" \
356 : "\t.section C,\"a\",@progbits\n\t.p2align 2")
357
358 #define BSS_SECTION_ASM_OP \
359 (TARGET_AS100_SYNTAX ? "\t.SECTION B,DATA,ALIGN=4" \
360 : "\t.section B,\"w\",@nobits\n\t.p2align 2")
361
362 #define SBSS_SECTION_ASM_OP \
363 (TARGET_AS100_SYNTAX ? "\t.SECTION B_2,DATA,ALIGN=2" \
364 : "\t.section B_2,\"w\",@nobits\n\t.p2align 1")
365
366 /* The following definitions are conditional depending upon whether the
367 compiler is being built or crtstuff.c is being compiled by the built
368 compiler. */
369 #if defined CRT_BEGIN || defined CRT_END
370 # ifdef __RX_AS100_SYNTAX
371 # define TEXT_SECTION_ASM_OP "\t.SECTION P,CODE"
372 # define CTORS_SECTION_ASM_OP "\t.SECTION init_array,CODE"
373 # define DTORS_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
374 # define INIT_ARRAY_SECTION_ASM_OP "\t.SECTION init_array,CODE"
375 # define FINI_ARRAY_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
376 # else
377 # define TEXT_SECTION_ASM_OP "\t.section P,\"ax\""
378 # define CTORS_SECTION_ASM_OP \
379 "\t.section\t.init_array,\"awx\",@init_array"
380 # define DTORS_SECTION_ASM_OP \
381 "\t.section\t.fini_array,\"awx\",@fini_array"
382 # define INIT_ARRAY_SECTION_ASM_OP \
383 "\t.section\t.init_array,\"awx\",@init_array"
384 # define FINI_ARRAY_SECTION_ASM_OP \
385 "\t.section\t.fini_array,\"awx\",@fini_array"
386 # endif
387 #else
388 # define TEXT_SECTION_ASM_OP \
389 (TARGET_AS100_SYNTAX ? "\t.SECTION P,CODE" : "\t.section P,\"ax\"")
390
391 # define CTORS_SECTION_ASM_OP \
392 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
393 : "\t.section\t.init_array,\"awx\",@init_array")
394
395 # define DTORS_SECTION_ASM_OP \
396 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
397 : "\t.section\t.fini_array,\"awx\",@fini_array")
398
399 # define INIT_ARRAY_SECTION_ASM_OP \
400 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
401 : "\t.section\t.init_array,\"awx\",@init_array")
402
403 # define FINI_ARRAY_SECTION_ASM_OP \
404 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
405 : "\t.section\t.fini_array,\"awx\",@fini_array")
406 #endif
407
408 #define GLOBAL_ASM_OP \
409 (TARGET_AS100_SYNTAX ? "\t.GLB\t" : "\t.global\t")
410 #define ASM_COMMENT_START " ;"
411 #undef ASM_APP_ON
412 #define ASM_APP_ON ""
413 #undef ASM_APP_OFF
414 #define ASM_APP_OFF ""
415 #define LOCAL_LABEL_PREFIX "L"
416 #undef USER_LABEL_PREFIX
417 #define USER_LABEL_PREFIX "_"
418
419 /* Compute the alignment needed for label X in various situations.
420 If the user has specified an alignment then honour that, otherwise
421 use rx_align_for_label. */
422 #define JUMP_ALIGN(x) (align_jumps.levels[0].log > 0 ? align_jumps : align_flags (rx_align_for_label (x, 0)))
423 #define LABEL_ALIGN(x) (align_labels.levels[0].log > 0 ? align_labels : align_flags (rx_align_for_label (x, 3)))
424 #define LOOP_ALIGN(x) (align_loops.levels[0].log > 0 ? align_loops : align_flags (rx_align_for_label (x, 2)))
425 #define LABEL_ALIGN_AFTER_BARRIER(x) rx_align_for_label (x, 0)
426
427 #define ASM_OUTPUT_MAX_SKIP_ALIGN(STREAM, LOG, MAX_SKIP) \
428 do \
429 { \
430 if ((LOG) == 0 || (MAX_SKIP) == 0) \
431 break; \
432 if (TARGET_AS100_SYNTAX) \
433 { \
434 if ((LOG) >= 2) \
435 fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
436 else \
437 fprintf (STREAM, "\t.ALIGN 2\n"); \
438 } \
439 else \
440 fprintf (STREAM, "\t.balign %d,3,%d\n", 1 << (LOG), (MAX_SKIP)); \
441 } \
442 while (0)
443
444 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
445 do \
446 { \
447 if ((LOG) == 0) \
448 break; \
449 if (TARGET_AS100_SYNTAX) \
450 { \
451 if ((LOG) >= 2) \
452 fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
453 else \
454 fprintf (STREAM, "\t.ALIGN 2\n"); \
455 } \
456 else \
457 fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \
458 } \
459 while (0)
460
461 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
462 fprintf (FILE, TARGET_AS100_SYNTAX ? "\t.LWORD L%d\n" : "\t.long .L%d\n", \
463 VALUE)
464
465 /* This is how to output an element of a case-vector that is relative.
466 Note: The local label referenced by the "1b" below is emitted by
467 the tablejump insn. */
468
469 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
470 fprintf (FILE, TARGET_AS100_SYNTAX \
471 ? "\t.LWORD L%d - ?-\n" : "\t.long .L%d - 1b\n", VALUE)
472
473 #define CASE_VECTOR_PC_RELATIVE (TARGET_PID)
474
475 #define ASM_OUTPUT_SIZE_DIRECTIVE(STREAM, NAME, SIZE) \
476 do \
477 { \
478 HOST_WIDE_INT size_ = (SIZE); \
479 \
480 /* The as100 assembler does not have an equivalent of the SVR4 \
481 .size pseudo-op. */ \
482 if (TARGET_AS100_SYNTAX) \
483 break; \
484 \
485 fputs (SIZE_ASM_OP, STREAM); \
486 assemble_name (STREAM, NAME); \
487 fprintf (STREAM, ", " HOST_WIDE_INT_PRINT_DEC "\n", size_); \
488 } \
489 while (0)
490
491 #define ASM_OUTPUT_MEASURED_SIZE(STREAM, NAME) \
492 do \
493 { \
494 /* The as100 assembler does not have an equivalent of the SVR4 \
495 .size pseudo-op. */ \
496 if (TARGET_AS100_SYNTAX) \
497 break; \
498 fputs (SIZE_ASM_OP, STREAM); \
499 assemble_name (STREAM, NAME); \
500 fputs (", .-", STREAM); \
501 assemble_name (STREAM, NAME); \
502 putc ('\n', STREAM); \
503 } \
504 while (0)
505
506 #define ASM_OUTPUT_TYPE_DIRECTIVE(STREAM, NAME, TYPE) \
507 do \
508 { \
509 /* The as100 assembler does not have an equivalent of the SVR4 \
510 .size pseudo-op. */ \
511 if (TARGET_AS100_SYNTAX) \
512 break; \
513 fputs (TYPE_ASM_OP, STREAM); \
514 assemble_name (STREAM, NAME); \
515 fputs (", ", STREAM); \
516 fprintf (STREAM, TYPE_OPERAND_FMT, TYPE); \
517 putc ('\n', STREAM); \
518 } \
519 while (0)
520
521 #undef ASM_GENERATE_INTERNAL_LABEL
522 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
523 do \
524 { \
525 sprintf (LABEL, TARGET_AS100_SYNTAX ? "*%s%u" : "*.%s%u", \
526 PREFIX, (unsigned) (NUM)); \
527 } \
528 while (0)
529
530 #undef ASM_OUTPUT_EXTERNAL
531 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
532 do \
533 { \
534 if (TARGET_AS100_SYNTAX) \
535 targetm.asm_out.globalize_label (FILE, NAME); \
536 default_elf_asm_output_external (FILE, DECL, NAME); \
537 } \
538 while (0)
539
540 #undef ASM_OUTPUT_ALIGNED_COMMON
541 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
542 do \
543 { \
544 if (TARGET_AS100_SYNTAX) \
545 { \
546 fprintf ((FILE), "\t.GLB\t"); \
547 assemble_name ((FILE), (NAME)); \
548 fprintf ((FILE), "\n"); \
549 assemble_name ((FILE), (NAME)); \
550 switch ((ALIGN) / BITS_PER_UNIT) \
551 { \
552 case 4: \
553 fprintf ((FILE), ":\t.BLKL\t" HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
554 (SIZE) / 4); \
555 break; \
556 case 2: \
557 fprintf ((FILE), ":\t.BLKW\t" HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
558 (SIZE) / 2); \
559 break; \
560 default: \
561 fprintf ((FILE), ":\t.BLKB\t" HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
562 (SIZE)); \
563 break; \
564 } \
565 } \
566 else \
567 { \
568 fprintf ((FILE), "%s", COMMON_ASM_OP); \
569 assemble_name ((FILE), (NAME)); \
570 fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
571 (SIZE), (ALIGN) / BITS_PER_UNIT); \
572 } \
573 } \
574 while (0)
575
576 #undef SKIP_ASM_OP
577 #define SKIP_ASM_OP (TARGET_AS100_SYNTAX ? "\t.BLKB\t" : "\t.zero\t")
578
579 #undef ASM_OUTPUT_LIMITED_STRING
580 #define ASM_OUTPUT_LIMITED_STRING(FILE, STR) \
581 do \
582 { \
583 const unsigned char *_limited_str = \
584 (const unsigned char *) (STR); \
585 unsigned ch; \
586 \
587 fprintf ((FILE), TARGET_AS100_SYNTAX \
588 ? "\t.BYTE\t\"" : "\t.string\t\""); \
589 \
590 for (; (ch = *_limited_str); _limited_str++) \
591 { \
592 int escape; \
593 \
594 switch (escape = ESCAPES[ch]) \
595 { \
596 case 0: \
597 putc (ch, (FILE)); \
598 break; \
599 case 1: \
600 fprintf ((FILE), "\\%03o", ch); \
601 break; \
602 default: \
603 putc ('\\', (FILE)); \
604 putc (escape, (FILE)); \
605 break; \
606 } \
607 } \
608 \
609 fprintf ((FILE), TARGET_AS100_SYNTAX ? "\"\n\t.BYTE\t0\n" : "\"\n");\
610 } \
611 while (0)
612
613 /* For PIC put jump tables into the text section so that the offsets that
614 they contain are always computed between two same-section symbols. */
615 #define JUMP_TABLES_IN_TEXT_SECTION (TARGET_PID || flag_pic)
616 \f
617 /* This is a version of REG_P that also returns TRUE for SUBREGs. */
618 #define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)
619
620 /* Like REG_P except that this macro is true for SET expressions. */
621 #define SET_P(rtl) (GET_CODE (rtl) == SET)
622 \f
623 /* The AS100 assembler does not support .leb128 and .uleb128, but
624 the compiler-build-time configure tests will have enabled their
625 use because GAS supports them. So default to generating STABS
626 debug information instead of DWARF2 when generating AS100
627 compatible output. */
628 #undef PREFERRED_DEBUGGING_TYPE
629 #define PREFERRED_DEBUGGING_TYPE (TARGET_AS100_SYNTAX \
630 ? DBX_DEBUG : DWARF2_DEBUG)
631
632 #define INCOMING_FRAME_SP_OFFSET 4
633 #define ARG_POINTER_CFA_OFFSET(FNDECL) 4
634 \f
635 #define TARGET_USE_FPU (! TARGET_NO_USE_FPU)
636
637 /* This macro is used to decide when RX FPU instructions can be used. */
638 #define ALLOW_RX_FPU_INSNS (TARGET_USE_FPU)
639
640 #define BRANCH_COST(SPEED,PREDICT) 1
641 #define REGISTER_MOVE_COST(MODE,FROM,TO) 2
642
643 #define SELECT_CC_MODE(OP,X,Y) rx_select_cc_mode(OP, X, Y)
644
645 #define ADJUST_INSN_LENGTH(INSN,LENGTH) \
646 do \
647 { \
648 (LENGTH) = rx_adjust_insn_length ((INSN), (LENGTH)); \
649 } \
650 while (0)
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