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MAINTAINERS: Add myself as a maintainer for the RX port.
[thirdparty/gcc.git] / gcc / config / rx / rx.h
1 /* GCC backend definitions for the Renesas RX processor.
2 Copyright (C) 2008, 2009 Free Software Foundation, Inc.
3 Contributed by Red Hat.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20 \f
21
22 #define TARGET_CPU_CPP_BUILTINS() \
23 do \
24 { \
25 builtin_define ("__RX__"); \
26 builtin_assert ("cpu=RX"); \
27 builtin_assert ("machine=RX"); \
28 \
29 if (TARGET_BIG_ENDIAN_DATA) \
30 builtin_define ("__RX_BIG_ENDIAN__"); \
31 else \
32 builtin_define ("__RX_LITTLE_ENDIAN__");\
33 \
34 if (TARGET_64BIT_DOUBLES) \
35 builtin_define ("__RX_64BIT_DOUBLES__");\
36 else \
37 builtin_define ("__RX_32BIT_DOUBLES__");\
38 \
39 if (TARGET_AS100_SYNTAX) \
40 builtin_define ("__RX_AS100_SYNTAX__"); \
41 else \
42 builtin_define ("__RX_GAS_SYNTAX__"); \
43 } \
44 while (0)
45
46 #undef STARTFILE_SPEC
47 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:crt0.o%s} crtbegin.o%s"
48
49 #undef ENDFILE_SPEC
50 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
51
52 #undef ASM_SPEC
53 #define ASM_SPEC "\
54 %{mbig-endian-data:-mbig-endian-data} \
55 %{m64bit-doubles:-m64bit-doubles} \
56 %{msmall-data-limit*:-msmall-data-limit} \
57 %{mrelax:-relax} \
58 "
59
60 #undef LIB_SPEC
61 #define LIB_SPEC " \
62 --start-group \
63 -lc \
64 %{msim*:-lsim}%{!msim*:-lnosys} \
65 %{fprofile-arcs|fprofile-generate|coverage:-lgcov} \
66 --end-group \
67 %{!T*: %{msim*:%Trx-sim.ld}%{!msim*:%Trx.ld}} \
68 "
69
70 #undef LINK_SPEC
71 #define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
72 \f
73
74 #define BITS_BIG_ENDIAN 0
75 #define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
76 #define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
77
78 #ifdef __RX_BIG_ENDIAN__
79 #define LIBGCC2_WORDS_BIG_ENDIAN 1
80 #else
81 #define LIBGCC2_WORDS_BIG_ENDIAN 0
82 #endif
83
84 #define UNITS_PER_WORD 4
85
86 #define INT_TYPE_SIZE 32
87 #define LONG_TYPE_SIZE 32
88 #define LONG_LONG_TYPE_SIZE 64
89
90 #define FLOAT_TYPE_SIZE 32
91 #define DOUBLE_TYPE_SIZE (TARGET_64BIT_DOUBLES ? 64 : 32)
92 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
93
94 #ifdef __RX_64BIT_DOUBLES__
95 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
96 #define LIBGCC2_DOUBLE_TYPE_SIZE 64
97 #define LIBGCC2_HAS_DF_MODE 1
98 #else
99 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 32
100 #define LIBGCC2_DOUBLE_TYPE_SIZE 32
101 #endif
102
103 #define DEFAULT_SIGNED_CHAR 0
104
105 #define STRICT_ALIGNMENT 1
106 #define FUNCTION_BOUNDARY 8
107 #define BIGGEST_ALIGNMENT 32
108 #define STACK_BOUNDARY 32
109 #define PARM_BOUNDARY 8
110
111 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) 32
112
113 #define STACK_GROWS_DOWNWARD 1
114 #define FRAME_GROWS_DOWNWARD 0
115 #define FIRST_PARM_OFFSET(FNDECL) 0
116
117 #define MAX_REGS_PER_ADDRESS 2
118
119 #define Pmode SImode
120 #define POINTER_SIZE 32
121 #undef SIZE_TYPE
122 #define SIZE_TYPE "long unsigned int"
123 #define POINTERS_EXTEND_UNSIGNED 1
124 #define FUNCTION_MODE QImode
125 #define CASE_VECTOR_MODE Pmode
126 #define WORD_REGISTER_OPERATIONS 1
127 #define HAS_LONG_COND_BRANCH 0
128 #define HAS_LONG_UNCOND_BRANCH 0
129
130 #define MOVE_MAX 4
131 #define STARTING_FRAME_OFFSET 0
132
133 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
134 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
135
136 #define LEGITIMATE_CONSTANT_P(X) rx_is_legitimate_constant (X)
137
138 #define HANDLE_PRAGMA_PACK_PUSH_POP 1
139
140 #define HAVE_PRE_DECCREMENT 1
141 #define HAVE_POST_INCREMENT 1
142
143 #define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2)
144 #define SLOW_BYTE_ACCESS 1
145
146 #define STORE_FLAG_VALUE 1
147 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
148 #define SHORT_IMMEDIATES_SIGN_EXTEND 1
149 \f
150 enum reg_class
151 {
152 NO_REGS, /* No registers in set. */
153 GR_REGS, /* Integer registers. */
154 ALL_REGS, /* All registers. */
155 LIM_REG_CLASSES /* Max value + 1. */
156 };
157
158 #define REG_CLASS_NAMES \
159 { \
160 "NO_REGS", \
161 "GR_REGS", \
162 "ALL_REGS" \
163 }
164
165 #define REG_CLASS_CONTENTS \
166 { \
167 { 0x00000000 }, /* No registers, */ \
168 { 0x0000ffff }, /* Integer registers. */ \
169 { 0x0000ffff } /* All registers. */ \
170 }
171
172 #define IRA_COVER_CLASSES \
173 { \
174 GR_REGS, LIM_REG_CLASSES \
175 }
176
177 #define SMALL_REGISTER_CLASSES 0
178 #define N_REG_CLASSES (int) LIM_REG_CLASSES
179 #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \
180 + UNITS_PER_WORD - 1) \
181 / UNITS_PER_WORD)
182
183 #define GENERAL_REGS GR_REGS
184 #define BASE_REG_CLASS GR_REGS
185 #define INDEX_REG_CLASS GR_REGS
186
187 #define FIRST_PSEUDO_REGISTER 16
188
189 #define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER \
190 ? GR_REGS : NO_REGS)
191
192 #define STACK_POINTER_REGNUM 0
193 #define FUNC_RETURN_REGNUM 1
194 #define FRAME_POINTER_REGNUM 6
195 #define ARG_POINTER_REGNUM 7
196 #define STATIC_CHAIN_REGNUM 8
197 #define TRAMPOLINE_TEMP_REGNUM 9
198 #define STRUCT_VAL_REGNUM 15
199
200 /* This is the register which is used to hold the address of the start
201 of the small data area, if that feature is being used. Note - this
202 register must not be call_used because otherwise library functions
203 that are compiled without small data support might clobber it.
204
205 FIXME: The function gcc/config/rx/rx.c:rx_gen_move_template() has a
206 built in copy of this register's name, rather than constructing the
207 name from this #define. */
208 #define GP_BASE_REGNUM 13
209
210 #define ELIMINABLE_REGS \
211 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
212 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
213 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
214
215 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
216 (OFFSET) = rx_initial_elimination_offset ((FROM), (TO))
217
218
219 #define FUNCTION_ARG_REGNO_P(N) (((N) >= 1) && ((N) <= 4))
220 #define FUNCTION_VALUE_REGNO_P(N) ((N) == FUNC_RETURN_REGNUM)
221 #define DEFAULT_PCC_STRUCT_RETURN 0
222
223 #define FIXED_REGISTERS \
224 { \
225 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
226 }
227
228 #define CALL_USED_REGISTERS \
229 { \
230 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1 \
231 }
232
233 #define CONDITIONAL_REGISTER_USAGE \
234 rx_conditional_register_usage ()
235
236 #define LIBCALL_VALUE(MODE) \
237 gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
238 || GET_MODE_SIZE (MODE) >= 4) \
239 ? (MODE) \
240 : SImode), \
241 FUNC_RETURN_REGNUM)
242
243 /* Order of allocation of registers. */
244
245 #define REG_ALLOC_ORDER \
246 { 7, 10, 11, 12, 13, 14, 4, 3, 2, 1, 9, 8, 6, 5, 15 \
247 }
248
249 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
250
251 #define REGNO_IN_RANGE(REGNO, MIN, MAX) \
252 (IN_RANGE ((REGNO), (MIN), (MAX)) \
253 || (reg_renumber != NULL \
254 && reg_renumber[(REGNO)] >= (MIN) \
255 && reg_renumber[(REGNO)] <= (MAX)))
256
257 #ifdef REG_OK_STRICT
258 #define REGNO_OK_FOR_BASE_P(regno) REGNO_IN_RANGE (regno, 0, 15)
259 #else
260 #define REGNO_OK_FOR_BASE_P(regno) 1
261 #endif
262
263 #define REGNO_OK_FOR_INDEX_P(regno) REGNO_OK_FOR_BASE_P (regno)
264
265 #define RTX_OK_FOR_BASE(X, STRICT) \
266 ((STRICT) ? \
267 ( (REG_P (X) \
268 && REGNO_IN_RANGE (REGNO (X), 0, 15)) \
269 || (GET_CODE (X) == SUBREG \
270 && REG_P (SUBREG_REG (X)) \
271 && REGNO_IN_RANGE (REGNO (SUBREG_REG (X)), 0, 15))) \
272 : \
273 ( (REG_P (X) \
274 || (GET_CODE (X) == SUBREG \
275 && REG_P (SUBREG_REG (X))))))
276
277 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
278 do \
279 { \
280 if (rx_is_mode_dependent_addr (ADDR)) \
281 goto LABEL; \
282 } \
283 while (0)
284 \f
285
286 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
287 ((COUNT) == 0 \
288 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT (-4))) \
289 : NULL_RTX)
290
291 #define INCOMING_RETURN_ADDR_RTX gen_rtx_MEM (Pmode, stack_pointer_rtx)
292
293 #define ACCUMULATE_OUTGOING_ARGS 1
294
295 typedef unsigned int CUMULATIVE_ARGS;
296
297 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
298 (CUM) = 0
299
300 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
301 rx_function_arg (& CUM, MODE, TYPE, NAMED)
302
303 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
304 (CUM) += rx_function_arg_size (MODE, TYPE)
305 \f
306 #define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20)
307 #define TRAMPOLINE_ALIGNMENT 32
308 \f
309 #define NO_PROFILE_COUNTERS 1
310 #define PROFILE_BEFORE_PROLOGUE 1
311
312 #define FUNCTION_PROFILER(FILE, LABELNO) \
313 fprintf (FILE, "\tbsr\t__mcount\n");
314 \f
315
316 #define HARD_REGNO_NREGS(REGNO, MODE) CLASS_MAX_NREGS (0, MODE)
317
318 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
319 REGNO_REG_CLASS (REGNO) == GR_REGS
320
321 #define MODES_TIEABLE_P(MODE1, MODE2) \
322 ( ( GET_MODE_CLASS (MODE1) == MODE_FLOAT \
323 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
324 == ( GET_MODE_CLASS (MODE2) == MODE_FLOAT \
325 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
326 \f
327
328 #define REGISTER_NAMES \
329 { \
330 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
331 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" \
332 };
333
334 #define ADDITIONAL_REGISTER_NAMES \
335 { \
336 { "sp", STACK_POINTER_REGNUM } \
337 , { "fp", FRAME_POINTER_REGNUM } \
338 , { "arg", ARG_POINTER_REGNUM } \
339 , { "chain", STATIC_CHAIN_REGNUM } \
340 }
341
342 #define DATA_SECTION_ASM_OP \
343 (TARGET_AS100_SYNTAX ? "\t.SECTION D,DATA" \
344 : "\t.section D,\"aw\",@progbits\n\t.p2align 2")
345
346 #define SDATA_SECTION_ASM_OP \
347 (TARGET_AS100_SYNTAX ? "\t.SECTION D_2,DATA,ALIGN=2" \
348 : "\t.section D_2,\"aw\",@progbits\n\t.p2align 1")
349
350 #undef READONLY_DATA_SECTION_ASM_OP
351 #define READONLY_DATA_SECTION_ASM_OP \
352 (TARGET_AS100_SYNTAX ? "\t.SECTION C,ROMDATA,ALIGN=4" \
353 : "\t.section C,\"a\",@progbits\n\t.p2align 2")
354
355 #define BSS_SECTION_ASM_OP \
356 (TARGET_AS100_SYNTAX ? "\t.SECTION B,DATA,ALIGN=4" \
357 : "\t.section B,\"w\",@nobits\n\t.p2align 2")
358
359 #define SBSS_SECTION_ASM_OP \
360 (TARGET_AS100_SYNTAX ? "\t.SECTION B_2,DATA,ALIGN=2" \
361 : "\t.section B_2,\"w\",@nobits\n\t.p2align 1")
362
363 /* The following definitions are conditional depending upon whether the
364 compiler is being built or crtstuff.c is being compiled by the built
365 compiler. */
366 #if defined CRT_BEGIN || defined CRT_END
367 # ifdef __RX_AS100_SYNTAX
368 # define TEXT_SECTION_ASM_OP "\t.SECTION P,CODE"
369 # define CTORS_SECTION_ASM_OP "\t.SECTION init_array,CODE"
370 # define DTORS_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
371 # define INIT_ARRAY_SECTION_ASM_OP "\t.SECTION init_array,CODE"
372 # define FINI_ARRAY_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
373 # else
374 # define TEXT_SECTION_ASM_OP "\t.section P,\"ax\""
375 # define CTORS_SECTION_ASM_OP \
376 "\t.section\t.init_array,\"aw\",@init_array"
377 # define DTORS_SECTION_ASM_OP \
378 "\t.section\t.fini_array,\"aw\",@fini_array"
379 # define INIT_ARRAY_SECTION_ASM_OP \
380 "\t.section\t.init_array,\"aw\",@init_array"
381 # define FINI_ARRAY_SECTION_ASM_OP \
382 "\t.section\t.fini_array,\"aw\",@fini_array"
383 # endif
384 #else
385 # define TEXT_SECTION_ASM_OP \
386 (TARGET_AS100_SYNTAX ? "\t.SECTION P,CODE" : "\t.section P,\"ax\"")
387
388 # define CTORS_SECTION_ASM_OP \
389 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
390 : "\t.section\t.init_array,\"aw\",@init_array")
391
392 # define DTORS_SECTION_ASM_OP \
393 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
394 : "\t.section\t.fini_array,\"aw\",@fini_array")
395
396 # define INIT_ARRAY_SECTION_ASM_OP \
397 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
398 : "\t.section\t.init_array,\"aw\",@init_array")
399
400 # define FINI_ARRAY_SECTION_ASM_OP \
401 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
402 : "\t.section\t.fini_array,\"aw\",@fini_array")
403 #endif
404
405 #define GLOBAL_ASM_OP \
406 (TARGET_AS100_SYNTAX ? "\t.GLB\t" : "\t.global\t")
407 #define ASM_COMMENT_START " ;"
408 #define ASM_APP_ON ""
409 #define ASM_APP_OFF ""
410 #define LOCAL_LABEL_PREFIX "L"
411 #undef USER_LABEL_PREFIX
412 #define USER_LABEL_PREFIX "_"
413
414 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
415 do \
416 { \
417 if ((LOG) == 0) \
418 break; \
419 if (TARGET_AS100_SYNTAX) \
420 { \
421 if ((LOG) >= 2) \
422 fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
423 else \
424 fprintf (STREAM, "\t.ALIGN 2\n"); \
425 } \
426 else \
427 fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \
428 } \
429 while (0)
430
431 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
432 fprintf (FILE, TARGET_AS100_SYNTAX ? "\t.LWORD L%d\n" : "\t.long .L%d\n", \
433 VALUE)
434
435 /* This is how to output an element of a case-vector that is relative.
436 Note: The local label referenced by the "3b" below is emitted by
437 the tablejump insn. */
438
439 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
440 fprintf (FILE, TARGET_AS100_SYNTAX \
441 ? "\t.LWORD L%d - ?-\n" : "\t.long .L%d - 1b\n", VALUE)
442
443 #define ASM_OUTPUT_SIZE_DIRECTIVE(STREAM, NAME, SIZE) \
444 do \
445 { \
446 HOST_WIDE_INT size_ = (SIZE); \
447 \
448 /* The as100 assembler does not have an equivalent of the SVR4 \
449 .size pseudo-op. */ \
450 if (TARGET_AS100_SYNTAX) \
451 break; \
452 \
453 fputs (SIZE_ASM_OP, STREAM); \
454 assemble_name (STREAM, NAME); \
455 fprintf (STREAM, ", " HOST_WIDE_INT_PRINT_DEC "\n", size_); \
456 } \
457 while (0)
458
459 #define ASM_OUTPUT_MEASURED_SIZE(STREAM, NAME) \
460 do \
461 { \
462 /* The as100 assembler does not have an equivalent of the SVR4 \
463 .size pseudo-op. */ \
464 if (TARGET_AS100_SYNTAX) \
465 break; \
466 fputs (SIZE_ASM_OP, STREAM); \
467 assemble_name (STREAM, NAME); \
468 fputs (", .-", STREAM); \
469 assemble_name (STREAM, NAME); \
470 putc ('\n', STREAM); \
471 } \
472 while (0)
473
474 #define ASM_OUTPUT_TYPE_DIRECTIVE(STREAM, NAME, TYPE) \
475 do \
476 { \
477 /* The as100 assembler does not have an equivalent of the SVR4 \
478 .size pseudo-op. */ \
479 if (TARGET_AS100_SYNTAX) \
480 break; \
481 fputs (TYPE_ASM_OP, STREAM); \
482 assemble_name (STREAM, NAME); \
483 fputs (", ", STREAM); \
484 fprintf (STREAM, TYPE_OPERAND_FMT, TYPE); \
485 putc ('\n', STREAM); \
486 } \
487 while (0)
488
489 #undef ASM_GENERATE_INTERNAL_LABEL
490 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
491 do \
492 { \
493 sprintf (LABEL, TARGET_AS100_SYNTAX ? "*%s%u" : "*.%s%u", \
494 PREFIX, (unsigned) (NUM)); \
495 } \
496 while (0)
497
498 #undef ASM_OUTPUT_EXTERNAL
499 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
500 do \
501 { \
502 if (TARGET_AS100_SYNTAX) \
503 targetm.asm_out.globalize_label (FILE, NAME); \
504 default_elf_asm_output_external (FILE, DECL, NAME); \
505 } \
506 while (0)
507
508 #undef ASM_OUTPUT_ALIGNED_COMMON
509 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
510 do \
511 { \
512 if (TARGET_AS100_SYNTAX) \
513 { \
514 fprintf ((FILE), "\t.GLB\t"); \
515 assemble_name ((FILE), (NAME)); \
516 fprintf ((FILE), "\n"); \
517 assemble_name ((FILE), (NAME)); \
518 switch ((ALIGN) / BITS_PER_UNIT) \
519 { \
520 case 4: \
521 fprintf ((FILE), ":\t.BLKL\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
522 (SIZE) / 4); \
523 break; \
524 case 2: \
525 fprintf ((FILE), ":\t.BLKW\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
526 (SIZE) / 2); \
527 break; \
528 default: \
529 fprintf ((FILE), ":\t.BLKB\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
530 (SIZE)); \
531 break; \
532 } \
533 } \
534 else \
535 { \
536 fprintf ((FILE), "%s", COMMON_ASM_OP); \
537 assemble_name ((FILE), (NAME)); \
538 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
539 (SIZE), (ALIGN) / BITS_PER_UNIT); \
540 } \
541 } \
542 while (0)
543
544 #undef SKIP_ASM_OP
545 #define SKIP_ASM_OP (TARGET_AS100_SYNTAX ? "\t.BLKB\t" : "\t.zero\t")
546
547 #undef ASM_OUTPUT_LIMITED_STRING
548 #define ASM_OUTPUT_LIMITED_STRING(FILE, STR) \
549 do \
550 { \
551 const unsigned char *_limited_str = \
552 (const unsigned char *) (STR); \
553 unsigned ch; \
554 \
555 fprintf ((FILE), TARGET_AS100_SYNTAX \
556 ? "\t.BYTE\t\"" : "\t.string\t\""); \
557 \
558 for (; (ch = *_limited_str); _limited_str++) \
559 { \
560 int escape; \
561 \
562 switch (escape = ESCAPES[ch]) \
563 { \
564 case 0: \
565 putc (ch, (FILE)); \
566 break; \
567 case 1: \
568 fprintf ((FILE), "\\%03o", ch); \
569 break; \
570 default: \
571 putc ('\\', (FILE)); \
572 putc (escape, (FILE)); \
573 break; \
574 } \
575 } \
576 \
577 fprintf ((FILE), TARGET_AS100_SYNTAX ? "\"\n\t.BYTE\t0\n" : "\"\n");\
578 } \
579 while (0)
580
581 #undef IDENT_ASM_OP
582 #define IDENT_ASM_OP (TARGET_AS100_SYNTAX \
583 ? "\t.END\t; Built by: ": "\t.ident\t")
584
585 /* For PIC put jump tables into the text section so that the offsets that
586 they contain are always computed between two same-section symbols. */
587 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
588 \f
589 #define PRINT_OPERAND(FILE, X, CODE) \
590 rx_print_operand (FILE, X, CODE)
591 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
592 rx_print_operand_address (FILE, ADDR)
593 \f
594
595 #define CC_NO_CARRY 0400
596 #define NOTICE_UPDATE_CC(EXP, INSN) rx_notice_update_cc (EXP, INSN)
597
598 extern int rx_float_compare_mode;
599 \f
600 /* This is a version of REG_P that also returns TRUE for SUBREGs. */
601 #define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)
602
603 /* Like REG_P except that this macro is true for SET expressions. */
604 #define SET_P(rtl) (GET_CODE (rtl) == SET)
605 \f
606 #define CAN_DEBUG_WITHOUT_FP 1
607
608 /* The AS100 assembler does not support .leb128 and .uleb128, but
609 the compiler-build-time configure tests will have enabled their
610 use because GAS supports them. So default to generating STABS
611 debug information instead of DWARF2 when generating AS100
612 compatible output. */
613 #undef PREFERRED_DEBUGGING_TYPE
614 #define PREFERRED_DEBUGGING_TYPE (TARGET_AS100_SYNTAX \
615 ? DBX_DEBUG : DWARF2_DEBUG)
616
617 #undef CC1_SPEC
618 #define CC1_SPEC "%{mas100-syntax:%{gdwarf*:%e-mas100-syntax is incompatible with -gdwarf}}"
619
620 /* For some unknown reason LTO compression is not working, at
621 least on my local system. So set the default compression
622 level to none, for now. */
623 #define OVERRIDE_OPTIONS \
624 do \
625 { \
626 if (flag_lto_compression_level == -1) \
627 flag_lto_compression_level = 0; \
628 } \
629 while (0)
630
631 /* This macro is used to decide when RX FPU instructions can be used. */
632 #define ALLOW_RX_FPU_INSNS flag_unsafe_math_optimizations
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