1 ; Options for the SPARC port of the compiler
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22 config/sparc/sparc-opts.h
26 unsigned int sparc_debug
29 Target Report Mask(FPU)
33 Target RejectNegative Mask(FPU)
37 Target RejectNegative InverseMask(FPU)
38 Do not use hardware FP.
41 Target Report Mask(FLAT)
42 Use flat register window model.
45 Target Report Mask(UNALIGNED_DOUBLES)
46 Assume possible double misalignment.
49 Target Report Mask(APP_REGS)
50 Use ABI reserved registers.
53 Target Report RejectNegative Mask(HARD_QUAD)
54 Use hardware quad FP instructions.
57 Target Report RejectNegative InverseMask(HARD_QUAD)
58 Do not use hardware quad fp instructions.
61 Target Report Mask(LRA)
62 Enable Local Register Allocation.
65 Target Report Mask(V8PLUS)
69 Target Report Mask(VIS)
70 Use UltraSPARC Visual Instruction Set version 1.0 extensions.
73 Target Report Mask(VIS2)
74 Use UltraSPARC Visual Instruction Set version 2.0 extensions.
77 Target Report Mask(VIS3)
78 Use UltraSPARC Visual Instruction Set version 3.0 extensions.
81 Target Report Mask(VIS4)
82 Use UltraSPARC Visual Instruction Set version 4.0 extensions.
85 Target Report Mask(VIS4B)
86 Use additional VIS instructions introduced in OSA2017.
89 Target Report Mask(CBCOND)
90 Use UltraSPARC Compare-and-Branch extensions.
93 Target Report Mask(FMAF)
94 Use UltraSPARC Fused Multiply-Add extensions.
97 Target Report Mask(FSMULD)
98 Use Floating-point Multiply Single to Double (FsMULd) instruction.
101 Target Report Mask(POPC)
102 Use UltraSPARC Population-Count instruction.
105 Target Report Mask(SUBXC)
106 Use UltraSPARC Subtract-Extended-with-Carry instruction.
109 Target Report RejectNegative Mask(PTR64)
113 Target Report RejectNegative InverseMask(PTR64)
117 Target Report RejectNegative Mask(64BIT)
121 Target Report RejectNegative InverseMask(64BIT)
125 Target Report Mask(STACK_BIAS)
129 Target Report Mask(FASTER_STRUCTS)
130 Use structs on stronger alignment for double-word copies.
134 Optimize tail call instructions in assembler and linker.
137 Target Report InverseMask(SV_MODE)
138 Do not generate code that can only run in supervisor mode (default).
141 Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type) Init(PROCESSOR_V7)
142 Use features of and schedule code for given CPU.
145 Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor_type) Init(PROCESSOR_V7)
146 Schedule code for given CPU.
149 Name(sparc_processor_type) Type(enum processor_type)
152 Enum(sparc_processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly
155 Enum(sparc_processor_type) String(v7) Value(PROCESSOR_V7)
158 Enum(sparc_processor_type) String(cypress) Value(PROCESSOR_CYPRESS)
161 Enum(sparc_processor_type) String(v8) Value(PROCESSOR_V8)
164 Enum(sparc_processor_type) String(supersparc) Value(PROCESSOR_SUPERSPARC)
167 Enum(sparc_processor_type) String(hypersparc) Value(PROCESSOR_HYPERSPARC)
170 Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON)
173 Enum(sparc_processor_type) String(leon3) Value(PROCESSOR_LEON3)
176 Enum(sparc_processor_type) String(leon3v7) Value(PROCESSOR_LEON3V7)
179 Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE)
182 Enum(sparc_processor_type) String(f930) Value(PROCESSOR_F930)
185 Enum(sparc_processor_type) String(f934) Value(PROCESSOR_F934)
188 Enum(sparc_processor_type) String(sparclite86x) Value(PROCESSOR_SPARCLITE86X)
191 Enum(sparc_processor_type) String(sparclet) Value(PROCESSOR_SPARCLET)
194 Enum(sparc_processor_type) String(tsc701) Value(PROCESSOR_TSC701)
197 Enum(sparc_processor_type) String(v9) Value(PROCESSOR_V9)
200 Enum(sparc_processor_type) String(ultrasparc) Value(PROCESSOR_ULTRASPARC)
203 Enum(sparc_processor_type) String(ultrasparc3) Value(PROCESSOR_ULTRASPARC3)
206 Enum(sparc_processor_type) String(niagara) Value(PROCESSOR_NIAGARA)
209 Enum(sparc_processor_type) String(niagara2) Value(PROCESSOR_NIAGARA2)
212 Enum(sparc_processor_type) String(niagara3) Value(PROCESSOR_NIAGARA3)
215 Enum(sparc_processor_type) String(niagara4) Value(PROCESSOR_NIAGARA4)
218 Enum(sparc_processor_type) String(niagara7) Value(PROCESSOR_NIAGARA7)
221 Enum(sparc_processor_type) String(m8) Value(PROCESSOR_M8)
224 Target RejectNegative Joined Var(sparc_cmodel_string)
225 Use given SPARC-V9 code model.
228 Target RejectNegative Joined Var(sparc_debug_string)
232 Target Report Var(sparc_std_struct_return)
233 Enable strict 32-bit psABI struct return checking.
236 Target Report RejectNegative Var(sparc_fix_at697f)
237 Enable workaround for single erratum of AT697F processor
238 (corresponding to erratum #13 of AT697E processor).
241 Target Report RejectNegative Var(sparc_fix_ut699)
242 Enable workarounds for the errata of the UT699 processor.
245 Target Report RejectNegative Var(sparc_fix_ut700)
246 Enable workarounds for the errata of the UT699E/UT700 processor.
249 Target Report RejectNegative Var(sparc_fix_gr712rc)
250 Enable workarounds for the errata of the GR712RC processor.
252 ;; Enable workaround for back-to-back store errata
254 unsigned int sparc_fix_b2bst
256 ;; Enable workaround for GRLIB-TN-0013 errata
258 unsigned int sparc_fix_lost_divsqrt
260 Mask(LONG_DOUBLE_128)
261 ;; Use 128-bit long double
264 ;; Generate code for LEON
267 ;; Generate code for LEON3
270 ;; Generate code for SPARClite
273 ;; Generate code for SPARClet
276 ;; Generate code for SPARC-V8
279 ;; Generate code for SPARC-V9
281 Mask(DEPRECATED_V8_INSNS)
282 ;; Generate code that uses the V8 instructions deprecated
283 ;; in the V9 architecture.
286 Target RejectNegative Joined Var(sparc_memory_model) Enum(sparc_memory_model) Init(SMM_DEFAULT)
287 Specify the memory model in effect for the program.
290 Name(sparc_memory_model) Type(enum sparc_memory_model_type)
293 Enum(sparc_memory_model) String(default) Value(SMM_DEFAULT)
296 Enum(sparc_memory_model) String(rmo) Value(SMM_RMO)
299 Enum(sparc_memory_model) String(pso) Value(SMM_PSO)
302 Enum(sparc_memory_model) String(tso) Value(SMM_TSO)
305 Enum(sparc_memory_model) String(sc) Value(SMM_SC)