gcc/doc/gcc/gcc-command-options/machine-dependent-options/m680x0-options.rst

   1 ..
   2   Copyright 1988-2022 Free Software Foundation, Inc.
   3   This is part of the GCC manual.
   4   For copying conditions, see the copyright.rst file.
   5
   6 .. program:: M680x0
   7
   8 .. index:: M680x0 options
   9
  10 .. _m680x0-options:
  11
  12 M680x0 Options
  13 ^^^^^^^^^^^^^^
  14
  15 These are the :samp:`-m` options defined for M680x0 and ColdFire processors.
  16 The default settings depend on which architecture was selected when
  17 the compiler was configured; the defaults for the most common choices
  18 are given below.
  19
  20 .. option:: -march={arch}
  21
  22   Generate code for a specific M680x0 or ColdFire instruction set
  23   architecture.  Permissible values of :samp:`{arch}` for M680x0
  24   architectures are: :samp:`68000`, :samp:`68010`, :samp:`68020`,
  25   :samp:`68030`, :samp:`68040`, :samp:`68060` and :samp:`cpu32`.  ColdFire
  26   architectures are selected according to Freescale's ISA classification
  27   and the permissible values are: :samp:`isaa`, :samp:`isaaplus`,
  28   :samp:`isab` and :samp:`isac`.
  29
  30   GCC defines a macro ``__mcfarch__`` whenever it is generating
  31   code for a ColdFire target.  The :samp:`{arch}` in this macro is one of the
  32   :option:`-march` arguments given above.
  33
  34   When used together, :option:`-march` and :option:`-mtune` select code
  35   that runs on a family of similar processors but that is optimized
  36   for a particular microarchitecture.
  37
  38 .. option:: -mcpu={cpu}
  39
  40   Generate code for a specific M680x0 or ColdFire processor.
  41   The M680x0 :samp:`{cpu}` s are: :samp:`68000`, :samp:`68010`, :samp:`68020`,
  42   :samp:`68030`, :samp:`68040`, :samp:`68060`, :samp:`68302`, :samp:`68332`
  43   and :samp:`cpu32`.  The ColdFire :samp:`{cpu}` s are given by the table
  44   below, which also classifies the CPUs into families:
  45
  46   .. list-table::
  47      :header-rows: 1
  48
  49      * - Family
  50        - :samp:`-mcpu` arguments
  51
  52      * - :samp:`51`
  53        - :samp:`51` :samp:`51ac` :samp:`51ag` :samp:`51cn` :samp:`51em` :samp:`51je` :samp:`51jf` :samp:`51jg` :samp:`51jm` :samp:`51mm` :samp:`51qe` :samp:`51qm`
  54      * - :samp:`5206`
  55        - :samp:`5202` :samp:`5204` :samp:`5206`
  56      * - :samp:`5206e`
  57        - :samp:`5206e`
  58      * - :samp:`5208`
  59        - :samp:`5207` :samp:`5208`
  60      * - :samp:`5211a`
  61        - :samp:`5210a` :samp:`5211a`
  62      * - :samp:`5213`
  63        - :samp:`5211` :samp:`5212` :samp:`5213`
  64      * - :samp:`5216`
  65        - :samp:`5214` :samp:`5216`
  66      * - :samp:`52235`
  67        - :samp:`52230` :samp:`52231` :samp:`52232` :samp:`52233` :samp:`52234` :samp:`52235`
  68      * - :samp:`5225`
  69        - :samp:`5224` :samp:`5225`
  70      * - :samp:`52259`
  71        - :samp:`52252` :samp:`52254` :samp:`52255` :samp:`52256` :samp:`52258` :samp:`52259`
  72      * - :samp:`5235`
  73        - :samp:`5232` :samp:`5233` :samp:`5234` :samp:`5235` :samp:`523x`
  74      * - :samp:`5249`
  75        - :samp:`5249`
  76      * - :samp:`5250`
  77        - :samp:`5250`
  78      * - :samp:`5271`
  79        - :samp:`5270` :samp:`5271`
  80      * - :samp:`5272`
  81        - :samp:`5272`
  82      * - :samp:`5275`
  83        - :samp:`5274` :samp:`5275`
  84      * - :samp:`5282`
  85        - :samp:`5280` :samp:`5281` :samp:`5282` :samp:`528x`
  86      * - :samp:`53017`
  87        - :samp:`53011` :samp:`53012` :samp:`53013` :samp:`53014` :samp:`53015` :samp:`53016` :samp:`53017`
  88      * - :samp:`5307`
  89        - :samp:`5307`
  90      * - :samp:`5329`
  91        - :samp:`5327` :samp:`5328` :samp:`5329` :samp:`532x`
  92      * - :samp:`5373`
  93        - :samp:`5372` :samp:`5373` :samp:`537x`
  94      * - :samp:`5407`
  95        - :samp:`5407`
  96      * - :samp:`5475`
  97        - :samp:`5470` :samp:`5471` :samp:`5472` :samp:`5473` :samp:`5474` :samp:`5475` :samp:`547x` :samp:`5480` :samp:`5481` :samp:`5482` :samp:`5483` :samp:`5484` :samp:`5485`
  98
  99   :option:`-mcpu=cpu` overrides :option:`-march=arch` if
 100   :samp:`{arch}` is compatible with :samp:`{cpu}`.  Other combinations of
 101   :option:`-mcpu` and :option:`-march` are rejected.
 102
 103   GCC defines the macro ``__mcf_cpu_cpu`` when ColdFire target
 104   :samp:`{cpu}` is selected.  It also defines ``__mcf_family_family``,
 105   where the value of :samp:`{family}` is given by the table above.
 106
 107 .. option:: -mtune={tune}
 108
 109   Tune the code for a particular microarchitecture within the
 110   constraints set by :option:`-march` and :option:`-mcpu`.
 111   The M680x0 microarchitectures are: :samp:`68000`, :samp:`68010`,
 112   :samp:`68020`, :samp:`68030`, :samp:`68040`, :samp:`68060`
 113   and :samp:`cpu32`.  The ColdFire microarchitectures
 114   are: :samp:`cfv1`, :samp:`cfv2`, :samp:`cfv3`, :samp:`cfv4` and :samp:`cfv4e`.
 115
 116   You can also use :option:`-mtune=68020-40` for code that needs
 117   to run relatively well on 68020, 68030 and 68040 targets.
 118   :option:`-mtune=68020-60` is similar but includes 68060 targets
 119   as well.  These two options select the same tuning decisions as
 120   :option:`-m68020-40` and :option:`-m68020-60` respectively.
 121
 122   GCC defines the macros ``__mcarch`` and ``__mcarch__``
 123   when tuning for 680x0 architecture :samp:`{arch}`.  It also defines
 124   ``mcarch`` unless either :option:`-ansi` or a non-GNU :option:`-std`
 125   option is used.  If GCC is tuning for a range of architectures,
 126   as selected by :option:`-mtune=68020-40` or :option:`-mtune=68020-60`,
 127   it defines the macros for every architecture in the range.
 128
 129   GCC also defines the macro ``__muarch__`` when tuning for
 130   ColdFire microarchitecture :samp:`{uarch}`, where :samp:`{uarch}` is one
 131   of the arguments given above.
 132
 133 .. option:: -m68000, -mc68000
 134
 135   Generate output for a 68000.  This is the default
 136   when the compiler is configured for 68000-based systems.
 137   It is equivalent to :option:`-march=68000`.
 138
 139   Use this option for microcontrollers with a 68000 or EC000 core,
 140   including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
 141
 142 .. option:: -m68010
 143
 144   Generate output for a 68010.  This is the default
 145   when the compiler is configured for 68010-based systems.
 146   It is equivalent to :option:`-march=68010`.
 147
 148 .. option:: -m68020, -mc68020
 149
 150   Generate output for a 68020.  This is the default
 151   when the compiler is configured for 68020-based systems.
 152   It is equivalent to :option:`-march=68020`.
 153
 154 .. option:: -m68030
 155
 156   Generate output for a 68030.  This is the default when the compiler is
 157   configured for 68030-based systems.  It is equivalent to
 158   :option:`-march=68030`.
 159
 160 .. option:: -m68040
 161
 162   Generate output for a 68040.  This is the default when the compiler is
 163   configured for 68040-based systems.  It is equivalent to
 164   :option:`-march=68040`.
 165
 166   This option inhibits the use of 68881/68882 instructions that have to be
 167   emulated by software on the 68040.  Use this option if your 68040 does not
 168   have code to emulate those instructions.
 169
 170 .. option:: -m68060
 171
 172   Generate output for a 68060.  This is the default when the compiler is
 173   configured for 68060-based systems.  It is equivalent to
 174   :option:`-march=68060`.
 175
 176   This option inhibits the use of 68020 and 68881/68882 instructions that
 177   have to be emulated by software on the 68060.  Use this option if your 68060
 178   does not have code to emulate those instructions.
 179
 180 .. option:: -mcpu32
 181
 182   Generate output for a CPU32.  This is the default
 183   when the compiler is configured for CPU32-based systems.
 184   It is equivalent to :option:`-march=cpu32`.
 185
 186   Use this option for microcontrollers with a
 187   CPU32 or CPU32+ core, including the 68330, 68331, 68332, 68333, 68334,
 188   68336, 68340, 68341, 68349 and 68360.
 189
 190 .. option:: -m5200
 191
 192   Generate output for a 520X ColdFire CPU.  This is the default
 193   when the compiler is configured for 520X-based systems.
 194   It is equivalent to :option:`-mcpu=5206`, and is now deprecated
 195   in favor of that option.
 196
 197   Use this option for microcontroller with a 5200 core, including
 198   the MCF5202, MCF5203, MCF5204 and MCF5206.
 199
 200 .. option:: -m5206e
 201
 202   Generate output for a 5206e ColdFire CPU.  The option is now
 203   deprecated in favor of the equivalent :option:`-mcpu=5206e`.
 204
 205 .. option:: -m528x
 206
 207   Generate output for a member of the ColdFire 528X family.
 208   The option is now deprecated in favor of the equivalent
 209   :option:`-mcpu=528x`.
 210
 211 .. option:: -m5307
 212
 213   Generate output for a ColdFire 5307 CPU.  The option is now deprecated
 214   in favor of the equivalent :option:`-mcpu=5307`.
 215
 216 .. option:: -m5407
 217
 218   Generate output for a ColdFire 5407 CPU.  The option is now deprecated
 219   in favor of the equivalent :option:`-mcpu=5407`.
 220
 221 .. option:: -mcfv4e
 222
 223   Generate output for a ColdFire V4e family CPU (e.g. 547x/548x).
 224   This includes use of hardware floating-point instructions.
 225   The option is equivalent to :option:`-mcpu=547x`, and is now
 226   deprecated in favor of that option.
 227
 228 .. option:: -m68020-40
 229
 230   Generate output for a 68040, without using any of the new instructions.
 231   This results in code that can run relatively efficiently on either a
 232   68020/68881 or a 68030 or a 68040.  The generated code does use the
 233   68881 instructions that are emulated on the 68040.
 234
 235   The option is equivalent to :option:`-march=68020` :option:`-mtune=68020-40`.
 236
 237 .. option:: -m68020-60
 238
 239   Generate output for a 68060, without using any of the new instructions.
 240   This results in code that can run relatively efficiently on either a
 241   68020/68881 or a 68030 or a 68040.  The generated code does use the
 242   68881 instructions that are emulated on the 68060.
 243
 244   The option is equivalent to :option:`-march=68020` :option:`-mtune=68020-60`.
 245
 246 .. option:: -mhard-float, -m68881
 247
 248   Generate floating-point instructions.  This is the default for 68020
 249   and above, and for ColdFire devices that have an FPU.  It defines the
 250   macro ``__HAVE_68881__`` on M680x0 targets and ``__mcffpu__``
 251   on ColdFire targets.
 252
 253 .. option:: -msoft-float
 254
 255   Do not generate floating-point instructions; use library calls instead.
 256   This is the default for 68000, 68010, and 68832 targets.  It is also
 257   the default for ColdFire devices that have no FPU.
 258
 259 .. option:: -mdiv, -mno-div
 260
 261   Generate (do not generate) ColdFire hardware divide and remainder
 262   instructions.  If :option:`-march` is used without :option:`-mcpu`,
 263   the default is 'on' for ColdFire architectures and 'off' for M680x0
 264   architectures.  Otherwise, the default is taken from the target CPU
 265   (either the default CPU, or the one specified by :option:`-mcpu`).  For
 266   example, the default is 'off' for :option:`-mcpu=5206` and 'on' for
 267   :option:`-mcpu=5206e`.
 268
 269   GCC defines the macro ``__mcfhwdiv__`` when this option is enabled.
 270
 271 .. option:: -mshort
 272
 273   Consider type ``int`` to be 16 bits wide, like ``short int``.
 274   Additionally, parameters passed on the stack are also aligned to a
 275   16-bit boundary even on targets whose API mandates promotion to 32-bit.
 276
 277 .. option:: -mno-short
 278
 279   Do not consider type ``int`` to be 16 bits wide.  This is the default.
 280
 281 .. option:: -mnobitfield, -mno-bitfield
 282
 283   Do not use the bit-field instructions.  The :option:`-m68000`, :option:`-mcpu32`
 284   and :option:`-m5200` options imply :option:`-mnobitfield`.
 285
 286 .. option:: -mbitfield
 287
 288   Do use the bit-field instructions.  The :option:`-m68020` option implies
 289   :option:`-mbitfield`.  This is the default if you use a configuration
 290   designed for a 68020.
 291
 292 .. option:: -mrtd
 293
 294   Use a different function-calling convention, in which functions
 295   that take a fixed number of arguments return with the ``rtd``
 296   instruction, which pops their arguments while returning.  This
 297   saves one instruction in the caller since there is no need to pop
 298   the arguments there.
 299
 300   This calling convention is incompatible with the one normally
 301   used on Unix, so you cannot use it if you need to call libraries
 302   compiled with the Unix compiler.
 303
 304   Also, you must provide function prototypes for all functions that
 305   take variable numbers of arguments (including ``printf``);
 306   otherwise incorrect code is generated for calls to those
 307   functions.
 308
 309   In addition, seriously incorrect code results if you call a
 310   function with too many arguments.  (Normally, extra arguments are
 311   harmlessly ignored.)
 312
 313   The ``rtd`` instruction is supported by the 68010, 68020, 68030,
 314   68040, 68060 and CPU32 processors, but not by the 68000 or 5200.
 315
 316   The default is :option:`-mno-rtd`.
 317
 318 .. option:: -malign-int, -mno-align-int
 319
 320   Control whether GCC aligns ``int``, ``long``, ``long long``,
 321   ``float``, ``double``, and ``long double`` variables on a 32-bit
 322   boundary (:option:`-malign-int`) or a 16-bit boundary (:option:`-mno-align-int`).
 323   Aligning variables on 32-bit boundaries produces code that runs somewhat
 324   faster on processors with 32-bit busses at the expense of more memory.
 325
 326   .. warning::
 327
 328     If you use the :option:`-malign-int` switch, GCC
 329     aligns structures containing the above types differently than
 330     most published application binary interface specifications for the m68k.
 331
 332   Use the pc-relative addressing mode of the 68000 directly, instead of
 333   using a global offset table.  At present, this option implies :option:`-fpic`,
 334   allowing at most a 16-bit offset for pc-relative addressing.  :option:`-fPIC` is
 335   not presently supported with :option:`-mpcrel`, though this could be supported for
 336   68020 and higher processors.
 337
 338 .. option:: -mno-strict-align, -mstrict-align
 339
 340   Do not (do) assume that unaligned memory references are handled by
 341   the system.
 342
 343 .. option:: -msep-data
 344
 345   Generate code that allows the data segment to be located in a different
 346   area of memory from the text segment.  This allows for execute-in-place in
 347   an environment without virtual memory management.  This option implies
 348   :option:`-fPIC`.
 349
 350 .. option:: -mno-sep-data
 351
 352   Generate code that assumes that the data segment follows the text segment.
 353   This is the default.
 354
 355 .. option:: -mid-shared-library
 356
 357   Generate code that supports shared libraries via the library ID method.
 358   This allows for execute-in-place and shared libraries in an environment
 359   without virtual memory management.  This option implies :option:`-fPIC`.
 360
 361 .. option:: -mno-id-shared-library
 362
 363   Generate code that doesn't assume ID-based shared libraries are being used.
 364   This is the default.
 365
 366 .. option:: -mshared-library-id=n
 367
 368   Specifies the identification number of the ID-based shared library being
 369   compiled.  Specifying a value of 0 generates more compact code; specifying
 370   other values forces the allocation of that number to the current
 371   library, but is no more space- or time-efficient than omitting this option.
 372
 373 .. option:: -mxgot, -mno-xgot
 374
 375   When generating position-independent code for ColdFire, generate code
 376   that works if the GOT has more than 8192 entries.  This code is
 377   larger and slower than code generated without this option.  On M680x0
 378   processors, this option is not needed; :option:`-fPIC` suffices.
 379
 380   GCC normally uses a single instruction to load values from the GOT.
 381   While this is relatively efficient, it only works if the GOT
 382   is smaller than about 64k.  Anything larger causes the linker
 383   to report an error such as:
 384
 385   .. index:: relocation truncated to fit (ColdFire)
 386
 387   .. code-block:: c++
 388
 389     relocation truncated to fit: R_68K_GOT16O foobar
 390
 391   If this happens, you should recompile your code with :option:`-mxgot`.
 392   It should then work with very large GOTs.  However, code generated with
 393   :option:`-mxgot` is less efficient, since it takes 4 instructions to fetch
 394   the value of a global symbol.
 395
 396   Note that some linkers, including newer versions of the GNU linker,
 397   can create multiple GOTs and sort GOT entries.  If you have such a linker,
 398   you should only need to use :option:`-mxgot` when compiling a single
 399   object file that accesses more than 8192 GOT entries.  Very few do.
 400
 401   These options have no effect unless GCC is generating
 402   position-independent code.
 403
 404 .. option:: -mlong-jump-table-offsets
 405
 406   Use 32-bit offsets in ``switch`` tables.  The default is to use
 407   16-bit offsets.