]> git.ipfire.org Git - thirdparty/gcc.git/blob - gcc/reorg.c
Update copyright years.
[thirdparty/gcc.git] / gcc / reorg.c
1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992-2019 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 /* Instruction reorganization pass.
23
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
31
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
36
37 The MIPS has a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
41
42 The SPARC always has a branch delay slot, but its effects can be
43 annulled when the branch is not taken. This means that failing to
44 find other sources of insns, we can hoist an insn from the branch
45 target that would only be safe to execute knowing that the branch
46 is taken.
47
48 The HP-PA always has a branch delay slot. For unconditional branches
49 its effects can be annulled when the branch is taken. The effects
50 of the delay slot in a conditional branch can be nullified for forward
51 taken branches, or for untaken backward branches. This means
52 we can hoist insns from the fall-through path for forward branches or
53 steal insns from the target of backward branches.
54
55 The TMS320C3x and C4x have three branch delay slots. When the three
56 slots are filled, the branch penalty is zero. Most insns can fill the
57 delay slots except jump insns.
58
59 Three techniques for filling delay slots have been implemented so far:
60
61 (1) `fill_simple_delay_slots' is the simplest, most efficient way
62 to fill delay slots. This pass first looks for insns which come
63 from before the branch and which are safe to execute after the
64 branch. Then it searches after the insn requiring delay slots or,
65 in the case of a branch, for insns that are after the point at
66 which the branch merges into the fallthrough code, if such a point
67 exists. When such insns are found, the branch penalty decreases
68 and no code expansion takes place.
69
70 (2) `fill_eager_delay_slots' is more complicated: it is used for
71 scheduling conditional jumps, or for scheduling jumps which cannot
72 be filled using (1). A machine need not have annulled jumps to use
73 this strategy, but it helps (by keeping more options open).
74 `fill_eager_delay_slots' tries to guess the direction the branch
75 will go; if it guesses right 100% of the time, it can reduce the
76 branch penalty as much as `fill_simple_delay_slots' does. If it
77 guesses wrong 100% of the time, it might as well schedule nops. When
78 `fill_eager_delay_slots' takes insns from the fall-through path of
79 the jump, usually there is no code expansion; when it takes insns
80 from the branch target, there is code expansion if it is not the
81 only way to reach that target.
82
83 (3) `relax_delay_slots' uses a set of rules to simplify code that
84 has been reorganized by (1) and (2). It finds cases where
85 conditional test can be eliminated, jumps can be threaded, extra
86 insns can be eliminated, etc. It is the job of (1) and (2) to do a
87 good job of scheduling locally; `relax_delay_slots' takes care of
88 making the various individual schedules work well together. It is
89 especially tuned to handle the control flow interactions of branch
90 insns. It does nothing for insns with delay slots that do not
91 branch.
92
93 On machines that use CC0, we are very conservative. We will not make
94 a copy of an insn involving CC0 since we want to maintain a 1-1
95 correspondence between the insn that sets and uses CC0. The insns are
96 allowed to be separated by placing an insn that sets CC0 (but not an insn
97 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
98 delay slot. In that case, we point each insn at the other with REG_CC_USER
99 and REG_CC_SETTER notes. Note that these restrictions affect very few
100 machines because most RISC machines with delay slots will not use CC0
101 (the RT is the only known exception at this point). */
102
103 #include "config.h"
104 #include "system.h"
105 #include "coretypes.h"
106 #include "backend.h"
107 #include "target.h"
108 #include "rtl.h"
109 #include "tree.h"
110 #include "predict.h"
111 #include "memmodel.h"
112 #include "tm_p.h"
113 #include "expmed.h"
114 #include "insn-config.h"
115 #include "emit-rtl.h"
116 #include "recog.h"
117 #include "insn-attr.h"
118 #include "resource.h"
119 #include "params.h"
120 #include "tree-pass.h"
121
122 \f
123 /* First, some functions that were used before GCC got a control flow graph.
124 These functions are now only used here in reorg.c, and have therefore
125 been moved here to avoid inadvertent misuse elsewhere in the compiler. */
126
127 /* Return the last label to mark the same position as LABEL. Return LABEL
128 itself if it is null or any return rtx. */
129
130 static rtx
131 skip_consecutive_labels (rtx label_or_return)
132 {
133 rtx_insn *insn;
134
135 if (label_or_return && ANY_RETURN_P (label_or_return))
136 return label_or_return;
137
138 rtx_insn *label = as_a <rtx_insn *> (label_or_return);
139
140 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
141 if (LABEL_P (insn))
142 label = insn;
143
144 return label;
145 }
146
147 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
148 and REG_CC_USER notes so we can find it. */
149
150 static void
151 link_cc0_insns (rtx_insn *insn)
152 {
153 rtx user = next_nonnote_insn (insn);
154
155 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
156 user = XVECEXP (PATTERN (user), 0, 0);
157
158 add_reg_note (user, REG_CC_SETTER, insn);
159 add_reg_note (insn, REG_CC_USER, user);
160 }
161 \f
162 /* Insns which have delay slots that have not yet been filled. */
163
164 static struct obstack unfilled_slots_obstack;
165 static rtx *unfilled_firstobj;
166
167 /* Define macros to refer to the first and last slot containing unfilled
168 insns. These are used because the list may move and its address
169 should be recomputed at each use. */
170
171 #define unfilled_slots_base \
172 ((rtx_insn **) obstack_base (&unfilled_slots_obstack))
173
174 #define unfilled_slots_next \
175 ((rtx_insn **) obstack_next_free (&unfilled_slots_obstack))
176
177 /* Points to the label before the end of the function, or before a
178 return insn. */
179 static rtx_code_label *function_return_label;
180 /* Likewise for a simple_return. */
181 static rtx_code_label *function_simple_return_label;
182
183 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
184 not always monotonically increase. */
185 static int *uid_to_ruid;
186
187 /* Highest valid index in `uid_to_ruid'. */
188 static int max_uid;
189
190 static int stop_search_p (rtx_insn *, int);
191 static int resource_conflicts_p (struct resources *, struct resources *);
192 static int insn_references_resource_p (rtx, struct resources *, bool);
193 static int insn_sets_resource_p (rtx, struct resources *, bool);
194 static rtx_code_label *find_end_label (rtx);
195 static rtx_insn *emit_delay_sequence (rtx_insn *, const vec<rtx_insn *> &,
196 int);
197 static void add_to_delay_list (rtx_insn *, vec<rtx_insn *> *);
198 static rtx_insn *delete_from_delay_slot (rtx_insn *);
199 static void delete_scheduled_jump (rtx_insn *);
200 static void note_delay_statistics (int, int);
201 static int get_jump_flags (const rtx_insn *, rtx);
202 static int mostly_true_jump (rtx);
203 static rtx get_branch_condition (const rtx_insn *, rtx);
204 static int condition_dominates_p (rtx, const rtx_insn *);
205 static int redirect_with_delay_slots_safe_p (rtx_insn *, rtx, rtx);
206 static int redirect_with_delay_list_safe_p (rtx_insn *, rtx,
207 const vec<rtx_insn *> &);
208 static int check_annul_list_true_false (int, const vec<rtx_insn *> &);
209 static void steal_delay_list_from_target (rtx_insn *, rtx, rtx_sequence *,
210 vec<rtx_insn *> *,
211 struct resources *,
212 struct resources *,
213 struct resources *,
214 int, int *, int *,
215 rtx *);
216 static void steal_delay_list_from_fallthrough (rtx_insn *, rtx, rtx_sequence *,
217 vec<rtx_insn *> *,
218 struct resources *,
219 struct resources *,
220 struct resources *,
221 int, int *, int *);
222 static void try_merge_delay_insns (rtx_insn *, rtx_insn *);
223 static rtx_insn *redundant_insn (rtx, rtx_insn *, const vec<rtx_insn *> &);
224 static int own_thread_p (rtx, rtx, int);
225 static void update_block (rtx_insn *, rtx_insn *);
226 static int reorg_redirect_jump (rtx_jump_insn *, rtx);
227 static void update_reg_dead_notes (rtx_insn *, rtx_insn *);
228 static void fix_reg_dead_note (rtx_insn *, rtx);
229 static void update_reg_unused_notes (rtx_insn *, rtx);
230 static void fill_simple_delay_slots (int);
231 static void fill_slots_from_thread (rtx_jump_insn *, rtx, rtx, rtx,
232 int, int, int, int,
233 int *, vec<rtx_insn *> *);
234 static void fill_eager_delay_slots (void);
235 static void relax_delay_slots (rtx_insn *);
236 static void make_return_insns (rtx_insn *);
237 \f
238 /* A wrapper around next_active_insn which takes care to return ret_rtx
239 unchanged. */
240
241 static rtx
242 first_active_target_insn (rtx insn)
243 {
244 if (ANY_RETURN_P (insn))
245 return insn;
246 return next_active_insn (as_a <rtx_insn *> (insn));
247 }
248 \f
249 /* Return true iff INSN is a simplejump, or any kind of return insn. */
250
251 static bool
252 simplejump_or_return_p (rtx insn)
253 {
254 return (JUMP_P (insn)
255 && (simplejump_p (as_a <rtx_insn *> (insn))
256 || ANY_RETURN_P (PATTERN (insn))));
257 }
258 \f
259 /* Return TRUE if this insn should stop the search for insn to fill delay
260 slots. LABELS_P indicates that labels should terminate the search.
261 In all cases, jumps terminate the search. */
262
263 static int
264 stop_search_p (rtx_insn *insn, int labels_p)
265 {
266 if (insn == 0)
267 return 1;
268
269 /* If the insn can throw an exception that is caught within the function,
270 it may effectively perform a jump from the viewpoint of the function.
271 Therefore act like for a jump. */
272 if (can_throw_internal (insn))
273 return 1;
274
275 switch (GET_CODE (insn))
276 {
277 case NOTE:
278 case CALL_INSN:
279 case DEBUG_INSN:
280 return 0;
281
282 case CODE_LABEL:
283 return labels_p;
284
285 case JUMP_INSN:
286 case BARRIER:
287 return 1;
288
289 case INSN:
290 /* OK unless it contains a delay slot or is an `asm' insn of some type.
291 We don't know anything about these. */
292 return (GET_CODE (PATTERN (insn)) == SEQUENCE
293 || GET_CODE (PATTERN (insn)) == ASM_INPUT
294 || asm_noperands (PATTERN (insn)) >= 0);
295
296 default:
297 gcc_unreachable ();
298 }
299 }
300 \f
301 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
302 resource set contains a volatile memory reference. Otherwise, return FALSE. */
303
304 static int
305 resource_conflicts_p (struct resources *res1, struct resources *res2)
306 {
307 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
308 || res1->volatil || res2->volatil)
309 return 1;
310
311 return hard_reg_set_intersect_p (res1->regs, res2->regs);
312 }
313
314 /* Return TRUE if any resource marked in RES, a `struct resources', is
315 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
316 routine is using those resources.
317
318 We compute this by computing all the resources referenced by INSN and
319 seeing if this conflicts with RES. It might be faster to directly check
320 ourselves, and this is the way it used to work, but it means duplicating
321 a large block of complex code. */
322
323 static int
324 insn_references_resource_p (rtx insn, struct resources *res,
325 bool include_delayed_effects)
326 {
327 struct resources insn_res;
328
329 CLEAR_RESOURCE (&insn_res);
330 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
331 return resource_conflicts_p (&insn_res, res);
332 }
333
334 /* Return TRUE if INSN modifies resources that are marked in RES.
335 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
336 included. CC0 is only modified if it is explicitly set; see comments
337 in front of mark_set_resources for details. */
338
339 static int
340 insn_sets_resource_p (rtx insn, struct resources *res,
341 bool include_delayed_effects)
342 {
343 struct resources insn_sets;
344
345 CLEAR_RESOURCE (&insn_sets);
346 mark_set_resources (insn, &insn_sets, 0,
347 (include_delayed_effects
348 ? MARK_SRC_DEST_CALL
349 : MARK_SRC_DEST));
350 return resource_conflicts_p (&insn_sets, res);
351 }
352 \f
353 /* Find a label at the end of the function or before a RETURN. If there
354 is none, try to make one. If that fails, returns 0.
355
356 The property of such a label is that it is placed just before the
357 epilogue or a bare RETURN insn, so that another bare RETURN can be
358 turned into a jump to the label unconditionally. In particular, the
359 label cannot be placed before a RETURN insn with a filled delay slot.
360
361 ??? There may be a problem with the current implementation. Suppose
362 we start with a bare RETURN insn and call find_end_label. It may set
363 function_return_label just before the RETURN. Suppose the machinery
364 is able to fill the delay slot of the RETURN insn afterwards. Then
365 function_return_label is no longer valid according to the property
366 described above and find_end_label will still return it unmodified.
367 Note that this is probably mitigated by the following observation:
368 once function_return_label is made, it is very likely the target of
369 a jump, so filling the delay slot of the RETURN will be much more
370 difficult.
371 KIND is either simple_return_rtx or ret_rtx, indicating which type of
372 return we're looking for. */
373
374 static rtx_code_label *
375 find_end_label (rtx kind)
376 {
377 rtx_insn *insn;
378 rtx_code_label **plabel;
379
380 if (kind == ret_rtx)
381 plabel = &function_return_label;
382 else
383 {
384 gcc_assert (kind == simple_return_rtx);
385 plabel = &function_simple_return_label;
386 }
387
388 /* If we found one previously, return it. */
389 if (*plabel)
390 return *plabel;
391
392 /* Otherwise, see if there is a label at the end of the function. If there
393 is, it must be that RETURN insns aren't needed, so that is our return
394 label and we don't have to do anything else. */
395
396 insn = get_last_insn ();
397 while (NOTE_P (insn)
398 || (NONJUMP_INSN_P (insn)
399 && (GET_CODE (PATTERN (insn)) == USE
400 || GET_CODE (PATTERN (insn)) == CLOBBER
401 || GET_CODE (PATTERN (insn)) == CLOBBER_HIGH)))
402 insn = PREV_INSN (insn);
403
404 /* When a target threads its epilogue we might already have a
405 suitable return insn. If so put a label before it for the
406 function_return_label. */
407 if (BARRIER_P (insn)
408 && JUMP_P (PREV_INSN (insn))
409 && PATTERN (PREV_INSN (insn)) == kind)
410 {
411 rtx_insn *temp = PREV_INSN (PREV_INSN (insn));
412 rtx_code_label *label = gen_label_rtx ();
413 LABEL_NUSES (label) = 0;
414
415 /* Put the label before any USE insns that may precede the RETURN
416 insn. */
417 while (GET_CODE (temp) == USE)
418 temp = PREV_INSN (temp);
419
420 emit_label_after (label, temp);
421 *plabel = label;
422 }
423
424 else if (LABEL_P (insn))
425 *plabel = as_a <rtx_code_label *> (insn);
426 else
427 {
428 rtx_code_label *label = gen_label_rtx ();
429 LABEL_NUSES (label) = 0;
430 /* If the basic block reorder pass moves the return insn to
431 some other place try to locate it again and put our
432 function_return_label there. */
433 while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind)))
434 insn = PREV_INSN (insn);
435 if (insn)
436 {
437 insn = PREV_INSN (insn);
438
439 /* Put the label before any USE insns that may precede the
440 RETURN insn. */
441 while (GET_CODE (insn) == USE)
442 insn = PREV_INSN (insn);
443
444 emit_label_after (label, insn);
445 }
446 else
447 {
448 if (targetm.have_epilogue () && ! targetm.have_return ())
449 /* The RETURN insn has its delay slot filled so we cannot
450 emit the label just before it. Since we already have
451 an epilogue and cannot emit a new RETURN, we cannot
452 emit the label at all. */
453 return NULL;
454
455 /* Otherwise, make a new label and emit a RETURN and BARRIER,
456 if needed. */
457 emit_label (label);
458 if (targetm.have_return ())
459 {
460 /* The return we make may have delay slots too. */
461 rtx_insn *pat = targetm.gen_return ();
462 rtx_insn *insn = emit_jump_insn (pat);
463 set_return_jump_label (insn);
464 emit_barrier ();
465 if (num_delay_slots (insn) > 0)
466 obstack_ptr_grow (&unfilled_slots_obstack, insn);
467 }
468 }
469 *plabel = label;
470 }
471
472 /* Show one additional use for this label so it won't go away until
473 we are done. */
474 ++LABEL_NUSES (*plabel);
475
476 return *plabel;
477 }
478 \f
479 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
480 the pattern of INSN with the SEQUENCE.
481
482 Returns the insn containing the SEQUENCE that replaces INSN. */
483
484 static rtx_insn *
485 emit_delay_sequence (rtx_insn *insn, const vec<rtx_insn *> &list, int length)
486 {
487 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
488 rtvec seqv = rtvec_alloc (length + 1);
489 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
490 rtx_insn *seq_insn = make_insn_raw (seq);
491
492 /* If DELAY_INSN has a location, use it for SEQ_INSN. If DELAY_INSN does
493 not have a location, but one of the delayed insns does, we pick up a
494 location from there later. */
495 INSN_LOCATION (seq_insn) = INSN_LOCATION (insn);
496
497 /* Unlink INSN from the insn chain, so that we can put it into
498 the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. */
499 rtx_insn *after = PREV_INSN (insn);
500 remove_insn (insn);
501 SET_NEXT_INSN (insn) = SET_PREV_INSN (insn) = NULL;
502
503 /* Build our SEQUENCE and rebuild the insn chain. */
504 start_sequence ();
505 XVECEXP (seq, 0, 0) = emit_insn (insn);
506
507 unsigned int delay_insns = list.length ();
508 gcc_assert (delay_insns == (unsigned int) length);
509 for (unsigned int i = 0; i < delay_insns; i++)
510 {
511 rtx_insn *tem = list[i];
512 rtx note, next;
513
514 /* Show that this copy of the insn isn't deleted. */
515 tem->set_undeleted ();
516
517 /* Unlink insn from its original place, and re-emit it into
518 the sequence. */
519 SET_NEXT_INSN (tem) = SET_PREV_INSN (tem) = NULL;
520 XVECEXP (seq, 0, i + 1) = emit_insn (tem);
521
522 /* SPARC assembler, for instance, emit warning when debug info is output
523 into the delay slot. */
524 if (INSN_LOCATION (tem) && !INSN_LOCATION (seq_insn))
525 INSN_LOCATION (seq_insn) = INSN_LOCATION (tem);
526 INSN_LOCATION (tem) = 0;
527
528 for (note = REG_NOTES (tem); note; note = next)
529 {
530 next = XEXP (note, 1);
531 switch (REG_NOTE_KIND (note))
532 {
533 case REG_DEAD:
534 /* Remove any REG_DEAD notes because we can't rely on them now
535 that the insn has been moved. */
536 remove_note (tem, note);
537 break;
538
539 case REG_LABEL_OPERAND:
540 case REG_LABEL_TARGET:
541 /* Keep the label reference count up to date. */
542 if (LABEL_P (XEXP (note, 0)))
543 LABEL_NUSES (XEXP (note, 0)) ++;
544 break;
545
546 default:
547 break;
548 }
549 }
550 }
551 end_sequence ();
552
553 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
554 add_insn_after (seq_insn, after, NULL);
555
556 return seq_insn;
557 }
558
559 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
560 be in the order in which the insns are to be executed. */
561
562 static void
563 add_to_delay_list (rtx_insn *insn, vec<rtx_insn *> *delay_list)
564 {
565 /* If INSN has its block number recorded, clear it since we may
566 be moving the insn to a new block. */
567 clear_hashed_info_for_insn (insn);
568 delay_list->safe_push (insn);
569 }
570 \f
571 /* Delete INSN from the delay slot of the insn that it is in, which may
572 produce an insn with no delay slots. Return the new insn. */
573
574 static rtx_insn *
575 delete_from_delay_slot (rtx_insn *insn)
576 {
577 rtx_insn *trial, *seq_insn, *prev;
578 rtx_sequence *seq;
579 int i;
580 int had_barrier = 0;
581
582 /* We first must find the insn containing the SEQUENCE with INSN in its
583 delay slot. Do this by finding an insn, TRIAL, where
584 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
585
586 for (trial = insn;
587 PREV_INSN (NEXT_INSN (trial)) == trial;
588 trial = NEXT_INSN (trial))
589 ;
590
591 seq_insn = PREV_INSN (NEXT_INSN (trial));
592 seq = as_a <rtx_sequence *> (PATTERN (seq_insn));
593
594 if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn)))
595 had_barrier = 1;
596
597 /* Create a delay list consisting of all the insns other than the one
598 we are deleting (unless we were the only one). */
599 auto_vec<rtx_insn *, 5> delay_list;
600 if (seq->len () > 2)
601 for (i = 1; i < seq->len (); i++)
602 if (seq->insn (i) != insn)
603 add_to_delay_list (seq->insn (i), &delay_list);
604
605 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
606 list, and rebuild the delay list if non-empty. */
607 prev = PREV_INSN (seq_insn);
608 trial = seq->insn (0);
609 delete_related_insns (seq_insn);
610 add_insn_after (trial, prev, NULL);
611
612 /* If there was a barrier after the old SEQUENCE, remit it. */
613 if (had_barrier)
614 emit_barrier_after (trial);
615
616 /* If there are any delay insns, remit them. Otherwise clear the
617 annul flag. */
618 if (!delay_list.is_empty ())
619 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
620 else if (JUMP_P (trial))
621 INSN_ANNULLED_BRANCH_P (trial) = 0;
622
623 INSN_FROM_TARGET_P (insn) = 0;
624
625 /* Show we need to fill this insn again. */
626 obstack_ptr_grow (&unfilled_slots_obstack, trial);
627
628 return trial;
629 }
630 \f
631 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
632 the insn that sets CC0 for it and delete it too. */
633
634 static void
635 delete_scheduled_jump (rtx_insn *insn)
636 {
637 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
638 delete the insn that sets the condition code, but it is hard to find it.
639 Since this case is rare anyway, don't bother trying; there would likely
640 be other insns that became dead anyway, which we wouldn't know to
641 delete. */
642
643 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, insn))
644 {
645 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
646
647 /* If a reg-note was found, it points to an insn to set CC0. This
648 insn is in the delay list of some other insn. So delete it from
649 the delay list it was in. */
650 if (note)
651 {
652 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
653 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
654 delete_from_delay_slot (as_a <rtx_insn *> (XEXP (note, 0)));
655 }
656 else
657 {
658 /* The insn setting CC0 is our previous insn, but it may be in
659 a delay slot. It will be the last insn in the delay slot, if
660 it is. */
661 rtx_insn *trial = previous_insn (insn);
662 if (NOTE_P (trial))
663 trial = prev_nonnote_insn (trial);
664 if (sets_cc0_p (PATTERN (trial)) != 1
665 || FIND_REG_INC_NOTE (trial, NULL_RTX))
666 return;
667 if (PREV_INSN (NEXT_INSN (trial)) == trial)
668 delete_related_insns (trial);
669 else
670 delete_from_delay_slot (trial);
671 }
672 }
673
674 delete_related_insns (insn);
675 }
676 \f
677 /* Counters for delay-slot filling. */
678
679 #define NUM_REORG_FUNCTIONS 2
680 #define MAX_DELAY_HISTOGRAM 3
681 #define MAX_REORG_PASSES 2
682
683 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
684
685 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
686
687 static int reorg_pass_number;
688
689 static void
690 note_delay_statistics (int slots_filled, int index)
691 {
692 num_insns_needing_delays[index][reorg_pass_number]++;
693 if (slots_filled > MAX_DELAY_HISTOGRAM)
694 slots_filled = MAX_DELAY_HISTOGRAM;
695 num_filled_delays[index][slots_filled][reorg_pass_number]++;
696 }
697 \f
698 /* Optimize the following cases:
699
700 1. When a conditional branch skips over only one instruction,
701 use an annulling branch and put that insn in the delay slot.
702 Use either a branch that annuls when the condition if true or
703 invert the test with a branch that annuls when the condition is
704 false. This saves insns, since otherwise we must copy an insn
705 from the L1 target.
706
707 (orig) (skip) (otherwise)
708 Bcc.n L1 Bcc',a L1 Bcc,a L1'
709 insn insn insn2
710 L1: L1: L1:
711 insn2 insn2 insn2
712 insn3 insn3 L1':
713 insn3
714
715 2. When a conditional branch skips over only one instruction,
716 and after that, it unconditionally branches somewhere else,
717 perform the similar optimization. This saves executing the
718 second branch in the case where the inverted condition is true.
719
720 Bcc.n L1 Bcc',a L2
721 insn insn
722 L1: L1:
723 Bra L2 Bra L2
724
725 INSN is a JUMP_INSN.
726
727 This should be expanded to skip over N insns, where N is the number
728 of delay slots required. */
729
730 static void
731 optimize_skip (rtx_jump_insn *insn, vec<rtx_insn *> *delay_list)
732 {
733 rtx_insn *trial = next_nonnote_insn (insn);
734 rtx_insn *next_trial = next_active_insn (trial);
735 int flags;
736
737 flags = get_jump_flags (insn, JUMP_LABEL (insn));
738
739 if (trial == 0
740 || !NONJUMP_INSN_P (trial)
741 || GET_CODE (PATTERN (trial)) == SEQUENCE
742 || recog_memoized (trial) < 0
743 || (! eligible_for_annul_false (insn, 0, trial, flags)
744 && ! eligible_for_annul_true (insn, 0, trial, flags))
745 || RTX_FRAME_RELATED_P (trial)
746 || can_throw_internal (trial))
747 return;
748
749 /* There are two cases where we are just executing one insn (we assume
750 here that a branch requires only one insn; this should be generalized
751 at some point): Where the branch goes around a single insn or where
752 we have one insn followed by a branch to the same label we branch to.
753 In both of these cases, inverting the jump and annulling the delay
754 slot give the same effect in fewer insns. */
755 if (next_trial == next_active_insn (JUMP_LABEL_AS_INSN (insn))
756 || (next_trial != 0
757 && simplejump_or_return_p (next_trial)
758 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)))
759 {
760 if (eligible_for_annul_false (insn, 0, trial, flags))
761 {
762 if (invert_jump (insn, JUMP_LABEL (insn), 1))
763 INSN_FROM_TARGET_P (trial) = 1;
764 else if (! eligible_for_annul_true (insn, 0, trial, flags))
765 return;
766 }
767
768 add_to_delay_list (trial, delay_list);
769 next_trial = next_active_insn (trial);
770 update_block (trial, trial);
771 delete_related_insns (trial);
772
773 /* Also, if we are targeting an unconditional
774 branch, thread our jump to the target of that branch. Don't
775 change this into a RETURN here, because it may not accept what
776 we have in the delay slot. We'll fix this up later. */
777 if (next_trial && simplejump_or_return_p (next_trial))
778 {
779 rtx target_label = JUMP_LABEL (next_trial);
780 if (ANY_RETURN_P (target_label))
781 target_label = find_end_label (target_label);
782
783 if (target_label)
784 {
785 /* Recompute the flags based on TARGET_LABEL since threading
786 the jump to TARGET_LABEL may change the direction of the
787 jump (which may change the circumstances in which the
788 delay slot is nullified). */
789 flags = get_jump_flags (insn, target_label);
790 if (eligible_for_annul_true (insn, 0, trial, flags))
791 reorg_redirect_jump (insn, target_label);
792 }
793 }
794
795 INSN_ANNULLED_BRANCH_P (insn) = 1;
796 }
797 }
798 \f
799 /* Encode and return branch direction and prediction information for
800 INSN assuming it will jump to LABEL.
801
802 Non conditional branches return no direction information and
803 are predicted as very likely taken. */
804
805 static int
806 get_jump_flags (const rtx_insn *insn, rtx label)
807 {
808 int flags;
809
810 /* get_jump_flags can be passed any insn with delay slots, these may
811 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
812 direction information, and only if they are conditional jumps.
813
814 If LABEL is a return, then there is no way to determine the branch
815 direction. */
816 if (JUMP_P (insn)
817 && (condjump_p (insn) || condjump_in_parallel_p (insn))
818 && !ANY_RETURN_P (label)
819 && INSN_UID (insn) <= max_uid
820 && INSN_UID (label) <= max_uid)
821 flags
822 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
823 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
824 /* No valid direction information. */
825 else
826 flags = 0;
827
828 return flags;
829 }
830
831 /* Return truth value of the statement that this branch
832 is mostly taken. If we think that the branch is extremely likely
833 to be taken, we return 2. If the branch is slightly more likely to be
834 taken, return 1. If the branch is slightly less likely to be taken,
835 return 0 and if the branch is highly unlikely to be taken, return -1. */
836
837 static int
838 mostly_true_jump (rtx jump_insn)
839 {
840 /* If branch probabilities are available, then use that number since it
841 always gives a correct answer. */
842 rtx note = find_reg_note (jump_insn, REG_BR_PROB, 0);
843 if (note)
844 {
845 int prob = profile_probability::from_reg_br_prob_note (XINT (note, 0))
846 .to_reg_br_prob_base ();
847
848 if (prob >= REG_BR_PROB_BASE * 9 / 10)
849 return 2;
850 else if (prob >= REG_BR_PROB_BASE / 2)
851 return 1;
852 else if (prob >= REG_BR_PROB_BASE / 10)
853 return 0;
854 else
855 return -1;
856 }
857
858 /* If there is no note, assume branches are not taken.
859 This should be rare. */
860 return 0;
861 }
862
863 /* Return the condition under which INSN will branch to TARGET. If TARGET
864 is zero, return the condition under which INSN will return. If INSN is
865 an unconditional branch, return const_true_rtx. If INSN isn't a simple
866 type of jump, or it doesn't go to TARGET, return 0. */
867
868 static rtx
869 get_branch_condition (const rtx_insn *insn, rtx target)
870 {
871 rtx pat = PATTERN (insn);
872 rtx src;
873
874 if (condjump_in_parallel_p (insn))
875 pat = XVECEXP (pat, 0, 0);
876
877 if (ANY_RETURN_P (pat) && pat == target)
878 return const_true_rtx;
879
880 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
881 return 0;
882
883 src = SET_SRC (pat);
884 if (GET_CODE (src) == LABEL_REF && label_ref_label (src) == target)
885 return const_true_rtx;
886
887 else if (GET_CODE (src) == IF_THEN_ELSE
888 && XEXP (src, 2) == pc_rtx
889 && ((GET_CODE (XEXP (src, 1)) == LABEL_REF
890 && label_ref_label (XEXP (src, 1)) == target)
891 || (ANY_RETURN_P (XEXP (src, 1)) && XEXP (src, 1) == target)))
892 return XEXP (src, 0);
893
894 else if (GET_CODE (src) == IF_THEN_ELSE
895 && XEXP (src, 1) == pc_rtx
896 && ((GET_CODE (XEXP (src, 2)) == LABEL_REF
897 && label_ref_label (XEXP (src, 2)) == target)
898 || (ANY_RETURN_P (XEXP (src, 2)) && XEXP (src, 2) == target)))
899 {
900 enum rtx_code rev;
901 rev = reversed_comparison_code (XEXP (src, 0), insn);
902 if (rev != UNKNOWN)
903 return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)),
904 XEXP (XEXP (src, 0), 0),
905 XEXP (XEXP (src, 0), 1));
906 }
907
908 return 0;
909 }
910
911 /* Return nonzero if CONDITION is more strict than the condition of
912 INSN, i.e., if INSN will always branch if CONDITION is true. */
913
914 static int
915 condition_dominates_p (rtx condition, const rtx_insn *insn)
916 {
917 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
918 enum rtx_code code = GET_CODE (condition);
919 enum rtx_code other_code;
920
921 if (rtx_equal_p (condition, other_condition)
922 || other_condition == const_true_rtx)
923 return 1;
924
925 else if (condition == const_true_rtx || other_condition == 0)
926 return 0;
927
928 other_code = GET_CODE (other_condition);
929 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
930 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
931 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
932 return 0;
933
934 return comparison_dominates_p (code, other_code);
935 }
936
937 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
938 any insns already in the delay slot of JUMP. */
939
940 static int
941 redirect_with_delay_slots_safe_p (rtx_insn *jump, rtx newlabel, rtx seq)
942 {
943 int flags, i;
944 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (seq));
945
946 /* Make sure all the delay slots of this jump would still
947 be valid after threading the jump. If they are still
948 valid, then return nonzero. */
949
950 flags = get_jump_flags (jump, newlabel);
951 for (i = 1; i < pat->len (); i++)
952 if (! (
953 #if ANNUL_IFFALSE_SLOTS
954 (INSN_ANNULLED_BRANCH_P (jump)
955 && INSN_FROM_TARGET_P (pat->insn (i)))
956 ? eligible_for_annul_false (jump, i - 1, pat->insn (i), flags) :
957 #endif
958 #if ANNUL_IFTRUE_SLOTS
959 (INSN_ANNULLED_BRANCH_P (jump)
960 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
961 ? eligible_for_annul_true (jump, i - 1, pat->insn (i), flags) :
962 #endif
963 eligible_for_delay (jump, i - 1, pat->insn (i), flags)))
964 break;
965
966 return (i == pat->len ());
967 }
968
969 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
970 any insns we wish to place in the delay slot of JUMP. */
971
972 static int
973 redirect_with_delay_list_safe_p (rtx_insn *jump, rtx newlabel,
974 const vec<rtx_insn *> &delay_list)
975 {
976 /* Make sure all the insns in DELAY_LIST would still be
977 valid after threading the jump. If they are still
978 valid, then return nonzero. */
979
980 int flags = get_jump_flags (jump, newlabel);
981 unsigned int delay_insns = delay_list.length ();
982 unsigned int i = 0;
983 for (; i < delay_insns; i++)
984 if (! (
985 #if ANNUL_IFFALSE_SLOTS
986 (INSN_ANNULLED_BRANCH_P (jump)
987 && INSN_FROM_TARGET_P (delay_list[i]))
988 ? eligible_for_annul_false (jump, i, delay_list[i], flags) :
989 #endif
990 #if ANNUL_IFTRUE_SLOTS
991 (INSN_ANNULLED_BRANCH_P (jump)
992 && ! INSN_FROM_TARGET_P (delay_list[i]))
993 ? eligible_for_annul_true (jump, i, delay_list[i], flags) :
994 #endif
995 eligible_for_delay (jump, i, delay_list[i], flags)))
996 break;
997
998 return i == delay_insns;
999 }
1000
1001 /* DELAY_LIST is a list of insns that have already been placed into delay
1002 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1003 If not, return 0; otherwise return 1. */
1004
1005 static int
1006 check_annul_list_true_false (int annul_true_p,
1007 const vec<rtx_insn *> &delay_list)
1008 {
1009 rtx_insn *trial;
1010 unsigned int i;
1011 FOR_EACH_VEC_ELT (delay_list, i, trial)
1012 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1013 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1014 return 0;
1015
1016 return 1;
1017 }
1018 \f
1019 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1020 the condition tested by INSN is CONDITION and the resources shown in
1021 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1022 from SEQ's delay list, in addition to whatever insns it may execute
1023 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1024 needed while searching for delay slot insns. Return the concatenated
1025 delay list if possible, otherwise, return 0.
1026
1027 SLOTS_TO_FILL is the total number of slots required by INSN, and
1028 PSLOTS_FILLED points to the number filled so far (also the number of
1029 insns in DELAY_LIST). It is updated with the number that have been
1030 filled from the SEQUENCE, if any.
1031
1032 PANNUL_P points to a nonzero value if we already know that we need
1033 to annul INSN. If this routine determines that annulling is needed,
1034 it may set that value nonzero.
1035
1036 PNEW_THREAD points to a location that is to receive the place at which
1037 execution should continue. */
1038
1039 static void
1040 steal_delay_list_from_target (rtx_insn *insn, rtx condition, rtx_sequence *seq,
1041 vec<rtx_insn *> *delay_list,
1042 struct resources *sets,
1043 struct resources *needed,
1044 struct resources *other_needed,
1045 int slots_to_fill, int *pslots_filled,
1046 int *pannul_p, rtx *pnew_thread)
1047 {
1048 int slots_remaining = slots_to_fill - *pslots_filled;
1049 int total_slots_filled = *pslots_filled;
1050 auto_vec<rtx_insn *, 5> new_delay_list;
1051 int must_annul = *pannul_p;
1052 int used_annul = 0;
1053 int i;
1054 struct resources cc_set;
1055 rtx_insn **redundant;
1056
1057 /* We can't do anything if there are more delay slots in SEQ than we
1058 can handle, or if we don't know that it will be a taken branch.
1059 We know that it will be a taken branch if it is either an unconditional
1060 branch or a conditional branch with a stricter branch condition.
1061
1062 Also, exit if the branch has more than one set, since then it is computing
1063 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1064 ??? It may be possible to move other sets into INSN in addition to
1065 moving the instructions in the delay slots.
1066
1067 We can not steal the delay list if one of the instructions in the
1068 current delay_list modifies the condition codes and the jump in the
1069 sequence is a conditional jump. We can not do this because we can
1070 not change the direction of the jump because the condition codes
1071 will effect the direction of the jump in the sequence. */
1072
1073 CLEAR_RESOURCE (&cc_set);
1074
1075 rtx_insn *trial;
1076 FOR_EACH_VEC_ELT (*delay_list, i, trial)
1077 {
1078 mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
1079 if (insn_references_resource_p (seq->insn (0), &cc_set, false))
1080 return;
1081 }
1082
1083 if (XVECLEN (seq, 0) - 1 > slots_remaining
1084 || ! condition_dominates_p (condition, seq->insn (0))
1085 || ! single_set (seq->insn (0)))
1086 return;
1087
1088 /* On some targets, branches with delay slots can have a limited
1089 displacement. Give the back end a chance to tell us we can't do
1090 this. */
1091 if (! targetm.can_follow_jump (insn, seq->insn (0)))
1092 return;
1093
1094 redundant = XALLOCAVEC (rtx_insn *, XVECLEN (seq, 0));
1095 for (i = 1; i < seq->len (); i++)
1096 {
1097 rtx_insn *trial = seq->insn (i);
1098 int flags;
1099
1100 if (insn_references_resource_p (trial, sets, false)
1101 || insn_sets_resource_p (trial, needed, false)
1102 || insn_sets_resource_p (trial, sets, false)
1103 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1104 delay list. */
1105 || (HAVE_cc0 && find_reg_note (trial, REG_CC_USER, NULL_RTX))
1106 /* If TRIAL is from the fallthrough code of an annulled branch insn
1107 in SEQ, we cannot use it. */
1108 || (INSN_ANNULLED_BRANCH_P (seq->insn (0))
1109 && ! INSN_FROM_TARGET_P (trial)))
1110 return;
1111
1112 /* If this insn was already done (usually in a previous delay slot),
1113 pretend we put it in our delay slot. */
1114 redundant[i] = redundant_insn (trial, insn, new_delay_list);
1115 if (redundant[i])
1116 continue;
1117
1118 /* We will end up re-vectoring this branch, so compute flags
1119 based on jumping to the new label. */
1120 flags = get_jump_flags (insn, JUMP_LABEL (seq->insn (0)));
1121
1122 if (! must_annul
1123 && ((condition == const_true_rtx
1124 || (! insn_sets_resource_p (trial, other_needed, false)
1125 && ! may_trap_or_fault_p (PATTERN (trial)))))
1126 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1127 : (must_annul || (delay_list->is_empty () && new_delay_list.is_empty ()))
1128 && (must_annul = 1,
1129 check_annul_list_true_false (0, *delay_list)
1130 && check_annul_list_true_false (0, new_delay_list)
1131 && eligible_for_annul_false (insn, total_slots_filled,
1132 trial, flags)))
1133 {
1134 if (must_annul)
1135 {
1136 /* Frame related instructions cannot go into annulled delay
1137 slots, it messes up the dwarf info. */
1138 if (RTX_FRAME_RELATED_P (trial))
1139 return;
1140 used_annul = 1;
1141 }
1142 rtx_insn *temp = copy_delay_slot_insn (trial);
1143 INSN_FROM_TARGET_P (temp) = 1;
1144 add_to_delay_list (temp, &new_delay_list);
1145 total_slots_filled++;
1146
1147 if (--slots_remaining == 0)
1148 break;
1149 }
1150 else
1151 return;
1152 }
1153
1154 /* Record the effect of the instructions that were redundant and which
1155 we therefore decided not to copy. */
1156 for (i = 1; i < seq->len (); i++)
1157 if (redundant[i])
1158 {
1159 fix_reg_dead_note (redundant[i], insn);
1160 update_block (seq->insn (i), insn);
1161 }
1162
1163 /* Show the place to which we will be branching. */
1164 *pnew_thread = first_active_target_insn (JUMP_LABEL (seq->insn (0)));
1165
1166 /* Add any new insns to the delay list and update the count of the
1167 number of slots filled. */
1168 *pslots_filled = total_slots_filled;
1169 if (used_annul)
1170 *pannul_p = 1;
1171
1172 rtx_insn *temp;
1173 FOR_EACH_VEC_ELT (new_delay_list, i, temp)
1174 add_to_delay_list (temp, delay_list);
1175 }
1176 \f
1177 /* Similar to steal_delay_list_from_target except that SEQ is on the
1178 fallthrough path of INSN. Here we only do something if the delay insn
1179 of SEQ is an unconditional branch. In that case we steal its delay slot
1180 for INSN since unconditional branches are much easier to fill. */
1181
1182 static void
1183 steal_delay_list_from_fallthrough (rtx_insn *insn, rtx condition,
1184 rtx_sequence *seq,
1185 vec<rtx_insn *> *delay_list,
1186 struct resources *sets,
1187 struct resources *needed,
1188 struct resources *other_needed,
1189 int slots_to_fill, int *pslots_filled,
1190 int *pannul_p)
1191 {
1192 int i;
1193 int flags;
1194 int must_annul = *pannul_p;
1195 int used_annul = 0;
1196
1197 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1198
1199 /* We can't do anything if SEQ's delay insn isn't an
1200 unconditional branch. */
1201
1202 if (! simplejump_or_return_p (seq->insn (0)))
1203 return;
1204
1205 for (i = 1; i < seq->len (); i++)
1206 {
1207 rtx_insn *trial = seq->insn (i);
1208 rtx_insn *prior_insn;
1209
1210 /* If TRIAL sets CC0, stealing it will move it too far from the use
1211 of CC0. */
1212 if (insn_references_resource_p (trial, sets, false)
1213 || insn_sets_resource_p (trial, needed, false)
1214 || insn_sets_resource_p (trial, sets, false)
1215 || (HAVE_cc0 && sets_cc0_p (PATTERN (trial))))
1216
1217 break;
1218
1219 /* If this insn was already done, we don't need it. */
1220 if ((prior_insn = redundant_insn (trial, insn, *delay_list)))
1221 {
1222 fix_reg_dead_note (prior_insn, insn);
1223 update_block (trial, insn);
1224 delete_from_delay_slot (trial);
1225 continue;
1226 }
1227
1228 if (! must_annul
1229 && ((condition == const_true_rtx
1230 || (! insn_sets_resource_p (trial, other_needed, false)
1231 && ! may_trap_or_fault_p (PATTERN (trial)))))
1232 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1233 : (must_annul || delay_list->is_empty ()) && (must_annul = 1,
1234 check_annul_list_true_false (1, *delay_list)
1235 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1236 {
1237 if (must_annul)
1238 used_annul = 1;
1239 delete_from_delay_slot (trial);
1240 add_to_delay_list (trial, delay_list);
1241
1242 if (++(*pslots_filled) == slots_to_fill)
1243 break;
1244 }
1245 else
1246 break;
1247 }
1248
1249 if (used_annul)
1250 *pannul_p = 1;
1251 }
1252 \f
1253 /* Try merging insns starting at THREAD which match exactly the insns in
1254 INSN's delay list.
1255
1256 If all insns were matched and the insn was previously annulling, the
1257 annul bit will be cleared.
1258
1259 For each insn that is merged, if the branch is or will be non-annulling,
1260 we delete the merged insn. */
1261
1262 static void
1263 try_merge_delay_insns (rtx_insn *insn, rtx_insn *thread)
1264 {
1265 rtx_insn *trial, *next_trial;
1266 rtx_insn *delay_insn = as_a <rtx_insn *> (XVECEXP (PATTERN (insn), 0, 0));
1267 int annul_p = JUMP_P (delay_insn) && INSN_ANNULLED_BRANCH_P (delay_insn);
1268 int slot_number = 1;
1269 int num_slots = XVECLEN (PATTERN (insn), 0);
1270 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1271 struct resources set, needed, modified;
1272 auto_vec<std::pair<rtx_insn *, bool>, 10> merged_insns;
1273 int flags;
1274
1275 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1276
1277 CLEAR_RESOURCE (&needed);
1278 CLEAR_RESOURCE (&set);
1279
1280 /* If this is not an annulling branch, take into account anything needed in
1281 INSN's delay slot. This prevents two increments from being incorrectly
1282 folded into one. If we are annulling, this would be the correct
1283 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1284 will essentially disable this optimization. This method is somewhat of
1285 a kludge, but I don't see a better way.) */
1286 if (! annul_p)
1287 for (int i = 1; i < num_slots; i++)
1288 if (XVECEXP (PATTERN (insn), 0, i))
1289 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed,
1290 true);
1291
1292 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1293 {
1294 rtx pat = PATTERN (trial);
1295 rtx oldtrial = trial;
1296
1297 next_trial = next_nonnote_insn (trial);
1298
1299 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1300 if (NONJUMP_INSN_P (trial)
1301 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER
1302 || GET_CODE (pat) == CLOBBER_HIGH))
1303 continue;
1304
1305 if (GET_CODE (next_to_match) == GET_CODE (trial)
1306 /* We can't share an insn that sets cc0. */
1307 && (!HAVE_cc0 || ! sets_cc0_p (pat))
1308 && ! insn_references_resource_p (trial, &set, true)
1309 && ! insn_sets_resource_p (trial, &set, true)
1310 && ! insn_sets_resource_p (trial, &needed, true)
1311 && (trial = try_split (pat, trial, 0)) != 0
1312 /* Update next_trial, in case try_split succeeded. */
1313 && (next_trial = next_nonnote_insn (trial))
1314 /* Likewise THREAD. */
1315 && (thread = oldtrial == thread ? trial : thread)
1316 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1317 /* Have to test this condition if annul condition is different
1318 from (and less restrictive than) non-annulling one. */
1319 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1320 {
1321
1322 if (! annul_p)
1323 {
1324 update_block (trial, thread);
1325 if (trial == thread)
1326 thread = next_active_insn (thread);
1327
1328 delete_related_insns (trial);
1329 INSN_FROM_TARGET_P (next_to_match) = 0;
1330 }
1331 else
1332 merged_insns.safe_push (std::pair<rtx_insn *, bool> (trial, false));
1333
1334 if (++slot_number == num_slots)
1335 break;
1336
1337 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1338 }
1339
1340 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
1341 mark_referenced_resources (trial, &needed, true);
1342 }
1343
1344 /* See if we stopped on a filled insn. If we did, try to see if its
1345 delay slots match. */
1346 if (slot_number != num_slots
1347 && trial && NONJUMP_INSN_P (trial)
1348 && GET_CODE (PATTERN (trial)) == SEQUENCE
1349 && !(JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
1350 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0))))
1351 {
1352 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (trial));
1353 rtx filled_insn = XVECEXP (pat, 0, 0);
1354
1355 /* Account for resources set/needed by the filled insn. */
1356 mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
1357 mark_referenced_resources (filled_insn, &needed, true);
1358
1359 for (int i = 1; i < pat->len (); i++)
1360 {
1361 rtx_insn *dtrial = pat->insn (i);
1362
1363 CLEAR_RESOURCE (&modified);
1364 /* Account for resources set by the insn following NEXT_TO_MATCH
1365 inside INSN's delay list. */
1366 for (int j = 1; slot_number + j < num_slots; j++)
1367 mark_set_resources (XVECEXP (PATTERN (insn), 0, slot_number + j),
1368 &modified, 0, MARK_SRC_DEST_CALL);
1369 /* Account for resources set by the insn before DTRIAL and inside
1370 TRIAL's delay list. */
1371 for (int j = 1; j < i; j++)
1372 mark_set_resources (XVECEXP (pat, 0, j),
1373 &modified, 0, MARK_SRC_DEST_CALL);
1374 if (! insn_references_resource_p (dtrial, &set, true)
1375 && ! insn_sets_resource_p (dtrial, &set, true)
1376 && ! insn_sets_resource_p (dtrial, &needed, true)
1377 && (!HAVE_cc0 || ! sets_cc0_p (PATTERN (dtrial)))
1378 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1379 /* Check that DTRIAL and NEXT_TO_MATCH does not reference a
1380 resource modified between them (only dtrial is checked because
1381 next_to_match and dtrial shall to be equal in order to hit
1382 this line) */
1383 && ! insn_references_resource_p (dtrial, &modified, true)
1384 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1385 {
1386 if (! annul_p)
1387 {
1388 rtx_insn *new_rtx;
1389
1390 update_block (dtrial, thread);
1391 new_rtx = delete_from_delay_slot (dtrial);
1392 if (thread->deleted ())
1393 thread = new_rtx;
1394 INSN_FROM_TARGET_P (next_to_match) = 0;
1395 }
1396 else
1397 merged_insns.safe_push (std::pair<rtx_insn *, bool> (dtrial,
1398 true));
1399
1400 if (++slot_number == num_slots)
1401 break;
1402
1403 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1404 }
1405 else
1406 {
1407 /* Keep track of the set/referenced resources for the delay
1408 slots of any trial insns we encounter. */
1409 mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL);
1410 mark_referenced_resources (dtrial, &needed, true);
1411 }
1412 }
1413 }
1414
1415 /* If all insns in the delay slot have been matched and we were previously
1416 annulling the branch, we need not any more. In that case delete all the
1417 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1418 the delay list so that we know that it isn't only being used at the
1419 target. */
1420 if (slot_number == num_slots && annul_p)
1421 {
1422 unsigned int len = merged_insns.length ();
1423 for (unsigned int i = len - 1; i < len; i--)
1424 if (merged_insns[i].second)
1425 {
1426 update_block (merged_insns[i].first, thread);
1427 rtx_insn *new_rtx = delete_from_delay_slot (merged_insns[i].first);
1428 if (thread->deleted ())
1429 thread = new_rtx;
1430 }
1431 else
1432 {
1433 update_block (merged_insns[i].first, thread);
1434 delete_related_insns (merged_insns[i].first);
1435 }
1436
1437 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1438
1439 for (int i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1440 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1441 }
1442 }
1443 \f
1444 /* See if INSN is redundant with an insn in front of TARGET. Often this
1445 is called when INSN is a candidate for a delay slot of TARGET.
1446 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1447 of INSN. Often INSN will be redundant with an insn in a delay slot of
1448 some previous insn. This happens when we have a series of branches to the
1449 same label; in that case the first insn at the target might want to go
1450 into each of the delay slots.
1451
1452 If we are not careful, this routine can take up a significant fraction
1453 of the total compilation time (4%), but only wins rarely. Hence we
1454 speed this routine up by making two passes. The first pass goes back
1455 until it hits a label and sees if it finds an insn with an identical
1456 pattern. Only in this (relatively rare) event does it check for
1457 data conflicts.
1458
1459 We do not split insns we encounter. This could cause us not to find a
1460 redundant insn, but the cost of splitting seems greater than the possible
1461 gain in rare cases. */
1462
1463 static rtx_insn *
1464 redundant_insn (rtx insn, rtx_insn *target, const vec<rtx_insn *> &delay_list)
1465 {
1466 rtx target_main = target;
1467 rtx ipat = PATTERN (insn);
1468 rtx_insn *trial;
1469 rtx pat;
1470 struct resources needed, set;
1471 int i;
1472 unsigned insns_to_search;
1473
1474 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1475 are allowed to not actually assign to such a register. */
1476 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1477 return 0;
1478
1479 /* Scan backwards looking for a match. */
1480 for (trial = PREV_INSN (target),
1481 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1482 trial && insns_to_search > 0;
1483 trial = PREV_INSN (trial))
1484 {
1485 /* (use (insn))s can come immediately after a barrier if the
1486 label that used to precede them has been deleted as dead.
1487 See delete_related_insns. */
1488 if (LABEL_P (trial) || BARRIER_P (trial))
1489 return 0;
1490
1491 if (!INSN_P (trial))
1492 continue;
1493 --insns_to_search;
1494
1495 pat = PATTERN (trial);
1496 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER
1497 || GET_CODE (pat) == CLOBBER_HIGH)
1498 continue;
1499
1500 if (GET_CODE (trial) == DEBUG_INSN)
1501 continue;
1502
1503 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
1504 {
1505 /* Stop for a CALL and its delay slots because it is difficult to
1506 track its resource needs correctly. */
1507 if (CALL_P (seq->element (0)))
1508 return 0;
1509
1510 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1511 slots because it is difficult to track its resource needs
1512 correctly. */
1513
1514 if (INSN_SETS_ARE_DELAYED (seq->insn (0)))
1515 return 0;
1516
1517 if (INSN_REFERENCES_ARE_DELAYED (seq->insn (0)))
1518 return 0;
1519
1520 /* See if any of the insns in the delay slot match, updating
1521 resource requirements as we go. */
1522 for (i = seq->len () - 1; i > 0; i--)
1523 if (GET_CODE (seq->element (i)) == GET_CODE (insn)
1524 && rtx_equal_p (PATTERN (seq->element (i)), ipat)
1525 && ! find_reg_note (seq->element (i), REG_UNUSED, NULL_RTX))
1526 break;
1527
1528 /* If found a match, exit this loop early. */
1529 if (i > 0)
1530 break;
1531 }
1532
1533 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1534 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1535 break;
1536 }
1537
1538 /* If we didn't find an insn that matches, return 0. */
1539 if (trial == 0)
1540 return 0;
1541
1542 /* See what resources this insn sets and needs. If they overlap, or
1543 if this insn references CC0, it can't be redundant. */
1544
1545 CLEAR_RESOURCE (&needed);
1546 CLEAR_RESOURCE (&set);
1547 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1548 mark_referenced_resources (insn, &needed, true);
1549
1550 /* If TARGET is a SEQUENCE, get the main insn. */
1551 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1552 target_main = XVECEXP (PATTERN (target), 0, 0);
1553
1554 if (resource_conflicts_p (&needed, &set)
1555 || (HAVE_cc0 && reg_mentioned_p (cc0_rtx, ipat))
1556 /* The insn requiring the delay may not set anything needed or set by
1557 INSN. */
1558 || insn_sets_resource_p (target_main, &needed, true)
1559 || insn_sets_resource_p (target_main, &set, true))
1560 return 0;
1561
1562 /* Insns we pass may not set either NEEDED or SET, so merge them for
1563 simpler tests. */
1564 needed.memory |= set.memory;
1565 IOR_HARD_REG_SET (needed.regs, set.regs);
1566
1567 /* This insn isn't redundant if it conflicts with an insn that either is
1568 or will be in a delay slot of TARGET. */
1569
1570 unsigned int j;
1571 rtx_insn *temp;
1572 FOR_EACH_VEC_ELT (delay_list, j, temp)
1573 if (insn_sets_resource_p (temp, &needed, true))
1574 return 0;
1575
1576 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1577 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1578 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed,
1579 true))
1580 return 0;
1581
1582 /* Scan backwards until we reach a label or an insn that uses something
1583 INSN sets or sets something insn uses or sets. */
1584
1585 for (trial = PREV_INSN (target),
1586 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1587 trial && !LABEL_P (trial) && insns_to_search > 0;
1588 trial = PREV_INSN (trial))
1589 {
1590 if (!INSN_P (trial))
1591 continue;
1592 --insns_to_search;
1593
1594 pat = PATTERN (trial);
1595 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER
1596 || GET_CODE (pat) == CLOBBER_HIGH)
1597 continue;
1598
1599 if (GET_CODE (trial) == DEBUG_INSN)
1600 continue;
1601
1602 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
1603 {
1604 bool annul_p = false;
1605 rtx_insn *control = seq->insn (0);
1606
1607 /* If this is a CALL_INSN and its delay slots, it is hard to track
1608 the resource needs properly, so give up. */
1609 if (CALL_P (control))
1610 return 0;
1611
1612 /* If this is an INSN or JUMP_INSN with delayed effects, it
1613 is hard to track the resource needs properly, so give up. */
1614
1615 if (INSN_SETS_ARE_DELAYED (control))
1616 return 0;
1617
1618 if (INSN_REFERENCES_ARE_DELAYED (control))
1619 return 0;
1620
1621 if (JUMP_P (control))
1622 annul_p = INSN_ANNULLED_BRANCH_P (control);
1623
1624 /* See if any of the insns in the delay slot match, updating
1625 resource requirements as we go. */
1626 for (i = seq->len () - 1; i > 0; i--)
1627 {
1628 rtx_insn *candidate = seq->insn (i);
1629
1630 /* If an insn will be annulled if the branch is false, it isn't
1631 considered as a possible duplicate insn. */
1632 if (rtx_equal_p (PATTERN (candidate), ipat)
1633 && ! (annul_p && INSN_FROM_TARGET_P (candidate)))
1634 {
1635 /* Show that this insn will be used in the sequel. */
1636 INSN_FROM_TARGET_P (candidate) = 0;
1637 return candidate;
1638 }
1639
1640 /* Unless this is an annulled insn from the target of a branch,
1641 we must stop if it sets anything needed or set by INSN. */
1642 if ((!annul_p || !INSN_FROM_TARGET_P (candidate))
1643 && insn_sets_resource_p (candidate, &needed, true))
1644 return 0;
1645 }
1646
1647 /* If the insn requiring the delay slot conflicts with INSN, we
1648 must stop. */
1649 if (insn_sets_resource_p (control, &needed, true))
1650 return 0;
1651 }
1652 else
1653 {
1654 /* See if TRIAL is the same as INSN. */
1655 pat = PATTERN (trial);
1656 if (rtx_equal_p (pat, ipat))
1657 return trial;
1658
1659 /* Can't go any further if TRIAL conflicts with INSN. */
1660 if (insn_sets_resource_p (trial, &needed, true))
1661 return 0;
1662 }
1663 }
1664
1665 return 0;
1666 }
1667 \f
1668 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1669 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1670 is nonzero, we are allowed to fall into this thread; otherwise, we are
1671 not.
1672
1673 If LABEL is used more than one or we pass a label other than LABEL before
1674 finding an active insn, we do not own this thread. */
1675
1676 static int
1677 own_thread_p (rtx thread, rtx label, int allow_fallthrough)
1678 {
1679 rtx_insn *active_insn;
1680 rtx_insn *insn;
1681
1682 /* We don't own the function end. */
1683 if (thread == 0 || ANY_RETURN_P (thread))
1684 return 0;
1685
1686 /* We have a non-NULL insn. */
1687 rtx_insn *thread_insn = as_a <rtx_insn *> (thread);
1688
1689 /* Get the first active insn, or THREAD_INSN, if it is an active insn. */
1690 active_insn = next_active_insn (PREV_INSN (thread_insn));
1691
1692 for (insn = thread_insn; insn != active_insn; insn = NEXT_INSN (insn))
1693 if (LABEL_P (insn)
1694 && (insn != label || LABEL_NUSES (insn) != 1))
1695 return 0;
1696
1697 if (allow_fallthrough)
1698 return 1;
1699
1700 /* Ensure that we reach a BARRIER before any insn or label. */
1701 for (insn = prev_nonnote_insn (thread_insn);
1702 insn == 0 || !BARRIER_P (insn);
1703 insn = prev_nonnote_insn (insn))
1704 if (insn == 0
1705 || LABEL_P (insn)
1706 || (NONJUMP_INSN_P (insn)
1707 && GET_CODE (PATTERN (insn)) != USE
1708 && GET_CODE (PATTERN (insn)) != CLOBBER
1709 && GET_CODE (PATTERN (insn)) != CLOBBER_HIGH))
1710 return 0;
1711
1712 return 1;
1713 }
1714 \f
1715 /* Called when INSN is being moved from a location near the target of a jump.
1716 We leave a marker of the form (use (INSN)) immediately in front of WHERE
1717 for mark_target_live_regs. These markers will be deleted at the end.
1718
1719 We used to try to update the live status of registers if WHERE is at
1720 the start of a basic block, but that can't work since we may remove a
1721 BARRIER in relax_delay_slots. */
1722
1723 static void
1724 update_block (rtx_insn *insn, rtx_insn *where)
1725 {
1726 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1727
1728 /* INSN might be making a value live in a block where it didn't use to
1729 be. So recompute liveness information for this block. */
1730 incr_ticks_for_insn (insn);
1731 }
1732
1733 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1734 the basic block containing the jump. */
1735
1736 static int
1737 reorg_redirect_jump (rtx_jump_insn *jump, rtx nlabel)
1738 {
1739 incr_ticks_for_insn (jump);
1740 return redirect_jump (jump, nlabel, 1);
1741 }
1742
1743 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1744 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1745 that reference values used in INSN. If we find one, then we move the
1746 REG_DEAD note to INSN.
1747
1748 This is needed to handle the case where a later insn (after INSN) has a
1749 REG_DEAD note for a register used by INSN, and this later insn subsequently
1750 gets moved before a CODE_LABEL because it is a redundant insn. In this
1751 case, mark_target_live_regs may be confused into thinking the register
1752 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1753
1754 static void
1755 update_reg_dead_notes (rtx_insn *insn, rtx_insn *delayed_insn)
1756 {
1757 rtx link, next;
1758 rtx_insn *p;
1759
1760 for (p = next_nonnote_insn (insn); p != delayed_insn;
1761 p = next_nonnote_insn (p))
1762 for (link = REG_NOTES (p); link; link = next)
1763 {
1764 next = XEXP (link, 1);
1765
1766 if (REG_NOTE_KIND (link) != REG_DEAD
1767 || !REG_P (XEXP (link, 0)))
1768 continue;
1769
1770 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1771 {
1772 /* Move the REG_DEAD note from P to INSN. */
1773 remove_note (p, link);
1774 XEXP (link, 1) = REG_NOTES (insn);
1775 REG_NOTES (insn) = link;
1776 }
1777 }
1778 }
1779
1780 /* Called when an insn redundant with start_insn is deleted. If there
1781 is a REG_DEAD note for the target of start_insn between start_insn
1782 and stop_insn, then the REG_DEAD note needs to be deleted since the
1783 value no longer dies there.
1784
1785 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1786 confused into thinking the register is dead. */
1787
1788 static void
1789 fix_reg_dead_note (rtx_insn *start_insn, rtx stop_insn)
1790 {
1791 rtx link, next;
1792 rtx_insn *p;
1793
1794 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1795 p = next_nonnote_insn (p))
1796 for (link = REG_NOTES (p); link; link = next)
1797 {
1798 next = XEXP (link, 1);
1799
1800 if (REG_NOTE_KIND (link) != REG_DEAD
1801 || !REG_P (XEXP (link, 0)))
1802 continue;
1803
1804 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1805 {
1806 remove_note (p, link);
1807 return;
1808 }
1809 }
1810 }
1811
1812 /* Delete any REG_UNUSED notes that exist on INSN but not on OTHER_INSN.
1813
1814 This handles the case of udivmodXi4 instructions which optimize their
1815 output depending on whether any REG_UNUSED notes are present. We must
1816 make sure that INSN calculates as many results as OTHER_INSN does. */
1817
1818 static void
1819 update_reg_unused_notes (rtx_insn *insn, rtx other_insn)
1820 {
1821 rtx link, next;
1822
1823 for (link = REG_NOTES (insn); link; link = next)
1824 {
1825 next = XEXP (link, 1);
1826
1827 if (REG_NOTE_KIND (link) != REG_UNUSED
1828 || !REG_P (XEXP (link, 0)))
1829 continue;
1830
1831 if (!find_regno_note (other_insn, REG_UNUSED, REGNO (XEXP (link, 0))))
1832 remove_note (insn, link);
1833 }
1834 }
1835 \f
1836 static vec <rtx> sibling_labels;
1837
1838 /* Return the label before INSN, or put a new label there. If SIBLING is
1839 non-zero, it is another label associated with the new label (if any),
1840 typically the former target of the jump that will be redirected to
1841 the new label. */
1842
1843 static rtx_insn *
1844 get_label_before (rtx_insn *insn, rtx sibling)
1845 {
1846 rtx_insn *label;
1847
1848 /* Find an existing label at this point
1849 or make a new one if there is none. */
1850 label = prev_nonnote_insn (insn);
1851
1852 if (label == 0 || !LABEL_P (label))
1853 {
1854 rtx_insn *prev = PREV_INSN (insn);
1855
1856 label = gen_label_rtx ();
1857 emit_label_after (label, prev);
1858 LABEL_NUSES (label) = 0;
1859 if (sibling)
1860 {
1861 sibling_labels.safe_push (label);
1862 sibling_labels.safe_push (sibling);
1863 }
1864 }
1865 return label;
1866 }
1867
1868 /* Scan a function looking for insns that need a delay slot and find insns to
1869 put into the delay slot.
1870
1871 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1872 as calls). We do these first since we don't want jump insns (that are
1873 easier to fill) to get the only insns that could be used for non-jump insns.
1874 When it is zero, only try to fill JUMP_INSNs.
1875
1876 When slots are filled in this manner, the insns (including the
1877 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1878 it is possible to tell whether a delay slot has really been filled
1879 or not. `final' knows how to deal with this, by communicating
1880 through FINAL_SEQUENCE. */
1881
1882 static void
1883 fill_simple_delay_slots (int non_jumps_p)
1884 {
1885 rtx_insn *insn, *trial, *next_trial;
1886 rtx pat;
1887 int i;
1888 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
1889 struct resources needed, set;
1890 int slots_to_fill, slots_filled;
1891 auto_vec<rtx_insn *, 5> delay_list;
1892
1893 for (i = 0; i < num_unfilled_slots; i++)
1894 {
1895 int flags;
1896 /* Get the next insn to fill. If it has already had any slots assigned,
1897 we can't do anything with it. Maybe we'll improve this later. */
1898
1899 insn = unfilled_slots_base[i];
1900 if (insn == 0
1901 || insn->deleted ()
1902 || (NONJUMP_INSN_P (insn)
1903 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1904 || (JUMP_P (insn) && non_jumps_p)
1905 || (!JUMP_P (insn) && ! non_jumps_p))
1906 continue;
1907
1908 /* It may have been that this insn used to need delay slots, but
1909 now doesn't; ignore in that case. This can happen, for example,
1910 on the HP PA RISC, where the number of delay slots depends on
1911 what insns are nearby. */
1912 slots_to_fill = num_delay_slots (insn);
1913
1914 /* Some machine description have defined instructions to have
1915 delay slots only in certain circumstances which may depend on
1916 nearby insns (which change due to reorg's actions).
1917
1918 For example, the PA port normally has delay slots for unconditional
1919 jumps.
1920
1921 However, the PA port claims such jumps do not have a delay slot
1922 if they are immediate successors of certain CALL_INSNs. This
1923 allows the port to favor filling the delay slot of the call with
1924 the unconditional jump. */
1925 if (slots_to_fill == 0)
1926 continue;
1927
1928 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
1929 says how many. After initialization, first try optimizing
1930
1931 call _foo call _foo
1932 nop add %o7,.-L1,%o7
1933 b,a L1
1934 nop
1935
1936 If this case applies, the delay slot of the call is filled with
1937 the unconditional jump. This is done first to avoid having the
1938 delay slot of the call filled in the backward scan. Also, since
1939 the unconditional jump is likely to also have a delay slot, that
1940 insn must exist when it is subsequently scanned.
1941
1942 This is tried on each insn with delay slots as some machines
1943 have insns which perform calls, but are not represented as
1944 CALL_INSNs. */
1945
1946 slots_filled = 0;
1947 delay_list.truncate (0);
1948
1949 if (JUMP_P (insn))
1950 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1951 else
1952 flags = get_jump_flags (insn, NULL_RTX);
1953
1954 if ((trial = next_active_insn (insn))
1955 && JUMP_P (trial)
1956 && simplejump_p (trial)
1957 && eligible_for_delay (insn, slots_filled, trial, flags)
1958 && no_labels_between_p (insn, trial)
1959 && ! can_throw_internal (trial))
1960 {
1961 rtx_insn **tmp;
1962 slots_filled++;
1963 add_to_delay_list (trial, &delay_list);
1964
1965 /* TRIAL may have had its delay slot filled, then unfilled. When
1966 the delay slot is unfilled, TRIAL is placed back on the unfilled
1967 slots obstack. Unfortunately, it is placed on the end of the
1968 obstack, not in its original location. Therefore, we must search
1969 from entry i + 1 to the end of the unfilled slots obstack to
1970 try and find TRIAL. */
1971 tmp = &unfilled_slots_base[i + 1];
1972 while (*tmp != trial && tmp != unfilled_slots_next)
1973 tmp++;
1974
1975 /* Remove the unconditional jump from consideration for delay slot
1976 filling and unthread it. */
1977 if (*tmp == trial)
1978 *tmp = 0;
1979 {
1980 rtx_insn *next = NEXT_INSN (trial);
1981 rtx_insn *prev = PREV_INSN (trial);
1982 if (prev)
1983 SET_NEXT_INSN (prev) = next;
1984 if (next)
1985 SET_PREV_INSN (next) = prev;
1986 }
1987 }
1988
1989 /* Now, scan backwards from the insn to search for a potential
1990 delay-slot candidate. Stop searching when a label or jump is hit.
1991
1992 For each candidate, if it is to go into the delay slot (moved
1993 forward in execution sequence), it must not need or set any resources
1994 that were set by later insns and must not set any resources that
1995 are needed for those insns.
1996
1997 The delay slot insn itself sets resources unless it is a call
1998 (in which case the called routine, not the insn itself, is doing
1999 the setting). */
2000
2001 if (slots_filled < slots_to_fill)
2002 {
2003 /* If the flags register is dead after the insn, then we want to be
2004 able to accept a candidate that clobbers it. For this purpose,
2005 we need to filter the flags register during life analysis, so
2006 that it doesn't create RAW and WAW dependencies, while still
2007 creating the necessary WAR dependencies. */
2008 bool filter_flags
2009 = (slots_to_fill == 1
2010 && targetm.flags_regnum != INVALID_REGNUM
2011 && find_regno_note (insn, REG_DEAD, targetm.flags_regnum));
2012 struct resources fset;
2013 CLEAR_RESOURCE (&needed);
2014 CLEAR_RESOURCE (&set);
2015 mark_set_resources (insn, &set, 0, MARK_SRC_DEST);
2016 if (filter_flags)
2017 {
2018 CLEAR_RESOURCE (&fset);
2019 mark_set_resources (insn, &fset, 0, MARK_SRC_DEST);
2020 }
2021 mark_referenced_resources (insn, &needed, false);
2022
2023 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2024 trial = next_trial)
2025 {
2026 next_trial = prev_nonnote_insn (trial);
2027
2028 /* This must be an INSN or CALL_INSN. */
2029 pat = PATTERN (trial);
2030
2031 /* Stand-alone USE and CLOBBER are just for flow. */
2032 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER
2033 || GET_CODE (pat) == CLOBBER_HIGH)
2034 continue;
2035
2036 /* And DEBUG_INSNs never go into delay slots. */
2037 if (GET_CODE (trial) == DEBUG_INSN)
2038 continue;
2039
2040 /* Check for resource conflict first, to avoid unnecessary
2041 splitting. */
2042 if (! insn_references_resource_p (trial, &set, true)
2043 && ! insn_sets_resource_p (trial,
2044 filter_flags ? &fset : &set,
2045 true)
2046 && ! insn_sets_resource_p (trial, &needed, true)
2047 /* Can't separate set of cc0 from its use. */
2048 && (!HAVE_cc0 || ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat)))
2049 && ! can_throw_internal (trial))
2050 {
2051 trial = try_split (pat, trial, 1);
2052 next_trial = prev_nonnote_insn (trial);
2053 if (eligible_for_delay (insn, slots_filled, trial, flags))
2054 {
2055 /* In this case, we are searching backward, so if we
2056 find insns to put on the delay list, we want
2057 to put them at the head, rather than the
2058 tail, of the list. */
2059
2060 update_reg_dead_notes (trial, insn);
2061 delay_list.safe_insert (0, trial);
2062 update_block (trial, trial);
2063 delete_related_insns (trial);
2064 if (slots_to_fill == ++slots_filled)
2065 break;
2066 continue;
2067 }
2068 }
2069
2070 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2071 if (filter_flags)
2072 {
2073 mark_set_resources (trial, &fset, 0, MARK_SRC_DEST_CALL);
2074 /* If the flags register is set, then it doesn't create RAW
2075 dependencies any longer and it also doesn't create WAW
2076 dependencies since it's dead after the original insn. */
2077 if (TEST_HARD_REG_BIT (fset.regs, targetm.flags_regnum))
2078 {
2079 CLEAR_HARD_REG_BIT (needed.regs, targetm.flags_regnum);
2080 CLEAR_HARD_REG_BIT (fset.regs, targetm.flags_regnum);
2081 }
2082 }
2083 mark_referenced_resources (trial, &needed, true);
2084 }
2085 }
2086
2087 /* If all needed slots haven't been filled, we come here. */
2088
2089 /* Try to optimize case of jumping around a single insn. */
2090 if ((ANNUL_IFTRUE_SLOTS || ANNUL_IFFALSE_SLOTS)
2091 && slots_filled != slots_to_fill
2092 && delay_list.is_empty ()
2093 && JUMP_P (insn)
2094 && (condjump_p (insn) || condjump_in_parallel_p (insn))
2095 && !ANY_RETURN_P (JUMP_LABEL (insn)))
2096 {
2097 optimize_skip (as_a <rtx_jump_insn *> (insn), &delay_list);
2098 if (!delay_list.is_empty ())
2099 slots_filled += 1;
2100 }
2101
2102 /* Try to get insns from beyond the insn needing the delay slot.
2103 These insns can neither set or reference resources set in insns being
2104 skipped, cannot set resources in the insn being skipped, and, if this
2105 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2106 call might not return).
2107
2108 There used to be code which continued past the target label if
2109 we saw all uses of the target label. This code did not work,
2110 because it failed to account for some instructions which were
2111 both annulled and marked as from the target. This can happen as a
2112 result of optimize_skip. Since this code was redundant with
2113 fill_eager_delay_slots anyways, it was just deleted. */
2114
2115 if (slots_filled != slots_to_fill
2116 /* If this instruction could throw an exception which is
2117 caught in the same function, then it's not safe to fill
2118 the delay slot with an instruction from beyond this
2119 point. For example, consider:
2120
2121 int i = 2;
2122
2123 try {
2124 f();
2125 i = 3;
2126 } catch (...) {}
2127
2128 return i;
2129
2130 Even though `i' is a local variable, we must be sure not
2131 to put `i = 3' in the delay slot if `f' might throw an
2132 exception.
2133
2134 Presumably, we should also check to see if we could get
2135 back to this function via `setjmp'. */
2136 && ! can_throw_internal (insn)
2137 && !JUMP_P (insn))
2138 {
2139 int maybe_never = 0;
2140 rtx pat, trial_delay;
2141
2142 CLEAR_RESOURCE (&needed);
2143 CLEAR_RESOURCE (&set);
2144 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2145 mark_referenced_resources (insn, &needed, true);
2146
2147 if (CALL_P (insn))
2148 maybe_never = 1;
2149
2150 for (trial = next_nonnote_insn (insn); !stop_search_p (trial, 1);
2151 trial = next_trial)
2152 {
2153 next_trial = next_nonnote_insn (trial);
2154
2155 /* This must be an INSN or CALL_INSN. */
2156 pat = PATTERN (trial);
2157
2158 /* Stand-alone USE and CLOBBER are just for flow. */
2159 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER
2160 || GET_CODE (pat) == CLOBBER_HIGH)
2161 continue;
2162
2163 /* And DEBUG_INSNs do not go in delay slots. */
2164 if (GET_CODE (trial) == DEBUG_INSN)
2165 continue;
2166
2167 /* If this already has filled delay slots, get the insn needing
2168 the delay slots. */
2169 if (GET_CODE (pat) == SEQUENCE)
2170 trial_delay = XVECEXP (pat, 0, 0);
2171 else
2172 trial_delay = trial;
2173
2174 /* Stop our search when seeing a jump. */
2175 if (JUMP_P (trial_delay))
2176 break;
2177
2178 /* See if we have a resource problem before we try to split. */
2179 if (GET_CODE (pat) != SEQUENCE
2180 && ! insn_references_resource_p (trial, &set, true)
2181 && ! insn_sets_resource_p (trial, &set, true)
2182 && ! insn_sets_resource_p (trial, &needed, true)
2183 && (!HAVE_cc0 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat)))
2184 && ! (maybe_never && may_trap_or_fault_p (pat))
2185 && (trial = try_split (pat, trial, 0))
2186 && eligible_for_delay (insn, slots_filled, trial, flags)
2187 && ! can_throw_internal (trial))
2188 {
2189 next_trial = next_nonnote_insn (trial);
2190 add_to_delay_list (trial, &delay_list);
2191 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, pat))
2192 link_cc0_insns (trial);
2193
2194 delete_related_insns (trial);
2195 if (slots_to_fill == ++slots_filled)
2196 break;
2197 continue;
2198 }
2199
2200 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2201 mark_referenced_resources (trial, &needed, true);
2202
2203 /* Ensure we don't put insns between the setting of cc and the
2204 comparison by moving a setting of cc into an earlier delay
2205 slot since these insns could clobber the condition code. */
2206 set.cc = 1;
2207
2208 /* If this is a call, we might not get here. */
2209 if (CALL_P (trial_delay))
2210 maybe_never = 1;
2211 }
2212
2213 /* If there are slots left to fill and our search was stopped by an
2214 unconditional branch, try the insn at the branch target. We can
2215 redirect the branch if it works.
2216
2217 Don't do this if the insn at the branch target is a branch. */
2218 if (slots_to_fill != slots_filled
2219 && trial
2220 && jump_to_label_p (trial)
2221 && simplejump_p (trial)
2222 && (next_trial = next_active_insn (JUMP_LABEL_AS_INSN (trial))) != 0
2223 && ! (NONJUMP_INSN_P (next_trial)
2224 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2225 && !JUMP_P (next_trial)
2226 && ! insn_references_resource_p (next_trial, &set, true)
2227 && ! insn_sets_resource_p (next_trial, &set, true)
2228 && ! insn_sets_resource_p (next_trial, &needed, true)
2229 && (!HAVE_cc0 || ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial)))
2230 && ! (maybe_never && may_trap_or_fault_p (PATTERN (next_trial)))
2231 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2232 && eligible_for_delay (insn, slots_filled, next_trial, flags)
2233 && ! can_throw_internal (trial))
2234 {
2235 /* See comment in relax_delay_slots about necessity of using
2236 next_real_nondebug_insn here. */
2237 rtx_insn *new_label = next_real_nondebug_insn (next_trial);
2238
2239 if (new_label != 0)
2240 new_label = get_label_before (new_label, JUMP_LABEL (trial));
2241 else
2242 new_label = find_end_label (simple_return_rtx);
2243
2244 if (new_label)
2245 {
2246 add_to_delay_list (copy_delay_slot_insn (next_trial),
2247 &delay_list);
2248 slots_filled++;
2249 reorg_redirect_jump (as_a <rtx_jump_insn *> (trial),
2250 new_label);
2251 }
2252 }
2253 }
2254
2255 /* If this is an unconditional jump, then try to get insns from the
2256 target of the jump. */
2257 rtx_jump_insn *jump_insn;
2258 if ((jump_insn = dyn_cast <rtx_jump_insn *> (insn))
2259 && simplejump_p (jump_insn)
2260 && slots_filled != slots_to_fill)
2261 fill_slots_from_thread (jump_insn, const_true_rtx,
2262 next_active_insn (JUMP_LABEL_AS_INSN (insn)),
2263 NULL, 1, 1, own_thread_p (JUMP_LABEL (insn),
2264 JUMP_LABEL (insn), 0),
2265 slots_to_fill, &slots_filled, &delay_list);
2266
2267 if (!delay_list.is_empty ())
2268 unfilled_slots_base[i]
2269 = emit_delay_sequence (insn, delay_list, slots_filled);
2270
2271 if (slots_to_fill == slots_filled)
2272 unfilled_slots_base[i] = 0;
2273
2274 note_delay_statistics (slots_filled, 0);
2275 }
2276 }
2277 \f
2278 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2279 return the ultimate label reached by any such chain of jumps.
2280 Return a suitable return rtx if the chain ultimately leads to a
2281 return instruction.
2282 If LABEL is not followed by a jump, return LABEL.
2283 If the chain loops or we can't find end, return LABEL,
2284 since that tells caller to avoid changing the insn.
2285 If the returned label is obtained by following a crossing jump,
2286 set *CROSSING to true, otherwise set it to false. */
2287
2288 static rtx
2289 follow_jumps (rtx label, rtx_insn *jump, bool *crossing)
2290 {
2291 rtx_insn *insn;
2292 rtx_insn *next;
2293 int depth;
2294
2295 *crossing = false;
2296 if (ANY_RETURN_P (label))
2297 return label;
2298
2299 rtx_insn *value = as_a <rtx_insn *> (label);
2300
2301 for (depth = 0;
2302 (depth < 10
2303 && (insn = next_active_insn (value)) != 0
2304 && JUMP_P (insn)
2305 && JUMP_LABEL (insn) != NULL_RTX
2306 && ((any_uncondjump_p (insn) && onlyjump_p (insn))
2307 || ANY_RETURN_P (PATTERN (insn)))
2308 && (next = NEXT_INSN (insn))
2309 && BARRIER_P (next));
2310 depth++)
2311 {
2312 rtx this_label_or_return = JUMP_LABEL (insn);
2313
2314 /* If we have found a cycle, make the insn jump to itself. */
2315 if (this_label_or_return == label)
2316 return label;
2317
2318 /* Cannot follow returns and cannot look through tablejumps. */
2319 if (ANY_RETURN_P (this_label_or_return))
2320 return this_label_or_return;
2321
2322 rtx_insn *this_label = as_a <rtx_insn *> (this_label_or_return);
2323 if (NEXT_INSN (this_label)
2324 && JUMP_TABLE_DATA_P (NEXT_INSN (this_label)))
2325 break;
2326
2327 if (!targetm.can_follow_jump (jump, insn))
2328 break;
2329 if (!*crossing)
2330 *crossing = CROSSING_JUMP_P (jump);
2331 value = this_label;
2332 }
2333 if (depth == 10)
2334 return label;
2335 return value;
2336 }
2337
2338 /* Try to find insns to place in delay slots.
2339
2340 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2341 or is an unconditional branch if CONDITION is const_true_rtx.
2342 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2343
2344 THREAD is a flow-of-control, either the insns to be executed if the
2345 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2346
2347 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2348 to see if any potential delay slot insns set things needed there.
2349
2350 LIKELY is nonzero if it is extremely likely that the branch will be
2351 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2352 end of a loop back up to the top.
2353
2354 OWN_THREAD is true if we are the only user of the thread, i.e. it is
2355 the target of the jump when we are the only jump going there.
2356
2357 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2358 case, we can only take insns from the head of the thread for our delay
2359 slot. We then adjust the jump to point after the insns we have taken. */
2360
2361 static void
2362 fill_slots_from_thread (rtx_jump_insn *insn, rtx condition,
2363 rtx thread_or_return, rtx opposite_thread, int likely,
2364 int thread_if_true, int own_thread, int slots_to_fill,
2365 int *pslots_filled, vec<rtx_insn *> *delay_list)
2366 {
2367 rtx new_thread;
2368 struct resources opposite_needed, set, needed;
2369 rtx_insn *trial;
2370 int lose = 0;
2371 int must_annul = 0;
2372 int flags;
2373
2374 /* Validate our arguments. */
2375 gcc_assert (condition != const_true_rtx || thread_if_true);
2376 gcc_assert (own_thread || thread_if_true);
2377
2378 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2379
2380 /* If our thread is the end of subroutine, we can't get any delay
2381 insns from that. */
2382 if (thread_or_return == NULL_RTX || ANY_RETURN_P (thread_or_return))
2383 return;
2384
2385 rtx_insn *thread = as_a <rtx_insn *> (thread_or_return);
2386
2387 /* If this is an unconditional branch, nothing is needed at the
2388 opposite thread. Otherwise, compute what is needed there. */
2389 if (condition == const_true_rtx)
2390 CLEAR_RESOURCE (&opposite_needed);
2391 else
2392 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2393
2394 /* If the insn at THREAD can be split, do it here to avoid having to
2395 update THREAD and NEW_THREAD if it is done in the loop below. Also
2396 initialize NEW_THREAD. */
2397
2398 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2399
2400 /* Scan insns at THREAD. We are looking for an insn that can be removed
2401 from THREAD (it neither sets nor references resources that were set
2402 ahead of it and it doesn't set anything needs by the insns ahead of
2403 it) and that either can be placed in an annulling insn or aren't
2404 needed at OPPOSITE_THREAD. */
2405
2406 CLEAR_RESOURCE (&needed);
2407 CLEAR_RESOURCE (&set);
2408
2409 /* If we do not own this thread, we must stop as soon as we find
2410 something that we can't put in a delay slot, since all we can do
2411 is branch into THREAD at a later point. Therefore, labels stop
2412 the search if this is not the `true' thread. */
2413
2414 for (trial = thread;
2415 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2416 trial = next_nonnote_insn (trial))
2417 {
2418 rtx pat, old_trial;
2419
2420 /* If we have passed a label, we no longer own this thread. */
2421 if (LABEL_P (trial))
2422 {
2423 own_thread = 0;
2424 continue;
2425 }
2426
2427 pat = PATTERN (trial);
2428 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER
2429 || GET_CODE (pat) == CLOBBER_HIGH)
2430 continue;
2431
2432 if (GET_CODE (trial) == DEBUG_INSN)
2433 continue;
2434
2435 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2436 don't separate or copy insns that set and use CC0. */
2437 if (! insn_references_resource_p (trial, &set, true)
2438 && ! insn_sets_resource_p (trial, &set, true)
2439 && ! insn_sets_resource_p (trial, &needed, true)
2440 && (!HAVE_cc0 || (! (reg_mentioned_p (cc0_rtx, pat)
2441 && (! own_thread || ! sets_cc0_p (pat)))))
2442 && ! can_throw_internal (trial))
2443 {
2444 rtx_insn *prior_insn;
2445
2446 /* If TRIAL is redundant with some insn before INSN, we don't
2447 actually need to add it to the delay list; we can merely pretend
2448 we did. */
2449 if ((prior_insn = redundant_insn (trial, insn, *delay_list)))
2450 {
2451 fix_reg_dead_note (prior_insn, insn);
2452 if (own_thread)
2453 {
2454 update_block (trial, thread);
2455 if (trial == thread)
2456 {
2457 thread = next_active_insn (thread);
2458 if (new_thread == trial)
2459 new_thread = thread;
2460 }
2461
2462 delete_related_insns (trial);
2463 }
2464 else
2465 {
2466 update_reg_unused_notes (prior_insn, trial);
2467 new_thread = next_active_insn (trial);
2468 }
2469
2470 continue;
2471 }
2472
2473 /* There are two ways we can win: If TRIAL doesn't set anything
2474 needed at the opposite thread and can't trap, or if it can
2475 go into an annulled delay slot. But we want neither to copy
2476 nor to speculate frame-related insns. */
2477 if (!must_annul
2478 && ((condition == const_true_rtx
2479 && (own_thread || !RTX_FRAME_RELATED_P (trial)))
2480 || (! insn_sets_resource_p (trial, &opposite_needed, true)
2481 && ! may_trap_or_fault_p (pat)
2482 && ! RTX_FRAME_RELATED_P (trial))))
2483 {
2484 old_trial = trial;
2485 trial = try_split (pat, trial, 0);
2486 if (new_thread == old_trial)
2487 new_thread = trial;
2488 if (thread == old_trial)
2489 thread = trial;
2490 pat = PATTERN (trial);
2491 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2492 goto winner;
2493 }
2494 else if (!RTX_FRAME_RELATED_P (trial)
2495 && ((ANNUL_IFTRUE_SLOTS && ! thread_if_true)
2496 || (ANNUL_IFFALSE_SLOTS && thread_if_true)))
2497 {
2498 old_trial = trial;
2499 trial = try_split (pat, trial, 0);
2500 if (new_thread == old_trial)
2501 new_thread = trial;
2502 if (thread == old_trial)
2503 thread = trial;
2504 pat = PATTERN (trial);
2505 if ((must_annul || delay_list->is_empty ()) && (thread_if_true
2506 ? check_annul_list_true_false (0, *delay_list)
2507 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2508 : check_annul_list_true_false (1, *delay_list)
2509 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2510 {
2511 rtx_insn *temp;
2512
2513 must_annul = 1;
2514 winner:
2515
2516 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, pat))
2517 link_cc0_insns (trial);
2518
2519 /* If we own this thread, delete the insn. If this is the
2520 destination of a branch, show that a basic block status
2521 may have been updated. In any case, mark the new
2522 starting point of this thread. */
2523 if (own_thread)
2524 {
2525 rtx note;
2526
2527 update_block (trial, thread);
2528 if (trial == thread)
2529 {
2530 thread = next_active_insn (thread);
2531 if (new_thread == trial)
2532 new_thread = thread;
2533 }
2534
2535 /* We are moving this insn, not deleting it. We must
2536 temporarily increment the use count on any referenced
2537 label lest it be deleted by delete_related_insns. */
2538 for (note = REG_NOTES (trial);
2539 note != NULL_RTX;
2540 note = XEXP (note, 1))
2541 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2542 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2543 {
2544 /* REG_LABEL_OPERAND could be
2545 NOTE_INSN_DELETED_LABEL too. */
2546 if (LABEL_P (XEXP (note, 0)))
2547 LABEL_NUSES (XEXP (note, 0))++;
2548 else
2549 gcc_assert (REG_NOTE_KIND (note)
2550 == REG_LABEL_OPERAND);
2551 }
2552 if (jump_to_label_p (trial))
2553 LABEL_NUSES (JUMP_LABEL (trial))++;
2554
2555 delete_related_insns (trial);
2556
2557 for (note = REG_NOTES (trial);
2558 note != NULL_RTX;
2559 note = XEXP (note, 1))
2560 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2561 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2562 {
2563 /* REG_LABEL_OPERAND could be
2564 NOTE_INSN_DELETED_LABEL too. */
2565 if (LABEL_P (XEXP (note, 0)))
2566 LABEL_NUSES (XEXP (note, 0))--;
2567 else
2568 gcc_assert (REG_NOTE_KIND (note)
2569 == REG_LABEL_OPERAND);
2570 }
2571 if (jump_to_label_p (trial))
2572 LABEL_NUSES (JUMP_LABEL (trial))--;
2573 }
2574 else
2575 new_thread = next_active_insn (trial);
2576
2577 temp = own_thread ? trial : copy_delay_slot_insn (trial);
2578 if (thread_if_true)
2579 INSN_FROM_TARGET_P (temp) = 1;
2580
2581 add_to_delay_list (temp, delay_list);
2582
2583 if (slots_to_fill == ++(*pslots_filled))
2584 {
2585 /* Even though we have filled all the slots, we
2586 may be branching to a location that has a
2587 redundant insn. Skip any if so. */
2588 while (new_thread && ! own_thread
2589 && ! insn_sets_resource_p (new_thread, &set, true)
2590 && ! insn_sets_resource_p (new_thread, &needed,
2591 true)
2592 && ! insn_references_resource_p (new_thread,
2593 &set, true)
2594 && (prior_insn
2595 = redundant_insn (new_thread, insn,
2596 *delay_list)))
2597 {
2598 /* We know we do not own the thread, so no need
2599 to call update_block and delete_insn. */
2600 fix_reg_dead_note (prior_insn, insn);
2601 update_reg_unused_notes (prior_insn, new_thread);
2602 new_thread
2603 = next_active_insn (as_a<rtx_insn *> (new_thread));
2604 }
2605 break;
2606 }
2607
2608 continue;
2609 }
2610 }
2611 }
2612
2613 /* This insn can't go into a delay slot. */
2614 lose = 1;
2615 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2616 mark_referenced_resources (trial, &needed, true);
2617
2618 /* Ensure we don't put insns between the setting of cc and the comparison
2619 by moving a setting of cc into an earlier delay slot since these insns
2620 could clobber the condition code. */
2621 set.cc = 1;
2622
2623 /* If this insn is a register-register copy and the next insn has
2624 a use of our destination, change it to use our source. That way,
2625 it will become a candidate for our delay slot the next time
2626 through this loop. This case occurs commonly in loops that
2627 scan a list.
2628
2629 We could check for more complex cases than those tested below,
2630 but it doesn't seem worth it. It might also be a good idea to try
2631 to swap the two insns. That might do better.
2632
2633 We can't do this if the next insn modifies our destination, because
2634 that would make the replacement into the insn invalid. We also can't
2635 do this if it modifies our source, because it might be an earlyclobber
2636 operand. This latter test also prevents updating the contents of
2637 a PRE_INC. We also can't do this if there's overlap of source and
2638 destination. Overlap may happen for larger-than-register-size modes. */
2639
2640 if (NONJUMP_INSN_P (trial) && GET_CODE (pat) == SET
2641 && REG_P (SET_SRC (pat))
2642 && REG_P (SET_DEST (pat))
2643 && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat)))
2644 {
2645 rtx_insn *next = next_nonnote_insn (trial);
2646
2647 if (next && NONJUMP_INSN_P (next)
2648 && GET_CODE (PATTERN (next)) != USE
2649 && ! reg_set_p (SET_DEST (pat), next)
2650 && ! reg_set_p (SET_SRC (pat), next)
2651 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2652 && ! modified_in_p (SET_DEST (pat), next))
2653 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2654 }
2655 }
2656
2657 /* If we stopped on a branch insn that has delay slots, see if we can
2658 steal some of the insns in those slots. */
2659 if (trial && NONJUMP_INSN_P (trial)
2660 && GET_CODE (PATTERN (trial)) == SEQUENCE
2661 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0)))
2662 {
2663 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (trial));
2664 /* If this is the `true' thread, we will want to follow the jump,
2665 so we can only do this if we have taken everything up to here. */
2666 if (thread_if_true && trial == new_thread)
2667 {
2668 steal_delay_list_from_target (insn, condition, sequence,
2669 delay_list, &set, &needed,
2670 &opposite_needed, slots_to_fill,
2671 pslots_filled, &must_annul,
2672 &new_thread);
2673 /* If we owned the thread and are told that it branched
2674 elsewhere, make sure we own the thread at the new location. */
2675 if (own_thread && trial != new_thread)
2676 own_thread = own_thread_p (new_thread, new_thread, 0);
2677 }
2678 else if (! thread_if_true)
2679 steal_delay_list_from_fallthrough (insn, condition, sequence,
2680 delay_list, &set, &needed,
2681 &opposite_needed, slots_to_fill,
2682 pslots_filled, &must_annul);
2683 }
2684
2685 /* If we haven't found anything for this delay slot and it is very
2686 likely that the branch will be taken, see if the insn at our target
2687 increments or decrements a register with an increment that does not
2688 depend on the destination register. If so, try to place the opposite
2689 arithmetic insn after the jump insn and put the arithmetic insn in the
2690 delay slot. If we can't do this, return. */
2691 if (delay_list->is_empty () && likely
2692 && new_thread && !ANY_RETURN_P (new_thread)
2693 && NONJUMP_INSN_P (new_thread)
2694 && !RTX_FRAME_RELATED_P (new_thread)
2695 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2696 && asm_noperands (PATTERN (new_thread)) < 0)
2697 {
2698 rtx pat = PATTERN (new_thread);
2699 rtx dest;
2700 rtx src;
2701
2702 /* We know "new_thread" is an insn due to NONJUMP_INSN_P (new_thread)
2703 above. */
2704 trial = as_a <rtx_insn *> (new_thread);
2705 pat = PATTERN (trial);
2706
2707 if (!NONJUMP_INSN_P (trial)
2708 || GET_CODE (pat) != SET
2709 || ! eligible_for_delay (insn, 0, trial, flags)
2710 || can_throw_internal (trial))
2711 return;
2712
2713 dest = SET_DEST (pat), src = SET_SRC (pat);
2714 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2715 && rtx_equal_p (XEXP (src, 0), dest)
2716 && (!FLOAT_MODE_P (GET_MODE (src))
2717 || flag_unsafe_math_optimizations)
2718 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1))
2719 && ! side_effects_p (pat))
2720 {
2721 rtx other = XEXP (src, 1);
2722 rtx new_arith;
2723 rtx_insn *ninsn;
2724
2725 /* If this is a constant adjustment, use the same code with
2726 the negated constant. Otherwise, reverse the sense of the
2727 arithmetic. */
2728 if (CONST_INT_P (other))
2729 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2730 negate_rtx (GET_MODE (src), other));
2731 else
2732 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2733 GET_MODE (src), dest, other);
2734
2735 ninsn = emit_insn_after (gen_rtx_SET (dest, new_arith), insn);
2736
2737 if (recog_memoized (ninsn) < 0
2738 || (extract_insn (ninsn),
2739 !constrain_operands (1, get_preferred_alternatives (ninsn))))
2740 {
2741 delete_related_insns (ninsn);
2742 return;
2743 }
2744
2745 if (own_thread)
2746 {
2747 update_block (trial, thread);
2748 if (trial == thread)
2749 {
2750 thread = next_active_insn (thread);
2751 if (new_thread == trial)
2752 new_thread = thread;
2753 }
2754 delete_related_insns (trial);
2755 }
2756 else
2757 new_thread = next_active_insn (trial);
2758
2759 ninsn = own_thread ? trial : copy_delay_slot_insn (trial);
2760 if (thread_if_true)
2761 INSN_FROM_TARGET_P (ninsn) = 1;
2762
2763 add_to_delay_list (ninsn, delay_list);
2764 (*pslots_filled)++;
2765 }
2766 }
2767
2768 if (!delay_list->is_empty () && must_annul)
2769 INSN_ANNULLED_BRANCH_P (insn) = 1;
2770
2771 /* If we are to branch into the middle of this thread, find an appropriate
2772 label or make a new one if none, and redirect INSN to it. If we hit the
2773 end of the function, use the end-of-function label. */
2774 if (new_thread != thread)
2775 {
2776 rtx label;
2777 bool crossing = false;
2778
2779 gcc_assert (thread_if_true);
2780
2781 if (new_thread && simplejump_or_return_p (new_thread)
2782 && redirect_with_delay_list_safe_p (insn,
2783 JUMP_LABEL (new_thread),
2784 *delay_list))
2785 new_thread = follow_jumps (JUMP_LABEL (new_thread), insn,
2786 &crossing);
2787
2788 if (ANY_RETURN_P (new_thread))
2789 label = find_end_label (new_thread);
2790 else if (LABEL_P (new_thread))
2791 label = new_thread;
2792 else
2793 label = get_label_before (as_a <rtx_insn *> (new_thread),
2794 JUMP_LABEL (insn));
2795
2796 if (label)
2797 {
2798 reorg_redirect_jump (insn, label);
2799 if (crossing)
2800 CROSSING_JUMP_P (insn) = 1;
2801 }
2802 }
2803 }
2804 \f
2805 /* Make another attempt to find insns to place in delay slots.
2806
2807 We previously looked for insns located in front of the delay insn
2808 and, for non-jump delay insns, located behind the delay insn.
2809
2810 Here only try to schedule jump insns and try to move insns from either
2811 the target or the following insns into the delay slot. If annulling is
2812 supported, we will be likely to do this. Otherwise, we can do this only
2813 if safe. */
2814
2815 static void
2816 fill_eager_delay_slots (void)
2817 {
2818 rtx_insn *insn;
2819 int i;
2820 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2821
2822 for (i = 0; i < num_unfilled_slots; i++)
2823 {
2824 rtx condition;
2825 rtx target_label, insn_at_target;
2826 rtx_insn *fallthrough_insn;
2827 auto_vec<rtx_insn *, 5> delay_list;
2828 rtx_jump_insn *jump_insn;
2829 int own_target;
2830 int own_fallthrough;
2831 int prediction, slots_to_fill, slots_filled;
2832
2833 insn = unfilled_slots_base[i];
2834 if (insn == 0
2835 || insn->deleted ()
2836 || ! (jump_insn = dyn_cast <rtx_jump_insn *> (insn))
2837 || ! (condjump_p (jump_insn) || condjump_in_parallel_p (jump_insn)))
2838 continue;
2839
2840 slots_to_fill = num_delay_slots (jump_insn);
2841 /* Some machine description have defined instructions to have
2842 delay slots only in certain circumstances which may depend on
2843 nearby insns (which change due to reorg's actions).
2844
2845 For example, the PA port normally has delay slots for unconditional
2846 jumps.
2847
2848 However, the PA port claims such jumps do not have a delay slot
2849 if they are immediate successors of certain CALL_INSNs. This
2850 allows the port to favor filling the delay slot of the call with
2851 the unconditional jump. */
2852 if (slots_to_fill == 0)
2853 continue;
2854
2855 slots_filled = 0;
2856 target_label = JUMP_LABEL (jump_insn);
2857 condition = get_branch_condition (jump_insn, target_label);
2858
2859 if (condition == 0)
2860 continue;
2861
2862 /* Get the next active fallthrough and target insns and see if we own
2863 them. Then see whether the branch is likely true. We don't need
2864 to do a lot of this for unconditional branches. */
2865
2866 insn_at_target = first_active_target_insn (target_label);
2867 own_target = own_thread_p (target_label, target_label, 0);
2868
2869 if (condition == const_true_rtx)
2870 {
2871 own_fallthrough = 0;
2872 fallthrough_insn = 0;
2873 prediction = 2;
2874 }
2875 else
2876 {
2877 fallthrough_insn = next_active_insn (jump_insn);
2878 own_fallthrough = own_thread_p (NEXT_INSN (jump_insn), NULL_RTX, 1);
2879 prediction = mostly_true_jump (jump_insn);
2880 }
2881
2882 /* If this insn is expected to branch, first try to get insns from our
2883 target, then our fallthrough insns. If it is not expected to branch,
2884 try the other order. */
2885
2886 if (prediction > 0)
2887 {
2888 fill_slots_from_thread (jump_insn, condition, insn_at_target,
2889 fallthrough_insn, prediction == 2, 1,
2890 own_target,
2891 slots_to_fill, &slots_filled, &delay_list);
2892
2893 if (delay_list.is_empty () && own_fallthrough)
2894 {
2895 /* Even though we didn't find anything for delay slots,
2896 we might have found a redundant insn which we deleted
2897 from the thread that was filled. So we have to recompute
2898 the next insn at the target. */
2899 target_label = JUMP_LABEL (jump_insn);
2900 insn_at_target = first_active_target_insn (target_label);
2901
2902 fill_slots_from_thread (jump_insn, condition, fallthrough_insn,
2903 insn_at_target, 0, 0, own_fallthrough,
2904 slots_to_fill, &slots_filled,
2905 &delay_list);
2906 }
2907 }
2908 else
2909 {
2910 if (own_fallthrough)
2911 fill_slots_from_thread (jump_insn, condition, fallthrough_insn,
2912 insn_at_target, 0, 0, own_fallthrough,
2913 slots_to_fill, &slots_filled, &delay_list);
2914
2915 if (delay_list.is_empty ())
2916 fill_slots_from_thread (jump_insn, condition, insn_at_target,
2917 next_active_insn (insn), 0, 1, own_target,
2918 slots_to_fill, &slots_filled, &delay_list);
2919 }
2920
2921 if (!delay_list.is_empty ())
2922 unfilled_slots_base[i]
2923 = emit_delay_sequence (jump_insn, delay_list, slots_filled);
2924
2925 if (slots_to_fill == slots_filled)
2926 unfilled_slots_base[i] = 0;
2927
2928 note_delay_statistics (slots_filled, 1);
2929 }
2930 }
2931 \f
2932 static void delete_computation (rtx_insn *insn);
2933
2934 /* Recursively delete prior insns that compute the value (used only by INSN
2935 which the caller is deleting) stored in the register mentioned by NOTE
2936 which is a REG_DEAD note associated with INSN. */
2937
2938 static void
2939 delete_prior_computation (rtx note, rtx_insn *insn)
2940 {
2941 rtx_insn *our_prev;
2942 rtx reg = XEXP (note, 0);
2943
2944 for (our_prev = prev_nonnote_insn (insn);
2945 our_prev && (NONJUMP_INSN_P (our_prev)
2946 || CALL_P (our_prev));
2947 our_prev = prev_nonnote_insn (our_prev))
2948 {
2949 rtx pat = PATTERN (our_prev);
2950
2951 /* If we reach a CALL which is not calling a const function
2952 or the callee pops the arguments, then give up. */
2953 if (CALL_P (our_prev)
2954 && (! RTL_CONST_CALL_P (our_prev)
2955 || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL))
2956 break;
2957
2958 /* If we reach a SEQUENCE, it is too complex to try to
2959 do anything with it, so give up. We can be run during
2960 and after reorg, so SEQUENCE rtl can legitimately show
2961 up here. */
2962 if (GET_CODE (pat) == SEQUENCE)
2963 break;
2964
2965 if (GET_CODE (pat) == USE
2966 && NONJUMP_INSN_P (XEXP (pat, 0)))
2967 /* reorg creates USEs that look like this. We leave them
2968 alone because reorg needs them for its own purposes. */
2969 break;
2970
2971 if (reg_set_p (reg, pat))
2972 {
2973 if (side_effects_p (pat) && !CALL_P (our_prev))
2974 break;
2975
2976 if (GET_CODE (pat) == PARALLEL)
2977 {
2978 /* If we find a SET of something else, we can't
2979 delete the insn. */
2980
2981 int i;
2982
2983 for (i = 0; i < XVECLEN (pat, 0); i++)
2984 {
2985 rtx part = XVECEXP (pat, 0, i);
2986
2987 if (GET_CODE (part) == SET
2988 && SET_DEST (part) != reg)
2989 break;
2990 }
2991
2992 if (i == XVECLEN (pat, 0))
2993 delete_computation (our_prev);
2994 }
2995 else if (GET_CODE (pat) == SET
2996 && REG_P (SET_DEST (pat)))
2997 {
2998 int dest_regno = REGNO (SET_DEST (pat));
2999 int dest_endregno = END_REGNO (SET_DEST (pat));
3000 int regno = REGNO (reg);
3001 int endregno = END_REGNO (reg);
3002
3003 if (dest_regno >= regno
3004 && dest_endregno <= endregno)
3005 delete_computation (our_prev);
3006
3007 /* We may have a multi-word hard register and some, but not
3008 all, of the words of the register are needed in subsequent
3009 insns. Write REG_UNUSED notes for those parts that were not
3010 needed. */
3011 else if (dest_regno <= regno
3012 && dest_endregno >= endregno)
3013 {
3014 int i;
3015
3016 add_reg_note (our_prev, REG_UNUSED, reg);
3017
3018 for (i = dest_regno; i < dest_endregno; i++)
3019 if (! find_regno_note (our_prev, REG_UNUSED, i))
3020 break;
3021
3022 if (i == dest_endregno)
3023 delete_computation (our_prev);
3024 }
3025 }
3026
3027 break;
3028 }
3029
3030 /* If PAT references the register that dies here, it is an
3031 additional use. Hence any prior SET isn't dead. However, this
3032 insn becomes the new place for the REG_DEAD note. */
3033 if (reg_overlap_mentioned_p (reg, pat))
3034 {
3035 XEXP (note, 1) = REG_NOTES (our_prev);
3036 REG_NOTES (our_prev) = note;
3037 break;
3038 }
3039 }
3040 }
3041
3042 /* Delete INSN and recursively delete insns that compute values used only
3043 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3044
3045 Look at all our REG_DEAD notes. If a previous insn does nothing other
3046 than set a register that dies in this insn, we can delete that insn
3047 as well.
3048
3049 On machines with CC0, if CC0 is used in this insn, we may be able to
3050 delete the insn that set it. */
3051
3052 static void
3053 delete_computation (rtx_insn *insn)
3054 {
3055 rtx note, next;
3056
3057 if (HAVE_cc0 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
3058 {
3059 rtx_insn *prev = prev_nonnote_insn (insn);
3060 /* We assume that at this stage
3061 CC's are always set explicitly
3062 and always immediately before the jump that
3063 will use them. So if the previous insn
3064 exists to set the CC's, delete it
3065 (unless it performs auto-increments, etc.). */
3066 if (prev && NONJUMP_INSN_P (prev)
3067 && sets_cc0_p (PATTERN (prev)))
3068 {
3069 if (sets_cc0_p (PATTERN (prev)) > 0
3070 && ! side_effects_p (PATTERN (prev)))
3071 delete_computation (prev);
3072 else
3073 /* Otherwise, show that cc0 won't be used. */
3074 add_reg_note (prev, REG_UNUSED, cc0_rtx);
3075 }
3076 }
3077
3078 for (note = REG_NOTES (insn); note; note = next)
3079 {
3080 next = XEXP (note, 1);
3081
3082 if (REG_NOTE_KIND (note) != REG_DEAD
3083 /* Verify that the REG_NOTE is legitimate. */
3084 || !REG_P (XEXP (note, 0)))
3085 continue;
3086
3087 delete_prior_computation (note, insn);
3088 }
3089
3090 delete_related_insns (insn);
3091 }
3092
3093 /* If all INSN does is set the pc, delete it,
3094 and delete the insn that set the condition codes for it
3095 if that's what the previous thing was. */
3096
3097 static void
3098 delete_jump (rtx_insn *insn)
3099 {
3100 rtx set = single_set (insn);
3101
3102 if (set && GET_CODE (SET_DEST (set)) == PC)
3103 delete_computation (insn);
3104 }
3105
3106 static rtx_insn *
3107 label_before_next_insn (rtx_insn *x, rtx scan_limit)
3108 {
3109 rtx_insn *insn = next_active_insn (x);
3110 while (insn)
3111 {
3112 insn = PREV_INSN (insn);
3113 if (insn == scan_limit || insn == NULL_RTX)
3114 return NULL;
3115 if (LABEL_P (insn))
3116 break;
3117 }
3118 return insn;
3119 }
3120
3121 /* Return TRUE if there is a NOTE_INSN_SWITCH_TEXT_SECTIONS note in between
3122 BEG and END. */
3123
3124 static bool
3125 switch_text_sections_between_p (const rtx_insn *beg, const rtx_insn *end)
3126 {
3127 const rtx_insn *p;
3128 for (p = beg; p != end; p = NEXT_INSN (p))
3129 if (NOTE_P (p) && NOTE_KIND (p) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
3130 return true;
3131 return false;
3132 }
3133
3134 \f
3135 /* Once we have tried two ways to fill a delay slot, make a pass over the
3136 code to try to improve the results and to do such things as more jump
3137 threading. */
3138
3139 static void
3140 relax_delay_slots (rtx_insn *first)
3141 {
3142 rtx_insn *insn, *next;
3143 rtx_sequence *pat;
3144 rtx_insn *delay_insn;
3145 rtx target_label;
3146
3147 /* Look at every JUMP_INSN and see if we can improve it. */
3148 for (insn = first; insn; insn = next)
3149 {
3150 rtx_insn *other, *prior_insn;
3151 bool crossing;
3152
3153 next = next_active_insn (insn);
3154
3155 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3156 the next insn, or jumps to a label that is not the last of a
3157 group of consecutive labels. */
3158 if (is_a <rtx_jump_insn *> (insn)
3159 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3160 && !ANY_RETURN_P (target_label = JUMP_LABEL (insn)))
3161 {
3162 rtx_jump_insn *jump_insn = as_a <rtx_jump_insn *> (insn);
3163 target_label
3164 = skip_consecutive_labels (follow_jumps (target_label, jump_insn,
3165 &crossing));
3166 if (ANY_RETURN_P (target_label))
3167 target_label = find_end_label (target_label);
3168
3169 if (target_label
3170 && next_active_insn (as_a<rtx_insn *> (target_label)) == next
3171 && ! condjump_in_parallel_p (jump_insn)
3172 && ! (next && switch_text_sections_between_p (jump_insn, next)))
3173 {
3174 delete_jump (jump_insn);
3175 continue;
3176 }
3177
3178 if (target_label && target_label != JUMP_LABEL (jump_insn))
3179 {
3180 reorg_redirect_jump (jump_insn, target_label);
3181 if (crossing)
3182 CROSSING_JUMP_P (jump_insn) = 1;
3183 }
3184
3185 /* See if this jump conditionally branches around an unconditional
3186 jump. If so, invert this jump and point it to the target of the
3187 second jump. Check if it's possible on the target. */
3188 if (next && simplejump_or_return_p (next)
3189 && any_condjump_p (jump_insn)
3190 && target_label
3191 && (next_active_insn (as_a<rtx_insn *> (target_label))
3192 == next_active_insn (next))
3193 && no_labels_between_p (jump_insn, next)
3194 && targetm.can_follow_jump (jump_insn, next))
3195 {
3196 rtx label = JUMP_LABEL (next);
3197
3198 /* Be careful how we do this to avoid deleting code or
3199 labels that are momentarily dead. See similar optimization
3200 in jump.c.
3201
3202 We also need to ensure we properly handle the case when
3203 invert_jump fails. */
3204
3205 ++LABEL_NUSES (target_label);
3206 if (!ANY_RETURN_P (label))
3207 ++LABEL_NUSES (label);
3208
3209 if (invert_jump (jump_insn, label, 1))
3210 {
3211 delete_related_insns (next);
3212 next = jump_insn;
3213 }
3214
3215 if (!ANY_RETURN_P (label))
3216 --LABEL_NUSES (label);
3217
3218 if (--LABEL_NUSES (target_label) == 0)
3219 delete_related_insns (target_label);
3220
3221 continue;
3222 }
3223 }
3224
3225 /* If this is an unconditional jump and the previous insn is a
3226 conditional jump, try reversing the condition of the previous
3227 insn and swapping our targets. The next pass might be able to
3228 fill the slots.
3229
3230 Don't do this if we expect the conditional branch to be true, because
3231 we would then be making the more common case longer. */
3232
3233 if (simplejump_or_return_p (insn)
3234 && (other = prev_active_insn (insn)) != 0
3235 && any_condjump_p (other)
3236 && no_labels_between_p (other, insn)
3237 && mostly_true_jump (other) < 0)
3238 {
3239 rtx other_target = JUMP_LABEL (other);
3240 target_label = JUMP_LABEL (insn);
3241
3242 if (invert_jump (as_a <rtx_jump_insn *> (other), target_label, 0))
3243 reorg_redirect_jump (as_a <rtx_jump_insn *> (insn), other_target);
3244 }
3245
3246 /* Now look only at cases where we have a filled delay slot. */
3247 if (!NONJUMP_INSN_P (insn) || GET_CODE (PATTERN (insn)) != SEQUENCE)
3248 continue;
3249
3250 pat = as_a <rtx_sequence *> (PATTERN (insn));
3251 delay_insn = pat->insn (0);
3252
3253 /* See if the first insn in the delay slot is redundant with some
3254 previous insn. Remove it from the delay slot if so; then set up
3255 to reprocess this insn. */
3256 if ((prior_insn = redundant_insn (pat->insn (1), delay_insn, vNULL)))
3257 {
3258 fix_reg_dead_note (prior_insn, insn);
3259 update_block (pat->insn (1), insn);
3260 delete_from_delay_slot (pat->insn (1));
3261 next = prev_active_insn (next);
3262 continue;
3263 }
3264
3265 /* See if we have a RETURN insn with a filled delay slot followed
3266 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3267 the first RETURN (but not its delay insn). This gives the same
3268 effect in fewer instructions.
3269
3270 Only do so if optimizing for size since this results in slower, but
3271 smaller code. */
3272 if (optimize_function_for_size_p (cfun)
3273 && ANY_RETURN_P (PATTERN (delay_insn))
3274 && next
3275 && JUMP_P (next)
3276 && PATTERN (next) == PATTERN (delay_insn))
3277 {
3278 rtx_insn *after;
3279 int i;
3280
3281 /* Delete the RETURN and just execute the delay list insns.
3282
3283 We do this by deleting the INSN containing the SEQUENCE, then
3284 re-emitting the insns separately, and then deleting the RETURN.
3285 This allows the count of the jump target to be properly
3286 decremented.
3287
3288 Note that we need to change the INSN_UID of the re-emitted insns
3289 since it is used to hash the insns for mark_target_live_regs and
3290 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3291
3292 Clear the from target bit, since these insns are no longer
3293 in delay slots. */
3294 for (i = 0; i < XVECLEN (pat, 0); i++)
3295 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3296
3297 rtx_insn *prev = PREV_INSN (insn);
3298 delete_related_insns (insn);
3299 gcc_assert (GET_CODE (pat) == SEQUENCE);
3300 add_insn_after (delay_insn, prev, NULL);
3301 after = delay_insn;
3302 for (i = 1; i < pat->len (); i++)
3303 after = emit_copy_of_insn_after (pat->insn (i), after);
3304 delete_scheduled_jump (delay_insn);
3305 continue;
3306 }
3307
3308 /* Now look only at the cases where we have a filled JUMP_INSN. */
3309 rtx_jump_insn *delay_jump_insn =
3310 dyn_cast <rtx_jump_insn *> (delay_insn);
3311 if (! delay_jump_insn || !(condjump_p (delay_jump_insn)
3312 || condjump_in_parallel_p (delay_jump_insn)))
3313 continue;
3314
3315 target_label = JUMP_LABEL (delay_jump_insn);
3316 if (target_label && ANY_RETURN_P (target_label))
3317 continue;
3318
3319 /* If this jump goes to another unconditional jump, thread it, but
3320 don't convert a jump into a RETURN here. */
3321 rtx trial = skip_consecutive_labels (follow_jumps (target_label,
3322 delay_jump_insn,
3323 &crossing));
3324 if (ANY_RETURN_P (trial))
3325 trial = find_end_label (trial);
3326
3327 if (trial && trial != target_label
3328 && redirect_with_delay_slots_safe_p (delay_jump_insn, trial, insn))
3329 {
3330 reorg_redirect_jump (delay_jump_insn, trial);
3331 target_label = trial;
3332 if (crossing)
3333 CROSSING_JUMP_P (delay_jump_insn) = 1;
3334 }
3335
3336 /* If the first insn at TARGET_LABEL is redundant with a previous
3337 insn, redirect the jump to the following insn and process again.
3338 We use next_real_nondebug_insn instead of next_active_insn so we
3339 don't skip USE-markers, or we'll end up with incorrect
3340 liveness info. */
3341 trial = next_real_nondebug_insn (target_label);
3342 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3343 && redundant_insn (trial, insn, vNULL)
3344 && ! can_throw_internal (trial))
3345 {
3346 /* Figure out where to emit the special USE insn so we don't
3347 later incorrectly compute register live/death info. */
3348 rtx_insn *tmp = next_active_insn (as_a<rtx_insn *> (trial));
3349 if (tmp == 0)
3350 tmp = find_end_label (simple_return_rtx);
3351
3352 if (tmp)
3353 {
3354 /* Insert the special USE insn and update dataflow info.
3355 We know "trial" is an insn here as it is the output of
3356 next_real_nondebug_insn () above. */
3357 update_block (as_a <rtx_insn *> (trial), tmp);
3358
3359 /* Now emit a label before the special USE insn, and
3360 redirect our jump to the new label. */
3361 target_label = get_label_before (PREV_INSN (tmp), target_label);
3362 reorg_redirect_jump (delay_jump_insn, target_label);
3363 next = insn;
3364 continue;
3365 }
3366 }
3367
3368 /* Similarly, if it is an unconditional jump with one insn in its
3369 delay list and that insn is redundant, thread the jump. */
3370 rtx_sequence *trial_seq =
3371 trial ? dyn_cast <rtx_sequence *> (PATTERN (trial)) : NULL;
3372 if (trial_seq
3373 && trial_seq->len () == 2
3374 && JUMP_P (trial_seq->insn (0))
3375 && simplejump_or_return_p (trial_seq->insn (0))
3376 && redundant_insn (trial_seq->insn (1), insn, vNULL))
3377 {
3378 rtx temp_label = JUMP_LABEL (trial_seq->insn (0));
3379 if (ANY_RETURN_P (temp_label))
3380 temp_label = find_end_label (temp_label);
3381
3382 if (temp_label
3383 && redirect_with_delay_slots_safe_p (delay_jump_insn,
3384 temp_label, insn))
3385 {
3386 update_block (trial_seq->insn (1), insn);
3387 reorg_redirect_jump (delay_jump_insn, temp_label);
3388 next = insn;
3389 continue;
3390 }
3391 }
3392
3393 /* See if we have a simple (conditional) jump that is useless. */
3394 if (!CROSSING_JUMP_P (delay_jump_insn)
3395 && !INSN_ANNULLED_BRANCH_P (delay_jump_insn)
3396 && !condjump_in_parallel_p (delay_jump_insn)
3397 && prev_active_insn (as_a<rtx_insn *> (target_label)) == insn
3398 && !BARRIER_P (prev_nonnote_insn (as_a<rtx_insn *> (target_label)))
3399 /* If the last insn in the delay slot sets CC0 for some insn,
3400 various code assumes that it is in a delay slot. We could
3401 put it back where it belonged and delete the register notes,
3402 but it doesn't seem worthwhile in this uncommon case. */
3403 && (!HAVE_cc0
3404 || ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3405 REG_CC_USER, NULL_RTX)))
3406 {
3407 rtx_insn *after;
3408 int i;
3409
3410 /* All this insn does is execute its delay list and jump to the
3411 following insn. So delete the jump and just execute the delay
3412 list insns.
3413
3414 We do this by deleting the INSN containing the SEQUENCE, then
3415 re-emitting the insns separately, and then deleting the jump.
3416 This allows the count of the jump target to be properly
3417 decremented.
3418
3419 Note that we need to change the INSN_UID of the re-emitted insns
3420 since it is used to hash the insns for mark_target_live_regs and
3421 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3422
3423 Clear the from target bit, since these insns are no longer
3424 in delay slots. */
3425 for (i = 0; i < XVECLEN (pat, 0); i++)
3426 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3427
3428 rtx_insn *prev = PREV_INSN (insn);
3429 delete_related_insns (insn);
3430 gcc_assert (GET_CODE (pat) == SEQUENCE);
3431 add_insn_after (delay_jump_insn, prev, NULL);
3432 after = delay_jump_insn;
3433 for (i = 1; i < pat->len (); i++)
3434 after = emit_copy_of_insn_after (pat->insn (i), after);
3435 delete_scheduled_jump (delay_jump_insn);
3436 continue;
3437 }
3438
3439 /* See if this is an unconditional jump around a single insn which is
3440 identical to the one in its delay slot. In this case, we can just
3441 delete the branch and the insn in its delay slot. */
3442 if (next && NONJUMP_INSN_P (next)
3443 && label_before_next_insn (next, insn) == target_label
3444 && simplejump_p (insn)
3445 && XVECLEN (pat, 0) == 2
3446 && rtx_equal_p (PATTERN (next), PATTERN (pat->insn (1))))
3447 {
3448 delete_related_insns (insn);
3449 continue;
3450 }
3451
3452 /* See if this jump (with its delay slots) conditionally branches
3453 around an unconditional jump (without delay slots). If so, invert
3454 this jump and point it to the target of the second jump. We cannot
3455 do this for annulled jumps, though. Again, don't convert a jump to
3456 a RETURN here. */
3457 if (! INSN_ANNULLED_BRANCH_P (delay_jump_insn)
3458 && any_condjump_p (delay_jump_insn)
3459 && next && simplejump_or_return_p (next)
3460 && (next_active_insn (as_a<rtx_insn *> (target_label))
3461 == next_active_insn (next))
3462 && no_labels_between_p (insn, next))
3463 {
3464 rtx label = JUMP_LABEL (next);
3465 rtx old_label = JUMP_LABEL (delay_jump_insn);
3466
3467 if (ANY_RETURN_P (label))
3468 label = find_end_label (label);
3469
3470 /* find_end_label can generate a new label. Check this first. */
3471 if (label
3472 && no_labels_between_p (insn, next)
3473 && redirect_with_delay_slots_safe_p (delay_jump_insn,
3474 label, insn))
3475 {
3476 /* Be careful how we do this to avoid deleting code or labels
3477 that are momentarily dead. See similar optimization in
3478 jump.c */
3479 if (old_label)
3480 ++LABEL_NUSES (old_label);
3481
3482 if (invert_jump (delay_jump_insn, label, 1))
3483 {
3484 int i;
3485
3486 /* Must update the INSN_FROM_TARGET_P bits now that
3487 the branch is reversed, so that mark_target_live_regs
3488 will handle the delay slot insn correctly. */
3489 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3490 {
3491 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3492 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3493 }
3494
3495 delete_related_insns (next);
3496 next = insn;
3497 }
3498
3499 if (old_label && --LABEL_NUSES (old_label) == 0)
3500 delete_related_insns (old_label);
3501 continue;
3502 }
3503 }
3504
3505 /* If we own the thread opposite the way this insn branches, see if we
3506 can merge its delay slots with following insns. */
3507 if (INSN_FROM_TARGET_P (pat->insn (1))
3508 && own_thread_p (NEXT_INSN (insn), 0, 1))
3509 try_merge_delay_insns (insn, next);
3510 else if (! INSN_FROM_TARGET_P (pat->insn (1))
3511 && own_thread_p (target_label, target_label, 0))
3512 try_merge_delay_insns (insn,
3513 next_active_insn (as_a<rtx_insn *> (target_label)));
3514
3515 /* If we get here, we haven't deleted INSN. But we may have deleted
3516 NEXT, so recompute it. */
3517 next = next_active_insn (insn);
3518 }
3519 }
3520 \f
3521
3522 /* Look for filled jumps to the end of function label. We can try to convert
3523 them into RETURN insns if the insns in the delay slot are valid for the
3524 RETURN as well. */
3525
3526 static void
3527 make_return_insns (rtx_insn *first)
3528 {
3529 rtx_insn *insn;
3530 rtx_jump_insn *jump_insn;
3531 rtx real_return_label = function_return_label;
3532 rtx real_simple_return_label = function_simple_return_label;
3533 int slots, i;
3534
3535 /* See if there is a RETURN insn in the function other than the one we
3536 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3537 into a RETURN to jump to it. */
3538 for (insn = first; insn; insn = NEXT_INSN (insn))
3539 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
3540 {
3541 rtx t = get_label_before (insn, NULL_RTX);
3542 if (PATTERN (insn) == ret_rtx)
3543 real_return_label = t;
3544 else
3545 real_simple_return_label = t;
3546 break;
3547 }
3548
3549 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3550 was equal to END_OF_FUNCTION_LABEL. */
3551 if (real_return_label)
3552 LABEL_NUSES (real_return_label)++;
3553 if (real_simple_return_label)
3554 LABEL_NUSES (real_simple_return_label)++;
3555
3556 /* Clear the list of insns to fill so we can use it. */
3557 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3558
3559 for (insn = first; insn; insn = NEXT_INSN (insn))
3560 {
3561 int flags;
3562 rtx kind, real_label;
3563
3564 /* Only look at filled JUMP_INSNs that go to the end of function
3565 label. */
3566 if (!NONJUMP_INSN_P (insn))
3567 continue;
3568
3569 if (GET_CODE (PATTERN (insn)) != SEQUENCE)
3570 continue;
3571
3572 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (insn));
3573
3574 if (!jump_to_label_p (pat->insn (0)))
3575 continue;
3576
3577 if (JUMP_LABEL (pat->insn (0)) == function_return_label)
3578 {
3579 kind = ret_rtx;
3580 real_label = real_return_label;
3581 }
3582 else if (JUMP_LABEL (pat->insn (0)) == function_simple_return_label)
3583 {
3584 kind = simple_return_rtx;
3585 real_label = real_simple_return_label;
3586 }
3587 else
3588 continue;
3589
3590 jump_insn = as_a <rtx_jump_insn *> (pat->insn (0));
3591
3592 /* If we can't make the jump into a RETURN, try to redirect it to the best
3593 RETURN and go on to the next insn. */
3594 if (!reorg_redirect_jump (jump_insn, kind))
3595 {
3596 /* Make sure redirecting the jump will not invalidate the delay
3597 slot insns. */
3598 if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn))
3599 reorg_redirect_jump (jump_insn, real_label);
3600 continue;
3601 }
3602
3603 /* See if this RETURN can accept the insns current in its delay slot.
3604 It can if it has more or an equal number of slots and the contents
3605 of each is valid. */
3606
3607 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3608 slots = num_delay_slots (jump_insn);
3609 if (slots >= XVECLEN (pat, 0) - 1)
3610 {
3611 for (i = 1; i < XVECLEN (pat, 0); i++)
3612 if (! (
3613 #if ANNUL_IFFALSE_SLOTS
3614 (INSN_ANNULLED_BRANCH_P (jump_insn)
3615 && INSN_FROM_TARGET_P (pat->insn (i)))
3616 ? eligible_for_annul_false (jump_insn, i - 1,
3617 pat->insn (i), flags) :
3618 #endif
3619 #if ANNUL_IFTRUE_SLOTS
3620 (INSN_ANNULLED_BRANCH_P (jump_insn)
3621 && ! INSN_FROM_TARGET_P (pat->insn (i)))
3622 ? eligible_for_annul_true (jump_insn, i - 1,
3623 pat->insn (i), flags) :
3624 #endif
3625 eligible_for_delay (jump_insn, i - 1,
3626 pat->insn (i), flags)))
3627 break;
3628 }
3629 else
3630 i = 0;
3631
3632 if (i == XVECLEN (pat, 0))
3633 continue;
3634
3635 /* We have to do something with this insn. If it is an unconditional
3636 RETURN, delete the SEQUENCE and output the individual insns,
3637 followed by the RETURN. Then set things up so we try to find
3638 insns for its delay slots, if it needs some. */
3639 if (ANY_RETURN_P (PATTERN (jump_insn)))
3640 {
3641 rtx_insn *after = PREV_INSN (insn);
3642
3643 delete_related_insns (insn);
3644 insn = jump_insn;
3645 for (i = 1; i < pat->len (); i++)
3646 after = emit_copy_of_insn_after (pat->insn (i), after);
3647 add_insn_after (insn, after, NULL);
3648 emit_barrier_after (insn);
3649
3650 if (slots)
3651 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3652 }
3653 else
3654 /* It is probably more efficient to keep this with its current
3655 delay slot as a branch to a RETURN. */
3656 reorg_redirect_jump (jump_insn, real_label);
3657 }
3658
3659 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3660 new delay slots we have created. */
3661 if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0)
3662 delete_related_insns (real_return_label);
3663 if (real_simple_return_label != NULL_RTX
3664 && --LABEL_NUSES (real_simple_return_label) == 0)
3665 delete_related_insns (real_simple_return_label);
3666
3667 fill_simple_delay_slots (1);
3668 fill_simple_delay_slots (0);
3669 }
3670 \f
3671 /* Try to find insns to place in delay slots. */
3672
3673 static void
3674 dbr_schedule (rtx_insn *first)
3675 {
3676 rtx_insn *insn, *next, *epilogue_insn = 0;
3677 int i;
3678 bool need_return_insns;
3679
3680 /* If the current function has no insns other than the prologue and
3681 epilogue, then do not try to fill any delay slots. */
3682 if (n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS)
3683 return;
3684
3685 /* Find the highest INSN_UID and allocate and initialize our map from
3686 INSN_UID's to position in code. */
3687 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3688 {
3689 if (INSN_UID (insn) > max_uid)
3690 max_uid = INSN_UID (insn);
3691 if (NOTE_P (insn)
3692 && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG)
3693 epilogue_insn = insn;
3694 }
3695
3696 uid_to_ruid = XNEWVEC (int, max_uid + 1);
3697 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3698 uid_to_ruid[INSN_UID (insn)] = i;
3699
3700 /* Initialize the list of insns that need filling. */
3701 if (unfilled_firstobj == 0)
3702 {
3703 gcc_obstack_init (&unfilled_slots_obstack);
3704 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3705 }
3706
3707 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3708 {
3709 rtx target;
3710
3711 /* Skip vector tables. We can't get attributes for them. */
3712 if (JUMP_TABLE_DATA_P (insn))
3713 continue;
3714
3715 if (JUMP_P (insn))
3716 INSN_ANNULLED_BRANCH_P (insn) = 0;
3717 INSN_FROM_TARGET_P (insn) = 0;
3718
3719 if (num_delay_slots (insn) > 0)
3720 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3721
3722 /* Ensure all jumps go to the last of a set of consecutive labels. */
3723 if (JUMP_P (insn)
3724 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3725 && !ANY_RETURN_P (JUMP_LABEL (insn))
3726 && ((target = skip_consecutive_labels (JUMP_LABEL (insn)))
3727 != JUMP_LABEL (insn)))
3728 redirect_jump (as_a <rtx_jump_insn *> (insn), target, 1);
3729 }
3730
3731 init_resource_info (epilogue_insn);
3732
3733 /* Show we haven't computed an end-of-function label yet. */
3734 function_return_label = function_simple_return_label = NULL;
3735
3736 /* Initialize the statistics for this function. */
3737 memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
3738 memset (num_filled_delays, 0, sizeof num_filled_delays);
3739
3740 /* Now do the delay slot filling. Try everything twice in case earlier
3741 changes make more slots fillable. */
3742
3743 for (reorg_pass_number = 0;
3744 reorg_pass_number < MAX_REORG_PASSES;
3745 reorg_pass_number++)
3746 {
3747 fill_simple_delay_slots (1);
3748 fill_simple_delay_slots (0);
3749 if (!targetm.no_speculation_in_delay_slots_p ())
3750 fill_eager_delay_slots ();
3751 relax_delay_slots (first);
3752 }
3753
3754 /* If we made an end of function label, indicate that it is now
3755 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3756 If it is now unused, delete it. */
3757 if (function_return_label && --LABEL_NUSES (function_return_label) == 0)
3758 delete_related_insns (function_return_label);
3759 if (function_simple_return_label
3760 && --LABEL_NUSES (function_simple_return_label) == 0)
3761 delete_related_insns (function_simple_return_label);
3762
3763 need_return_insns = false;
3764 need_return_insns |= targetm.have_return () && function_return_label != 0;
3765 need_return_insns |= (targetm.have_simple_return ()
3766 && function_simple_return_label != 0);
3767 if (need_return_insns)
3768 make_return_insns (first);
3769
3770 /* Delete any USE insns made by update_block; subsequent passes don't need
3771 them or know how to deal with them. */
3772 for (insn = first; insn; insn = next)
3773 {
3774 next = NEXT_INSN (insn);
3775
3776 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
3777 && INSN_P (XEXP (PATTERN (insn), 0)))
3778 next = delete_related_insns (insn);
3779 }
3780
3781 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3782
3783 /* It is not clear why the line below is needed, but it does seem to be. */
3784 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3785
3786 if (dump_file)
3787 {
3788 int i, j, need_comma;
3789 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3790 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3791
3792 for (reorg_pass_number = 0;
3793 reorg_pass_number < MAX_REORG_PASSES;
3794 reorg_pass_number++)
3795 {
3796 fprintf (dump_file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
3797 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
3798 {
3799 need_comma = 0;
3800 fprintf (dump_file, ";; Reorg function #%d\n", i);
3801
3802 fprintf (dump_file, ";; %d insns needing delay slots\n;; ",
3803 num_insns_needing_delays[i][reorg_pass_number]);
3804
3805 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3806 if (num_filled_delays[i][j][reorg_pass_number])
3807 {
3808 if (need_comma)
3809 fprintf (dump_file, ", ");
3810 need_comma = 1;
3811 fprintf (dump_file, "%d got %d delays",
3812 num_filled_delays[i][j][reorg_pass_number], j);
3813 }
3814 fprintf (dump_file, "\n");
3815 }
3816 }
3817 memset (total_delay_slots, 0, sizeof total_delay_slots);
3818 memset (total_annul_slots, 0, sizeof total_annul_slots);
3819 for (insn = first; insn; insn = NEXT_INSN (insn))
3820 {
3821 if (! insn->deleted ()
3822 && NONJUMP_INSN_P (insn)
3823 && GET_CODE (PATTERN (insn)) != USE
3824 && GET_CODE (PATTERN (insn)) != CLOBBER
3825 && GET_CODE (PATTERN (insn)) != CLOBBER_HIGH)
3826 {
3827 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
3828 {
3829 rtx control;
3830 j = XVECLEN (PATTERN (insn), 0) - 1;
3831 if (j > MAX_DELAY_HISTOGRAM)
3832 j = MAX_DELAY_HISTOGRAM;
3833 control = XVECEXP (PATTERN (insn), 0, 0);
3834 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
3835 total_annul_slots[j]++;
3836 else
3837 total_delay_slots[j]++;
3838 }
3839 else if (num_delay_slots (insn) > 0)
3840 total_delay_slots[0]++;
3841 }
3842 }
3843 fprintf (dump_file, ";; Reorg totals: ");
3844 need_comma = 0;
3845 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3846 {
3847 if (total_delay_slots[j])
3848 {
3849 if (need_comma)
3850 fprintf (dump_file, ", ");
3851 need_comma = 1;
3852 fprintf (dump_file, "%d got %d delays", total_delay_slots[j], j);
3853 }
3854 }
3855 fprintf (dump_file, "\n");
3856
3857 if (ANNUL_IFTRUE_SLOTS || ANNUL_IFFALSE_SLOTS)
3858 {
3859 fprintf (dump_file, ";; Reorg annuls: ");
3860 need_comma = 0;
3861 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3862 {
3863 if (total_annul_slots[j])
3864 {
3865 if (need_comma)
3866 fprintf (dump_file, ", ");
3867 need_comma = 1;
3868 fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
3869 }
3870 }
3871 fprintf (dump_file, "\n");
3872 }
3873
3874 fprintf (dump_file, "\n");
3875 }
3876
3877 if (!sibling_labels.is_empty ())
3878 {
3879 update_alignments (sibling_labels);
3880 sibling_labels.release ();
3881 }
3882
3883 free_resource_info ();
3884 free (uid_to_ruid);
3885 crtl->dbr_scheduled_p = true;
3886 }
3887 \f
3888 /* Run delay slot optimization. */
3889 static unsigned int
3890 rest_of_handle_delay_slots (void)
3891 {
3892 if (DELAY_SLOTS)
3893 dbr_schedule (get_insns ());
3894
3895 return 0;
3896 }
3897
3898 namespace {
3899
3900 const pass_data pass_data_delay_slots =
3901 {
3902 RTL_PASS, /* type */
3903 "dbr", /* name */
3904 OPTGROUP_NONE, /* optinfo_flags */
3905 TV_DBR_SCHED, /* tv_id */
3906 0, /* properties_required */
3907 0, /* properties_provided */
3908 0, /* properties_destroyed */
3909 0, /* todo_flags_start */
3910 0, /* todo_flags_finish */
3911 };
3912
3913 class pass_delay_slots : public rtl_opt_pass
3914 {
3915 public:
3916 pass_delay_slots (gcc::context *ctxt)
3917 : rtl_opt_pass (pass_data_delay_slots, ctxt)
3918 {}
3919
3920 /* opt_pass methods: */
3921 virtual bool gate (function *);
3922 virtual unsigned int execute (function *)
3923 {
3924 return rest_of_handle_delay_slots ();
3925 }
3926
3927 }; // class pass_delay_slots
3928
3929 bool
3930 pass_delay_slots::gate (function *)
3931 {
3932 /* At -O0 dataflow info isn't updated after RA. */
3933 if (DELAY_SLOTS)
3934 return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
3935
3936 return false;
3937 }
3938
3939 } // anon namespace
3940
3941 rtl_opt_pass *
3942 make_pass_delay_slots (gcc::context *ctxt)
3943 {
3944 return new pass_delay_slots (ctxt);
3945 }
3946
3947 /* Machine dependent reorg pass. */
3948
3949 namespace {
3950
3951 const pass_data pass_data_machine_reorg =
3952 {
3953 RTL_PASS, /* type */
3954 "mach", /* name */
3955 OPTGROUP_NONE, /* optinfo_flags */
3956 TV_MACH_DEP, /* tv_id */
3957 0, /* properties_required */
3958 0, /* properties_provided */
3959 0, /* properties_destroyed */
3960 0, /* todo_flags_start */
3961 0, /* todo_flags_finish */
3962 };
3963
3964 class pass_machine_reorg : public rtl_opt_pass
3965 {
3966 public:
3967 pass_machine_reorg (gcc::context *ctxt)
3968 : rtl_opt_pass (pass_data_machine_reorg, ctxt)
3969 {}
3970
3971 /* opt_pass methods: */
3972 virtual bool gate (function *)
3973 {
3974 return targetm.machine_dependent_reorg != 0;
3975 }
3976
3977 virtual unsigned int execute (function *)
3978 {
3979 targetm.machine_dependent_reorg ();
3980 return 0;
3981 }
3982
3983 }; // class pass_machine_reorg
3984
3985 } // anon namespace
3986
3987 rtl_opt_pass *
3988 make_pass_machine_reorg (gcc::context *ctxt)
3989 {
3990 return new pass_machine_reorg (ctxt);
3991 }