gdb/amd64-linux-nat.c

   1 /* Native-dependent code for GNU/Linux x86-64.
   2
   3    Copyright (C) 2001-2016 Free Software Foundation, Inc.
   4    Contributed by Jiri Smid, SuSE Labs.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "defs.h"
  22 #include "inferior.h"
  23 #include "regcache.h"
  24 #include "elf/common.h"
  25 #include <sys/uio.h>
  26 #include "nat/gdb_ptrace.h"
  27 #include <asm/prctl.h>
  28 #include <sys/reg.h>
  29 #include "gregset.h"
  30 #include "gdb_proc_service.h"
  31
  32 #include "amd64-nat.h"
  33 #include "linux-nat.h"
  34 #include "amd64-tdep.h"
  35 #include "amd64-linux-tdep.h"
  36 #include "i386-linux-tdep.h"
  37 #include "x86-xstate.h"
  38
  39 #include "x86-linux-nat.h"
  40 #include "nat/linux-ptrace.h"
  41 #include "nat/amd64-linux-siginfo.h"
  42
  43 /* Mapping between the general-purpose registers in GNU/Linux x86-64
  44    `struct user' format and GDB's register cache layout for GNU/Linux
  45    i386.
  46
  47    Note that most GNU/Linux x86-64 registers are 64-bit, while the
  48    GNU/Linux i386 registers are all 32-bit, but since we're
  49    little-endian we get away with that.  */
  50
  51 /* From <sys/reg.h> on GNU/Linux i386.  */
  52 static int amd64_linux_gregset32_reg_offset[] =
  53 {
  54   RAX * 8, RCX * 8,             /* %eax, %ecx */
  55   RDX * 8, RBX * 8,             /* %edx, %ebx */
  56   RSP * 8, RBP * 8,             /* %esp, %ebp */
  57   RSI * 8, RDI * 8,             /* %esi, %edi */
  58   RIP * 8, EFLAGS * 8,          /* %eip, %eflags */
  59   CS * 8, SS * 8,               /* %cs, %ss */
  60   DS * 8, ES * 8,               /* %ds, %es */
  61   FS * 8, GS * 8,               /* %fs, %gs */
  62   -1, -1, -1, -1, -1, -1, -1, -1,
  63   -1, -1, -1, -1, -1, -1, -1, -1,
  64   -1, -1, -1, -1, -1, -1, -1, -1, -1,
  65   -1, -1, -1, -1, -1, -1, -1, -1,
  66   -1, -1, -1, -1,                 /* MPX registers BND0 ... BND3.  */
  67   -1, -1,                         /* MPX registers BNDCFGU, BNDSTATUS.  */
  68   -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512)  */
  69   -1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm7 (AVX512)  */
  70   ORIG_RAX * 8                    /* "orig_eax"  */
  71 };
  72 \f
  73
  74 /* Transfering the general-purpose registers between GDB, inferiors
  75    and core files.  */
  76
  77 /* Fill GDB's register cache with the general-purpose register values
  78    in *GREGSETP.  */
  79
  80 void
  81 supply_gregset (struct regcache *regcache, const elf_gregset_t *gregsetp)
  82 {
  83   amd64_supply_native_gregset (regcache, gregsetp, -1);
  84 }
  85
  86 /* Fill register REGNUM (if it is a general-purpose register) in
  87    *GREGSETP with the value in GDB's register cache.  If REGNUM is -1,
  88    do this for all registers.  */
  89
  90 void
  91 fill_gregset (const struct regcache *regcache,
  92               elf_gregset_t *gregsetp, int regnum)
  93 {
  94   amd64_collect_native_gregset (regcache, gregsetp, regnum);
  95 }
  96
  97 /* Transfering floating-point registers between GDB, inferiors and cores.  */
  98
  99 /* Fill GDB's register cache with the floating-point and SSE register
 100    values in *FPREGSETP.  */
 101
 102 void
 103 supply_fpregset (struct regcache *regcache, const elf_fpregset_t *fpregsetp)
 104 {
 105   amd64_supply_fxsave (regcache, -1, fpregsetp);
 106 }
 107
 108 /* Fill register REGNUM (if it is a floating-point or SSE register) in
 109    *FPREGSETP with the value in GDB's register cache.  If REGNUM is
 110    -1, do this for all registers.  */
 111
 112 void
 113 fill_fpregset (const struct regcache *regcache,
 114                elf_fpregset_t *fpregsetp, int regnum)
 115 {
 116   amd64_collect_fxsave (regcache, regnum, fpregsetp);
 117 }
 118 \f
 119
 120 /* Transferring arbitrary registers between GDB and inferior.  */
 121
 122 /* Fetch register REGNUM from the child process.  If REGNUM is -1, do
 123    this for all registers (including the floating point and SSE
 124    registers).  */
 125
 126 static void
 127 amd64_linux_fetch_inferior_registers (struct target_ops *ops,
 128                                       struct regcache *regcache, int regnum)
 129 {
 130   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 131   int tid;
 132
 133   /* GNU/Linux LWP ID's are process ID's.  */
 134   tid = ptid_get_lwp (inferior_ptid);
 135   if (tid == 0)
 136     tid = ptid_get_pid (inferior_ptid); /* Not a threaded program.  */
 137
 138   if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum))
 139     {
 140       elf_gregset_t regs;
 141
 142       if (ptrace (PTRACE_GETREGS, tid, 0, (long) &regs) < 0)
 143         perror_with_name (_("Couldn't get registers"));
 144
 145       amd64_supply_native_gregset (regcache, &regs, -1);
 146       if (regnum != -1)
 147         return;
 148     }
 149
 150   if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum))
 151     {
 152       elf_fpregset_t fpregs;
 153
 154       if (have_ptrace_getregset == TRIBOOL_TRUE)
 155         {
 156           char xstateregs[X86_XSTATE_MAX_SIZE];
 157           struct iovec iov;
 158
 159           iov.iov_base = xstateregs;
 160           iov.iov_len = sizeof (xstateregs);
 161           if (ptrace (PTRACE_GETREGSET, tid,
 162                       (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
 163             perror_with_name (_("Couldn't get extended state status"));
 164
 165           amd64_supply_xsave (regcache, -1, xstateregs);
 166         }
 167       else
 168         {
 169           if (ptrace (PTRACE_GETFPREGS, tid, 0, (long) &fpregs) < 0)
 170             perror_with_name (_("Couldn't get floating point status"));
 171
 172           amd64_supply_fxsave (regcache, -1, &fpregs);
 173         }
 174     }
 175 }
 176
 177 /* Store register REGNUM back into the child process.  If REGNUM is
 178    -1, do this for all registers (including the floating-point and SSE
 179    registers).  */
 180
 181 static void
 182 amd64_linux_store_inferior_registers (struct target_ops *ops,
 183                                       struct regcache *regcache, int regnum)
 184 {
 185   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 186   int tid;
 187
 188   /* GNU/Linux LWP ID's are process ID's.  */
 189   tid = ptid_get_lwp (inferior_ptid);
 190   if (tid == 0)
 191     tid = ptid_get_pid (inferior_ptid); /* Not a threaded program.  */
 192
 193   if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum))
 194     {
 195       elf_gregset_t regs;
 196
 197       if (ptrace (PTRACE_GETREGS, tid, 0, (long) &regs) < 0)
 198         perror_with_name (_("Couldn't get registers"));
 199
 200       amd64_collect_native_gregset (regcache, &regs, regnum);
 201
 202       if (ptrace (PTRACE_SETREGS, tid, 0, (long) &regs) < 0)
 203         perror_with_name (_("Couldn't write registers"));
 204
 205       if (regnum != -1)
 206         return;
 207     }
 208
 209   if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum))
 210     {
 211       elf_fpregset_t fpregs;
 212
 213       if (have_ptrace_getregset == TRIBOOL_TRUE)
 214         {
 215           char xstateregs[X86_XSTATE_MAX_SIZE];
 216           struct iovec iov;
 217
 218           iov.iov_base = xstateregs;
 219           iov.iov_len = sizeof (xstateregs);
 220           if (ptrace (PTRACE_GETREGSET, tid,
 221                       (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
 222             perror_with_name (_("Couldn't get extended state status"));
 223
 224           amd64_collect_xsave (regcache, regnum, xstateregs, 0);
 225
 226           if (ptrace (PTRACE_SETREGSET, tid,
 227                       (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
 228             perror_with_name (_("Couldn't write extended state status"));
 229         }
 230       else
 231         {
 232           if (ptrace (PTRACE_GETFPREGS, tid, 0, (long) &fpregs) < 0)
 233             perror_with_name (_("Couldn't get floating point status"));
 234
 235           amd64_collect_fxsave (regcache, regnum, &fpregs);
 236
 237           if (ptrace (PTRACE_SETFPREGS, tid, 0, (long) &fpregs) < 0)
 238             perror_with_name (_("Couldn't write floating point status"));
 239         }
 240     }
 241 }
 242 \f
 243
 244 /* This function is called by libthread_db as part of its handling of
 245    a request for a thread's local storage address.  */
 246
 247 ps_err_e
 248 ps_get_thread_area (struct ps_prochandle *ph,
 249                     lwpid_t lwpid, int idx, void **base)
 250 {
 251   if (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 32)
 252     {
 253       unsigned int base_addr;
 254       ps_err_e result;
 255
 256       result = x86_linux_get_thread_area (lwpid, (void *) (long) idx,
 257                                           &base_addr);
 258       if (result == PS_OK)
 259         {
 260           /* Extend the value to 64 bits.  Here it's assumed that
 261              a "long" and a "void *" are the same.  */
 262           (*base) = (void *) (long) base_addr;
 263         }
 264       return result;
 265     }
 266   else
 267     {
 268       /* This definition comes from prctl.h, but some kernels may not
 269          have it.  */
 270 #ifndef PTRACE_ARCH_PRCTL
 271 #define PTRACE_ARCH_PRCTL      30
 272 #endif
 273       /* FIXME: ezannoni-2003-07-09 see comment above about include
 274          file order.  We could be getting bogus values for these two.  */
 275       gdb_assert (FS < ELF_NGREG);
 276       gdb_assert (GS < ELF_NGREG);
 277       switch (idx)
 278         {
 279         case FS:
 280 #ifdef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
 281             {
 282               /* PTRACE_ARCH_PRCTL is obsolete since 2.6.25, where the
 283                  fs_base and gs_base fields of user_regs_struct can be
 284                  used directly.  */
 285               unsigned long fs;
 286               errno = 0;
 287               fs = ptrace (PTRACE_PEEKUSER, lwpid,
 288                            offsetof (struct user_regs_struct, fs_base), 0);
 289               if (errno == 0)
 290                 {
 291                   *base = (void *) fs;
 292                   return PS_OK;
 293                 }
 294             }
 295 #endif
 296           if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_FS) == 0)
 297             return PS_OK;
 298           break;
 299         case GS:
 300 #ifdef HAVE_STRUCT_USER_REGS_STRUCT_GS_BASE
 301             {
 302               unsigned long gs;
 303               errno = 0;
 304               gs = ptrace (PTRACE_PEEKUSER, lwpid,
 305                            offsetof (struct user_regs_struct, gs_base), 0);
 306               if (errno == 0)
 307                 {
 308                   *base = (void *) gs;
 309                   return PS_OK;
 310                 }
 311             }
 312 #endif
 313           if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_GS) == 0)
 314             return PS_OK;
 315           break;
 316         default:                   /* Should not happen.  */
 317           return PS_BADADDR;
 318         }
 319     }
 320   return PS_ERR;               /* ptrace failed.  */
 321 }
 322 \f
 323
 324 /* Convert a ptrace/host siginfo object, into/from the siginfo in the
 325    layout of the inferiors' architecture.  Returns true if any
 326    conversion was done; false otherwise.  If DIRECTION is 1, then copy
 327    from INF to PTRACE.  If DIRECTION is 0, copy from PTRACE to
 328    INF.  */
 329
 330 static int
 331 amd64_linux_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
 332 {
 333   struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
 334
 335   /* Is the inferior 32-bit?  If so, then do fixup the siginfo
 336      object.  */
 337   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 338       return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
 339                                                FIXUP_32);
 340   /* No fixup for native x32 GDB.  */
 341   else if (gdbarch_addr_bit (gdbarch) == 32 && sizeof (void *) == 8)
 342       return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
 343                                                FIXUP_X32);
 344   else
 345     return 0;
 346 }
 347
 348 /* Provide a prototype to silence -Wmissing-prototypes.  */
 349 void _initialize_amd64_linux_nat (void);
 350
 351 void
 352 _initialize_amd64_linux_nat (void)
 353 {
 354   struct target_ops *t;
 355
 356   amd64_native_gregset32_reg_offset = amd64_linux_gregset32_reg_offset;
 357   amd64_native_gregset32_num_regs = I386_LINUX_NUM_REGS;
 358   amd64_native_gregset64_reg_offset = amd64_linux_gregset_reg_offset;
 359   amd64_native_gregset64_num_regs = AMD64_LINUX_NUM_REGS;
 360
 361   gdb_assert (ARRAY_SIZE (amd64_linux_gregset32_reg_offset)
 362               == amd64_native_gregset32_num_regs);
 363
 364   /* Create a generic x86 GNU/Linux target.  */
 365   t = x86_linux_create_target ();
 366
 367   /* Add our register access methods.  */
 368   t->to_fetch_registers = amd64_linux_fetch_inferior_registers;
 369   t->to_store_registers = amd64_linux_store_inferior_registers;
 370
 371   /* Add the target.  */
 372   x86_linux_add_target (t);
 373
 374   /* Add our siginfo layout converter.  */
 375   linux_nat_set_siginfo_fixup (t, amd64_linux_siginfo_fixup);
 376 }