]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - gdb/avr-tdep.c
Copyright updates for 2007.
[thirdparty/binutils-gdb.git] / gdb / avr-tdep.c
1 /* Target-dependent code for Atmel AVR, for GDB.
2
3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4 2006, 2007 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
22
23 /* Contributed by Theodore A. Roth, troth@openavr.org */
24
25 /* Portions of this file were taken from the original gdb-4.18 patch developed
26 by Denis Chertykov, denisc@overta.ru */
27
28 #include "defs.h"
29 #include "frame.h"
30 #include "frame-unwind.h"
31 #include "frame-base.h"
32 #include "trad-frame.h"
33 #include "gdbcmd.h"
34 #include "gdbcore.h"
35 #include "inferior.h"
36 #include "symfile.h"
37 #include "arch-utils.h"
38 #include "regcache.h"
39 #include "gdb_string.h"
40 #include "dis-asm.h"
41
42 /* AVR Background:
43
44 (AVR micros are pure Harvard Architecture processors.)
45
46 The AVR family of microcontrollers have three distinctly different memory
47 spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for
48 the most part to store program instructions. The sram is 8 bits wide and is
49 used for the stack and the heap. Some devices lack sram and some can have
50 an additional external sram added on as a peripheral.
51
52 The eeprom is 8 bits wide and is used to store data when the device is
53 powered down. Eeprom is not directly accessible, it can only be accessed
54 via io-registers using a special algorithm. Accessing eeprom via gdb's
55 remote serial protocol ('m' or 'M' packets) looks difficult to do and is
56 not included at this time.
57
58 [The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or
59 written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''. For this to
60 work, the remote target must be able to handle eeprom accesses and perform
61 the address translation.]
62
63 All three memory spaces have physical addresses beginning at 0x0. In
64 addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit
65 bytes instead of the 16 bit wide words used by the real device for the
66 Program Counter.
67
68 In order for remote targets to work correctly, extra bits must be added to
69 addresses before they are send to the target or received from the target
70 via the remote serial protocol. The extra bits are the MSBs and are used to
71 decode which memory space the address is referring to. */
72
73 #undef XMALLOC
74 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
75
76 #undef EXTRACT_INSN
77 #define EXTRACT_INSN(addr) extract_unsigned_integer(addr,2)
78
79 /* Constants: prefixed with AVR_ to avoid name space clashes */
80
81 enum
82 {
83 AVR_REG_W = 24,
84 AVR_REG_X = 26,
85 AVR_REG_Y = 28,
86 AVR_FP_REGNUM = 28,
87 AVR_REG_Z = 30,
88
89 AVR_SREG_REGNUM = 32,
90 AVR_SP_REGNUM = 33,
91 AVR_PC_REGNUM = 34,
92
93 AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/,
94 AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/,
95
96 AVR_PC_REG_INDEX = 35, /* index into array of registers */
97
98 AVR_MAX_PROLOGUE_SIZE = 64, /* bytes */
99
100 /* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */
101 AVR_MAX_PUSHES = 18,
102
103 /* Number of the last pushed register. r17 for current avr-gcc */
104 AVR_LAST_PUSHED_REGNUM = 17,
105
106 AVR_ARG1_REGNUM = 24, /* Single byte argument */
107 AVR_ARGN_REGNUM = 25, /* Multi byte argments */
108
109 AVR_RET1_REGNUM = 24, /* Single byte return value */
110 AVR_RETN_REGNUM = 25, /* Multi byte return value */
111
112 /* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8
113 bits? Do these have to match the bfd vma values?. It sure would make
114 things easier in the future if they didn't need to match.
115
116 Note: I chose these values so as to be consistent with bfd vma
117 addresses.
118
119 TRoth/2002-04-08: There is already a conflict with very large programs
120 in the mega128. The mega128 has 128K instruction bytes (64K words),
121 thus the Most Significant Bit is 0x10000 which gets masked off my
122 AVR_MEM_MASK.
123
124 The problem manifests itself when trying to set a breakpoint in a
125 function which resides in the upper half of the instruction space and
126 thus requires a 17-bit address.
127
128 For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK
129 from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet,
130 but could be for some remote targets by just adding the correct offset
131 to the address and letting the remote target handle the low-level
132 details of actually accessing the eeprom. */
133
134 AVR_IMEM_START = 0x00000000, /* INSN memory */
135 AVR_SMEM_START = 0x00800000, /* SRAM memory */
136 #if 1
137 /* No eeprom mask defined */
138 AVR_MEM_MASK = 0x00f00000, /* mask to determine memory space */
139 #else
140 AVR_EMEM_START = 0x00810000, /* EEPROM memory */
141 AVR_MEM_MASK = 0x00ff0000, /* mask to determine memory space */
142 #endif
143 };
144
145 /* Prologue types:
146
147 NORMAL and CALL are the typical types (the -mcall-prologues gcc option
148 causes the generation of the CALL type prologues). */
149
150 enum {
151 AVR_PROLOGUE_NONE, /* No prologue */
152 AVR_PROLOGUE_NORMAL,
153 AVR_PROLOGUE_CALL, /* -mcall-prologues */
154 AVR_PROLOGUE_MAIN,
155 AVR_PROLOGUE_INTR, /* interrupt handler */
156 AVR_PROLOGUE_SIG, /* signal handler */
157 };
158
159 /* Any function with a frame looks like this
160 ....... <-SP POINTS HERE
161 LOCALS1 <-FP POINTS HERE
162 LOCALS0
163 SAVED FP
164 SAVED R3
165 SAVED R2
166 RET PC
167 FIRST ARG
168 SECOND ARG */
169
170 struct avr_unwind_cache
171 {
172 /* The previous frame's inner most stack address. Used as this
173 frame ID's stack_addr. */
174 CORE_ADDR prev_sp;
175 /* The frame's base, optionally used by the high-level debug info. */
176 CORE_ADDR base;
177 int size;
178 int prologue_type;
179 /* Table indicating the location of each and every register. */
180 struct trad_frame_saved_reg *saved_regs;
181 };
182
183 struct gdbarch_tdep
184 {
185 /* FIXME: TRoth: is there anything to put here? */
186 int foo;
187 };
188
189 /* Lookup the name of a register given it's number. */
190
191 static const char *
192 avr_register_name (int regnum)
193 {
194 static char *register_names[] = {
195 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
196 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
197 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
198 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
199 "SREG", "SP", "PC"
200 };
201 if (regnum < 0)
202 return NULL;
203 if (regnum >= (sizeof (register_names) / sizeof (*register_names)))
204 return NULL;
205 return register_names[regnum];
206 }
207
208 /* Return the GDB type object for the "standard" data type
209 of data in register N. */
210
211 static struct type *
212 avr_register_type (struct gdbarch *gdbarch, int reg_nr)
213 {
214 if (reg_nr == AVR_PC_REGNUM)
215 return builtin_type_uint32;
216 if (reg_nr == AVR_SP_REGNUM)
217 return builtin_type_void_data_ptr;
218 else
219 return builtin_type_uint8;
220 }
221
222 /* Instruction address checks and convertions. */
223
224 static CORE_ADDR
225 avr_make_iaddr (CORE_ADDR x)
226 {
227 return ((x) | AVR_IMEM_START);
228 }
229
230 /* FIXME: TRoth: Really need to use a larger mask for instructions. Some
231 devices are already up to 128KBytes of flash space.
232
233 TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */
234
235 static CORE_ADDR
236 avr_convert_iaddr_to_raw (CORE_ADDR x)
237 {
238 return ((x) & 0xffffffff);
239 }
240
241 /* SRAM address checks and convertions. */
242
243 static CORE_ADDR
244 avr_make_saddr (CORE_ADDR x)
245 {
246 return ((x) | AVR_SMEM_START);
247 }
248
249 static CORE_ADDR
250 avr_convert_saddr_to_raw (CORE_ADDR x)
251 {
252 return ((x) & 0xffffffff);
253 }
254
255 /* EEPROM address checks and convertions. I don't know if these will ever
256 actually be used, but I've added them just the same. TRoth */
257
258 /* TRoth/2002-04-08: Commented out for now to allow fix for problem with large
259 programs in the mega128. */
260
261 /* static CORE_ADDR */
262 /* avr_make_eaddr (CORE_ADDR x) */
263 /* { */
264 /* return ((x) | AVR_EMEM_START); */
265 /* } */
266
267 /* static int */
268 /* avr_eaddr_p (CORE_ADDR x) */
269 /* { */
270 /* return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */
271 /* } */
272
273 /* static CORE_ADDR */
274 /* avr_convert_eaddr_to_raw (CORE_ADDR x) */
275 /* { */
276 /* return ((x) & 0xffffffff); */
277 /* } */
278
279 /* Convert from address to pointer and vice-versa. */
280
281 static void
282 avr_address_to_pointer (struct type *type, gdb_byte *buf, CORE_ADDR addr)
283 {
284 /* Is it a code address? */
285 if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
286 || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD)
287 {
288 store_unsigned_integer (buf, TYPE_LENGTH (type),
289 avr_convert_iaddr_to_raw (addr >> 1));
290 }
291 else
292 {
293 /* Strip off any upper segment bits. */
294 store_unsigned_integer (buf, TYPE_LENGTH (type),
295 avr_convert_saddr_to_raw (addr));
296 }
297 }
298
299 static CORE_ADDR
300 avr_pointer_to_address (struct type *type, const gdb_byte *buf)
301 {
302 CORE_ADDR addr = extract_unsigned_integer (buf, TYPE_LENGTH (type));
303
304 /* Is it a code address? */
305 if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
306 || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD
307 || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type)))
308 return avr_make_iaddr (addr << 1);
309 else
310 return avr_make_saddr (addr);
311 }
312
313 static CORE_ADDR
314 avr_read_pc (ptid_t ptid)
315 {
316 ptid_t save_ptid;
317 ULONGEST pc;
318 CORE_ADDR retval;
319
320 save_ptid = inferior_ptid;
321 inferior_ptid = ptid;
322 regcache_cooked_read_unsigned (current_regcache, AVR_PC_REGNUM, &pc);
323 inferior_ptid = save_ptid;
324 retval = avr_make_iaddr (pc);
325 return retval;
326 }
327
328 static void
329 avr_write_pc (CORE_ADDR val, ptid_t ptid)
330 {
331 ptid_t save_ptid;
332
333 save_ptid = inferior_ptid;
334 inferior_ptid = ptid;
335 write_register (AVR_PC_REGNUM, avr_convert_iaddr_to_raw (val));
336 inferior_ptid = save_ptid;
337 }
338
339 static CORE_ADDR
340 avr_read_sp (void)
341 {
342 ULONGEST sp;
343
344 regcache_cooked_read_unsigned (current_regcache, AVR_SP_REGNUM, &sp);
345 return (avr_make_saddr (sp));
346 }
347
348 static int
349 avr_scan_arg_moves (int vpc, unsigned char *prologue)
350 {
351 unsigned short insn;
352
353 for (; vpc < AVR_MAX_PROLOGUE_SIZE; vpc += 2)
354 {
355 insn = EXTRACT_INSN (&prologue[vpc]);
356 if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */
357 continue;
358 else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */
359 continue;
360 else
361 break;
362 }
363
364 return vpc;
365 }
366
367 /* Function: avr_scan_prologue
368
369 This function decodes an AVR function prologue to determine:
370 1) the size of the stack frame
371 2) which registers are saved on it
372 3) the offsets of saved regs
373 This information is stored in the avr_unwind_cache structure.
374
375 Some devices lack the sbiw instruction, so on those replace this:
376 sbiw r28, XX
377 with this:
378 subi r28,lo8(XX)
379 sbci r29,hi8(XX)
380
381 A typical AVR function prologue with a frame pointer might look like this:
382 push rXX ; saved regs
383 ...
384 push r28
385 push r29
386 in r28,__SP_L__
387 in r29,__SP_H__
388 sbiw r28,<LOCALS_SIZE>
389 in __tmp_reg__,__SREG__
390 cli
391 out __SP_H__,r29
392 out __SREG__,__tmp_reg__
393 out __SP_L__,r28
394
395 A typical AVR function prologue without a frame pointer might look like
396 this:
397 push rXX ; saved regs
398 ...
399
400 A main function prologue looks like this:
401 ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
402 ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
403 out __SP_H__,r29
404 out __SP_L__,r28
405
406 A signal handler prologue looks like this:
407 push __zero_reg__
408 push __tmp_reg__
409 in __tmp_reg__, __SREG__
410 push __tmp_reg__
411 clr __zero_reg__
412 push rXX ; save registers r18:r27, r30:r31
413 ...
414 push r28 ; save frame pointer
415 push r29
416 in r28, __SP_L__
417 in r29, __SP_H__
418 sbiw r28, <LOCALS_SIZE>
419 out __SP_H__, r29
420 out __SP_L__, r28
421
422 A interrupt handler prologue looks like this:
423 sei
424 push __zero_reg__
425 push __tmp_reg__
426 in __tmp_reg__, __SREG__
427 push __tmp_reg__
428 clr __zero_reg__
429 push rXX ; save registers r18:r27, r30:r31
430 ...
431 push r28 ; save frame pointer
432 push r29
433 in r28, __SP_L__
434 in r29, __SP_H__
435 sbiw r28, <LOCALS_SIZE>
436 cli
437 out __SP_H__, r29
438 sei
439 out __SP_L__, r28
440
441 A `-mcall-prologues' prologue looks like this (Note that the megas use a
442 jmp instead of a rjmp, thus the prologue is one word larger since jmp is a
443 32 bit insn and rjmp is a 16 bit insn):
444 ldi r26,lo8(<LOCALS_SIZE>)
445 ldi r27,hi8(<LOCALS_SIZE>)
446 ldi r30,pm_lo8(.L_foo_body)
447 ldi r31,pm_hi8(.L_foo_body)
448 rjmp __prologue_saves__+RRR
449 .L_foo_body: */
450
451 /* Not really part of a prologue, but still need to scan for it, is when a
452 function prologue moves values passed via registers as arguments to new
453 registers. In this case, all local variables live in registers, so there
454 may be some register saves. This is what it looks like:
455 movw rMM, rNN
456 ...
457
458 There could be multiple movw's. If the target doesn't have a movw insn, it
459 will use two mov insns. This could be done after any of the above prologue
460 types. */
461
462 static CORE_ADDR
463 avr_scan_prologue (CORE_ADDR pc, struct avr_unwind_cache *info)
464 {
465 int i;
466 unsigned short insn;
467 int scan_stage = 0;
468 struct minimal_symbol *msymbol;
469 unsigned char prologue[AVR_MAX_PROLOGUE_SIZE];
470 int vpc = 0;
471
472 /* FIXME: TRoth/2003-06-11: This could be made more efficient by only
473 reading in the bytes of the prologue. The problem is that the figuring
474 out where the end of the prologue is is a bit difficult. The old code
475 tried to do that, but failed quite often. */
476 read_memory (pc, prologue, AVR_MAX_PROLOGUE_SIZE);
477
478 /* Scanning main()'s prologue
479 ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
480 ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
481 out __SP_H__,r29
482 out __SP_L__,r28 */
483
484 if (1)
485 {
486 CORE_ADDR locals;
487 unsigned char img[] = {
488 0xde, 0xbf, /* out __SP_H__,r29 */
489 0xcd, 0xbf /* out __SP_L__,r28 */
490 };
491
492 insn = EXTRACT_INSN (&prologue[vpc]);
493 /* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */
494 if ((insn & 0xf0f0) == 0xe0c0)
495 {
496 locals = (insn & 0xf) | ((insn & 0x0f00) >> 4);
497 insn = EXTRACT_INSN (&prologue[vpc + 2]);
498 /* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */
499 if ((insn & 0xf0f0) == 0xe0d0)
500 {
501 locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
502 if (memcmp (prologue + vpc + 4, img, sizeof (img)) == 0)
503 {
504 info->prologue_type = AVR_PROLOGUE_MAIN;
505 info->base = locals;
506 return pc + 4;
507 }
508 }
509 }
510 }
511
512 /* Scanning `-mcall-prologues' prologue
513 Classic prologue is 10 bytes, mega prologue is a 12 bytes long */
514
515 while (1) /* Using a while to avoid many goto's */
516 {
517 int loc_size;
518 int body_addr;
519 unsigned num_pushes;
520 int pc_offset = 0;
521
522 insn = EXTRACT_INSN (&prologue[vpc]);
523 /* ldi r26,<LOCALS_SIZE> */
524 if ((insn & 0xf0f0) != 0xe0a0)
525 break;
526 loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4);
527 pc_offset += 2;
528
529 insn = EXTRACT_INSN (&prologue[vpc + 2]);
530 /* ldi r27,<LOCALS_SIZE> / 256 */
531 if ((insn & 0xf0f0) != 0xe0b0)
532 break;
533 loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
534 pc_offset += 2;
535
536 insn = EXTRACT_INSN (&prologue[vpc + 4]);
537 /* ldi r30,pm_lo8(.L_foo_body) */
538 if ((insn & 0xf0f0) != 0xe0e0)
539 break;
540 body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4);
541 pc_offset += 2;
542
543 insn = EXTRACT_INSN (&prologue[vpc + 6]);
544 /* ldi r31,pm_hi8(.L_foo_body) */
545 if ((insn & 0xf0f0) != 0xe0f0)
546 break;
547 body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
548 pc_offset += 2;
549
550 msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL);
551 if (!msymbol)
552 break;
553
554 insn = EXTRACT_INSN (&prologue[vpc + 8]);
555 /* rjmp __prologue_saves__+RRR */
556 if ((insn & 0xf000) == 0xc000)
557 {
558 /* Extract PC relative offset from RJMP */
559 i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0);
560 /* Convert offset to byte addressable mode */
561 i *= 2;
562 /* Destination address */
563 i += pc + 10;
564
565 if (body_addr != (pc + 10)/2)
566 break;
567
568 pc_offset += 2;
569 }
570 else if ((insn & 0xfe0e) == 0x940c)
571 {
572 /* Extract absolute PC address from JMP */
573 i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16)
574 | (EXTRACT_INSN (&prologue[vpc + 10]) & 0xffff));
575 /* Convert address to byte addressable mode */
576 i *= 2;
577
578 if (body_addr != (pc + 12)/2)
579 break;
580
581 pc_offset += 4;
582 }
583 else
584 break;
585
586 /* Resolve offset (in words) from __prologue_saves__ symbol.
587 Which is a pushes count in `-mcall-prologues' mode */
588 num_pushes = AVR_MAX_PUSHES - (i - SYMBOL_VALUE_ADDRESS (msymbol)) / 2;
589
590 if (num_pushes > AVR_MAX_PUSHES)
591 {
592 fprintf_unfiltered (gdb_stderr, _("Num pushes too large: %d\n"),
593 num_pushes);
594 num_pushes = 0;
595 }
596
597 if (num_pushes)
598 {
599 int from;
600
601 info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes;
602 if (num_pushes >= 2)
603 info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1;
604
605 i = 0;
606 for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2);
607 from <= AVR_LAST_PUSHED_REGNUM; ++from)
608 info->saved_regs [from].addr = ++i;
609 }
610 info->size = loc_size + num_pushes;
611 info->prologue_type = AVR_PROLOGUE_CALL;
612
613 return pc + pc_offset;
614 }
615
616 /* Scan for the beginning of the prologue for an interrupt or signal
617 function. Note that we have to set the prologue type here since the
618 third stage of the prologue may not be present (e.g. no saved registered
619 or changing of the SP register). */
620
621 if (1)
622 {
623 unsigned char img[] = {
624 0x78, 0x94, /* sei */
625 0x1f, 0x92, /* push r1 */
626 0x0f, 0x92, /* push r0 */
627 0x0f, 0xb6, /* in r0,0x3f SREG */
628 0x0f, 0x92, /* push r0 */
629 0x11, 0x24 /* clr r1 */
630 };
631 if (memcmp (prologue, img, sizeof (img)) == 0)
632 {
633 info->prologue_type = AVR_PROLOGUE_INTR;
634 vpc += sizeof (img);
635 info->saved_regs[AVR_SREG_REGNUM].addr = 3;
636 info->saved_regs[0].addr = 2;
637 info->saved_regs[1].addr = 1;
638 info->size += 3;
639 }
640 else if (memcmp (img + 2, prologue, sizeof (img) - 2) == 0)
641 {
642 info->prologue_type = AVR_PROLOGUE_SIG;
643 vpc += sizeof (img) - 2;
644 info->saved_regs[AVR_SREG_REGNUM].addr = 3;
645 info->saved_regs[0].addr = 2;
646 info->saved_regs[1].addr = 1;
647 info->size += 3;
648 }
649 }
650
651 /* First stage of the prologue scanning.
652 Scan pushes (saved registers) */
653
654 for (; vpc < AVR_MAX_PROLOGUE_SIZE; vpc += 2)
655 {
656 insn = EXTRACT_INSN (&prologue[vpc]);
657 if ((insn & 0xfe0f) == 0x920f) /* push rXX */
658 {
659 /* Bits 4-9 contain a mask for registers R0-R32. */
660 int regno = (insn & 0x1f0) >> 4;
661 info->size++;
662 info->saved_regs[regno].addr = info->size;
663 scan_stage = 1;
664 }
665 else
666 break;
667 }
668
669 if (vpc >= AVR_MAX_PROLOGUE_SIZE)
670 fprintf_unfiltered (gdb_stderr,
671 _("Hit end of prologue while scanning pushes\n"));
672
673 /* Second stage of the prologue scanning.
674 Scan:
675 in r28,__SP_L__
676 in r29,__SP_H__ */
677
678 if (scan_stage == 1 && vpc < AVR_MAX_PROLOGUE_SIZE)
679 {
680 unsigned char img[] = {
681 0xcd, 0xb7, /* in r28,__SP_L__ */
682 0xde, 0xb7 /* in r29,__SP_H__ */
683 };
684 unsigned short insn1;
685
686 if (memcmp (prologue + vpc, img, sizeof (img)) == 0)
687 {
688 vpc += 4;
689 scan_stage = 2;
690 }
691 }
692
693 /* Third stage of the prologue scanning. (Really two stages)
694 Scan for:
695 sbiw r28,XX or subi r28,lo8(XX)
696 sbci r29,hi8(XX)
697 in __tmp_reg__,__SREG__
698 cli
699 out __SP_H__,r29
700 out __SREG__,__tmp_reg__
701 out __SP_L__,r28 */
702
703 if (scan_stage == 2 && vpc < AVR_MAX_PROLOGUE_SIZE)
704 {
705 int locals_size = 0;
706 unsigned char img[] = {
707 0x0f, 0xb6, /* in r0,0x3f */
708 0xf8, 0x94, /* cli */
709 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
710 0x0f, 0xbe, /* out 0x3f,r0 ; SREG */
711 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
712 };
713 unsigned char img_sig[] = {
714 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
715 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
716 };
717 unsigned char img_int[] = {
718 0xf8, 0x94, /* cli */
719 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
720 0x78, 0x94, /* sei */
721 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
722 };
723
724 insn = EXTRACT_INSN (&prologue[vpc]);
725 vpc += 2;
726 if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */
727 locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2);
728 else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */
729 {
730 locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4);
731 insn = EXTRACT_INSN (&prologue[vpc]);
732 vpc += 2;
733 locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4) << 8);
734 }
735 else
736 return pc + vpc;
737
738 /* Scan the last part of the prologue. May not be present for interrupt
739 or signal handler functions, which is why we set the prologue type
740 when we saw the beginning of the prologue previously. */
741
742 if (memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0)
743 {
744 vpc += sizeof (img_sig);
745 }
746 else if (memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0)
747 {
748 vpc += sizeof (img_int);
749 }
750 if (memcmp (prologue + vpc, img, sizeof (img)) == 0)
751 {
752 info->prologue_type = AVR_PROLOGUE_NORMAL;
753 vpc += sizeof (img);
754 }
755
756 info->size += locals_size;
757
758 return pc + avr_scan_arg_moves (vpc, prologue);
759 }
760
761 /* If we got this far, we could not scan the prologue, so just return the pc
762 of the frame plus an adjustment for argument move insns. */
763
764 return pc + avr_scan_arg_moves (vpc, prologue);;
765 }
766
767 static CORE_ADDR
768 avr_skip_prologue (CORE_ADDR pc)
769 {
770 CORE_ADDR func_addr, func_end;
771 CORE_ADDR prologue_end = pc;
772
773 /* See what the symbol table says */
774
775 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
776 {
777 struct symtab_and_line sal;
778 struct avr_unwind_cache info = {0};
779 struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS];
780
781 info.saved_regs = saved_regs;
782
783 /* Need to run the prologue scanner to figure out if the function has a
784 prologue and possibly skip over moving arguments passed via registers
785 to other registers. */
786
787 prologue_end = avr_scan_prologue (pc, &info);
788
789 if (info.prologue_type == AVR_PROLOGUE_NONE)
790 return pc;
791 else
792 {
793 sal = find_pc_line (func_addr, 0);
794
795 if (sal.line != 0 && sal.end < func_end)
796 return sal.end;
797 }
798 }
799
800 /* Either we didn't find the start of this function (nothing we can do),
801 or there's no line info, or the line after the prologue is after
802 the end of the function (there probably isn't a prologue). */
803
804 return prologue_end;
805 }
806
807 /* Not all avr devices support the BREAK insn. Those that don't should treat
808 it as a NOP. Thus, it should be ok. Since the avr is currently a remote
809 only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */
810
811 static const unsigned char *
812 avr_breakpoint_from_pc (CORE_ADDR * pcptr, int *lenptr)
813 {
814 static unsigned char avr_break_insn [] = { 0x98, 0x95 };
815 *lenptr = sizeof (avr_break_insn);
816 return avr_break_insn;
817 }
818
819 /* Given a return value in `regbuf' with a type `valtype',
820 extract and copy its value into `valbuf'.
821
822 Return values are always passed via registers r25:r24:... */
823
824 static void
825 avr_extract_return_value (struct type *type, struct regcache *regcache,
826 gdb_byte *valbuf)
827 {
828 ULONGEST r24, r25;
829 ULONGEST c;
830 int len;
831 if (TYPE_LENGTH (type) == 1)
832 {
833 regcache_cooked_read_unsigned (regcache, 24, &c);
834 store_unsigned_integer (valbuf, 1, c);
835 }
836 else
837 {
838 int i;
839 /* The MSB of the return value is always in r25, calculate which
840 register holds the LSB. */
841 int lsb_reg = 25 - TYPE_LENGTH (type) + 1;
842
843 for (i=0; i< TYPE_LENGTH (type); i++)
844 {
845 regcache_cooked_read (regcache, lsb_reg + i,
846 (bfd_byte *) valbuf + i);
847 }
848 }
849 }
850
851 /* Put here the code to store, into fi->saved_regs, the addresses of
852 the saved registers of frame described by FRAME_INFO. This
853 includes special registers such as pc and fp saved in special ways
854 in the stack frame. sp is even more special: the address we return
855 for it IS the sp for the next frame. */
856
857 struct avr_unwind_cache *
858 avr_frame_unwind_cache (struct frame_info *next_frame,
859 void **this_prologue_cache)
860 {
861 CORE_ADDR pc;
862 ULONGEST prev_sp;
863 ULONGEST this_base;
864 struct avr_unwind_cache *info;
865 int i;
866
867 if ((*this_prologue_cache))
868 return (*this_prologue_cache);
869
870 info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache);
871 (*this_prologue_cache) = info;
872 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
873
874 info->size = 0;
875 info->prologue_type = AVR_PROLOGUE_NONE;
876
877 pc = frame_func_unwind (next_frame);
878
879 if ((pc > 0) && (pc < frame_pc_unwind (next_frame)))
880 avr_scan_prologue (pc, info);
881
882 if ((info->prologue_type != AVR_PROLOGUE_NONE)
883 && (info->prologue_type != AVR_PROLOGUE_MAIN))
884 {
885 ULONGEST high_base; /* High byte of FP */
886
887 /* The SP was moved to the FP. This indicates that a new frame
888 was created. Get THIS frame's FP value by unwinding it from
889 the next frame. */
890 frame_unwind_unsigned_register (next_frame, AVR_FP_REGNUM, &this_base);
891 frame_unwind_unsigned_register (next_frame, AVR_FP_REGNUM+1, &high_base);
892 this_base += (high_base << 8);
893
894 /* The FP points at the last saved register. Adjust the FP back
895 to before the first saved register giving the SP. */
896 prev_sp = this_base + info->size;
897 }
898 else
899 {
900 /* Assume that the FP is this frame's SP but with that pushed
901 stack space added back. */
902 frame_unwind_unsigned_register (next_frame, AVR_SP_REGNUM, &this_base);
903 prev_sp = this_base + info->size;
904 }
905
906 /* Add 1 here to adjust for the post-decrement nature of the push
907 instruction.*/
908 info->prev_sp = avr_make_saddr (prev_sp+1);
909
910 info->base = avr_make_saddr (this_base);
911
912 /* Adjust all the saved registers so that they contain addresses and not
913 offsets. */
914 for (i = 0; i < NUM_REGS - 1; i++)
915 if (info->saved_regs[i].addr)
916 {
917 info->saved_regs[i].addr = (info->prev_sp - info->saved_regs[i].addr);
918 }
919
920 /* Except for the main and startup code, the return PC is always saved on
921 the stack and is at the base of the frame. */
922
923 if (info->prologue_type != AVR_PROLOGUE_MAIN)
924 {
925 info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp;
926 }
927
928 /* The previous frame's SP needed to be computed. Save the computed
929 value. */
930 trad_frame_set_value (info->saved_regs, AVR_SP_REGNUM, info->prev_sp+1);
931
932 return info;
933 }
934
935 static CORE_ADDR
936 avr_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
937 {
938 ULONGEST pc;
939
940 frame_unwind_unsigned_register (next_frame, AVR_PC_REGNUM, &pc);
941
942 return avr_make_iaddr (pc);
943 }
944
945 /* Given a GDB frame, determine the address of the calling function's
946 frame. This will be used to create a new GDB frame struct. */
947
948 static void
949 avr_frame_this_id (struct frame_info *next_frame,
950 void **this_prologue_cache,
951 struct frame_id *this_id)
952 {
953 struct avr_unwind_cache *info
954 = avr_frame_unwind_cache (next_frame, this_prologue_cache);
955 CORE_ADDR base;
956 CORE_ADDR func;
957 struct frame_id id;
958
959 /* The FUNC is easy. */
960 func = frame_func_unwind (next_frame);
961
962 /* Hopefully the prologue analysis either correctly determined the
963 frame's base (which is the SP from the previous frame), or set
964 that base to "NULL". */
965 base = info->prev_sp;
966 if (base == 0)
967 return;
968
969 id = frame_id_build (base, func);
970 (*this_id) = id;
971 }
972
973 static void
974 avr_frame_prev_register (struct frame_info *next_frame,
975 void **this_prologue_cache,
976 int regnum, int *optimizedp,
977 enum lval_type *lvalp, CORE_ADDR *addrp,
978 int *realnump, gdb_byte *bufferp)
979 {
980 struct avr_unwind_cache *info
981 = avr_frame_unwind_cache (next_frame, this_prologue_cache);
982
983 if (regnum == AVR_PC_REGNUM)
984 {
985 if (trad_frame_addr_p (info->saved_regs, regnum))
986 {
987 *optimizedp = 0;
988 *lvalp = lval_memory;
989 *addrp = info->saved_regs[regnum].addr;
990 *realnump = -1;
991 if (bufferp != NULL)
992 {
993 /* Reading the return PC from the PC register is slightly
994 abnormal. register_size(AVR_PC_REGNUM) says it is 4 bytes,
995 but in reality, only two bytes (3 in upcoming mega256) are
996 stored on the stack.
997
998 Also, note that the value on the stack is an addr to a word
999 not a byte, so we will need to multiply it by two at some
1000 point.
1001
1002 And to confuse matters even more, the return address stored
1003 on the stack is in big endian byte order, even though most
1004 everything else about the avr is little endian. Ick! */
1005
1006 /* FIXME: number of bytes read here will need updated for the
1007 mega256 when it is available. */
1008
1009 ULONGEST pc;
1010 unsigned char tmp;
1011 unsigned char buf[2];
1012
1013 read_memory (info->saved_regs[regnum].addr, buf, 2);
1014
1015 /* Convert the PC read from memory as a big-endian to
1016 little-endian order. */
1017 tmp = buf[0];
1018 buf[0] = buf[1];
1019 buf[1] = tmp;
1020
1021 pc = (extract_unsigned_integer (buf, 2) * 2);
1022 store_unsigned_integer (bufferp,
1023 register_size (current_gdbarch, regnum),
1024 pc);
1025 }
1026 }
1027 }
1028 else
1029 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
1030 optimizedp, lvalp, addrp, realnump, bufferp);
1031 }
1032
1033 static const struct frame_unwind avr_frame_unwind = {
1034 NORMAL_FRAME,
1035 avr_frame_this_id,
1036 avr_frame_prev_register
1037 };
1038
1039 const struct frame_unwind *
1040 avr_frame_sniffer (struct frame_info *next_frame)
1041 {
1042 return &avr_frame_unwind;
1043 }
1044
1045 static CORE_ADDR
1046 avr_frame_base_address (struct frame_info *next_frame, void **this_cache)
1047 {
1048 struct avr_unwind_cache *info
1049 = avr_frame_unwind_cache (next_frame, this_cache);
1050
1051 return info->base;
1052 }
1053
1054 static const struct frame_base avr_frame_base = {
1055 &avr_frame_unwind,
1056 avr_frame_base_address,
1057 avr_frame_base_address,
1058 avr_frame_base_address
1059 };
1060
1061 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1062 dummy frame. The frame ID's base needs to match the TOS value
1063 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1064 breakpoint. */
1065
1066 static struct frame_id
1067 avr_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
1068 {
1069 ULONGEST base;
1070
1071 frame_unwind_unsigned_register (next_frame, AVR_SP_REGNUM, &base);
1072 return frame_id_build (avr_make_saddr (base), frame_pc_unwind (next_frame));
1073 }
1074
1075 /* When arguments must be pushed onto the stack, they go on in reverse
1076 order. The below implements a FILO (stack) to do this. */
1077
1078 struct stack_item
1079 {
1080 int len;
1081 struct stack_item *prev;
1082 void *data;
1083 };
1084
1085 static struct stack_item *
1086 push_stack_item (struct stack_item *prev, const bfd_byte *contents, int len)
1087 {
1088 struct stack_item *si;
1089 si = xmalloc (sizeof (struct stack_item));
1090 si->data = xmalloc (len);
1091 si->len = len;
1092 si->prev = prev;
1093 memcpy (si->data, contents, len);
1094 return si;
1095 }
1096
1097 static struct stack_item *pop_stack_item (struct stack_item *si);
1098 static struct stack_item *
1099 pop_stack_item (struct stack_item *si)
1100 {
1101 struct stack_item *dead = si;
1102 si = si->prev;
1103 xfree (dead->data);
1104 xfree (dead);
1105 return si;
1106 }
1107
1108 /* Setup the function arguments for calling a function in the inferior.
1109
1110 On the AVR architecture, there are 18 registers (R25 to R8) which are
1111 dedicated for passing function arguments. Up to the first 18 arguments
1112 (depending on size) may go into these registers. The rest go on the stack.
1113
1114 All arguments are aligned to start in even-numbered registers (odd-sized
1115 arguments, including char, have one free register above them). For example,
1116 an int in arg1 and a char in arg2 would be passed as such:
1117
1118 arg1 -> r25:r24
1119 arg2 -> r22
1120
1121 Arguments that are larger than 2 bytes will be split between two or more
1122 registers as available, but will NOT be split between a register and the
1123 stack. Arguments that go onto the stack are pushed last arg first (this is
1124 similar to the d10v). */
1125
1126 /* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be
1127 inaccurate.
1128
1129 An exceptional case exists for struct arguments (and possibly other
1130 aggregates such as arrays) -- if the size is larger than WORDSIZE bytes but
1131 not a multiple of WORDSIZE bytes. In this case the argument is never split
1132 between the registers and the stack, but instead is copied in its entirety
1133 onto the stack, AND also copied into as many registers as there is room
1134 for. In other words, space in registers permitting, two copies of the same
1135 argument are passed in. As far as I can tell, only the one on the stack is
1136 used, although that may be a function of the level of compiler
1137 optimization. I suspect this is a compiler bug. Arguments of these odd
1138 sizes are left-justified within the word (as opposed to arguments smaller
1139 than WORDSIZE bytes, which are right-justified).
1140
1141 If the function is to return an aggregate type such as a struct, the caller
1142 must allocate space into which the callee will copy the return value. In
1143 this case, a pointer to the return value location is passed into the callee
1144 in register R0, which displaces one of the other arguments passed in via
1145 registers R0 to R2. */
1146
1147 static CORE_ADDR
1148 avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1149 struct regcache *regcache, CORE_ADDR bp_addr,
1150 int nargs, struct value **args, CORE_ADDR sp,
1151 int struct_return, CORE_ADDR struct_addr)
1152 {
1153 int i;
1154 unsigned char buf[2];
1155 CORE_ADDR return_pc = avr_convert_iaddr_to_raw (bp_addr);
1156 int regnum = AVR_ARGN_REGNUM;
1157 struct stack_item *si = NULL;
1158
1159 #if 0
1160 /* FIXME: TRoth/2003-06-18: Not sure what to do when returning a struct. */
1161 if (struct_return)
1162 {
1163 fprintf_unfiltered (gdb_stderr, "struct_return: 0x%lx\n", struct_addr);
1164 write_register (argreg--, struct_addr & 0xff);
1165 write_register (argreg--, (struct_addr >>8) & 0xff);
1166 }
1167 #endif
1168
1169 for (i = 0; i < nargs; i++)
1170 {
1171 int last_regnum;
1172 int j;
1173 struct value *arg = args[i];
1174 struct type *type = check_typedef (value_type (arg));
1175 const bfd_byte *contents = value_contents (arg);
1176 int len = TYPE_LENGTH (type);
1177
1178 /* Calculate the potential last register needed. */
1179 last_regnum = regnum - (len + (len & 1));
1180
1181 /* If there are registers available, use them. Once we start putting
1182 stuff on the stack, all subsequent args go on stack. */
1183 if ((si == NULL) && (last_regnum >= 8))
1184 {
1185 ULONGEST val;
1186
1187 /* Skip a register for odd length args. */
1188 if (len & 1)
1189 regnum--;
1190
1191 val = extract_unsigned_integer (contents, len);
1192 for (j=0; j<len; j++)
1193 {
1194 regcache_cooked_write_unsigned (regcache, regnum--,
1195 val >> (8*(len-j-1)));
1196 }
1197 }
1198 /* No registers available, push the args onto the stack. */
1199 else
1200 {
1201 /* From here on, we don't care about regnum. */
1202 si = push_stack_item (si, contents, len);
1203 }
1204 }
1205
1206 /* Push args onto the stack. */
1207 while (si)
1208 {
1209 sp -= si->len;
1210 /* Add 1 to sp here to account for post decr nature of pushes. */
1211 write_memory (sp+1, si->data, si->len);
1212 si = pop_stack_item (si);
1213 }
1214
1215 /* Set the return address. For the avr, the return address is the BP_ADDR.
1216 Need to push the return address onto the stack noting that it needs to be
1217 in big-endian order on the stack. */
1218 buf[0] = (return_pc >> 8) & 0xff;
1219 buf[1] = return_pc & 0xff;
1220
1221 sp -= 2;
1222 write_memory (sp+1, buf, 2); /* Add one since pushes are post decr ops. */
1223
1224 /* Finally, update the SP register. */
1225 regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM,
1226 avr_convert_saddr_to_raw (sp));
1227
1228 return sp;
1229 }
1230
1231 /* Initialize the gdbarch structure for the AVR's. */
1232
1233 static struct gdbarch *
1234 avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1235 {
1236 struct gdbarch *gdbarch;
1237 struct gdbarch_tdep *tdep;
1238
1239 /* Find a candidate among the list of pre-declared architectures. */
1240 arches = gdbarch_list_lookup_by_info (arches, &info);
1241 if (arches != NULL)
1242 return arches->gdbarch;
1243
1244 /* None found, create a new architecture from the information provided. */
1245 tdep = XMALLOC (struct gdbarch_tdep);
1246 gdbarch = gdbarch_alloc (&info, tdep);
1247
1248 /* If we ever need to differentiate the device types, do it here. */
1249 switch (info.bfd_arch_info->mach)
1250 {
1251 case bfd_mach_avr1:
1252 case bfd_mach_avr2:
1253 case bfd_mach_avr3:
1254 case bfd_mach_avr4:
1255 case bfd_mach_avr5:
1256 break;
1257 }
1258
1259 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1260 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1261 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1262 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1263 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1264 set_gdbarch_addr_bit (gdbarch, 32);
1265
1266 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1267 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1268 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1269
1270 set_gdbarch_float_format (gdbarch, &floatformat_ieee_single_little);
1271 set_gdbarch_double_format (gdbarch, &floatformat_ieee_single_little);
1272 set_gdbarch_long_double_format (gdbarch, &floatformat_ieee_single_little);
1273
1274 set_gdbarch_read_pc (gdbarch, avr_read_pc);
1275 set_gdbarch_write_pc (gdbarch, avr_write_pc);
1276 set_gdbarch_read_sp (gdbarch, avr_read_sp);
1277
1278 set_gdbarch_num_regs (gdbarch, AVR_NUM_REGS);
1279
1280 set_gdbarch_sp_regnum (gdbarch, AVR_SP_REGNUM);
1281 set_gdbarch_pc_regnum (gdbarch, AVR_PC_REGNUM);
1282
1283 set_gdbarch_register_name (gdbarch, avr_register_name);
1284 set_gdbarch_register_type (gdbarch, avr_register_type);
1285
1286 set_gdbarch_extract_return_value (gdbarch, avr_extract_return_value);
1287 set_gdbarch_print_insn (gdbarch, print_insn_avr);
1288
1289 set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call);
1290
1291 set_gdbarch_address_to_pointer (gdbarch, avr_address_to_pointer);
1292 set_gdbarch_pointer_to_address (gdbarch, avr_pointer_to_address);
1293
1294 set_gdbarch_skip_prologue (gdbarch, avr_skip_prologue);
1295 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1296
1297 set_gdbarch_breakpoint_from_pc (gdbarch, avr_breakpoint_from_pc);
1298
1299 frame_unwind_append_sniffer (gdbarch, avr_frame_sniffer);
1300 frame_base_set_default (gdbarch, &avr_frame_base);
1301
1302 set_gdbarch_unwind_dummy_id (gdbarch, avr_unwind_dummy_id);
1303
1304 set_gdbarch_unwind_pc (gdbarch, avr_unwind_pc);
1305
1306 return gdbarch;
1307 }
1308
1309 /* Send a query request to the avr remote target asking for values of the io
1310 registers. If args parameter is not NULL, then the user has requested info
1311 on a specific io register [This still needs implemented and is ignored for
1312 now]. The query string should be one of these forms:
1313
1314 "Ravr.io_reg" -> reply is "NN" number of io registers
1315
1316 "Ravr.io_reg:addr,len" where addr is first register and len is number of
1317 registers to be read. The reply should be "<NAME>,VV;" for each io register
1318 where, <NAME> is a string, and VV is the hex value of the register.
1319
1320 All io registers are 8-bit. */
1321
1322 static void
1323 avr_io_reg_read_command (char *args, int from_tty)
1324 {
1325 LONGEST bufsiz = 0;
1326 gdb_byte *buf;
1327 char query[400];
1328 char *p;
1329 unsigned int nreg = 0;
1330 unsigned int val;
1331 int i, j, k, step;
1332
1333 /* Find out how many io registers the target has. */
1334 bufsiz = target_read_alloc (&current_target, TARGET_OBJECT_AVR,
1335 "avr.io_reg", &buf);
1336
1337 if (bufsiz <= 0)
1338 {
1339 fprintf_unfiltered (gdb_stderr,
1340 _("ERR: info io_registers NOT supported "
1341 "by current target\n"));
1342 return;
1343 }
1344
1345 if (sscanf (buf, "%x", &nreg) != 1)
1346 {
1347 fprintf_unfiltered (gdb_stderr,
1348 _("Error fetching number of io registers\n"));
1349 xfree (buf);
1350 return;
1351 }
1352
1353 xfree (buf);
1354
1355 reinitialize_more_filter ();
1356
1357 printf_unfiltered (_("Target has %u io registers:\n\n"), nreg);
1358
1359 /* only fetch up to 8 registers at a time to keep the buffer small */
1360 step = 8;
1361
1362 for (i = 0; i < nreg; i += step)
1363 {
1364 /* how many registers this round? */
1365 j = step;
1366 if ((i+j) >= nreg)
1367 j = nreg - i; /* last block is less than 8 registers */
1368
1369 snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j);
1370 bufsiz = target_read_alloc (&current_target, TARGET_OBJECT_AVR,
1371 query, &buf);
1372
1373 p = buf;
1374 for (k = i; k < (i + j); k++)
1375 {
1376 if (sscanf (p, "%[^,],%x;", query, &val) == 2)
1377 {
1378 printf_filtered ("[%02x] %-15s : %02x\n", k, query, val);
1379 while ((*p != ';') && (*p != '\0'))
1380 p++;
1381 p++; /* skip over ';' */
1382 if (*p == '\0')
1383 break;
1384 }
1385 }
1386
1387 xfree (buf);
1388 }
1389 }
1390
1391 extern initialize_file_ftype _initialize_avr_tdep; /* -Wmissing-prototypes */
1392
1393 void
1394 _initialize_avr_tdep (void)
1395 {
1396 register_gdbarch_init (bfd_arch_avr, avr_gdbarch_init);
1397
1398 /* Add a new command to allow the user to query the avr remote target for
1399 the values of the io space registers in a saner way than just using
1400 `x/NNNb ADDR`. */
1401
1402 /* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr
1403 io_registers' to signify it is not available on other platforms. */
1404
1405 add_cmd ("io_registers", class_info, avr_io_reg_read_command,
1406 _("query remote avr target for io space register values"),
1407 &infolist);
1408 }