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[thirdparty/binutils-gdb.git] / gdb / config / mn10200 / tm-mn10200.h
1 /* Parameters for execution on a Matsushita mn10200 processor.
2 Copyright 1997 Free Software Foundation, Inc.
3
4 Contributed by Geoffrey Noer <noer@cygnus.com>
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 /* The mn10200 is little endian. */
24 #define TARGET_BYTE_ORDER LITTLE_ENDIAN
25
26 /* ints are only 16bits on the mn10200. */
27 #undef TARGET_INT_BIT
28 #define TARGET_INT_BIT 16
29
30 /* The mn10200 doesn't support long long types. */
31 #undef TARGET_LONG_LONG_BIT
32 #define TARGET_LONG_LONG_BIT 32
33
34 /* The mn10200 doesn't support double or long double either. */
35 #undef TARGET_DOUBLE_BIT
36 #undef TARGET_LONG_DOUBLE_BIT
37 #define TARGET_DOUBLE_BIT 32
38 #define TARGET_LONG_DOUBLE_BIT 32
39
40 /* Not strictly correct, but the machine independent code is not
41 ready to handle any of the basic sizes not being a power of two. */
42 #undef TARGET_PTR_BIT
43 #define TARGET_PTR_BIT 32
44
45 /* The mn10200 really has 24 bit registers but the simulator reads/writes
46 them as 32bit values, so we claim they're 32bits each. This may have
47 to be tweaked if the Matsushita emulator/board really deals with them
48 as 24bits each. */
49 #define REGISTER_SIZE 4
50
51 #define MAX_REGISTER_RAW_SIZE REGISTER_SIZE
52 #define NUM_REGS 11
53
54 #define REGISTER_BYTES (NUM_REGS * REGISTER_SIZE)
55
56 #define REGISTER_NAMES \
57 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "sp", \
58 "pc", "mdr", "psw"}
59
60 #define FP_REGNUM 6
61 #define SP_REGNUM 7
62 #define PC_REGNUM 8
63 #define MDR_REGNUM 9
64 #define PSW_REGNUM 10
65
66 /* Treat the registers as 32bit values. */
67 #define REGISTER_VIRTUAL_TYPE(REG) builtin_type_long
68
69 #define REGISTER_BYTE(REG) ((REG) * REGISTER_SIZE)
70 #define REGISTER_VIRTUAL_SIZE(REG) REGISTER_SIZE
71 #define REGISTER_RAW_SIZE(REG) REGISTER_SIZE
72
73 #define MAX_REGISTER_VIRTUAL_SIZE REGISTER_SIZE
74
75 /* The breakpoint instruction must be the same size as te smallest
76 instruction in the instruction set.
77
78 The Matsushita mn10x00 processors have single byte instructions
79 so we need a single byte breakpoint. Matsushita hasn't defined
80 one, so we defined it ourselves.
81
82 0xff is the only available single byte insn left on the mn10200. */
83 #define BREAKPOINT {0xff}
84
85 #define FUNCTION_START_OFFSET 0
86
87 #define DECR_PC_AFTER_BREAK 0
88
89 /* Stacks grow the normal way. */
90 #define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
91
92 #define SAVED_PC_AFTER_CALL(frame) \
93 (read_memory_integer (read_register (SP_REGNUM), REGISTER_SIZE) & 0xffffff)
94
95 #ifdef __STDC__
96 struct frame_info;
97 struct frame_saved_regs;
98 struct type;
99 struct value;
100 #endif
101
102 #define EXTRA_FRAME_INFO struct frame_saved_regs fsr; int status; int stack_size;
103
104 extern void mn10200_init_extra_frame_info PARAMS ((struct frame_info *));
105 #define INIT_EXTRA_FRAME_INFO(fromleaf, fi) mn10200_init_extra_frame_info (fi)
106 #define INIT_FRAME_PC(x,y)
107
108 extern void mn10200_frame_find_saved_regs PARAMS ((struct frame_info *,
109 struct frame_saved_regs *));
110 #define FRAME_FIND_SAVED_REGS(fi, regaddr) regaddr = fi->fsr
111
112 extern CORE_ADDR mn10200_frame_chain PARAMS ((struct frame_info *));
113 #define FRAME_CHAIN(fi) mn10200_frame_chain (fi)
114 #define FRAME_CHAIN_VALID(FP, FI) generic_frame_chain_valid (FP, FI)
115
116 extern CORE_ADDR mn10200_find_callers_reg PARAMS ((struct frame_info *, int));
117 extern CORE_ADDR mn10200_frame_saved_pc PARAMS ((struct frame_info *));
118 #define FRAME_SAVED_PC(FI) (mn10200_frame_saved_pc (FI))
119
120 /* Extract from an array REGBUF containing the (raw) register state
121 a function return value of type TYPE, and copy that, in virtual format,
122 into VALBUF. */
123
124 #define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
125 { \
126 if (TYPE_LENGTH (TYPE) > 8) \
127 abort (); \
128 else if (TYPE_LENGTH (TYPE) > 2 && TYPE_CODE (TYPE) != TYPE_CODE_PTR) \
129 { \
130 memcpy (VALBUF, REGBUF + REGISTER_BYTE (0), 2); \
131 memcpy (VALBUF + 2, REGBUF + REGISTER_BYTE (1), 2); \
132 } \
133 else if (TYPE_CODE (TYPE) == TYPE_CODE_PTR)\
134 { \
135 memcpy (VALBUF, REGBUF + REGISTER_BYTE (4), TYPE_LENGTH (TYPE)); \
136 } \
137 else \
138 { \
139 memcpy (VALBUF, REGBUF + REGISTER_BYTE (0), TYPE_LENGTH (TYPE)); \
140 } \
141 }
142
143 #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
144 extract_address (REGBUF + REGISTER_BYTE (4), \
145 REGISTER_RAW_SIZE (4))
146
147 #define STORE_RETURN_VALUE(TYPE, VALBUF) \
148 { \
149 if (TYPE_LENGTH (TYPE) > 8) \
150 abort (); \
151 else if (TYPE_LENGTH (TYPE) > 2 && TYPE_CODE (TYPE) != TYPE_CODE_PTR) \
152 { \
153 write_register_bytes (REGISTER_BYTE (0), VALBUF, 2); \
154 write_register_bytes (REGISTER_BYTE (1), VALBUF + 2, 2); \
155 } \
156 else if (TYPE_CODE (TYPE) == TYPE_CODE_PTR)\
157 { \
158 write_register_bytes (REGISTER_BYTE (4), VALBUF, TYPE_LENGTH (TYPE)); \
159 } \
160 else \
161 { \
162 write_register_bytes (REGISTER_BYTE (0), VALBUF, TYPE_LENGTH (TYPE)); \
163 } \
164 }
165
166 #define STORE_STRUCT_RETURN(STRUCT_ADDR, SP) \
167 (SP) = mn10200_store_struct_return (STRUCT_ADDR, SP)
168
169 extern CORE_ADDR mn10200_skip_prologue PARAMS ((CORE_ADDR));
170 #define SKIP_PROLOGUE(pc) (mn10200_skip_prologue (pc))
171
172 #define FRAME_ARGS_SKIP 0
173
174 #define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
175 #define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
176 #define FRAME_NUM_ARGS(fi) (-1)
177
178 extern void mn10200_pop_frame PARAMS ((struct frame_info *));
179 #define POP_FRAME mn10200_pop_frame (get_current_frame ())
180
181 #define USE_GENERIC_DUMMY_FRAMES 1
182 #define CALL_DUMMY {0}
183 #define CALL_DUMMY_START_OFFSET (0)
184 #define CALL_DUMMY_BREAKPOINT_OFFSET (0)
185 #define CALL_DUMMY_LOCATION AT_ENTRY_POINT
186 #define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP)
187 #define CALL_DUMMY_ADDRESS() entry_point_address ()
188
189 extern CORE_ADDR mn10200_push_return_address PARAMS ((CORE_ADDR, CORE_ADDR));
190 #define PUSH_RETURN_ADDRESS(PC, SP) mn10200_push_return_address (PC, SP)
191
192 #define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
193
194 extern CORE_ADDR
195 mn10200_push_arguments PARAMS ((int, struct value **, CORE_ADDR,
196 unsigned char, CORE_ADDR));
197 #define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
198 (mn10200_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR))
199
200 #define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP)
201
202 #define REG_STRUCT_HAS_ADDR(gcc_p,TYPE) \
203 (TYPE_LENGTH (TYPE) > 8)
204
205 extern use_struct_convention_fn mn10200_use_struct_convention;
206 #define USE_STRUCT_CONVENTION(GCC_P, TYPE) mn10200_use_struct_convention (GCC_P, TYPE)
207
208 /* Override the default get_saved_register function with
209 one that takes account of generic CALL_DUMMY frames. */
210 #define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
211 generic_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
212
213 /* Define this for Wingdb */
214 #define TARGET_MN10200