]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - gdb/config/mn10200/tm-mn10200.h
Wed Apr 23 11:18:45 1997 Jeffrey A Law (law@cygnus.com)
[thirdparty/binutils-gdb.git] / gdb / config / mn10200 / tm-mn10200.h
1 /* Parameters for execution on a Matsushita mn10200 processor.
2 Copyright 1997 Free Software Foundation, Inc.
3
4 Contributed by Geoffrey Noer <noer@cygnus.com>
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21
22 /* The mn10200 is little endian. */
23 #define TARGET_BYTE_ORDER LITTLE_ENDIAN
24
25 /* ints are only 16bits on the mn10200. */
26 #undef TARGET_INT_BIT
27 #define TARGET_INT_BIT 16
28
29 /* The mn10200 doesn't support long long types. */
30 #undef TARGET_LONG_LONG_BIT
31 #define TARGET_LONG_LONG_BIT 32
32
33 /* The mn10200 doesn't support double or long double either. */
34 #undef TARGET_DOUBLE_BIT
35 #undef TARGET_LONG_DOUBLE_BIT
36 #define TARGET_DOUBLE_BIT 32
37 #define TARGET_LONG_DOUBLE_BIT 32
38
39 /* Not strictly correct, but the machine independent code is not
40 ready to handle any of the basic sizes not being a power of two. */
41 #undef TARGET_PTR_BIT
42 #define TARGET_PTR_BIT 32
43
44 /* The mn10200 really has 24 bit registers but the simulator reads/writes
45 them as 32bit values, so we claim they're 32bits each. This may have
46 to be tweaked if the Matsushita emulator/board really deals with them
47 as 24bits each. */
48 #define REGISTER_SIZE 4
49
50 #define MAX_REGISTER_RAW_SIZE REGISTER_SIZE
51 #define NUM_REGS 11
52
53 #define REGISTER_BYTES (NUM_REGS * REGISTER_SIZE)
54
55 #define REGISTER_NAMES \
56 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "sp", \
57 "pc", "mdr", "psw"}
58
59 #define FP_REGNUM 6
60 #define SP_REGNUM 7
61 #define PC_REGNUM 8
62 #define MDR_REGNUM 9
63 #define PSW_REGNUM 10
64
65 /* Treat the registers as 32bit values. */
66 #define REGISTER_VIRTUAL_TYPE(REG) builtin_type_long
67
68 #define REGISTER_BYTE(REG) ((REG) * REGISTER_SIZE)
69 #define REGISTER_VIRTUAL_SIZE(REG) REGISTER_SIZE
70 #define REGISTER_RAW_SIZE(REG) REGISTER_SIZE
71
72 #define MAX_REGISTER_VIRTUAL_SIZE REGISTER_SIZE
73
74 /* The breakpoint instruction must be the same size as te smallest
75 instruction in the instruction set.
76
77 The Matsushita mn10x00 processors have single byte instructions
78 so we need a single byte breakpoint. Matsushita hasn't defined
79 one, so we defined it ourselves.
80
81 0xff is the only available single byte insn left on the mn10200. */
82 #define BREAKPOINT {0xff}
83
84 #define FUNCTION_START_OFFSET 0
85
86 #define DECR_PC_AFTER_BREAK 0
87
88 /* Stacks grow the normal way. */
89 #define INNER_THAN <
90
91 #define SAVED_PC_AFTER_CALL(frame) \
92 (read_memory_integer (read_register (SP_REGNUM), REGISTER_SIZE) & 0xffff)
93
94 #ifdef __STDC__
95 struct frame_info;
96 struct frame_saved_regs;
97 struct type;
98 struct value;
99 #endif
100
101 #define EXTRA_FRAME_INFO struct frame_saved_regs fsr; int status; int stack_size;
102
103 extern void mn10200_init_extra_frame_info PARAMS ((struct frame_info *));
104 #define INIT_EXTRA_FRAME_INFO(fromleaf, fi) mn10200_init_extra_frame_info (fi)
105 #define INIT_FRAME_PC(x,y)
106
107 extern void mn10200_frame_find_saved_regs PARAMS ((struct frame_info *,
108 struct frame_saved_regs *));
109 #define FRAME_FIND_SAVED_REGS(fi, regaddr) regaddr = fi->fsr
110
111 extern CORE_ADDR mn10200_frame_chain PARAMS ((struct frame_info *));
112 #define FRAME_CHAIN(fi) mn10200_frame_chain (fi)
113 #define FRAME_CHAIN_VALID(FP, FI) generic_frame_chain_valid (FP, FI)
114
115 extern CORE_ADDR mn10200_find_callers_reg PARAMS ((struct frame_info *, int));
116 extern CORE_ADDR mn10200_frame_saved_pc PARAMS ((struct frame_info *));
117 #define FRAME_SAVED_PC(FI) (mn10200_frame_saved_pc (FI))
118
119 /* Extract from an array REGBUF containing the (raw) register state
120 a function return value of type TYPE, and copy that, in virtual format,
121 into VALBUF. */
122
123 #define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
124 { \
125 if (TYPE_LENGTH (TYPE) > 8) \
126 abort (); \
127 else if (TYPE_LENGTH (TYPE) > 2 && TYPE_CODE (TYPE) != TYPE_CODE_PTR) \
128 { \
129 memcpy (VALBUF, REGBUF + REGISTER_BYTE (0), 2); \
130 memcpy (VALBUF + 2, REGBUF + REGISTER_BYTE (1), 2); \
131 } \
132 else if (TYPE_CODE (TYPE) == TYPE_CODE_PTR)\
133 { \
134 memcpy (VALBUF, REGBUF + REGISTER_BYTE (4), TYPE_LENGTH (TYPE)); \
135 } \
136 else \
137 { \
138 memcpy (VALBUF, REGBUF + REGISTER_BYTE (0), TYPE_LENGTH (TYPE)); \
139 } \
140 }
141
142 #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
143 extract_address (REGBUF + REGISTER_BYTE (0), \
144 REGISTER_RAW_SIZE (0))
145
146 #define STORE_RETURN_VALUE(TYPE, VALBUF) \
147 { \
148 if (TYPE_LENGTH (TYPE) > 8) \
149 abort (); \
150 else if (TYPE_LENGTH (TYPE) > 2 && TYPE_CODE (TYPE) != TYPE_CODE_PTR) \
151 { \
152 write_register_bytes (REGISTER_BYTE (0), VALBUF, 2); \
153 write_register_bytes (REGISTER_BYTE (1), VALBUF + 2, 2); \
154 } \
155 else if (TYPE_CODE (TYPE) == TYPE_CODE_PTR)\
156 { \
157 write_register_bytes (REGISTER_BYTE (4), VALBUF, TYPE_LENGTH (TYPE)); \
158 } \
159 else \
160 { \
161 write_register_bytes (REGISTER_BYTE (0), VALBUF, TYPE_LENGTH (TYPE)); \
162 } \
163 }
164
165 #define STORE_STRUCT_RETURN(STRUCT_ADDR, SP) \
166 (SP) = mn10200_store_struct_return (STRUCT_ADDR, SP)
167
168 extern CORE_ADDR mn10200_skip_prologue PARAMS ((CORE_ADDR));
169 #define SKIP_PROLOGUE(pc) pc = mn10200_skip_prologue (pc)
170
171 #define FRAME_ARGS_SKIP 0
172
173 #define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
174 #define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
175 #define FRAME_NUM_ARGS(val, fi) ((val) = -1)
176
177 extern void mn10200_pop_frame PARAMS ((struct frame_info *));
178 #define POP_FRAME mn10200_pop_frame (get_current_frame ())
179
180 #define USE_GENERIC_DUMMY_FRAMES
181 #define CALL_DUMMY {0}
182 #define CALL_DUMMY_START_OFFSET (0)
183 #define CALL_DUMMY_BREAKPOINT_OFFSET (0)
184 #define CALL_DUMMY_LOCATION AT_ENTRY_POINT
185 #define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP)
186 #define CALL_DUMMY_ADDRESS() entry_point_address ()
187
188 extern CORE_ADDR mn10200_push_return_address PARAMS ((CORE_ADDR, CORE_ADDR));
189 #define PUSH_RETURN_ADDRESS(PC, SP) mn10200_push_return_address (PC, SP)
190
191 #define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
192
193 extern CORE_ADDR
194 mn10200_push_arguments PARAMS ((int, struct value **, CORE_ADDR,
195 unsigned char, CORE_ADDR));
196 #define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
197 (SP) = mn10200_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)
198
199 #define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP)
200
201 #define REG_STRUCT_HAS_ADDR(gcc_p,TYPE) \
202 (TYPE_LENGTH (TYPE) > 8)
203
204 #define USE_STRUCT_CONVENTION(GCC_P, TYPE) \
205 (TYPE_NFIELDS (TYPE) > 1 || TYPE_LENGTH (TYPE) > 8)
206
207 /* Override the default get_saved_register function with
208 one that takes account of generic CALL_DUMMY frames. */
209 #define GET_SAVED_REGISTER
210
211 /* Define this for Wingdb */
212 #define TARGET_MN10200