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[thirdparty/binutils-gdb.git] / gdb / csky-tdep.c
1 /* Target-dependent code for the CSKY architecture, for GDB.
2
3 Copyright (C) 2010-2022 Free Software Foundation, Inc.
4
5 Contributed by C-SKY Microsystems and Mentor Graphics.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "gdbsupport/gdb_assert.h"
24 #include "frame.h"
25 #include "inferior.h"
26 #include "symtab.h"
27 #include "value.h"
28 #include "gdbcmd.h"
29 #include "language.h"
30 #include "gdbcore.h"
31 #include "symfile.h"
32 #include "objfiles.h"
33 #include "gdbtypes.h"
34 #include "target.h"
35 #include "arch-utils.h"
36 #include "regcache.h"
37 #include "osabi.h"
38 #include "block.h"
39 #include "reggroups.h"
40 #include "elf/csky.h"
41 #include "elf-bfd.h"
42 #include "symcat.h"
43 #include "sim-regno.h"
44 #include "dis-asm.h"
45 #include "frame-unwind.h"
46 #include "frame-base.h"
47 #include "trad-frame.h"
48 #include "infcall.h"
49 #include "floatformat.h"
50 #include "remote.h"
51 #include "target-descriptions.h"
52 #include "dwarf2/frame.h"
53 #include "user-regs.h"
54 #include "valprint.h"
55 #include "csky-tdep.h"
56 #include "regset.h"
57 #include "opcode/csky.h"
58 #include <algorithm>
59 #include <vector>
60
61 /* Control debugging information emitted in this file. */
62 static bool csky_debug = false;
63
64 static struct reggroup *cr_reggroup;
65 static struct reggroup *fr_reggroup;
66 static struct reggroup *vr_reggroup;
67 static struct reggroup *mmu_reggroup;
68 static struct reggroup *prof_reggroup;
69
70 /* Convenience function to print debug messages in prologue analysis. */
71
72 static void
73 print_savedreg_msg (int regno, int offsets[], bool print_continuing)
74 {
75 fprintf_unfiltered (gdb_stdlog, "csky: r%d saved at offset 0x%x\n",
76 regno, offsets[regno]);
77 if (print_continuing)
78 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
79 }
80
81 /* Check whether the instruction at ADDR is 16-bit or not. */
82
83 static int
84 csky_pc_is_csky16 (struct gdbarch *gdbarch, CORE_ADDR addr)
85 {
86 gdb_byte target_mem[2];
87 int status;
88 unsigned int insn;
89 int ret = 1;
90 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
91
92 status = target_read_memory (addr, target_mem, 2);
93 /* Assume a 16-bit instruction if we can't read memory. */
94 if (status)
95 return 1;
96
97 /* Get instruction from memory. */
98 insn = extract_unsigned_integer (target_mem, 2, byte_order);
99 if ((insn & CSKY_32_INSN_MASK) == CSKY_32_INSN_MASK)
100 ret = 0;
101 else if (insn == CSKY_BKPT_INSN)
102 {
103 /* Check for 32-bit bkpt instruction which is all 0. */
104 status = target_read_memory (addr + 2, target_mem, 2);
105 if (status)
106 return 1;
107
108 insn = extract_unsigned_integer (target_mem, 2, byte_order);
109 if (insn == CSKY_BKPT_INSN)
110 ret = 0;
111 }
112 return ret;
113 }
114
115 /* Get one instruction at ADDR and store it in INSN. Return 2 for
116 a 16-bit instruction or 4 for a 32-bit instruction. */
117
118 static int
119 csky_get_insn (struct gdbarch *gdbarch, CORE_ADDR addr, unsigned int *insn)
120 {
121 gdb_byte target_mem[2];
122 unsigned int insn_type;
123 int status;
124 int insn_len = 2;
125 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
126
127 status = target_read_memory (addr, target_mem, 2);
128 if (status)
129 memory_error (TARGET_XFER_E_IO, addr);
130
131 insn_type = extract_unsigned_integer (target_mem, 2, byte_order);
132 if (CSKY_32_INSN_MASK == (insn_type & CSKY_32_INSN_MASK))
133 {
134 status = target_read_memory (addr + 2, target_mem, 2);
135 if (status)
136 memory_error (TARGET_XFER_E_IO, addr);
137 insn_type = ((insn_type << 16)
138 | extract_unsigned_integer (target_mem, 2, byte_order));
139 insn_len = 4;
140 }
141 *insn = insn_type;
142 return insn_len;
143 }
144
145 /* Implement the read_pc gdbarch method. */
146
147 static CORE_ADDR
148 csky_read_pc (readable_regcache *regcache)
149 {
150 ULONGEST pc;
151 regcache->cooked_read (CSKY_PC_REGNUM, &pc);
152 return pc;
153 }
154
155 /* Implement the write_pc gdbarch method. */
156
157 static void
158 csky_write_pc (regcache *regcache, CORE_ADDR val)
159 {
160 regcache_cooked_write_unsigned (regcache, CSKY_PC_REGNUM, val);
161 }
162
163 /* C-Sky ABI register names. */
164
165 static const char * const csky_register_names[] =
166 {
167 /* General registers 0 - 31. */
168 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
169 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
170 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
171 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
172
173 /* DSP hilo registers 36 and 37. */
174 "", "", "", "", "hi", "lo", "", "",
175
176 /* FPU/VPU general registers 40 - 71. */
177 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
178 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
179 "vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7",
180 "vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15",
181
182 /* Program counter 72. */
183 "pc",
184
185 /* Optional registers (ar) 73 - 88. */
186 "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7",
187 "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
188
189 /* Control registers (cr) 89 - 119. */
190 "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
191 "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15",
192 "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
193 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
194
195 /* FPU/VPU control registers 121 ~ 123. */
196 /* User sp 127. */
197 "fid", "fcr", "fesr", "", "", "", "usp",
198
199 /* MMU control registers: 128 - 136. */
200 "mcr0", "mcr2", "mcr3", "mcr4", "mcr6", "mcr8", "mcr29", "mcr30",
201 "mcr31", "", "", "",
202
203 /* Profiling control registers 140 - 143. */
204 /* Profiling software general registers 144 - 157. */
205 "profcr0", "profcr1", "profcr2", "profcr3", "profsgr0", "profsgr1",
206 "profsgr2", "profsgr3", "profsgr4", "profsgr5", "profsgr6", "profsgr7",
207 "profsgr8", "profsgr9", "profsgr10","profsgr11","profsgr12", "profsgr13",
208 "", "",
209
210 /* Profiling architecture general registers 160 - 174. */
211 "profagr0", "profagr1", "profagr2", "profagr3", "profagr4", "profagr5",
212 "profagr6", "profagr7", "profagr8", "profagr9", "profagr10","profagr11",
213 "profagr12","profagr13","profagr14", "",
214
215 /* Profiling extension general registers 176 - 188. */
216 "profxgr0", "profxgr1", "profxgr2", "profxgr3", "profxgr4", "profxgr5",
217 "profxgr6", "profxgr7", "profxgr8", "profxgr9", "profxgr10","profxgr11",
218 "profxgr12",
219
220 /* Control registers in bank1. */
221 "", "", "", "", "", "", "", "",
222 "", "", "", "", "", "", "", "",
223 "cp1cr16", "cp1cr17", "cp1cr18", "cp1cr19", "cp1cr20", "", "", "",
224 "", "", "", "", "", "", "", "",
225
226 /* Control registers in bank3 (ICE). */
227 "sepsr", "sevbr", "seepsr", "", "seepc", "", "nsssp", "seusp",
228 "sedcr", "", "", "", "", "", "", "",
229 "", "", "", "", "", "", "", "",
230 "", "", "", "", "", "", "", ""
231 };
232
233 /* Implement the register_name gdbarch method. */
234
235 static const char *
236 csky_register_name (struct gdbarch *gdbarch, int reg_nr)
237 {
238 if (reg_nr < 0)
239 return NULL;
240
241 if (reg_nr >= gdbarch_num_regs (gdbarch))
242 return NULL;
243
244 return csky_register_names[reg_nr];
245 }
246
247 /* Construct vector type for vrx registers. */
248
249 static struct type *
250 csky_vector_type (struct gdbarch *gdbarch)
251 {
252 const struct builtin_type *bt = builtin_type (gdbarch);
253
254 struct type *t;
255
256 t = arch_composite_type (gdbarch, "__gdb_builtin_type_vec128i",
257 TYPE_CODE_UNION);
258
259 append_composite_type_field (t, "u32",
260 init_vector_type (bt->builtin_int32, 4));
261 append_composite_type_field (t, "u16",
262 init_vector_type (bt->builtin_int16, 8));
263 append_composite_type_field (t, "u8",
264 init_vector_type (bt->builtin_int8, 16));
265
266 t->set_is_vector (true);
267 t->set_name ("builtin_type_vec128i");
268
269 return t;
270 }
271
272 /* Return the GDB type object for the "standard" data type
273 of data in register N. */
274
275 static struct type *
276 csky_register_type (struct gdbarch *gdbarch, int reg_nr)
277 {
278 /* PC, EPC, FPC is a text pointer. */
279 if ((reg_nr == CSKY_PC_REGNUM) || (reg_nr == CSKY_EPC_REGNUM)
280 || (reg_nr == CSKY_FPC_REGNUM))
281 return builtin_type (gdbarch)->builtin_func_ptr;
282
283 /* VBR is a data pointer. */
284 if (reg_nr == CSKY_VBR_REGNUM)
285 return builtin_type (gdbarch)->builtin_data_ptr;
286
287 /* Float register has 64 bits, and only in ck810. */
288 if ((reg_nr >=CSKY_FR0_REGNUM) && (reg_nr <= CSKY_FR0_REGNUM + 15))
289 return arch_float_type (gdbarch, 64, "builtin_type_csky_ext",
290 floatformats_ieee_double);
291
292 /* Vector register has 128 bits, and only in ck810. */
293 if ((reg_nr >= CSKY_VR0_REGNUM) && (reg_nr <= CSKY_VR0_REGNUM + 15))
294 return csky_vector_type (gdbarch);
295
296 /* Profiling general register has 48 bits, we use 64bit. */
297 if ((reg_nr >= CSKY_PROFGR_REGNUM) && (reg_nr <= CSKY_PROFGR_REGNUM + 44))
298 return builtin_type (gdbarch)->builtin_uint64;
299
300 if (reg_nr == CSKY_SP_REGNUM)
301 return builtin_type (gdbarch)->builtin_data_ptr;
302
303 /* Others are 32 bits. */
304 return builtin_type (gdbarch)->builtin_int32;
305 }
306
307 /* Data structure to marshall items in a dummy stack frame when
308 calling a function in the inferior. */
309
310 struct stack_item
311 {
312 stack_item (int len_, const gdb_byte *data_)
313 : len (len_), data (data_)
314 {}
315
316 int len;
317 const gdb_byte *data;
318 };
319
320 /* Implement the push_dummy_call gdbarch method. */
321
322 static CORE_ADDR
323 csky_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
324 struct regcache *regcache, CORE_ADDR bp_addr,
325 int nargs, struct value **args, CORE_ADDR sp,
326 function_call_return_method return_method,
327 CORE_ADDR struct_addr)
328 {
329 int argnum;
330 int argreg = CSKY_ABI_A0_REGNUM;
331 int last_arg_regnum = CSKY_ABI_LAST_ARG_REGNUM;
332 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
333 std::vector<stack_item> stack_items;
334
335 /* Set the return address. For CSKY, the return breakpoint is
336 always at BP_ADDR. */
337 regcache_cooked_write_unsigned (regcache, CSKY_LR_REGNUM, bp_addr);
338
339 /* The struct_return pointer occupies the first parameter
340 passing register. */
341 if (return_method == return_method_struct)
342 {
343 if (csky_debug)
344 {
345 fprintf_unfiltered (gdb_stdlog,
346 "csky: struct return in %s = %s\n",
347 gdbarch_register_name (gdbarch, argreg),
348 paddress (gdbarch, struct_addr));
349 }
350 regcache_cooked_write_unsigned (regcache, argreg, struct_addr);
351 argreg++;
352 }
353
354 /* Put parameters into argument registers in REGCACHE.
355 In ABI argument registers are r0 through r3. */
356 for (argnum = 0; argnum < nargs; argnum++)
357 {
358 int len;
359 struct type *arg_type;
360 const gdb_byte *val;
361
362 arg_type = check_typedef (value_type (args[argnum]));
363 len = TYPE_LENGTH (arg_type);
364 val = value_contents (args[argnum]).data ();
365
366 /* Copy the argument to argument registers or the dummy stack.
367 Large arguments are split between registers and stack.
368
369 If len < 4, there is no need to worry about endianness since
370 the arguments will always be stored in the low address. */
371 if (len < 4)
372 {
373 CORE_ADDR regval
374 = extract_unsigned_integer (val, len, byte_order);
375 regcache_cooked_write_unsigned (regcache, argreg, regval);
376 argreg++;
377 }
378 else
379 {
380 while (len > 0)
381 {
382 int partial_len = len < 4 ? len : 4;
383 if (argreg <= last_arg_regnum)
384 {
385 /* The argument is passed in an argument register. */
386 CORE_ADDR regval
387 = extract_unsigned_integer (val, partial_len,
388 byte_order);
389 if (byte_order == BFD_ENDIAN_BIG)
390 regval <<= (4 - partial_len) * 8;
391
392 /* Put regval into register in REGCACHE. */
393 regcache_cooked_write_unsigned (regcache, argreg,
394 regval);
395 argreg++;
396 }
397 else
398 {
399 /* The argument should be pushed onto the dummy stack. */
400 stack_items.emplace_back (4, val);
401 }
402 len -= partial_len;
403 val += partial_len;
404 }
405 }
406 }
407
408 /* Transfer the dummy stack frame to the target. */
409 std::vector<stack_item>::reverse_iterator iter;
410 for (iter = stack_items.rbegin (); iter != stack_items.rend (); ++iter)
411 {
412 sp -= iter->len;
413 write_memory (sp, iter->data, iter->len);
414 }
415
416 /* Finally, update the SP register. */
417 regcache_cooked_write_unsigned (regcache, CSKY_SP_REGNUM, sp);
418 return sp;
419 }
420
421 /* Implement the return_value gdbarch method. */
422
423 static enum return_value_convention
424 csky_return_value (struct gdbarch *gdbarch, struct value *function,
425 struct type *valtype, struct regcache *regcache,
426 gdb_byte *readbuf, const gdb_byte *writebuf)
427 {
428 CORE_ADDR regval;
429 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
430 int len = TYPE_LENGTH (valtype);
431 unsigned int ret_regnum = CSKY_RET_REGNUM;
432
433 /* Csky abi specifies that return values larger than 8 bytes
434 are put on the stack. */
435 if (len > 8)
436 return RETURN_VALUE_STRUCT_CONVENTION;
437 else
438 {
439 if (readbuf != NULL)
440 {
441 ULONGEST tmp;
442 /* By using store_unsigned_integer we avoid having to do
443 anything special for small big-endian values. */
444 regcache->cooked_read (ret_regnum, &tmp);
445 store_unsigned_integer (readbuf, (len > 4 ? 4 : len),
446 byte_order, tmp);
447 if (len > 4)
448 {
449 regcache->cooked_read (ret_regnum + 1, &tmp);
450 store_unsigned_integer (readbuf + 4, 4, byte_order, tmp);
451 }
452 }
453 if (writebuf != NULL)
454 {
455 regval = extract_unsigned_integer (writebuf, len > 4 ? 4 : len,
456 byte_order);
457 regcache_cooked_write_unsigned (regcache, ret_regnum, regval);
458 if (len > 4)
459 {
460 regval = extract_unsigned_integer ((gdb_byte *) writebuf + 4,
461 4, byte_order);
462 regcache_cooked_write_unsigned (regcache, ret_regnum + 1,
463 regval);
464 }
465
466 }
467 return RETURN_VALUE_REGISTER_CONVENTION;
468 }
469 }
470
471 /* Implement the frame_align gdbarch method.
472
473 Adjust the address downward (direction of stack growth) so that it
474 is correctly aligned for a new stack frame. */
475
476 static CORE_ADDR
477 csky_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
478 {
479 return align_down (addr, 4);
480 }
481
482 /* Unwind cache used for gdbarch fallback unwinder. */
483
484 struct csky_unwind_cache
485 {
486 /* The stack pointer at the time this frame was created; i.e. the
487 caller's stack pointer when this function was called. It is used
488 to identify this frame. */
489 CORE_ADDR prev_sp;
490
491 /* The frame base for this frame is just prev_sp - frame size.
492 FRAMESIZE is the distance from the frame pointer to the
493 initial stack pointer. */
494 int framesize;
495
496 /* The register used to hold the frame pointer for this frame. */
497 int framereg;
498
499 /* Saved register offsets. */
500 trad_frame_saved_reg *saved_regs;
501 };
502
503 /* Do prologue analysis, returning the PC of the first instruction
504 after the function prologue. */
505
506 static CORE_ADDR
507 csky_analyze_prologue (struct gdbarch *gdbarch,
508 CORE_ADDR start_pc,
509 CORE_ADDR limit_pc,
510 CORE_ADDR end_pc,
511 struct frame_info *this_frame,
512 struct csky_unwind_cache *this_cache,
513 lr_type_t lr_type)
514 {
515 CORE_ADDR addr;
516 unsigned int insn, rn;
517 int framesize = 0;
518 int stacksize = 0;
519 int register_offsets[CSKY_NUM_GREGS_SAVED_GREGS];
520 int insn_len;
521 /* For adjusting fp. */
522 int is_fp_saved = 0;
523 int adjust_fp = 0;
524
525 /* REGISTER_OFFSETS will contain offsets from the top of the frame
526 (NOT the frame pointer) for the various saved registers, or -1
527 if the register is not saved. */
528 for (rn = 0; rn < CSKY_NUM_GREGS_SAVED_GREGS; rn++)
529 register_offsets[rn] = -1;
530
531 /* Analyze the prologue. Things we determine from analyzing the
532 prologue include the size of the frame and which registers are
533 saved (and where). */
534 if (csky_debug)
535 {
536 fprintf_unfiltered (gdb_stdlog,
537 "csky: Scanning prologue: start_pc = 0x%x,"
538 "limit_pc = 0x%x\n", (unsigned int) start_pc,
539 (unsigned int) limit_pc);
540 }
541
542 /* Default to 16 bit instruction. */
543 insn_len = 2;
544 stacksize = 0;
545 for (addr = start_pc; addr < limit_pc; addr += insn_len)
546 {
547 /* Get next insn. */
548 insn_len = csky_get_insn (gdbarch, addr, &insn);
549
550 /* Check if 32 bit. */
551 if (insn_len == 4)
552 {
553 /* subi32 sp,sp oimm12. */
554 if (CSKY_32_IS_SUBI0 (insn))
555 {
556 /* Got oimm12. */
557 int offset = CSKY_32_SUBI_IMM (insn);
558 if (csky_debug)
559 {
560 fprintf_unfiltered (gdb_stdlog,
561 "csky: got subi sp,%d; continuing\n",
562 offset);
563 }
564 stacksize += offset;
565 continue;
566 }
567 /* stm32 ry-rz,(sp). */
568 else if (CSKY_32_IS_STMx0 (insn))
569 {
570 /* Spill register(s). */
571 int start_register;
572 int reg_count;
573 int offset;
574
575 /* BIG WARNING! The CKCore ABI does not restrict functions
576 to taking only one stack allocation. Therefore, when
577 we save a register, we record the offset of where it was
578 saved relative to the current stacksize. This will
579 then give an offset from the SP upon entry to our
580 function. Remember, stacksize is NOT constant until
581 we're done scanning the prologue. */
582 start_register = CSKY_32_STM_VAL_REGNUM (insn);
583 reg_count = CSKY_32_STM_SIZE (insn);
584 if (csky_debug)
585 {
586 fprintf_unfiltered (gdb_stdlog,
587 "csky: got stm r%d-r%d,(sp)\n",
588 start_register,
589 start_register + reg_count);
590 }
591
592 for (rn = start_register, offset = 0;
593 rn <= start_register + reg_count;
594 rn++, offset += 4)
595 {
596 register_offsets[rn] = stacksize - offset;
597 if (csky_debug)
598 {
599 fprintf_unfiltered (gdb_stdlog,
600 "csky: r%d saved at 0x%x"
601 " (offset %d)\n",
602 rn, register_offsets[rn],
603 offset);
604 }
605 }
606 if (csky_debug)
607 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
608 continue;
609 }
610 /* stw ry,(sp,disp). */
611 else if (CSKY_32_IS_STWx0 (insn))
612 {
613 /* Spill register: see note for IS_STM above. */
614 int disp;
615
616 rn = CSKY_32_ST_VAL_REGNUM (insn);
617 disp = CSKY_32_ST_OFFSET (insn);
618 register_offsets[rn] = stacksize - disp;
619 if (csky_debug)
620 print_savedreg_msg (rn, register_offsets, true);
621 continue;
622 }
623 else if (CSKY_32_IS_MOV_FP_SP (insn))
624 {
625 /* SP is saved to FP reg, means code afer prologue may
626 modify SP. */
627 is_fp_saved = 1;
628 adjust_fp = stacksize;
629 continue;
630 }
631 else if (CSKY_32_IS_MFCR_EPSR (insn))
632 {
633 unsigned int insn2;
634 addr += 4;
635 int mfcr_regnum = insn & 0x1f;
636 insn_len = csky_get_insn (gdbarch, addr, &insn2);
637 if (insn_len == 2)
638 {
639 int stw_regnum = (insn2 >> 5) & 0x7;
640 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
641 {
642 int offset;
643
644 /* CSKY_EPSR_REGNUM. */
645 rn = CSKY_NUM_GREGS;
646 offset = CSKY_16_STWx0_OFFSET (insn2);
647 register_offsets[rn] = stacksize - offset;
648 if (csky_debug)
649 print_savedreg_msg (rn, register_offsets, true);
650 continue;
651 }
652 break;
653 }
654 else
655 {
656 /* INSN_LEN == 4. */
657 int stw_regnum = (insn2 >> 21) & 0x1f;
658 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
659 {
660 int offset;
661
662 /* CSKY_EPSR_REGNUM. */
663 rn = CSKY_NUM_GREGS;
664 offset = CSKY_32_ST_OFFSET (insn2);
665 register_offsets[rn] = framesize - offset;
666 if (csky_debug)
667 print_savedreg_msg (rn, register_offsets, true);
668 continue;
669 }
670 break;
671 }
672 }
673 else if (CSKY_32_IS_MFCR_FPSR (insn))
674 {
675 unsigned int insn2;
676 addr += 4;
677 int mfcr_regnum = insn & 0x1f;
678 insn_len = csky_get_insn (gdbarch, addr, &insn2);
679 if (insn_len == 2)
680 {
681 int stw_regnum = (insn2 >> 5) & 0x7;
682 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum
683 == stw_regnum))
684 {
685 int offset;
686
687 /* CSKY_FPSR_REGNUM. */
688 rn = CSKY_NUM_GREGS + 1;
689 offset = CSKY_16_STWx0_OFFSET (insn2);
690 register_offsets[rn] = stacksize - offset;
691 if (csky_debug)
692 print_savedreg_msg (rn, register_offsets, true);
693 continue;
694 }
695 break;
696 }
697 else
698 {
699 /* INSN_LEN == 4. */
700 int stw_regnum = (insn2 >> 21) & 0x1f;
701 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
702 {
703 int offset;
704
705 /* CSKY_FPSR_REGNUM. */
706 rn = CSKY_NUM_GREGS + 1;
707 offset = CSKY_32_ST_OFFSET (insn2);
708 register_offsets[rn] = framesize - offset;
709 if (csky_debug)
710 print_savedreg_msg (rn, register_offsets, true);
711 continue;
712 }
713 break;
714 }
715 }
716 else if (CSKY_32_IS_MFCR_EPC (insn))
717 {
718 unsigned int insn2;
719 addr += 4;
720 int mfcr_regnum = insn & 0x1f;
721 insn_len = csky_get_insn (gdbarch, addr, &insn2);
722 if (insn_len == 2)
723 {
724 int stw_regnum = (insn2 >> 5) & 0x7;
725 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
726 {
727 int offset;
728
729 /* CSKY_EPC_REGNUM. */
730 rn = CSKY_NUM_GREGS + 2;
731 offset = CSKY_16_STWx0_OFFSET (insn2);
732 register_offsets[rn] = stacksize - offset;
733 if (csky_debug)
734 print_savedreg_msg (rn, register_offsets, true);
735 continue;
736 }
737 break;
738 }
739 else
740 {
741 /* INSN_LEN == 4. */
742 int stw_regnum = (insn2 >> 21) & 0x1f;
743 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
744 {
745 int offset;
746
747 /* CSKY_EPC_REGNUM. */
748 rn = CSKY_NUM_GREGS + 2;
749 offset = CSKY_32_ST_OFFSET (insn2);
750 register_offsets[rn] = framesize - offset;
751 if (csky_debug)
752 print_savedreg_msg (rn, register_offsets, true);
753 continue;
754 }
755 break;
756 }
757 }
758 else if (CSKY_32_IS_MFCR_FPC (insn))
759 {
760 unsigned int insn2;
761 addr += 4;
762 int mfcr_regnum = insn & 0x1f;
763 insn_len = csky_get_insn (gdbarch, addr, &insn2);
764 if (insn_len == 2)
765 {
766 int stw_regnum = (insn2 >> 5) & 0x7;
767 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
768 {
769 int offset;
770
771 /* CSKY_FPC_REGNUM. */
772 rn = CSKY_NUM_GREGS + 3;
773 offset = CSKY_16_STWx0_OFFSET (insn2);
774 register_offsets[rn] = stacksize - offset;
775 if (csky_debug)
776 print_savedreg_msg (rn, register_offsets, true);
777 continue;
778 }
779 break;
780 }
781 else
782 {
783 /* INSN_LEN == 4. */
784 int stw_regnum = (insn2 >> 21) & 0x1f;
785 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
786 {
787 int offset;
788
789 /* CSKY_FPC_REGNUM. */
790 rn = CSKY_NUM_GREGS + 3;
791 offset = CSKY_32_ST_OFFSET (insn2);
792 register_offsets[rn] = framesize - offset;
793 if (csky_debug)
794 print_savedreg_msg (rn, register_offsets, true);
795 continue;
796 }
797 break;
798 }
799 }
800 else if (CSKY_32_IS_PUSH (insn))
801 {
802 /* Push for 32_bit. */
803 if (CSKY_32_IS_PUSH_R29 (insn))
804 {
805 stacksize += 4;
806 register_offsets[29] = stacksize;
807 if (csky_debug)
808 print_savedreg_msg (29, register_offsets, false);
809 }
810 if (CSKY_32_PUSH_LIST2 (insn))
811 {
812 int num = CSKY_32_PUSH_LIST2 (insn);
813 int tmp = 0;
814 stacksize += num * 4;
815 if (csky_debug)
816 {
817 fprintf_unfiltered (gdb_stdlog,
818 "csky: push regs_array: r16-r%d\n",
819 16 + num - 1);
820 }
821 for (rn = 16; rn <= 16 + num - 1; rn++)
822 {
823 register_offsets[rn] = stacksize - tmp;
824 if (csky_debug)
825 {
826 fprintf_unfiltered (gdb_stdlog,
827 "csky: r%d saved at 0x%x"
828 " (offset %d)\n", rn,
829 register_offsets[rn], tmp);
830 }
831 tmp += 4;
832 }
833 }
834 if (CSKY_32_IS_PUSH_R15 (insn))
835 {
836 stacksize += 4;
837 register_offsets[15] = stacksize;
838 if (csky_debug)
839 print_savedreg_msg (15, register_offsets, false);
840 }
841 if (CSKY_32_PUSH_LIST1 (insn))
842 {
843 int num = CSKY_32_PUSH_LIST1 (insn);
844 int tmp = 0;
845 stacksize += num * 4;
846 if (csky_debug)
847 {
848 fprintf_unfiltered (gdb_stdlog,
849 "csky: push regs_array: r4-r%d\n",
850 4 + num - 1);
851 }
852 for (rn = 4; rn <= 4 + num - 1; rn++)
853 {
854 register_offsets[rn] = stacksize - tmp;
855 if (csky_debug)
856 {
857 fprintf_unfiltered (gdb_stdlog,
858 "csky: r%d saved at 0x%x"
859 " (offset %d)\n", rn,
860 register_offsets[rn], tmp);
861 }
862 tmp += 4;
863 }
864 }
865
866 framesize = stacksize;
867 if (csky_debug)
868 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
869 continue;
870 }
871 else if (CSKY_32_IS_LRW4 (insn) || CSKY_32_IS_MOVI4 (insn)
872 || CSKY_32_IS_MOVIH4 (insn) || CSKY_32_IS_BMASKI4 (insn))
873 {
874 int adjust = 0;
875 int offset = 0;
876 unsigned int insn2;
877
878 if (csky_debug)
879 {
880 fprintf_unfiltered (gdb_stdlog,
881 "csky: looking at large frame\n");
882 }
883 if (CSKY_32_IS_LRW4 (insn))
884 {
885 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
886 int literal_addr = (addr + ((insn & 0xffff) << 2))
887 & 0xfffffffc;
888 adjust = read_memory_unsigned_integer (literal_addr, 4,
889 byte_order);
890 }
891 else if (CSKY_32_IS_MOVI4 (insn))
892 adjust = (insn & 0xffff);
893 else if (CSKY_32_IS_MOVIH4 (insn))
894 adjust = (insn & 0xffff) << 16;
895 else
896 {
897 /* CSKY_32_IS_BMASKI4 (insn). */
898 adjust = (1 << (((insn & 0x3e00000) >> 21) + 1)) - 1;
899 }
900
901 if (csky_debug)
902 {
903 fprintf_unfiltered (gdb_stdlog,
904 "csky: base stacksize=0x%x\n", adjust);
905
906 /* May have zero or more insns which modify r4. */
907 fprintf_unfiltered (gdb_stdlog,
908 "csky: looking for r4 adjusters...\n");
909 }
910
911 offset = 4;
912 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
913 while (CSKY_IS_R4_ADJUSTER (insn2))
914 {
915 if (CSKY_32_IS_ADDI4 (insn2))
916 {
917 int imm = (insn2 & 0xfff) + 1;
918 adjust += imm;
919 if (csky_debug)
920 {
921 fprintf_unfiltered (gdb_stdlog,
922 "csky: addi r4,%d\n", imm);
923 }
924 }
925 else if (CSKY_32_IS_SUBI4 (insn2))
926 {
927 int imm = (insn2 & 0xfff) + 1;
928 adjust -= imm;
929 if (csky_debug)
930 {
931 fprintf_unfiltered (gdb_stdlog,
932 "csky: subi r4,%d\n", imm);
933 }
934 }
935 else if (CSKY_32_IS_NOR4 (insn2))
936 {
937 adjust = ~adjust;
938 if (csky_debug)
939 {
940 fprintf_unfiltered (gdb_stdlog,
941 "csky: nor r4,r4,r4\n");
942 }
943 }
944 else if (CSKY_32_IS_ROTLI4 (insn2))
945 {
946 int imm = ((insn2 >> 21) & 0x1f);
947 int temp = adjust >> (32 - imm);
948 adjust <<= imm;
949 adjust |= temp;
950 if (csky_debug)
951 {
952 fprintf_unfiltered (gdb_stdlog,
953 "csky: rotli r4,r4,%d\n", imm);
954 }
955 }
956 else if (CSKY_32_IS_LISI4 (insn2))
957 {
958 int imm = ((insn2 >> 21) & 0x1f);
959 adjust <<= imm;
960 if (csky_debug)
961 {
962 fprintf_unfiltered (gdb_stdlog,
963 "csky: lsli r4,r4,%d\n", imm);
964 }
965 }
966 else if (CSKY_32_IS_BSETI4 (insn2))
967 {
968 int imm = ((insn2 >> 21) & 0x1f);
969 adjust |= (1 << imm);
970 if (csky_debug)
971 {
972 fprintf_unfiltered (gdb_stdlog,
973 "csky: bseti r4,r4 %d\n", imm);
974 }
975 }
976 else if (CSKY_32_IS_BCLRI4 (insn2))
977 {
978 int imm = ((insn2 >> 21) & 0x1f);
979 adjust &= ~(1 << imm);
980 if (csky_debug)
981 {
982 fprintf_unfiltered (gdb_stdlog,
983 "csky: bclri r4,r4 %d\n", imm);
984 }
985 }
986 else if (CSKY_32_IS_IXH4 (insn2))
987 {
988 adjust *= 3;
989 if (csky_debug)
990 {
991 fprintf_unfiltered (gdb_stdlog,
992 "csky: ixh r4,r4,r4\n");
993 }
994 }
995 else if (CSKY_32_IS_IXW4 (insn2))
996 {
997 adjust *= 5;
998 if (csky_debug)
999 {
1000 fprintf_unfiltered (gdb_stdlog,
1001 "csky: ixw r4,r4,r4\n");
1002 }
1003 }
1004 else if (CSKY_16_IS_ADDI4 (insn2))
1005 {
1006 int imm = (insn2 & 0xff) + 1;
1007 adjust += imm;
1008 if (csky_debug)
1009 {
1010 fprintf_unfiltered (gdb_stdlog,
1011 "csky: addi r4,%d\n", imm);
1012 }
1013 }
1014 else if (CSKY_16_IS_SUBI4 (insn2))
1015 {
1016 int imm = (insn2 & 0xff) + 1;
1017 adjust -= imm;
1018 if (csky_debug)
1019 {
1020 fprintf_unfiltered (gdb_stdlog,
1021 "csky: subi r4,%d\n", imm);
1022 }
1023 }
1024 else if (CSKY_16_IS_NOR4 (insn2))
1025 {
1026 adjust = ~adjust;
1027 if (csky_debug)
1028 {
1029 fprintf_unfiltered (gdb_stdlog,
1030 "csky: nor r4,r4\n");
1031 }
1032 }
1033 else if (CSKY_16_IS_BSETI4 (insn2))
1034 {
1035 int imm = (insn2 & 0x1f);
1036 adjust |= (1 << imm);
1037 if (csky_debug)
1038 {
1039 fprintf_unfiltered (gdb_stdlog,
1040 "csky: bseti r4, %d\n", imm);
1041 }
1042 }
1043 else if (CSKY_16_IS_BCLRI4 (insn2))
1044 {
1045 int imm = (insn2 & 0x1f);
1046 adjust &= ~(1 << imm);
1047 if (csky_debug)
1048 {
1049 fprintf_unfiltered (gdb_stdlog,
1050 "csky: bclri r4, %d\n", imm);
1051 }
1052 }
1053 else if (CSKY_16_IS_LSLI4 (insn2))
1054 {
1055 int imm = (insn2 & 0x1f);
1056 adjust <<= imm;
1057 if (csky_debug)
1058 {
1059 fprintf_unfiltered (gdb_stdlog,
1060 "csky: lsli r4,r4, %d\n", imm);
1061 }
1062 }
1063
1064 offset += insn_len;
1065 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1066 };
1067
1068 if (csky_debug)
1069 {
1070 fprintf_unfiltered (gdb_stdlog, "csky: done looking for"
1071 " r4 adjusters\n");
1072 }
1073
1074 /* If the next insn adjusts the stack pointer, we keep
1075 everything; if not, we scrap it and we've found the
1076 end of the prologue. */
1077 if (CSKY_IS_SUBU4 (insn2))
1078 {
1079 addr += offset;
1080 stacksize += adjust;
1081 if (csky_debug)
1082 {
1083 fprintf_unfiltered (gdb_stdlog,
1084 "csky: found stack adjustment of"
1085 " 0x%x bytes.\n", adjust);
1086 fprintf_unfiltered (gdb_stdlog,
1087 "csky: skipping to new address %s\n",
1088 core_addr_to_string_nz (addr));
1089 fprintf_unfiltered (gdb_stdlog,
1090 "csky: continuing\n");
1091 }
1092 continue;
1093 }
1094
1095 /* None of these instructions are prologue, so don't touch
1096 anything. */
1097 if (csky_debug)
1098 {
1099 fprintf_unfiltered (gdb_stdlog,
1100 "csky: no subu sp,sp,r4; NOT altering"
1101 " stacksize.\n");
1102 }
1103 break;
1104 }
1105 }
1106 else
1107 {
1108 /* insn_len != 4. */
1109
1110 /* subi.sp sp,disp. */
1111 if (CSKY_16_IS_SUBI0 (insn))
1112 {
1113 int offset = CSKY_16_SUBI_IMM (insn);
1114 if (csky_debug)
1115 {
1116 fprintf_unfiltered (gdb_stdlog,
1117 "csky: got subi r0,%d; continuing\n",
1118 offset);
1119 }
1120 stacksize += offset;
1121 continue;
1122 }
1123 /* stw.16 rz,(sp,disp). */
1124 else if (CSKY_16_IS_STWx0 (insn))
1125 {
1126 /* Spill register: see note for IS_STM above. */
1127 int disp;
1128
1129 rn = CSKY_16_ST_VAL_REGNUM (insn);
1130 disp = CSKY_16_ST_OFFSET (insn);
1131 register_offsets[rn] = stacksize - disp;
1132 if (csky_debug)
1133 print_savedreg_msg (rn, register_offsets, true);
1134 continue;
1135 }
1136 else if (CSKY_16_IS_MOV_FP_SP (insn))
1137 {
1138 /* SP is saved to FP reg, means prologue may modify SP. */
1139 is_fp_saved = 1;
1140 adjust_fp = stacksize;
1141 continue;
1142 }
1143 else if (CSKY_16_IS_PUSH (insn))
1144 {
1145 /* Push for 16_bit. */
1146 int offset = 0;
1147 if (CSKY_16_IS_PUSH_R15 (insn))
1148 {
1149 stacksize += 4;
1150 register_offsets[15] = stacksize;
1151 if (csky_debug)
1152 print_savedreg_msg (15, register_offsets, false);
1153 offset += 4;
1154 }
1155 if (CSKY_16_PUSH_LIST1 (insn))
1156 {
1157 int num = CSKY_16_PUSH_LIST1 (insn);
1158 int tmp = 0;
1159 stacksize += num * 4;
1160 offset += num * 4;
1161 if (csky_debug)
1162 {
1163 fprintf_unfiltered (gdb_stdlog,
1164 "csky: push regs_array: r4-r%d\n",
1165 4 + num - 1);
1166 }
1167 for (rn = 4; rn <= 4 + num - 1; rn++)
1168 {
1169 register_offsets[rn] = stacksize - tmp;
1170 if (csky_debug)
1171 {
1172 fprintf_unfiltered (gdb_stdlog,
1173 "csky: r%d saved at 0x%x"
1174 " (offset %d)\n", rn,
1175 register_offsets[rn], offset);
1176 }
1177 tmp += 4;
1178 }
1179 }
1180
1181 framesize = stacksize;
1182 if (csky_debug)
1183 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
1184 continue;
1185 }
1186 else if (CSKY_16_IS_LRW4 (insn) || CSKY_16_IS_MOVI4 (insn))
1187 {
1188 int adjust = 0;
1189 unsigned int insn2;
1190
1191 if (csky_debug)
1192 {
1193 fprintf_unfiltered (gdb_stdlog,
1194 "csky: looking at large frame\n");
1195 }
1196 if (CSKY_16_IS_LRW4 (insn))
1197 {
1198 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1199 int offset = ((insn & 0x300) >> 3) | (insn & 0x1f);
1200 int literal_addr = (addr + ( offset << 2)) & 0xfffffffc;
1201 adjust = read_memory_unsigned_integer (literal_addr, 4,
1202 byte_order);
1203 }
1204 else
1205 {
1206 /* CSKY_16_IS_MOVI4 (insn). */
1207 adjust = (insn & 0xff);
1208 }
1209
1210 if (csky_debug)
1211 {
1212 fprintf_unfiltered (gdb_stdlog,
1213 "csky: base stacksize=0x%x\n", adjust);
1214 }
1215
1216 /* May have zero or more instructions which modify r4. */
1217 if (csky_debug)
1218 {
1219 fprintf_unfiltered (gdb_stdlog,
1220 "csky: looking for r4 adjusters...\n");
1221 }
1222 int offset = 2;
1223 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1224 while (CSKY_IS_R4_ADJUSTER (insn2))
1225 {
1226 if (CSKY_32_IS_ADDI4 (insn2))
1227 {
1228 int imm = (insn2 & 0xfff) + 1;
1229 adjust += imm;
1230 if (csky_debug)
1231 {
1232 fprintf_unfiltered (gdb_stdlog,
1233 "csky: addi r4,%d\n", imm);
1234 }
1235 }
1236 else if (CSKY_32_IS_SUBI4 (insn2))
1237 {
1238 int imm = (insn2 & 0xfff) + 1;
1239 adjust -= imm;
1240 if (csky_debug)
1241 {
1242 fprintf_unfiltered (gdb_stdlog,
1243 "csky: subi r4,%d\n", imm);
1244 }
1245 }
1246 else if (CSKY_32_IS_NOR4 (insn2))
1247 {
1248 adjust = ~adjust;
1249 if (csky_debug)
1250 {
1251 fprintf_unfiltered (gdb_stdlog,
1252 "csky: nor r4,r4,r4\n");
1253 }
1254 }
1255 else if (CSKY_32_IS_ROTLI4 (insn2))
1256 {
1257 int imm = ((insn2 >> 21) & 0x1f);
1258 int temp = adjust >> (32 - imm);
1259 adjust <<= imm;
1260 adjust |= temp;
1261 if (csky_debug)
1262 {
1263 fprintf_unfiltered (gdb_stdlog,
1264 "csky: rotli r4,r4,%d\n", imm);
1265 }
1266 }
1267 else if (CSKY_32_IS_LISI4 (insn2))
1268 {
1269 int imm = ((insn2 >> 21) & 0x1f);
1270 adjust <<= imm;
1271 if (csky_debug)
1272 {
1273 fprintf_unfiltered (gdb_stdlog,
1274 "csky: lsli r4,r4,%d\n", imm);
1275 }
1276 }
1277 else if (CSKY_32_IS_BSETI4 (insn2))
1278 {
1279 int imm = ((insn2 >> 21) & 0x1f);
1280 adjust |= (1 << imm);
1281 if (csky_debug)
1282 {
1283 fprintf_unfiltered (gdb_stdlog,
1284 "csky: bseti r4,r4 %d\n", imm);
1285 }
1286 }
1287 else if (CSKY_32_IS_BCLRI4 (insn2))
1288 {
1289 int imm = ((insn2 >> 21) & 0x1f);
1290 adjust &= ~(1 << imm);
1291 if (csky_debug)
1292 {
1293 fprintf_unfiltered (gdb_stdlog,
1294 "csky: bclri r4,r4 %d\n", imm);
1295 }
1296 }
1297 else if (CSKY_32_IS_IXH4 (insn2))
1298 {
1299 adjust *= 3;
1300 if (csky_debug)
1301 {
1302 fprintf_unfiltered (gdb_stdlog,
1303 "csky: ixh r4,r4,r4\n");
1304 }
1305 }
1306 else if (CSKY_32_IS_IXW4 (insn2))
1307 {
1308 adjust *= 5;
1309 if (csky_debug)
1310 {
1311 fprintf_unfiltered (gdb_stdlog,
1312 "csky: ixw r4,r4,r4\n");
1313 }
1314 }
1315 else if (CSKY_16_IS_ADDI4 (insn2))
1316 {
1317 int imm = (insn2 & 0xff) + 1;
1318 adjust += imm;
1319 if (csky_debug)
1320 {
1321 fprintf_unfiltered (gdb_stdlog,
1322 "csky: addi r4,%d\n", imm);
1323 }
1324 }
1325 else if (CSKY_16_IS_SUBI4 (insn2))
1326 {
1327 int imm = (insn2 & 0xff) + 1;
1328 adjust -= imm;
1329 if (csky_debug)
1330 {
1331 fprintf_unfiltered (gdb_stdlog,
1332 "csky: subi r4,%d\n", imm);
1333 }
1334 }
1335 else if (CSKY_16_IS_NOR4 (insn2))
1336 {
1337 adjust = ~adjust;
1338 if (csky_debug)
1339 {
1340 fprintf_unfiltered (gdb_stdlog,
1341 "csky: nor r4,r4\n");
1342 }
1343 }
1344 else if (CSKY_16_IS_BSETI4 (insn2))
1345 {
1346 int imm = (insn2 & 0x1f);
1347 adjust |= (1 << imm);
1348 if (csky_debug)
1349 {
1350 fprintf_unfiltered (gdb_stdlog,
1351 "csky: bseti r4, %d\n", imm);
1352 }
1353 }
1354 else if (CSKY_16_IS_BCLRI4 (insn2))
1355 {
1356 int imm = (insn2 & 0x1f);
1357 adjust &= ~(1 << imm);
1358 if (csky_debug)
1359 {
1360 fprintf_unfiltered (gdb_stdlog,
1361 "csky: bclri r4, %d\n", imm);
1362 }
1363 }
1364 else if (CSKY_16_IS_LSLI4 (insn2))
1365 {
1366 int imm = (insn2 & 0x1f);
1367 adjust <<= imm;
1368 if (csky_debug)
1369 {
1370 fprintf_unfiltered (gdb_stdlog,
1371 "csky: lsli r4,r4, %d\n", imm);
1372 }
1373 }
1374
1375 offset += insn_len;
1376 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1377 };
1378
1379 if (csky_debug)
1380 {
1381 fprintf_unfiltered (gdb_stdlog, "csky: "
1382 "done looking for r4 adjusters\n");
1383 }
1384
1385 /* If the next instruction adjusts the stack pointer, we keep
1386 everything; if not, we scrap it and we've found the end
1387 of the prologue. */
1388 if (CSKY_IS_SUBU4 (insn2))
1389 {
1390 addr += offset;
1391 stacksize += adjust;
1392 if (csky_debug)
1393 {
1394 fprintf_unfiltered (gdb_stdlog, "csky: "
1395 "found stack adjustment of 0x%x"
1396 " bytes.\n", adjust);
1397 fprintf_unfiltered (gdb_stdlog, "csky: "
1398 "skipping to new address %s\n",
1399 core_addr_to_string_nz (addr));
1400 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
1401 }
1402 continue;
1403 }
1404
1405 /* None of these instructions are prologue, so don't touch
1406 anything. */
1407 if (csky_debug)
1408 {
1409 fprintf_unfiltered (gdb_stdlog, "csky: no subu sp,r4; "
1410 "NOT altering stacksize.\n");
1411 }
1412 break;
1413 }
1414 }
1415
1416 /* This is not a prologue instruction, so stop here. */
1417 if (csky_debug)
1418 {
1419 fprintf_unfiltered (gdb_stdlog, "csky: insn is not a prologue"
1420 " insn -- ending scan\n");
1421 }
1422 break;
1423 }
1424
1425 if (this_cache)
1426 {
1427 CORE_ADDR unwound_fp;
1428 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1429 this_cache->framesize = framesize;
1430
1431 if (is_fp_saved)
1432 {
1433 this_cache->framereg = CSKY_FP_REGNUM;
1434 unwound_fp = get_frame_register_unsigned (this_frame,
1435 this_cache->framereg);
1436 this_cache->prev_sp = unwound_fp + adjust_fp;
1437 }
1438 else
1439 {
1440 this_cache->framereg = CSKY_SP_REGNUM;
1441 unwound_fp = get_frame_register_unsigned (this_frame,
1442 this_cache->framereg);
1443 this_cache->prev_sp = unwound_fp + stacksize;
1444 }
1445
1446 /* Note where saved registers are stored. The offsets in
1447 REGISTER_OFFSETS are computed relative to the top of the frame. */
1448 for (rn = 0; rn < CSKY_NUM_GREGS; rn++)
1449 {
1450 if (register_offsets[rn] >= 0)
1451 {
1452 this_cache->saved_regs[rn].set_addr (this_cache->prev_sp
1453 - register_offsets[rn]);
1454 if (csky_debug)
1455 {
1456 CORE_ADDR rn_value = read_memory_unsigned_integer (
1457 this_cache->saved_regs[rn].addr (), 4, byte_order);
1458 fprintf_unfiltered (gdb_stdlog, "Saved register %s "
1459 "stored at 0x%08lx, value=0x%08lx\n",
1460 csky_register_names[rn],
1461 (unsigned long)
1462 this_cache->saved_regs[rn].addr (),
1463 (unsigned long) rn_value);
1464 }
1465 }
1466 }
1467 if (lr_type == LR_TYPE_EPC)
1468 {
1469 /* rte || epc . */
1470 this_cache->saved_regs[CSKY_PC_REGNUM]
1471 = this_cache->saved_regs[CSKY_EPC_REGNUM];
1472 }
1473 else if (lr_type == LR_TYPE_FPC)
1474 {
1475 /* rfi || fpc . */
1476 this_cache->saved_regs[CSKY_PC_REGNUM]
1477 = this_cache->saved_regs[CSKY_FPC_REGNUM];
1478 }
1479 else
1480 {
1481 this_cache->saved_regs[CSKY_PC_REGNUM]
1482 = this_cache->saved_regs[CSKY_LR_REGNUM];
1483 }
1484 }
1485
1486 return addr;
1487 }
1488
1489 /* Detect whether PC is at a point where the stack frame has been
1490 destroyed. */
1491
1492 static int
1493 csky_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1494 {
1495 unsigned int insn;
1496 CORE_ADDR addr;
1497 CORE_ADDR func_start, func_end;
1498
1499 if (!find_pc_partial_function (pc, NULL, &func_start, &func_end))
1500 return 0;
1501
1502 bool fp_saved = false;
1503 int insn_len;
1504 for (addr = func_start; addr < func_end; addr += insn_len)
1505 {
1506 /* Get next insn. */
1507 insn_len = csky_get_insn (gdbarch, addr, &insn);
1508
1509 if (insn_len == 2)
1510 {
1511 /* Is sp is saved to fp. */
1512 if (CSKY_16_IS_MOV_FP_SP (insn))
1513 fp_saved = true;
1514 /* If sp was saved to fp and now being restored from
1515 fp then it indicates the start of epilog. */
1516 else if (fp_saved && CSKY_16_IS_MOV_SP_FP (insn))
1517 return pc >= addr;
1518 }
1519 }
1520 return 0;
1521 }
1522
1523 /* Implement the skip_prologue gdbarch hook. */
1524
1525 static CORE_ADDR
1526 csky_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1527 {
1528 CORE_ADDR func_addr, func_end;
1529 struct symtab_and_line sal;
1530 const int default_search_limit = 128;
1531
1532 /* See if we can find the end of the prologue using the symbol table. */
1533 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
1534 {
1535 CORE_ADDR post_prologue_pc
1536 = skip_prologue_using_sal (gdbarch, func_addr);
1537
1538 if (post_prologue_pc != 0)
1539 return std::max (pc, post_prologue_pc);
1540 }
1541 else
1542 func_end = pc + default_search_limit;
1543
1544 /* Find the end of prologue. Default lr_type. */
1545 return csky_analyze_prologue (gdbarch, pc, func_end, func_end,
1546 NULL, NULL, LR_TYPE_R15);
1547 }
1548
1549 /* Implement the breakpoint_kind_from_pc gdbarch method. */
1550
1551 static int
1552 csky_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
1553 {
1554 if (csky_pc_is_csky16 (gdbarch, *pcptr))
1555 return CSKY_INSN_SIZE16;
1556 else
1557 return CSKY_INSN_SIZE32;
1558 }
1559
1560 /* Implement the sw_breakpoint_from_kind gdbarch method. */
1561
1562 static const gdb_byte *
1563 csky_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
1564 {
1565 *size = kind;
1566 if (kind == CSKY_INSN_SIZE16)
1567 {
1568 static gdb_byte csky_16_breakpoint[] = { 0, 0 };
1569 return csky_16_breakpoint;
1570 }
1571 else
1572 {
1573 static gdb_byte csky_32_breakpoint[] = { 0, 0, 0, 0 };
1574 return csky_32_breakpoint;
1575 }
1576 }
1577
1578 /* Implement the memory_insert_breakpoint gdbarch method. */
1579
1580 static int
1581 csky_memory_insert_breakpoint (struct gdbarch *gdbarch,
1582 struct bp_target_info *bp_tgt)
1583 {
1584 int val;
1585 const unsigned char *bp;
1586 gdb_byte bp_write_record1[] = { 0, 0, 0, 0 };
1587 gdb_byte bp_write_record2[] = { 0, 0, 0, 0 };
1588 gdb_byte bp_record[] = { 0, 0, 0, 0 };
1589
1590 /* Sanity-check bp_address. */
1591 if (bp_tgt->reqstd_address % 2)
1592 warning (_("Invalid breakpoint address 0x%x is an odd number."),
1593 (unsigned int) bp_tgt->reqstd_address);
1594 scoped_restore restore_memory
1595 = make_scoped_restore_show_memory_breakpoints (1);
1596
1597 /* Determine appropriate breakpoint_kind for this address. */
1598 bp_tgt->kind = csky_breakpoint_kind_from_pc (gdbarch,
1599 &bp_tgt->reqstd_address);
1600
1601 /* Save the memory contents. */
1602 bp_tgt->shadow_len = bp_tgt->kind;
1603
1604 /* Fill bp_tgt->placed_address. */
1605 bp_tgt->placed_address = bp_tgt->reqstd_address;
1606
1607 if (bp_tgt->kind == CSKY_INSN_SIZE16)
1608 {
1609 if ((bp_tgt->reqstd_address % 4) == 0)
1610 {
1611 /* Read two bytes. */
1612 val = target_read_memory (bp_tgt->reqstd_address,
1613 bp_tgt->shadow_contents, 2);
1614 if (val)
1615 return val;
1616
1617 /* Read two bytes. */
1618 val = target_read_memory (bp_tgt->reqstd_address + 2,
1619 bp_record, 2);
1620 if (val)
1621 return val;
1622
1623 /* Write the breakpoint. */
1624 bp_write_record1[2] = bp_record[0];
1625 bp_write_record1[3] = bp_record[1];
1626 bp = bp_write_record1;
1627 val = target_write_raw_memory (bp_tgt->reqstd_address, bp,
1628 CSKY_WR_BKPT_MODE);
1629 }
1630 else
1631 {
1632 val = target_read_memory (bp_tgt->reqstd_address,
1633 bp_tgt->shadow_contents, 2);
1634 if (val)
1635 return val;
1636
1637 val = target_read_memory (bp_tgt->reqstd_address - 2,
1638 bp_record, 2);
1639 if (val)
1640 return val;
1641
1642 /* Write the breakpoint. */
1643 bp_write_record1[0] = bp_record[0];
1644 bp_write_record1[1] = bp_record[1];
1645 bp = bp_write_record1;
1646 val = target_write_raw_memory (bp_tgt->reqstd_address - 2,
1647 bp, CSKY_WR_BKPT_MODE);
1648 }
1649 }
1650 else
1651 {
1652 if (bp_tgt->placed_address % 4 == 0)
1653 {
1654 val = target_read_memory (bp_tgt->reqstd_address,
1655 bp_tgt->shadow_contents,
1656 CSKY_WR_BKPT_MODE);
1657 if (val)
1658 return val;
1659
1660 /* Write the breakpoint. */
1661 bp = bp_write_record1;
1662 val = target_write_raw_memory (bp_tgt->reqstd_address,
1663 bp, CSKY_WR_BKPT_MODE);
1664 }
1665 else
1666 {
1667 val = target_read_memory (bp_tgt->reqstd_address,
1668 bp_tgt->shadow_contents,
1669 CSKY_WR_BKPT_MODE);
1670 if (val)
1671 return val;
1672
1673 val = target_read_memory (bp_tgt->reqstd_address - 2,
1674 bp_record, 2);
1675 if (val)
1676 return val;
1677
1678 val = target_read_memory (bp_tgt->reqstd_address + 4,
1679 bp_record + 2, 2);
1680 if (val)
1681 return val;
1682
1683 bp_write_record1[0] = bp_record[0];
1684 bp_write_record1[1] = bp_record[1];
1685 bp_write_record2[2] = bp_record[2];
1686 bp_write_record2[3] = bp_record[3];
1687
1688 /* Write the breakpoint. */
1689 bp = bp_write_record1;
1690 val = target_write_raw_memory (bp_tgt->reqstd_address - 2, bp,
1691 CSKY_WR_BKPT_MODE);
1692 if (val)
1693 return val;
1694
1695 /* Write the breakpoint. */
1696 bp = bp_write_record2;
1697 val = target_write_raw_memory (bp_tgt->reqstd_address + 2, bp,
1698 CSKY_WR_BKPT_MODE);
1699 }
1700 }
1701 return val;
1702 }
1703
1704 /* Restore the breakpoint shadow_contents to the target. */
1705
1706 static int
1707 csky_memory_remove_breakpoint (struct gdbarch *gdbarch,
1708 struct bp_target_info *bp_tgt)
1709 {
1710 int val;
1711 gdb_byte bp_record[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
1712 /* Different for shadow_len 2 or 4. */
1713 if (bp_tgt->shadow_len == 2)
1714 {
1715 /* Do word-sized writes on word-aligned boundaries and read
1716 padding bytes as necessary. */
1717 if (bp_tgt->reqstd_address % 4 == 0)
1718 {
1719 val = target_read_memory (bp_tgt->reqstd_address + 2,
1720 bp_record + 2, 2);
1721 if (val)
1722 return val;
1723 bp_record[0] = bp_tgt->shadow_contents[0];
1724 bp_record[1] = bp_tgt->shadow_contents[1];
1725 return target_write_raw_memory (bp_tgt->reqstd_address,
1726 bp_record, CSKY_WR_BKPT_MODE);
1727 }
1728 else
1729 {
1730 val = target_read_memory (bp_tgt->reqstd_address - 2,
1731 bp_record, 2);
1732 if (val)
1733 return val;
1734 bp_record[2] = bp_tgt->shadow_contents[0];
1735 bp_record[3] = bp_tgt->shadow_contents[1];
1736 return target_write_raw_memory (bp_tgt->reqstd_address - 2,
1737 bp_record, CSKY_WR_BKPT_MODE);
1738 }
1739 }
1740 else
1741 {
1742 /* Do word-sized writes on word-aligned boundaries and read
1743 padding bytes as necessary. */
1744 if (bp_tgt->placed_address % 4 == 0)
1745 {
1746 return target_write_raw_memory (bp_tgt->reqstd_address,
1747 bp_tgt->shadow_contents,
1748 CSKY_WR_BKPT_MODE);
1749 }
1750 else
1751 {
1752 val = target_read_memory (bp_tgt->reqstd_address - 2,
1753 bp_record, 2);
1754 if (val)
1755 return val;
1756 val = target_read_memory (bp_tgt->reqstd_address + 4,
1757 bp_record+6, 2);
1758 if (val)
1759 return val;
1760
1761 bp_record[2] = bp_tgt->shadow_contents[0];
1762 bp_record[3] = bp_tgt->shadow_contents[1];
1763 bp_record[4] = bp_tgt->shadow_contents[2];
1764 bp_record[5] = bp_tgt->shadow_contents[3];
1765
1766 return target_write_raw_memory (bp_tgt->reqstd_address - 2,
1767 bp_record,
1768 CSKY_WR_BKPT_MODE * 2);
1769 }
1770 }
1771 }
1772
1773 /* Determine link register type. */
1774
1775 static lr_type_t
1776 csky_analyze_lr_type (struct gdbarch *gdbarch,
1777 CORE_ADDR start_pc, CORE_ADDR end_pc)
1778 {
1779 CORE_ADDR addr;
1780 unsigned int insn, insn_len;
1781 insn_len = 2;
1782
1783 for (addr = start_pc; addr < end_pc; addr += insn_len)
1784 {
1785 insn_len = csky_get_insn (gdbarch, addr, &insn);
1786 if (insn_len == 4)
1787 {
1788 if (CSKY_32_IS_MFCR_EPSR (insn) || CSKY_32_IS_MFCR_EPC (insn)
1789 || CSKY_32_IS_RTE (insn))
1790 return LR_TYPE_EPC;
1791 }
1792 else if (CSKY_32_IS_MFCR_FPSR (insn) || CSKY_32_IS_MFCR_FPC (insn)
1793 || CSKY_32_IS_RFI (insn))
1794 return LR_TYPE_FPC;
1795 else if (CSKY_32_IS_JMP (insn) || CSKY_32_IS_BR (insn)
1796 || CSKY_32_IS_JMPIX (insn) || CSKY_32_IS_JMPI (insn))
1797 return LR_TYPE_R15;
1798 else
1799 {
1800 /* 16 bit instruction. */
1801 if (CSKY_16_IS_JMP (insn) || CSKY_16_IS_BR (insn)
1802 || CSKY_16_IS_JMPIX (insn))
1803 return LR_TYPE_R15;
1804 }
1805 }
1806 return LR_TYPE_R15;
1807 }
1808
1809 /* Heuristic unwinder. */
1810
1811 static struct csky_unwind_cache *
1812 csky_frame_unwind_cache (struct frame_info *this_frame)
1813 {
1814 CORE_ADDR prologue_start, prologue_end, func_end, prev_pc, block_addr;
1815 struct csky_unwind_cache *cache;
1816 const struct block *bl;
1817 unsigned long func_size = 0;
1818 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1819 unsigned int sp_regnum = CSKY_SP_REGNUM;
1820
1821 /* Default lr type is r15. */
1822 lr_type_t lr_type = LR_TYPE_R15;
1823
1824 cache = FRAME_OBSTACK_ZALLOC (struct csky_unwind_cache);
1825 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1826
1827 /* Assume there is no frame until proven otherwise. */
1828 cache->framereg = sp_regnum;
1829
1830 cache->framesize = 0;
1831
1832 prev_pc = get_frame_pc (this_frame);
1833 block_addr = get_frame_address_in_block (this_frame);
1834 if (find_pc_partial_function (block_addr, NULL, &prologue_start,
1835 &func_end) == 0)
1836 /* We couldn't find a function containing block_addr, so bail out
1837 and hope for the best. */
1838 return cache;
1839
1840 /* Get the (function) symbol matching prologue_start. */
1841 bl = block_for_pc (prologue_start);
1842 if (bl != NULL)
1843 func_size = bl->endaddr - bl->startaddr;
1844 else
1845 {
1846 struct bound_minimal_symbol msymbol
1847 = lookup_minimal_symbol_by_pc (prologue_start);
1848 if (msymbol.minsym != NULL)
1849 func_size = MSYMBOL_SIZE (msymbol.minsym);
1850 }
1851
1852 /* If FUNC_SIZE is 0 we may have a special-case use of lr
1853 e.g. exception or interrupt. */
1854 if (func_size == 0)
1855 lr_type = csky_analyze_lr_type (gdbarch, prologue_start, func_end);
1856
1857 prologue_end = std::min (func_end, prev_pc);
1858
1859 /* Analyze the function prologue. */
1860 csky_analyze_prologue (gdbarch, prologue_start, prologue_end,
1861 func_end, this_frame, cache, lr_type);
1862
1863 /* gdbarch_sp_regnum contains the value and not the address. */
1864 cache->saved_regs[sp_regnum].set_value (cache->prev_sp);
1865 return cache;
1866 }
1867
1868 /* Implement the this_id function for the normal unwinder. */
1869
1870 static void
1871 csky_frame_this_id (struct frame_info *this_frame,
1872 void **this_prologue_cache, struct frame_id *this_id)
1873 {
1874 struct csky_unwind_cache *cache;
1875 struct frame_id id;
1876
1877 if (*this_prologue_cache == NULL)
1878 *this_prologue_cache = csky_frame_unwind_cache (this_frame);
1879 cache = (struct csky_unwind_cache *) *this_prologue_cache;
1880
1881 /* This marks the outermost frame. */
1882 if (cache->prev_sp == 0)
1883 return;
1884
1885 id = frame_id_build (cache->prev_sp, get_frame_func (this_frame));
1886 *this_id = id;
1887 }
1888
1889 /* Implement the prev_register function for the normal unwinder. */
1890
1891 static struct value *
1892 csky_frame_prev_register (struct frame_info *this_frame,
1893 void **this_prologue_cache, int regnum)
1894 {
1895 struct csky_unwind_cache *cache;
1896
1897 if (*this_prologue_cache == NULL)
1898 *this_prologue_cache = csky_frame_unwind_cache (this_frame);
1899 cache = (struct csky_unwind_cache *) *this_prologue_cache;
1900
1901 return trad_frame_get_prev_register (this_frame, cache->saved_regs,
1902 regnum);
1903 }
1904
1905 /* Data structures for the normal prologue-analysis-based
1906 unwinder. */
1907
1908 static const struct frame_unwind csky_unwind_cache = {
1909 "cski prologue",
1910 NORMAL_FRAME,
1911 default_frame_unwind_stop_reason,
1912 csky_frame_this_id,
1913 csky_frame_prev_register,
1914 NULL,
1915 default_frame_sniffer,
1916 NULL,
1917 NULL
1918 };
1919
1920
1921
1922 static int
1923 csky_stub_unwind_sniffer (const struct frame_unwind *self,
1924 struct frame_info *this_frame,
1925 void **this_prologue_cache)
1926 {
1927 CORE_ADDR addr_in_block;
1928
1929 addr_in_block = get_frame_address_in_block (this_frame);
1930
1931 if (find_pc_partial_function (addr_in_block, NULL, NULL, NULL) == 0
1932 || in_plt_section (addr_in_block))
1933 return 1;
1934
1935 return 0;
1936 }
1937
1938 static struct csky_unwind_cache *
1939 csky_make_stub_cache (struct frame_info *this_frame)
1940 {
1941 struct csky_unwind_cache *cache;
1942
1943 cache = FRAME_OBSTACK_ZALLOC (struct csky_unwind_cache);
1944 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1945 cache->prev_sp = get_frame_register_unsigned (this_frame, CSKY_SP_REGNUM);
1946
1947 return cache;
1948 }
1949
1950 static void
1951 csky_stub_this_id (struct frame_info *this_frame,
1952 void **this_cache,
1953 struct frame_id *this_id)
1954 {
1955 struct csky_unwind_cache *cache;
1956
1957 if (*this_cache == NULL)
1958 *this_cache = csky_make_stub_cache (this_frame);
1959 cache = (struct csky_unwind_cache *) *this_cache;
1960
1961 /* Our frame ID for a stub frame is the current SP and LR. */
1962 *this_id = frame_id_build (cache->prev_sp, get_frame_pc (this_frame));
1963 }
1964
1965 static struct value *
1966 csky_stub_prev_register (struct frame_info *this_frame,
1967 void **this_cache,
1968 int prev_regnum)
1969 {
1970 struct csky_unwind_cache *cache;
1971
1972 if (*this_cache == NULL)
1973 *this_cache = csky_make_stub_cache (this_frame);
1974 cache = (struct csky_unwind_cache *) *this_cache;
1975
1976 /* If we are asked to unwind the PC, then return the LR. */
1977 if (prev_regnum == CSKY_PC_REGNUM)
1978 {
1979 CORE_ADDR lr;
1980
1981 lr = frame_unwind_register_unsigned (this_frame, CSKY_LR_REGNUM);
1982 return frame_unwind_got_constant (this_frame, prev_regnum, lr);
1983 }
1984
1985 if (prev_regnum == CSKY_SP_REGNUM)
1986 return frame_unwind_got_constant (this_frame, prev_regnum, cache->prev_sp);
1987
1988 return trad_frame_get_prev_register (this_frame, cache->saved_regs,
1989 prev_regnum);
1990 }
1991
1992 static frame_unwind csky_stub_unwind = {
1993 "csky stub",
1994 NORMAL_FRAME,
1995 default_frame_unwind_stop_reason,
1996 csky_stub_this_id,
1997 csky_stub_prev_register,
1998 NULL,
1999 csky_stub_unwind_sniffer
2000 };
2001
2002 /* Implement the this_base, this_locals, and this_args hooks
2003 for the normal unwinder. */
2004
2005 static CORE_ADDR
2006 csky_frame_base_address (struct frame_info *this_frame, void **this_cache)
2007 {
2008 struct csky_unwind_cache *cache;
2009
2010 if (*this_cache == NULL)
2011 *this_cache = csky_frame_unwind_cache (this_frame);
2012 cache = (struct csky_unwind_cache *) *this_cache;
2013
2014 return cache->prev_sp - cache->framesize;
2015 }
2016
2017 static const struct frame_base csky_frame_base = {
2018 &csky_unwind_cache,
2019 csky_frame_base_address,
2020 csky_frame_base_address,
2021 csky_frame_base_address
2022 };
2023
2024 /* Initialize register access method. */
2025
2026 static void
2027 csky_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2028 struct dwarf2_frame_state_reg *reg,
2029 struct frame_info *this_frame)
2030 {
2031 if (regnum == gdbarch_pc_regnum (gdbarch))
2032 reg->how = DWARF2_FRAME_REG_RA;
2033 else if (regnum == gdbarch_sp_regnum (gdbarch))
2034 reg->how = DWARF2_FRAME_REG_CFA;
2035 }
2036
2037 /* Create csky register groups. */
2038
2039 static void
2040 csky_init_reggroup ()
2041 {
2042 cr_reggroup = reggroup_new ("cr", USER_REGGROUP);
2043 fr_reggroup = reggroup_new ("fr", USER_REGGROUP);
2044 vr_reggroup = reggroup_new ("vr", USER_REGGROUP);
2045 mmu_reggroup = reggroup_new ("mmu", USER_REGGROUP);
2046 prof_reggroup = reggroup_new ("profiling", USER_REGGROUP);
2047 }
2048
2049 /* Add register groups into reggroup list. */
2050
2051 static void
2052 csky_add_reggroups (struct gdbarch *gdbarch)
2053 {
2054 reggroup_add (gdbarch, all_reggroup);
2055 reggroup_add (gdbarch, general_reggroup);
2056 reggroup_add (gdbarch, cr_reggroup);
2057 reggroup_add (gdbarch, fr_reggroup);
2058 reggroup_add (gdbarch, vr_reggroup);
2059 reggroup_add (gdbarch, mmu_reggroup);
2060 reggroup_add (gdbarch, prof_reggroup);
2061 }
2062
2063 /* Return the groups that a CSKY register can be categorised into. */
2064
2065 static int
2066 csky_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
2067 struct reggroup *reggroup)
2068 {
2069 int raw_p;
2070
2071 if (gdbarch_register_name (gdbarch, regnum) == NULL
2072 || gdbarch_register_name (gdbarch, regnum)[0] == '\0')
2073 return 0;
2074
2075 if (reggroup == all_reggroup)
2076 return 1;
2077
2078 raw_p = regnum < gdbarch_num_regs (gdbarch);
2079 if (reggroup == save_reggroup || reggroup == restore_reggroup)
2080 return raw_p;
2081
2082 if (((regnum >= CSKY_R0_REGNUM) && (regnum <= CSKY_R0_REGNUM + 31))
2083 && (reggroup == general_reggroup))
2084 return 1;
2085
2086 if (((regnum == CSKY_PC_REGNUM)
2087 || ((regnum >= CSKY_CR0_REGNUM)
2088 && (regnum <= CSKY_CR0_REGNUM + 30)))
2089 && (reggroup == cr_reggroup))
2090 return 2;
2091
2092 if ((((regnum >= CSKY_VR0_REGNUM) && (regnum <= CSKY_VR0_REGNUM + 15))
2093 || ((regnum >= CSKY_VCR0_REGNUM)
2094 && (regnum <= CSKY_VCR0_REGNUM + 2)))
2095 && (reggroup == vr_reggroup))
2096 return 3;
2097
2098 if (((regnum >= CSKY_MMU_REGNUM) && (regnum <= CSKY_MMU_REGNUM + 8))
2099 && (reggroup == mmu_reggroup))
2100 return 4;
2101
2102 if (((regnum >= CSKY_PROFCR_REGNUM)
2103 && (regnum <= CSKY_PROFCR_REGNUM + 48))
2104 && (reggroup == prof_reggroup))
2105 return 5;
2106
2107 if ((((regnum >= CSKY_FR0_REGNUM) && (regnum <= CSKY_FR0_REGNUM + 15))
2108 || ((regnum >= CSKY_VCR0_REGNUM) && (regnum <= CSKY_VCR0_REGNUM + 2)))
2109 && (reggroup == fr_reggroup))
2110 return 6;
2111
2112 return 0;
2113 }
2114
2115 /* Implement the dwarf2_reg_to_regnum gdbarch method. */
2116
2117 static int
2118 csky_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int dw_reg)
2119 {
2120 if (dw_reg < 0 || dw_reg >= CSKY_NUM_REGS)
2121 return -1;
2122 return dw_reg;
2123 }
2124
2125 /* Override interface for command: info register. */
2126
2127 static void
2128 csky_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
2129 struct frame_info *frame, int regnum, int all)
2130 {
2131 /* Call default print_registers_info function. */
2132 default_print_registers_info (gdbarch, file, frame, regnum, all);
2133
2134 /* For command: info register. */
2135 if (regnum == -1 && all == 0)
2136 {
2137 default_print_registers_info (gdbarch, file, frame,
2138 CSKY_PC_REGNUM, 0);
2139 default_print_registers_info (gdbarch, file, frame,
2140 CSKY_EPC_REGNUM, 0);
2141 default_print_registers_info (gdbarch, file, frame,
2142 CSKY_CR0_REGNUM, 0);
2143 default_print_registers_info (gdbarch, file, frame,
2144 CSKY_EPSR_REGNUM, 0);
2145 }
2146 return;
2147 }
2148
2149 /* Initialize the current architecture based on INFO. If possible,
2150 re-use an architecture from ARCHES, which is a list of
2151 architectures already created during this debugging session.
2152
2153 Called at program startup, when reading a core file, and when
2154 reading a binary file. */
2155
2156 static struct gdbarch *
2157 csky_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2158 {
2159 struct gdbarch *gdbarch;
2160
2161 /* Find a candidate among the list of pre-declared architectures. */
2162 arches = gdbarch_list_lookup_by_info (arches, &info);
2163 if (arches != NULL)
2164 return arches->gdbarch;
2165
2166 /* None found, create a new architecture from the information
2167 provided. */
2168 csky_gdbarch_tdep *tdep = new csky_gdbarch_tdep;
2169 gdbarch = gdbarch_alloc (&info, tdep);
2170
2171 /* Target data types. */
2172 set_gdbarch_ptr_bit (gdbarch, 32);
2173 set_gdbarch_addr_bit (gdbarch, 32);
2174 set_gdbarch_short_bit (gdbarch, 16);
2175 set_gdbarch_int_bit (gdbarch, 32);
2176 set_gdbarch_long_bit (gdbarch, 32);
2177 set_gdbarch_long_long_bit (gdbarch, 64);
2178 set_gdbarch_float_bit (gdbarch, 32);
2179 set_gdbarch_double_bit (gdbarch, 64);
2180 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
2181 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
2182
2183 /* Information about the target architecture. */
2184 set_gdbarch_return_value (gdbarch, csky_return_value);
2185 set_gdbarch_breakpoint_kind_from_pc (gdbarch, csky_breakpoint_kind_from_pc);
2186 set_gdbarch_sw_breakpoint_from_kind (gdbarch, csky_sw_breakpoint_from_kind);
2187
2188 /* Register architecture. */
2189 set_gdbarch_num_regs (gdbarch, CSKY_NUM_REGS);
2190 set_gdbarch_pc_regnum (gdbarch, CSKY_PC_REGNUM);
2191 set_gdbarch_sp_regnum (gdbarch, CSKY_SP_REGNUM);
2192 set_gdbarch_register_name (gdbarch, csky_register_name);
2193 set_gdbarch_register_type (gdbarch, csky_register_type);
2194 set_gdbarch_read_pc (gdbarch, csky_read_pc);
2195 set_gdbarch_write_pc (gdbarch, csky_write_pc);
2196 set_gdbarch_print_registers_info (gdbarch, csky_print_registers_info);
2197 csky_add_reggroups (gdbarch);
2198 set_gdbarch_register_reggroup_p (gdbarch, csky_register_reggroup_p);
2199 set_gdbarch_stab_reg_to_regnum (gdbarch, csky_dwarf_reg_to_regnum);
2200 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, csky_dwarf_reg_to_regnum);
2201 dwarf2_frame_set_init_reg (gdbarch, csky_dwarf2_frame_init_reg);
2202
2203 /* Functions to analyze frames. */
2204 frame_base_set_default (gdbarch, &csky_frame_base);
2205 set_gdbarch_skip_prologue (gdbarch, csky_skip_prologue);
2206 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2207 set_gdbarch_frame_align (gdbarch, csky_frame_align);
2208 set_gdbarch_stack_frame_destroyed_p (gdbarch, csky_stack_frame_destroyed_p);
2209
2210 /* Functions handling dummy frames. */
2211 set_gdbarch_push_dummy_call (gdbarch, csky_push_dummy_call);
2212
2213 /* Frame unwinders. Use DWARF debug info if available,
2214 otherwise use our own unwinder. */
2215 dwarf2_append_unwinders (gdbarch);
2216 frame_unwind_append_unwinder (gdbarch, &csky_stub_unwind);
2217 frame_unwind_append_unwinder (gdbarch, &csky_unwind_cache);
2218
2219 /* Breakpoints. */
2220 set_gdbarch_memory_insert_breakpoint (gdbarch,
2221 csky_memory_insert_breakpoint);
2222 set_gdbarch_memory_remove_breakpoint (gdbarch,
2223 csky_memory_remove_breakpoint);
2224
2225 /* Hook in ABI-specific overrides, if they have been registered. */
2226 gdbarch_init_osabi (info, gdbarch);
2227
2228 /* Support simple overlay manager. */
2229 set_gdbarch_overlay_update (gdbarch, simple_overlay_update);
2230 set_gdbarch_char_signed (gdbarch, 0);
2231 return gdbarch;
2232 }
2233
2234 void _initialize_csky_tdep ();
2235 void
2236 _initialize_csky_tdep ()
2237 {
2238
2239 register_gdbarch_init (bfd_arch_csky, csky_gdbarch_init);
2240
2241 csky_init_reggroup ();
2242
2243 /* Allow debugging this file's internals. */
2244 add_setshow_boolean_cmd ("csky", class_maintenance, &csky_debug,
2245 _("Set C-Sky debugging."),
2246 _("Show C-Sky debugging."),
2247 _("When on, C-Sky specific debugging is enabled."),
2248 NULL,
2249 NULL,
2250 &setdebuglist, &showdebuglist);
2251 }
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