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[thirdparty/binutils-gdb.git] / gdb / d10v-tdep.c
1 /* Target-dependent code for Mitsubishi D10V, for GDB.
2 Copyright (C) 1996, 1997 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 /* Contributed by Martin Hunt, hunt@cygnus.com */
22
23 #include "defs.h"
24 #include "frame.h"
25 #include "obstack.h"
26 #include "symtab.h"
27 #include "gdbtypes.h"
28 #include "gdbcmd.h"
29 #include "gdbcore.h"
30 #include "gdb_string.h"
31 #include "value.h"
32 #include "inferior.h"
33 #include "dis-asm.h"
34 #include "symfile.h"
35 #include "objfiles.h"
36
37 struct frame_extra_info
38 {
39 CORE_ADDR return_pc;
40 int frameless;
41 int size;
42 };
43
44 /* these are the addresses the D10V-EVA board maps data */
45 /* and instruction memory to. */
46
47 #define DMEM_START 0x0000000
48 #define IMEM_START 0x1000000
49 #define STACK_START 0x0007ffe
50
51 /* d10v register naming conventions */
52
53 #define ARG1_REGNUM R0_REGNUM
54 #define ARGN_REGNUM 3
55 #define RET1_REGNUM R0_REGNUM
56
57 /* Local functions */
58
59 extern void _initialize_d10v_tdep PARAMS ((void));
60
61 static void d10v_eva_prepare_to_trace PARAMS ((void));
62
63 static void d10v_eva_get_trace_data PARAMS ((void));
64
65 static int prologue_find_regs PARAMS ((unsigned short op, struct frame_info * fi, CORE_ADDR addr));
66
67 extern void d10v_frame_init_saved_regs PARAMS ((struct frame_info *));
68
69 static void do_d10v_pop_frame PARAMS ((struct frame_info * fi));
70
71 /* FIXME */
72 extern void remote_d10v_translate_xfer_address PARAMS ((CORE_ADDR gdb_addr, int gdb_len, CORE_ADDR * rem_addr, int *rem_len));
73
74 int
75 d10v_frame_chain_valid (chain, frame)
76 CORE_ADDR chain;
77 struct frame_info *frame; /* not used here */
78 {
79 return ((chain) != 0 && (frame) != 0 && (frame)->pc > IMEM_START);
80 }
81
82
83 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
84 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
85 and TYPE is the type (which is known to be struct, union or array).
86
87 The d10v returns anything less than 8 bytes in size in
88 registers. */
89
90 int
91 d10v_use_struct_convention (gcc_p, type)
92 int gcc_p;
93 struct type *type;
94 {
95 return (TYPE_LENGTH (type) > 8);
96 }
97
98
99 unsigned char *
100 d10v_breakpoint_from_pc (pcptr, lenptr)
101 CORE_ADDR *pcptr;
102 int *lenptr;
103 {
104 static unsigned char breakpoint[] =
105 {0x2f, 0x90, 0x5e, 0x00};
106 *lenptr = sizeof (breakpoint);
107 return breakpoint;
108 }
109
110 char *
111 d10v_register_name (reg_nr)
112 int reg_nr;
113 {
114 static char *register_names[] =
115 {
116 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
117 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
118 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
119 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
120 "imap0", "imap1", "dmap", "a0", "a1"
121 };
122 if (reg_nr < 0)
123 return NULL;
124 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
125 return NULL;
126 return register_names[reg_nr];
127 }
128
129
130 /* Index within `registers' of the first byte of the space for
131 register REG_NR. */
132
133 int
134 d10v_register_byte (reg_nr)
135 int reg_nr;
136 {
137 if (reg_nr > A0_REGNUM)
138 return ((reg_nr - A0_REGNUM) * 8 + (A0_REGNUM * 2));
139 else
140 return (reg_nr * 2);
141 }
142
143 /* Number of bytes of storage in the actual machine representation for
144 register REG_NR. */
145
146 int
147 d10v_register_raw_size (reg_nr)
148 int reg_nr;
149 {
150 if (reg_nr >= A0_REGNUM)
151 return 8;
152 else
153 return 2;
154 }
155
156 /* Number of bytes of storage in the program's representation
157 for register N. */
158
159 int
160 d10v_register_virtual_size (reg_nr)
161 int reg_nr;
162 {
163 if (reg_nr >= A0_REGNUM)
164 return 8;
165 else if (reg_nr == PC_REGNUM || reg_nr == SP_REGNUM)
166 return 4;
167 else
168 return 2;
169 }
170
171 /* Return the GDB type object for the "standard" data type
172 of data in register N. */
173
174 struct type *
175 d10v_register_virtual_type (reg_nr)
176 int reg_nr;
177 {
178 if (reg_nr >= A0_REGNUM)
179 return builtin_type_long_long;
180 else if (reg_nr == PC_REGNUM || reg_nr == SP_REGNUM)
181 return builtin_type_long;
182 else
183 return builtin_type_short;
184 }
185
186 /* convert $pc and $sp to/from virtual addresses */
187 int
188 d10v_register_convertible (nr)
189 int nr;
190 {
191 return ((nr) == PC_REGNUM || (nr) == SP_REGNUM);
192 }
193
194 void
195 d10v_register_convert_to_virtual (regnum, type, from, to)
196 int regnum;
197 struct type *type;
198 char *from;
199 char *to;
200 {
201 ULONGEST x = extract_unsigned_integer (from, REGISTER_RAW_SIZE (regnum));
202 if (regnum == PC_REGNUM)
203 x = (x << 2) | IMEM_START;
204 else
205 x |= DMEM_START;
206 store_unsigned_integer (to, TYPE_LENGTH (type), x);
207 }
208
209 void
210 d10v_register_convert_to_raw (type, regnum, from, to)
211 struct type *type;
212 int regnum;
213 char *from;
214 char *to;
215 {
216 ULONGEST x = extract_unsigned_integer (from, TYPE_LENGTH (type));
217 x &= 0x3ffff;
218 if (regnum == PC_REGNUM)
219 x >>= 2;
220 store_unsigned_integer (to, 2, x);
221 }
222
223
224 CORE_ADDR
225 d10v_make_daddr (x)
226 CORE_ADDR x;
227 {
228 return ((x) | DMEM_START);
229 }
230
231 CORE_ADDR
232 d10v_make_iaddr (x)
233 CORE_ADDR x;
234 {
235 return (((x) << 2) | IMEM_START);
236 }
237
238 int
239 d10v_daddr_p (x)
240 CORE_ADDR x;
241 {
242 return (((x) & 0x3000000) == DMEM_START);
243 }
244
245 int
246 d10v_iaddr_p (x)
247 CORE_ADDR x;
248 {
249 return (((x) & 0x3000000) == IMEM_START);
250 }
251
252
253 CORE_ADDR
254 d10v_convert_iaddr_to_raw (x)
255 CORE_ADDR x;
256 {
257 return (((x) >> 2) & 0xffff);
258 }
259
260 CORE_ADDR
261 d10v_convert_daddr_to_raw (x)
262 CORE_ADDR x;
263 {
264 return ((x) & 0xffff);
265 }
266
267 /* Store the address of the place in which to copy the structure the
268 subroutine will return. This is called from call_function.
269
270 We store structs through a pointer passed in the first Argument
271 register. */
272
273 void
274 d10v_store_struct_return (addr, sp)
275 CORE_ADDR addr;
276 CORE_ADDR sp;
277 {
278 write_register (ARG1_REGNUM, (addr));
279 }
280
281 /* Write into appropriate registers a function return value
282 of type TYPE, given in virtual format.
283
284 Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */
285
286 void
287 d10v_store_return_value (type, valbuf)
288 struct type *type;
289 char *valbuf;
290 {
291 write_register_bytes (REGISTER_BYTE (RET1_REGNUM),
292 valbuf,
293 TYPE_LENGTH (type));
294 }
295
296 /* Extract from an array REGBUF containing the (raw) register state
297 the address in which a function should return its structure value,
298 as a CORE_ADDR (or an expression that can be used as one). */
299
300 CORE_ADDR
301 d10v_extract_struct_value_address (regbuf)
302 char *regbuf;
303 {
304 return (extract_address ((regbuf) + REGISTER_BYTE (ARG1_REGNUM),
305 REGISTER_RAW_SIZE (ARG1_REGNUM))
306 | DMEM_START);
307 }
308
309 CORE_ADDR
310 d10v_frame_saved_pc (frame)
311 struct frame_info *frame;
312 {
313 return ((frame)->extra_info->return_pc);
314 }
315
316 CORE_ADDR
317 d10v_frame_args_address (fi)
318 struct frame_info *fi;
319 {
320 return (fi)->frame;
321 }
322
323 CORE_ADDR
324 d10v_frame_locals_address (fi)
325 struct frame_info *fi;
326 {
327 return (fi)->frame;
328 }
329
330 /* Immediately after a function call, return the saved pc. We can't
331 use frame->return_pc beause that is determined by reading R13 off
332 the stack and that may not be written yet. */
333
334 CORE_ADDR
335 d10v_saved_pc_after_call (frame)
336 struct frame_info *frame;
337 {
338 return ((read_register (LR_REGNUM) << 2)
339 | IMEM_START);
340 }
341
342 /* Discard from the stack the innermost frame, restoring all saved
343 registers. */
344
345 void
346 d10v_pop_frame ()
347 {
348 generic_pop_current_frame (do_d10v_pop_frame);
349 }
350
351 static void
352 do_d10v_pop_frame (fi)
353 struct frame_info *fi;
354 {
355 CORE_ADDR fp;
356 int regnum;
357 char raw_buffer[8];
358
359 fp = FRAME_FP (fi);
360 /* fill out fsr with the address of where each */
361 /* register was stored in the frame */
362 d10v_frame_init_saved_regs (fi);
363
364 /* now update the current registers with the old values */
365 for (regnum = A0_REGNUM; regnum < A0_REGNUM + 2; regnum++)
366 {
367 if (fi->saved_regs[regnum])
368 {
369 read_memory (fi->saved_regs[regnum], raw_buffer, REGISTER_RAW_SIZE (regnum));
370 write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, REGISTER_RAW_SIZE (regnum));
371 }
372 }
373 for (regnum = 0; regnum < SP_REGNUM; regnum++)
374 {
375 if (fi->saved_regs[regnum])
376 {
377 write_register (regnum, read_memory_unsigned_integer (fi->saved_regs[regnum], REGISTER_RAW_SIZE (regnum)));
378 }
379 }
380 if (fi->saved_regs[PSW_REGNUM])
381 {
382 write_register (PSW_REGNUM, read_memory_unsigned_integer (fi->saved_regs[PSW_REGNUM], REGISTER_RAW_SIZE (PSW_REGNUM)));
383 }
384
385 write_register (PC_REGNUM, read_register (LR_REGNUM));
386 write_register (SP_REGNUM, fp + fi->extra_info->size);
387 target_store_registers (-1);
388 flush_cached_frames ();
389 }
390
391 static int
392 check_prologue (op)
393 unsigned short op;
394 {
395 /* st rn, @-sp */
396 if ((op & 0x7E1F) == 0x6C1F)
397 return 1;
398
399 /* st2w rn, @-sp */
400 if ((op & 0x7E3F) == 0x6E1F)
401 return 1;
402
403 /* subi sp, n */
404 if ((op & 0x7FE1) == 0x01E1)
405 return 1;
406
407 /* mv r11, sp */
408 if (op == 0x417E)
409 return 1;
410
411 /* nop */
412 if (op == 0x5E00)
413 return 1;
414
415 /* st rn, @sp */
416 if ((op & 0x7E1F) == 0x681E)
417 return 1;
418
419 /* st2w rn, @sp */
420 if ((op & 0x7E3F) == 0x3A1E)
421 return 1;
422
423 return 0;
424 }
425
426 CORE_ADDR
427 d10v_skip_prologue (pc)
428 CORE_ADDR pc;
429 {
430 unsigned long op;
431 unsigned short op1, op2;
432 CORE_ADDR func_addr, func_end;
433 struct symtab_and_line sal;
434
435 /* If we have line debugging information, then the end of the */
436 /* prologue should the first assembly instruction of the first source line */
437 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
438 {
439 sal = find_pc_line (func_addr, 0);
440 if (sal.end && sal.end < func_end)
441 return sal.end;
442 }
443
444 if (target_read_memory (pc, (char *) &op, 4))
445 return pc; /* Can't access it -- assume no prologue. */
446
447 while (1)
448 {
449 op = (unsigned long) read_memory_integer (pc, 4);
450 if ((op & 0xC0000000) == 0xC0000000)
451 {
452 /* long instruction */
453 if (((op & 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */
454 ((op & 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */
455 ((op & 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */
456 break;
457 }
458 else
459 {
460 /* short instructions */
461 if ((op & 0xC0000000) == 0x80000000)
462 {
463 op2 = (op & 0x3FFF8000) >> 15;
464 op1 = op & 0x7FFF;
465 }
466 else
467 {
468 op1 = (op & 0x3FFF8000) >> 15;
469 op2 = op & 0x7FFF;
470 }
471 if (check_prologue (op1))
472 {
473 if (!check_prologue (op2))
474 {
475 /* if the previous opcode was really part of the prologue */
476 /* and not just a NOP, then we want to break after both instructions */
477 if (op1 != 0x5E00)
478 pc += 4;
479 break;
480 }
481 }
482 else
483 break;
484 }
485 pc += 4;
486 }
487 return pc;
488 }
489
490 /* Given a GDB frame, determine the address of the calling function's frame.
491 This will be used to create a new GDB frame struct, and then
492 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
493 */
494
495 CORE_ADDR
496 d10v_frame_chain (fi)
497 struct frame_info *fi;
498 {
499 d10v_frame_init_saved_regs (fi);
500
501 if (fi->extra_info->return_pc == IMEM_START
502 || inside_entry_file (fi->extra_info->return_pc))
503 return (CORE_ADDR) 0;
504
505 if (!fi->saved_regs[FP_REGNUM])
506 {
507 if (!fi->saved_regs[SP_REGNUM]
508 || fi->saved_regs[SP_REGNUM] == STACK_START)
509 return (CORE_ADDR) 0;
510
511 return fi->saved_regs[SP_REGNUM];
512 }
513
514 if (!read_memory_unsigned_integer (fi->saved_regs[FP_REGNUM],
515 REGISTER_RAW_SIZE (FP_REGNUM)))
516 return (CORE_ADDR) 0;
517
518 return D10V_MAKE_DADDR (read_memory_unsigned_integer (fi->saved_regs[FP_REGNUM],
519 REGISTER_RAW_SIZE (FP_REGNUM)));
520 }
521
522 static int next_addr, uses_frame;
523
524 static int
525 prologue_find_regs (op, fi, addr)
526 unsigned short op;
527 struct frame_info *fi;
528 CORE_ADDR addr;
529 {
530 int n;
531
532 /* st rn, @-sp */
533 if ((op & 0x7E1F) == 0x6C1F)
534 {
535 n = (op & 0x1E0) >> 5;
536 next_addr -= 2;
537 fi->saved_regs[n] = next_addr;
538 return 1;
539 }
540
541 /* st2w rn, @-sp */
542 else if ((op & 0x7E3F) == 0x6E1F)
543 {
544 n = (op & 0x1E0) >> 5;
545 next_addr -= 4;
546 fi->saved_regs[n] = next_addr;
547 fi->saved_regs[n + 1] = next_addr + 2;
548 return 1;
549 }
550
551 /* subi sp, n */
552 if ((op & 0x7FE1) == 0x01E1)
553 {
554 n = (op & 0x1E) >> 1;
555 if (n == 0)
556 n = 16;
557 next_addr -= n;
558 return 1;
559 }
560
561 /* mv r11, sp */
562 if (op == 0x417E)
563 {
564 uses_frame = 1;
565 return 1;
566 }
567
568 /* nop */
569 if (op == 0x5E00)
570 return 1;
571
572 /* st rn, @sp */
573 if ((op & 0x7E1F) == 0x681E)
574 {
575 n = (op & 0x1E0) >> 5;
576 fi->saved_regs[n] = next_addr;
577 return 1;
578 }
579
580 /* st2w rn, @sp */
581 if ((op & 0x7E3F) == 0x3A1E)
582 {
583 n = (op & 0x1E0) >> 5;
584 fi->saved_regs[n] = next_addr;
585 fi->saved_regs[n + 1] = next_addr + 2;
586 return 1;
587 }
588
589 return 0;
590 }
591
592 /* Put here the code to store, into fi->saved_regs, the addresses of
593 the saved registers of frame described by FRAME_INFO. This
594 includes special registers such as pc and fp saved in special ways
595 in the stack frame. sp is even more special: the address we return
596 for it IS the sp for the next frame. */
597
598 void
599 d10v_frame_init_saved_regs (fi)
600 struct frame_info *fi;
601 {
602 CORE_ADDR fp, pc;
603 unsigned long op;
604 unsigned short op1, op2;
605 int i;
606
607 fp = fi->frame;
608 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
609 next_addr = 0;
610
611 pc = get_pc_function_start (fi->pc);
612
613 uses_frame = 0;
614 while (1)
615 {
616 op = (unsigned long) read_memory_integer (pc, 4);
617 if ((op & 0xC0000000) == 0xC0000000)
618 {
619 /* long instruction */
620 if ((op & 0x3FFF0000) == 0x01FF0000)
621 {
622 /* add3 sp,sp,n */
623 short n = op & 0xFFFF;
624 next_addr += n;
625 }
626 else if ((op & 0x3F0F0000) == 0x340F0000)
627 {
628 /* st rn, @(offset,sp) */
629 short offset = op & 0xFFFF;
630 short n = (op >> 20) & 0xF;
631 fi->saved_regs[n] = next_addr + offset;
632 }
633 else if ((op & 0x3F1F0000) == 0x350F0000)
634 {
635 /* st2w rn, @(offset,sp) */
636 short offset = op & 0xFFFF;
637 short n = (op >> 20) & 0xF;
638 fi->saved_regs[n] = next_addr + offset;
639 fi->saved_regs[n + 1] = next_addr + offset + 2;
640 }
641 else
642 break;
643 }
644 else
645 {
646 /* short instructions */
647 if ((op & 0xC0000000) == 0x80000000)
648 {
649 op2 = (op & 0x3FFF8000) >> 15;
650 op1 = op & 0x7FFF;
651 }
652 else
653 {
654 op1 = (op & 0x3FFF8000) >> 15;
655 op2 = op & 0x7FFF;
656 }
657 if (!prologue_find_regs (op1, fi, pc) || !prologue_find_regs (op2, fi, pc))
658 break;
659 }
660 pc += 4;
661 }
662
663 fi->extra_info->size = -next_addr;
664
665 if (!(fp & 0xffff))
666 fp = D10V_MAKE_DADDR (read_register (SP_REGNUM));
667
668 for (i = 0; i < NUM_REGS - 1; i++)
669 if (fi->saved_regs[i])
670 {
671 fi->saved_regs[i] = fp - (next_addr - fi->saved_regs[i]);
672 }
673
674 if (fi->saved_regs[LR_REGNUM])
675 {
676 CORE_ADDR return_pc = read_memory_unsigned_integer (fi->saved_regs[LR_REGNUM], REGISTER_RAW_SIZE (LR_REGNUM));
677 fi->extra_info->return_pc = D10V_MAKE_IADDR (return_pc);
678 }
679 else
680 {
681 fi->extra_info->return_pc = D10V_MAKE_IADDR (read_register (LR_REGNUM));
682 }
683
684 /* th SP is not normally (ever?) saved, but check anyway */
685 if (!fi->saved_regs[SP_REGNUM])
686 {
687 /* if the FP was saved, that means the current FP is valid, */
688 /* otherwise, it isn't being used, so we use the SP instead */
689 if (uses_frame)
690 fi->saved_regs[SP_REGNUM] = read_register (FP_REGNUM) + fi->extra_info->size;
691 else
692 {
693 fi->saved_regs[SP_REGNUM] = fp + fi->extra_info->size;
694 fi->extra_info->frameless = 1;
695 fi->saved_regs[FP_REGNUM] = 0;
696 }
697 }
698 }
699
700 void
701 d10v_init_extra_frame_info (fromleaf, fi)
702 int fromleaf;
703 struct frame_info *fi;
704 {
705 fi->extra_info = (struct frame_extra_info *)
706 frame_obstack_alloc (sizeof (struct frame_extra_info));
707 frame_saved_regs_zalloc (fi);
708
709 fi->extra_info->frameless = 0;
710 fi->extra_info->size = 0;
711 fi->extra_info->return_pc = 0;
712
713 /* The call dummy doesn't save any registers on the stack, so we can
714 return now. */
715 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
716 {
717 return;
718 }
719 else
720 {
721 d10v_frame_init_saved_regs (fi);
722 }
723 }
724
725 static void
726 show_regs (args, from_tty)
727 char *args;
728 int from_tty;
729 {
730 int a;
731 printf_filtered ("PC=%04x (0x%x) PSW=%04x RPT_S=%04x RPT_E=%04x RPT_C=%04x\n",
732 read_register (PC_REGNUM), D10V_MAKE_IADDR (read_register (PC_REGNUM)),
733 read_register (PSW_REGNUM),
734 read_register (24),
735 read_register (25),
736 read_register (23));
737 printf_filtered ("R0-R7 %04x %04x %04x %04x %04x %04x %04x %04x\n",
738 read_register (0),
739 read_register (1),
740 read_register (2),
741 read_register (3),
742 read_register (4),
743 read_register (5),
744 read_register (6),
745 read_register (7));
746 printf_filtered ("R8-R15 %04x %04x %04x %04x %04x %04x %04x %04x\n",
747 read_register (8),
748 read_register (9),
749 read_register (10),
750 read_register (11),
751 read_register (12),
752 read_register (13),
753 read_register (14),
754 read_register (15));
755 printf_filtered ("IMAP0 %04x IMAP1 %04x DMAP %04x\n",
756 read_register (IMAP0_REGNUM),
757 read_register (IMAP1_REGNUM),
758 read_register (DMAP_REGNUM));
759 printf_filtered ("A0-A1");
760 for (a = A0_REGNUM; a <= A0_REGNUM + 1; a++)
761 {
762 char num[MAX_REGISTER_RAW_SIZE];
763 int i;
764 printf_filtered (" ");
765 read_register_gen (a, (char *) &num);
766 for (i = 0; i < MAX_REGISTER_RAW_SIZE; i++)
767 {
768 printf_filtered ("%02x", (num[i] & 0xff));
769 }
770 }
771 printf_filtered ("\n");
772 }
773
774 CORE_ADDR
775 d10v_read_pc (pid)
776 int pid;
777 {
778 int save_pid;
779 CORE_ADDR pc;
780 CORE_ADDR retval;
781
782 save_pid = inferior_pid;
783 inferior_pid = pid;
784 pc = (int) read_register (PC_REGNUM);
785 inferior_pid = save_pid;
786 retval = D10V_MAKE_IADDR (pc);
787 return retval;
788 }
789
790 void
791 d10v_write_pc (val, pid)
792 CORE_ADDR val;
793 int pid;
794 {
795 int save_pid;
796
797 save_pid = inferior_pid;
798 inferior_pid = pid;
799 write_register (PC_REGNUM, D10V_CONVERT_IADDR_TO_RAW (val));
800 inferior_pid = save_pid;
801 }
802
803 CORE_ADDR
804 d10v_read_sp ()
805 {
806 return (D10V_MAKE_DADDR (read_register (SP_REGNUM)));
807 }
808
809 void
810 d10v_write_sp (val)
811 CORE_ADDR val;
812 {
813 write_register (SP_REGNUM, D10V_CONVERT_DADDR_TO_RAW (val));
814 }
815
816 void
817 d10v_write_fp (val)
818 CORE_ADDR val;
819 {
820 write_register (FP_REGNUM, D10V_CONVERT_DADDR_TO_RAW (val));
821 }
822
823 CORE_ADDR
824 d10v_read_fp ()
825 {
826 return (D10V_MAKE_DADDR (read_register (FP_REGNUM)));
827 }
828
829 /* Function: push_return_address (pc)
830 Set up the return address for the inferior function call.
831 Needed for targets where we don't actually execute a JSR/BSR instruction */
832
833 CORE_ADDR
834 d10v_push_return_address (pc, sp)
835 CORE_ADDR pc;
836 CORE_ADDR sp;
837 {
838 write_register (LR_REGNUM, D10V_CONVERT_IADDR_TO_RAW (CALL_DUMMY_ADDRESS ()));
839 return sp;
840 }
841
842
843 /* When arguments must be pushed onto the stack, they go on in reverse
844 order. The below implements a FILO (stack) to do this. */
845
846 struct stack_item
847 {
848 int len;
849 struct stack_item *prev;
850 void *data;
851 };
852
853 static struct stack_item *push_stack_item PARAMS ((struct stack_item * prev, void *contents, int len));
854 static struct stack_item *
855 push_stack_item (prev, contents, len)
856 struct stack_item *prev;
857 void *contents;
858 int len;
859 {
860 struct stack_item *si;
861 si = xmalloc (sizeof (struct stack_item));
862 si->data = xmalloc (len);
863 si->len = len;
864 si->prev = prev;
865 memcpy (si->data, contents, len);
866 return si;
867 }
868
869 static struct stack_item *pop_stack_item PARAMS ((struct stack_item * si));
870 static struct stack_item *
871 pop_stack_item (si)
872 struct stack_item *si;
873 {
874 struct stack_item *dead = si;
875 si = si->prev;
876 free (dead->data);
877 free (dead);
878 return si;
879 }
880
881
882 CORE_ADDR
883 d10v_push_arguments (nargs, args, sp, struct_return, struct_addr)
884 int nargs;
885 value_ptr *args;
886 CORE_ADDR sp;
887 int struct_return;
888 CORE_ADDR struct_addr;
889 {
890 int i;
891 int regnum = ARG1_REGNUM;
892 struct stack_item *si = NULL;
893
894 /* Fill in registers and arg lists */
895 for (i = 0; i < nargs; i++)
896 {
897 value_ptr arg = args[i];
898 struct type *type = check_typedef (VALUE_TYPE (arg));
899 char *contents = VALUE_CONTENTS (arg);
900 int len = TYPE_LENGTH (type);
901 /* printf ("push: type=%d len=%d\n", type->code, len); */
902 if (TYPE_CODE (type) == TYPE_CODE_PTR)
903 {
904 /* pointers require special handling - first convert and
905 then store */
906 long val = extract_signed_integer (contents, len);
907 len = 2;
908 if (TYPE_TARGET_TYPE (type)
909 && (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC))
910 {
911 /* function pointer */
912 val = D10V_CONVERT_IADDR_TO_RAW (val);
913 }
914 else if (D10V_IADDR_P (val))
915 {
916 /* also function pointer! */
917 val = D10V_CONVERT_DADDR_TO_RAW (val);
918 }
919 else
920 {
921 /* data pointer */
922 val &= 0xFFFF;
923 }
924 if (regnum <= ARGN_REGNUM)
925 write_register (regnum++, val & 0xffff);
926 else
927 {
928 char ptr[2];
929 /* arg will go onto stack */
930 store_address (ptr, 2, val & 0xffff);
931 si = push_stack_item (si, ptr, 2);
932 }
933 }
934 else
935 {
936 int aligned_regnum = (regnum + 1) & ~1;
937 if (len <= 2 && regnum <= ARGN_REGNUM)
938 /* fits in a single register, do not align */
939 {
940 long val = extract_unsigned_integer (contents, len);
941 write_register (regnum++, val);
942 }
943 else if (len <= (ARGN_REGNUM - aligned_regnum + 1) * 2)
944 /* value fits in remaining registers, store keeping left
945 aligned */
946 {
947 int b;
948 regnum = aligned_regnum;
949 for (b = 0; b < (len & ~1); b += 2)
950 {
951 long val = extract_unsigned_integer (&contents[b], 2);
952 write_register (regnum++, val);
953 }
954 if (b < len)
955 {
956 long val = extract_unsigned_integer (&contents[b], 1);
957 write_register (regnum++, (val << 8));
958 }
959 }
960 else
961 {
962 /* arg will go onto stack */
963 regnum = ARGN_REGNUM + 1;
964 si = push_stack_item (si, contents, len);
965 }
966 }
967 }
968
969 while (si)
970 {
971 sp = (sp - si->len) & ~1;
972 write_memory (sp, si->data, si->len);
973 si = pop_stack_item (si);
974 }
975
976 return sp;
977 }
978
979
980 /* Given a return value in `regbuf' with a type `valtype',
981 extract and copy its value into `valbuf'. */
982
983 void
984 d10v_extract_return_value (type, regbuf, valbuf)
985 struct type *type;
986 char regbuf[REGISTER_BYTES];
987 char *valbuf;
988 {
989 int len;
990 /* printf("RET: TYPE=%d len=%d r%d=0x%x\n",type->code, TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM, (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM))); */
991 if (TYPE_CODE (type) == TYPE_CODE_PTR
992 && TYPE_TARGET_TYPE (type)
993 && (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC))
994 {
995 /* pointer to function */
996 int num;
997 short snum;
998 snum = extract_address (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM));
999 store_address (valbuf, 4, D10V_MAKE_IADDR (snum));
1000 }
1001 else if (TYPE_CODE (type) == TYPE_CODE_PTR)
1002 {
1003 /* pointer to data */
1004 int num;
1005 short snum;
1006 snum = extract_address (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM));
1007 store_address (valbuf, 4, D10V_MAKE_DADDR (snum));
1008 }
1009 else
1010 {
1011 len = TYPE_LENGTH (type);
1012 if (len == 1)
1013 {
1014 unsigned short c = extract_unsigned_integer (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM));
1015 store_unsigned_integer (valbuf, 1, c);
1016 }
1017 else if ((len & 1) == 0)
1018 memcpy (valbuf, regbuf + REGISTER_BYTE (RET1_REGNUM), len);
1019 else
1020 {
1021 /* For return values of odd size, the first byte is in the
1022 least significant part of the first register. The
1023 remaining bytes in remaining registers. Interestingly,
1024 when such values are passed in, the last byte is in the
1025 most significant byte of that same register - wierd. */
1026 memcpy (valbuf, regbuf + REGISTER_BYTE (RET1_REGNUM) + 1, len);
1027 }
1028 }
1029 }
1030
1031 /* The following code implements access to, and display of, the D10V's
1032 instruction trace buffer. The buffer consists of 64K or more
1033 4-byte words of data, of which each words includes an 8-bit count,
1034 an 8-bit segment number, and a 16-bit instruction address.
1035
1036 In theory, the trace buffer is continuously capturing instruction
1037 data that the CPU presents on its "debug bus", but in practice, the
1038 ROMified GDB stub only enables tracing when it continues or steps
1039 the program, and stops tracing when the program stops; so it
1040 actually works for GDB to read the buffer counter out of memory and
1041 then read each trace word. The counter records where the tracing
1042 stops, but there is no record of where it started, so we remember
1043 the PC when we resumed and then search backwards in the trace
1044 buffer for a word that includes that address. This is not perfect,
1045 because you will miss trace data if the resumption PC is the target
1046 of a branch. (The value of the buffer counter is semi-random, any
1047 trace data from a previous program stop is gone.) */
1048
1049 /* The address of the last word recorded in the trace buffer. */
1050
1051 #define DBBC_ADDR (0xd80000)
1052
1053 /* The base of the trace buffer, at least for the "Board_0". */
1054
1055 #define TRACE_BUFFER_BASE (0xf40000)
1056
1057 static void trace_command PARAMS ((char *, int));
1058
1059 static void untrace_command PARAMS ((char *, int));
1060
1061 static void trace_info PARAMS ((char *, int));
1062
1063 static void tdisassemble_command PARAMS ((char *, int));
1064
1065 static void display_trace PARAMS ((int, int));
1066
1067 /* True when instruction traces are being collected. */
1068
1069 static int tracing;
1070
1071 /* Remembered PC. */
1072
1073 static CORE_ADDR last_pc;
1074
1075 /* True when trace output should be displayed whenever program stops. */
1076
1077 static int trace_display;
1078
1079 /* True when trace listing should include source lines. */
1080
1081 static int default_trace_show_source = 1;
1082
1083 struct trace_buffer
1084 {
1085 int size;
1086 short *counts;
1087 CORE_ADDR *addrs;
1088 }
1089 trace_data;
1090
1091 static void
1092 trace_command (args, from_tty)
1093 char *args;
1094 int from_tty;
1095 {
1096 /* Clear the host-side trace buffer, allocating space if needed. */
1097 trace_data.size = 0;
1098 if (trace_data.counts == NULL)
1099 trace_data.counts = (short *) xmalloc (65536 * sizeof (short));
1100 if (trace_data.addrs == NULL)
1101 trace_data.addrs = (CORE_ADDR *) xmalloc (65536 * sizeof (CORE_ADDR));
1102
1103 tracing = 1;
1104
1105 printf_filtered ("Tracing is now on.\n");
1106 }
1107
1108 static void
1109 untrace_command (args, from_tty)
1110 char *args;
1111 int from_tty;
1112 {
1113 tracing = 0;
1114
1115 printf_filtered ("Tracing is now off.\n");
1116 }
1117
1118 static void
1119 trace_info (args, from_tty)
1120 char *args;
1121 int from_tty;
1122 {
1123 int i;
1124
1125 if (trace_data.size)
1126 {
1127 printf_filtered ("%d entries in trace buffer:\n", trace_data.size);
1128
1129 for (i = 0; i < trace_data.size; ++i)
1130 {
1131 printf_filtered ("%d: %d instruction%s at 0x%x\n",
1132 i, trace_data.counts[i],
1133 (trace_data.counts[i] == 1 ? "" : "s"),
1134 trace_data.addrs[i]);
1135 }
1136 }
1137 else
1138 printf_filtered ("No entries in trace buffer.\n");
1139
1140 printf_filtered ("Tracing is currently %s.\n", (tracing ? "on" : "off"));
1141 }
1142
1143 /* Print the instruction at address MEMADDR in debugged memory,
1144 on STREAM. Returns length of the instruction, in bytes. */
1145
1146 static int
1147 print_insn (memaddr, stream)
1148 CORE_ADDR memaddr;
1149 GDB_FILE *stream;
1150 {
1151 /* If there's no disassembler, something is very wrong. */
1152 if (tm_print_insn == NULL)
1153 abort ();
1154
1155 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1156 tm_print_insn_info.endian = BFD_ENDIAN_BIG;
1157 else
1158 tm_print_insn_info.endian = BFD_ENDIAN_LITTLE;
1159 return (*tm_print_insn) (memaddr, &tm_print_insn_info);
1160 }
1161
1162 static void
1163 d10v_eva_prepare_to_trace ()
1164 {
1165 if (!tracing)
1166 return;
1167
1168 last_pc = read_register (PC_REGNUM);
1169 }
1170
1171 /* Collect trace data from the target board and format it into a form
1172 more useful for display. */
1173
1174 static void
1175 d10v_eva_get_trace_data ()
1176 {
1177 int count, i, j, oldsize;
1178 int trace_addr, trace_seg, trace_cnt, next_cnt;
1179 unsigned int last_trace, trace_word, next_word;
1180 unsigned int *tmpspace;
1181
1182 if (!tracing)
1183 return;
1184
1185 tmpspace = xmalloc (65536 * sizeof (unsigned int));
1186
1187 last_trace = read_memory_unsigned_integer (DBBC_ADDR, 2) << 2;
1188
1189 /* Collect buffer contents from the target, stopping when we reach
1190 the word recorded when execution resumed. */
1191
1192 count = 0;
1193 while (last_trace > 0)
1194 {
1195 QUIT;
1196 trace_word =
1197 read_memory_unsigned_integer (TRACE_BUFFER_BASE + last_trace, 4);
1198 trace_addr = trace_word & 0xffff;
1199 last_trace -= 4;
1200 /* Ignore an apparently nonsensical entry. */
1201 if (trace_addr == 0xffd5)
1202 continue;
1203 tmpspace[count++] = trace_word;
1204 if (trace_addr == last_pc)
1205 break;
1206 if (count > 65535)
1207 break;
1208 }
1209
1210 /* Move the data to the host-side trace buffer, adjusting counts to
1211 include the last instruction executed and transforming the address
1212 into something that GDB likes. */
1213
1214 for (i = 0; i < count; ++i)
1215 {
1216 trace_word = tmpspace[i];
1217 next_word = ((i == 0) ? 0 : tmpspace[i - 1]);
1218 trace_addr = trace_word & 0xffff;
1219 next_cnt = (next_word >> 24) & 0xff;
1220 j = trace_data.size + count - i - 1;
1221 trace_data.addrs[j] = (trace_addr << 2) + 0x1000000;
1222 trace_data.counts[j] = next_cnt + 1;
1223 }
1224
1225 oldsize = trace_data.size;
1226 trace_data.size += count;
1227
1228 free (tmpspace);
1229
1230 if (trace_display)
1231 display_trace (oldsize, trace_data.size);
1232 }
1233
1234 static void
1235 tdisassemble_command (arg, from_tty)
1236 char *arg;
1237 int from_tty;
1238 {
1239 int i, count;
1240 CORE_ADDR low, high;
1241 char *space_index;
1242
1243 if (!arg)
1244 {
1245 low = 0;
1246 high = trace_data.size;
1247 }
1248 else if (!(space_index = (char *) strchr (arg, ' ')))
1249 {
1250 low = parse_and_eval_address (arg);
1251 high = low + 5;
1252 }
1253 else
1254 {
1255 /* Two arguments. */
1256 *space_index = '\0';
1257 low = parse_and_eval_address (arg);
1258 high = parse_and_eval_address (space_index + 1);
1259 if (high < low)
1260 high = low;
1261 }
1262
1263 printf_filtered ("Dump of trace from %d to %d:\n", low, high);
1264
1265 display_trace (low, high);
1266
1267 printf_filtered ("End of trace dump.\n");
1268 gdb_flush (gdb_stdout);
1269 }
1270
1271 static void
1272 display_trace (low, high)
1273 int low, high;
1274 {
1275 int i, count, trace_show_source, first, suppress;
1276 CORE_ADDR next_address;
1277
1278 trace_show_source = default_trace_show_source;
1279 if (!have_full_symbols () && !have_partial_symbols ())
1280 {
1281 trace_show_source = 0;
1282 printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
1283 printf_filtered ("Trace will not display any source.\n");
1284 }
1285
1286 first = 1;
1287 suppress = 0;
1288 for (i = low; i < high; ++i)
1289 {
1290 next_address = trace_data.addrs[i];
1291 count = trace_data.counts[i];
1292 while (count-- > 0)
1293 {
1294 QUIT;
1295 if (trace_show_source)
1296 {
1297 struct symtab_and_line sal, sal_prev;
1298
1299 sal_prev = find_pc_line (next_address - 4, 0);
1300 sal = find_pc_line (next_address, 0);
1301
1302 if (sal.symtab)
1303 {
1304 if (first || sal.line != sal_prev.line)
1305 print_source_lines (sal.symtab, sal.line, sal.line + 1, 0);
1306 suppress = 0;
1307 }
1308 else
1309 {
1310 if (!suppress)
1311 /* FIXME-32x64--assumes sal.pc fits in long. */
1312 printf_filtered ("No source file for address %s.\n",
1313 local_hex_string ((unsigned long) sal.pc));
1314 suppress = 1;
1315 }
1316 }
1317 first = 0;
1318 print_address (next_address, gdb_stdout);
1319 printf_filtered (":");
1320 printf_filtered ("\t");
1321 wrap_here (" ");
1322 next_address = next_address + print_insn (next_address, gdb_stdout);
1323 printf_filtered ("\n");
1324 gdb_flush (gdb_stdout);
1325 }
1326 }
1327 }
1328
1329
1330 static gdbarch_init_ftype d10v_gdbarch_init;
1331 static struct gdbarch *
1332 d10v_gdbarch_init (info, arches)
1333 struct gdbarch_info info;
1334 struct gdbarch_list *arches;
1335 {
1336 static LONGEST d10v_call_dummy_words[] =
1337 {0};
1338 struct gdbarch *gdbarch;
1339 int d10v_num_regs = 37;
1340
1341 /* there is only one d10v architecture */
1342 if (arches != NULL)
1343 return arches->gdbarch;
1344 gdbarch = gdbarch_alloc (&info, NULL);
1345
1346 set_gdbarch_read_pc (gdbarch, d10v_read_pc);
1347 set_gdbarch_write_pc (gdbarch, d10v_write_pc);
1348 set_gdbarch_read_fp (gdbarch, d10v_read_fp);
1349 set_gdbarch_write_fp (gdbarch, d10v_write_fp);
1350 set_gdbarch_read_sp (gdbarch, d10v_read_sp);
1351 set_gdbarch_write_sp (gdbarch, d10v_write_sp);
1352
1353 set_gdbarch_num_regs (gdbarch, d10v_num_regs);
1354 set_gdbarch_sp_regnum (gdbarch, 15);
1355 set_gdbarch_fp_regnum (gdbarch, 11);
1356 set_gdbarch_pc_regnum (gdbarch, 18);
1357 set_gdbarch_register_name (gdbarch, d10v_register_name);
1358 set_gdbarch_register_size (gdbarch, 2);
1359 set_gdbarch_register_bytes (gdbarch, (d10v_num_regs - 2) * 2 + 16);
1360 set_gdbarch_register_byte (gdbarch, d10v_register_byte);
1361 set_gdbarch_register_raw_size (gdbarch, d10v_register_raw_size);
1362 set_gdbarch_max_register_raw_size (gdbarch, 8);
1363 set_gdbarch_register_virtual_size (gdbarch, d10v_register_virtual_size);
1364 set_gdbarch_max_register_virtual_size (gdbarch, 8);
1365 set_gdbarch_register_virtual_type (gdbarch, d10v_register_virtual_type);
1366
1367 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1368 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1369 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1370 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1371 set_gdbarch_long_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1372 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1373 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1374 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1375
1376 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1377 set_gdbarch_call_dummy_length (gdbarch, 0);
1378 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1379 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
1380 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
1381 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1382 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1383 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
1384 set_gdbarch_call_dummy_words (gdbarch, d10v_call_dummy_words);
1385 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (d10v_call_dummy_words));
1386 set_gdbarch_call_dummy_p (gdbarch, 1);
1387 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1388 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
1389 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1390
1391 set_gdbarch_register_convertible (gdbarch, d10v_register_convertible);
1392 set_gdbarch_register_convert_to_virtual (gdbarch, d10v_register_convert_to_virtual);
1393 set_gdbarch_register_convert_to_raw (gdbarch, d10v_register_convert_to_raw);
1394
1395 set_gdbarch_extract_return_value (gdbarch, d10v_extract_return_value);
1396 set_gdbarch_push_arguments (gdbarch, d10v_push_arguments);
1397 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1398 set_gdbarch_push_return_address (gdbarch, d10v_push_return_address);
1399
1400 set_gdbarch_d10v_make_daddr (gdbarch, d10v_make_daddr);
1401 set_gdbarch_d10v_make_iaddr (gdbarch, d10v_make_iaddr);
1402 set_gdbarch_d10v_daddr_p (gdbarch, d10v_daddr_p);
1403 set_gdbarch_d10v_iaddr_p (gdbarch, d10v_iaddr_p);
1404 set_gdbarch_d10v_convert_daddr_to_raw (gdbarch, d10v_convert_daddr_to_raw);
1405 set_gdbarch_d10v_convert_iaddr_to_raw (gdbarch, d10v_convert_iaddr_to_raw);
1406
1407 set_gdbarch_store_struct_return (gdbarch, d10v_store_struct_return);
1408 set_gdbarch_store_return_value (gdbarch, d10v_store_return_value);
1409 set_gdbarch_extract_struct_value_address (gdbarch, d10v_extract_struct_value_address);
1410 set_gdbarch_use_struct_convention (gdbarch, d10v_use_struct_convention);
1411
1412 set_gdbarch_frame_init_saved_regs (gdbarch, d10v_frame_init_saved_regs);
1413 set_gdbarch_init_extra_frame_info (gdbarch, d10v_init_extra_frame_info);
1414
1415 set_gdbarch_pop_frame (gdbarch, d10v_pop_frame);
1416
1417 set_gdbarch_skip_prologue (gdbarch, d10v_skip_prologue);
1418 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1419 set_gdbarch_decr_pc_after_break (gdbarch, 4);
1420 set_gdbarch_function_start_offset (gdbarch, 0);
1421 set_gdbarch_breakpoint_from_pc (gdbarch, d10v_breakpoint_from_pc);
1422
1423 set_gdbarch_remote_translate_xfer_address (gdbarch, remote_d10v_translate_xfer_address);
1424
1425 set_gdbarch_frame_args_skip (gdbarch, 0);
1426 set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
1427 set_gdbarch_frame_chain (gdbarch, d10v_frame_chain);
1428 set_gdbarch_frame_chain_valid (gdbarch, d10v_frame_chain_valid);
1429 set_gdbarch_frame_saved_pc (gdbarch, d10v_frame_saved_pc);
1430 set_gdbarch_frame_args_address (gdbarch, d10v_frame_args_address);
1431 set_gdbarch_frame_locals_address (gdbarch, d10v_frame_locals_address);
1432 set_gdbarch_saved_pc_after_call (gdbarch, d10v_saved_pc_after_call);
1433 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1434
1435 return gdbarch;
1436 }
1437
1438
1439 extern void (*target_resume_hook) PARAMS ((void));
1440 extern void (*target_wait_loop_hook) PARAMS ((void));
1441
1442 void
1443 _initialize_d10v_tdep ()
1444 {
1445 register_gdbarch_init (bfd_arch_d10v, d10v_gdbarch_init);
1446
1447 tm_print_insn = print_insn_d10v;
1448
1449 target_resume_hook = d10v_eva_prepare_to_trace;
1450 target_wait_loop_hook = d10v_eva_get_trace_data;
1451
1452 add_com ("regs", class_vars, show_regs, "Print all registers");
1453
1454 add_com ("trace", class_support, trace_command,
1455 "Enable tracing of instruction execution.");
1456
1457 add_com ("untrace", class_support, untrace_command,
1458 "Disable tracing of instruction execution.");
1459
1460 add_com ("tdisassemble", class_vars, tdisassemble_command,
1461 "Disassemble the trace buffer.\n\
1462 Two optional arguments specify a range of trace buffer entries\n\
1463 as reported by info trace (NOT addresses!).");
1464
1465 add_info ("trace", trace_info,
1466 "Display info about the trace data buffer.");
1467
1468 add_show_from_set (add_set_cmd ("tracedisplay", no_class,
1469 var_integer, (char *) &trace_display,
1470 "Set automatic display of trace.\n", &setlist),
1471 &showlist);
1472 add_show_from_set (add_set_cmd ("tracesource", no_class,
1473 var_integer, (char *) &default_trace_show_source,
1474 "Set display of source code with trace.\n", &setlist),
1475 &showlist);
1476
1477 }