gdb/dcache.c

   1 /* Caching code.  Typically used by remote back ends for
   2    caching remote memory.
   3
   4    Copyright 1992-1993, 1995, 1998-1999 Free Software Foundation, Inc.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 2 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 59 Temple Place - Suite 330,
  21    Boston, MA 02111-1307, USA.  */
  22
  23 #include "defs.h"
  24 #include "dcache.h"
  25 #include "gdbcmd.h"
  26 #include "gdb_string.h"
  27 #include "gdbcore.h"
  28
  29 /*
  30    The data cache could lead to incorrect results because it doesn't know
  31    about volatile variables, thus making it impossible to debug
  32    functions which use memory mapped I/O devices.
  33
  34    set remotecache 0
  35
  36    In those cases.
  37
  38    In general the dcache speeds up performance, some speed improvement
  39    comes from the actual caching mechanism, but the major gain is in
  40    the reduction of the remote protocol overhead; instead of reading
  41    or writing a large area of memory in 4 byte requests, the cache
  42    bundles up the requests into 32 byte (actually LINE_SIZE) chunks.
  43    Reducing the overhead to an eighth of what it was.  This is very
  44    obvious when displaying a large amount of data,
  45
  46    eg, x/200x 0
  47
  48    caching     |   no    yes
  49    ----------------------------
  50    first time  |   4 sec  2 sec improvement due to chunking
  51    second time |   4 sec  0 sec improvement due to caching
  52
  53    The cache structure is unusual, we keep a number of cache blocks
  54    (DCACHE_SIZE) and each one caches a LINE_SIZEed area of memory.
  55    Within each line we remember the address of the line (always a
  56    multiple of the LINE_SIZE) and a vector of bytes over the range.
  57    There's another vector which contains the state of the bytes.
  58
  59    ENTRY_BAD means that the byte is just plain wrong, and has no
  60    correspondence with anything else (as it would when the cache is
  61    turned on, but nothing has been done to it.
  62
  63    ENTRY_DIRTY means that the byte has some data in it which should be
  64    written out to the remote target one day, but contains correct
  65    data.  ENTRY_OK means that the data is the same in the cache as it
  66    is in remote memory.
  67
  68
  69    The ENTRY_DIRTY state is necessary because GDB likes to write large
  70    lumps of memory in small bits.  If the caching mechanism didn't
  71    maintain the DIRTY information, then something like a two byte
  72    write would mean that the entire cache line would have to be read,
  73    the two bytes modified and then written out again.  The alternative
  74    would be to not read in the cache line in the first place, and just
  75    write the two bytes directly into target memory.  The trouble with
  76    that is that it really nails performance, because of the remote
  77    protocol overhead.  This way, all those little writes are bundled
  78    up into an entire cache line write in one go, without having to
  79    read the cache line in the first place.
  80
  81
  82  */
  83
  84
  85 /* This value regulates the number of cache blocks stored.
  86    Smaller values reduce the time spent searching for a cache
  87    line, and reduce memory requirements, but increase the risk
  88    of a line not being in memory */
  89
  90 #define DCACHE_SIZE 64
  91
  92 /* This value regulates the size of a cache line.  Smaller values
  93    reduce the time taken to read a single byte, but reduce overall
  94    throughput.  */
  95
  96 #define LINE_SIZE_POWER (5)
  97 #define LINE_SIZE (1 << LINE_SIZE_POWER)
  98
  99 /* Each cache block holds LINE_SIZE bytes of data
 100    starting at a multiple-of-LINE_SIZE address.  */
 101
 102 #define LINE_SIZE_MASK  ((LINE_SIZE - 1))
 103 #define XFORM(x)        ((x) & LINE_SIZE_MASK)
 104 #define MASK(x)         ((x) & ~LINE_SIZE_MASK)
 105
 106
 107 #define ENTRY_BAD   0           /* data at this byte is wrong */
 108 #define ENTRY_DIRTY 1           /* data at this byte needs to be written back */
 109 #define ENTRY_OK    2           /* data at this byte is same as in memory */
 110
 111
 112 struct dcache_block
 113   {
 114     struct dcache_block *p;     /* next in list */
 115     CORE_ADDR addr;             /* Address for which data is recorded.  */
 116     char data[LINE_SIZE];       /* bytes at given address */
 117     unsigned char state[LINE_SIZE];     /* what state the data is in */
 118
 119     /* whether anything in state is dirty - used to speed up the
 120        dirty scan. */
 121     int anydirty;
 122
 123     int refs;
 124   };
 125
 126
 127 struct dcache_struct
 128   {
 129     /* Function to actually read the target memory. */
 130     memxferfunc read_memory;
 131
 132     /* Function to actually write the target memory */
 133     memxferfunc write_memory;
 134
 135     /* free list */
 136     struct dcache_block *free_head;
 137     struct dcache_block *free_tail;
 138
 139     /* in use list */
 140     struct dcache_block *valid_head;
 141     struct dcache_block *valid_tail;
 142
 143     /* The cache itself. */
 144     struct dcache_block *the_cache;
 145
 146     /* potentially, if the cache was enabled, and then turned off, and
 147        then turned on again, the stuff in it could be stale, so this is
 148        used to mark it */
 149     int cache_has_stuff;
 150   };
 151
 152 static int dcache_poke_byte (DCACHE * dcache, CORE_ADDR addr, char *ptr);
 153
 154 static int dcache_peek_byte (DCACHE * dcache, CORE_ADDR addr, char *ptr);
 155
 156 static struct dcache_block *dcache_hit (DCACHE * dcache, CORE_ADDR addr);
 157
 158 static int dcache_write_line (DCACHE * dcache, struct dcache_block *db);
 159
 160 static struct dcache_block *dcache_alloc (DCACHE * dcache);
 161
 162 static int dcache_writeback (DCACHE * dcache);
 163
 164 static void dcache_info (char *exp, int tty);
 165
 166 void _initialize_dcache (void);
 167
 168 static int dcache_enabled_p = 0;
 169
 170 DCACHE *last_cache;             /* Used by info dcache */
 171
 172
 173 /* Free all the data cache blocks, thus discarding all cached data.  */
 174
 175 void
 176 dcache_flush (dcache)
 177      DCACHE *dcache;
 178 {
 179   int i;
 180   dcache->valid_head = 0;
 181   dcache->valid_tail = 0;
 182
 183   dcache->free_head = 0;
 184   dcache->free_tail = 0;
 185
 186   for (i = 0; i < DCACHE_SIZE; i++)
 187     {
 188       struct dcache_block *db = dcache->the_cache + i;
 189
 190       if (!dcache->free_head)
 191         dcache->free_head = db;
 192       else
 193         dcache->free_tail->p = db;
 194       dcache->free_tail = db;
 195       db->p = 0;
 196     }
 197
 198   dcache->cache_has_stuff = 0;
 199
 200   return;
 201 }
 202
 203 /* If addr is present in the dcache, return the address of the block
 204    containing it. */
 205
 206 static struct dcache_block *
 207 dcache_hit (dcache, addr)
 208      DCACHE *dcache;
 209      CORE_ADDR addr;
 210 {
 211   register struct dcache_block *db;
 212
 213   /* Search all cache blocks for one that is at this address.  */
 214   db = dcache->valid_head;
 215
 216   while (db)
 217     {
 218       if (MASK (addr) == db->addr)
 219         {
 220           db->refs++;
 221           return db;
 222         }
 223       db = db->p;
 224     }
 225
 226   return NULL;
 227 }
 228
 229 /* Make sure that anything in this line which needs to
 230    be written is. */
 231
 232 static int
 233 dcache_write_line (dcache, db)
 234      DCACHE *dcache;
 235      register struct dcache_block *db;
 236 {
 237   int s;
 238   int e;
 239   s = 0;
 240   if (db->anydirty)
 241     {
 242       for (s = 0; s < LINE_SIZE; s++)
 243         {
 244           if (db->state[s] == ENTRY_DIRTY)
 245             {
 246               int len = 0;
 247               for (e = s; e < LINE_SIZE; e++, len++)
 248                 if (db->state[e] != ENTRY_DIRTY)
 249                   break;
 250               {
 251                 /* all bytes from s..s+len-1 need to
 252                    be written out */
 253                 int done = 0;
 254                 while (done < len)
 255                   {
 256                     int t = dcache->write_memory (db->addr + s + done,
 257                                                   db->data + s + done,
 258                                                   len - done);
 259                     if (t == 0)
 260                       return 0;
 261                     done += t;
 262                   }
 263                 memset (db->state + s, ENTRY_OK, len);
 264                 s = e;
 265               }
 266             }
 267         }
 268       db->anydirty = 0;
 269     }
 270   return 1;
 271 }
 272
 273
 274 /* Get a free cache block, put or keep it on the valid list,
 275    and return its address.  The caller should store into the block
 276    the address and data that it describes, then remque it from the
 277    free list and insert it into the valid list.  This procedure
 278    prevents errors from creeping in if a memory retrieval is
 279    interrupted (which used to put garbage blocks in the valid
 280    list...).  */
 281
 282 static struct dcache_block *
 283 dcache_alloc (dcache)
 284      DCACHE *dcache;
 285 {
 286   register struct dcache_block *db;
 287
 288   if (dcache_enabled_p == 0)
 289     abort ();
 290
 291   /* Take something from the free list */
 292   db = dcache->free_head;
 293   if (db)
 294     {
 295       dcache->free_head = db->p;
 296     }
 297   else
 298     {
 299       /* Nothing left on free list, so grab one from the valid list */
 300       db = dcache->valid_head;
 301       dcache->valid_head = db->p;
 302
 303       dcache_write_line (dcache, db);
 304     }
 305
 306   /* append this line to end of valid list */
 307   if (!dcache->valid_head)
 308     dcache->valid_head = db;
 309   else
 310     dcache->valid_tail->p = db;
 311   dcache->valid_tail = db;
 312   db->p = 0;
 313
 314   return db;
 315 }
 316
 317 /* Using the data cache DCACHE return the contents of the byte at
 318    address ADDR in the remote machine.
 319
 320    Returns 0 on error. */
 321
 322 static int
 323 dcache_peek_byte (dcache, addr, ptr)
 324      DCACHE *dcache;
 325      CORE_ADDR addr;
 326      char *ptr;
 327 {
 328   register struct dcache_block *db = dcache_hit (dcache, addr);
 329   int ok = 1;
 330   int done = 0;
 331   if (db == 0
 332       || db->state[XFORM (addr)] == ENTRY_BAD)
 333     {
 334       if (db)
 335         {
 336           dcache_write_line (dcache, db);
 337         }
 338       else
 339         db = dcache_alloc (dcache);
 340       immediate_quit++;
 341       db->addr = MASK (addr);
 342       while (done < LINE_SIZE)
 343         {
 344           int try =
 345           (*dcache->read_memory)
 346           (db->addr + done,
 347            db->data + done,
 348            LINE_SIZE - done);
 349           if (try == 0)
 350             return 0;
 351           done += try;
 352         }
 353       immediate_quit--;
 354
 355       memset (db->state, ENTRY_OK, sizeof (db->data));
 356       db->anydirty = 0;
 357     }
 358   *ptr = db->data[XFORM (addr)];
 359   return ok;
 360 }
 361
 362 /* Writeback any dirty lines to the remote. */
 363 static int
 364 dcache_writeback (dcache)
 365      DCACHE *dcache;
 366 {
 367   struct dcache_block *db;
 368
 369   db = dcache->valid_head;
 370
 371   while (db)
 372     {
 373       if (!dcache_write_line (dcache, db))
 374         return 0;
 375       db = db->p;
 376     }
 377   return 1;
 378 }
 379
 380
 381 /* Write the byte at PTR into ADDR in the data cache.
 382    Return zero on write error.
 383  */
 384
 385 static int
 386 dcache_poke_byte (dcache, addr, ptr)
 387      DCACHE *dcache;
 388      CORE_ADDR addr;
 389      char *ptr;
 390 {
 391   register struct dcache_block *db = dcache_hit (dcache, addr);
 392
 393   if (!db)
 394     {
 395       db = dcache_alloc (dcache);
 396       db->addr = MASK (addr);
 397       memset (db->state, ENTRY_BAD, sizeof (db->data));
 398     }
 399
 400   db->data[XFORM (addr)] = *ptr;
 401   db->state[XFORM (addr)] = ENTRY_DIRTY;
 402   db->anydirty = 1;
 403   return 1;
 404 }
 405
 406 /* Initialize the data cache.  */
 407 DCACHE *
 408 dcache_init (reading, writing)
 409      memxferfunc reading;
 410      memxferfunc writing;
 411 {
 412   int csize = sizeof (struct dcache_block) * DCACHE_SIZE;
 413   DCACHE *dcache;
 414
 415   dcache = (DCACHE *) xmalloc (sizeof (*dcache));
 416   dcache->read_memory = reading;
 417   dcache->write_memory = writing;
 418
 419   dcache->the_cache = (struct dcache_block *) xmalloc (csize);
 420   memset (dcache->the_cache, 0, csize);
 421
 422   dcache_flush (dcache);
 423
 424   last_cache = dcache;
 425   return dcache;
 426 }
 427
 428 /* Read or write LEN bytes from inferior memory at MEMADDR, transferring
 429    to or from debugger address MYADDR.  Write to inferior if SHOULD_WRITE is
 430    nonzero.
 431
 432    Returns length of data written or read; 0 for error.
 433
 434    This routine is indended to be called by remote_xfer_ functions. */
 435
 436 int
 437 dcache_xfer_memory (dcache, memaddr, myaddr, len, should_write)
 438      DCACHE *dcache;
 439      CORE_ADDR memaddr;
 440      char *myaddr;
 441      int len;
 442      int should_write;
 443 {
 444   int i;
 445
 446   if (dcache_enabled_p)
 447     {
 448       int (*xfunc) (DCACHE * dcache, CORE_ADDR addr, char *ptr);
 449       xfunc = should_write ? dcache_poke_byte : dcache_peek_byte;
 450
 451       for (i = 0; i < len; i++)
 452         {
 453           if (!xfunc (dcache, memaddr + i, myaddr + i))
 454             return 0;
 455         }
 456       dcache->cache_has_stuff = 1;
 457       dcache_writeback (dcache);
 458     }
 459   else
 460     {
 461       memxferfunc xfunc;
 462       xfunc = should_write ? dcache->write_memory : dcache->read_memory;
 463
 464       if (dcache->cache_has_stuff)
 465         dcache_flush (dcache);
 466
 467       len = xfunc (memaddr, myaddr, len);
 468     }
 469   return len;
 470 }
 471
 472 static void
 473 dcache_info (exp, tty)
 474      char *exp;
 475      int tty;
 476 {
 477   struct dcache_block *p;
 478
 479   if (!dcache_enabled_p)
 480     {
 481       printf_filtered ("Dcache not enabled\n");
 482       return;
 483     }
 484   printf_filtered ("Dcache enabled, line width %d, depth %d\n",
 485                    LINE_SIZE, DCACHE_SIZE);
 486
 487   printf_filtered ("Cache state:\n");
 488
 489   for (p = last_cache->valid_head; p; p = p->p)
 490     {
 491       int j;
 492       printf_filtered ("Line at %s, referenced %d times\n",
 493                        paddr (p->addr), p->refs);
 494
 495       for (j = 0; j < LINE_SIZE; j++)
 496         printf_filtered ("%02x", p->data[j] & 0xFF);
 497       printf_filtered ("\n");
 498
 499       for (j = 0; j < LINE_SIZE; j++)
 500         printf_filtered (" %2x", p->state[j]);
 501       printf_filtered ("\n");
 502     }
 503 }
 504
 505 /* Turn dcache on or off. */
 506 void
 507 set_dcache_state (int what)
 508 {
 509   dcache_enabled_p = !!what;
 510 }
 511
 512 void
 513 _initialize_dcache ()
 514 {
 515   add_show_from_set
 516     (add_set_cmd ("remotecache", class_support, var_boolean,
 517                   (char *) &dcache_enabled_p,
 518                   "\
 519 Set cache use for remote targets.\n\
 520 When on, use data caching for remote targets.  For many remote targets\n\
 521 this option can offer better throughput for reading target memory.\n\
 522 Unfortunately, gdb does not currently know anything about volatile\n\
 523 registers and thus data caching will produce incorrect results with\n\
 524 volatile registers are in use.  By default, this option is off.",
 525                   &setlist),
 526      &showlist);
 527
 528   add_info ("dcache", dcache_info,
 529             "Print information on the dcache performance.");
 530
 531 }