gdb/gdbserver/linux-arm-low.c

   1 /* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
   2    Copyright (C) 1995-2017 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "server.h"
  20 #include "linux-low.h"
  21 #include "arch/arm.h"
  22 #include "arch/arm-linux.h"
  23 #include "arch/arm-get-next-pcs.h"
  24 #include "linux-aarch32-low.h"
  25
  26 #include <sys/uio.h>
  27 /* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
  28    On Bionic elf.h and linux/elf.h have conflicting definitions.  */
  29 #ifndef ELFMAG0
  30 #include <elf.h>
  31 #endif
  32 #include "nat/gdb_ptrace.h"
  33 #include <signal.h>
  34 #include <sys/syscall.h>
  35
  36 /* Defined in auto-generated files.  */
  37 void init_registers_arm (void);
  38 extern const struct target_desc *tdesc_arm;
  39
  40 void init_registers_arm_with_iwmmxt (void);
  41 extern const struct target_desc *tdesc_arm_with_iwmmxt;
  42
  43 void init_registers_arm_with_vfpv2 (void);
  44 extern const struct target_desc *tdesc_arm_with_vfpv2;
  45
  46 void init_registers_arm_with_vfpv3 (void);
  47 extern const struct target_desc *tdesc_arm_with_vfpv3;
  48
  49 #ifndef PTRACE_GET_THREAD_AREA
  50 #define PTRACE_GET_THREAD_AREA 22
  51 #endif
  52
  53 #ifndef PTRACE_GETWMMXREGS
  54 # define PTRACE_GETWMMXREGS 18
  55 # define PTRACE_SETWMMXREGS 19
  56 #endif
  57
  58 #ifndef PTRACE_GETVFPREGS
  59 # define PTRACE_GETVFPREGS 27
  60 # define PTRACE_SETVFPREGS 28
  61 #endif
  62
  63 #ifndef PTRACE_GETHBPREGS
  64 #define PTRACE_GETHBPREGS 29
  65 #define PTRACE_SETHBPREGS 30
  66 #endif
  67
  68 /* Information describing the hardware breakpoint capabilities.  */
  69 static struct
  70 {
  71   unsigned char arch;
  72   unsigned char max_wp_length;
  73   unsigned char wp_count;
  74   unsigned char bp_count;
  75 } arm_linux_hwbp_cap;
  76
  77 /* Enum describing the different types of ARM hardware break-/watch-points.  */
  78 typedef enum
  79 {
  80   arm_hwbp_break = 0,
  81   arm_hwbp_load = 1,
  82   arm_hwbp_store = 2,
  83   arm_hwbp_access = 3
  84 } arm_hwbp_type;
  85
  86 /* Type describing an ARM Hardware Breakpoint Control register value.  */
  87 typedef unsigned int arm_hwbp_control_t;
  88
  89 /* Structure used to keep track of hardware break-/watch-points.  */
  90 struct arm_linux_hw_breakpoint
  91 {
  92   /* Address to break on, or being watched.  */
  93   unsigned int address;
  94   /* Control register for break-/watch- point.  */
  95   arm_hwbp_control_t control;
  96 };
  97
  98 /* Since we cannot dynamically allocate subfields of arch_process_info,
  99    assume a maximum number of supported break-/watchpoints.  */
 100 #define MAX_BPTS 32
 101 #define MAX_WPTS 32
 102
 103 /* Per-process arch-specific data we want to keep.  */
 104 struct arch_process_info
 105 {
 106   /* Hardware breakpoints for this process.  */
 107   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
 108   /* Hardware watchpoints for this process.  */
 109   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
 110 };
 111
 112 /* Per-thread arch-specific data we want to keep.  */
 113 struct arch_lwp_info
 114 {
 115   /* Non-zero if our copy differs from what's recorded in the thread.  */
 116   char bpts_changed[MAX_BPTS];
 117   char wpts_changed[MAX_WPTS];
 118   /* Cached stopped data address.  */
 119   CORE_ADDR stopped_data_address;
 120 };
 121
 122 /* These are in <asm/elf.h> in current kernels.  */
 123 #define HWCAP_VFP       64
 124 #define HWCAP_IWMMXT    512
 125 #define HWCAP_NEON      4096
 126 #define HWCAP_VFPv3     8192
 127 #define HWCAP_VFPv3D16  16384
 128
 129 #ifdef HAVE_SYS_REG_H
 130 #include <sys/reg.h>
 131 #endif
 132
 133 #define arm_num_regs 26
 134
 135 static int arm_regmap[] = {
 136   0, 4, 8, 12, 16, 20, 24, 28,
 137   32, 36, 40, 44, 48, 52, 56, 60,
 138   -1, -1, -1, -1, -1, -1, -1, -1, -1,
 139   64
 140 };
 141
 142 /* Forward declarations needed for get_next_pcs ops.  */
 143 static ULONGEST get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
 144                                                            int len,
 145                                                            int byte_order);
 146
 147 static CORE_ADDR get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self,
 148                                                 CORE_ADDR val);
 149
 150 static CORE_ADDR get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self);
 151
 152 static int get_next_pcs_is_thumb (struct arm_get_next_pcs *self);
 153
 154 /* get_next_pcs operations.  */
 155 static struct arm_get_next_pcs_ops get_next_pcs_ops = {
 156   get_next_pcs_read_memory_unsigned_integer,
 157   get_next_pcs_syscall_next_pc,
 158   get_next_pcs_addr_bits_remove,
 159   get_next_pcs_is_thumb,
 160   arm_linux_get_next_pcs_fixup,
 161 };
 162
 163 static int
 164 arm_cannot_store_register (int regno)
 165 {
 166   return (regno >= arm_num_regs);
 167 }
 168
 169 static int
 170 arm_cannot_fetch_register (int regno)
 171 {
 172   return (regno >= arm_num_regs);
 173 }
 174
 175 static void
 176 arm_fill_wmmxregset (struct regcache *regcache, void *buf)
 177 {
 178   int i;
 179
 180   if (regcache->tdesc != tdesc_arm_with_iwmmxt)
 181     return;
 182
 183   for (i = 0; i < 16; i++)
 184     collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
 185
 186   /* We only have access to wcssf, wcasf, and wcgr0-wcgr3.  */
 187   for (i = 0; i < 6; i++)
 188     collect_register (regcache, arm_num_regs + i + 16,
 189                       (char *) buf + 16 * 8 + i * 4);
 190 }
 191
 192 static void
 193 arm_store_wmmxregset (struct regcache *regcache, const void *buf)
 194 {
 195   int i;
 196
 197   if (regcache->tdesc != tdesc_arm_with_iwmmxt)
 198     return;
 199
 200   for (i = 0; i < 16; i++)
 201     supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
 202
 203   /* We only have access to wcssf, wcasf, and wcgr0-wcgr3.  */
 204   for (i = 0; i < 6; i++)
 205     supply_register (regcache, arm_num_regs + i + 16,
 206                      (char *) buf + 16 * 8 + i * 4);
 207 }
 208
 209 static void
 210 arm_fill_vfpregset (struct regcache *regcache, void *buf)
 211 {
 212   int num;
 213
 214   if (regcache->tdesc == tdesc_arm_with_neon
 215       || regcache->tdesc == tdesc_arm_with_vfpv3)
 216     num = 32;
 217   else if (regcache->tdesc == tdesc_arm_with_vfpv2)
 218     num = 16;
 219   else
 220     return;
 221
 222   arm_fill_vfpregset_num (regcache, buf, num);
 223 }
 224
 225 /* Wrapper of UNMAKE_THUMB_ADDR for get_next_pcs.  */
 226 static CORE_ADDR
 227 get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self, CORE_ADDR val)
 228 {
 229   return UNMAKE_THUMB_ADDR (val);
 230 }
 231
 232 static void
 233 arm_store_vfpregset (struct regcache *regcache, const void *buf)
 234 {
 235   int num;
 236
 237   if (regcache->tdesc == tdesc_arm_with_neon
 238       || regcache->tdesc == tdesc_arm_with_vfpv3)
 239     num = 32;
 240   else if (regcache->tdesc == tdesc_arm_with_vfpv2)
 241     num = 16;
 242   else
 243     return;
 244
 245   arm_store_vfpregset_num (regcache, buf, num);
 246 }
 247
 248 /* Wrapper of arm_is_thumb_mode for get_next_pcs.  */
 249 static int
 250 get_next_pcs_is_thumb (struct arm_get_next_pcs *self)
 251 {
 252   return arm_is_thumb_mode ();
 253 }
 254
 255 /* Read memory from the inferiror.
 256    BYTE_ORDER is ignored and there to keep compatiblity with GDB's
 257    read_memory_unsigned_integer. */
 258 static ULONGEST
 259 get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
 260                                            int len,
 261                                            int byte_order)
 262 {
 263   ULONGEST res;
 264
 265   res = 0;
 266   (*the_target->read_memory) (memaddr, (unsigned char *) &res, len);
 267   return res;
 268 }
 269
 270 /* Fetch the thread-local storage pointer for libthread_db.  */
 271
 272 ps_err_e
 273 ps_get_thread_area (struct ps_prochandle *ph,
 274                     lwpid_t lwpid, int idx, void **base)
 275 {
 276   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 277     return PS_ERR;
 278
 279   /* IDX is the bias from the thread pointer to the beginning of the
 280      thread descriptor.  It has to be subtracted due to implementation
 281      quirks in libthread_db.  */
 282   *base = (void *) ((char *)*base - idx);
 283
 284   return PS_OK;
 285 }
 286
 287
 288 /* Query Hardware Breakpoint information for the target we are attached to
 289    (using PID as ptrace argument) and set up arm_linux_hwbp_cap.  */
 290 static void
 291 arm_linux_init_hwbp_cap (int pid)
 292 {
 293   unsigned int val;
 294
 295   if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
 296     return;
 297
 298   arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
 299   if (arm_linux_hwbp_cap.arch == 0)
 300     return;
 301
 302   arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
 303   arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
 304   arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);
 305
 306   if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
 307     internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
 308   if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
 309     internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
 310 }
 311
 312 /* How many hardware breakpoints are available?  */
 313 static int
 314 arm_linux_get_hw_breakpoint_count (void)
 315 {
 316   return arm_linux_hwbp_cap.bp_count;
 317 }
 318
 319 /* How many hardware watchpoints are available?  */
 320 static int
 321 arm_linux_get_hw_watchpoint_count (void)
 322 {
 323   return arm_linux_hwbp_cap.wp_count;
 324 }
 325
 326 /* Maximum length of area watched by hardware watchpoint.  */
 327 static int
 328 arm_linux_get_hw_watchpoint_max_length (void)
 329 {
 330   return arm_linux_hwbp_cap.max_wp_length;
 331 }
 332
 333 /* Initialize an ARM hardware break-/watch-point control register value.
 334    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
 335    type of break-/watch-point; ENABLE indicates whether the point is enabled.
 336    */
 337 static arm_hwbp_control_t
 338 arm_hwbp_control_initialize (unsigned byte_address_select,
 339                              arm_hwbp_type hwbp_type,
 340                              int enable)
 341 {
 342   gdb_assert ((byte_address_select & ~0xffU) == 0);
 343   gdb_assert (hwbp_type != arm_hwbp_break
 344               || ((byte_address_select & 0xfU) != 0));
 345
 346   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
 347 }
 348
 349 /* Does the breakpoint control value CONTROL have the enable bit set?  */
 350 static int
 351 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
 352 {
 353   return control & 0x1;
 354 }
 355
 356 /* Is the breakpoint control value CONTROL initialized?  */
 357 static int
 358 arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
 359 {
 360   return control != 0;
 361 }
 362
 363 /* Change a breakpoint control word so that it is in the disabled state.  */
 364 static arm_hwbp_control_t
 365 arm_hwbp_control_disable (arm_hwbp_control_t control)
 366 {
 367   return control & ~0x1;
 368 }
 369
 370 /* Are two break-/watch-points equal?  */
 371 static int
 372 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
 373                                const struct arm_linux_hw_breakpoint *p2)
 374 {
 375   return p1->address == p2->address && p1->control == p2->control;
 376 }
 377
 378 /* Convert a raw breakpoint type to an enum arm_hwbp_type.  */
 379
 380 static arm_hwbp_type
 381 raw_bkpt_type_to_arm_hwbp_type (enum raw_bkpt_type raw_type)
 382 {
 383   switch (raw_type)
 384     {
 385     case raw_bkpt_type_hw:
 386       return arm_hwbp_break;
 387     case raw_bkpt_type_write_wp:
 388       return arm_hwbp_store;
 389     case raw_bkpt_type_read_wp:
 390       return arm_hwbp_load;
 391     case raw_bkpt_type_access_wp:
 392       return arm_hwbp_access;
 393     default:
 394       gdb_assert_not_reached ("unhandled raw type");
 395     }
 396 }
 397
 398 /* Initialize the hardware breakpoint structure P for a breakpoint or
 399    watchpoint at ADDR to LEN.  The type of watchpoint is given in TYPE.
 400    Returns -1 if TYPE is unsupported, or -2 if the particular combination
 401    of ADDR and LEN cannot be implemented.  Otherwise, returns 0 if TYPE
 402    represents a breakpoint and 1 if type represents a watchpoint.  */
 403 static int
 404 arm_linux_hw_point_initialize (enum raw_bkpt_type raw_type, CORE_ADDR addr,
 405                                int len, struct arm_linux_hw_breakpoint *p)
 406 {
 407   arm_hwbp_type hwbp_type;
 408   unsigned mask;
 409
 410   hwbp_type = raw_bkpt_type_to_arm_hwbp_type (raw_type);
 411
 412   if (hwbp_type == arm_hwbp_break)
 413     {
 414       /* For breakpoints, the length field encodes the mode.  */
 415       switch (len)
 416         {
 417         case 2:  /* 16-bit Thumb mode breakpoint */
 418         case 3:  /* 32-bit Thumb mode breakpoint */
 419           mask = 0x3;
 420           addr &= ~1;
 421           break;
 422         case 4:  /* 32-bit ARM mode breakpoint */
 423           mask = 0xf;
 424           addr &= ~3;
 425           break;
 426         default:
 427           /* Unsupported. */
 428           return -2;
 429         }
 430     }
 431   else
 432     {
 433       CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
 434       CORE_ADDR aligned_addr;
 435
 436       /* Can not set watchpoints for zero or negative lengths.  */
 437       if (len <= 0)
 438         return -2;
 439       /* The current ptrace interface can only handle watchpoints that are a
 440          power of 2.  */
 441       if ((len & (len - 1)) != 0)
 442         return -2;
 443
 444       /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
 445          range covered by a watchpoint.  */
 446       aligned_addr = addr & ~(max_wp_length - 1);
 447       if (aligned_addr + max_wp_length < addr + len)
 448         return -2;
 449
 450       mask = (1 << len) - 1;
 451     }
 452
 453   p->address = (unsigned int) addr;
 454   p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
 455
 456   return hwbp_type != arm_hwbp_break;
 457 }
 458
 459 /* Callback to mark a watch-/breakpoint to be updated in all threads of
 460    the current process.  */
 461
 462 struct update_registers_data
 463 {
 464   int watch;
 465   int i;
 466 };
 467
 468 static int
 469 update_registers_callback (struct inferior_list_entry *entry, void *arg)
 470 {
 471   struct thread_info *thread = (struct thread_info *) entry;
 472   struct lwp_info *lwp = get_thread_lwp (thread);
 473   struct update_registers_data *data = (struct update_registers_data *) arg;
 474
 475   /* Only update the threads of the current process.  */
 476   if (pid_of (thread) == pid_of (current_thread))
 477     {
 478       /* The actual update is done later just before resuming the lwp,
 479          we just mark that the registers need updating.  */
 480       if (data->watch)
 481         lwp->arch_private->wpts_changed[data->i] = 1;
 482       else
 483         lwp->arch_private->bpts_changed[data->i] = 1;
 484
 485       /* If the lwp isn't stopped, force it to momentarily pause, so
 486          we can update its breakpoint registers.  */
 487       if (!lwp->stopped)
 488         linux_stop_lwp (lwp);
 489     }
 490
 491   return 0;
 492 }
 493
 494 static int
 495 arm_supports_z_point_type (char z_type)
 496 {
 497   switch (z_type)
 498     {
 499     case Z_PACKET_SW_BP:
 500     case Z_PACKET_HW_BP:
 501     case Z_PACKET_WRITE_WP:
 502     case Z_PACKET_READ_WP:
 503     case Z_PACKET_ACCESS_WP:
 504       return 1;
 505     default:
 506       /* Leave the handling of sw breakpoints with the gdb client.  */
 507       return 0;
 508     }
 509 }
 510
 511 /* Insert hardware break-/watchpoint.  */
 512 static int
 513 arm_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
 514                   int len, struct raw_breakpoint *bp)
 515 {
 516   struct process_info *proc = current_process ();
 517   struct arm_linux_hw_breakpoint p, *pts;
 518   int watch, i, count;
 519
 520   watch = arm_linux_hw_point_initialize (type, addr, len, &p);
 521   if (watch < 0)
 522     {
 523       /* Unsupported.  */
 524       return watch == -1 ? 1 : -1;
 525     }
 526
 527   if (watch)
 528     {
 529       count = arm_linux_get_hw_watchpoint_count ();
 530       pts = proc->priv->arch_private->wpts;
 531     }
 532   else
 533     {
 534       count = arm_linux_get_hw_breakpoint_count ();
 535       pts = proc->priv->arch_private->bpts;
 536     }
 537
 538   for (i = 0; i < count; i++)
 539     if (!arm_hwbp_control_is_enabled (pts[i].control))
 540       {
 541         struct update_registers_data data = { watch, i };
 542         pts[i] = p;
 543         find_inferior (&all_threads, update_registers_callback, &data);
 544         return 0;
 545       }
 546
 547   /* We're out of watchpoints.  */
 548   return -1;
 549 }
 550
 551 /* Remove hardware break-/watchpoint.  */
 552 static int
 553 arm_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
 554                   int len, struct raw_breakpoint *bp)
 555 {
 556   struct process_info *proc = current_process ();
 557   struct arm_linux_hw_breakpoint p, *pts;
 558   int watch, i, count;
 559
 560   watch = arm_linux_hw_point_initialize (type, addr, len, &p);
 561   if (watch < 0)
 562     {
 563       /* Unsupported.  */
 564       return -1;
 565     }
 566
 567   if (watch)
 568     {
 569       count = arm_linux_get_hw_watchpoint_count ();
 570       pts = proc->priv->arch_private->wpts;
 571     }
 572   else
 573     {
 574       count = arm_linux_get_hw_breakpoint_count ();
 575       pts = proc->priv->arch_private->bpts;
 576     }
 577
 578   for (i = 0; i < count; i++)
 579     if (arm_linux_hw_breakpoint_equal (&p, pts + i))
 580       {
 581         struct update_registers_data data = { watch, i };
 582         pts[i].control = arm_hwbp_control_disable (pts[i].control);
 583         find_inferior (&all_threads, update_registers_callback, &data);
 584         return 0;
 585       }
 586
 587   /* No watchpoint matched.  */
 588   return -1;
 589 }
 590
 591 /* Return whether current thread is stopped due to a watchpoint.  */
 592 static int
 593 arm_stopped_by_watchpoint (void)
 594 {
 595   struct lwp_info *lwp = get_thread_lwp (current_thread);
 596   siginfo_t siginfo;
 597
 598   /* We must be able to set hardware watchpoints.  */
 599   if (arm_linux_get_hw_watchpoint_count () == 0)
 600     return 0;
 601
 602   /* Retrieve siginfo.  */
 603   errno = 0;
 604   ptrace (PTRACE_GETSIGINFO, lwpid_of (current_thread), 0, &siginfo);
 605   if (errno != 0)
 606     return 0;
 607
 608   /* This must be a hardware breakpoint.  */
 609   if (siginfo.si_signo != SIGTRAP
 610       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
 611     return 0;
 612
 613   /* If we are in a positive slot then we're looking at a breakpoint and not
 614      a watchpoint.  */
 615   if (siginfo.si_errno >= 0)
 616     return 0;
 617
 618   /* Cache stopped data address for use by arm_stopped_data_address.  */
 619   lwp->arch_private->stopped_data_address
 620     = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
 621
 622   return 1;
 623 }
 624
 625 /* Return data address that triggered watchpoint.  Called only if
 626    arm_stopped_by_watchpoint returned true.  */
 627 static CORE_ADDR
 628 arm_stopped_data_address (void)
 629 {
 630   struct lwp_info *lwp = get_thread_lwp (current_thread);
 631   return lwp->arch_private->stopped_data_address;
 632 }
 633
 634 /* Called when a new process is created.  */
 635 static struct arch_process_info *
 636 arm_new_process (void)
 637 {
 638   struct arch_process_info *info = XCNEW (struct arch_process_info);
 639   return info;
 640 }
 641
 642 /* Called when a new thread is detected.  */
 643 static void
 644 arm_new_thread (struct lwp_info *lwp)
 645 {
 646   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
 647   int i;
 648
 649   for (i = 0; i < MAX_BPTS; i++)
 650     info->bpts_changed[i] = 1;
 651   for (i = 0; i < MAX_WPTS; i++)
 652     info->wpts_changed[i] = 1;
 653
 654   lwp->arch_private = info;
 655 }
 656
 657 static void
 658 arm_new_fork (struct process_info *parent, struct process_info *child)
 659 {
 660   struct arch_process_info *parent_proc_info;
 661   struct arch_process_info *child_proc_info;
 662   struct lwp_info *child_lwp;
 663   struct arch_lwp_info *child_lwp_info;
 664   int i;
 665
 666   /* These are allocated by linux_add_process.  */
 667   gdb_assert (parent->priv != NULL
 668               && parent->priv->arch_private != NULL);
 669   gdb_assert (child->priv != NULL
 670               && child->priv->arch_private != NULL);
 671
 672   parent_proc_info = parent->priv->arch_private;
 673   child_proc_info = child->priv->arch_private;
 674
 675   /* Linux kernel before 2.6.33 commit
 676      72f674d203cd230426437cdcf7dd6f681dad8b0d
 677      will inherit hardware debug registers from parent
 678      on fork/vfork/clone.  Newer Linux kernels create such tasks with
 679      zeroed debug registers.
 680
 681      GDB core assumes the child inherits the watchpoints/hw
 682      breakpoints of the parent, and will remove them all from the
 683      forked off process.  Copy the debug registers mirrors into the
 684      new process so that all breakpoints and watchpoints can be
 685      removed together.  The debug registers mirror will become zeroed
 686      in the end before detaching the forked off process, thus making
 687      this compatible with older Linux kernels too.  */
 688
 689   *child_proc_info = *parent_proc_info;
 690
 691   /* Mark all the hardware breakpoints and watchpoints as changed to
 692      make sure that the registers will be updated.  */
 693   child_lwp = find_lwp_pid (ptid_of (child));
 694   child_lwp_info = child_lwp->arch_private;
 695   for (i = 0; i < MAX_BPTS; i++)
 696     child_lwp_info->bpts_changed[i] = 1;
 697   for (i = 0; i < MAX_WPTS; i++)
 698     child_lwp_info->wpts_changed[i] = 1;
 699 }
 700
 701 /* Called when resuming a thread.
 702    If the debug regs have changed, update the thread's copies.  */
 703 static void
 704 arm_prepare_to_resume (struct lwp_info *lwp)
 705 {
 706   struct thread_info *thread = get_lwp_thread (lwp);
 707   int pid = lwpid_of (thread);
 708   struct process_info *proc = find_process_pid (pid_of (thread));
 709   struct arch_process_info *proc_info = proc->priv->arch_private;
 710   struct arch_lwp_info *lwp_info = lwp->arch_private;
 711   int i;
 712
 713   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
 714     if (lwp_info->bpts_changed[i])
 715       {
 716         errno = 0;
 717
 718         if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
 719           if (ptrace (PTRACE_SETHBPREGS, pid,
 720                       (PTRACE_TYPE_ARG3) ((i << 1) + 1),
 721                       &proc_info->bpts[i].address) < 0)
 722             perror_with_name ("Unexpected error setting breakpoint address");
 723
 724         if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
 725           if (ptrace (PTRACE_SETHBPREGS, pid,
 726                       (PTRACE_TYPE_ARG3) ((i << 1) + 2),
 727                       &proc_info->bpts[i].control) < 0)
 728             perror_with_name ("Unexpected error setting breakpoint");
 729
 730         lwp_info->bpts_changed[i] = 0;
 731       }
 732
 733   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
 734     if (lwp_info->wpts_changed[i])
 735       {
 736         errno = 0;
 737
 738         if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
 739           if (ptrace (PTRACE_SETHBPREGS, pid,
 740                       (PTRACE_TYPE_ARG3) -((i << 1) + 1),
 741                       &proc_info->wpts[i].address) < 0)
 742             perror_with_name ("Unexpected error setting watchpoint address");
 743
 744         if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
 745           if (ptrace (PTRACE_SETHBPREGS, pid,
 746                       (PTRACE_TYPE_ARG3) -((i << 1) + 2),
 747                       &proc_info->wpts[i].control) < 0)
 748             perror_with_name ("Unexpected error setting watchpoint");
 749
 750         lwp_info->wpts_changed[i] = 0;
 751       }
 752 }
 753
 754 /* Find the next pc for a sigreturn or rt_sigreturn syscall.  In
 755    addition, set IS_THUMB depending on whether we will return to ARM
 756    or Thumb code.
 757    See arm-linux.h for stack layout details.  */
 758 static CORE_ADDR
 759 arm_sigreturn_next_pc (struct regcache *regcache, int svc_number,
 760                        int *is_thumb)
 761 {
 762   unsigned long sp;
 763   unsigned long sp_data;
 764   /* Offset of PC register.  */
 765   int pc_offset = 0;
 766   CORE_ADDR next_pc = 0;
 767   uint32_t cpsr;
 768
 769   gdb_assert (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn);
 770
 771   collect_register_by_name (regcache, "sp", &sp);
 772   (*the_target->read_memory) (sp, (unsigned char *) &sp_data, 4);
 773
 774   pc_offset = arm_linux_sigreturn_next_pc_offset
 775     (sp, sp_data, svc_number, __NR_sigreturn == svc_number ? 1 : 0);
 776
 777   (*the_target->read_memory) (sp + pc_offset, (unsigned char *) &next_pc, 4);
 778
 779   /* Set IS_THUMB according the CPSR saved on the stack.  */
 780   (*the_target->read_memory) (sp + pc_offset + 4, (unsigned char *) &cpsr, 4);
 781   *is_thumb = ((cpsr & CPSR_T) != 0);
 782
 783   return next_pc;
 784 }
 785
 786 /* When PC is at a syscall instruction, return the PC of the next
 787    instruction to be executed.  */
 788 static CORE_ADDR
 789 get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self)
 790 {
 791   CORE_ADDR next_pc = 0;
 792   CORE_ADDR pc = regcache_read_pc (self->regcache);
 793   int is_thumb = arm_is_thumb_mode ();
 794   ULONGEST svc_number = 0;
 795   struct regcache *regcache = self->regcache;
 796
 797   if (is_thumb)
 798     {
 799       collect_register (regcache, 7, &svc_number);
 800       next_pc = pc + 2;
 801     }
 802   else
 803     {
 804       unsigned long this_instr;
 805       unsigned long svc_operand;
 806
 807       (*the_target->read_memory) (pc, (unsigned char *) &this_instr, 4);
 808       svc_operand = (0x00ffffff & this_instr);
 809
 810       if (svc_operand)  /* OABI.  */
 811         {
 812           svc_number = svc_operand - 0x900000;
 813         }
 814       else /* EABI.  */
 815         {
 816           collect_register (regcache, 7, &svc_number);
 817         }
 818
 819       next_pc = pc + 4;
 820     }
 821
 822   /* This is a sigreturn or sigreturn_rt syscall.  */
 823   if (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn)
 824     {
 825       /* SIGRETURN or RT_SIGRETURN may affect the arm thumb mode, so
 826          update IS_THUMB.   */
 827       next_pc = arm_sigreturn_next_pc (regcache, svc_number, &is_thumb);
 828     }
 829
 830   /* Addresses for calling Thumb functions have the bit 0 set.  */
 831   if (is_thumb)
 832     next_pc = MAKE_THUMB_ADDR (next_pc);
 833
 834   return next_pc;
 835 }
 836
 837 static int
 838 arm_get_hwcap (unsigned long *valp)
 839 {
 840   unsigned char *data = (unsigned char *) alloca (8);
 841   int offset = 0;
 842
 843   while ((*the_target->read_auxv) (offset, data, 8) == 8)
 844     {
 845       unsigned int *data_p = (unsigned int *)data;
 846       if (data_p[0] == AT_HWCAP)
 847         {
 848           *valp = data_p[1];
 849           return 1;
 850         }
 851
 852       offset += 8;
 853     }
 854
 855   *valp = 0;
 856   return 0;
 857 }
 858
 859 static const struct target_desc *
 860 arm_read_description (void)
 861 {
 862   int pid = lwpid_of (current_thread);
 863   unsigned long arm_hwcap = 0;
 864
 865   /* Query hardware watchpoint/breakpoint capabilities.  */
 866   arm_linux_init_hwbp_cap (pid);
 867
 868   if (arm_get_hwcap (&arm_hwcap) == 0)
 869     return tdesc_arm;
 870
 871   if (arm_hwcap & HWCAP_IWMMXT)
 872     return tdesc_arm_with_iwmmxt;
 873
 874   if (arm_hwcap & HWCAP_VFP)
 875     {
 876       const struct target_desc *result;
 877       char *buf;
 878
 879       /* NEON implies either no VFP, or VFPv3-D32.  We only support
 880          it with VFP.  */
 881       if (arm_hwcap & HWCAP_NEON)
 882         result = tdesc_arm_with_neon;
 883       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 884         result = tdesc_arm_with_vfpv3;
 885       else
 886         result = tdesc_arm_with_vfpv2;
 887
 888       /* Now make sure that the kernel supports reading these
 889          registers.  Support was added in 2.6.30.  */
 890       errno = 0;
 891       buf = (char *) xmalloc (32 * 8 + 4);
 892       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 893           && errno == EIO)
 894         result = tdesc_arm;
 895
 896       free (buf);
 897
 898       return result;
 899     }
 900
 901   /* The default configuration uses legacy FPA registers, probably
 902      simulated.  */
 903   return tdesc_arm;
 904 }
 905
 906 static void
 907 arm_arch_setup (void)
 908 {
 909   int tid = lwpid_of (current_thread);
 910   int gpregs[18];
 911   struct iovec iov;
 912
 913   current_process ()->tdesc = arm_read_description ();
 914
 915   iov.iov_base = gpregs;
 916   iov.iov_len = sizeof (gpregs);
 917
 918   /* Check if PTRACE_GETREGSET works.  */
 919   if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) == 0)
 920     have_ptrace_getregset = 1;
 921   else
 922     have_ptrace_getregset = 0;
 923 }
 924
 925 /* Fetch the next possible PCs after the current instruction executes.  */
 926
 927 static VEC (CORE_ADDR) *
 928 arm_gdbserver_get_next_pcs (struct regcache *regcache)
 929 {
 930   struct arm_get_next_pcs next_pcs_ctx;
 931   VEC (CORE_ADDR) *next_pcs = NULL;
 932
 933   arm_get_next_pcs_ctor (&next_pcs_ctx,
 934                          &get_next_pcs_ops,
 935                          /* Byte order is ignored assumed as host.  */
 936                          0,
 937                          0,
 938                          1,
 939                          regcache);
 940
 941   next_pcs = arm_get_next_pcs (&next_pcs_ctx);
 942
 943   return next_pcs;
 944 }
 945
 946 /* Support for hardware single step.  */
 947
 948 static int
 949 arm_supports_hardware_single_step (void)
 950 {
 951   return 0;
 952 }
 953
 954 /* Implementation of linux_target_ops method "get_syscall_trapinfo".  */
 955
 956 static void
 957 arm_get_syscall_trapinfo (struct regcache *regcache, int *sysno)
 958 {
 959   if (arm_is_thumb_mode ())
 960     collect_register_by_name (regcache, "r7", sysno);
 961   else
 962     {
 963       unsigned long pc;
 964       unsigned long insn;
 965
 966       collect_register_by_name (regcache, "pc", &pc);
 967
 968       if ((*the_target->read_memory) (pc - 4, (unsigned char *) &insn, 4))
 969         *sysno = UNKNOWN_SYSCALL;
 970       else
 971         {
 972           unsigned long svc_operand = (0x00ffffff & insn);
 973
 974           if (svc_operand)
 975             {
 976               /* OABI */
 977               *sysno = svc_operand - 0x900000;
 978             }
 979           else
 980             {
 981               /* EABI */
 982               collect_register_by_name (regcache, "r7", sysno);
 983             }
 984         }
 985     }
 986 }
 987
 988 /* Register sets without using PTRACE_GETREGSET.  */
 989
 990 static struct regset_info arm_regsets[] = {
 991   { PTRACE_GETREGS, PTRACE_SETREGS, 0, 18 * 4,
 992     GENERAL_REGS,
 993     arm_fill_gregset, arm_store_gregset },
 994   { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, 16 * 8 + 6 * 4,
 995     EXTENDED_REGS,
 996     arm_fill_wmmxregset, arm_store_wmmxregset },
 997   { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, 32 * 8 + 4,
 998     EXTENDED_REGS,
 999     arm_fill_vfpregset, arm_store_vfpregset },
1000   NULL_REGSET
1001 };
1002
1003 static struct regsets_info arm_regsets_info =
1004   {
1005     arm_regsets, /* regsets */
1006     0, /* num_regsets */
1007     NULL, /* disabled_regsets */
1008   };
1009
1010 static struct usrregs_info arm_usrregs_info =
1011   {
1012     arm_num_regs,
1013     arm_regmap,
1014   };
1015
1016 static struct regs_info regs_info_arm =
1017   {
1018     NULL, /* regset_bitmap */
1019     &arm_usrregs_info,
1020     &arm_regsets_info
1021   };
1022
1023 static const struct regs_info *
1024 arm_regs_info (void)
1025 {
1026   const struct target_desc *tdesc = current_process ()->tdesc;
1027
1028   if (have_ptrace_getregset == 1
1029       && (tdesc == tdesc_arm_with_neon || tdesc == tdesc_arm_with_vfpv3))
1030     return &regs_info_aarch32;
1031   else
1032     return &regs_info_arm;
1033 }
1034
1035 struct linux_target_ops the_low_target = {
1036   arm_arch_setup,
1037   arm_regs_info,
1038   arm_cannot_fetch_register,
1039   arm_cannot_store_register,
1040   NULL, /* fetch_register */
1041   linux_get_pc_32bit,
1042   linux_set_pc_32bit,
1043   arm_breakpoint_kind_from_pc,
1044   arm_sw_breakpoint_from_kind,
1045   arm_gdbserver_get_next_pcs,
1046   0,
1047   arm_breakpoint_at,
1048   arm_supports_z_point_type,
1049   arm_insert_point,
1050   arm_remove_point,
1051   arm_stopped_by_watchpoint,
1052   arm_stopped_data_address,
1053   NULL, /* collect_ptrace_register */
1054   NULL, /* supply_ptrace_register */
1055   NULL, /* siginfo_fixup */
1056   arm_new_process,
1057   arm_new_thread,
1058   arm_new_fork,
1059   arm_prepare_to_resume,
1060   NULL, /* process_qsupported */
1061   NULL, /* supports_tracepoints */
1062   NULL, /* get_thread_area */
1063   NULL, /* install_fast_tracepoint_jump_pad */
1064   NULL, /* emit_ops */
1065   NULL, /* get_min_fast_tracepoint_insn_len */
1066   NULL, /* supports_range_stepping */
1067   arm_breakpoint_kind_from_current_state,
1068   arm_supports_hardware_single_step,
1069   arm_get_syscall_trapinfo,
1070 };
1071
1072 void
1073 initialize_low_arch (void)
1074 {
1075   /* Initialize the Linux target descriptions.  */
1076   init_registers_arm ();
1077   init_registers_arm_with_iwmmxt ();
1078   init_registers_arm_with_vfpv2 ();
1079   init_registers_arm_with_vfpv3 ();
1080
1081   initialize_low_arch_aarch32 ();
1082
1083   initialize_regsets_info (&arm_regsets_info);
1084 }