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1 /* Intel 386 target-dependent stuff.
2 Copyright (C) 1988, 1989, 1991, 1994, 1995, 1996, 1998
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #include "defs.h"
23 #include "gdb_string.h"
24 #include "frame.h"
25 #include "inferior.h"
26 #include "gdbcore.h"
27 #include "target.h"
28 #include "floatformat.h"
29 #include "symtab.h"
30 #include "gdbcmd.h"
31 #include "command.h"
32
33 static long i386_get_frame_setup PARAMS ((CORE_ADDR));
34
35 static void i386_follow_jump PARAMS ((void));
36
37 static void codestream_read PARAMS ((unsigned char *, int));
38
39 static void codestream_seek PARAMS ((CORE_ADDR));
40
41 static unsigned char codestream_fill PARAMS ((int));
42
43 CORE_ADDR skip_trampoline_code PARAMS ((CORE_ADDR, char *));
44
45 static int gdb_print_insn_i386 (bfd_vma, disassemble_info *);
46
47 void _initialize_i386_tdep PARAMS ((void));
48
49 /* This is the variable the is set with "set disassembly-flavor",
50 and its legitimate values. */
51 static char att_flavor[] = "att";
52 static char intel_flavor[] = "intel";
53 static char *valid_flavors[] =
54 {
55 att_flavor,
56 intel_flavor,
57 NULL
58 };
59 static char *disassembly_flavor = att_flavor;
60
61 /* This is used to keep the bfd arch_info in sync with the disassembly flavor. */
62 static void set_disassembly_flavor_sfunc PARAMS ((char *, int, struct cmd_list_element *));
63 static void set_disassembly_flavor ();
64
65 void (*disassembly_flavor_hook) PARAMS ((char *args, int from_tty));
66
67 /* Stdio style buffering was used to minimize calls to ptrace, but this
68 buffering did not take into account that the code section being accessed
69 may not be an even number of buffers long (even if the buffer is only
70 sizeof(int) long). In cases where the code section size happened to
71 be a non-integral number of buffers long, attempting to read the last
72 buffer would fail. Simply using target_read_memory and ignoring errors,
73 rather than read_memory, is not the correct solution, since legitimate
74 access errors would then be totally ignored. To properly handle this
75 situation and continue to use buffering would require that this code
76 be able to determine the minimum code section size granularity (not the
77 alignment of the section itself, since the actual failing case that
78 pointed out this problem had a section alignment of 4 but was not a
79 multiple of 4 bytes long), on a target by target basis, and then
80 adjust it's buffer size accordingly. This is messy, but potentially
81 feasible. It probably needs the bfd library's help and support. For
82 now, the buffer size is set to 1. (FIXME -fnf) */
83
84 #define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */
85 static CORE_ADDR codestream_next_addr;
86 static CORE_ADDR codestream_addr;
87 static unsigned char codestream_buf[CODESTREAM_BUFSIZ];
88 static int codestream_off;
89 static int codestream_cnt;
90
91 #define codestream_tell() (codestream_addr + codestream_off)
92 #define codestream_peek() (codestream_cnt == 0 ? \
93 codestream_fill(1): codestream_buf[codestream_off])
94 #define codestream_get() (codestream_cnt-- == 0 ? \
95 codestream_fill(0) : codestream_buf[codestream_off++])
96
97 static unsigned char
98 codestream_fill (peek_flag)
99 int peek_flag;
100 {
101 codestream_addr = codestream_next_addr;
102 codestream_next_addr += CODESTREAM_BUFSIZ;
103 codestream_off = 0;
104 codestream_cnt = CODESTREAM_BUFSIZ;
105 read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ);
106
107 if (peek_flag)
108 return (codestream_peek ());
109 else
110 return (codestream_get ());
111 }
112
113 static void
114 codestream_seek (place)
115 CORE_ADDR place;
116 {
117 codestream_next_addr = place / CODESTREAM_BUFSIZ;
118 codestream_next_addr *= CODESTREAM_BUFSIZ;
119 codestream_cnt = 0;
120 codestream_fill (1);
121 while (codestream_tell () != place)
122 codestream_get ();
123 }
124
125 static void
126 codestream_read (buf, count)
127 unsigned char *buf;
128 int count;
129 {
130 unsigned char *p;
131 int i;
132 p = buf;
133 for (i = 0; i < count; i++)
134 *p++ = codestream_get ();
135 }
136
137 /* next instruction is a jump, move to target */
138
139 static void
140 i386_follow_jump ()
141 {
142 unsigned char buf[4];
143 long delta;
144
145 int data16;
146 CORE_ADDR pos;
147
148 pos = codestream_tell ();
149
150 data16 = 0;
151 if (codestream_peek () == 0x66)
152 {
153 codestream_get ();
154 data16 = 1;
155 }
156
157 switch (codestream_get ())
158 {
159 case 0xe9:
160 /* relative jump: if data16 == 0, disp32, else disp16 */
161 if (data16)
162 {
163 codestream_read (buf, 2);
164 delta = extract_signed_integer (buf, 2);
165
166 /* include size of jmp inst (including the 0x66 prefix). */
167 pos += delta + 4;
168 }
169 else
170 {
171 codestream_read (buf, 4);
172 delta = extract_signed_integer (buf, 4);
173
174 pos += delta + 5;
175 }
176 break;
177 case 0xeb:
178 /* relative jump, disp8 (ignore data16) */
179 codestream_read (buf, 1);
180 /* Sign-extend it. */
181 delta = extract_signed_integer (buf, 1);
182
183 pos += delta + 2;
184 break;
185 }
186 codestream_seek (pos);
187 }
188
189 /*
190 * find & return amound a local space allocated, and advance codestream to
191 * first register push (if any)
192 *
193 * if entry sequence doesn't make sense, return -1, and leave
194 * codestream pointer random
195 */
196
197 static long
198 i386_get_frame_setup (pc)
199 CORE_ADDR pc;
200 {
201 unsigned char op;
202
203 codestream_seek (pc);
204
205 i386_follow_jump ();
206
207 op = codestream_get ();
208
209 if (op == 0x58) /* popl %eax */
210 {
211 /*
212 * this function must start with
213 *
214 * popl %eax 0x58
215 * xchgl %eax, (%esp) 0x87 0x04 0x24
216 * or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
217 *
218 * (the system 5 compiler puts out the second xchg
219 * inst, and the assembler doesn't try to optimize it,
220 * so the 'sib' form gets generated)
221 *
222 * this sequence is used to get the address of the return
223 * buffer for a function that returns a structure
224 */
225 int pos;
226 unsigned char buf[4];
227 static unsigned char proto1[3] =
228 {0x87, 0x04, 0x24};
229 static unsigned char proto2[4] =
230 {0x87, 0x44, 0x24, 0x00};
231 pos = codestream_tell ();
232 codestream_read (buf, 4);
233 if (memcmp (buf, proto1, 3) == 0)
234 pos += 3;
235 else if (memcmp (buf, proto2, 4) == 0)
236 pos += 4;
237
238 codestream_seek (pos);
239 op = codestream_get (); /* update next opcode */
240 }
241
242 if (op == 0x68 || op == 0x6a)
243 {
244 /*
245 * this function may start with
246 *
247 * pushl constant
248 * call _probe
249 * addl $4, %esp
250 * followed by
251 * pushl %ebp
252 * etc.
253 */
254 int pos;
255 unsigned char buf[8];
256
257 /* Skip past the pushl instruction; it has either a one-byte
258 or a four-byte operand, depending on the opcode. */
259 pos = codestream_tell ();
260 if (op == 0x68)
261 pos += 4;
262 else
263 pos += 1;
264 codestream_seek (pos);
265
266 /* Read the following 8 bytes, which should be "call _probe" (6 bytes)
267 followed by "addl $4,%esp" (2 bytes). */
268 codestream_read (buf, sizeof (buf));
269 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
270 pos += sizeof (buf);
271 codestream_seek (pos);
272 op = codestream_get (); /* update next opcode */
273 }
274
275 if (op == 0x55) /* pushl %ebp */
276 {
277 /* check for movl %esp, %ebp - can be written two ways */
278 switch (codestream_get ())
279 {
280 case 0x8b:
281 if (codestream_get () != 0xec)
282 return (-1);
283 break;
284 case 0x89:
285 if (codestream_get () != 0xe5)
286 return (-1);
287 break;
288 default:
289 return (-1);
290 }
291 /* check for stack adjustment
292
293 * subl $XXX, %esp
294 *
295 * note: you can't subtract a 16 bit immediate
296 * from a 32 bit reg, so we don't have to worry
297 * about a data16 prefix
298 */
299 op = codestream_peek ();
300 if (op == 0x83)
301 {
302 /* subl with 8 bit immed */
303 codestream_get ();
304 if (codestream_get () != 0xec)
305 /* Some instruction starting with 0x83 other than subl. */
306 {
307 codestream_seek (codestream_tell () - 2);
308 return 0;
309 }
310 /* subl with signed byte immediate
311 * (though it wouldn't make sense to be negative)
312 */
313 return (codestream_get ());
314 }
315 else if (op == 0x81)
316 {
317 char buf[4];
318 /* Maybe it is subl with 32 bit immedediate. */
319 codestream_get ();
320 if (codestream_get () != 0xec)
321 /* Some instruction starting with 0x81 other than subl. */
322 {
323 codestream_seek (codestream_tell () - 2);
324 return 0;
325 }
326 /* It is subl with 32 bit immediate. */
327 codestream_read ((unsigned char *) buf, 4);
328 return extract_signed_integer (buf, 4);
329 }
330 else
331 {
332 return (0);
333 }
334 }
335 else if (op == 0xc8)
336 {
337 char buf[2];
338 /* enter instruction: arg is 16 bit unsigned immed */
339 codestream_read ((unsigned char *) buf, 2);
340 codestream_get (); /* flush final byte of enter instruction */
341 return extract_unsigned_integer (buf, 2);
342 }
343 return (-1);
344 }
345
346 /* Return number of args passed to a frame.
347 Can return -1, meaning no way to tell. */
348
349 int
350 i386_frame_num_args (fi)
351 struct frame_info *fi;
352 {
353 #if 1
354 return -1;
355 #else
356 /* This loses because not only might the compiler not be popping the
357 args right after the function call, it might be popping args from both
358 this call and a previous one, and we would say there are more args
359 than there really are. */
360
361 int retpc;
362 unsigned char op;
363 struct frame_info *pfi;
364
365 /* on the 386, the instruction following the call could be:
366 popl %ecx - one arg
367 addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits
368 anything else - zero args */
369
370 int frameless;
371
372 frameless = FRAMELESS_FUNCTION_INVOCATION (fi);
373 if (frameless)
374 /* In the absence of a frame pointer, GDB doesn't get correct values
375 for nameless arguments. Return -1, so it doesn't print any
376 nameless arguments. */
377 return -1;
378
379 pfi = get_prev_frame (fi);
380 if (pfi == 0)
381 {
382 /* Note: this can happen if we are looking at the frame for
383 main, because FRAME_CHAIN_VALID won't let us go into
384 start. If we have debugging symbols, that's not really
385 a big deal; it just means it will only show as many arguments
386 to main as are declared. */
387 return -1;
388 }
389 else
390 {
391 retpc = pfi->pc;
392 op = read_memory_integer (retpc, 1);
393 if (op == 0x59)
394 /* pop %ecx */
395 return 1;
396 else if (op == 0x83)
397 {
398 op = read_memory_integer (retpc + 1, 1);
399 if (op == 0xc4)
400 /* addl $<signed imm 8 bits>, %esp */
401 return (read_memory_integer (retpc + 2, 1) & 0xff) / 4;
402 else
403 return 0;
404 }
405 else if (op == 0x81)
406 { /* add with 32 bit immediate */
407 op = read_memory_integer (retpc + 1, 1);
408 if (op == 0xc4)
409 /* addl $<imm 32>, %esp */
410 return read_memory_integer (retpc + 2, 4) / 4;
411 else
412 return 0;
413 }
414 else
415 {
416 return 0;
417 }
418 }
419 #endif
420 }
421
422 /*
423 * parse the first few instructions of the function to see
424 * what registers were stored.
425 *
426 * We handle these cases:
427 *
428 * The startup sequence can be at the start of the function,
429 * or the function can start with a branch to startup code at the end.
430 *
431 * %ebp can be set up with either the 'enter' instruction, or
432 * 'pushl %ebp, movl %esp, %ebp' (enter is too slow to be useful,
433 * but was once used in the sys5 compiler)
434 *
435 * Local space is allocated just below the saved %ebp by either the
436 * 'enter' instruction, or by 'subl $<size>, %esp'. 'enter' has
437 * a 16 bit unsigned argument for space to allocate, and the
438 * 'addl' instruction could have either a signed byte, or
439 * 32 bit immediate.
440 *
441 * Next, the registers used by this function are pushed. In
442 * the sys5 compiler they will always be in the order: %edi, %esi, %ebx
443 * (and sometimes a harmless bug causes it to also save but not restore %eax);
444 * however, the code below is willing to see the pushes in any order,
445 * and will handle up to 8 of them.
446 *
447 * If the setup sequence is at the end of the function, then the
448 * next instruction will be a branch back to the start.
449 */
450
451 void
452 i386_frame_find_saved_regs (fip, fsrp)
453 struct frame_info *fip;
454 struct frame_saved_regs *fsrp;
455 {
456 long locals = -1;
457 unsigned char op;
458 CORE_ADDR dummy_bottom;
459 CORE_ADDR adr;
460 CORE_ADDR pc;
461 int i;
462
463 memset (fsrp, 0, sizeof *fsrp);
464
465 /* if frame is the end of a dummy, compute where the
466 * beginning would be
467 */
468 dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH;
469
470 /* check if the PC is in the stack, in a dummy frame */
471 if (dummy_bottom <= fip->pc && fip->pc <= fip->frame)
472 {
473 /* all regs were saved by push_call_dummy () */
474 adr = fip->frame;
475 for (i = 0; i < NUM_REGS; i++)
476 {
477 adr -= REGISTER_RAW_SIZE (i);
478 fsrp->regs[i] = adr;
479 }
480 return;
481 }
482
483 pc = get_pc_function_start (fip->pc);
484 if (pc != 0)
485 locals = i386_get_frame_setup (pc);
486
487 if (locals >= 0)
488 {
489 adr = fip->frame - 4 - locals;
490 for (i = 0; i < 8; i++)
491 {
492 op = codestream_get ();
493 if (op < 0x50 || op > 0x57)
494 break;
495 #ifdef I386_REGNO_TO_SYMMETRY
496 /* Dynix uses different internal numbering. Ick. */
497 fsrp->regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = adr;
498 #else
499 fsrp->regs[op - 0x50] = adr;
500 #endif
501 adr -= 4;
502 }
503 }
504
505 fsrp->regs[PC_REGNUM] = fip->frame + 4;
506 fsrp->regs[FP_REGNUM] = fip->frame;
507 }
508
509 /* return pc of first real instruction */
510
511 int
512 i386_skip_prologue (pc)
513 int pc;
514 {
515 unsigned char op;
516 int i;
517 static unsigned char pic_pat[6] =
518 {0xe8, 0, 0, 0, 0, /* call 0x0 */
519 0x5b, /* popl %ebx */
520 };
521 CORE_ADDR pos;
522
523 if (i386_get_frame_setup (pc) < 0)
524 return (pc);
525
526 /* found valid frame setup - codestream now points to
527 * start of push instructions for saving registers
528 */
529
530 /* skip over register saves */
531 for (i = 0; i < 8; i++)
532 {
533 op = codestream_peek ();
534 /* break if not pushl inst */
535 if (op < 0x50 || op > 0x57)
536 break;
537 codestream_get ();
538 }
539
540 /* The native cc on SVR4 in -K PIC mode inserts the following code to get
541 the address of the global offset table (GOT) into register %ebx.
542 call 0x0
543 popl %ebx
544 movl %ebx,x(%ebp) (optional)
545 addl y,%ebx
546 This code is with the rest of the prologue (at the end of the
547 function), so we have to skip it to get to the first real
548 instruction at the start of the function. */
549
550 pos = codestream_tell ();
551 for (i = 0; i < 6; i++)
552 {
553 op = codestream_get ();
554 if (pic_pat[i] != op)
555 break;
556 }
557 if (i == 6)
558 {
559 unsigned char buf[4];
560 long delta = 6;
561
562 op = codestream_get ();
563 if (op == 0x89) /* movl %ebx, x(%ebp) */
564 {
565 op = codestream_get ();
566 if (op == 0x5d) /* one byte offset from %ebp */
567 {
568 delta += 3;
569 codestream_read (buf, 1);
570 }
571 else if (op == 0x9d) /* four byte offset from %ebp */
572 {
573 delta += 6;
574 codestream_read (buf, 4);
575 }
576 else /* unexpected instruction */
577 delta = -1;
578 op = codestream_get ();
579 }
580 /* addl y,%ebx */
581 if (delta > 0 && op == 0x81 && codestream_get () == 0xc3)
582 {
583 pos += delta + 6;
584 }
585 }
586 codestream_seek (pos);
587
588 i386_follow_jump ();
589
590 return (codestream_tell ());
591 }
592
593 void
594 i386_push_dummy_frame ()
595 {
596 CORE_ADDR sp = read_register (SP_REGNUM);
597 int regnum;
598 char regbuf[MAX_REGISTER_RAW_SIZE];
599
600 sp = push_word (sp, read_register (PC_REGNUM));
601 sp = push_word (sp, read_register (FP_REGNUM));
602 write_register (FP_REGNUM, sp);
603 for (regnum = 0; regnum < NUM_REGS; regnum++)
604 {
605 read_register_gen (regnum, regbuf);
606 sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum));
607 }
608 write_register (SP_REGNUM, sp);
609 }
610
611 void
612 i386_pop_frame ()
613 {
614 struct frame_info *frame = get_current_frame ();
615 CORE_ADDR fp;
616 int regnum;
617 struct frame_saved_regs fsr;
618 char regbuf[MAX_REGISTER_RAW_SIZE];
619
620 fp = FRAME_FP (frame);
621 get_frame_saved_regs (frame, &fsr);
622 for (regnum = 0; regnum < NUM_REGS; regnum++)
623 {
624 CORE_ADDR adr;
625 adr = fsr.regs[regnum];
626 if (adr)
627 {
628 read_memory (adr, regbuf, REGISTER_RAW_SIZE (regnum));
629 write_register_bytes (REGISTER_BYTE (regnum), regbuf,
630 REGISTER_RAW_SIZE (regnum));
631 }
632 }
633 write_register (FP_REGNUM, read_memory_integer (fp, 4));
634 write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
635 write_register (SP_REGNUM, fp + 8);
636 flush_cached_frames ();
637 }
638
639 #ifdef GET_LONGJMP_TARGET
640
641 /* Figure out where the longjmp will land. Slurp the args out of the stack.
642 We expect the first arg to be a pointer to the jmp_buf structure from which
643 we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
644 This routine returns true on success. */
645
646 int
647 get_longjmp_target (pc)
648 CORE_ADDR *pc;
649 {
650 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
651 CORE_ADDR sp, jb_addr;
652
653 sp = read_register (SP_REGNUM);
654
655 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack */
656 buf,
657 TARGET_PTR_BIT / TARGET_CHAR_BIT))
658 return 0;
659
660 jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
661
662 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
663 TARGET_PTR_BIT / TARGET_CHAR_BIT))
664 return 0;
665
666 *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
667
668 return 1;
669 }
670
671 #endif /* GET_LONGJMP_TARGET */
672
673 void
674 i386_extract_return_value (type, regbuf, valbuf)
675 struct type *type;
676 char regbuf[REGISTER_BYTES];
677 char *valbuf;
678 {
679 /* On AIX, floating point values are returned in floating point registers. */
680 #ifdef I386_AIX_TARGET
681 if (TYPE_CODE_FLT == TYPE_CODE (type))
682 {
683 double d;
684 /* 387 %st(0), gcc uses this */
685 floatformat_to_double (&floatformat_i387_ext,
686 &regbuf[REGISTER_BYTE (FP0_REGNUM)],
687 &d);
688 store_floating (valbuf, TYPE_LENGTH (type), d);
689 }
690 else
691 #endif /* I386_AIX_TARGET */
692 {
693 memcpy (valbuf, regbuf, TYPE_LENGTH (type));
694 }
695 }
696
697 #ifdef I386V4_SIGTRAMP_SAVED_PC
698 /* Get saved user PC for sigtramp from the pushed ucontext on the stack
699 for all three variants of SVR4 sigtramps. */
700
701 CORE_ADDR
702 i386v4_sigtramp_saved_pc (frame)
703 struct frame_info *frame;
704 {
705 CORE_ADDR saved_pc_offset = 4;
706 char *name = NULL;
707
708 find_pc_partial_function (frame->pc, &name, NULL, NULL);
709 if (name)
710 {
711 if (STREQ (name, "_sigreturn"))
712 saved_pc_offset = 132 + 14 * 4;
713 else if (STREQ (name, "_sigacthandler"))
714 saved_pc_offset = 80 + 14 * 4;
715 else if (STREQ (name, "sigvechandler"))
716 saved_pc_offset = 120 + 14 * 4;
717 }
718
719 if (frame->next)
720 return read_memory_integer (frame->next->frame + saved_pc_offset, 4);
721 return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4);
722 }
723 #endif /* I386V4_SIGTRAMP_SAVED_PC */
724
725 #ifdef STATIC_TRANSFORM_NAME
726 /* SunPRO encodes the static variables. This is not related to C++ mangling,
727 it is done for C too. */
728
729 char *
730 sunpro_static_transform_name (name)
731 char *name;
732 {
733 char *p;
734 if (IS_STATIC_TRANSFORM_NAME (name))
735 {
736 /* For file-local statics there will be a period, a bunch
737 of junk (the contents of which match a string given in the
738 N_OPT), a period and the name. For function-local statics
739 there will be a bunch of junk (which seems to change the
740 second character from 'A' to 'B'), a period, the name of the
741 function, and the name. So just skip everything before the
742 last period. */
743 p = strrchr (name, '.');
744 if (p != NULL)
745 name = p + 1;
746 }
747 return name;
748 }
749 #endif /* STATIC_TRANSFORM_NAME */
750
751
752
753 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
754
755 CORE_ADDR
756 skip_trampoline_code (pc, name)
757 CORE_ADDR pc;
758 char *name;
759 {
760 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
761 {
762 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
763 struct minimal_symbol *indsym =
764 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
765 char *symname = indsym ? SYMBOL_NAME (indsym) : 0;
766
767 if (symname)
768 {
769 if (strncmp (symname, "__imp_", 6) == 0
770 || strncmp (symname, "_imp_", 5) == 0)
771 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
772 }
773 }
774 return 0; /* not a trampoline */
775 }
776
777 static int
778 gdb_print_insn_i386 (memaddr, info)
779 bfd_vma memaddr;
780 disassemble_info *info;
781 {
782 if (disassembly_flavor == att_flavor)
783 return print_insn_i386_att (memaddr, info);
784 else if (disassembly_flavor == intel_flavor)
785 return print_insn_i386_intel (memaddr, info);
786 /* Never reached - disassembly_flavour is always either att_flavor
787 or intel_flavor */
788 abort ();
789 }
790
791 /* If the disassembly mode is intel, we have to also switch the
792 bfd mach_type. This function is run in the set disassembly_flavor
793 command, and does that. */
794
795 static void
796 set_disassembly_flavor_sfunc (args, from_tty, c)
797 char *args;
798 int from_tty;
799 struct cmd_list_element *c;
800 {
801 set_disassembly_flavor ();
802
803 if (disassembly_flavor_hook != NULL)
804 disassembly_flavor_hook (args, from_tty);
805 }
806
807 static void
808 set_disassembly_flavor ()
809 {
810 if (disassembly_flavor == att_flavor)
811 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386);
812 else if (disassembly_flavor == intel_flavor)
813 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386_intel_syntax);
814 }
815
816 void
817 _initialize_i386_tdep ()
818 {
819 struct cmd_list_element *new_cmd;
820
821 tm_print_insn = gdb_print_insn_i386;
822 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach;
823
824 /* Add the variable that controls the disassembly flavor */
825
826 new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class,
827 valid_flavors,
828 (char *) &disassembly_flavor,
829 "Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
830 and the default value is \"att\".",
831 &setlist);
832 new_cmd->function.sfunc = set_disassembly_flavor_sfunc;
833 add_show_from_set (new_cmd, &showlist);
834
835 /* Finally, initialize the disassembly flavor to the default given
836 in the disassembly_flavor variable */
837
838 set_disassembly_flavor ();
839
840 }