1 /* Target-dependent code for the LoongArch architecture, for GDB.
3 Copyright (C) 2022-2023 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "arch-utils.h"
22 #include "dwarf2/frame.h"
24 #include "frame-unwind.h"
26 #include "loongarch-tdep.h"
28 #include "target-descriptions.h"
29 #include "trad-frame.h"
30 #include "user-regs.h"
32 /* Fetch the instruction at PC. */
35 loongarch_fetch_instruction (CORE_ADDR pc
)
37 size_t insn_len
= loongarch_insn_length (0);
38 gdb_byte buf
[insn_len
];
41 err
= target_read_memory (pc
, buf
, insn_len
);
43 memory_error (TARGET_XFER_E_IO
, pc
);
45 return extract_unsigned_integer (buf
, insn_len
, BFD_ENDIAN_LITTLE
);
48 /* Return TRUE if INSN is a unconditional branch instruction, otherwise return FALSE. */
51 loongarch_insn_is_uncond_branch (insn_t insn
)
53 if ((insn
& 0xfc000000) == 0x4c000000 /* jirl */
54 || (insn
& 0xfc000000) == 0x50000000 /* b */
55 || (insn
& 0xfc000000) == 0x54000000) /* bl */
60 /* Return TRUE if INSN is a conditional branch instruction, otherwise return FALSE. */
63 loongarch_insn_is_cond_branch (insn_t insn
)
65 if ((insn
& 0xfc000000) == 0x58000000 /* beq */
66 || (insn
& 0xfc000000) == 0x5c000000 /* bne */
67 || (insn
& 0xfc000000) == 0x60000000 /* blt */
68 || (insn
& 0xfc000000) == 0x64000000 /* bge */
69 || (insn
& 0xfc000000) == 0x68000000 /* bltu */
70 || (insn
& 0xfc000000) == 0x6c000000 /* bgeu */
71 || (insn
& 0xfc000000) == 0x40000000 /* beqz */
72 || (insn
& 0xfc000000) == 0x44000000) /* bnez */
77 /* Return TRUE if INSN is a branch instruction, otherwise return FALSE. */
80 loongarch_insn_is_branch (insn_t insn
)
82 bool is_uncond
= loongarch_insn_is_uncond_branch (insn
);
83 bool is_cond
= loongarch_insn_is_cond_branch (insn
);
85 return (is_uncond
|| is_cond
);
88 /* Return TRUE if INSN is a Load Linked instruction, otherwise return FALSE. */
91 loongarch_insn_is_ll (insn_t insn
)
93 if ((insn
& 0xff000000) == 0x20000000 /* ll.w */
94 || (insn
& 0xff000000) == 0x22000000) /* ll.d */
99 /* Return TRUE if INSN is a Store Conditional instruction, otherwise return FALSE. */
102 loongarch_insn_is_sc (insn_t insn
)
104 if ((insn
& 0xff000000) == 0x21000000 /* sc.w */
105 || (insn
& 0xff000000) == 0x23000000) /* sc.d */
110 /* Analyze the function prologue from START_PC to LIMIT_PC.
111 Return the address of the first instruction past the prologue. */
114 loongarch_scan_prologue (struct gdbarch
*gdbarch
, CORE_ADDR start_pc
,
115 CORE_ADDR limit_pc
, frame_info_ptr this_frame
,
116 struct trad_frame_cache
*this_cache
)
118 CORE_ADDR cur_pc
= start_pc
, prologue_end
= 0;
119 int32_t sp
= LOONGARCH_SP_REGNUM
;
120 int32_t fp
= LOONGARCH_FP_REGNUM
;
121 int32_t reg_value
[32] = {0};
122 int32_t reg_used
[32] = {1, 0};
124 while (cur_pc
< limit_pc
)
126 insn_t insn
= loongarch_fetch_instruction (cur_pc
);
127 size_t insn_len
= loongarch_insn_length (insn
);
128 int32_t rd
= loongarch_decode_imm ("0:5", insn
, 0);
129 int32_t rj
= loongarch_decode_imm ("5:5", insn
, 0);
130 int32_t rk
= loongarch_decode_imm ("10:5", insn
, 0);
131 int32_t si12
= loongarch_decode_imm ("10:12", insn
, 1);
132 int32_t si20
= loongarch_decode_imm ("5:20", insn
, 1);
134 if ((insn
& 0xffc00000) == 0x02c00000 /* addi.d sp,sp,si12 */
135 && rd
== sp
&& rj
== sp
&& si12
< 0)
137 prologue_end
= cur_pc
+ insn_len
;
139 else if ((insn
& 0xffc00000) == 0x02c00000 /* addi.d fp,sp,si12 */
140 && rd
== fp
&& rj
== sp
&& si12
> 0)
142 prologue_end
= cur_pc
+ insn_len
;
144 else if ((insn
& 0xffc00000) == 0x29c00000 /* st.d rd,sp,si12 */
147 prologue_end
= cur_pc
+ insn_len
;
149 else if ((insn
& 0xff000000) == 0x27000000 /* stptr.d rd,sp,si14 */
152 prologue_end
= cur_pc
+ insn_len
;
154 else if ((insn
& 0xfe000000) == 0x14000000) /* lu12i.w rd,si20 */
156 reg_value
[rd
] = si20
<< 12;
159 else if ((insn
& 0xffc00000) == 0x03800000) /* ori rd,rj,si12 */
163 reg_value
[rd
] = reg_value
[rj
] | (si12
& 0xfff);
167 else if ((insn
& 0xffff8000) == 0x00108000 /* add.d sp,sp,rk */
168 && rd
== sp
&& rj
== sp
)
170 if (reg_used
[rk
] == 1 && reg_value
[rk
] < 0)
172 prologue_end
= cur_pc
+ insn_len
;
176 else if (loongarch_insn_is_branch (insn
))
184 if (prologue_end
== 0)
185 prologue_end
= cur_pc
;
190 /* Implement the loongarch_skip_prologue gdbarch method. */
193 loongarch_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
197 /* See if we can determine the end of the prologue via the symbol table.
198 If so, then return either PC, or the PC after the prologue, whichever
200 if (find_pc_partial_function (pc
, nullptr, &func_addr
, nullptr))
202 CORE_ADDR post_prologue_pc
203 = skip_prologue_using_sal (gdbarch
, func_addr
);
204 if (post_prologue_pc
!= 0)
205 return std::max (pc
, post_prologue_pc
);
208 /* Can't determine prologue from the symbol table, need to examine
211 /* Find an upper limit on the function prologue using the debug
212 information. If the debug information could not be used to provide
213 that bound, then use an arbitrary large number as the upper bound. */
214 CORE_ADDR limit_pc
= skip_prologue_using_sal (gdbarch
, pc
);
216 limit_pc
= pc
+ 100; /* Arbitrary large number. */
218 return loongarch_scan_prologue (gdbarch
, pc
, limit_pc
, nullptr, nullptr);
221 /* Decode the current instruction and determine the address of the
225 loongarch_next_pc (struct regcache
*regcache
, CORE_ADDR cur_pc
)
227 struct gdbarch
*gdbarch
= regcache
->arch ();
228 loongarch_gdbarch_tdep
*tdep
= gdbarch_tdep
<loongarch_gdbarch_tdep
> (gdbarch
);
229 insn_t insn
= loongarch_fetch_instruction (cur_pc
);
230 size_t insn_len
= loongarch_insn_length (insn
);
231 CORE_ADDR next_pc
= cur_pc
+ insn_len
;
233 if ((insn
& 0xfc000000) == 0x4c000000) /* jirl rd, rj, offs16 */
235 LONGEST rj
= regcache_raw_get_signed (regcache
,
236 loongarch_decode_imm ("5:5", insn
, 0));
237 next_pc
= rj
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
239 else if ((insn
& 0xfc000000) == 0x50000000 /* b offs26 */
240 || (insn
& 0xfc000000) == 0x54000000) /* bl offs26 */
242 next_pc
= cur_pc
+ loongarch_decode_imm ("0:10|10:16<<2", insn
, 1);
244 else if ((insn
& 0xfc000000) == 0x58000000) /* beq rj, rd, offs16 */
246 LONGEST rj
= regcache_raw_get_signed (regcache
,
247 loongarch_decode_imm ("5:5", insn
, 0));
248 LONGEST rd
= regcache_raw_get_signed (regcache
,
249 loongarch_decode_imm ("0:5", insn
, 0));
251 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
253 else if ((insn
& 0xfc000000) == 0x5c000000) /* bne rj, rd, offs16 */
255 LONGEST rj
= regcache_raw_get_signed (regcache
,
256 loongarch_decode_imm ("5:5", insn
, 0));
257 LONGEST rd
= regcache_raw_get_signed (regcache
,
258 loongarch_decode_imm ("0:5", insn
, 0));
260 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
262 else if ((insn
& 0xfc000000) == 0x60000000) /* blt rj, rd, offs16 */
264 LONGEST rj
= regcache_raw_get_signed (regcache
,
265 loongarch_decode_imm ("5:5", insn
, 0));
266 LONGEST rd
= regcache_raw_get_signed (regcache
,
267 loongarch_decode_imm ("0:5", insn
, 0));
269 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
271 else if ((insn
& 0xfc000000) == 0x64000000) /* bge rj, rd, offs16 */
273 LONGEST rj
= regcache_raw_get_signed (regcache
,
274 loongarch_decode_imm ("5:5", insn
, 0));
275 LONGEST rd
= regcache_raw_get_signed (regcache
,
276 loongarch_decode_imm ("0:5", insn
, 0));
278 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
280 else if ((insn
& 0xfc000000) == 0x68000000) /* bltu rj, rd, offs16 */
282 ULONGEST rj
= regcache_raw_get_unsigned (regcache
,
283 loongarch_decode_imm ("5:5", insn
, 0));
284 ULONGEST rd
= regcache_raw_get_unsigned (regcache
,
285 loongarch_decode_imm ("0:5", insn
, 0));
287 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
289 else if ((insn
& 0xfc000000) == 0x6c000000) /* bgeu rj, rd, offs16 */
291 ULONGEST rj
= regcache_raw_get_unsigned (regcache
,
292 loongarch_decode_imm ("5:5", insn
, 0));
293 ULONGEST rd
= regcache_raw_get_unsigned (regcache
,
294 loongarch_decode_imm ("0:5", insn
, 0));
296 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
298 else if ((insn
& 0xfc000000) == 0x40000000) /* beqz rj, offs21 */
300 LONGEST rj
= regcache_raw_get_signed (regcache
,
301 loongarch_decode_imm ("5:5", insn
, 0));
303 next_pc
= cur_pc
+ loongarch_decode_imm ("0:5|10:16<<2", insn
, 1);
305 else if ((insn
& 0xfc000000) == 0x44000000) /* bnez rj, offs21 */
307 LONGEST rj
= regcache_raw_get_signed (regcache
,
308 loongarch_decode_imm ("5:5", insn
, 0));
310 next_pc
= cur_pc
+ loongarch_decode_imm ("0:5|10:16<<2", insn
, 1);
312 else if ((insn
& 0xffff8000) == 0x002b0000) /* syscall */
314 if (tdep
->syscall_next_pc
!= nullptr)
315 next_pc
= tdep
->syscall_next_pc (get_current_frame ());
321 /* We can't put a breakpoint in the middle of a ll/sc atomic sequence,
322 so look for the end of the sequence and put the breakpoint there. */
324 static std::vector
<CORE_ADDR
>
325 loongarch_deal_with_atomic_sequence (struct regcache
*regcache
, CORE_ADDR cur_pc
)
328 std::vector
<CORE_ADDR
> next_pcs
;
329 insn_t insn
= loongarch_fetch_instruction (cur_pc
);
330 size_t insn_len
= loongarch_insn_length (insn
);
331 const int atomic_sequence_length
= 16;
332 bool found_atomic_sequence_endpoint
= false;
334 /* Look for a Load Linked instruction which begins the atomic sequence. */
335 if (!loongarch_insn_is_ll (insn
))
338 /* Assume that no atomic sequence is longer than "atomic_sequence_length" instructions. */
339 for (int insn_count
= 0; insn_count
< atomic_sequence_length
; ++insn_count
)
342 insn
= loongarch_fetch_instruction (cur_pc
);
344 /* Look for a unconditional branch instruction, fallback to the standard code. */
345 if (loongarch_insn_is_uncond_branch (insn
))
349 /* Look for a conditional branch instruction, put a breakpoint in its destination address. */
350 else if (loongarch_insn_is_cond_branch (insn
))
352 next_pc
= loongarch_next_pc (regcache
, cur_pc
);
353 next_pcs
.push_back (next_pc
);
355 /* Look for a Store Conditional instruction which closes the atomic sequence. */
356 else if (loongarch_insn_is_sc (insn
))
358 found_atomic_sequence_endpoint
= true;
359 next_pc
= cur_pc
+ insn_len
;
360 next_pcs
.push_back (next_pc
);
365 /* We didn't find a closing Store Conditional instruction, fallback to the standard code. */
366 if (!found_atomic_sequence_endpoint
)
372 /* Implement the software_single_step gdbarch method */
374 static std::vector
<CORE_ADDR
>
375 loongarch_software_single_step (struct regcache
*regcache
)
377 CORE_ADDR cur_pc
= regcache_read_pc (regcache
);
378 std::vector
<CORE_ADDR
> next_pcs
379 = loongarch_deal_with_atomic_sequence (regcache
, cur_pc
);
381 if (!next_pcs
.empty ())
384 CORE_ADDR next_pc
= loongarch_next_pc (regcache
, cur_pc
);
389 /* Implement the frame_align gdbarch method. */
392 loongarch_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
394 return align_down (addr
, 16);
397 /* Generate, or return the cached frame cache for frame unwinder. */
399 static struct trad_frame_cache
*
400 loongarch_frame_cache (frame_info_ptr this_frame
, void **this_cache
)
402 struct trad_frame_cache
*cache
;
405 if (*this_cache
!= nullptr)
406 return (struct trad_frame_cache
*) *this_cache
;
408 cache
= trad_frame_cache_zalloc (this_frame
);
411 trad_frame_set_reg_realreg (cache
, LOONGARCH_PC_REGNUM
, LOONGARCH_RA_REGNUM
);
413 pc
= get_frame_address_in_block (this_frame
);
414 trad_frame_set_id (cache
, frame_id_build_unavailable_stack (pc
));
419 /* Implement the this_id callback for frame unwinder. */
422 loongarch_frame_this_id (frame_info_ptr this_frame
, void **prologue_cache
,
423 struct frame_id
*this_id
)
425 struct trad_frame_cache
*info
;
427 info
= loongarch_frame_cache (this_frame
, prologue_cache
);
428 trad_frame_get_id (info
, this_id
);
431 /* Implement the prev_register callback for frame unwinder. */
433 static struct value
*
434 loongarch_frame_prev_register (frame_info_ptr this_frame
,
435 void **prologue_cache
, int regnum
)
437 struct trad_frame_cache
*info
;
439 info
= loongarch_frame_cache (this_frame
, prologue_cache
);
440 return trad_frame_get_register (info
, this_frame
, regnum
);
443 static const struct frame_unwind loongarch_frame_unwind
= {
444 "loongarch prologue",
445 /*.type =*/NORMAL_FRAME
,
446 /*.stop_reason =*/default_frame_unwind_stop_reason
,
447 /*.this_id =*/loongarch_frame_this_id
,
448 /*.prev_register =*/loongarch_frame_prev_register
,
449 /*.unwind_data =*/nullptr,
450 /*.sniffer =*/default_frame_sniffer
,
451 /*.dealloc_cache =*/nullptr,
452 /*.prev_arch =*/nullptr,
455 /* Write the contents of buffer VAL into the general-purpose argument
456 register defined by GAR in REGCACHE. GAR indicates the available
457 general-purpose argument registers which should be a value in the
458 range 1 to 8 (LOONGARCH_ARG_REGNUM), which correspond to registers
459 a7 and a0 respectively, that is to say, regnum is a7 if GAR is 1,
460 regnum is a6 if GAR is 2, regnum is a5 if GAR is 3, regnum is a4
461 if GAR is 4, regnum is a3 if GAR is 5, regnum is a2 if GAR is 6,
462 regnum is a1 if GAR is 7, regnum is a0 if GAR is 8. */
465 pass_in_gar (struct regcache
*regcache
, unsigned int gar
, const gdb_byte
*val
)
467 unsigned int regnum
= LOONGARCH_ARG_REGNUM
- gar
+ LOONGARCH_A0_REGNUM
;
468 regcache
->cooked_write (regnum
, val
);
471 /* Write the contents of buffer VAL into the floating-point argument
472 register defined by FAR in REGCACHE. FAR indicates the available
473 floating-point argument registers which should be a value in the
474 range 1 to 8 (LOONGARCH_ARG_REGNUM), which correspond to registers
475 f7 and f0 respectively, that is to say, regnum is f7 if FAR is 1,
476 regnum is f6 if FAR is 2, regnum is f5 if FAR is 3, regnum is f4
477 if FAR is 4, regnum is f3 if FAR is 5, regnum is f2 if FAR is 6,
478 regnum is f1 if FAR is 7, regnum is f0 if FAR is 8. */
481 pass_in_far (struct regcache
*regcache
, unsigned int far
, const gdb_byte
*val
)
483 unsigned int regnum
= LOONGARCH_ARG_REGNUM
- far
+ LOONGARCH_FIRST_FP_REGNUM
;
484 regcache
->cooked_write (regnum
, val
);
487 /* Pass a value on the stack. */
490 pass_on_stack (struct regcache
*regcache
, const gdb_byte
*val
,
491 size_t len
, int align
, gdb_byte
**addr
)
493 align
= align_up (align
, 8);
497 CORE_ADDR align_addr
= (CORE_ADDR
) (*addr
);
498 align_addr
= align_up (align_addr
, align
);
499 *addr
= (gdb_byte
*) align_addr
;
500 memcpy (*addr
, val
, len
);
504 /* Compute the numbers of struct member. */
507 compute_struct_member (struct type
*type
,
508 unsigned int *fixed_point_members
,
509 unsigned int *floating_point_members
,
510 bool *first_member_is_fixed_point
)
512 for (int i
= 0; i
< type
->num_fields (); i
++)
514 struct type
*field_type
= check_typedef (type
->field (i
).type ());
516 if (field_type
->code () == TYPE_CODE_INT
517 || field_type
->code () == TYPE_CODE_BOOL
518 || field_type
->code () == TYPE_CODE_CHAR
519 || field_type
->code () == TYPE_CODE_RANGE
520 || field_type
->code () == TYPE_CODE_ENUM
521 || field_type
->code () == TYPE_CODE_PTR
)
523 (*fixed_point_members
)++;
525 if (*floating_point_members
== 0)
526 *first_member_is_fixed_point
= true;
528 else if (field_type
->code () == TYPE_CODE_FLT
)
529 (*floating_point_members
)++;
530 else if (field_type
->code () == TYPE_CODE_STRUCT
)
531 compute_struct_member (field_type
,
533 floating_point_members
,
534 first_member_is_fixed_point
);
535 else if (field_type
->code () == TYPE_CODE_COMPLEX
)
536 (*floating_point_members
) += 2;
540 /* Implement the push_dummy_call gdbarch method. */
543 loongarch_push_dummy_call (struct gdbarch
*gdbarch
,
544 struct value
*function
,
545 struct regcache
*regcache
,
550 function_call_return_method return_method
,
551 CORE_ADDR struct_addr
)
553 int regsize
= register_size (gdbarch
, 0);
554 unsigned int gar
= LOONGARCH_ARG_REGNUM
;
555 unsigned int far
= LOONGARCH_ARG_REGNUM
;
556 unsigned int fixed_point_members
;
557 unsigned int floating_point_members
;
558 bool first_member_is_fixed_point
;
559 gdb_byte buf
[1024] = { 0 };
560 gdb_byte
*addr
= buf
;
562 if (return_method
!= return_method_normal
)
563 pass_in_gar (regcache
, gar
--, (gdb_byte
*) &struct_addr
);
565 for (int i
= 0; i
< nargs
; i
++)
567 struct value
*arg
= args
[i
];
568 const gdb_byte
*val
= value_contents (arg
).data ();
569 struct type
*type
= check_typedef (value_type (arg
));
570 size_t len
= type
->length ();
571 int align
= type_align (type
);
572 enum type_code code
= type
->code ();
573 struct type
*func_type
= check_typedef (value_type (function
));
574 bool varargs
= (func_type
->has_varargs () && i
>= func_type
->num_fields ());
581 case TYPE_CODE_RANGE
:
585 /* integer or pointer type is passed in GAR.
586 If no GAR is available, it's passed on the stack.
587 When passed in registers or on the stack,
588 the unsigned integer scalars are zero-extended to GRLEN bits,
589 and the signed integer scalars are sign-extended. */
590 if (type
->is_unsigned ())
592 ULONGEST data
= extract_unsigned_integer (val
, len
, BFD_ENDIAN_LITTLE
);
594 pass_in_gar (regcache
, gar
--, (gdb_byte
*) &data
);
596 pass_on_stack (regcache
, (gdb_byte
*) &data
, len
, align
, &addr
);
600 LONGEST data
= extract_signed_integer (val
, len
, BFD_ENDIAN_LITTLE
);
602 pass_in_gar (regcache
, gar
--, (gdb_byte
*) &data
);
604 pass_on_stack (regcache
, (gdb_byte
*) &data
, len
, align
, &addr
);
609 if (len
== 2 * regsize
)
613 /* long double type is passed in a pair of GAR,
614 with the low-order GRLEN bits in the lower-numbered register
615 and the high-order GRLEN bits in the higher-numbered register.
616 If exactly one register is available,
617 the low-order GRLEN bits are passed in the register
618 and the high-order GRLEN bits are passed on the stack.
619 If no GAR is available, it's passed on the stack. */
622 pass_in_gar (regcache
, gar
--, val
);
623 pass_in_gar (regcache
, gar
--, val
+ regsize
);
627 pass_in_gar (regcache
, gar
--, val
);
628 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
632 pass_on_stack (regcache
, val
, len
, align
, &addr
);
637 /* Variadic arguments are passed in GARs
638 in the same manner as named arguments.
639 And after a variadic argument has been passed on the stack,
640 all future arguments will also be passed on the stack,
641 i.e., the last argument register may be left unused
642 due to the aligned register pair rule.
643 long double data tpye is passed in an aligned GAR pair,
644 the first register in the pair is even-numbered. */
649 pass_in_gar (regcache
, gar
--, val
);
650 pass_in_gar (regcache
, gar
--, val
+ regsize
);
655 pass_in_gar (regcache
, gar
--, val
);
656 pass_in_gar (regcache
, gar
--, val
+ regsize
);
662 pass_on_stack (regcache
, val
, len
, align
, &addr
);
666 pass_on_stack (regcache
, val
, len
, align
, &addr
);
672 /* The other floating-point type is passed in FAR.
673 If no FAR is available, it's passed in GAR.
674 If no GAR is available, it's passed on the stack. */
675 if (!varargs
&& far
> 0)
676 pass_in_far (regcache
, far
--, val
);
678 pass_in_gar (regcache
, gar
--, val
);
680 pass_on_stack (regcache
, val
, len
, align
, &addr
);
683 case TYPE_CODE_STRUCT
:
685 fixed_point_members
= 0;
686 floating_point_members
= 0;
687 first_member_is_fixed_point
= false;
688 compute_struct_member (type
,
689 &fixed_point_members
,
690 &floating_point_members
,
691 &first_member_is_fixed_point
);
693 if (len
> 0 && len
<= regsize
)
695 /* The structure has only fixed-point members. */
696 if (fixed_point_members
> 0 && floating_point_members
== 0)
698 /* If there is an available GAR,
699 the structure is passed through the GAR by value passing;
700 If no GAR is available, it's passed on the stack. */
702 pass_in_gar (regcache
, gar
--, val
);
704 pass_on_stack (regcache
, val
, len
, align
, &addr
);
706 /* The structure has only floating-point members. */
707 else if (fixed_point_members
== 0 && floating_point_members
> 0)
709 /* The structure has one floating-point member.
710 The argument is passed in a FAR.
711 If no FAR is available, the value is passed in a GAR.
712 if no GAR is available, the value is passed on the stack. */
713 if (floating_point_members
== 1)
715 if (!varargs
&& far
> 0)
716 pass_in_far (regcache
, far
--, val
);
718 pass_in_gar (regcache
, gar
--, val
);
720 pass_on_stack (regcache
, val
, len
, align
, &addr
);
722 /* The structure has two floating-point members.
723 The argument is passed in a pair of available FAR,
724 with the low-order float member bits in the lower-numbered FAR
725 and the high-order float member bits in the higher-numbered FAR.
726 If the number of available FAR is less than 2, it's passed in a GAR,
727 and passed on the stack if no GAR is available. */
728 else if (floating_point_members
== 2)
730 if (!varargs
&& far
>= 2)
732 pass_in_far (regcache
, far
--, val
);
733 pass_in_far (regcache
, far
--, val
+ align
);
737 pass_in_gar (regcache
, gar
--, val
);
741 pass_on_stack (regcache
, val
, len
, align
, &addr
);
745 /* The structure has both fixed-point and floating-point members. */
746 else if (fixed_point_members
> 0 && floating_point_members
> 0)
748 /* The structure has one float member and multiple fixed-point members.
749 If there are available GAR, the structure is passed in a GAR,
750 and passed on the stack if no GAR is available. */
751 if (floating_point_members
== 1 && fixed_point_members
> 1)
754 pass_in_gar (regcache
, gar
--, val
);
756 pass_on_stack (regcache
, val
, len
, align
, &addr
);
758 /* The structure has one float member and one fixed-point member.
759 If one FAR and one GAR are available,
760 the floating-point member of the structure is passed in the FAR,
761 and the fixed-point member of the structure is passed in the GAR.
762 If no floating-point register but one GAR is available, it's passed in GAR;
763 If no GAR is available, it's passed on the stack. */
764 else if (floating_point_members
== 1 && fixed_point_members
== 1)
766 if (!varargs
&& far
> 0 && gar
> 0)
768 if (first_member_is_fixed_point
== false)
770 pass_in_far (regcache
, far
--, val
);
771 pass_in_gar (regcache
, gar
--, val
+ align
);
775 pass_in_gar (regcache
, gar
--, val
);
776 pass_in_far (regcache
, far
--, val
+ align
);
782 pass_in_gar (regcache
, gar
--, val
);
784 pass_on_stack (regcache
, val
, len
, align
, &addr
);
789 else if (len
> regsize
&& len
<= 2 * regsize
)
791 /* The structure has only fixed-point members. */
792 if (fixed_point_members
> 0 && floating_point_members
== 0)
794 /* The argument is passed in a pair of available GAR,
795 with the low-order bits in the lower-numbered GAR
796 and the high-order bits in the higher-numbered GAR.
797 If only one GAR is available,
798 the low-order bits are in the GAR
799 and the high-order bits are on the stack,
800 and passed on the stack if no GAR is available. */
803 pass_in_gar (regcache
, gar
--, val
);
804 pass_in_gar (regcache
, gar
--, val
+ regsize
);
808 pass_in_gar (regcache
, gar
--, val
);
809 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
813 pass_on_stack (regcache
, val
, len
, align
, &addr
);
816 /* The structure has only floating-point members. */
817 else if (fixed_point_members
== 0 && floating_point_members
> 0)
819 /* The structure has one long double member
820 or one double member and two adjacent float members
821 or 3-4 float members.
822 The argument is passed in a pair of available GAR,
823 with the low-order bits in the lower-numbered GAR
824 and the high-order bits in the higher-numbered GAR.
825 If only one GAR is available,
826 the low-order bits are in the GAR
827 and the high-order bits are on the stack,
828 and passed on the stack if no GAR is available. */
829 if ((len
== 16 && floating_point_members
== 1)
830 || (len
== 16 && floating_point_members
== 3)
831 || (len
== 12 && floating_point_members
== 3)
832 || (len
== 16 && floating_point_members
== 4))
836 pass_in_gar (regcache
, gar
--, val
);
837 pass_in_gar (regcache
, gar
--, val
+ regsize
);
843 pass_in_gar (regcache
, gar
--, val
);
844 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
849 pass_on_stack (regcache
, val
, len
, align
, &addr
);
854 pass_on_stack (regcache
, val
, len
, align
, &addr
);
857 /* The structure has two double members
858 or one double member and one float member.
859 The argument is passed in a pair of available FAR,
860 with the low-order bits in the lower-numbered FAR
861 and the high-order bits in the higher-numbered FAR.
862 If no a pair of available FAR,
863 it's passed in a pair of available GAR,
864 with the low-order bits in the lower-numbered GAR
865 and the high-order bits in the higher-numbered GAR.
866 If only one GAR is available,
867 the low-order bits are in the GAR
868 and the high-order bits are on stack,
869 and passed on the stack if no GAR is available. */
870 else if ((len
== 16 && floating_point_members
== 2)
871 || (len
== 12 && floating_point_members
== 2))
873 if (!varargs
&& far
>= 2)
875 pass_in_far (regcache
, far
--, val
);
876 pass_in_far (regcache
, far
--, val
+ regsize
);
880 pass_in_gar (regcache
, gar
--, val
);
881 pass_in_gar (regcache
, gar
--, val
+ regsize
);
885 pass_in_gar (regcache
, gar
--, val
);
886 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
890 pass_on_stack (regcache
, val
, len
, align
, &addr
);
894 /* The structure has both fixed-point and floating-point members. */
895 else if (fixed_point_members
> 0 && floating_point_members
> 0)
897 /* The structure has one floating-point member and one fixed-point member. */
898 if (floating_point_members
== 1 && fixed_point_members
== 1)
900 /* If one FAR and one GAR are available,
901 the floating-point member of the structure is passed in the FAR,
902 and the fixed-point member of the structure is passed in the GAR;
903 If no floating-point registers but two GARs are available,
904 it's passed in the two GARs;
905 If only one GAR is available,
906 the low-order bits are in the GAR
907 and the high-order bits are on the stack;
908 And it's passed on the stack if no GAR is available. */
909 if (!varargs
&& far
> 0 && gar
> 0)
911 if (first_member_is_fixed_point
== false)
913 pass_in_far (regcache
, far
--, val
);
914 pass_in_gar (regcache
, gar
--, val
+ regsize
);
918 pass_in_gar (regcache
, gar
--, val
);
919 pass_in_far (regcache
, far
--, val
+ regsize
);
922 else if ((!varargs
&& far
== 0 && gar
>= 2) || (varargs
&& gar
>= 2))
924 pass_in_gar (regcache
, gar
--, val
);
925 pass_in_gar (regcache
, gar
--, val
+ regsize
);
927 else if ((!varargs
&& far
== 0 && gar
== 1) || (varargs
&& gar
== 1))
929 pass_in_gar (regcache
, gar
--, val
);
930 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
932 else if ((!varargs
&& far
== 0 && gar
== 0) || (varargs
&& gar
== 0))
934 pass_on_stack (regcache
, val
, len
, align
, &addr
);
939 /* The argument is passed in a pair of available GAR,
940 with the low-order bits in the lower-numbered GAR
941 and the high-order bits in the higher-numbered GAR.
942 If only one GAR is available,
943 the low-order bits are in the GAR
944 and the high-order bits are on the stack,
945 and passed on the stack if no GAR is available. */
948 pass_in_gar (regcache
, gar
--, val
);
949 pass_in_gar (regcache
, gar
--, val
+ regsize
);
953 pass_in_gar (regcache
, gar
--, val
);
954 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
958 pass_on_stack (regcache
, val
, len
, align
, &addr
);
963 else if (len
> 2 * regsize
)
965 /* It's passed by reference and are replaced in the argument list with the address.
966 If there is an available GAR, the reference is passed in the GAR,
967 and passed on the stack if no GAR is available. */
968 sp
= align_down (sp
- len
, 16);
969 write_memory (sp
, val
, len
);
972 pass_in_gar (regcache
, gar
--, (const gdb_byte
*) &sp
);
974 pass_on_stack (regcache
, (const gdb_byte
*) &sp
, len
, regsize
, &addr
);
978 case TYPE_CODE_UNION
:
979 /* Union is passed in GAR or stack. */
980 if (len
> 0 && len
<= regsize
)
982 /* The argument is passed in a GAR,
983 or on the stack by value if no GAR is available. */
985 pass_in_gar (regcache
, gar
--, val
);
987 pass_on_stack (regcache
, val
, len
, align
, &addr
);
989 else if (len
> regsize
&& len
<= 2 * regsize
)
991 /* The argument is passed in a pair of available GAR,
992 with the low-order bits in the lower-numbered GAR
993 and the high-order bits in the higher-numbered GAR.
994 If only one GAR is available,
995 the low-order bits are in the GAR
996 and the high-order bits are on the stack.
997 The arguments are passed on the stack when no GAR is available. */
1000 pass_in_gar (regcache
, gar
--, val
);
1001 pass_in_gar (regcache
, gar
--, val
+ regsize
);
1005 pass_in_gar (regcache
, gar
--, val
);
1006 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
1010 pass_on_stack (regcache
, val
, len
, align
, &addr
);
1013 else if (len
> 2 * regsize
)
1015 /* It's passed by reference and are replaced in the argument list with the address.
1016 If there is an available GAR, the reference is passed in the GAR,
1017 and passed on the stack if no GAR is available. */
1018 sp
= align_down (sp
- len
, 16);
1019 write_memory (sp
, val
, len
);
1022 pass_in_gar (regcache
, gar
--, (const gdb_byte
*) &sp
);
1024 pass_on_stack (regcache
, (const gdb_byte
*) &sp
, len
, regsize
, &addr
);
1027 case TYPE_CODE_COMPLEX
:
1029 struct type
*target_type
= check_typedef (type
->target_type ());
1030 size_t target_len
= target_type
->length ();
1032 if (target_len
< regsize
)
1034 /* The complex with two float members
1035 is passed in a pair of available FAR,
1036 with the low-order float member bits in the lower-numbered FAR
1037 and the high-order float member bits in the higher-numbered FAR.
1038 If the number of available FAR is less than 2, it's passed in a GAR,
1039 and passed on the stack if no GAR is available. */
1040 if (!varargs
&& far
>= 2)
1042 pass_in_far (regcache
, far
--, val
);
1043 pass_in_far (regcache
, far
--, val
+ align
);
1047 pass_in_gar (regcache
, gar
--, val
);
1051 pass_on_stack (regcache
, val
, len
, align
, &addr
);
1054 else if (target_len
== regsize
)
1056 /* The complex with two double members
1057 is passed in a pair of available FAR,
1058 with the low-order bits in the lower-numbered FAR
1059 and the high-order bits in the higher-numbered FAR.
1060 If no a pair of available FAR,
1061 it's passed in a pair of available GAR,
1062 with the low-order bits in the lower-numbered GAR
1063 and the high-order bits in the higher-numbered GAR.
1064 If only one GAR is available,
1065 the low-order bits are in the GAR
1066 and the high-order bits are on stack,
1067 and passed on the stack if no GAR is available. */
1069 if (!varargs
&& far
>= 2)
1071 pass_in_far (regcache
, far
--, val
);
1072 pass_in_far (regcache
, far
--, val
+ align
);
1076 pass_in_gar (regcache
, gar
--, val
);
1077 pass_in_gar (regcache
, gar
--, val
+ align
);
1081 pass_in_gar (regcache
, gar
--, val
);
1082 pass_on_stack (regcache
, val
+ align
, len
- align
, align
, &addr
);
1086 pass_on_stack (regcache
, val
, len
, align
, &addr
);
1090 else if (target_len
== 2 * regsize
)
1092 /* The complex with two long double members
1093 is passed by reference and are replaced in the argument list with the address.
1094 If there is an available GAR, the reference is passed in the GAR,
1095 and passed on the stack if no GAR is available. */
1096 sp
= align_down (sp
- len
, 16);
1097 write_memory (sp
, val
, len
);
1100 pass_in_gar (regcache
, gar
--, (const gdb_byte
*) &sp
);
1102 pass_on_stack (regcache
, (const gdb_byte
*) &sp
, regsize
, regsize
, &addr
);
1114 sp
= align_down (sp
, 16);
1115 write_memory (sp
, buf
, addr
- buf
);
1118 regcache_cooked_write_unsigned (regcache
, LOONGARCH_RA_REGNUM
, bp_addr
);
1119 regcache_cooked_write_unsigned (regcache
, LOONGARCH_SP_REGNUM
, sp
);
1124 /* Partial transfer of a cooked register. */
1127 loongarch_xfer_reg (struct regcache
*regcache
,
1128 int regnum
, int len
, gdb_byte
*readbuf
,
1129 const gdb_byte
*writebuf
, size_t offset
)
1132 regcache
->cooked_read_part (regnum
, 0, len
, readbuf
+ offset
);
1134 regcache
->cooked_write_part (regnum
, 0, len
, writebuf
+ offset
);
1137 /* Implement the return_value gdbarch method. */
1139 static enum return_value_convention
1140 loongarch_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
1141 struct type
*type
, struct regcache
*regcache
,
1142 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
1144 int regsize
= register_size (gdbarch
, 0);
1145 enum type_code code
= type
->code ();
1146 size_t len
= type
->length ();
1147 unsigned int fixed_point_members
;
1148 unsigned int floating_point_members
;
1149 bool first_member_is_fixed_point
;
1150 int a0
= LOONGARCH_A0_REGNUM
;
1151 int a1
= LOONGARCH_A0_REGNUM
+ 1;
1152 int f0
= LOONGARCH_FIRST_FP_REGNUM
;
1153 int f1
= LOONGARCH_FIRST_FP_REGNUM
+ 1;
1155 if (len
> 2 * regsize
)
1156 return RETURN_VALUE_STRUCT_CONVENTION
;
1161 case TYPE_CODE_BOOL
:
1162 case TYPE_CODE_CHAR
:
1163 case TYPE_CODE_RANGE
:
1164 case TYPE_CODE_ENUM
:
1167 /* integer or pointer type.
1168 The return value is passed in a0,
1169 the unsigned integer scalars are zero-extended to GRLEN bits,
1170 and the signed integer scalars are sign-extended. */
1173 gdb_byte buf
[regsize
];
1174 if (type
->is_unsigned ())
1176 ULONGEST data
= extract_unsigned_integer (writebuf
, len
, BFD_ENDIAN_LITTLE
);
1177 store_unsigned_integer (buf
, regsize
, BFD_ENDIAN_LITTLE
, data
);
1181 LONGEST data
= extract_signed_integer (writebuf
, len
, BFD_ENDIAN_LITTLE
);
1182 store_signed_integer (buf
, regsize
, BFD_ENDIAN_LITTLE
, data
);
1184 loongarch_xfer_reg (regcache
, a0
, regsize
, nullptr, buf
, 0);
1187 loongarch_xfer_reg (regcache
, a0
, len
, readbuf
, nullptr, 0);
1191 /* long double type.
1192 The return value is passed in a0 and a1. */
1193 if (len
== 2 * regsize
)
1195 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1196 loongarch_xfer_reg (regcache
, a1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1198 /* float or double type.
1199 The return value is passed in f0. */
1202 loongarch_xfer_reg (regcache
, f0
, len
, readbuf
, writebuf
, 0);
1205 case TYPE_CODE_STRUCT
:
1207 fixed_point_members
= 0;
1208 floating_point_members
= 0;
1209 first_member_is_fixed_point
= false;
1210 compute_struct_member (type
,
1211 &fixed_point_members
,
1212 &floating_point_members
,
1213 &first_member_is_fixed_point
);
1215 if (len
> 0 && len
<= regsize
)
1217 /* The structure has only fixed-point members. */
1218 if (fixed_point_members
> 0 && floating_point_members
== 0)
1220 /* The return value is passed in a0. */
1221 loongarch_xfer_reg (regcache
, a0
, len
, readbuf
, writebuf
, 0);
1223 /* The structure has only floating-point members. */
1224 else if (fixed_point_members
== 0 && floating_point_members
> 0)
1226 /* The structure has one floating-point member.
1227 The return value is passed in f0. */
1228 if (floating_point_members
== 1)
1230 loongarch_xfer_reg (regcache
, f0
, len
, readbuf
, writebuf
, 0);
1232 /* The structure has two floating-point members.
1233 The return value is passed in f0 and f1. */
1234 else if (floating_point_members
== 2)
1236 loongarch_xfer_reg (regcache
, f0
, len
/ 2, readbuf
, writebuf
, 0);
1237 loongarch_xfer_reg (regcache
, f1
, len
/ 2, readbuf
, writebuf
, len
/ 2);
1240 /* The structure has both fixed-point and floating-point members. */
1241 else if (fixed_point_members
> 0 && floating_point_members
> 0)
1243 /* The structure has one float member and multiple fixed-point members.
1244 The return value is passed in a0. */
1245 if (floating_point_members
== 1 && fixed_point_members
> 1)
1247 loongarch_xfer_reg (regcache
, a0
, len
, readbuf
, writebuf
, 0);
1249 /* The structure has one float member and one fixed-point member. */
1250 else if (floating_point_members
== 1 && fixed_point_members
== 1)
1252 /* The return value is passed in f0 and a0 if the first member is floating-point. */
1253 if (first_member_is_fixed_point
== false)
1255 loongarch_xfer_reg (regcache
, f0
, regsize
/ 2, readbuf
, writebuf
, 0);
1256 loongarch_xfer_reg (regcache
, a0
, regsize
/ 2, readbuf
, writebuf
, regsize
/ 2);
1258 /* The return value is passed in a0 and f0 if the first member is fixed-point. */
1261 loongarch_xfer_reg (regcache
, a0
, regsize
/ 2, readbuf
, writebuf
, 0);
1262 loongarch_xfer_reg (regcache
, f0
, regsize
/ 2, readbuf
, writebuf
, regsize
/ 2);
1267 else if (len
> regsize
&& len
<= 2 * regsize
)
1269 /* The structure has only fixed-point members. */
1270 if (fixed_point_members
> 0 && floating_point_members
== 0)
1272 /* The return value is passed in a0 and a1. */
1273 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1274 loongarch_xfer_reg (regcache
, a1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1276 /* The structure has only floating-point members. */
1277 else if (fixed_point_members
== 0 && floating_point_members
> 0)
1279 /* The structure has one long double member
1280 or one double member and two adjacent float members
1281 or 3-4 float members.
1282 The return value is passed in a0 and a1. */
1283 if ((len
== 16 && floating_point_members
== 1)
1284 || (len
== 16 && floating_point_members
== 3)
1285 || (len
== 12 && floating_point_members
== 3)
1286 || (len
== 16 && floating_point_members
== 4))
1288 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1289 loongarch_xfer_reg (regcache
, a1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1291 /* The structure has two double members
1292 or one double member and one float member.
1293 The return value is passed in f0 and f1. */
1294 else if ((len
== 16 && floating_point_members
== 2)
1295 || (len
== 12 && floating_point_members
== 2))
1297 loongarch_xfer_reg (regcache
, f0
, regsize
, readbuf
, writebuf
, 0);
1298 loongarch_xfer_reg (regcache
, f1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1301 /* The structure has both fixed-point and floating-point members. */
1302 else if (fixed_point_members
> 0 && floating_point_members
> 0)
1304 /* The structure has one floating-point member and one fixed-point member. */
1305 if (floating_point_members
== 1 && fixed_point_members
== 1)
1307 /* The return value is passed in f0 and a0 if the first member is floating-point. */
1308 if (first_member_is_fixed_point
== false)
1310 loongarch_xfer_reg (regcache
, f0
, regsize
, readbuf
, writebuf
, 0);
1311 loongarch_xfer_reg (regcache
, a0
, len
- regsize
, readbuf
, writebuf
, regsize
);
1313 /* The return value is passed in a0 and f0 if the first member is fixed-point. */
1316 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1317 loongarch_xfer_reg (regcache
, f0
, len
- regsize
, readbuf
, writebuf
, regsize
);
1322 /* The return value is passed in a0 and a1. */
1323 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1324 loongarch_xfer_reg (regcache
, a1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1330 case TYPE_CODE_UNION
:
1331 if (len
> 0 && len
<= regsize
)
1333 /* The return value is passed in a0. */
1334 loongarch_xfer_reg (regcache
, a0
, len
, readbuf
, writebuf
, 0);
1336 else if (len
> regsize
&& len
<= 2 * regsize
)
1338 /* The return value is passed in a0 and a1. */
1339 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1340 loongarch_xfer_reg (regcache
, a1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1343 case TYPE_CODE_COMPLEX
:
1345 /* The return value is passed in f0 and f1. */
1346 loongarch_xfer_reg (regcache
, f0
, len
/ 2, readbuf
, writebuf
, 0);
1347 loongarch_xfer_reg (regcache
, f1
, len
/ 2, readbuf
, writebuf
, len
/ 2);
1354 return RETURN_VALUE_REGISTER_CONVENTION
;
1357 /* Implement the dwarf2_reg_to_regnum gdbarch method. */
1360 loongarch_dwarf2_reg_to_regnum (struct gdbarch
*gdbarch
, int regnum
)
1362 if (regnum
>= 0 && regnum
< 32)
1364 else if (regnum
>= 32 && regnum
< 66)
1365 return LOONGARCH_FIRST_FP_REGNUM
+ regnum
- 32;
1370 static constexpr gdb_byte loongarch_default_breakpoint
[] = {0x05, 0x00, 0x2a, 0x00};
1371 typedef BP_MANIPULATION (loongarch_default_breakpoint
) loongarch_breakpoint
;
1373 /* Extract a set of required target features out of ABFD. If ABFD is nullptr
1374 then a LOONGARCH_GDBARCH_FEATURES is returned in its default state. */
1376 static struct loongarch_gdbarch_features
1377 loongarch_features_from_bfd (const bfd
*abfd
)
1379 struct loongarch_gdbarch_features features
;
1381 /* Now try to improve on the defaults by looking at the binary we are
1382 going to execute. We assume the user knows what they are doing and
1383 that the target will match the binary. Remember, this code path is
1384 only used at all if the target hasn't given us a description, so this
1385 is really a last ditched effort to do something sane before giving
1387 if (abfd
!= nullptr && bfd_get_flavour (abfd
) == bfd_target_elf_flavour
)
1389 unsigned char eclass
= elf_elfheader (abfd
)->e_ident
[EI_CLASS
];
1390 int e_flags
= elf_elfheader (abfd
)->e_flags
;
1392 if (eclass
== ELFCLASS32
)
1394 else if (eclass
== ELFCLASS64
)
1397 internal_error (_("unknown ELF header class %d"), eclass
);
1399 if (EF_LOONGARCH_IS_SINGLE_FLOAT (e_flags
))
1400 features
.fputype
= SINGLE_FLOAT
;
1401 else if (EF_LOONGARCH_IS_DOUBLE_FLOAT (e_flags
))
1402 features
.fputype
= DOUBLE_FLOAT
;
1408 /* Find a suitable default target description. Use the contents of INFO,
1409 specifically the bfd object being executed, to guide the selection of a
1410 suitable default target description. */
1412 static const struct target_desc
*
1413 loongarch_find_default_target_description (const struct gdbarch_info info
)
1415 /* Extract desired feature set from INFO. */
1416 struct loongarch_gdbarch_features features
1417 = loongarch_features_from_bfd (info
.abfd
);
1419 /* If the XLEN field is still 0 then we got nothing useful from INFO.BFD,
1420 maybe there was no bfd object. In this case we fall back to a minimal
1421 useful target, the x-register size is selected based on the architecture
1423 if (features
.xlen
== 0)
1424 features
.xlen
= info
.bfd_arch_info
->bits_per_address
== 32 ? 4 : 8;
1426 /* If the FPUTYPE field is still 0 then we got nothing useful from INFO.BFD,
1427 maybe there was no bfd object. In this case we fall back to a usual useful
1428 target with double float. */
1429 if (features
.fputype
== 0)
1430 features
.fputype
= DOUBLE_FLOAT
;
1432 /* Now build a target description based on the feature set. */
1433 return loongarch_lookup_target_description (features
);
1436 /* Initialize the current architecture based on INFO */
1438 static struct gdbarch
*
1439 loongarch_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1442 struct loongarch_gdbarch_features features
;
1443 tdesc_arch_data_up tdesc_data
= tdesc_data_alloc ();
1444 loongarch_gdbarch_tdep
*tdep
= new loongarch_gdbarch_tdep
;
1445 const struct target_desc
*tdesc
= info
.target_desc
;
1447 /* Ensure we always have a target description. */
1448 if (!tdesc_has_registers (tdesc
))
1449 tdesc
= loongarch_find_default_target_description (info
);
1451 const struct tdesc_feature
*feature_cpu
1452 = tdesc_find_feature (tdesc
, "org.gnu.gdb.loongarch.base");
1453 if (feature_cpu
== nullptr)
1457 /* Validate the description provides the mandatory base registers
1458 and allocate their numbers. */
1459 bool valid_p
= true;
1460 for (int i
= 0; i
< 32; i
++)
1461 valid_p
&= tdesc_numbered_register (feature_cpu
, tdesc_data
.get (), regnum
++,
1462 loongarch_r_normal_name
[i
] + 1);
1463 valid_p
&= tdesc_numbered_register (feature_cpu
, tdesc_data
.get (), regnum
++, "orig_a0");
1464 valid_p
&= tdesc_numbered_register (feature_cpu
, tdesc_data
.get (), regnum
++, "pc");
1465 valid_p
&= tdesc_numbered_register (feature_cpu
, tdesc_data
.get (), regnum
++, "badv");
1469 const struct tdesc_feature
*feature_fpu
1470 = tdesc_find_feature (tdesc
, "org.gnu.gdb.loongarch.fpu");
1471 if (feature_fpu
== nullptr)
1474 /* Validate the description provides the fpu registers and
1475 allocate their numbers. */
1476 regnum
= LOONGARCH_FIRST_FP_REGNUM
;
1477 for (int i
= 0; i
< LOONGARCH_LINUX_NUM_FPREGSET
; i
++)
1478 valid_p
&= tdesc_numbered_register (feature_fpu
, tdesc_data
.get (), regnum
++,
1479 loongarch_f_normal_name
[i
] + 1);
1480 for (int i
= 0; i
< LOONGARCH_LINUX_NUM_FCC
; i
++)
1481 valid_p
&= tdesc_numbered_register (feature_fpu
, tdesc_data
.get (), regnum
++,
1482 loongarch_c_normal_name
[i
] + 1);
1483 valid_p
&= tdesc_numbered_register (feature_fpu
, tdesc_data
.get (), regnum
++, "fcsr");
1487 /* LoongArch code is always little-endian. */
1488 info
.byte_order_for_code
= BFD_ENDIAN_LITTLE
;
1490 /* Have a look at what the supplied (if any) bfd object requires of the
1491 target, then check that this matches with what the target is
1493 struct loongarch_gdbarch_features abi_features
1494 = loongarch_features_from_bfd (info
.abfd
);
1496 /* If the ABI_FEATURES xlen or fputype is 0 then this indicates we got
1497 no useful abi features from the INFO object. In this case we just
1498 treat the hardware features as defining the abi. */
1499 if (abi_features
.xlen
== 0)
1501 int xlen_bitsize
= tdesc_register_bitsize (feature_cpu
, "pc");
1502 features
.xlen
= (xlen_bitsize
/ 8);
1503 features
.fputype
= abi_features
.fputype
;
1504 abi_features
= features
;
1506 if (abi_features
.fputype
== 0)
1508 features
.xlen
= abi_features
.xlen
;
1509 features
.fputype
= DOUBLE_FLOAT
;
1510 abi_features
= features
;
1513 /* Find a candidate among the list of pre-declared architectures. */
1514 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1516 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
1518 /* Check that the feature set of the ARCHES matches the feature set
1519 we are looking for. If it doesn't then we can't reuse this
1521 loongarch_gdbarch_tdep
*candidate_tdep
1522 = gdbarch_tdep
<loongarch_gdbarch_tdep
> (arches
->gdbarch
);
1524 if (candidate_tdep
->abi_features
!= abi_features
)
1530 if (arches
!= nullptr)
1531 return arches
->gdbarch
;
1533 /* None found, so create a new architecture from the information provided. */
1534 struct gdbarch
*gdbarch
= gdbarch_alloc (&info
, tdep
);
1535 tdep
->abi_features
= abi_features
;
1537 /* Target data types. */
1538 set_gdbarch_short_bit (gdbarch
, 16);
1539 set_gdbarch_int_bit (gdbarch
, 32);
1540 set_gdbarch_long_bit (gdbarch
, info
.bfd_arch_info
->bits_per_address
);
1541 set_gdbarch_long_long_bit (gdbarch
, 64);
1542 set_gdbarch_float_bit (gdbarch
, 32);
1543 set_gdbarch_double_bit (gdbarch
, 64);
1544 set_gdbarch_long_double_bit (gdbarch
, 128);
1545 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_quad
);
1546 set_gdbarch_ptr_bit (gdbarch
, info
.bfd_arch_info
->bits_per_address
);
1547 set_gdbarch_char_signed (gdbarch
, 0);
1549 info
.target_desc
= tdesc
;
1550 info
.tdesc_data
= tdesc_data
.get ();
1552 /* Information about registers. */
1553 set_gdbarch_num_regs (gdbarch
, regnum
);
1554 set_gdbarch_sp_regnum (gdbarch
, LOONGARCH_SP_REGNUM
);
1555 set_gdbarch_pc_regnum (gdbarch
, LOONGARCH_PC_REGNUM
);
1557 /* Finalise the target description registers. */
1558 tdesc_use_registers (gdbarch
, tdesc
, std::move (tdesc_data
));
1560 /* Functions handling dummy frames. */
1561 set_gdbarch_push_dummy_call (gdbarch
, loongarch_push_dummy_call
);
1563 /* Return value info */
1564 set_gdbarch_return_value (gdbarch
, loongarch_return_value
);
1566 /* Advance PC across function entry code. */
1567 set_gdbarch_skip_prologue (gdbarch
, loongarch_skip_prologue
);
1569 /* Stack grows downward. */
1570 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1573 set_gdbarch_frame_align (gdbarch
, loongarch_frame_align
);
1575 /* Breakpoint manipulation. */
1576 set_gdbarch_software_single_step (gdbarch
, loongarch_software_single_step
);
1577 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, loongarch_breakpoint::kind_from_pc
);
1578 set_gdbarch_sw_breakpoint_from_kind (gdbarch
, loongarch_breakpoint::bp_from_kind
);
1580 /* Frame unwinders. Use DWARF debug info if available, otherwise use our own unwinder. */
1581 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, loongarch_dwarf2_reg_to_regnum
);
1582 dwarf2_append_unwinders (gdbarch
);
1583 frame_unwind_append_unwinder (gdbarch
, &loongarch_frame_unwind
);
1585 /* Hook in OS ABI-specific overrides, if they have been registered. */
1586 gdbarch_init_osabi (info
, gdbarch
);
1591 void _initialize_loongarch_tdep ();
1593 _initialize_loongarch_tdep ()
1595 gdbarch_register (bfd_arch_loongarch
, loongarch_gdbarch_init
, nullptr);