1 /* Target-dependent code for Renesas M32R, for GDB.
3 Copyright (C) 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
25 #include "frame-unwind.h"
26 #include "frame-base.h"
31 #include "gdb_string.h"
38 #include "arch-utils.h"
40 #include "trad-frame.h"
43 #include "gdb_assert.h"
45 #include "m32r-tdep.h"
49 extern void _initialize_m32r_tdep (void);
52 m32r_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
54 /* Align to the size of an instruction (so that they can safely be
55 pushed onto the stack. */
62 The little endian mode of M32R is unique. In most of architectures,
63 two 16-bit instructions, A and B, are placed as the following:
71 In M32R, they are placed like this:
79 This is because M32R always fetches instructions in 32-bit.
81 The following functions take care of this behavior. */
84 m32r_memory_insert_breakpoint (struct bp_target_info
*bp_tgt
)
86 CORE_ADDR addr
= bp_tgt
->placed_address
;
89 gdb_byte
*contents_cache
= bp_tgt
->shadow_contents
;
90 gdb_byte bp_entry
[] = { 0x10, 0xf1 }; /* dpt */
92 /* Save the memory contents. */
93 val
= target_read_memory (addr
& 0xfffffffc, contents_cache
, 4);
95 return val
; /* return error */
97 bp_tgt
->placed_size
= bp_tgt
->shadow_len
= 4;
99 /* Determine appropriate breakpoint contents and size for this address. */
100 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
104 buf
[0] = bp_entry
[0];
105 buf
[1] = bp_entry
[1];
106 buf
[2] = contents_cache
[2] & 0x7f;
107 buf
[3] = contents_cache
[3];
111 buf
[0] = contents_cache
[0];
112 buf
[1] = contents_cache
[1];
113 buf
[2] = bp_entry
[0];
114 buf
[3] = bp_entry
[1];
117 else /* little-endian */
121 buf
[0] = contents_cache
[0];
122 buf
[1] = contents_cache
[1] & 0x7f;
123 buf
[2] = bp_entry
[1];
124 buf
[3] = bp_entry
[0];
128 buf
[0] = bp_entry
[1];
129 buf
[1] = bp_entry
[0];
130 buf
[2] = contents_cache
[2];
131 buf
[3] = contents_cache
[3];
135 /* Write the breakpoint. */
136 val
= target_write_memory (addr
& 0xfffffffc, buf
, 4);
141 m32r_memory_remove_breakpoint (struct bp_target_info
*bp_tgt
)
143 CORE_ADDR addr
= bp_tgt
->placed_address
;
146 gdb_byte
*contents_cache
= bp_tgt
->shadow_contents
;
148 buf
[0] = contents_cache
[0];
149 buf
[1] = contents_cache
[1];
150 buf
[2] = contents_cache
[2];
151 buf
[3] = contents_cache
[3];
153 /* Remove parallel bit. */
154 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
156 if ((buf
[0] & 0x80) == 0 && (buf
[2] & 0x80) != 0)
159 else /* little-endian */
161 if ((buf
[3] & 0x80) == 0 && (buf
[1] & 0x80) != 0)
165 /* Write contents. */
166 val
= target_write_memory (addr
& 0xfffffffc, buf
, 4);
170 static const gdb_byte
*
171 m32r_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
173 static gdb_byte be_bp_entry
[] = { 0x10, 0xf1, 0x70, 0x00 }; /* dpt -> nop */
174 static gdb_byte le_bp_entry
[] = { 0x00, 0x70, 0xf1, 0x10 }; /* dpt -> nop */
177 /* Determine appropriate breakpoint. */
178 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
180 if ((*pcptr
& 3) == 0)
193 if ((*pcptr
& 3) == 0)
200 bp
= le_bp_entry
+ 2;
209 char *m32r_register_names
[] = {
210 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
211 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp",
212 "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch",
217 m32r_register_name (int reg_nr
)
221 if (reg_nr
>= M32R_NUM_REGS
)
223 return m32r_register_names
[reg_nr
];
227 /* Return the GDB type object for the "standard" data type
228 of data in register N. */
231 m32r_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
233 if (reg_nr
== M32R_PC_REGNUM
)
234 return builtin_type_void_func_ptr
;
235 else if (reg_nr
== M32R_SP_REGNUM
|| reg_nr
== M32R_FP_REGNUM
)
236 return builtin_type_void_data_ptr
;
238 return builtin_type_int32
;
242 /* Write into appropriate registers a function return value
243 of type TYPE, given in virtual format.
245 Things always get returned in RET1_REGNUM, RET2_REGNUM. */
248 m32r_store_return_value (struct type
*type
, struct regcache
*regcache
,
252 int len
= TYPE_LENGTH (type
);
254 regval
= extract_unsigned_integer (valbuf
, len
> 4 ? 4 : len
);
255 regcache_cooked_write_unsigned (regcache
, RET1_REGNUM
, regval
);
259 regval
= extract_unsigned_integer ((gdb_byte
*) valbuf
+ 4, len
- 4);
260 regcache_cooked_write_unsigned (regcache
, RET1_REGNUM
+ 1, regval
);
264 /* This is required by skip_prologue. The results of decoding a prologue
265 should be cached because this thrashing is getting nuts. */
268 decode_prologue (CORE_ADDR start_pc
, CORE_ADDR scan_limit
,
269 CORE_ADDR
*pl_endptr
, unsigned long *framelength
)
271 unsigned long framesize
;
274 CORE_ADDR after_prologue
= 0;
275 CORE_ADDR after_push
= 0;
276 CORE_ADDR after_stack_adjust
= 0;
277 CORE_ADDR current_pc
;
278 LONGEST return_value
;
283 for (current_pc
= start_pc
; current_pc
< scan_limit
; current_pc
+= 2)
285 /* Check if current pc's location is readable. */
286 if (!safe_read_memory_integer (current_pc
, 2, &return_value
))
289 insn
= read_memory_unsigned_integer (current_pc
, 2);
294 /* If this is a 32 bit instruction, we dont want to examine its
295 immediate data as though it were an instruction */
296 if (current_pc
& 0x02)
298 /* decode this instruction further */
305 if (current_pc
== scan_limit
)
306 scan_limit
+= 2; /* extend the search */
308 current_pc
+= 2; /* skip the immediate data */
310 /* Check if current pc's location is readable. */
311 if (!safe_read_memory_integer (current_pc
, 2, &return_value
))
314 if (insn
== 0x8faf) /* add3 sp, sp, xxxx */
315 /* add 16 bit sign-extended offset */
318 -((short) read_memory_unsigned_integer (current_pc
, 2));
322 if (((insn
>> 8) == 0xe4) /* ld24 r4, xxxxxx; sub sp, r4 */
323 && safe_read_memory_integer (current_pc
+ 2, 2,
325 && read_memory_unsigned_integer (current_pc
+ 2,
327 /* subtract 24 bit sign-extended negative-offset */
329 insn
= read_memory_unsigned_integer (current_pc
- 2, 4);
330 if (insn
& 0x00800000) /* sign extend */
331 insn
|= 0xff000000; /* negative */
333 insn
&= 0x00ffffff; /* positive */
337 after_push
= current_pc
+ 2;
341 op1
= insn
& 0xf000; /* isolate just the first nibble */
343 if ((insn
& 0xf0ff) == 0x207f)
347 regno
= ((insn
>> 8) & 0xf);
351 if ((insn
>> 8) == 0x4f) /* addi sp, xx */
352 /* add 8 bit sign-extended offset */
354 int stack_adjust
= (gdb_byte
) (insn
& 0xff);
356 /* there are probably two of these stack adjustments:
357 1) A negative one in the prologue, and
358 2) A positive one in the epilogue.
359 We are only interested in the first one. */
361 if (stack_adjust
< 0)
363 framesize
-= stack_adjust
;
365 /* A frameless function may have no "mv fp, sp".
366 In that case, this is the end of the prologue. */
367 after_stack_adjust
= current_pc
+ 2;
373 after_prologue
= current_pc
+ 2;
374 break; /* end of stack adjustments */
377 /* Nop looks like a branch, continue explicitly */
380 after_prologue
= current_pc
+ 2;
381 continue; /* nop occurs between pushes */
383 /* End of prolog if any of these are trap instructions */
384 if ((insn
& 0xfff0) == 0x10f0)
386 after_prologue
= current_pc
;
389 /* End of prolog if any of these are branch instructions */
390 if ((op1
== 0x7000) || (op1
== 0xb000) || (op1
== 0xf000))
392 after_prologue
= current_pc
;
395 /* Some of the branch instructions are mixed with other types */
398 int subop
= insn
& 0x0ff0;
399 if ((subop
== 0x0ec0) || (subop
== 0x0fc0))
401 after_prologue
= current_pc
;
402 continue; /* jmp , jl */
408 *framelength
= framesize
;
410 if (current_pc
>= scan_limit
)
414 if (after_stack_adjust
!= 0)
415 /* We did not find a "mv fp,sp", but we DID find
416 a stack_adjust. Is it safe to use that as the
417 end of the prologue? I just don't know. */
419 *pl_endptr
= after_stack_adjust
;
421 else if (after_push
!= 0)
422 /* We did not find a "mv fp,sp", but we DID find
423 a push. Is it safe to use that as the
424 end of the prologue? I just don't know. */
426 *pl_endptr
= after_push
;
429 /* We reached the end of the loop without finding the end
430 of the prologue. No way to win -- we should report failure.
431 The way we do that is to return the original start_pc.
432 GDB will set a breakpoint at the start of the function (etc.) */
433 *pl_endptr
= start_pc
;
438 if (after_prologue
== 0)
439 after_prologue
= current_pc
;
442 *pl_endptr
= after_prologue
;
445 } /* decode_prologue */
447 /* Function: skip_prologue
448 Find end of function prologue */
450 #define DEFAULT_SEARCH_LIMIT 128
453 m32r_skip_prologue (CORE_ADDR pc
)
455 CORE_ADDR func_addr
, func_end
;
456 struct symtab_and_line sal
;
457 LONGEST return_value
;
459 /* See what the symbol table says */
461 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
463 sal
= find_pc_line (func_addr
, 0);
465 if (sal
.line
!= 0 && sal
.end
<= func_end
)
470 /* Either there's no line info, or the line after the prologue is after
471 the end of the function. In this case, there probably isn't a
474 func_end
= min (func_end
, func_addr
+ DEFAULT_SEARCH_LIMIT
);
478 func_end
= pc
+ DEFAULT_SEARCH_LIMIT
;
480 /* If pc's location is not readable, just quit. */
481 if (!safe_read_memory_integer (pc
, 4, &return_value
))
484 /* Find the end of prologue. */
485 if (decode_prologue (pc
, func_end
, &sal
.end
, NULL
) < 0)
491 struct m32r_unwind_cache
493 /* The previous frame's inner most stack address. Used as this
494 frame ID's stack_addr. */
496 /* The frame's base, optionally used by the high-level debug info. */
499 /* How far the SP and r13 (FP) have been offset from the start of
500 the stack frame (as defined by the previous frame's stack
505 /* Table indicating the location of each and every register. */
506 struct trad_frame_saved_reg
*saved_regs
;
509 /* Put here the code to store, into fi->saved_regs, the addresses of
510 the saved registers of frame described by FRAME_INFO. This
511 includes special registers such as pc and fp saved in special ways
512 in the stack frame. sp is even more special: the address we return
513 for it IS the sp for the next frame. */
515 static struct m32r_unwind_cache
*
516 m32r_frame_unwind_cache (struct frame_info
*next_frame
,
517 void **this_prologue_cache
)
519 CORE_ADDR pc
, scan_limit
;
522 unsigned long op
, op2
;
524 struct m32r_unwind_cache
*info
;
527 if ((*this_prologue_cache
))
528 return (*this_prologue_cache
);
530 info
= FRAME_OBSTACK_ZALLOC (struct m32r_unwind_cache
);
531 (*this_prologue_cache
) = info
;
532 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
536 info
->uses_frame
= 0;
538 scan_limit
= frame_pc_unwind (next_frame
);
539 for (pc
= frame_func_unwind (next_frame
);
540 pc
> 0 && pc
< scan_limit
; pc
+= 2)
544 op
= get_frame_memory_unsigned (next_frame
, pc
, 4);
545 if ((op
& 0x80000000) == 0x80000000)
547 /* 32-bit instruction */
548 if ((op
& 0xffff0000) == 0x8faf0000)
550 /* add3 sp,sp,xxxx */
551 short n
= op
& 0xffff;
552 info
->sp_offset
+= n
;
554 else if (((op
>> 8) == 0xe4)
555 && get_frame_memory_unsigned (next_frame
, pc
+ 2,
558 /* ld24 r4, xxxxxx; sub sp, r4 */
559 unsigned long n
= op
& 0xffffff;
560 info
->sp_offset
+= n
;
561 pc
+= 2; /* skip sub instruction */
564 if (pc
== scan_limit
)
565 scan_limit
+= 2; /* extend the search */
566 pc
+= 2; /* skip the immediate data */
571 /* 16-bit instructions */
572 op
= get_frame_memory_unsigned (next_frame
, pc
, 2) & 0x7fff;
573 if ((op
& 0xf0ff) == 0x207f)
576 int regno
= ((op
>> 8) & 0xf);
577 info
->sp_offset
-= 4;
578 info
->saved_regs
[regno
].addr
= info
->sp_offset
;
580 else if ((op
& 0xff00) == 0x4f00)
583 int n
= (gdb_byte
) (op
& 0xff);
584 info
->sp_offset
+= n
;
586 else if (op
== 0x1d8f)
589 info
->uses_frame
= 1;
590 info
->r13_offset
= info
->sp_offset
;
591 break; /* end of stack adjustments */
593 else if ((op
& 0xfff0) == 0x10f0)
595 /* end of prologue if this is a trap instruction */
596 break; /* end of stack adjustments */
600 info
->size
= -info
->sp_offset
;
602 /* Compute the previous frame's stack pointer (which is also the
603 frame's ID's stack address), and this frame's base pointer. */
604 if (info
->uses_frame
)
606 /* The SP was moved to the FP. This indicates that a new frame
607 was created. Get THIS frame's FP value by unwinding it from
609 this_base
= frame_unwind_register_unsigned (next_frame
, M32R_FP_REGNUM
);
610 /* The FP points at the last saved register. Adjust the FP back
611 to before the first saved register giving the SP. */
612 prev_sp
= this_base
+ info
->size
;
616 /* Assume that the FP is this frame's SP but with that pushed
617 stack space added back. */
618 this_base
= frame_unwind_register_unsigned (next_frame
, M32R_SP_REGNUM
);
619 prev_sp
= this_base
+ info
->size
;
622 /* Convert that SP/BASE into real addresses. */
623 info
->prev_sp
= prev_sp
;
624 info
->base
= this_base
;
626 /* Adjust all the saved registers so that they contain addresses and
628 for (i
= 0; i
< NUM_REGS
- 1; i
++)
629 if (trad_frame_addr_p (info
->saved_regs
, i
))
630 info
->saved_regs
[i
].addr
= (info
->prev_sp
+ info
->saved_regs
[i
].addr
);
632 /* The call instruction moves the caller's PC in the callee's LR.
633 Since this is an unwind, do the reverse. Copy the location of LR
634 into PC (the address / regnum) so that a request for PC will be
635 converted into a request for the LR. */
636 info
->saved_regs
[M32R_PC_REGNUM
] = info
->saved_regs
[LR_REGNUM
];
638 /* The previous frame's SP needed to be computed. Save the computed
640 trad_frame_set_value (info
->saved_regs
, M32R_SP_REGNUM
, prev_sp
);
646 m32r_read_pc (ptid_t ptid
)
651 save_ptid
= inferior_ptid
;
652 inferior_ptid
= ptid
;
653 regcache_cooked_read_unsigned (current_regcache
, M32R_PC_REGNUM
, &pc
);
654 inferior_ptid
= save_ptid
;
659 m32r_write_pc (CORE_ADDR val
, ptid_t ptid
)
663 save_ptid
= inferior_ptid
;
664 inferior_ptid
= ptid
;
665 write_register (M32R_PC_REGNUM
, val
);
666 inferior_ptid
= save_ptid
;
670 m32r_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
672 return frame_unwind_register_unsigned (next_frame
, M32R_SP_REGNUM
);
677 m32r_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
678 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
679 struct value
**args
, CORE_ADDR sp
, int struct_return
,
680 CORE_ADDR struct_addr
)
682 int stack_offset
, stack_alloc
;
683 int argreg
= ARG1_REGNUM
;
686 enum type_code typecode
;
689 gdb_byte valbuf
[MAX_REGISTER_SIZE
];
691 int odd_sized_struct
;
693 /* first force sp to a 4-byte alignment */
696 /* Set the return address. For the m32r, the return breakpoint is
697 always at BP_ADDR. */
698 regcache_cooked_write_unsigned (regcache
, LR_REGNUM
, bp_addr
);
700 /* If STRUCT_RETURN is true, then the struct return address (in
701 STRUCT_ADDR) will consume the first argument-passing register.
702 Both adjust the register count and store that value. */
705 regcache_cooked_write_unsigned (regcache
, argreg
, struct_addr
);
709 /* Now make sure there's space on the stack */
710 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
711 stack_alloc
+= ((TYPE_LENGTH (value_type (args
[argnum
])) + 3) & ~3);
712 sp
-= stack_alloc
; /* make room on stack for args */
714 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
716 type
= value_type (args
[argnum
]);
717 typecode
= TYPE_CODE (type
);
718 len
= TYPE_LENGTH (type
);
720 memset (valbuf
, 0, sizeof (valbuf
));
722 /* Passes structures that do not fit in 2 registers by reference. */
724 && (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
))
726 store_unsigned_integer (valbuf
, 4, VALUE_ADDRESS (args
[argnum
]));
727 typecode
= TYPE_CODE_PTR
;
733 /* value gets right-justified in the register or stack word */
734 memcpy (valbuf
+ (register_size (gdbarch
, argreg
) - len
),
735 (gdb_byte
*) value_contents (args
[argnum
]), len
);
739 val
= (gdb_byte
*) value_contents (args
[argnum
]);
743 if (argreg
> ARGN_REGNUM
)
745 /* must go on the stack */
746 write_memory (sp
+ stack_offset
, val
, 4);
749 else if (argreg
<= ARGN_REGNUM
)
751 /* there's room in a register */
753 extract_unsigned_integer (val
,
754 register_size (gdbarch
, argreg
));
755 regcache_cooked_write_unsigned (regcache
, argreg
++, regval
);
758 /* Store the value 4 bytes at a time. This means that things
759 larger than 4 bytes may go partly in registers and partly
761 len
-= register_size (gdbarch
, argreg
);
762 val
+= register_size (gdbarch
, argreg
);
766 /* Finally, update the SP register. */
767 regcache_cooked_write_unsigned (regcache
, M32R_SP_REGNUM
, sp
);
773 /* Given a return value in `regbuf' with a type `valtype',
774 extract and copy its value into `valbuf'. */
777 m32r_extract_return_value (struct type
*type
, struct regcache
*regcache
,
780 bfd_byte
*valbuf
= dst
;
781 int len
= TYPE_LENGTH (type
);
784 /* By using store_unsigned_integer we avoid having to do
785 anything special for small big-endian values. */
786 regcache_cooked_read_unsigned (regcache
, RET1_REGNUM
, &tmp
);
787 store_unsigned_integer (valbuf
, (len
> 4 ? len
- 4 : len
), tmp
);
789 /* Ignore return values more than 8 bytes in size because the m32r
790 returns anything more than 8 bytes in the stack. */
793 regcache_cooked_read_unsigned (regcache
, RET1_REGNUM
+ 1, &tmp
);
794 store_unsigned_integer (valbuf
+ len
- 4, 4, tmp
);
798 enum return_value_convention
799 m32r_return_value (struct gdbarch
*gdbarch
, struct type
*valtype
,
800 struct regcache
*regcache
, gdb_byte
*readbuf
,
801 const gdb_byte
*writebuf
)
803 if (TYPE_LENGTH (valtype
) > 8)
804 return RETURN_VALUE_STRUCT_CONVENTION
;
808 m32r_extract_return_value (valtype
, regcache
, readbuf
);
809 if (writebuf
!= NULL
)
810 m32r_store_return_value (valtype
, regcache
, writebuf
);
811 return RETURN_VALUE_REGISTER_CONVENTION
;
818 m32r_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
820 return frame_unwind_register_unsigned (next_frame
, M32R_PC_REGNUM
);
823 /* Given a GDB frame, determine the address of the calling function's
824 frame. This will be used to create a new GDB frame struct. */
827 m32r_frame_this_id (struct frame_info
*next_frame
,
828 void **this_prologue_cache
, struct frame_id
*this_id
)
830 struct m32r_unwind_cache
*info
831 = m32r_frame_unwind_cache (next_frame
, this_prologue_cache
);
834 struct minimal_symbol
*msym_stack
;
837 /* The FUNC is easy. */
838 func
= frame_func_unwind (next_frame
);
840 /* Check if the stack is empty. */
841 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
842 if (msym_stack
&& info
->base
== SYMBOL_VALUE_ADDRESS (msym_stack
))
845 /* Hopefully the prologue analysis either correctly determined the
846 frame's base (which is the SP from the previous frame), or set
847 that base to "NULL". */
848 base
= info
->prev_sp
;
852 id
= frame_id_build (base
, func
);
857 m32r_frame_prev_register (struct frame_info
*next_frame
,
858 void **this_prologue_cache
,
859 int regnum
, int *optimizedp
,
860 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
861 int *realnump
, gdb_byte
*bufferp
)
863 struct m32r_unwind_cache
*info
864 = m32r_frame_unwind_cache (next_frame
, this_prologue_cache
);
865 trad_frame_get_prev_register (next_frame
, info
->saved_regs
, regnum
,
866 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
869 static const struct frame_unwind m32r_frame_unwind
= {
872 m32r_frame_prev_register
875 static const struct frame_unwind
*
876 m32r_frame_sniffer (struct frame_info
*next_frame
)
878 return &m32r_frame_unwind
;
882 m32r_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
884 struct m32r_unwind_cache
*info
885 = m32r_frame_unwind_cache (next_frame
, this_cache
);
889 static const struct frame_base m32r_frame_base
= {
891 m32r_frame_base_address
,
892 m32r_frame_base_address
,
893 m32r_frame_base_address
896 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
897 dummy frame. The frame ID's base needs to match the TOS value
898 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
901 static struct frame_id
902 m32r_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
904 return frame_id_build (m32r_unwind_sp (gdbarch
, next_frame
),
905 frame_pc_unwind (next_frame
));
909 static gdbarch_init_ftype m32r_gdbarch_init
;
911 static struct gdbarch
*
912 m32r_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
914 struct gdbarch
*gdbarch
;
915 struct gdbarch_tdep
*tdep
;
917 /* If there is already a candidate, use it. */
918 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
920 return arches
->gdbarch
;
922 /* Allocate space for the new architecture. */
923 tdep
= XMALLOC (struct gdbarch_tdep
);
924 gdbarch
= gdbarch_alloc (&info
, tdep
);
926 set_gdbarch_read_pc (gdbarch
, m32r_read_pc
);
927 set_gdbarch_write_pc (gdbarch
, m32r_write_pc
);
928 set_gdbarch_unwind_sp (gdbarch
, m32r_unwind_sp
);
930 set_gdbarch_num_regs (gdbarch
, M32R_NUM_REGS
);
931 set_gdbarch_sp_regnum (gdbarch
, M32R_SP_REGNUM
);
932 set_gdbarch_register_name (gdbarch
, m32r_register_name
);
933 set_gdbarch_register_type (gdbarch
, m32r_register_type
);
935 set_gdbarch_push_dummy_call (gdbarch
, m32r_push_dummy_call
);
936 set_gdbarch_return_value (gdbarch
, m32r_return_value
);
938 set_gdbarch_skip_prologue (gdbarch
, m32r_skip_prologue
);
939 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
940 set_gdbarch_breakpoint_from_pc (gdbarch
, m32r_breakpoint_from_pc
);
941 set_gdbarch_memory_insert_breakpoint (gdbarch
,
942 m32r_memory_insert_breakpoint
);
943 set_gdbarch_memory_remove_breakpoint (gdbarch
,
944 m32r_memory_remove_breakpoint
);
946 set_gdbarch_frame_align (gdbarch
, m32r_frame_align
);
948 frame_base_set_default (gdbarch
, &m32r_frame_base
);
950 /* Methods for saving / extracting a dummy frame's ID. The ID's
951 stack address must match the SP value returned by
952 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
953 set_gdbarch_unwind_dummy_id (gdbarch
, m32r_unwind_dummy_id
);
955 /* Return the unwound PC value. */
956 set_gdbarch_unwind_pc (gdbarch
, m32r_unwind_pc
);
958 set_gdbarch_print_insn (gdbarch
, print_insn_m32r
);
960 /* Hook in ABI-specific overrides, if they have been registered. */
961 gdbarch_init_osabi (info
, gdbarch
);
963 /* Hook in the default unwinders. */
964 frame_unwind_append_sniffer (gdbarch
, m32r_frame_sniffer
);
970 _initialize_m32r_tdep (void)
972 register_gdbarch_init (bfd_arch_m32r
, m32r_gdbarch_init
);